Update the agp(4) code to the latest one from FreeBSD HEAD. This brings in
[dragonfly.git] / sys / dev / agp / agp_via.c
CommitLineData
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1/*-
2 * Copyright (c) 2000 Doug Rabson
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
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26 * $FreeBSD: src/sys/pci/agp_via.c,v 1.23 2005/12/20 21:12:26 jhb Exp $
27 * $DragonFly: src/sys/dev/agp/agp_via.c,v 1.6 2007/09/12 08:31:43 hasso Exp $
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28 */
29
30#include "opt_bus.h"
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31
32#include <sys/param.h>
33#include <sys/systm.h>
34#include <sys/malloc.h>
35#include <sys/kernel.h>
36#include <sys/bus.h>
37#include <sys/lock.h>
38
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39#include <bus/pci/pcivar.h>
40#include <bus/pci/pcireg.h>
41#include "agppriv.h"
42#include "agpreg.h"
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43
44#include <vm/vm.h>
45#include <vm/vm_object.h>
46#include <vm/pmap.h>
47
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48#define REG_GARTCTRL 0
49#define REG_APSIZE 1
50#define REG_ATTBASE 2
ab5a0ec8 51
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52struct agp_via_softc {
53 struct agp_softc agp;
54 u_int32_t initial_aperture; /* aperture size at startup */
55 struct agp_gatt *gatt;
ab5a0ec8 56 int *regs;
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57};
58
ab5a0ec8 59static int via_v2_regs[] = { AGP_VIA_GARTCTRL, AGP_VIA_APSIZE,
fdc3c5be 60 AGP_VIA_ATTBASE };
ab5a0ec8 61static int via_v3_regs[] = { AGP3_VIA_GARTCTRL, AGP3_VIA_APSIZE,
fdc3c5be 62 AGP3_VIA_ATTBASE };
ab5a0ec8 63
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64static const char*
65agp_via_match(device_t dev)
66{
67 if (pci_get_class(dev) != PCIC_BRIDGE
68 || pci_get_subclass(dev) != PCIS_BRIDGE_HOST)
69 return NULL;
70
71 if (agp_find_caps(dev) == 0)
72 return NULL;
73
74 switch (pci_get_devid(dev)) {
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75 case 0x01981106:
76 return ("VIA 8763 (P4X600) host to PCI bridge");
77 case 0x02591106:
78 return ("VIA PM800/PN800/PM880/PN880 host to PCI bridge");
79 case 0x02691106:
80 return ("VIA KT880 host to PCI bridge");
81 case 0x02961106:
82 return ("VIA 3296 (P4M800) host to PCI bridge");
f7841f3c 83 case 0x03051106:
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84 return ("VIA 82C8363 (Apollo KT133x/KM133) host to PCI bridge");
85 case 0x03911106:
86 return ("VIA 8371 (Apollo KX133) host to PCI bridge");
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87 case 0x05011106:
88 return ("VIA 8501 (Apollo MVP4) host to PCI bridge");
89 case 0x05971106:
90 return ("VIA 82C597 (Apollo VP3) host to PCI bridge");
91 case 0x05981106:
92 return ("VIA 82C598 (Apollo MVP3) host to PCI bridge");
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93 case 0x06011106:
94 return ("VIA 8601 (Apollo ProMedia/PLE133Ta) host to PCI bridge");
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95 case 0x06051106:
96 return ("VIA 82C694X (Apollo Pro 133A) host to PCI bridge");
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97 case 0x06911106:
98 return ("VIA 82C691 (Apollo Pro) host to PCI bridge");
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99 case 0x30911106:
100 return ("VIA 8633 (Pro 266) host to PCI bridge");
101 case 0x30991106:
102 return ("VIA 8367 (KT266/KY266x/KT333) host to PCI bridge");
103 case 0x31011106:
104 return ("VIA 8653 (Pro266T) host to PCI bridge");
105 case 0x31121106:
106 return ("VIA 8361 (KLE133) host to PCI bridge");
107 case 0x31161106:
108 return ("VIA XM266 (PM266/KM266) host to PCI bridge");
109 case 0x31231106:
110 return ("VIA 862x (CLE266) host to PCI bridge");
111 case 0x31281106:
112 return ("VIA 8753 (P4X266) host to PCI bridge");
113 case 0x31481106:
114 return ("VIA 8703 (P4M266x/P4N266) host to PCI bridge");
115 case 0x31561106:
116 return ("VIA XN266 (Apollo Pro266) host to PCI bridge");
117 case 0x31681106:
118 return ("VIA 8754 (PT800) host to PCI bridge");
119 case 0x31891106:
120 return ("VIA 8377 (Apollo KT400/KT400A/KT600) host to PCI bridge");
121 case 0x32051106:
122 return ("VIA 8235/8237 (Apollo KM400/KM400A) host to PCI bridge");
123 case 0x32081106:
124 return ("VIA 8783 (PT890) host to PCI bridge");
125 case 0x32581106:
126 return ("VIA PT880 host to PCI bridge");
127 case 0xb1981106:
128 return ("VIA VT83xx/VT87xx/KTxxx/Px8xx host to PCI bridge");
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129 };
130
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131 return NULL;
132}
133
134static int
135agp_via_probe(device_t dev)
136{
137 const char *desc;
138
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139 if (resource_disabled("agp", device_get_unit(dev)))
140 return (ENXIO);
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141 desc = agp_via_match(dev);
142 if (desc) {
143 device_verbose(dev);
144 device_set_desc(dev, desc);
fdc3c5be 145 return BUS_PROBE_DEFAULT;
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146 }
147
148 return ENXIO;
149}
150
151static int
152agp_via_attach(device_t dev)
153{
154 struct agp_via_softc *sc = device_get_softc(dev);
155 struct agp_gatt *gatt;
156 int error;
fdc3c5be 157 u_int32_t agpsel;
984263bc 158
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159 /* XXX: This should be keying off of whether the bridge is AGP3 capable,
160 * rather than a bunch of device ids for chipsets that happen to do 8x.
161 */
ab5a0ec8 162 switch (pci_get_devid(dev)) {
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163 case 0x01981106:
164 case 0x02591106:
165 case 0x02691106:
166 case 0x02961106:
167 case 0x31231106:
168 case 0x31681106:
169 case 0x31891106:
170 case 0x32051106:
171 case 0x32581106:
172 case 0xb1981106:
173 /* The newer VIA chipsets will select the AGP version based on
174 * what AGP versions the card supports. We still have to
175 * program it using the v2 registers if it has chosen to use
176 * compatibility mode.
177 */
178 agpsel = pci_read_config(dev, AGP_VIA_AGPSEL, 1);
179 if ((agpsel & (1 << 1)) == 0)
180 sc->regs = via_v3_regs;
181 else
182 sc->regs = via_v2_regs;
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183 break;
184 default:
185 sc->regs = via_v2_regs;
186 break;
187 }
fdc3c5be 188
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189 error = agp_generic_attach(dev);
190 if (error)
191 return error;
192
193 sc->initial_aperture = AGP_GET_APERTURE(dev);
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194 if (sc->initial_aperture == 0) {
195 device_printf(dev, "bad initial aperture size, disabling\n");
196 return ENXIO;
197 }
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198
199 for (;;) {
200 gatt = agp_alloc_gatt(dev);
201 if (gatt)
202 break;
203
204 /*
205 * Probably contigmalloc failure. Try reducing the
206 * aperture so that the gatt size reduces.
207 */
208 if (AGP_SET_APERTURE(dev, AGP_GET_APERTURE(dev) / 2)) {
209 agp_generic_detach(dev);
210 return ENOMEM;
211 }
212 }
213 sc->gatt = gatt;
214
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215 if (sc->regs == via_v2_regs) {
216 /* Install the gatt. */
217 pci_write_config(dev, sc->regs[REG_ATTBASE], gatt->ag_physical | 3, 4);
218
219 /* Enable the aperture. */
220 pci_write_config(dev, sc->regs[REG_GARTCTRL], 0x0f, 4);
221 } else {
222 u_int32_t gartctrl;
223
224 /* Install the gatt. */
225 pci_write_config(dev, sc->regs[REG_ATTBASE], gatt->ag_physical, 4);
226
227 /* Enable the aperture. */
228 gartctrl = pci_read_config(dev, sc->regs[REG_ATTBASE], 4);
229 pci_write_config(dev, sc->regs[REG_GARTCTRL], gartctrl | (3 << 7), 4);
230 }
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231
232 return 0;
233}
234
235static int
236agp_via_detach(device_t dev)
237{
238 struct agp_via_softc *sc = device_get_softc(dev);
239 int error;
240
241 error = agp_generic_detach(dev);
242 if (error)
243 return error;
244
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245 pci_write_config(dev, sc->regs[REG_GARTCTRL], 0, 4);
246 pci_write_config(dev, sc->regs[REG_ATTBASE], 0, 4);
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247 AGP_SET_APERTURE(dev, sc->initial_aperture);
248 agp_free_gatt(sc->gatt);
249
250 return 0;
251}
252
253static u_int32_t
254agp_via_get_aperture(device_t dev)
255{
ab5a0ec8 256 struct agp_via_softc *sc = device_get_softc(dev);
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257 u_int32_t apsize;
258
ab5a0ec8 259 apsize = pci_read_config(dev, sc->regs[REG_APSIZE], 1) & 0x1f;
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260
261 /*
262 * The size is determined by the number of low bits of
263 * register APBASE which are forced to zero. The low 20 bits
264 * are always forced to zero and each zero bit in the apsize
265 * field just read forces the corresponding bit in the 27:20
266 * to be zero. We calculate the aperture size accordingly.
267 */
268 return (((apsize ^ 0xff) << 20) | ((1 << 20) - 1)) + 1;
269}
270
271static int
272agp_via_set_aperture(device_t dev, u_int32_t aperture)
273{
ab5a0ec8 274 struct agp_via_softc *sc = device_get_softc(dev);
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275 u_int32_t apsize;
276
277 /*
278 * Reverse the magic from get_aperture.
279 */
280 apsize = ((aperture - 1) >> 20) ^ 0xff;
281
282 /*
283 * Double check for sanity.
284 */
285 if ((((apsize ^ 0xff) << 20) | ((1 << 20) - 1)) + 1 != aperture)
286 return EINVAL;
287
ab5a0ec8 288 pci_write_config(dev, sc->regs[REG_APSIZE], apsize, 1);
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289
290 return 0;
291}
292
293static int
294agp_via_bind_page(device_t dev, int offset, vm_offset_t physical)
295{
296 struct agp_via_softc *sc = device_get_softc(dev);
297
298 if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT))
299 return EINVAL;
300
301 sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical;
302 return 0;
303}
304
305static int
306agp_via_unbind_page(device_t dev, int offset)
307{
308 struct agp_via_softc *sc = device_get_softc(dev);
309
310 if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT))
311 return EINVAL;
312
313 sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0;
314 return 0;
315}
316
317static void
318agp_via_flush_tlb(device_t dev)
319{
ab5a0ec8 320 struct agp_via_softc *sc = device_get_softc(dev);
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321 u_int32_t gartctrl;
322
323 if (sc->regs == via_v2_regs) {
324 pci_write_config(dev, sc->regs[REG_GARTCTRL], 0x8f, 4);
325 pci_write_config(dev, sc->regs[REG_GARTCTRL], 0x0f, 4);
326 } else {
327 gartctrl = pci_read_config(dev, sc->regs[REG_GARTCTRL], 4);
328 pci_write_config(dev, sc->regs[REG_GARTCTRL], gartctrl &
329 ~(1 << 7), 4);
330 pci_write_config(dev, sc->regs[REG_GARTCTRL], gartctrl, 4);
331 }
332
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333}
334
335static device_method_t agp_via_methods[] = {
336 /* Device interface */
337 DEVMETHOD(device_probe, agp_via_probe),
338 DEVMETHOD(device_attach, agp_via_attach),
339 DEVMETHOD(device_detach, agp_via_detach),
340 DEVMETHOD(device_shutdown, bus_generic_shutdown),
341 DEVMETHOD(device_suspend, bus_generic_suspend),
342 DEVMETHOD(device_resume, bus_generic_resume),
343
344 /* AGP interface */
345 DEVMETHOD(agp_get_aperture, agp_via_get_aperture),
346 DEVMETHOD(agp_set_aperture, agp_via_set_aperture),
347 DEVMETHOD(agp_bind_page, agp_via_bind_page),
348 DEVMETHOD(agp_unbind_page, agp_via_unbind_page),
349 DEVMETHOD(agp_flush_tlb, agp_via_flush_tlb),
350 DEVMETHOD(agp_enable, agp_generic_enable),
351 DEVMETHOD(agp_alloc_memory, agp_generic_alloc_memory),
352 DEVMETHOD(agp_free_memory, agp_generic_free_memory),
353 DEVMETHOD(agp_bind_memory, agp_generic_bind_memory),
354 DEVMETHOD(agp_unbind_memory, agp_generic_unbind_memory),
355
356 { 0, 0 }
357};
358
359static driver_t agp_via_driver = {
360 "agp",
361 agp_via_methods,
362 sizeof(struct agp_via_softc),
363};
364
365static devclass_t agp_devclass;
366
367DRIVER_MODULE(agp_via, pci, agp_via_driver, agp_devclass, 0, 0);
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368MODULE_DEPEND(agp_via, agp, 1, 1, 1);
369MODULE_DEPEND(agp_via, pci, 1, 1, 1);