sys/dev/agp/agp_i810.c

   1 /*
   2  * Copyright (c) 2000 Doug Rabson
   3  * Copyright (c) 2000 Ruslan Ermilov
   4  * Copyright (c) 2011 The FreeBSD Foundation
   5  * All rights reserved.
   6  *
   7  * Portions of this software were developed by Konstantin Belousov
   8  * under sponsorship from the FreeBSD Foundation.
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions
  12  * are met:
  13  * 1. Redistributions of source code must retain the above copyright
  14  *    notice, this list of conditions and the following disclaimer.
  15  * 2. Redistributions in binary form must reproduce the above copyright
  16  *    notice, this list of conditions and the following disclaimer in the
  17  *    documentation and/or other materials provided with the distribution.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  20  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  22  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  23  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  24  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  25  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  27  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  28  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  29  * SUCH DAMAGE.
  30  *
  31  * $FreeBSD: src/sys/dev/agp/agp_i810.c,v 1.56 2010/03/12 21:34:23 rnoland Exp $
  32  */
  33
  34 /*
  35  * Fixes for 830/845G support: David Dawes <dawes@xfree86.org>
  36  * 852GM/855GM/865G support added by David Dawes <dawes@xfree86.org>
  37  *
  38  * This is generic Intel GTT handling code, morphed from the AGP
  39  * bridge code.
  40  */
  41
  42 #if 0
  43 #define KTR_AGP_I810    KTR_DEV
  44 #else
  45 #define KTR_AGP_I810    0
  46 #endif
  47
  48 #include <sys/param.h>
  49 #include <sys/systm.h>
  50 #include <sys/malloc.h>
  51 #include <sys/kernel.h>
  52 #include <sys/bus.h>
  53 #include <sys/lock.h>
  54 #include <sys/rman.h>
  55
  56 #include "pcidevs.h"
  57 #include <bus/pci/pcivar.h>
  58 #include <bus/pci/pcireg.h>
  59 #include "agppriv.h"
  60 #include "agpreg.h"
  61 #include <dev/agp/intel-gtt.h>
  62
  63 #include <vm/vm.h>
  64 #include <vm/vm_object.h>
  65 #include <vm/vm_page.h>
  66 #include <vm/vm_pageout.h>
  67 #include <vm/pmap.h>
  68
  69 #include <machine/md_var.h>
  70
  71 #define bus_read_1(r, o) \
  72                    bus_space_read_1((r)->r_bustag, (r)->r_bushandle, (o))
  73 #define bus_read_4(r, o) \
  74                    bus_space_read_4((r)->r_bustag, (r)->r_bushandle, (o))
  75 #define bus_write_4(r, o, v) \
  76                     bus_space_write_4((r)->r_bustag, (r)->r_bushandle, (o), (v))
  77
  78 MALLOC_DECLARE(M_AGP);
  79
  80 struct agp_i810_match;
  81
  82 static int agp_i810_check_active(device_t bridge_dev);
  83 static int agp_i830_check_active(device_t bridge_dev);
  84 static int agp_i915_check_active(device_t bridge_dev);
  85 static int agp_sb_check_active(device_t bridge_dev);
  86
  87 static void agp_82852_set_desc(device_t dev,
  88     const struct agp_i810_match *match);
  89 static void agp_i810_set_desc(device_t dev, const struct agp_i810_match *match);
  90
  91 static void agp_i810_dump_regs(device_t dev);
  92 static void agp_i830_dump_regs(device_t dev);
  93 static void agp_i855_dump_regs(device_t dev);
  94 static void agp_i915_dump_regs(device_t dev);
  95 static void agp_i965_dump_regs(device_t dev);
  96 static void agp_sb_dump_regs(device_t dev);
  97
  98 static int agp_i810_get_stolen_size(device_t dev);
  99 static int agp_i830_get_stolen_size(device_t dev);
 100 static int agp_i915_get_stolen_size(device_t dev);
 101 static int agp_sb_get_stolen_size(device_t dev);
 102
 103 static int agp_i810_get_gtt_mappable_entries(device_t dev);
 104 static int agp_i830_get_gtt_mappable_entries(device_t dev);
 105 static int agp_i915_get_gtt_mappable_entries(device_t dev);
 106
 107 static int agp_i810_get_gtt_total_entries(device_t dev);
 108 static int agp_i965_get_gtt_total_entries(device_t dev);
 109 static int agp_gen5_get_gtt_total_entries(device_t dev);
 110 static int agp_sb_get_gtt_total_entries(device_t dev);
 111
 112 static int agp_i810_install_gatt(device_t dev);
 113 static int agp_i830_install_gatt(device_t dev);
 114
 115 static void agp_i810_deinstall_gatt(device_t dev);
 116 static void agp_i830_deinstall_gatt(device_t dev);
 117
 118 static void agp_i810_install_gtt_pte(device_t dev, u_int index,
 119     vm_offset_t physical, int flags);
 120 static void agp_i830_install_gtt_pte(device_t dev, u_int index,
 121     vm_offset_t physical, int flags);
 122 static void agp_i915_install_gtt_pte(device_t dev, u_int index,
 123     vm_offset_t physical, int flags);
 124 static void agp_i965_install_gtt_pte(device_t dev, u_int index,
 125     vm_offset_t physical, int flags);
 126 static void agp_g4x_install_gtt_pte(device_t dev, u_int index,
 127     vm_offset_t physical, int flags);
 128 static void agp_sb_install_gtt_pte(device_t dev, u_int index,
 129     vm_offset_t physical, int flags);
 130
 131 static void agp_i810_write_gtt(device_t dev, u_int index, uint32_t pte);
 132 static void agp_i915_write_gtt(device_t dev, u_int index, uint32_t pte);
 133 static void agp_i965_write_gtt(device_t dev, u_int index, uint32_t pte);
 134 static void agp_g4x_write_gtt(device_t dev, u_int index, uint32_t pte);
 135 static void agp_sb_write_gtt(device_t dev, u_int index, uint32_t pte);
 136
 137 static u_int32_t agp_i810_read_gtt_pte(device_t dev, u_int index);
 138 static u_int32_t agp_i915_read_gtt_pte(device_t dev, u_int index);
 139 static u_int32_t agp_i965_read_gtt_pte(device_t dev, u_int index);
 140 static u_int32_t agp_g4x_read_gtt_pte(device_t dev, u_int index);
 141
 142 static vm_paddr_t agp_i810_read_gtt_pte_paddr(device_t dev, u_int index);
 143 static vm_paddr_t agp_i915_read_gtt_pte_paddr(device_t dev, u_int index);
 144 static vm_paddr_t agp_sb_read_gtt_pte_paddr(device_t dev, u_int index);
 145
 146 static int agp_i810_set_aperture(device_t dev, u_int32_t aperture);
 147 static int agp_i830_set_aperture(device_t dev, u_int32_t aperture);
 148 static int agp_i915_set_aperture(device_t dev, u_int32_t aperture);
 149
 150 static int agp_i810_chipset_flush_setup(device_t dev);
 151 static int agp_i915_chipset_flush_setup(device_t dev);
 152 static int agp_i965_chipset_flush_setup(device_t dev);
 153
 154 static void agp_i810_chipset_flush_teardown(device_t dev);
 155 static void agp_i915_chipset_flush_teardown(device_t dev);
 156 static void agp_i965_chipset_flush_teardown(device_t dev);
 157
 158 static void agp_i810_chipset_flush(device_t dev);
 159 static void agp_i830_chipset_flush(device_t dev);
 160 static void agp_i915_chipset_flush(device_t dev);
 161
 162 enum {
 163         CHIP_I810,      /* i810/i815 */
 164         CHIP_I830,      /* 830M/845G */
 165         CHIP_I855,      /* 852GM/855GM/865G */
 166         CHIP_I915,      /* 915G/915GM */
 167         CHIP_I965,      /* G965 */
 168         CHIP_G33,       /* G33/Q33/Q35 */
 169         CHIP_IGD,       /* Pineview */
 170         CHIP_G4X,       /* G45/Q45 */
 171         CHIP_SB,        /* SandyBridge */
 172 };
 173
 174 /* The i810 through i855 have the registers at BAR 1, and the GATT gets
 175  * allocated by us.  The i915 has registers in BAR 0 and the GATT is at the
 176  * start of the stolen memory, and should only be accessed by the OS through
 177  * BAR 3.  The G965 has registers and GATT in the same BAR (0) -- first 512KB
 178  * is registers, second 512KB is GATT.
 179  */
 180 static struct resource_spec agp_i810_res_spec[] = {
 181         { SYS_RES_MEMORY, AGP_I810_MMADR, RF_ACTIVE | RF_SHAREABLE },
 182         { -1, 0 }
 183 };
 184
 185 static struct resource_spec agp_i915_res_spec[] = {
 186         { SYS_RES_MEMORY, AGP_I915_MMADR, RF_ACTIVE | RF_SHAREABLE },
 187         { SYS_RES_MEMORY, AGP_I915_GTTADR, RF_ACTIVE | RF_SHAREABLE },
 188         { -1, 0 }
 189 };
 190
 191 static struct resource_spec agp_i965_res_spec[] = {
 192         { SYS_RES_MEMORY, AGP_I965_GTTMMADR, RF_ACTIVE | RF_SHAREABLE },
 193         { -1, 0 }
 194 };
 195
 196 static struct resource_spec agp_g4x_res_spec[] = {
 197         { SYS_RES_MEMORY, AGP_G4X_MMADR, RF_ACTIVE | RF_SHAREABLE },
 198         { SYS_RES_MEMORY, AGP_G4X_GTTADR, RF_ACTIVE | RF_SHAREABLE },
 199         { -1, 0 }
 200 };
 201
 202 struct agp_i810_softc {
 203         struct agp_softc agp;
 204         u_int32_t initial_aperture;     /* aperture size at startup */
 205         struct agp_gatt *gatt;
 206         u_int32_t dcache_size;          /* i810 only */
 207         u_int32_t stolen;               /* number of i830/845 gtt
 208                                            entries for stolen memory */
 209         u_int stolen_size;              /* BIOS-reserved graphics memory */
 210         u_int gtt_total_entries;        /* Total number of gtt ptes */
 211         u_int gtt_mappable_entries;     /* Number of gtt ptes mappable by CPU */
 212         device_t bdev;                  /* bridge device */
 213         void *argb_cursor;              /* contigmalloc area for ARGB cursor */
 214         struct resource *sc_res[2];
 215         const struct agp_i810_match *match;
 216         int sc_flush_page_rid;
 217         struct resource *sc_flush_page_res;
 218         void *sc_flush_page_vaddr;
 219         int sc_bios_allocated_flush_page;
 220 };
 221
 222 static device_t intel_agp;
 223
 224 struct agp_i810_driver {
 225         int chiptype;
 226         int gen;
 227         int busdma_addr_mask_sz;
 228         struct resource_spec *res_spec;
 229         int (*check_active)(device_t);
 230         void (*set_desc)(device_t, const struct agp_i810_match *);
 231         void (*dump_regs)(device_t);
 232         int (*get_stolen_size)(device_t);
 233         int (*get_gtt_total_entries)(device_t);
 234         int (*get_gtt_mappable_entries)(device_t);
 235         int (*install_gatt)(device_t);
 236         void (*deinstall_gatt)(device_t);
 237         void (*write_gtt)(device_t, u_int, uint32_t);
 238         void (*install_gtt_pte)(device_t, u_int, vm_offset_t, int);
 239         u_int32_t (*read_gtt_pte)(device_t, u_int);
 240         vm_paddr_t (*read_gtt_pte_paddr)(device_t , u_int);
 241         int (*set_aperture)(device_t, u_int32_t);
 242         int (*chipset_flush_setup)(device_t);
 243         void (*chipset_flush_teardown)(device_t);
 244         void (*chipset_flush)(device_t);
 245 };
 246
 247 static struct {
 248         struct intel_gtt base;
 249 } intel_private;
 250
 251 static const struct agp_i810_driver agp_i810_i810_driver = {
 252         .chiptype = CHIP_I810,
 253         .gen = 1,
 254         .busdma_addr_mask_sz = 32,
 255         .res_spec = agp_i810_res_spec,
 256         .check_active = agp_i810_check_active,
 257         .set_desc = agp_i810_set_desc,
 258         .dump_regs = agp_i810_dump_regs,
 259         .get_stolen_size = agp_i810_get_stolen_size,
 260         .get_gtt_mappable_entries = agp_i810_get_gtt_mappable_entries,
 261         .get_gtt_total_entries = agp_i810_get_gtt_total_entries,
 262         .install_gatt = agp_i810_install_gatt,
 263         .deinstall_gatt = agp_i810_deinstall_gatt,
 264         .write_gtt = agp_i810_write_gtt,
 265         .install_gtt_pte = agp_i810_install_gtt_pte,
 266         .read_gtt_pte = agp_i810_read_gtt_pte,
 267         .read_gtt_pte_paddr = agp_i810_read_gtt_pte_paddr,
 268         .set_aperture = agp_i810_set_aperture,
 269         .chipset_flush_setup = agp_i810_chipset_flush_setup,
 270         .chipset_flush_teardown = agp_i810_chipset_flush_teardown,
 271         .chipset_flush = agp_i810_chipset_flush,
 272 };
 273
 274 static const struct agp_i810_driver agp_i810_i815_driver = {
 275         .chiptype = CHIP_I810,
 276         .gen = 2,
 277         .busdma_addr_mask_sz = 32,
 278         .res_spec = agp_i810_res_spec,
 279         .check_active = agp_i810_check_active,
 280         .set_desc = agp_i810_set_desc,
 281         .dump_regs = agp_i810_dump_regs,
 282         .get_stolen_size = agp_i810_get_stolen_size,
 283         .get_gtt_mappable_entries = agp_i830_get_gtt_mappable_entries,
 284         .get_gtt_total_entries = agp_i810_get_gtt_total_entries,
 285         .install_gatt = agp_i810_install_gatt,
 286         .deinstall_gatt = agp_i810_deinstall_gatt,
 287         .write_gtt = agp_i810_write_gtt,
 288         .install_gtt_pte = agp_i810_install_gtt_pte,
 289         .read_gtt_pte = agp_i810_read_gtt_pte,
 290         .read_gtt_pte_paddr = agp_i810_read_gtt_pte_paddr,
 291         .set_aperture = agp_i810_set_aperture,
 292         .chipset_flush_setup = agp_i810_chipset_flush_setup,
 293         .chipset_flush_teardown = agp_i810_chipset_flush_teardown,
 294         .chipset_flush = agp_i830_chipset_flush,
 295 };
 296
 297 static const struct agp_i810_driver agp_i810_i830_driver = {
 298         .chiptype = CHIP_I830,
 299         .gen = 2,
 300         .busdma_addr_mask_sz = 32,
 301         .res_spec = agp_i810_res_spec,
 302         .check_active = agp_i830_check_active,
 303         .set_desc = agp_i810_set_desc,
 304         .dump_regs = agp_i830_dump_regs,
 305         .get_stolen_size = agp_i830_get_stolen_size,
 306         .get_gtt_mappable_entries = agp_i830_get_gtt_mappable_entries,
 307         .get_gtt_total_entries = agp_i810_get_gtt_total_entries,
 308         .install_gatt = agp_i830_install_gatt,
 309         .deinstall_gatt = agp_i830_deinstall_gatt,
 310         .write_gtt = agp_i810_write_gtt,
 311         .install_gtt_pte = agp_i830_install_gtt_pte,
 312         .read_gtt_pte = agp_i810_read_gtt_pte,
 313         .read_gtt_pte_paddr = agp_i810_read_gtt_pte_paddr,
 314         .set_aperture = agp_i830_set_aperture,
 315         .chipset_flush_setup = agp_i810_chipset_flush_setup,
 316         .chipset_flush_teardown = agp_i810_chipset_flush_teardown,
 317         .chipset_flush = agp_i830_chipset_flush,
 318 };
 319
 320 static const struct agp_i810_driver agp_i810_i855_driver = {
 321         .chiptype = CHIP_I855,
 322         .gen = 2,
 323         .busdma_addr_mask_sz = 32,
 324         .res_spec = agp_i810_res_spec,
 325         .check_active = agp_i830_check_active,
 326         .set_desc = agp_82852_set_desc,
 327         .dump_regs = agp_i855_dump_regs,
 328         .get_stolen_size = agp_i915_get_stolen_size,
 329         .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
 330         .get_gtt_total_entries = agp_i810_get_gtt_total_entries,
 331         .install_gatt = agp_i830_install_gatt,
 332         .deinstall_gatt = agp_i830_deinstall_gatt,
 333         .write_gtt = agp_i810_write_gtt,
 334         .install_gtt_pte = agp_i830_install_gtt_pte,
 335         .read_gtt_pte = agp_i810_read_gtt_pte,
 336         .read_gtt_pte_paddr = agp_i810_read_gtt_pte_paddr,
 337         .set_aperture = agp_i830_set_aperture,
 338         .chipset_flush_setup = agp_i810_chipset_flush_setup,
 339         .chipset_flush_teardown = agp_i810_chipset_flush_teardown,
 340         .chipset_flush = agp_i830_chipset_flush,
 341 };
 342
 343 static const struct agp_i810_driver agp_i810_i865_driver = {
 344         .chiptype = CHIP_I855,
 345         .gen = 2,
 346         .busdma_addr_mask_sz = 32,
 347         .res_spec = agp_i810_res_spec,
 348         .check_active = agp_i830_check_active,
 349         .set_desc = agp_i810_set_desc,
 350         .dump_regs = agp_i855_dump_regs,
 351         .get_stolen_size = agp_i915_get_stolen_size,
 352         .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
 353         .get_gtt_total_entries = agp_i810_get_gtt_total_entries,
 354         .install_gatt = agp_i830_install_gatt,
 355         .deinstall_gatt = agp_i830_deinstall_gatt,
 356         .write_gtt = agp_i810_write_gtt,
 357         .install_gtt_pte = agp_i830_install_gtt_pte,
 358         .read_gtt_pte = agp_i810_read_gtt_pte,
 359         .read_gtt_pte_paddr = agp_i810_read_gtt_pte_paddr,
 360         .set_aperture = agp_i915_set_aperture,
 361         .chipset_flush_setup = agp_i810_chipset_flush_setup,
 362         .chipset_flush_teardown = agp_i810_chipset_flush_teardown,
 363         .chipset_flush = agp_i830_chipset_flush,
 364 };
 365
 366 static const struct agp_i810_driver agp_i810_i915_driver = {
 367         .chiptype = CHIP_I915,
 368         .gen = 3,
 369         .busdma_addr_mask_sz = 32,
 370         .res_spec = agp_i915_res_spec,
 371         .check_active = agp_i915_check_active,
 372         .set_desc = agp_i810_set_desc,
 373         .dump_regs = agp_i915_dump_regs,
 374         .get_stolen_size = agp_i915_get_stolen_size,
 375         .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
 376         .get_gtt_total_entries = agp_i810_get_gtt_total_entries,
 377         .install_gatt = agp_i830_install_gatt,
 378         .deinstall_gatt = agp_i830_deinstall_gatt,
 379         .write_gtt = agp_i915_write_gtt,
 380         .install_gtt_pte = agp_i915_install_gtt_pte,
 381         .read_gtt_pte = agp_i915_read_gtt_pte,
 382         .read_gtt_pte_paddr = agp_i915_read_gtt_pte_paddr,
 383         .set_aperture = agp_i915_set_aperture,
 384         .chipset_flush_setup = agp_i915_chipset_flush_setup,
 385         .chipset_flush_teardown = agp_i915_chipset_flush_teardown,
 386         .chipset_flush = agp_i915_chipset_flush,
 387 };
 388
 389 static const struct agp_i810_driver agp_i810_g965_driver = {
 390         .chiptype = CHIP_I965,
 391         .gen = 4,
 392         .busdma_addr_mask_sz = 36,
 393         .res_spec = agp_i965_res_spec,
 394         .check_active = agp_i915_check_active,
 395         .set_desc = agp_i810_set_desc,
 396         .dump_regs = agp_i965_dump_regs,
 397         .get_stolen_size = agp_i915_get_stolen_size,
 398         .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
 399         .get_gtt_total_entries = agp_i965_get_gtt_total_entries,
 400         .install_gatt = agp_i830_install_gatt,
 401         .deinstall_gatt = agp_i830_deinstall_gatt,
 402         .write_gtt = agp_i965_write_gtt,
 403         .install_gtt_pte = agp_i965_install_gtt_pte,
 404         .read_gtt_pte = agp_i965_read_gtt_pte,
 405         .read_gtt_pte_paddr = agp_i915_read_gtt_pte_paddr,
 406         .set_aperture = agp_i915_set_aperture,
 407         .chipset_flush_setup = agp_i965_chipset_flush_setup,
 408         .chipset_flush_teardown = agp_i965_chipset_flush_teardown,
 409         .chipset_flush = agp_i915_chipset_flush,
 410 };
 411
 412 static const struct agp_i810_driver agp_i810_g33_driver = {
 413         .chiptype = CHIP_G33,
 414         .gen = 3,
 415         .busdma_addr_mask_sz = 36,
 416         .res_spec = agp_i915_res_spec,
 417         .check_active = agp_i915_check_active,
 418         .set_desc = agp_i810_set_desc,
 419         .dump_regs = agp_i965_dump_regs,
 420         .get_stolen_size = agp_i915_get_stolen_size,
 421         .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
 422         .get_gtt_total_entries = agp_i965_get_gtt_total_entries,
 423         .install_gatt = agp_i830_install_gatt,
 424         .deinstall_gatt = agp_i830_deinstall_gatt,
 425         .write_gtt = agp_i915_write_gtt,
 426         .install_gtt_pte = agp_i915_install_gtt_pte,
 427         .read_gtt_pte = agp_i915_read_gtt_pte,
 428         .read_gtt_pte_paddr = agp_i915_read_gtt_pte_paddr,
 429         .set_aperture = agp_i915_set_aperture,
 430         .chipset_flush_setup = agp_i965_chipset_flush_setup,
 431         .chipset_flush_teardown = agp_i965_chipset_flush_teardown,
 432         .chipset_flush = agp_i915_chipset_flush,
 433 };
 434
 435 static const struct agp_i810_driver agp_i810_igd_driver = {
 436         .chiptype = CHIP_IGD,
 437         .gen = 3,
 438         .busdma_addr_mask_sz = 36,
 439         .res_spec = agp_i915_res_spec,
 440         .check_active = agp_i915_check_active,
 441         .set_desc = agp_i810_set_desc,
 442         .dump_regs = agp_i915_dump_regs,
 443         .get_stolen_size = agp_i915_get_stolen_size,
 444         .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
 445         .get_gtt_total_entries = agp_i965_get_gtt_total_entries,
 446         .install_gatt = agp_i830_install_gatt,
 447         .deinstall_gatt = agp_i830_deinstall_gatt,
 448         .write_gtt = agp_i915_write_gtt,
 449         .install_gtt_pte = agp_i915_install_gtt_pte,
 450         .read_gtt_pte = agp_i915_read_gtt_pte,
 451         .read_gtt_pte_paddr = agp_i915_read_gtt_pte_paddr,
 452         .set_aperture = agp_i915_set_aperture,
 453         .chipset_flush_setup = agp_i965_chipset_flush_setup,
 454         .chipset_flush_teardown = agp_i965_chipset_flush_teardown,
 455         .chipset_flush = agp_i915_chipset_flush,
 456 };
 457
 458 static const struct agp_i810_driver agp_i810_g4x_driver = {
 459         .chiptype = CHIP_G4X,
 460         .gen = 5,
 461         .busdma_addr_mask_sz = 36,
 462         .res_spec = agp_i965_res_spec,
 463         .check_active = agp_i915_check_active,
 464         .set_desc = agp_i810_set_desc,
 465         .dump_regs = agp_i965_dump_regs,
 466         .get_stolen_size = agp_i915_get_stolen_size,
 467         .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
 468         .get_gtt_total_entries = agp_gen5_get_gtt_total_entries,
 469         .install_gatt = agp_i830_install_gatt,
 470         .deinstall_gatt = agp_i830_deinstall_gatt,
 471         .write_gtt = agp_g4x_write_gtt,
 472         .install_gtt_pte = agp_g4x_install_gtt_pte,
 473         .read_gtt_pte = agp_g4x_read_gtt_pte,
 474         .read_gtt_pte_paddr = agp_i915_read_gtt_pte_paddr,
 475         .set_aperture = agp_i915_set_aperture,
 476         .chipset_flush_setup = agp_i965_chipset_flush_setup,
 477         .chipset_flush_teardown = agp_i965_chipset_flush_teardown,
 478         .chipset_flush = agp_i915_chipset_flush,
 479 };
 480
 481 static const struct agp_i810_driver agp_i810_sb_driver = {
 482         .chiptype = CHIP_SB,
 483         .gen = 6,
 484         .busdma_addr_mask_sz = 40,
 485         .res_spec = agp_g4x_res_spec,
 486         .check_active = agp_sb_check_active,
 487         .set_desc = agp_i810_set_desc,
 488         .dump_regs = agp_sb_dump_regs,
 489         .get_stolen_size = agp_sb_get_stolen_size,
 490         .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
 491         .get_gtt_total_entries = agp_sb_get_gtt_total_entries,
 492         .install_gatt = agp_i830_install_gatt,
 493         .deinstall_gatt = agp_i830_deinstall_gatt,
 494         .write_gtt = agp_sb_write_gtt,
 495         .install_gtt_pte = agp_sb_install_gtt_pte,
 496         .read_gtt_pte = agp_g4x_read_gtt_pte,
 497         .read_gtt_pte_paddr = agp_sb_read_gtt_pte_paddr,
 498         .set_aperture = agp_i915_set_aperture,
 499         .chipset_flush_setup = agp_i810_chipset_flush_setup,
 500         .chipset_flush_teardown = agp_i810_chipset_flush_teardown,
 501         .chipset_flush = agp_i810_chipset_flush,
 502 };
 503
 504 static const struct agp_i810_driver valleyview_gtt_driver = {
 505         .chiptype = CHIP_SB,
 506         .gen = 7,
 507         .busdma_addr_mask_sz = 40,
 508         .res_spec = agp_g4x_res_spec,
 509         .check_active = agp_sb_check_active,
 510         .set_desc = agp_i810_set_desc,
 511         .dump_regs = agp_sb_dump_regs,
 512         .get_stolen_size = agp_sb_get_stolen_size,
 513         .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
 514         .get_gtt_total_entries = agp_sb_get_gtt_total_entries,
 515         .install_gatt = agp_i830_install_gatt,
 516         .deinstall_gatt = agp_i830_deinstall_gatt,
 517         .write_gtt = agp_sb_write_gtt,
 518         .install_gtt_pte = agp_sb_install_gtt_pte,
 519         .read_gtt_pte = agp_g4x_read_gtt_pte,
 520         .read_gtt_pte_paddr = agp_sb_read_gtt_pte_paddr,
 521         .set_aperture = agp_i915_set_aperture,
 522         .chipset_flush_setup = agp_i810_chipset_flush_setup,
 523         .chipset_flush_teardown = agp_i810_chipset_flush_teardown,
 524         .chipset_flush = agp_i810_chipset_flush,
 525 };
 526
 527 /* For adding new devices, devid is the id of the graphics controller
 528  * (pci:0:2:0, for example).  The placeholder (usually at pci:0:2:1) for the
 529  * second head should never be added.  The bridge_offset is the offset to
 530  * subtract from devid to get the id of the hostb that the device is on.
 531  */
 532 static const struct agp_i810_match {
 533         uint16_t devid;
 534         char *name;
 535         const struct agp_i810_driver *driver;
 536 } agp_i810_matches[] = {
 537         {
 538                 .devid = 0x7121,
 539                 .name = "Intel 82810 (i810 GMCH) SVGA controller",
 540                 .driver = &agp_i810_i810_driver
 541         },
 542         {
 543                 .devid = 0x7123,
 544                 .name = "Intel 82810-DC100 (i810-DC100 GMCH) SVGA controller",
 545                 .driver = &agp_i810_i810_driver
 546         },
 547         {
 548                 .devid = 0x7125,
 549                 .name = "Intel 82810E (i810E GMCH) SVGA controller",
 550                 .driver = &agp_i810_i810_driver
 551         },
 552         {
 553                 .devid = 0x1132,
 554                 .name = "Intel 82815 (i815 GMCH) SVGA controller",
 555                 .driver = &agp_i810_i815_driver
 556         },
 557         {
 558                 .devid = 0x3577,
 559                 .name = "Intel 82830M (830M GMCH) SVGA controller",
 560                 .driver = &agp_i810_i830_driver
 561         },
 562         {
 563                 .devid = 0x2562,
 564                 .name = "Intel 82845M (845M GMCH) SVGA controller",
 565                 .driver = &agp_i810_i830_driver
 566         },
 567         {
 568                 .devid = 0x3582,
 569                 .name = "Intel 82852/855GM SVGA controller",
 570                 .driver = &agp_i810_i855_driver
 571         },
 572         {
 573                 .devid = 0x2572,
 574                 .name = "Intel 82865G (865G GMCH) SVGA controller",
 575                 .driver = &agp_i810_i865_driver
 576         },
 577         {
 578                 .devid = 0x2582,
 579                 .name = "Intel 82915G (915G GMCH) SVGA controller",
 580                 .driver = &agp_i810_i915_driver
 581         },
 582         {
 583                 .devid = 0x258A,
 584                 .name = "Intel E7221 SVGA controller",
 585                 .driver = &agp_i810_i915_driver
 586         },
 587         {
 588                 .devid = 0x2592,
 589                 .name = "Intel 82915GM (915GM GMCH) SVGA controller",
 590                 .driver = &agp_i810_i915_driver
 591         },
 592         {
 593                 .devid = 0x2772,
 594                 .name = "Intel 82945G (945G GMCH) SVGA controller",
 595                 .driver = &agp_i810_i915_driver
 596         },
 597         {
 598                 .devid = 0x27A2,
 599                 .name = "Intel 82945GM (945GM GMCH) SVGA controller",
 600                 .driver = &agp_i810_i915_driver
 601         },
 602         {
 603                 .devid = 0x27AE,
 604                 .name = "Intel 945GME SVGA controller",
 605                 .driver = &agp_i810_i915_driver
 606         },
 607         {
 608                 .devid = 0x2972,
 609                 .name = "Intel 946GZ SVGA controller",
 610                 .driver = &agp_i810_g965_driver
 611         },
 612         {
 613                 .devid = 0x2982,
 614                 .name = "Intel G965 SVGA controller",
 615                 .driver = &agp_i810_g965_driver
 616         },
 617         {
 618                 .devid = 0x2992,
 619                 .name = "Intel Q965 SVGA controller",
 620                 .driver = &agp_i810_g965_driver
 621         },
 622         {
 623                 .devid = 0x29A2,
 624                 .name = "Intel G965 SVGA controller",
 625                 .driver = &agp_i810_g965_driver
 626         },
 627         {
 628                 .devid = 0x29B2,
 629                 .name = "Intel Q35 SVGA controller",
 630                 .driver = &agp_i810_g33_driver
 631         },
 632         {
 633                 .devid = 0x29C2,
 634                 .name = "Intel G33 SVGA controller",
 635                 .driver = &agp_i810_g33_driver
 636         },
 637         {
 638                 .devid = 0x29D2,
 639                 .name = "Intel Q33 SVGA controller",
 640                 .driver = &agp_i810_g33_driver
 641         },
 642         {
 643                 .devid = 0xA001,
 644                 .name = "Intel Pineview SVGA controller",
 645                 .driver = &agp_i810_igd_driver
 646         },
 647         {
 648                 .devid = 0xA011,
 649                 .name = "Intel Pineview (M) SVGA controller",
 650                 .driver = &agp_i810_igd_driver
 651         },
 652         {
 653                 .devid = 0x2A02,
 654                 .name = "Intel GM965 SVGA controller",
 655                 .driver = &agp_i810_g965_driver
 656         },
 657         {
 658                 .devid = 0x2A12,
 659                 .name = "Intel GME965 SVGA controller",
 660                 .driver = &agp_i810_g965_driver
 661         },
 662         {
 663                 .devid = 0x2A42,
 664                 .name = "Intel GM45 SVGA controller",
 665                 .driver = &agp_i810_g4x_driver
 666         },
 667         {
 668                 .devid = 0x2E02,
 669                 .name = "Intel Eaglelake SVGA controller",
 670                 .driver = &agp_i810_g4x_driver
 671         },
 672         {
 673                 .devid = 0x2E12,
 674                 .name = "Intel Q45 SVGA controller",
 675                 .driver = &agp_i810_g4x_driver
 676         },
 677         {
 678                 .devid = 0x2E22,
 679                 .name = "Intel G45 SVGA controller",
 680                 .driver = &agp_i810_g4x_driver
 681         },
 682         {
 683                 .devid = 0x2E32,
 684                 .name = "Intel G41 SVGA controller",
 685                 .driver = &agp_i810_g4x_driver
 686         },
 687         {
 688                 .devid = 0x0042,
 689                 .name = "Intel Ironlake (D) SVGA controller",
 690                 .driver = &agp_i810_g4x_driver
 691         },
 692         {
 693                 .devid = 0x0046,
 694                 .name = "Intel Ironlake (M) SVGA controller",
 695                 .driver = &agp_i810_g4x_driver
 696         },
 697         {
 698                 .devid = 0x0102,
 699                 .name = "SandyBridge desktop GT1 IG",
 700                 .driver = &agp_i810_sb_driver
 701         },
 702         {
 703                 .devid = 0x0112,
 704                 .name = "SandyBridge desktop GT2 IG",
 705                 .driver = &agp_i810_sb_driver
 706         },
 707         {
 708                 .devid = 0x0122,
 709                 .name = "SandyBridge desktop GT2+ IG",
 710                 .driver = &agp_i810_sb_driver
 711         },
 712         {
 713                 .devid = 0x0106,
 714                 .name = "SandyBridge mobile GT1 IG",
 715                 .driver = &agp_i810_sb_driver
 716         },
 717         {
 718                 .devid = 0x0116,
 719                 .name = "SandyBridge mobile GT2 IG",
 720                 .driver = &agp_i810_sb_driver
 721         },
 722         {
 723                 .devid = 0x0126,
 724                 .name = "SandyBridge mobile GT2+ IG",
 725                 .driver = &agp_i810_sb_driver
 726         },
 727         {
 728                 .devid = 0x010a,
 729                 .name = "SandyBridge server IG",
 730                 .driver = &agp_i810_sb_driver
 731         },
 732         {
 733                 .devid = 0x0152,
 734                 .name = "IvyBridge desktop GT1 IG",
 735                 .driver = &agp_i810_sb_driver
 736         },
 737         {
 738                 .devid = 0x0162,
 739                 .name = "IvyBridge desktop GT2 IG",
 740                 .driver = &agp_i810_sb_driver
 741         },
 742         {
 743                 .devid = 0x0156,
 744                 .name = "IvyBridge mobile GT1 IG",
 745                 .driver = &agp_i810_sb_driver
 746         },
 747         {
 748                 .devid = 0x0166,
 749                 .name = "IvyBridge mobile GT2 IG",
 750                 .driver = &agp_i810_sb_driver
 751         },
 752         {
 753                 .devid = 0x015a,
 754                 .name = "IvyBridge server GT1 IG",
 755                 .driver = &agp_i810_sb_driver
 756         },
 757         {
 758                 .devid = 0x016a,
 759                 .name = "IvyBridge server GT2 IG",
 760                 .driver = &agp_i810_sb_driver
 761         },
 762         {
 763                 .devid = 0x0f30,
 764                 .name = "ValleyView",
 765                 .driver = &valleyview_gtt_driver
 766         },
 767         {
 768                 .devid = 0x0402,
 769                 .name = "Haswell desktop GT1 IG",
 770                 .driver = &agp_i810_sb_driver
 771         },
 772         {
 773                 .devid = 0x0412,
 774                 .name = "Haswell desktop GT2 IG",
 775                 .driver = &agp_i810_sb_driver
 776         },
 777         {       0x0422, "Haswell", &agp_i810_sb_driver },
 778         {
 779                 .devid = 0x0406,
 780                 .name = "Haswell mobile GT1 IG",
 781                 .driver = &agp_i810_sb_driver
 782         },
 783         {
 784                 .devid = 0x0416,
 785                 .name = "Haswell mobile GT2 IG",
 786                 .driver = &agp_i810_sb_driver
 787         },
 788         {       0x0426, "Haswell", &agp_i810_sb_driver },
 789         {
 790                 .devid = 0x040a,
 791                 .name = "Haswell server GT1 IG",
 792                 .driver = &agp_i810_sb_driver
 793         },
 794         {
 795                 .devid = 0x041a,
 796                 .name = "Haswell server GT2 IG",
 797                 .driver = &agp_i810_sb_driver
 798         },
 799         {       0x042a, "Haswell", &agp_i810_sb_driver },
 800         {       0x0c02, "Haswell", &agp_i810_sb_driver },
 801         {       0x0c12, "Haswell", &agp_i810_sb_driver },
 802         {       0x0c22, "Haswell", &agp_i810_sb_driver },
 803         {       0x0c06, "Haswell", &agp_i810_sb_driver },
 804         {
 805                 .devid = 0x0c16,
 806                 .name = "Haswell SDV",
 807                 .driver = &agp_i810_sb_driver
 808         },
 809         {       0x0c26, "Haswell", &agp_i810_sb_driver },
 810         {       0x0c0a, "Haswell", &agp_i810_sb_driver },
 811         {       0x0c1a, "Haswell", &agp_i810_sb_driver },
 812         {       0x0c2a, "Haswell", &agp_i810_sb_driver },
 813         {       0x0a02, "Haswell", &agp_i810_sb_driver },
 814         {       0x0a12, "Haswell", &agp_i810_sb_driver },
 815         {       0x0a22, "Haswell", &agp_i810_sb_driver },
 816         {       0x0a06, "Haswell", &agp_i810_sb_driver },
 817         {       0x0a16, "Haswell", &agp_i810_sb_driver },
 818         {       0x0a26, "Haswell", &agp_i810_sb_driver },
 819         {       0x0a0a, "Haswell", &agp_i810_sb_driver },
 820         {       0x0a1a, "Haswell", &agp_i810_sb_driver },
 821         {       0x0a2a, "Haswell", &agp_i810_sb_driver },
 822         {       0x0d12, "Haswell", &agp_i810_sb_driver },
 823         {       0x0d22, "Haswell", &agp_i810_sb_driver },
 824         {       0x0d32, "Haswell", &agp_i810_sb_driver },
 825         {       0x0d16, "Haswell", &agp_i810_sb_driver },
 826         {       0x0d26, "Haswell", &agp_i810_sb_driver },
 827         {       0x0d36, "Haswell", &agp_i810_sb_driver },
 828         {       0x0d1a, "Haswell", &agp_i810_sb_driver },
 829         {       0x0d2a, "Haswell", &agp_i810_sb_driver },
 830         {       0x0d3a, "Haswell", &agp_i810_sb_driver },
 831         {
 832                 .devid = 0,
 833         }
 834 };
 835
 836 static const struct agp_i810_match*
 837 agp_i810_match(device_t dev)
 838 {
 839         int i, devid;
 840
 841         if (pci_get_vendor(dev) != PCI_VENDOR_INTEL)
 842                 return (NULL);
 843
 844         devid = pci_get_device(dev);
 845         for (i = 0; agp_i810_matches[i].devid != 0; i++) {
 846                 if (agp_i810_matches[i].devid == devid)
 847                         break;
 848         }
 849         if (agp_i810_matches[i].devid == 0)
 850                 return (NULL);
 851         else
 852                 return (&agp_i810_matches[i]);
 853 }
 854
 855 /*
 856  * Find bridge device.
 857  */
 858 static device_t
 859 agp_i810_find_bridge(device_t dev)
 860 {
 861
 862         return (pci_find_dbsf(0, 0, 0, 0));
 863 }
 864
 865 static void
 866 agp_i810_identify(driver_t *driver, device_t parent)
 867 {
 868
 869         if (device_find_child(parent, "agp", -1) == NULL &&
 870             agp_i810_match(parent))
 871                 device_add_child(parent, "agp", -1);
 872 }
 873
 874 static int
 875 agp_i810_check_active(device_t bridge_dev)
 876 {
 877         u_int8_t smram;
 878
 879         smram = pci_read_config(bridge_dev, AGP_I810_SMRAM, 1);
 880         if ((smram & AGP_I810_SMRAM_GMS) == AGP_I810_SMRAM_GMS_DISABLED)
 881                 return (ENXIO);
 882         return (0);
 883 }
 884
 885 static int
 886 agp_i830_check_active(device_t bridge_dev)
 887 {
 888         int gcc1;
 889
 890         gcc1 = pci_read_config(bridge_dev, AGP_I830_GCC1, 1);
 891         if ((gcc1 & AGP_I830_GCC1_DEV2) == AGP_I830_GCC1_DEV2_DISABLED)
 892                 return (ENXIO);
 893         return (0);
 894 }
 895
 896 static int
 897 agp_i915_check_active(device_t bridge_dev)
 898 {
 899         int deven;
 900
 901         deven = pci_read_config(bridge_dev, AGP_I915_DEVEN, 4);
 902         if ((deven & AGP_I915_DEVEN_D2F0) == AGP_I915_DEVEN_D2F0_DISABLED)
 903                 return (ENXIO);
 904         return (0);
 905 }
 906
 907 static int
 908 agp_sb_check_active(device_t bridge_dev)
 909 {
 910         int deven;
 911
 912         deven = pci_read_config(bridge_dev, AGP_I915_DEVEN, 4);
 913         if ((deven & AGP_SB_DEVEN_D2EN) == AGP_SB_DEVEN_D2EN_DISABLED)
 914                 return (ENXIO);
 915         return (0);
 916 }
 917
 918 static void
 919 agp_82852_set_desc(device_t dev, const struct agp_i810_match *match)
 920 {
 921
 922         switch (pci_read_config(dev, AGP_I85X_CAPID, 1)) {
 923         case AGP_I855_GME:
 924                 device_set_desc(dev,
 925                     "Intel 82855GME (855GME GMCH) SVGA controller");
 926                 break;
 927         case AGP_I855_GM:
 928                 device_set_desc(dev,
 929                     "Intel 82855GM (855GM GMCH) SVGA controller");
 930                 break;
 931         case AGP_I852_GME:
 932                 device_set_desc(dev,
 933                     "Intel 82852GME (852GME GMCH) SVGA controller");
 934                 break;
 935         case AGP_I852_GM:
 936                 device_set_desc(dev,
 937                     "Intel 82852GM (852GM GMCH) SVGA controller");
 938                 break;
 939         default:
 940                 device_set_desc(dev,
 941                     "Intel 8285xM (85xGM GMCH) SVGA controller");
 942                 break;
 943         }
 944 }
 945
 946 static void
 947 agp_i810_set_desc(device_t dev, const struct agp_i810_match *match)
 948 {
 949
 950         device_set_desc(dev, match->name);
 951 }
 952
 953 static int
 954 agp_i810_probe(device_t dev)
 955 {
 956         device_t bdev;
 957         const struct agp_i810_match *match;
 958         int err;
 959
 960         if (resource_disabled("agp", device_get_unit(dev)))
 961                 return (ENXIO);
 962         match = agp_i810_match(dev);
 963         if (match == NULL)
 964                 return (ENXIO);
 965
 966         bdev = agp_i810_find_bridge(dev);
 967         if (bdev == NULL) {
 968                 if (bootverbose)
 969                         kprintf("I810: can't find bridge device\n");
 970                 return (ENXIO);
 971         }
 972
 973         /*
 974          * checking whether internal graphics device has been activated.
 975          */
 976         err = match->driver->check_active(bdev);
 977         if (err != 0) {
 978                 if (bootverbose)
 979                         kprintf("i810: disabled, not probing\n");
 980                 return (err);
 981         }
 982
 983         match->driver->set_desc(dev, match);
 984         return (BUS_PROBE_DEFAULT);
 985 }
 986
 987 static void
 988 agp_i810_dump_regs(device_t dev)
 989 {
 990         struct agp_i810_softc *sc = device_get_softc(dev);
 991
 992         device_printf(dev, "AGP_I810_PGTBL_CTL: %08x\n",
 993             bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL));
 994         device_printf(dev, "AGP_I810_MISCC: 0x%04x\n",
 995             pci_read_config(sc->bdev, AGP_I810_MISCC, 2));
 996 }
 997
 998 static void
 999 agp_i830_dump_regs(device_t dev)
1000 {
1001         struct agp_i810_softc *sc = device_get_softc(dev);
1002
1003         device_printf(dev, "AGP_I810_PGTBL_CTL: %08x\n",
1004             bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL));
1005         device_printf(dev, "AGP_I830_GCC1: 0x%02x\n",
1006             pci_read_config(sc->bdev, AGP_I830_GCC1, 1));
1007 }
1008
1009 static void
1010 agp_i855_dump_regs(device_t dev)
1011 {
1012         struct agp_i810_softc *sc = device_get_softc(dev);
1013
1014         device_printf(dev, "AGP_I810_PGTBL_CTL: %08x\n",
1015             bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL));
1016         device_printf(dev, "AGP_I855_GCC1: 0x%02x\n",
1017             pci_read_config(sc->bdev, AGP_I855_GCC1, 1));
1018 }
1019
1020 static void
1021 agp_i915_dump_regs(device_t dev)
1022 {
1023         struct agp_i810_softc *sc = device_get_softc(dev);
1024
1025         device_printf(dev, "AGP_I810_PGTBL_CTL: %08x\n",
1026             bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL));
1027         device_printf(dev, "AGP_I855_GCC1: 0x%02x\n",
1028             pci_read_config(sc->bdev, AGP_I855_GCC1, 1));
1029         device_printf(dev, "AGP_I915_MSAC: 0x%02x\n",
1030             pci_read_config(sc->bdev, AGP_I915_MSAC, 1));
1031 }
1032
1033 static void
1034 agp_i965_dump_regs(device_t dev)
1035 {
1036         struct agp_i810_softc *sc = device_get_softc(dev);
1037
1038         device_printf(dev, "AGP_I965_PGTBL_CTL2: %08x\n",
1039             bus_read_4(sc->sc_res[0], AGP_I965_PGTBL_CTL2));
1040         device_printf(dev, "AGP_I855_GCC1: 0x%02x\n",
1041             pci_read_config(sc->bdev, AGP_I855_GCC1, 1));
1042         device_printf(dev, "AGP_I965_MSAC: 0x%02x\n",
1043             pci_read_config(sc->bdev, AGP_I965_MSAC, 1));
1044 }
1045
1046 static void
1047 agp_sb_dump_regs(device_t dev)
1048 {
1049         struct agp_i810_softc *sc = device_get_softc(dev);
1050
1051         device_printf(dev, "AGP_SNB_GFX_MODE: %08x\n",
1052             bus_read_4(sc->sc_res[0], AGP_SNB_GFX_MODE));
1053         device_printf(dev, "AGP_SNB_GCC1: 0x%04x\n",
1054             pci_read_config(sc->bdev, AGP_SNB_GCC1, 2));
1055 }
1056
1057 static int
1058 agp_i810_get_stolen_size(device_t dev)
1059 {
1060         struct agp_i810_softc *sc;
1061
1062         sc = device_get_softc(dev);
1063         sc->stolen = 0;
1064         sc->stolen_size = 0;
1065         return (0);
1066 }
1067
1068 static int
1069 agp_i830_get_stolen_size(device_t dev)
1070 {
1071         struct agp_i810_softc *sc;
1072         unsigned int gcc1;
1073
1074         sc = device_get_softc(dev);
1075
1076         gcc1 = pci_read_config(sc->bdev, AGP_I830_GCC1, 1);
1077         switch (gcc1 & AGP_I830_GCC1_GMS) {
1078         case AGP_I830_GCC1_GMS_STOLEN_512:
1079                 sc->stolen = (512 - 132) * 1024 / 4096;
1080                 sc->stolen_size = 512 * 1024;
1081                 break;
1082         case AGP_I830_GCC1_GMS_STOLEN_1024:
1083                 sc->stolen = (1024 - 132) * 1024 / 4096;
1084                 sc->stolen_size = 1024 * 1024;
1085                 break;
1086         case AGP_I830_GCC1_GMS_STOLEN_8192:
1087                 sc->stolen = (8192 - 132) * 1024 / 4096;
1088                 sc->stolen_size = 8192 * 1024;
1089                 break;
1090         default:
1091                 sc->stolen = 0;
1092                 device_printf(dev,
1093                     "unknown memory configuration, disabling (GCC1 %x)\n",
1094                     gcc1);
1095                 return (EINVAL);
1096         }
1097         return (0);
1098 }
1099
1100 static int
1101 agp_i915_get_stolen_size(device_t dev)
1102 {
1103         struct agp_i810_softc *sc;
1104         unsigned int gcc1, stolen, gtt_size;
1105
1106         sc = device_get_softc(dev);
1107
1108         /*
1109          * Stolen memory is set up at the beginning of the aperture by
1110          * the BIOS, consisting of the GATT followed by 4kb for the
1111          * BIOS display.
1112          */
1113         switch (sc->match->driver->chiptype) {
1114         case CHIP_I855:
1115                 gtt_size = 128;
1116                 break;
1117         case CHIP_I915:
1118                 gtt_size = 256;
1119                 break;
1120         case CHIP_I965:
1121                 switch (bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL) &
1122                         AGP_I810_PGTBL_SIZE_MASK) {
1123                 case AGP_I810_PGTBL_SIZE_128KB:
1124                         gtt_size = 128;
1125                         break;
1126                 case AGP_I810_PGTBL_SIZE_256KB:
1127                         gtt_size = 256;
1128                         break;
1129                 case AGP_I810_PGTBL_SIZE_512KB:
1130                         gtt_size = 512;
1131                         break;
1132                 case AGP_I965_PGTBL_SIZE_1MB:
1133                         gtt_size = 1024;
1134                         break;
1135                 case AGP_I965_PGTBL_SIZE_2MB:
1136                         gtt_size = 2048;
1137                         break;
1138                 case AGP_I965_PGTBL_SIZE_1_5MB:
1139                         gtt_size = 1024 + 512;
1140                         break;
1141                 default:
1142                         device_printf(dev, "Bad PGTBL size\n");
1143                         return (EINVAL);
1144                 }
1145                 break;
1146         case CHIP_G33:
1147                 gcc1 = pci_read_config(sc->bdev, AGP_I855_GCC1, 2);
1148                 switch (gcc1 & AGP_G33_MGGC_GGMS_MASK) {
1149                 case AGP_G33_MGGC_GGMS_SIZE_1M:
1150                         gtt_size = 1024;
1151                         break;
1152                 case AGP_G33_MGGC_GGMS_SIZE_2M:
1153                         gtt_size = 2048;
1154                         break;
1155                 default:
1156                         device_printf(dev, "Bad PGTBL size\n");
1157                         return (EINVAL);
1158                 }
1159                 break;
1160         case CHIP_IGD:
1161         case CHIP_G4X:
1162                 gtt_size = 0;
1163                 break;
1164         default:
1165                 device_printf(dev, "Bad chiptype\n");
1166                 return (EINVAL);
1167         }
1168
1169         /* GCC1 is called MGGC on i915+ */
1170         gcc1 = pci_read_config(sc->bdev, AGP_I855_GCC1, 1);
1171         switch (gcc1 & AGP_I855_GCC1_GMS) {
1172         case AGP_I855_GCC1_GMS_STOLEN_1M:
1173                 stolen = 1024;
1174                 break;
1175         case AGP_I855_GCC1_GMS_STOLEN_4M:
1176                 stolen = 4 * 1024;
1177                 break;
1178         case AGP_I855_GCC1_GMS_STOLEN_8M:
1179                 stolen = 8 * 1024;
1180                 break;
1181         case AGP_I855_GCC1_GMS_STOLEN_16M:
1182                 stolen = 16 * 1024;
1183                 break;
1184         case AGP_I855_GCC1_GMS_STOLEN_32M:
1185                 stolen = 32 * 1024;
1186                 break;
1187         case AGP_I915_GCC1_GMS_STOLEN_48M:
1188                 stolen = sc->match->driver->gen > 2 ? 48 * 1024 : 0;
1189                 break;
1190         case AGP_I915_GCC1_GMS_STOLEN_64M:
1191                 stolen = sc->match->driver->gen > 2 ? 64 * 1024 : 0;
1192                 break;
1193         case AGP_G33_GCC1_GMS_STOLEN_128M:
1194                 stolen = sc->match->driver->gen > 2 ? 128 * 1024 : 0;
1195                 break;
1196         case AGP_G33_GCC1_GMS_STOLEN_256M:
1197                 stolen = sc->match->driver->gen > 2 ? 256 * 1024 : 0;
1198                 break;
1199         case AGP_G4X_GCC1_GMS_STOLEN_96M:
1200                 if (sc->match->driver->chiptype == CHIP_I965 ||
1201                     sc->match->driver->chiptype == CHIP_G4X)
1202                         stolen = 96 * 1024;
1203                 else
1204                         stolen = 0;
1205                 break;
1206         case AGP_G4X_GCC1_GMS_STOLEN_160M:
1207                 if (sc->match->driver->chiptype == CHIP_I965 ||
1208                     sc->match->driver->chiptype == CHIP_G4X)
1209                         stolen = 160 * 1024;
1210                 else
1211                         stolen = 0;
1212                 break;
1213         case AGP_G4X_GCC1_GMS_STOLEN_224M:
1214                 if (sc->match->driver->chiptype == CHIP_I965 ||
1215                     sc->match->driver->chiptype == CHIP_G4X)
1216                         stolen = 224 * 1024;
1217                 else
1218                         stolen = 0;
1219                 break;
1220         case AGP_G4X_GCC1_GMS_STOLEN_352M:
1221                 if (sc->match->driver->chiptype == CHIP_I965 ||
1222                     sc->match->driver->chiptype == CHIP_G4X)
1223                         stolen = 352 * 1024;
1224                 else
1225                         stolen = 0;
1226                 break;
1227         default:
1228                 device_printf(dev,
1229                     "unknown memory configuration, disabling (GCC1 %x)\n",
1230                     gcc1);
1231                 return (EINVAL);
1232         }
1233
1234         gtt_size += 4;
1235         sc->stolen_size = stolen * 1024;
1236         sc->stolen = (stolen - gtt_size) * 1024 / 4096;
1237
1238         return (0);
1239 }
1240
1241 static int
1242 agp_sb_get_stolen_size(device_t dev)
1243 {
1244         struct agp_i810_softc *sc;
1245         uint16_t gmch_ctl;
1246
1247         sc = device_get_softc(dev);
1248         gmch_ctl = pci_read_config(sc->bdev, AGP_SNB_GCC1, 2);
1249         switch (gmch_ctl & AGP_SNB_GMCH_GMS_STOLEN_MASK) {
1250         case AGP_SNB_GMCH_GMS_STOLEN_32M:
1251                 sc->stolen_size = 32 * 1024 * 1024;
1252                 break;
1253         case AGP_SNB_GMCH_GMS_STOLEN_64M:
1254                 sc->stolen_size = 64 * 1024 * 1024;
1255                 break;
1256         case AGP_SNB_GMCH_GMS_STOLEN_96M:
1257                 sc->stolen_size = 96 * 1024 * 1024;
1258                 break;
1259         case AGP_SNB_GMCH_GMS_STOLEN_128M:
1260                 sc->stolen_size = 128 * 1024 * 1024;
1261                 break;
1262         case AGP_SNB_GMCH_GMS_STOLEN_160M:
1263                 sc->stolen_size = 160 * 1024 * 1024;
1264                 break;
1265         case AGP_SNB_GMCH_GMS_STOLEN_192M:
1266                 sc->stolen_size = 192 * 1024 * 1024;
1267                 break;
1268         case AGP_SNB_GMCH_GMS_STOLEN_224M:
1269                 sc->stolen_size = 224 * 1024 * 1024;
1270                 break;
1271         case AGP_SNB_GMCH_GMS_STOLEN_256M:
1272                 sc->stolen_size = 256 * 1024 * 1024;
1273                 break;
1274         case AGP_SNB_GMCH_GMS_STOLEN_288M:
1275                 sc->stolen_size = 288 * 1024 * 1024;
1276                 break;
1277         case AGP_SNB_GMCH_GMS_STOLEN_320M:
1278                 sc->stolen_size = 320 * 1024 * 1024;
1279                 break;
1280         case AGP_SNB_GMCH_GMS_STOLEN_352M:
1281                 sc->stolen_size = 352 * 1024 * 1024;
1282                 break;
1283         case AGP_SNB_GMCH_GMS_STOLEN_384M:
1284                 sc->stolen_size = 384 * 1024 * 1024;
1285                 break;
1286         case AGP_SNB_GMCH_GMS_STOLEN_416M:
1287                 sc->stolen_size = 416 * 1024 * 1024;
1288                 break;
1289         case AGP_SNB_GMCH_GMS_STOLEN_448M:
1290                 sc->stolen_size = 448 * 1024 * 1024;
1291                 break;
1292         case AGP_SNB_GMCH_GMS_STOLEN_480M:
1293                 sc->stolen_size = 480 * 1024 * 1024;
1294                 break;
1295         case AGP_SNB_GMCH_GMS_STOLEN_512M:
1296                 sc->stolen_size = 512 * 1024 * 1024;
1297                 break;
1298         }
1299         sc->stolen = (sc->stolen_size - 4) / 4096;
1300         return (0);
1301 }
1302
1303 static int
1304 agp_i810_get_gtt_mappable_entries(device_t dev)
1305 {
1306         struct agp_i810_softc *sc;
1307         uint32_t ap;
1308         uint16_t miscc;
1309
1310         sc = device_get_softc(dev);
1311         miscc = pci_read_config(sc->bdev, AGP_I810_MISCC, 2);
1312         if ((miscc & AGP_I810_MISCC_WINSIZE) == AGP_I810_MISCC_WINSIZE_32)
1313                 ap = 32;
1314         else
1315                 ap = 64;
1316         sc->gtt_mappable_entries = (ap * 1024 * 1024) >> AGP_PAGE_SHIFT;
1317         return (0);
1318 }
1319
1320 static int
1321 agp_i830_get_gtt_mappable_entries(device_t dev)
1322 {
1323         struct agp_i810_softc *sc;
1324         uint32_t ap;
1325         uint16_t gmch_ctl;
1326
1327         sc = device_get_softc(dev);
1328         gmch_ctl = pci_read_config(sc->bdev, AGP_I830_GCC1, 2);
1329         if ((gmch_ctl & AGP_I830_GCC1_GMASIZE) == AGP_I830_GCC1_GMASIZE_64)
1330                 ap = 64;
1331         else
1332                 ap = 128;
1333         sc->gtt_mappable_entries = (ap * 1024 * 1024) >> AGP_PAGE_SHIFT;
1334         return (0);
1335 }
1336
1337 static int
1338 agp_i915_get_gtt_mappable_entries(device_t dev)
1339 {
1340         struct agp_i810_softc *sc;
1341         uint32_t ap;
1342
1343         sc = device_get_softc(dev);
1344         ap = AGP_GET_APERTURE(dev);
1345         sc->gtt_mappable_entries = ap >> AGP_PAGE_SHIFT;
1346         return (0);
1347 }
1348
1349 static int
1350 agp_i810_get_gtt_total_entries(device_t dev)
1351 {
1352         struct agp_i810_softc *sc;
1353
1354         sc = device_get_softc(dev);
1355         sc->gtt_total_entries = sc->gtt_mappable_entries;
1356         return (0);
1357 }
1358
1359 static int
1360 agp_i965_get_gtt_total_entries(device_t dev)
1361 {
1362         struct agp_i810_softc *sc;
1363         uint32_t pgetbl_ctl;
1364         int error;
1365
1366         sc = device_get_softc(dev);
1367         error = 0;
1368         pgetbl_ctl = bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL);
1369         switch (pgetbl_ctl & AGP_I810_PGTBL_SIZE_MASK) {
1370         case AGP_I810_PGTBL_SIZE_128KB:
1371                 sc->gtt_total_entries = 128 * 1024 / 4;
1372                 break;
1373         case AGP_I810_PGTBL_SIZE_256KB:
1374                 sc->gtt_total_entries = 256 * 1024 / 4;
1375                 break;
1376         case AGP_I810_PGTBL_SIZE_512KB:
1377                 sc->gtt_total_entries = 512 * 1024 / 4;
1378                 break;
1379         /* GTT pagetable sizes bigger than 512KB are not possible on G33! */
1380         case AGP_I810_PGTBL_SIZE_1MB:
1381                 sc->gtt_total_entries = 1024 * 1024 / 4;
1382                 break;
1383         case AGP_I810_PGTBL_SIZE_2MB:
1384                 sc->gtt_total_entries = 2 * 1024 * 1024 / 4;
1385                 break;
1386         case AGP_I810_PGTBL_SIZE_1_5MB:
1387                 sc->gtt_total_entries = (1024 + 512) * 1024 / 4;
1388                 break;
1389         default:
1390                 device_printf(dev, "Unknown page table size\n");
1391                 error = ENXIO;
1392         }
1393         return (error);
1394 }
1395
1396 static void
1397 agp_gen5_adjust_pgtbl_size(device_t dev, uint32_t sz)
1398 {
1399         struct agp_i810_softc *sc;
1400         uint32_t pgetbl_ctl, pgetbl_ctl2;
1401
1402         sc = device_get_softc(dev);
1403
1404         /* Disable per-process page table. */
1405         pgetbl_ctl2 = bus_read_4(sc->sc_res[0], AGP_I965_PGTBL_CTL2);
1406         pgetbl_ctl2 &= ~AGP_I810_PGTBL_ENABLED;
1407         bus_write_4(sc->sc_res[0], AGP_I965_PGTBL_CTL2, pgetbl_ctl2);
1408
1409         /* Write the new ggtt size. */
1410         pgetbl_ctl = bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL);
1411         pgetbl_ctl &= ~AGP_I810_PGTBL_SIZE_MASK;
1412         pgetbl_ctl |= sz;
1413         bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL, pgetbl_ctl);
1414 }
1415
1416 static int
1417 agp_gen5_get_gtt_total_entries(device_t dev)
1418 {
1419         struct agp_i810_softc *sc;
1420         uint16_t gcc1;
1421
1422         sc = device_get_softc(dev);
1423
1424         gcc1 = pci_read_config(sc->bdev, AGP_I830_GCC1, 2);
1425         switch (gcc1 & AGP_G4x_GCC1_SIZE_MASK) {
1426         case AGP_G4x_GCC1_SIZE_1M:
1427         case AGP_G4x_GCC1_SIZE_VT_1M:
1428                 agp_gen5_adjust_pgtbl_size(dev, AGP_I810_PGTBL_SIZE_1MB);
1429                 break;
1430         case AGP_G4x_GCC1_SIZE_VT_1_5M:
1431                 agp_gen5_adjust_pgtbl_size(dev, AGP_I810_PGTBL_SIZE_1_5MB);
1432                 break;
1433         case AGP_G4x_GCC1_SIZE_2M:
1434         case AGP_G4x_GCC1_SIZE_VT_2M:
1435                 agp_gen5_adjust_pgtbl_size(dev, AGP_I810_PGTBL_SIZE_2MB);
1436                 break;
1437         default:
1438                 device_printf(dev, "Unknown page table size\n");
1439                 return (ENXIO);
1440         }
1441
1442         return (agp_i965_get_gtt_total_entries(dev));
1443 }
1444
1445 static int
1446 agp_sb_get_gtt_total_entries(device_t dev)
1447 {
1448         struct agp_i810_softc *sc;
1449         uint16_t gcc1;
1450
1451         sc = device_get_softc(dev);
1452
1453         gcc1 = pci_read_config(sc->bdev, AGP_SNB_GCC1, 2);
1454         switch (gcc1 & AGP_SNB_GTT_SIZE_MASK) {
1455         default:
1456         case AGP_SNB_GTT_SIZE_0M:
1457                 kprintf("Bad GTT size mask: 0x%04x\n", gcc1);
1458                 return (ENXIO);
1459         case AGP_SNB_GTT_SIZE_1M:
1460                 sc->gtt_total_entries = 1024 * 1024 / 4;
1461                 break;
1462         case AGP_SNB_GTT_SIZE_2M:
1463                 sc->gtt_total_entries = 2 * 1024 * 1024 / 4;
1464                 break;
1465         }
1466         return (0);
1467 }
1468
1469 static int
1470 agp_i810_install_gatt(device_t dev)
1471 {
1472         struct agp_i810_softc *sc;
1473
1474         sc = device_get_softc(dev);
1475
1476         /* Some i810s have on-chip memory called dcache. */
1477         if ((bus_read_1(sc->sc_res[0], AGP_I810_DRT) & AGP_I810_DRT_POPULATED)
1478             != 0)
1479                 sc->dcache_size = 4 * 1024 * 1024;
1480         else
1481                 sc->dcache_size = 0;
1482
1483         /* According to the specs the gatt on the i810 must be 64k. */
1484         sc->gatt->ag_virtual = contigmalloc(64 * 1024, M_AGP, 0, 0, ~0,
1485             PAGE_SIZE, 0);
1486         if (sc->gatt->ag_virtual == NULL) {
1487                 if (bootverbose)
1488                         device_printf(dev, "contiguous allocation failed\n");
1489                 return (ENOMEM);
1490         }
1491
1492         bzero(sc->gatt->ag_virtual, sc->gatt->ag_entries * sizeof(u_int32_t));
1493         sc->gatt->ag_physical = vtophys((vm_offset_t)sc->gatt->ag_virtual);
1494         agp_flush_cache();
1495         /* Install the GATT. */
1496         bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL,
1497             sc->gatt->ag_physical | 1);
1498         return (0);
1499 }
1500
1501 static int
1502 agp_i830_install_gatt(device_t dev)
1503 {
1504         struct agp_i810_softc *sc;
1505         uint32_t pgtblctl;
1506
1507         sc = device_get_softc(dev);
1508
1509         /*
1510          * The i830 automatically initializes the 128k gatt on boot.
1511          * GATT address is already in there, make sure it's enabled.
1512          */
1513         pgtblctl = bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL);
1514         pgtblctl |= 1;
1515         bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL, pgtblctl);
1516
1517         sc->gatt->ag_physical = pgtblctl & ~1;
1518         return (0);
1519 }
1520
1521 static int
1522 agp_i810_attach(device_t dev)
1523 {
1524         struct agp_i810_softc *sc;
1525         int error;
1526
1527         sc = device_get_softc(dev);
1528         sc->bdev = agp_i810_find_bridge(dev);
1529         if (sc->bdev == NULL)
1530                 return (ENOENT);
1531
1532         sc->match = agp_i810_match(dev);
1533
1534         agp_set_aperture_resource(dev, sc->match->driver->gen <= 2 ?
1535             AGP_APBASE : AGP_I915_GMADR);
1536         error = agp_generic_attach(dev);
1537         if (error)
1538                 return (error);
1539
1540         if (ptoa((vm_paddr_t)Maxmem) >
1541             (1ULL << sc->match->driver->busdma_addr_mask_sz) - 1) {
1542                 device_printf(dev, "agp_i810 does not support physical "
1543                     "memory above %ju.\n", (uintmax_t)(1ULL <<
1544                     sc->match->driver->busdma_addr_mask_sz) - 1);
1545                 return (ENOENT);
1546         }
1547
1548         if (bus_alloc_resources(dev, sc->match->driver->res_spec, sc->sc_res)) {
1549                 agp_generic_detach(dev);
1550                 return (ENODEV);
1551         }
1552
1553         sc->initial_aperture = AGP_GET_APERTURE(dev);
1554         sc->gatt = kmalloc(sizeof(struct agp_gatt), M_AGP, M_WAITOK);
1555         sc->gatt->ag_entries = AGP_GET_APERTURE(dev) >> AGP_PAGE_SHIFT;
1556
1557         if ((error = sc->match->driver->get_stolen_size(dev)) != 0 ||
1558             (error = sc->match->driver->install_gatt(dev)) != 0 ||
1559             (error = sc->match->driver->get_gtt_mappable_entries(dev)) != 0 ||
1560             (error = sc->match->driver->get_gtt_total_entries(dev)) != 0 ||
1561             (error = sc->match->driver->chipset_flush_setup(dev)) != 0) {
1562                 bus_release_resources(dev, sc->match->driver->res_spec,
1563                     sc->sc_res);
1564                 kfree(sc->gatt, M_AGP);
1565                 agp_generic_detach(dev);
1566                 return (error);
1567         }
1568
1569         intel_agp = dev;
1570         device_printf(dev, "aperture size is %dM",
1571             sc->initial_aperture / 1024 / 1024);
1572         if (sc->stolen > 0)
1573                 kprintf(", detected %dk stolen memory\n", sc->stolen * 4);
1574         else
1575                 kprintf("\n");
1576         if (bootverbose) {
1577                 sc->match->driver->dump_regs(dev);
1578                 device_printf(dev, "Mappable GTT entries: %d\n",
1579                     sc->gtt_mappable_entries);
1580                 device_printf(dev, "Total GTT entries: %d\n",
1581                     sc->gtt_total_entries);
1582         }
1583         return (0);
1584 }
1585
1586 static void
1587 agp_i810_deinstall_gatt(device_t dev)
1588 {
1589         struct agp_i810_softc *sc;
1590
1591         sc = device_get_softc(dev);
1592         bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL, 0);
1593         contigfree(sc->gatt->ag_virtual, 64 * 1024, M_AGP);
1594 }
1595
1596 static void
1597 agp_i830_deinstall_gatt(device_t dev)
1598 {
1599         struct agp_i810_softc *sc;
1600         unsigned int pgtblctl;
1601
1602         sc = device_get_softc(dev);
1603         pgtblctl = bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL);
1604         pgtblctl &= ~1;
1605         bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL, pgtblctl);
1606 }
1607
1608 static int
1609 agp_i810_detach(device_t dev)
1610 {
1611         struct agp_i810_softc *sc;
1612
1613         sc = device_get_softc(dev);
1614         agp_free_cdev(dev);
1615
1616         /* Clear the GATT base. */
1617         sc->match->driver->deinstall_gatt(dev);
1618
1619         sc->match->driver->chipset_flush_teardown(dev);
1620
1621         /* Put the aperture back the way it started. */
1622         AGP_SET_APERTURE(dev, sc->initial_aperture);
1623
1624         kfree(sc->gatt, M_AGP);
1625         bus_release_resources(dev, sc->match->driver->res_spec, sc->sc_res);
1626         agp_free_res(dev);
1627
1628         return (0);
1629 }
1630
1631 static int
1632 agp_i810_resume(device_t dev)
1633 {
1634         struct agp_i810_softc *sc;
1635         sc = device_get_softc(dev);
1636
1637         AGP_SET_APERTURE(dev, sc->initial_aperture);
1638
1639         /* Install the GATT. */
1640         bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL,
1641         sc->gatt->ag_physical | 1);
1642
1643         return (bus_generic_resume(dev));
1644 }
1645
1646 /**
1647  * Sets the PCI resource size of the aperture on i830-class and below chipsets,
1648  * while returning failure on later chipsets when an actual change is
1649  * requested.
1650  *
1651  * This whole function is likely bogus, as the kernel would probably need to
1652  * reconfigure the placement of the AGP aperture if a larger size is requested,
1653  * which doesn't happen currently.
1654  */
1655 static int
1656 agp_i810_set_aperture(device_t dev, u_int32_t aperture)
1657 {
1658         struct agp_i810_softc *sc;
1659         u_int16_t miscc;
1660
1661         sc = device_get_softc(dev);
1662         /*
1663          * Double check for sanity.
1664          */
1665         if (aperture != 32 * 1024 * 1024 && aperture != 64 * 1024 * 1024) {
1666                 device_printf(dev, "bad aperture size %d\n", aperture);
1667                 return (EINVAL);
1668         }
1669
1670         miscc = pci_read_config(sc->bdev, AGP_I810_MISCC, 2);
1671         miscc &= ~AGP_I810_MISCC_WINSIZE;
1672         if (aperture == 32 * 1024 * 1024)
1673                 miscc |= AGP_I810_MISCC_WINSIZE_32;
1674         else
1675                 miscc |= AGP_I810_MISCC_WINSIZE_64;
1676
1677         pci_write_config(sc->bdev, AGP_I810_MISCC, miscc, 2);
1678         return (0);
1679 }
1680
1681 static int
1682 agp_i830_set_aperture(device_t dev, u_int32_t aperture)
1683 {
1684         struct agp_i810_softc *sc;
1685         u_int16_t gcc1;
1686
1687         sc = device_get_softc(dev);
1688
1689         if (aperture != 64 * 1024 * 1024 &&
1690             aperture != 128 * 1024 * 1024) {
1691                 device_printf(dev, "bad aperture size %d\n", aperture);
1692                 return (EINVAL);
1693         }
1694         gcc1 = pci_read_config(sc->bdev, AGP_I830_GCC1, 2);
1695         gcc1 &= ~AGP_I830_GCC1_GMASIZE;
1696         if (aperture == 64 * 1024 * 1024)
1697                 gcc1 |= AGP_I830_GCC1_GMASIZE_64;
1698         else
1699                 gcc1 |= AGP_I830_GCC1_GMASIZE_128;
1700
1701         pci_write_config(sc->bdev, AGP_I830_GCC1, gcc1, 2);
1702         return (0);
1703 }
1704
1705 static int
1706 agp_i915_set_aperture(device_t dev, u_int32_t aperture)
1707 {
1708
1709         return (agp_generic_set_aperture(dev, aperture));
1710 }
1711
1712 static int
1713 agp_i810_method_set_aperture(device_t dev, u_int32_t aperture)
1714 {
1715         struct agp_i810_softc *sc;
1716
1717         sc = device_get_softc(dev);
1718         return (sc->match->driver->set_aperture(dev, aperture));
1719 }
1720
1721 /**
1722  * Writes a GTT entry mapping the page at the given offset from the
1723  * beginning of the aperture to the given physical address.  Setup the
1724  * caching mode according to flags.
1725  *
1726  * For gen 1, 2 and 3, GTT start is located at AGP_I810_GTT offset
1727  * from corresponding BAR start. For gen 4, offset is 512KB +
1728  * AGP_I810_GTT, for gen 5 and 6 it is 2MB + AGP_I810_GTT.
1729  *
1730  * Also, the bits of the physical page address above 4GB needs to be
1731  * placed into bits 40-32 of PTE.
1732  */
1733 static void
1734 agp_i810_install_gtt_pte(device_t dev, u_int index, vm_offset_t physical,
1735     int flags)
1736 {
1737         uint32_t pte;
1738
1739         pte = (u_int32_t)physical | I810_PTE_VALID;
1740         if (flags == AGP_DCACHE_MEMORY)
1741                 pte |= I810_PTE_LOCAL;
1742         else if (flags == AGP_USER_CACHED_MEMORY)
1743                 pte |= I830_PTE_SYSTEM_CACHED;
1744         agp_i810_write_gtt(dev, index, pte);
1745 }
1746
1747 static void
1748 agp_i810_write_gtt(device_t dev, u_int index, uint32_t pte)
1749 {
1750         struct agp_i810_softc *sc;
1751
1752         sc = device_get_softc(dev);
1753         bus_write_4(sc->sc_res[0], AGP_I810_GTT + index * 4, pte);
1754 }
1755
1756 static void
1757 agp_i830_install_gtt_pte(device_t dev, u_int index, vm_offset_t physical,
1758     int flags)
1759 {
1760         uint32_t pte;
1761
1762         pte = (u_int32_t)physical | I810_PTE_VALID;
1763         if (flags == AGP_USER_CACHED_MEMORY)
1764                 pte |= I830_PTE_SYSTEM_CACHED;
1765         agp_i810_write_gtt(dev, index, pte);
1766 }
1767
1768 static void
1769 agp_i915_install_gtt_pte(device_t dev, u_int index, vm_offset_t physical,
1770     int flags)
1771 {
1772         uint32_t pte;
1773
1774         pte = (u_int32_t)physical | I810_PTE_VALID;
1775         if (flags == AGP_USER_CACHED_MEMORY)
1776                 pte |= I830_PTE_SYSTEM_CACHED;
1777         pte |= (physical & 0x0000000f00000000ull) >> 28;
1778         agp_i915_write_gtt(dev, index, pte);
1779 }
1780
1781 static void
1782 agp_i915_write_gtt(device_t dev, u_int index, uint32_t pte)
1783 {
1784         struct agp_i810_softc *sc;
1785
1786         sc = device_get_softc(dev);
1787         bus_write_4(sc->sc_res[1], index * 4, pte);
1788 }
1789
1790 static void
1791 agp_i965_install_gtt_pte(device_t dev, u_int index, vm_offset_t physical,
1792     int flags)
1793 {
1794         uint32_t pte;
1795
1796         pte = (u_int32_t)physical | I810_PTE_VALID;
1797         if (flags == AGP_USER_CACHED_MEMORY)
1798                 pte |= I830_PTE_SYSTEM_CACHED;
1799         pte |= (physical & 0x0000000f00000000ull) >> 28;
1800         agp_i965_write_gtt(dev, index, pte);
1801 }
1802
1803 static void
1804 agp_i965_write_gtt(device_t dev, u_int index, uint32_t pte)
1805 {
1806         struct agp_i810_softc *sc;
1807
1808         sc = device_get_softc(dev);
1809         bus_write_4(sc->sc_res[0], index * 4 + (512 * 1024), pte);
1810 }
1811
1812 static void
1813 agp_g4x_install_gtt_pte(device_t dev, u_int index, vm_offset_t physical,
1814     int flags)
1815 {
1816         uint32_t pte;
1817
1818         pte = (u_int32_t)physical | I810_PTE_VALID;
1819         if (flags == AGP_USER_CACHED_MEMORY)
1820                 pte |= I830_PTE_SYSTEM_CACHED;
1821         pte |= (physical & 0x0000000f00000000ull) >> 28;
1822         agp_g4x_write_gtt(dev, index, pte);
1823 }
1824
1825 static void
1826 agp_g4x_write_gtt(device_t dev, u_int index, uint32_t pte)
1827 {
1828         struct agp_i810_softc *sc;
1829
1830         sc = device_get_softc(dev);
1831         bus_write_4(sc->sc_res[0], index * 4 + (2 * 1024 * 1024), pte);
1832 }
1833
1834 static void
1835 agp_sb_install_gtt_pte(device_t dev, u_int index, vm_offset_t physical,
1836     int flags)
1837 {
1838         int type_mask, gfdt;
1839         uint32_t pte;
1840
1841         pte = (u_int32_t)physical | I810_PTE_VALID;
1842         type_mask = flags & ~AGP_USER_CACHED_MEMORY_GFDT;
1843         gfdt = (flags & AGP_USER_CACHED_MEMORY_GFDT) != 0 ? GEN6_PTE_GFDT : 0;
1844
1845         if (type_mask == AGP_USER_MEMORY)
1846                 pte |= GEN6_PTE_UNCACHED;
1847         else if (type_mask == AGP_USER_CACHED_MEMORY_LLC_MLC)
1848                 pte |= GEN6_PTE_LLC_MLC | gfdt;
1849         else
1850                 pte |= GEN6_PTE_LLC | gfdt;
1851
1852         pte |= (physical & 0x000000ff00000000ull) >> 28;
1853         agp_sb_write_gtt(dev, index, pte);
1854 }
1855
1856 static void
1857 agp_sb_write_gtt(device_t dev, u_int index, uint32_t pte)
1858 {
1859         struct agp_i810_softc *sc;
1860
1861         sc = device_get_softc(dev);
1862         bus_write_4(sc->sc_res[0], index * 4 + (2 * 1024 * 1024), pte);
1863 }
1864
1865 static int
1866 agp_i810_bind_page(device_t dev, vm_offset_t offset, vm_offset_t physical)
1867 {
1868         struct agp_i810_softc *sc = device_get_softc(dev);
1869         u_int index;
1870
1871         if (offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) {
1872                 device_printf(dev, "failed: offset is 0x%08jx, "
1873                     "shift is %d, entries is %d\n", (intmax_t)offset,
1874                     AGP_PAGE_SHIFT, sc->gatt->ag_entries);
1875                 return (EINVAL);
1876         }
1877         index = offset >> AGP_PAGE_SHIFT;
1878         if (sc->stolen != 0 && index < sc->stolen) {
1879                 device_printf(dev, "trying to bind into stolen memory\n");
1880                 return (EINVAL);
1881         }
1882         sc->match->driver->install_gtt_pte(dev, index, physical, 0);
1883         return (0);
1884 }
1885
1886 static int
1887 agp_i810_unbind_page(device_t dev, vm_offset_t offset)
1888 {
1889         struct agp_i810_softc *sc;
1890         u_int index;
1891
1892         sc = device_get_softc(dev);
1893         if (offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT))
1894                 return (EINVAL);
1895         index = offset >> AGP_PAGE_SHIFT;
1896         if (sc->stolen != 0 && index < sc->stolen) {
1897                 device_printf(dev, "trying to unbind from stolen memory\n");
1898                 return (EINVAL);
1899         }
1900         sc->match->driver->install_gtt_pte(dev, index, 0, 0);
1901         return (0);
1902 }
1903
1904 static u_int32_t
1905 agp_i810_read_gtt_pte(device_t dev, u_int index)
1906 {
1907         struct agp_i810_softc *sc;
1908         u_int32_t pte;
1909
1910         sc = device_get_softc(dev);
1911         pte = bus_read_4(sc->sc_res[0], AGP_I810_GTT + index * 4);
1912         return (pte);
1913 }
1914
1915 static u_int32_t
1916 agp_i915_read_gtt_pte(device_t dev, u_int index)
1917 {
1918         struct agp_i810_softc *sc;
1919         u_int32_t pte;
1920
1921         sc = device_get_softc(dev);
1922         pte = bus_read_4(sc->sc_res[1], index * 4);
1923         return (pte);
1924 }
1925
1926 static u_int32_t
1927 agp_i965_read_gtt_pte(device_t dev, u_int index)
1928 {
1929         struct agp_i810_softc *sc;
1930         u_int32_t pte;
1931
1932         sc = device_get_softc(dev);
1933         pte = bus_read_4(sc->sc_res[0], index * 4 + (512 * 1024));
1934         return (pte);
1935 }
1936
1937 static u_int32_t
1938 agp_g4x_read_gtt_pte(device_t dev, u_int index)
1939 {
1940         struct agp_i810_softc *sc;
1941         u_int32_t pte;
1942
1943         sc = device_get_softc(dev);
1944         pte = bus_read_4(sc->sc_res[0], index * 4 + (2 * 1024 * 1024));
1945         return (pte);
1946 }
1947
1948 static vm_paddr_t
1949 agp_i810_read_gtt_pte_paddr(device_t dev, u_int index)
1950 {
1951         struct agp_i810_softc *sc;
1952         u_int32_t pte;
1953         vm_paddr_t res;
1954
1955         sc = device_get_softc(dev);
1956         pte = sc->match->driver->read_gtt_pte(dev, index);
1957         res = pte & ~PAGE_MASK;
1958         return (res);
1959 }
1960
1961 static vm_paddr_t
1962 agp_i915_read_gtt_pte_paddr(device_t dev, u_int index)
1963 {
1964         struct agp_i810_softc *sc;
1965         u_int32_t pte;
1966         vm_paddr_t res;
1967
1968         sc = device_get_softc(dev);
1969         pte = sc->match->driver->read_gtt_pte(dev, index);
1970         res = (pte & ~PAGE_MASK) | ((pte & 0xf0) << 28);
1971         return (res);
1972 }
1973
1974 static vm_paddr_t
1975 agp_sb_read_gtt_pte_paddr(device_t dev, u_int index)
1976 {
1977         struct agp_i810_softc *sc;
1978         u_int32_t pte;
1979         vm_paddr_t res;
1980
1981         sc = device_get_softc(dev);
1982         pte = sc->match->driver->read_gtt_pte(dev, index);
1983         res = (pte & ~PAGE_MASK) | ((pte & 0xff0) << 28);
1984         return (res);
1985 }
1986
1987 /*
1988  * Writing via memory mapped registers already flushes all TLBs.
1989  */
1990 static void
1991 agp_i810_flush_tlb(device_t dev)
1992 {
1993 }
1994
1995 static int
1996 agp_i810_enable(device_t dev, u_int32_t mode)
1997 {
1998
1999         return (0);
2000 }
2001
2002 static struct agp_memory *
2003 agp_i810_alloc_memory(device_t dev, int type, vm_size_t size)
2004 {
2005         struct agp_i810_softc *sc;
2006         struct agp_memory *mem;
2007         vm_page_t m;
2008
2009         sc = device_get_softc(dev);
2010
2011         if ((size & (AGP_PAGE_SIZE - 1)) != 0 ||
2012             sc->agp.as_allocated + size > sc->agp.as_maxmem)
2013                 return (0);
2014
2015         if (type == 1) {
2016                 /*
2017                  * Mapping local DRAM into GATT.
2018                  */
2019                 if (sc->match->driver->chiptype != CHIP_I810)
2020                         return (0);
2021                 if (size != sc->dcache_size)
2022                         return (0);
2023         } else if (type == 2) {
2024                 /*
2025                  * Type 2 is the contiguous physical memory type, that hands
2026                  * back a physical address.  This is used for cursors on i810.
2027                  * Hand back as many single pages with physical as the user
2028                  * wants, but only allow one larger allocation (ARGB cursor)
2029                  * for simplicity.
2030                  */
2031                 if (size != AGP_PAGE_SIZE) {
2032                         if (sc->argb_cursor != NULL)
2033                                 return (0);
2034
2035                         /* Allocate memory for ARGB cursor, if we can. */
2036                         sc->argb_cursor = contigmalloc(size, M_AGP,
2037                            0, 0, ~0, PAGE_SIZE, 0);
2038                         if (sc->argb_cursor == NULL)
2039                                 return (0);
2040                 }
2041         }
2042
2043         mem = kmalloc(sizeof *mem, M_AGP, M_INTWAIT);
2044         mem->am_id = sc->agp.as_nextid++;
2045         mem->am_size = size;
2046         mem->am_type = type;
2047         if (type != 1 && (type != 2 || size == AGP_PAGE_SIZE))
2048                 mem->am_obj = vm_object_allocate(OBJT_DEFAULT,
2049                     atop(round_page(size)));
2050         else
2051                 mem->am_obj = 0;
2052
2053         if (type == 2) {
2054                 if (size == AGP_PAGE_SIZE) {
2055                         /*
2056                          * Allocate and wire down the page now so that we can
2057                          * get its physical address.
2058                          */
2059                         VM_OBJECT_LOCK(mem->am_obj);
2060                         m = vm_page_grab(mem->am_obj, 0, VM_ALLOC_NORMAL |
2061                                                          VM_ALLOC_ZERO |
2062                                                          VM_ALLOC_RETRY);
2063                         vm_page_wire(m);
2064                         VM_OBJECT_UNLOCK(mem->am_obj);
2065                         mem->am_physical = VM_PAGE_TO_PHYS(m);
2066                         vm_page_wakeup(m);
2067                 } else {
2068                         /* Our allocation is already nicely wired down for us.
2069                          * Just grab the physical address.
2070                          */
2071                         mem->am_physical = vtophys(sc->argb_cursor);
2072                 }
2073         } else
2074                 mem->am_physical = 0;
2075
2076         mem->am_offset = 0;
2077         mem->am_is_bound = 0;
2078         TAILQ_INSERT_TAIL(&sc->agp.as_memory, mem, am_link);
2079         sc->agp.as_allocated += size;
2080
2081         return (mem);
2082 }
2083
2084 static int
2085 agp_i810_free_memory(device_t dev, struct agp_memory *mem)
2086 {
2087         struct agp_i810_softc *sc;
2088
2089         if (mem->am_is_bound)
2090                 return (EBUSY);
2091
2092         sc = device_get_softc(dev);
2093
2094         if (mem->am_type == 2) {
2095                 if (mem->am_size == AGP_PAGE_SIZE) {
2096                         /*
2097                          * Unwire the page which we wired in alloc_memory.
2098                          */
2099                         vm_page_t m;
2100
2101                         vm_object_hold(mem->am_obj);
2102                         m = vm_page_lookup_busy_wait(mem->am_obj, 0,
2103                                                      FALSE, "agppg");
2104                         vm_object_drop(mem->am_obj);
2105                         vm_page_unwire(m, 0);
2106                         vm_page_wakeup(m);
2107                 } else {
2108                         contigfree(sc->argb_cursor, mem->am_size, M_AGP);
2109                         sc->argb_cursor = NULL;
2110                 }
2111         }
2112
2113         sc->agp.as_allocated -= mem->am_size;
2114         TAILQ_REMOVE(&sc->agp.as_memory, mem, am_link);
2115         if (mem->am_obj)
2116                 vm_object_deallocate(mem->am_obj);
2117         kfree(mem, M_AGP);
2118         return (0);
2119 }
2120
2121 static int
2122 agp_i810_bind_memory(device_t dev, struct agp_memory *mem, vm_offset_t offset)
2123 {
2124         struct agp_i810_softc *sc;
2125         vm_offset_t i;
2126
2127         /* Do some sanity checks first. */
2128         if ((offset & (AGP_PAGE_SIZE - 1)) != 0 ||
2129             offset + mem->am_size > AGP_GET_APERTURE(dev)) {
2130                 device_printf(dev, "binding memory at bad offset %#x\n",
2131                     (int)offset);
2132                 return (EINVAL);
2133         }
2134
2135         sc = device_get_softc(dev);
2136         if (mem->am_type == 2 && mem->am_size != AGP_PAGE_SIZE) {
2137                 lockmgr(&sc->agp.as_lock, LK_EXCLUSIVE);
2138                 if (mem->am_is_bound) {
2139                         lockmgr(&sc->agp.as_lock, LK_RELEASE);
2140                         return EINVAL;
2141                 }
2142                 /* The memory's already wired down, just stick it in the GTT. */
2143                 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) {
2144                         sc->match->driver->install_gtt_pte(dev, (offset + i) >>
2145                             AGP_PAGE_SHIFT, mem->am_physical + i, 0);
2146                 }
2147                 agp_flush_cache();
2148                 mem->am_offset = offset;
2149                 mem->am_is_bound = 1;
2150                 lockmgr(&sc->agp.as_lock, LK_RELEASE);
2151                 return (0);
2152         }
2153
2154         if (mem->am_type != 1)
2155                 return (agp_generic_bind_memory(dev, mem, offset));
2156
2157         /*
2158          * Mapping local DRAM into GATT.
2159          */
2160         if (sc->match->driver->chiptype != CHIP_I810)
2161                 return (EINVAL);
2162         for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE)
2163                 bus_write_4(sc->sc_res[0],
2164                     AGP_I810_GTT + (i >> AGP_PAGE_SHIFT) * 4, i | 3);
2165
2166         return (0);
2167 }
2168
2169 static int
2170 agp_i810_unbind_memory(device_t dev, struct agp_memory *mem)
2171 {
2172         struct agp_i810_softc *sc;
2173         vm_offset_t i;
2174
2175         sc = device_get_softc(dev);
2176
2177         if (mem->am_type == 2 && mem->am_size != AGP_PAGE_SIZE) {
2178                 lockmgr(&sc->agp.as_lock, LK_EXCLUSIVE);
2179                 if (!mem->am_is_bound) {
2180                         lockmgr(&sc->agp.as_lock, LK_RELEASE);
2181                         return (EINVAL);
2182                 }
2183
2184                 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) {
2185                         sc->match->driver->install_gtt_pte(dev,
2186                             (mem->am_offset + i) >> AGP_PAGE_SHIFT, 0, 0);
2187                 }
2188                 agp_flush_cache();
2189                 mem->am_is_bound = 0;
2190                 lockmgr(&sc->agp.as_lock, LK_RELEASE);
2191                 return (0);
2192         }
2193
2194         if (mem->am_type != 1)
2195                 return (agp_generic_unbind_memory(dev, mem));
2196
2197         if (sc->match->driver->chiptype != CHIP_I810)
2198                 return (EINVAL);
2199         for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) {
2200                 sc->match->driver->install_gtt_pte(dev, i >> AGP_PAGE_SHIFT,
2201                     0, 0);
2202         }
2203         return (0);
2204 }
2205
2206 static device_method_t agp_i810_methods[] = {
2207         /* Device interface */
2208         DEVMETHOD(device_identify,      agp_i810_identify),
2209         DEVMETHOD(device_probe,         agp_i810_probe),
2210         DEVMETHOD(device_attach,        agp_i810_attach),
2211         DEVMETHOD(device_detach,        agp_i810_detach),
2212         DEVMETHOD(device_suspend,       bus_generic_suspend),
2213         DEVMETHOD(device_resume,        agp_i810_resume),
2214
2215         /* AGP interface */
2216         DEVMETHOD(agp_get_aperture,     agp_generic_get_aperture),
2217         DEVMETHOD(agp_set_aperture,     agp_i810_method_set_aperture),
2218         DEVMETHOD(agp_bind_page,        agp_i810_bind_page),
2219         DEVMETHOD(agp_unbind_page,      agp_i810_unbind_page),
2220         DEVMETHOD(agp_flush_tlb,        agp_i810_flush_tlb),
2221         DEVMETHOD(agp_enable,           agp_i810_enable),
2222         DEVMETHOD(agp_alloc_memory,     agp_i810_alloc_memory),
2223         DEVMETHOD(agp_free_memory,      agp_i810_free_memory),
2224         DEVMETHOD(agp_bind_memory,      agp_i810_bind_memory),
2225         DEVMETHOD(agp_unbind_memory,    agp_i810_unbind_memory),
2226         DEVMETHOD(agp_chipset_flush,    agp_intel_gtt_chipset_flush),
2227
2228         DEVMETHOD_END
2229 };
2230
2231 static driver_t agp_i810_driver = {
2232         "agp",
2233         agp_i810_methods,
2234         sizeof(struct agp_i810_softc),
2235 };
2236
2237 static devclass_t agp_devclass;
2238
2239 DRIVER_MODULE(agp_i810, vgapci, agp_i810_driver, agp_devclass, NULL, NULL);
2240 MODULE_DEPEND(agp_i810, agp, 1, 1, 1);
2241 MODULE_DEPEND(agp_i810, pci, 1, 1, 1);
2242
2243 extern vm_page_t bogus_page;
2244
2245 void
2246 agp_intel_gtt_clear_range(device_t dev, u_int first_entry, u_int num_entries)
2247 {
2248         struct agp_i810_softc *sc;
2249         u_int i;
2250
2251         sc = device_get_softc(dev);
2252         for (i = 0; i < num_entries; i++)
2253                 sc->match->driver->install_gtt_pte(dev, first_entry + i,
2254                     VM_PAGE_TO_PHYS(bogus_page), 0);
2255         sc->match->driver->read_gtt_pte(dev, first_entry + num_entries - 1);
2256 }
2257
2258 void
2259 agp_intel_gtt_insert_pages(device_t dev, u_int first_entry, u_int num_entries,
2260     vm_page_t *pages, u_int flags)
2261 {
2262         struct agp_i810_softc *sc;
2263         u_int i;
2264
2265         sc = device_get_softc(dev);
2266         for (i = 0; i < num_entries; i++) {
2267                 KKASSERT(pages[i]->valid == VM_PAGE_BITS_ALL);
2268                 KKASSERT(pages[i]->wire_count > 0);
2269                 sc->match->driver->install_gtt_pte(dev, first_entry + i,
2270                     VM_PAGE_TO_PHYS(pages[i]), flags);
2271         }
2272         sc->match->driver->read_gtt_pte(dev, first_entry + num_entries - 1);
2273 }
2274
2275 struct intel_gtt
2276 agp_intel_gtt_get(device_t dev)
2277 {
2278         struct agp_i810_softc *sc;
2279         struct intel_gtt res;
2280
2281         sc = device_get_softc(dev);
2282         res.stolen_size = sc->stolen_size;
2283         res.gtt_total_entries = sc->gtt_total_entries;
2284         res.gtt_mappable_entries = sc->gtt_mappable_entries;
2285         res.do_idle_maps = 0;
2286         res.scratch_page_dma = VM_PAGE_TO_PHYS(bogus_page);
2287         return (res);
2288 }
2289
2290 static int
2291 agp_i810_chipset_flush_setup(device_t dev)
2292 {
2293
2294         return (0);
2295 }
2296
2297 static void
2298 agp_i810_chipset_flush_teardown(device_t dev)
2299 {
2300
2301         /* Nothing to do. */
2302 }
2303
2304 static void
2305 agp_i810_chipset_flush(device_t dev)
2306 {
2307
2308         /* Nothing to do. */
2309 }
2310
2311 static void
2312 agp_i830_chipset_flush(device_t dev)
2313 {
2314         struct agp_i810_softc *sc;
2315         uint32_t hic;
2316         int i;
2317
2318         sc = device_get_softc(dev);
2319         cpu_wbinvd_on_all_cpus();
2320         hic = bus_read_4(sc->sc_res[0], AGP_I830_HIC);
2321         bus_write_4(sc->sc_res[0], AGP_I830_HIC, hic | (1 << 31));
2322         for (i = 0; i < 20000 /* 1 sec */; i++) {
2323                 hic = bus_read_4(sc->sc_res[0], AGP_I830_HIC);
2324                 if ((hic & (1 << 31)) != 0)
2325                         break;
2326                 DELAY(50);
2327         }
2328 }
2329
2330 static int
2331 agp_i915_chipset_flush_alloc_page(device_t dev, uint64_t start, uint64_t end)
2332 {
2333         struct agp_i810_softc *sc;
2334         device_t vga;
2335
2336         sc = device_get_softc(dev);
2337         vga = device_get_parent(dev);
2338         sc->sc_flush_page_rid = 100;
2339         sc->sc_flush_page_res = BUS_ALLOC_RESOURCE(device_get_parent(vga), dev,
2340             SYS_RES_MEMORY, &sc->sc_flush_page_rid, start, end, PAGE_SIZE,
2341             RF_ACTIVE, -1);
2342         if (sc->sc_flush_page_res == NULL) {
2343                 device_printf(dev, "Failed to allocate flush page at 0x%jx\n",
2344                     (uintmax_t)start);
2345                 return (EINVAL);
2346         }
2347         sc->sc_flush_page_vaddr = rman_get_virtual(sc->sc_flush_page_res);
2348         if (bootverbose) {
2349                 device_printf(dev, "Allocated flush page phys 0x%jx virt %p\n",
2350                     (uintmax_t)rman_get_start(sc->sc_flush_page_res),
2351                     sc->sc_flush_page_vaddr);
2352         }
2353         return (0);
2354 }
2355
2356 static void
2357 agp_i915_chipset_flush_free_page(device_t dev)
2358 {
2359         struct agp_i810_softc *sc;
2360         device_t vga;
2361
2362         sc = device_get_softc(dev);
2363         vga = device_get_parent(dev);
2364         if (sc->sc_flush_page_res == NULL)
2365                 return;
2366         BUS_DEACTIVATE_RESOURCE(device_get_parent(vga), dev, SYS_RES_MEMORY,
2367             sc->sc_flush_page_rid, sc->sc_flush_page_res);
2368         BUS_RELEASE_RESOURCE(device_get_parent(vga), dev, SYS_RES_MEMORY,
2369             sc->sc_flush_page_rid, sc->sc_flush_page_res);
2370 }
2371
2372 static int
2373 agp_i915_chipset_flush_setup(device_t dev)
2374 {
2375         struct agp_i810_softc *sc;
2376         uint32_t temp;
2377         int error;
2378
2379         sc = device_get_softc(dev);
2380         temp = pci_read_config(sc->bdev, AGP_I915_IFPADDR, 4);
2381         if ((temp & 1) != 0) {
2382                 temp &= ~1;
2383                 if (bootverbose)
2384                         device_printf(dev,
2385                             "Found already configured flush page at 0x%jx\n",
2386                             (uintmax_t)temp);
2387                 sc->sc_bios_allocated_flush_page = 1;
2388                 /*
2389                  * In the case BIOS initialized the flush pointer (?)
2390                  * register, expect that BIOS also set up the resource
2391                  * for the page.
2392                  */
2393                 error = agp_i915_chipset_flush_alloc_page(dev, temp,
2394                     temp + PAGE_SIZE - 1);
2395                 if (error != 0)
2396                         return (error);
2397         } else {
2398                 sc->sc_bios_allocated_flush_page = 0;
2399                 error = agp_i915_chipset_flush_alloc_page(dev, 0, 0xffffffff);
2400                 if (error != 0)
2401                         return (error);
2402                 temp = rman_get_start(sc->sc_flush_page_res);
2403                 pci_write_config(sc->bdev, AGP_I915_IFPADDR, temp | 1, 4);
2404         }
2405         return (0);
2406 }
2407
2408 static void
2409 agp_i915_chipset_flush_teardown(device_t dev)
2410 {
2411         struct agp_i810_softc *sc;
2412         uint32_t temp;
2413
2414         sc = device_get_softc(dev);
2415         if (sc->sc_flush_page_res == NULL)
2416                 return;
2417         if (!sc->sc_bios_allocated_flush_page) {
2418                 temp = pci_read_config(sc->bdev, AGP_I915_IFPADDR, 4);
2419                 temp &= ~1;
2420                 pci_write_config(sc->bdev, AGP_I915_IFPADDR, temp, 4);
2421         }
2422         agp_i915_chipset_flush_free_page(dev);
2423 }
2424
2425 static int
2426 agp_i965_chipset_flush_setup(device_t dev)
2427 {
2428         struct agp_i810_softc *sc;
2429         uint64_t temp;
2430         uint32_t temp_hi, temp_lo;
2431         int error;
2432
2433         sc = device_get_softc(dev);
2434
2435         temp_hi = pci_read_config(sc->bdev, AGP_I965_IFPADDR + 4, 4);
2436         temp_lo = pci_read_config(sc->bdev, AGP_I965_IFPADDR, 4);
2437
2438         if ((temp_lo & 1) != 0) {
2439                 temp = ((uint64_t)temp_hi << 32) | (temp_lo & ~1);
2440                 if (bootverbose)
2441                         device_printf(dev,
2442                             "Found already configured flush page at 0x%jx\n",
2443                             (uintmax_t)temp);
2444                 sc->sc_bios_allocated_flush_page = 1;
2445                 /*
2446                  * In the case BIOS initialized the flush pointer (?)
2447                  * register, expect that BIOS also set up the resource
2448                  * for the page.
2449                  */
2450                 error = agp_i915_chipset_flush_alloc_page(dev, temp,
2451                     temp + PAGE_SIZE - 1);
2452                 if (error != 0)
2453                         return (error);
2454         } else {
2455                 sc->sc_bios_allocated_flush_page = 0;
2456                 error = agp_i915_chipset_flush_alloc_page(dev, 0, ~0);
2457                 if (error != 0)
2458                         return (error);
2459                 temp = rman_get_start(sc->sc_flush_page_res);
2460                 pci_write_config(sc->bdev, AGP_I965_IFPADDR + 4,
2461                     (temp >> 32) & UINT32_MAX, 4);
2462                 pci_write_config(sc->bdev, AGP_I965_IFPADDR,
2463                     (temp & UINT32_MAX) | 1, 4);
2464         }
2465         return (0);
2466 }
2467
2468 static void
2469 agp_i965_chipset_flush_teardown(device_t dev)
2470 {
2471         struct agp_i810_softc *sc;
2472         uint32_t temp_lo;
2473
2474         sc = device_get_softc(dev);
2475         if (sc->sc_flush_page_res == NULL)
2476                 return;
2477         if (!sc->sc_bios_allocated_flush_page) {
2478                 temp_lo = pci_read_config(sc->bdev, AGP_I965_IFPADDR, 4);
2479                 temp_lo &= ~1;
2480                 pci_write_config(sc->bdev, AGP_I965_IFPADDR, temp_lo, 4);
2481         }
2482         agp_i915_chipset_flush_free_page(dev);
2483 }
2484
2485 static void
2486 agp_i915_chipset_flush(device_t dev)
2487 {
2488         struct agp_i810_softc *sc;
2489
2490         sc = device_get_softc(dev);
2491         *(uint32_t *)sc->sc_flush_page_vaddr = 1;
2492 }
2493
2494 int
2495 agp_intel_gtt_chipset_flush(device_t dev)
2496 {
2497         struct agp_i810_softc *sc;
2498
2499         sc = device_get_softc(dev);
2500         sc->match->driver->chipset_flush(dev);
2501         return (0);
2502 }
2503
2504 void
2505 agp_intel_gtt_unmap_memory(device_t dev, struct sglist *sg_list)
2506 {
2507 }
2508
2509 int
2510 agp_intel_gtt_map_memory(device_t dev, vm_page_t *pages, u_int num_entries,
2511     struct sglist **sg_list)
2512 {
2513 #if 0
2514         struct agp_i810_softc *sc;
2515 #endif
2516         struct sglist *sg;
2517         int i;
2518 #if 0
2519         int error;
2520         bus_dma_tag_t dmat;
2521 #endif
2522
2523         if (*sg_list != NULL)
2524                 return (0);
2525 #if 0
2526         sc = device_get_softc(dev);
2527 #endif
2528         sg = sglist_alloc(num_entries, M_WAITOK /* XXXKIB */);
2529         for (i = 0; i < num_entries; i++) {
2530                 sg->sg_segs[i].ss_paddr = VM_PAGE_TO_PHYS(pages[i]);
2531                 sg->sg_segs[i].ss_len = PAGE_SIZE;
2532         }
2533
2534 #if 0
2535         error = bus_dma_tag_create(bus_get_dma_tag(dev),
2536             1 /* alignment */, 0 /* boundary */,
2537             1ULL << sc->match->busdma_addr_mask_sz /* lowaddr */,
2538             BUS_SPACE_MAXADDR /* highaddr */,
2539             NULL /* filtfunc */, NULL /* filtfuncarg */,
2540             BUS_SPACE_MAXADDR /* maxsize */,
2541             BUS_SPACE_UNRESTRICTED /* nsegments */,
2542             BUS_SPACE_MAXADDR /* maxsegsz */,
2543             0 /* flags */, NULL /* lockfunc */, NULL /* lockfuncarg */,
2544             &dmat);
2545         if (error != 0) {
2546                 sglist_free(sg);
2547                 return (error);
2548         }
2549         /* XXXKIB */
2550 #endif
2551         *sg_list = sg;
2552         return (0);
2553 }
2554
2555 void
2556 agp_intel_gtt_insert_sg_entries(device_t dev, struct sglist *sg_list,
2557     u_int first_entry, u_int flags)
2558 {
2559         struct agp_i810_softc *sc;
2560         vm_paddr_t spaddr;
2561         size_t slen;
2562         u_int i, j;
2563
2564         sc = device_get_softc(dev);
2565         for (i = j = 0; j < sg_list->sg_nseg; j++) {
2566                 spaddr = sg_list->sg_segs[i].ss_paddr;
2567                 slen = sg_list->sg_segs[i].ss_len;
2568                 for (; slen > 0; i++) {
2569                         sc->match->driver->install_gtt_pte(dev, first_entry + i,
2570                             spaddr, flags);
2571                         spaddr += AGP_PAGE_SIZE;
2572                         slen -= AGP_PAGE_SIZE;
2573                 }
2574         }
2575         sc->match->driver->read_gtt_pte(dev, first_entry + i - 1);
2576 }
2577
2578 void
2579 intel_gtt_clear_range(u_int first_entry, u_int num_entries)
2580 {
2581
2582         agp_intel_gtt_clear_range(intel_agp, first_entry, num_entries);
2583 }
2584
2585 void
2586 intel_gtt_insert_pages(u_int first_entry, u_int num_entries, vm_page_t *pages,
2587     u_int flags)
2588 {
2589
2590         agp_intel_gtt_insert_pages(intel_agp, first_entry, num_entries,
2591             pages, flags);
2592 }
2593
2594 const struct intel_gtt *intel_gtt_get(void)
2595 {
2596         intel_private.base = agp_intel_gtt_get(intel_agp);
2597         return &intel_private.base;
2598 }
2599
2600 int
2601 intel_gtt_chipset_flush(void)
2602 {
2603
2604         return (agp_intel_gtt_chipset_flush(intel_agp));
2605 }
2606
2607 void
2608 intel_gtt_unmap_memory(struct sglist *sg_list)
2609 {
2610
2611         agp_intel_gtt_unmap_memory(intel_agp, sg_list);
2612 }
2613
2614 int
2615 intel_gtt_map_memory(vm_page_t *pages, u_int num_entries,
2616     struct sglist **sg_list)
2617 {
2618
2619         return (agp_intel_gtt_map_memory(intel_agp, pages, num_entries,
2620             sg_list));
2621 }
2622
2623 void
2624 intel_gtt_insert_sg_entries(struct sglist *sg_list, u_int first_entry,
2625     u_int flags)
2626 {
2627
2628         agp_intel_gtt_insert_sg_entries(intel_agp, sg_list, first_entry, flags);
2629 }
2630
2631 vm_paddr_t
2632 intel_gtt_read_pte_paddr(u_int entry)
2633 {
2634         struct agp_i810_softc *sc;
2635
2636         sc = device_get_softc(intel_agp);
2637         return (sc->match->driver->read_gtt_pte_paddr(intel_agp, entry));
2638 }
2639
2640 u_int32_t
2641 intel_gtt_read_pte(u_int entry)
2642 {
2643         struct agp_i810_softc *sc;
2644
2645         sc = device_get_softc(intel_agp);
2646         return (sc->match->driver->read_gtt_pte(intel_agp, entry));
2647 }
2648
2649 void
2650 intel_gtt_write(u_int entry, uint32_t val)
2651 {
2652         struct agp_i810_softc *sc;
2653
2654         sc = device_get_softc(intel_agp);
2655         sc->match->driver->write_gtt(intel_agp, entry, val);
2656 }