2 * Copyright (c) 2000 Matthew C. Forman
4 * Based (heavily) on alpm.c which is:
6 * Copyright (c) 1998, 1999 Nicolas Souchu
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * $FreeBSD: src/sys/pci/amdpm.c,v 1.1.2.1 2001/10/10 12:10:26 murray Exp $
31 * $DragonFly: src/sys/dev/powermng/i386/amdpm/amdpm.c,v 1.2 2003/06/17 04:28:56 dillon Exp $
36 * Power management function/SMBus function support for the AMD 756 chip.
39 #include <sys/param.h>
40 #include <sys/kernel.h>
41 #include <sys/systm.h>
42 #include <sys/module.h>
46 #include <machine/bus_pio.h>
47 #include <machine/bus_memio.h>
48 #include <machine/bus.h>
49 #include <machine/clock.h>
50 #include <machine/resource.h>
53 #include <pci/pcivar.h>
54 #include <pci/pcireg.h>
56 #include <dev/iicbus/iiconf.h>
57 #include <dev/smbus/smbconf.h>
60 #define AMDPM_DEBUG(x) if (amdpm_debug) (x)
63 static int amdpm_debug = 1;
65 static int amdpm_debug = 0;
68 #define AMDPM_VENDORID_AMD 0x1022
69 #define AMDPM_DEVICEID_AMD756PM 0x740b
71 /* PCI Configuration space registers */
72 #define AMDPCI_PMBASE 0x58
74 #define AMDPCI_GEN_CONFIG_PM 0x41
75 #define AMDPCI_PMIOEN (1<<7)
77 #define AMDPCI_SCIINT_CONFIG_PM 0x42
78 #define AMDPCI_SCISEL_IRQ11 11
80 #define AMDPCI_REVID 0x08
84 * Base address programmed via AMDPCI_PMBASE.
86 #define AMDSMB_GLOBAL_STATUS 0xE0
87 #define AMDSMB_GS_TO_STS (1<<5)
88 #define AMDSMB_GS_HCYC_STS (1<<4)
89 #define AMDSMB_GS_HST_STS (1<<3)
90 #define AMDSMB_GS_PRERR_STS (1<<2)
91 #define AMDSMB_GS_COL_STS (1<<1)
92 #define AMDSMB_GS_ABRT_STS (1<<0)
93 #define AMDSMB_GS_CLEAR_STS (AMDSMB_GS_TO_STS|AMDSMB_GS_HCYC_STS|AMDSMB_GS_PRERR_STS|AMDSMB_GS_COL_STS|AMDSMB_GS_ABRT_STS)
95 #define AMDSMB_GLOBAL_ENABLE 0xE2
96 #define AMDSMB_GE_ABORT (1<<5)
97 #define AMDSMB_GE_HCYC_EN (1<<4)
98 #define AMDSMB_GE_HOST_STC (1<<3)
99 #define AMDSMB_GE_CYC_QUICK 0
100 #define AMDSMB_GE_CYC_BYTE 1
101 #define AMDSMB_GE_CYC_BDATA 2
102 #define AMDSMB_GE_CYC_WDATA 3
103 #define AMDSMB_GE_CYC_PROCCALL 4
104 #define AMDSMB_GE_CYC_BLOCK 5
106 #define AMDSMB_HSTADDR 0xE4
107 #define AMDSMB_HSTDATA 0xE6
108 #define AMDSMB_HSTCMD 0xE8
109 #define AMDSMB_HSTDFIFO 0xE9
110 #define AMDSMB_HSLVDATA 0xEA
111 #define AMDSMB_HSLVDA 0xEC
112 #define AMDSMB_HSLVDDR 0xEE
113 #define AMDSMB_SNPADDR 0xEF
118 struct resource *res;
119 bus_space_tag_t smbst;
120 bus_space_handle_t smbsh;
123 struct amdsmb_softc {
126 struct amdpm_softc *amdpm;
129 #define AMDPM_SMBINB(amdsmb,register) \
130 (bus_space_read_1(amdsmb->amdpm->smbst, amdsmb->amdpm->smbsh, register))
131 #define AMDPM_SMBOUTB(amdsmb,register,value) \
132 (bus_space_write_1(amdsmb->amdpm->smbst, amdsmb->amdpm->smbsh, register, value))
133 #define AMDPM_SMBINW(amdsmb,register) \
134 (bus_space_read_2(amdsmb->amdpm->smbst, amdsmb->amdpm->smbsh, register))
135 #define AMDPM_SMBOUTW(amdsmb,register,value) \
136 (bus_space_write_2(amdsmb->amdpm->smbst, amdsmb->amdpm->smbsh, register, value))
138 static int amdsmb_probe(device_t);
139 static int amdsmb_attach(device_t);
140 static int amdsmb_smb_callback(device_t, int, caddr_t *);
141 static int amdsmb_smb_quick(device_t dev, u_char slave, int how);
142 static int amdsmb_smb_sendb(device_t dev, u_char slave, char byte);
143 static int amdsmb_smb_recvb(device_t dev, u_char slave, char *byte);
144 static int amdsmb_smb_writeb(device_t dev, u_char slave, char cmd, char byte);
145 static int amdsmb_smb_readb(device_t dev, u_char slave, char cmd, char *byte);
146 static int amdsmb_smb_writew(device_t dev, u_char slave, char cmd, short word);
147 static int amdsmb_smb_readw(device_t dev, u_char slave, char cmd, short *word);
148 static int amdsmb_smb_bwrite(device_t dev, u_char slave, char cmd, u_char count, char *buf);
149 static int amdsmb_smb_bread(device_t dev, u_char slave, char cmd, u_char count, char *byte);
151 static int amdpm_probe(device_t);
152 static int amdpm_attach(device_t);
156 amdpm_probe(device_t dev)
160 if ((pci_get_vendor(dev) == AMDPM_VENDORID_AMD) &&
161 (pci_get_device(dev) == AMDPM_DEVICEID_AMD756PM)) {
162 device_set_desc(dev, "AMD 756 Power Management Controller");
165 * We have to do this, since the BIOS won't give us the
166 * resource info (not mine, anyway).
168 base = pci_read_config(dev, AMDPCI_PMBASE, 4);
170 bus_set_resource(dev, SYS_RES_IOPORT, AMDPCI_PMBASE, base, 256);
177 amdpm_attach(device_t dev)
179 struct amdpm_softc *amdpm_sc = device_get_softc(dev);
181 int unit = device_get_unit(dev);
182 device_t smbinterface;
184 /* Enable I/O block access */
185 val_b = pci_read_config(dev, AMDPCI_GEN_CONFIG_PM, 1);
186 pci_write_config(dev, AMDPCI_GEN_CONFIG_PM, val_b | AMDPCI_PMIOEN, 1);
188 /* Allocate I/O space */
189 amdpm_sc->rid = AMDPCI_PMBASE;
190 amdpm_sc->res = bus_alloc_resource(dev, SYS_RES_IOPORT, &amdpm_sc->rid, 0, ~0, 1, RF_ACTIVE);
192 if (amdpm_sc->res == NULL) {
193 device_printf(dev, "could not map i/o space\n");
197 amdpm_sc->smbst = rman_get_bustag(amdpm_sc->res);
198 amdpm_sc->smbsh = rman_get_bushandle(amdpm_sc->res);
200 smbinterface = device_add_child(dev, "amdsmb", unit);
202 device_printf(dev, "could not add SMBus device\n");
204 device_probe_and_attach(smbinterface);
210 amdsmb_probe(device_t dev)
212 struct amdsmb_softc *amdsmb_sc = (struct amdsmb_softc *)device_get_softc(dev);
214 /* Allocate a new smbus device */
215 amdsmb_sc->smbus = smbus_alloc_bus(dev);
216 if (!amdsmb_sc->smbus)
219 device_set_desc(dev, "AMD 756 SMBus interface");
220 device_printf(dev, "AMD 756 SMBus interface\n");
226 amdsmb_attach(device_t dev)
228 struct amdsmb_softc *amdsmb_sc = (struct amdsmb_softc *)device_get_softc(dev);
230 amdsmb_sc->amdpm = device_get_softc(device_get_parent(dev));
232 /* Probe and attach the smbus */
233 device_probe_and_attach(amdsmb_sc->smbus);
239 amdsmb_smb_callback(device_t dev, int index, caddr_t *data)
244 case SMB_REQUEST_BUS:
245 case SMB_RELEASE_BUS:
255 amdsmb_clear(struct amdsmb_softc *sc)
257 AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_STATUS, AMDSMB_GS_CLEAR_STS);
264 amdsmb_abort(struct amdsmb_softc *sc)
268 l = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_ENABLE);
269 AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_ENABLE, l | AMDSMB_GE_ABORT);
275 amdsmb_idle(struct amdsmb_softc *sc)
279 sts = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_STATUS);
281 AMDPM_DEBUG(printf("amdpm: busy? STS=0x%x\n", sts));
283 return (~(sts & AMDSMB_GS_HST_STS));
287 * Poll the SMBus controller
290 amdsmb_wait(struct amdsmb_softc *sc)
296 /* Wait for command to complete (SMBus controller is idle) */
299 sts = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_STATUS);
300 if (!(sts & AMDSMB_GS_HST_STS))
304 AMDPM_DEBUG(printf("amdpm: STS=0x%x (count=%d)\n", sts, count));
309 error |= SMB_ETIMEOUT;
311 if (sts & AMDSMB_GS_ABRT_STS)
314 if (sts & AMDSMB_GS_COL_STS)
317 if (sts & AMDSMB_GS_PRERR_STS)
318 error |= SMB_EBUSERR;
320 if (error != SMB_ENOERR)
327 amdsmb_smb_quick(device_t dev, u_char slave, int how)
329 struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
334 if (!amdsmb_idle(sc))
339 AMDPM_DEBUG(printf("amdpm: QWRITE to 0x%x", slave));
340 AMDPM_SMBOUTW(sc, AMDSMB_HSTADDR, slave & ~LSB);
343 AMDPM_DEBUG(printf("amdpm: QREAD to 0x%x", slave));
344 AMDPM_SMBOUTW(sc, AMDSMB_HSTADDR, slave | LSB);
347 panic("%s: unknown QUICK command (%x)!", __FUNCTION__, how);
349 l = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_ENABLE);
350 AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_ENABLE, (l & 0xfff8) | AMDSMB_GE_CYC_QUICK | AMDSMB_GE_HOST_STC);
352 error = amdsmb_wait(sc);
354 AMDPM_DEBUG(printf(", error=0x%x\n", error));
360 amdsmb_smb_sendb(device_t dev, u_char slave, char byte)
362 struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
367 if (!amdsmb_idle(sc))
370 AMDPM_SMBOUTW(sc, AMDSMB_HSTADDR, slave & ~LSB);
371 AMDPM_SMBOUTW(sc, AMDSMB_HSTDATA, byte);
372 l = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_ENABLE);
373 AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_ENABLE, (l & 0xfff8) | AMDSMB_GE_CYC_BYTE | AMDSMB_GE_HOST_STC);
375 error = amdsmb_wait(sc);
377 AMDPM_DEBUG(printf("amdpm: SENDB to 0x%x, byte=0x%x, error=0x%x\n", slave, byte, error));
383 amdsmb_smb_recvb(device_t dev, u_char slave, char *byte)
385 struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
390 if (!amdsmb_idle(sc))
393 AMDPM_SMBOUTW(sc, AMDSMB_HSTADDR, slave | LSB);
394 l = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_ENABLE);
395 AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_ENABLE, (l & 0xfff8) | AMDSMB_GE_CYC_BYTE | AMDSMB_GE_HOST_STC);
397 if ((error = amdsmb_wait(sc)) == SMB_ENOERR)
398 *byte = AMDPM_SMBINW(sc, AMDSMB_HSTDATA);
400 AMDPM_DEBUG(printf("amdpm: RECVB from 0x%x, byte=0x%x, error=0x%x\n", slave, *byte, error));
406 amdsmb_smb_writeb(device_t dev, u_char slave, char cmd, char byte)
408 struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
413 if (!amdsmb_idle(sc))
416 AMDPM_SMBOUTW(sc, AMDSMB_HSTADDR, slave & ~LSB);
417 AMDPM_SMBOUTW(sc, AMDSMB_HSTDATA, byte);
418 AMDPM_SMBOUTB(sc, AMDSMB_HSTCMD, cmd);
419 l = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_ENABLE);
420 AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_ENABLE, (l & 0xfff8) | AMDSMB_GE_CYC_BDATA | AMDSMB_GE_HOST_STC);
422 error = amdsmb_wait(sc);
424 AMDPM_DEBUG(printf("amdpm: WRITEB to 0x%x, cmd=0x%x, byte=0x%x, error=0x%x\n", slave, cmd, byte, error));
430 amdsmb_smb_readb(device_t dev, u_char slave, char cmd, char *byte)
432 struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
437 if (!amdsmb_idle(sc))
440 AMDPM_SMBOUTW(sc, AMDSMB_HSTADDR, slave | LSB);
441 AMDPM_SMBOUTB(sc, AMDSMB_HSTCMD, cmd);
442 l = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_ENABLE);
443 AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_ENABLE, (l & 0xfff8) | AMDSMB_GE_CYC_BDATA | AMDSMB_GE_HOST_STC);
445 if ((error = amdsmb_wait(sc)) == SMB_ENOERR)
446 *byte = AMDPM_SMBINW(sc, AMDSMB_HSTDATA);
448 AMDPM_DEBUG(printf("amdpm: READB from 0x%x, cmd=0x%x, byte=0x%x, error=0x%x\n", slave, cmd, *byte, error));
454 amdsmb_smb_writew(device_t dev, u_char slave, char cmd, short word)
456 struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
461 if (!amdsmb_idle(sc))
464 AMDPM_SMBOUTW(sc, AMDSMB_HSTADDR, slave & ~LSB);
465 AMDPM_SMBOUTW(sc, AMDSMB_HSTDATA, word);
466 AMDPM_SMBOUTB(sc, AMDSMB_HSTCMD, cmd);
467 l = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_ENABLE);
468 AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_ENABLE, (l & 0xfff8) | AMDSMB_GE_CYC_WDATA | AMDSMB_GE_HOST_STC);
470 error = amdsmb_wait(sc);
472 AMDPM_DEBUG(printf("amdpm: WRITEW to 0x%x, cmd=0x%x, word=0x%x, error=0x%x\n", slave, cmd, word, error));
478 amdsmb_smb_readw(device_t dev, u_char slave, char cmd, short *word)
480 struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
485 if (!amdsmb_idle(sc))
488 AMDPM_SMBOUTW(sc, AMDSMB_HSTADDR, slave | LSB);
489 AMDPM_SMBOUTB(sc, AMDSMB_HSTCMD, cmd);
490 l = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_ENABLE);
491 AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_ENABLE, (l & 0xfff8) | AMDSMB_GE_CYC_WDATA | AMDSMB_GE_HOST_STC);
493 if ((error = amdsmb_wait(sc)) == SMB_ENOERR)
494 *word = AMDPM_SMBINW(sc, AMDSMB_HSTDATA);
496 AMDPM_DEBUG(printf("amdpm: READW from 0x%x, cmd=0x%x, word=0x%x, error=0x%x\n", slave, cmd, *word, error));
502 amdsmb_smb_bwrite(device_t dev, u_char slave, char cmd, u_char count, char *buf)
504 struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
505 u_char remain, len, i;
506 int error = SMB_ENOERR;
515 len = min(remain, 32);
517 AMDPM_SMBOUTW(sc, AMDSMB_HSTADDR, slave & ~LSB);
520 * Do we have to reset the internal 32-byte buffer?
521 * Can't see how to do this from the data sheet.
524 AMDPM_SMBOUTW(sc, AMDSMB_HSTDATA, len);
526 /* Fill the 32-byte internal buffer */
527 for (i=0; i<len; i++) {
528 AMDPM_SMBOUTB(sc, AMDSMB_HSTDFIFO, buf[count-remain+i]);
531 AMDPM_SMBOUTB(sc, AMDSMB_HSTCMD, cmd);
532 l = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_ENABLE);
533 AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_ENABLE, (l & 0xfff8) | AMDSMB_GE_CYC_BLOCK | AMDSMB_GE_HOST_STC);
535 if ((error = amdsmb_wait(sc)) != SMB_ENOERR)
542 AMDPM_DEBUG(printf("amdpm: WRITEBLK to 0x%x, count=0x%x, cmd=0x%x, error=0x%x", slave, count, cmd, error));
548 amdsmb_smb_bread(device_t dev, u_char slave, char cmd, u_char count, char *buf)
550 struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
551 u_char remain, len, i;
552 int error = SMB_ENOERR;
556 if (!amdsmb_idle(sc))
561 AMDPM_SMBOUTW(sc, AMDSMB_HSTADDR, slave | LSB);
563 AMDPM_SMBOUTB(sc, AMDSMB_HSTCMD, cmd);
565 l = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_ENABLE);
566 AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_ENABLE, (l & 0xfff8) | AMDSMB_GE_CYC_BLOCK | AMDSMB_GE_HOST_STC);
568 if ((error = amdsmb_wait(sc)) != SMB_ENOERR)
571 len = AMDPM_SMBINW(sc, AMDSMB_HSTDATA);
573 /* Read the 32-byte internal buffer */
574 for (i=0; i<len; i++) {
575 buf[count-remain+i] = AMDPM_SMBINB(sc, AMDSMB_HSTDFIFO);
582 AMDPM_DEBUG(printf("amdpm: READBLK to 0x%x, count=0x%x, cmd=0x%x, error=0x%x", slave, count, cmd, error));
587 static devclass_t amdpm_devclass;
589 static device_method_t amdpm_methods[] = {
590 /* Device interface */
591 DEVMETHOD(device_probe, amdpm_probe),
592 DEVMETHOD(device_attach, amdpm_attach),
597 static driver_t amdpm_driver = {
600 sizeof(struct amdpm_softc),
603 static devclass_t amdsmb_devclass;
605 static device_method_t amdsmb_methods[] = {
606 /* Device interface */
607 DEVMETHOD(device_probe, amdsmb_probe),
608 DEVMETHOD(device_attach, amdsmb_attach),
611 DEVMETHOD(bus_print_child, bus_generic_print_child),
613 /* SMBus interface */
614 DEVMETHOD(smbus_callback, amdsmb_smb_callback),
615 DEVMETHOD(smbus_quick, amdsmb_smb_quick),
616 DEVMETHOD(smbus_sendb, amdsmb_smb_sendb),
617 DEVMETHOD(smbus_recvb, amdsmb_smb_recvb),
618 DEVMETHOD(smbus_writeb, amdsmb_smb_writeb),
619 DEVMETHOD(smbus_readb, amdsmb_smb_readb),
620 DEVMETHOD(smbus_writew, amdsmb_smb_writew),
621 DEVMETHOD(smbus_readw, amdsmb_smb_readw),
622 DEVMETHOD(smbus_bwrite, amdsmb_smb_bwrite),
623 DEVMETHOD(smbus_bread, amdsmb_smb_bread),
628 static driver_t amdsmb_driver = {
631 sizeof(struct amdsmb_softc),
634 DRIVER_MODULE(amdpm, pci, amdpm_driver, amdpm_devclass, 0, 0);
635 DRIVER_MODULE(amdsmb, amdpm, amdsmb_driver, amdsmb_devclass, 0, 0);