3 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Bill Paul.
16 * 4. Neither the name of the author nor the names of any co-contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
32 * $FreeBSD: src/sys/dev/mii/brgphy.c,v 1.1.2.7 2003/05/11 18:00:55 ps Exp $
33 * $DragonFly: src/sys/dev/netif/mii_layer/brgphy.c,v 1.3 2003/08/07 21:17:03 dillon Exp $
35 * $FreeBSD: src/sys/dev/mii/brgphy.c,v 1.1.2.7 2003/05/11 18:00:55 ps Exp $
39 * Driver for the Broadcom BCR5400 1000baseTX PHY. Speed is always
40 * 1000mbps; all we need to negotiate here is full or half duplex.
43 #include <sys/param.h>
44 #include <sys/systm.h>
45 #include <sys/kernel.h>
46 #include <sys/socket.h>
49 #include <machine/clock.h>
52 #include <net/if_media.h>
58 #include "brgphyreg.h"
60 #include "miibus_if.h"
62 static int brgphy_probe(device_t);
63 static int brgphy_attach(device_t);
64 static int brgphy_detach(device_t);
66 static device_method_t brgphy_methods[] = {
67 /* device interface */
68 DEVMETHOD(device_probe, brgphy_probe),
69 DEVMETHOD(device_attach, brgphy_attach),
70 DEVMETHOD(device_detach, brgphy_detach),
71 DEVMETHOD(device_shutdown, bus_generic_shutdown),
75 static devclass_t brgphy_devclass;
77 static driver_t brgphy_driver = {
80 sizeof(struct mii_softc)
83 DRIVER_MODULE(brgphy, miibus, brgphy_driver, brgphy_devclass, 0, 0);
85 static int brgphy_service(struct mii_softc *, struct mii_data *, int);
86 static void brgphy_status(struct mii_softc *);
87 static int brgphy_mii_phy_auto(struct mii_softc *);
88 static void brgphy_reset(struct mii_softc *);
89 static void brgphy_loop(struct mii_softc *);
90 static void bcm5401_load_dspcode(struct mii_softc *);
91 static void bcm5411_load_dspcode(struct mii_softc *);
92 static void bcm5703_load_dspcode(struct mii_softc *);
93 static int brgphy_mii_model;
95 static int brgphy_probe(dev)
98 struct mii_attach_args *ma;
100 ma = device_get_ivars(dev);
102 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM &&
103 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5400) {
104 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5400);
108 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM &&
109 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5401) {
110 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5401);
114 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM &&
115 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5411) {
116 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5411);
120 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM &&
121 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5701) {
122 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5701);
126 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM &&
127 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5703) {
128 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5703);
132 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM &&
133 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5704) {
134 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5704);
145 struct mii_softc *sc;
146 struct mii_attach_args *ma;
147 struct mii_data *mii;
148 const char *sep = "";
150 sc = device_get_softc(dev);
151 ma = device_get_ivars(dev);
152 sc->mii_dev = device_get_parent(dev);
153 mii = device_get_softc(sc->mii_dev);
154 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
156 sc->mii_inst = mii->mii_instance;
157 sc->mii_phy = ma->mii_phyno;
158 sc->mii_service = brgphy_service;
161 sc->mii_flags |= MIIF_NOISOLATE;
164 #define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL)
165 #define PRINT(s) printf("%s%s", sep, s); sep = ", "
167 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst),
170 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, sc->mii_inst),
171 BMCR_LOOP|BMCR_S100);
174 brgphy_mii_model = MII_MODEL(ma->mii_id2);
177 sc->mii_capabilities =
178 PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
179 device_printf(dev, " ");
180 if (sc->mii_capabilities & BMSR_MEDIAMASK)
181 mii_add_media(mii, (sc->mii_capabilities & ~BMSR_ANEG),
183 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_TX, 0, sc->mii_inst),
185 PRINT(", 1000baseTX");
186 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_TX, IFM_FDX, sc->mii_inst), 0);
187 PRINT("1000baseTX-FDX");
188 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst), 0);
195 MIIBUS_MEDIAINIT(sc->mii_dev);
203 struct mii_softc *sc;
204 struct mii_data *mii;
206 sc = device_get_softc(dev);
207 mii = device_get_softc(device_get_parent(dev));
209 LIST_REMOVE(sc, mii_list);
215 brgphy_service(sc, mii, cmd)
216 struct mii_softc *sc;
217 struct mii_data *mii;
220 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
226 * If we're not polling our PHY instance, just return.
228 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
234 * If the media indicates a different PHY instance,
237 if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
238 reg = PHY_READ(sc, MII_BMCR);
239 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
244 * If the interface is not up, don't do anything.
246 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
249 brgphy_reset(sc); /* XXX hardware bug work-around */
251 switch (IFM_SUBTYPE(ife->ifm_media)) {
255 * If we're already in auto mode, just return.
257 if (PHY_READ(sc, BRGPHY_MII_BMCR) & BRGPHY_BMCR_AUTOEN)
260 (void) brgphy_mii_phy_auto(sc);
263 speed = BRGPHY_S1000;
272 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) {
273 speed |= BRGPHY_BMCR_FDX;
274 gig = BRGPHY_1000CTL_AFD;
276 gig = BRGPHY_1000CTL_AHD;
279 PHY_WRITE(sc, BRGPHY_MII_1000CTL, 0);
280 PHY_WRITE(sc, BRGPHY_MII_BMCR, speed);
281 PHY_WRITE(sc, BRGPHY_MII_ANAR, BRGPHY_SEL_TYPE);
283 if (IFM_SUBTYPE(ife->ifm_media) != IFM_1000_TX)
286 PHY_WRITE(sc, BRGPHY_MII_1000CTL, gig);
287 PHY_WRITE(sc, BRGPHY_MII_BMCR,
288 speed|BRGPHY_BMCR_AUTOEN|BRGPHY_BMCR_STARTNEG);
290 if (brgphy_mii_model != MII_MODEL_xxBROADCOM_BCM5701)
294 * When settning the link manually, one side must
295 * be the master and the other the slave. However
296 * ifmedia doesn't give us a good way to specify
297 * this, so we fake it by using one of the LINK
298 * flags. If LINK0 is set, we program the PHY to
299 * be a master, otherwise it's a slave.
301 if ((mii->mii_ifp->if_flags & IFF_LINK0)) {
302 PHY_WRITE(sc, BRGPHY_MII_1000CTL,
303 gig|BRGPHY_1000CTL_MSE|BRGPHY_1000CTL_MSC);
305 PHY_WRITE(sc, BRGPHY_MII_1000CTL,
306 gig|BRGPHY_1000CTL_MSE);
311 PHY_WRITE(sc, MII_BMCR, BMCR_ISO|BMCR_PDOWN);
322 * If we're not currently selected, just return.
324 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
328 * Only used for autonegotiation.
330 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
334 * Is the interface even up?
336 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
340 * Check to see if we have link. If we do, we don't
341 * need to restart the autonegotiation process. Read
342 * the BMSR twice in case it's latched.
344 reg = PHY_READ(sc, BRGPHY_MII_AUXSTS);
345 if (reg & BRGPHY_AUXSTS_LINK)
349 * Only retry autonegotiation every 5 seconds.
351 if (++sc->mii_ticks != 5)
355 brgphy_mii_phy_auto(sc);
359 /* Update the media status. */
363 * Callback if something changed. Note that we need to poke
364 * the DSP on the Broadcom PHYs if the media changes.
366 if (sc->mii_active != mii->mii_media_active || cmd == MII_MEDIACHG) {
367 MIIBUS_STATCHG(sc->mii_dev);
368 sc->mii_active = mii->mii_media_active;
369 switch (brgphy_mii_model) {
370 case MII_MODEL_xxBROADCOM_BCM5401:
371 bcm5401_load_dspcode(sc);
373 case MII_MODEL_xxBROADCOM_BCM5411:
374 bcm5411_load_dspcode(sc);
383 struct mii_softc *sc;
385 struct mii_data *mii = sc->mii_pdata;
386 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
389 mii->mii_media_status = IFM_AVALID;
390 mii->mii_media_active = IFM_ETHER;
392 bmsr = PHY_READ(sc, BRGPHY_MII_BMSR);
393 if (PHY_READ(sc, BRGPHY_MII_AUXSTS) & BRGPHY_AUXSTS_LINK)
394 mii->mii_media_status |= IFM_ACTIVE;
396 bmcr = PHY_READ(sc, BRGPHY_MII_BMCR);
398 if (bmcr & BRGPHY_BMCR_LOOP)
399 mii->mii_media_active |= IFM_LOOP;
401 if (bmcr & BRGPHY_BMCR_AUTOEN) {
402 if ((bmsr & BRGPHY_BMSR_ACOMP) == 0) {
403 /* Erg, still trying, I guess... */
404 mii->mii_media_active |= IFM_NONE;
408 switch (PHY_READ(sc, BRGPHY_MII_AUXSTS) &
409 BRGPHY_AUXSTS_AN_RES) {
410 case BRGPHY_RES_1000FD:
411 mii->mii_media_active |= IFM_1000_TX | IFM_FDX;
413 case BRGPHY_RES_1000HD:
414 mii->mii_media_active |= IFM_1000_TX | IFM_HDX;
416 case BRGPHY_RES_100FD:
417 mii->mii_media_active |= IFM_100_TX | IFM_FDX;
419 case BRGPHY_RES_100T4:
420 mii->mii_media_active |= IFM_100_T4;
422 case BRGPHY_RES_100HD:
423 mii->mii_media_active |= IFM_100_TX | IFM_HDX;
425 case BRGPHY_RES_10FD:
426 mii->mii_media_active |= IFM_10_T | IFM_FDX;
428 case BRGPHY_RES_10HD:
429 mii->mii_media_active |= IFM_10_T | IFM_HDX;
432 mii->mii_media_active |= IFM_NONE;
438 mii->mii_media_active = ife->ifm_media;
445 brgphy_mii_phy_auto(mii)
446 struct mii_softc *mii;
452 ktcr = BRGPHY_1000CTL_AFD|BRGPHY_1000CTL_AHD;
453 if (brgphy_mii_model == MII_MODEL_xxBROADCOM_BCM5701)
454 ktcr |= BRGPHY_1000CTL_MSE|BRGPHY_1000CTL_MSC;
455 PHY_WRITE(mii, BRGPHY_MII_1000CTL, ktcr);
456 ktcr = PHY_READ(mii, BRGPHY_MII_1000CTL);
458 PHY_WRITE(mii, BRGPHY_MII_ANAR,
459 BMSR_MEDIA_TO_ANAR(mii->mii_capabilities) | ANAR_CSMA);
461 PHY_WRITE(mii, BRGPHY_MII_BMCR,
462 BRGPHY_BMCR_AUTOEN | BRGPHY_BMCR_STARTNEG);
463 PHY_WRITE(mii, BRGPHY_MII_IMR, 0xFF00);
464 return (EJUSTRETURN);
468 brgphy_loop(struct mii_softc *sc)
473 PHY_WRITE(sc, BRGPHY_MII_BMCR, BRGPHY_BMCR_LOOP);
474 for (i = 0; i < 15000; i++) {
475 bmsr = PHY_READ(sc, BRGPHY_MII_BMSR);
476 if (!(bmsr & BRGPHY_BMSR_LINK)) {
478 device_printf(sc->mii_dev, "looped %d\n", i);
486 /* Turn off tap power management on 5401. */
488 bcm5401_load_dspcode(struct mii_softc *sc)
490 static const struct {
494 { BRGPHY_MII_AUXCTL, 0x0c20 },
495 { BRGPHY_MII_DSP_ADDR_REG, 0x0012 },
496 { BRGPHY_MII_DSP_RW_PORT, 0x1804 },
497 { BRGPHY_MII_DSP_ADDR_REG, 0x0013 },
498 { BRGPHY_MII_DSP_RW_PORT, 0x1204 },
499 { BRGPHY_MII_DSP_ADDR_REG, 0x8006 },
500 { BRGPHY_MII_DSP_RW_PORT, 0x0132 },
501 { BRGPHY_MII_DSP_ADDR_REG, 0x8006 },
502 { BRGPHY_MII_DSP_RW_PORT, 0x0232 },
503 { BRGPHY_MII_DSP_ADDR_REG, 0x201f },
504 { BRGPHY_MII_DSP_RW_PORT, 0x0a20 },
509 for (i = 0; dspcode[i].reg != 0; i++)
510 PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
515 bcm5411_load_dspcode(struct mii_softc *sc)
517 static const struct {
528 for (i = 0; dspcode[i].reg != 0; i++)
529 PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
533 bcm5703_load_dspcode(struct mii_softc *sc)
535 static const struct {
539 { BRGPHY_MII_AUXCTL, 0x0c00 },
540 { BRGPHY_MII_DSP_ADDR_REG, 0x201f },
541 { BRGPHY_MII_DSP_RW_PORT, 0x2aaa },
546 for (i = 0; dspcode[i].reg != 0; i++)
547 PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
551 bcm5704_load_dspcode(struct mii_softc *sc)
553 static const struct {
563 for (i = 0; dspcode[i].reg != 0; i++)
564 PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
568 brgphy_reset(struct mii_softc *sc)
574 switch (brgphy_mii_model) {
575 case MII_MODEL_xxBROADCOM_BCM5401:
576 bcm5401_load_dspcode(sc);
578 case MII_MODEL_xxBROADCOM_BCM5411:
579 bcm5411_load_dspcode(sc);
581 case MII_MODEL_xxBROADCOM_BCM5703:
582 bcm5703_load_dspcode(sc);
584 case MII_MODEL_xxBROADCOM_BCM5704:
585 bcm5704_load_dspcode(sc);
589 /* Enable Ethernet@WireSpeed. */
590 PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x7007);
591 val = PHY_READ(sc, BRGPHY_MII_AUXCTL);
592 PHY_WRITE(sc, BRGPHY_MII_AUXCTL, val | (1 << 15) || (1 << 4));