2 * Copyright (c) 2007-2009 Damien Bergamini <damien.bergamini@free.fr>
3 * Copyright (c) 2008 Benjamin Close <benjsc@FreeBSD.org>
4 * Copyright (c) 2008 Sam Leffler, Errno Consulting
5 * Copyright (c) 2011 Intel Corporation
6 * Copyright (c) 2013 Cedric GROSS <c.gross@kreiz-it.fr>
7 * Copyright (c) 2013 Adrian Chadd <adrian@FreeBSD.org>
9 * Permission to use, copy, modify, and distribute this software for any
10 * purpose with or without fee is hereby granted, provided that the above
11 * copyright notice and this permission notice appear in all copies.
13 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
14 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
16 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
17 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
18 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
19 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
21 * $FreeBSD: head/sys/dev/iwn/if_iwn.c 258118 2013-11-14 07:27:00Z adrian $
25 * Driver for Intel WiFi Link 4965 and 1000/5000/6000 Series 802.11 network
32 #include <sys/param.h>
33 #include <sys/sockio.h>
34 #include <sys/sysctl.h>
36 #include <sys/kernel.h>
37 #include <sys/socket.h>
38 #include <sys/systm.h>
39 #include <sys/malloc.h>
40 #include <sys/stdbool.h>
43 #include <sys/endian.h>
44 #include <sys/firmware.h>
45 #include <sys/limits.h>
46 #include <sys/module.h>
47 #include <sys/queue.h>
48 #include <sys/taskqueue.h>
49 #include <sys/libkern.h>
51 #include <sys/resource.h>
52 #include <machine/clock.h>
54 #include <bus/pci/pcireg.h>
55 #include <bus/pci/pcivar.h>
59 #include <net/if_var.h>
60 #include <net/if_arp.h>
61 #include <net/ifq_var.h>
62 #include <net/ethernet.h>
63 #include <net/if_dl.h>
64 #include <net/if_media.h>
65 #include <net/if_types.h>
67 #include <netinet/in.h>
68 #include <netinet/in_systm.h>
69 #include <netinet/in_var.h>
70 #include <netinet/if_ether.h>
71 #include <netinet/ip.h>
73 #include <netproto/802_11/ieee80211_var.h>
74 #include <netproto/802_11/ieee80211_radiotap.h>
75 #include <netproto/802_11/ieee80211_regdomain.h>
76 #include <netproto/802_11/ieee80211_ratectl.h>
78 #include "if_iwnreg.h"
79 #include "if_iwnvar.h"
80 #include "if_iwn_devid.h"
81 #include "if_iwn_chip_cfg.h"
82 #include "if_iwn_debug.h"
83 #include "if_iwn_ioctl.h"
86 #define IWN_UNLOCK(sc)
94 static const struct iwn_ident iwn_ident_table[] = {
95 { 0x8086, IWN_DID_6x05_1, "Intel Centrino Advanced-N 6205" },
96 { 0x8086, IWN_DID_1000_1, "Intel Centrino Wireless-N 1000" },
97 { 0x8086, IWN_DID_1000_2, "Intel Centrino Wireless-N 1000" },
98 { 0x8086, IWN_DID_6x05_2, "Intel Centrino Advanced-N 6205" },
99 { 0x8086, IWN_DID_6050_1, "Intel Centrino Advanced-N + WiMAX 6250" },
100 { 0x8086, IWN_DID_6050_2, "Intel Centrino Advanced-N + WiMAX 6250" },
101 { 0x8086, IWN_DID_x030_1, "Intel Centrino Wireless-N 1030" },
102 { 0x8086, IWN_DID_x030_2, "Intel Centrino Wireless-N 1030" },
103 { 0x8086, IWN_DID_x030_3, "Intel Centrino Advanced-N 6230" },
104 { 0x8086, IWN_DID_x030_4, "Intel Centrino Advanced-N 6230" },
105 { 0x8086, IWN_DID_6150_1, "Intel Centrino Wireless-N + WiMAX 6150" },
106 { 0x8086, IWN_DID_6150_2, "Intel Centrino Wireless-N + WiMAX 6150" },
107 { 0x8086, IWN_DID_2x00_1, "Intel(R) Centrino(R) Wireless-N 2200 BGN" },
108 { 0x8086, IWN_DID_2x00_2, "Intel(R) Centrino(R) Wireless-N 2200 BGN" },
109 /* XXX 2200D is IWN_SDID_2x00_4; there's no way to express this here! */
110 { 0x8086, IWN_DID_2x30_1, "Intel Centrino Wireless-N 2230" },
111 { 0x8086, IWN_DID_2x30_2, "Intel Centrino Wireless-N 2230" },
112 { 0x8086, IWN_DID_130_1, "Intel Centrino Wireless-N 130" },
113 { 0x8086, IWN_DID_130_2, "Intel Centrino Wireless-N 130" },
114 { 0x8086, IWN_DID_100_1, "Intel Centrino Wireless-N 100" },
115 { 0x8086, IWN_DID_100_2, "Intel Centrino Wireless-N 100" },
116 { 0x8086, IWN_DID_105_1, "Intel Centrino Wireless-N 105" },
117 { 0x8086, IWN_DID_105_2, "Intel Centrino Wireless-N 105" },
118 { 0x8086, IWN_DID_135_1, "Intel Centrino Wireless-N 135" },
119 { 0x8086, IWN_DID_135_2, "Intel Centrino Wireless-N 135" },
120 { 0x8086, IWN_DID_4965_1, "Intel Wireless WiFi Link 4965" },
121 { 0x8086, IWN_DID_6x00_1, "Intel Centrino Ultimate-N 6300" },
122 { 0x8086, IWN_DID_6x00_2, "Intel Centrino Advanced-N 6200" },
123 { 0x8086, IWN_DID_4965_2, "Intel Wireless WiFi Link 4965" },
124 { 0x8086, IWN_DID_4965_3, "Intel Wireless WiFi Link 4965" },
125 { 0x8086, IWN_DID_5x00_1, "Intel WiFi Link 5100" },
126 { 0x8086, IWN_DID_4965_4, "Intel Wireless WiFi Link 4965" },
127 { 0x8086, IWN_DID_5x00_3, "Intel Ultimate N WiFi Link 5300" },
128 { 0x8086, IWN_DID_5x00_4, "Intel Ultimate N WiFi Link 5300" },
129 { 0x8086, IWN_DID_5x00_2, "Intel WiFi Link 5100" },
130 { 0x8086, IWN_DID_6x00_3, "Intel Centrino Ultimate-N 6300" },
131 { 0x8086, IWN_DID_6x00_4, "Intel Centrino Advanced-N 6200" },
132 { 0x8086, IWN_DID_5x50_1, "Intel WiMAX/WiFi Link 5350" },
133 { 0x8086, IWN_DID_5x50_2, "Intel WiMAX/WiFi Link 5350" },
134 { 0x8086, IWN_DID_5x50_3, "Intel WiMAX/WiFi Link 5150" },
135 { 0x8086, IWN_DID_5x50_4, "Intel WiMAX/WiFi Link 5150" },
136 { 0x8086, IWN_DID_6035_1, "Intel Centrino Advanced 6235" },
137 { 0x8086, IWN_DID_6035_2, "Intel Centrino Advanced 6235" },
141 static int iwn_pci_probe(device_t);
142 static int iwn_pci_attach(device_t);
143 static int iwn4965_attach(struct iwn_softc *, uint16_t);
144 static int iwn5000_attach(struct iwn_softc *, uint16_t);
145 static int iwn_config_specific(struct iwn_softc *, uint16_t);
146 static void iwn_radiotap_attach(struct iwn_softc *);
147 static void iwn_sysctlattach(struct iwn_softc *);
148 static struct ieee80211vap *iwn_vap_create(struct ieee80211com *,
149 const char [IFNAMSIZ], int, enum ieee80211_opmode, int,
150 const uint8_t [IEEE80211_ADDR_LEN],
151 const uint8_t [IEEE80211_ADDR_LEN]);
152 static void iwn_vap_delete(struct ieee80211vap *);
153 static int iwn_pci_detach(device_t);
154 static int iwn_pci_shutdown(device_t);
155 static int iwn_pci_suspend(device_t);
156 static int iwn_pci_resume(device_t);
157 static int iwn_nic_lock(struct iwn_softc *);
158 static int iwn_eeprom_lock(struct iwn_softc *);
159 static int iwn_init_otprom(struct iwn_softc *);
160 static int iwn_read_prom_data(struct iwn_softc *, uint32_t, void *, int);
161 static void iwn_dma_map_addr(void *, bus_dma_segment_t *, int, int);
162 static int iwn_dma_contig_alloc(struct iwn_softc *, struct iwn_dma_info *,
163 void **, bus_size_t, bus_size_t);
164 static void iwn_dma_contig_free(struct iwn_dma_info *);
165 static int iwn_alloc_sched(struct iwn_softc *);
166 static void iwn_free_sched(struct iwn_softc *);
167 static int iwn_alloc_kw(struct iwn_softc *);
168 static void iwn_free_kw(struct iwn_softc *);
169 static int iwn_alloc_ict(struct iwn_softc *);
170 static void iwn_free_ict(struct iwn_softc *);
171 static int iwn_alloc_fwmem(struct iwn_softc *);
172 static void iwn_free_fwmem(struct iwn_softc *);
173 static int iwn_alloc_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
174 static void iwn_reset_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
175 static void iwn_free_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
176 static int iwn_alloc_tx_ring(struct iwn_softc *, struct iwn_tx_ring *,
178 static void iwn_reset_tx_ring(struct iwn_softc *, struct iwn_tx_ring *);
179 static void iwn_free_tx_ring(struct iwn_softc *, struct iwn_tx_ring *);
180 static void iwn5000_ict_reset(struct iwn_softc *);
181 static int iwn_read_eeprom(struct iwn_softc *,
182 uint8_t macaddr[IEEE80211_ADDR_LEN]);
183 static void iwn4965_read_eeprom(struct iwn_softc *);
185 static void iwn4965_print_power_group(struct iwn_softc *, int);
187 static void iwn5000_read_eeprom(struct iwn_softc *);
188 static uint32_t iwn_eeprom_channel_flags(struct iwn_eeprom_chan *);
189 static void iwn_read_eeprom_band(struct iwn_softc *, int);
190 static void iwn_read_eeprom_ht40(struct iwn_softc *, int);
191 static void iwn_read_eeprom_channels(struct iwn_softc *, int, uint32_t);
192 static struct iwn_eeprom_chan *iwn_find_eeprom_channel(struct iwn_softc *,
193 struct ieee80211_channel *);
194 static int iwn_setregdomain(struct ieee80211com *,
195 struct ieee80211_regdomain *, int,
196 struct ieee80211_channel[]);
197 static void iwn_read_eeprom_enhinfo(struct iwn_softc *);
198 static struct ieee80211_node *iwn_node_alloc(struct ieee80211vap *,
199 const uint8_t mac[IEEE80211_ADDR_LEN]);
200 static void iwn_newassoc(struct ieee80211_node *, int);
201 static int iwn_media_change(struct ifnet *);
202 static int iwn_newstate(struct ieee80211vap *, enum ieee80211_state, int);
203 static void iwn_calib_timeout(void *);
204 static void iwn_rx_phy(struct iwn_softc *, struct iwn_rx_desc *,
205 struct iwn_rx_data *);
206 static void iwn_rx_done(struct iwn_softc *, struct iwn_rx_desc *,
207 struct iwn_rx_data *);
208 static void iwn_rx_compressed_ba(struct iwn_softc *, struct iwn_rx_desc *,
209 struct iwn_rx_data *);
210 static void iwn5000_rx_calib_results(struct iwn_softc *,
211 struct iwn_rx_desc *, struct iwn_rx_data *);
212 static void iwn_rx_statistics(struct iwn_softc *, struct iwn_rx_desc *,
213 struct iwn_rx_data *);
214 static void iwn4965_tx_done(struct iwn_softc *, struct iwn_rx_desc *,
215 struct iwn_rx_data *);
216 static void iwn5000_tx_done(struct iwn_softc *, struct iwn_rx_desc *,
217 struct iwn_rx_data *);
218 static void iwn_tx_done(struct iwn_softc *, struct iwn_rx_desc *, int,
220 static void iwn_ampdu_tx_done(struct iwn_softc *, int, int, int, void *);
221 static void iwn_cmd_done(struct iwn_softc *, struct iwn_rx_desc *);
222 static void iwn_notif_intr(struct iwn_softc *);
223 static void iwn_wakeup_intr(struct iwn_softc *);
224 static void iwn_rftoggle_intr(struct iwn_softc *);
225 static void iwn_fatal_intr(struct iwn_softc *);
226 static void iwn_intr(void *);
227 static void iwn4965_update_sched(struct iwn_softc *, int, int, uint8_t,
229 static void iwn5000_update_sched(struct iwn_softc *, int, int, uint8_t,
232 static void iwn5000_reset_sched(struct iwn_softc *, int, int);
234 static int iwn_tx_data(struct iwn_softc *, struct mbuf *,
235 struct ieee80211_node *);
236 static int iwn_tx_data_raw(struct iwn_softc *, struct mbuf *,
237 struct ieee80211_node *,
238 const struct ieee80211_bpf_params *params);
239 static int iwn_raw_xmit(struct ieee80211_node *, struct mbuf *,
240 const struct ieee80211_bpf_params *);
241 static void iwn_start(struct ifnet *, struct ifaltq_subque *);
242 static void iwn_start_locked(struct ifnet *);
243 static void iwn_watchdog_timeout(void *);
244 static int iwn_ioctl(struct ifnet *, u_long, caddr_t, struct ucred *);
245 static int iwn_cmd(struct iwn_softc *, int, const void *, int, int);
246 static int iwn4965_add_node(struct iwn_softc *, struct iwn_node_info *,
248 static int iwn5000_add_node(struct iwn_softc *, struct iwn_node_info *,
250 static int iwn_set_link_quality(struct iwn_softc *,
251 struct ieee80211_node *);
252 static int iwn_add_broadcast_node(struct iwn_softc *, int);
253 static int iwn_updateedca(struct ieee80211com *);
254 static void iwn_update_mcast(struct ifnet *);
255 static void iwn_set_led(struct iwn_softc *, uint8_t, uint8_t, uint8_t);
256 static int iwn_set_critical_temp(struct iwn_softc *);
257 static int iwn_set_timing(struct iwn_softc *, struct ieee80211_node *);
258 static void iwn4965_power_calibration(struct iwn_softc *, int);
259 static int iwn4965_set_txpower(struct iwn_softc *,
260 struct ieee80211_channel *, int);
261 static int iwn5000_set_txpower(struct iwn_softc *,
262 struct ieee80211_channel *, int);
263 static int iwn4965_get_rssi(struct iwn_softc *, struct iwn_rx_stat *);
264 static int iwn5000_get_rssi(struct iwn_softc *, struct iwn_rx_stat *);
265 static int iwn_get_noise(const struct iwn_rx_general_stats *);
266 static int iwn4965_get_temperature(struct iwn_softc *);
267 static int iwn5000_get_temperature(struct iwn_softc *);
268 static int iwn_init_sensitivity(struct iwn_softc *);
269 static void iwn_collect_noise(struct iwn_softc *,
270 const struct iwn_rx_general_stats *);
271 static int iwn4965_init_gains(struct iwn_softc *);
272 static int iwn5000_init_gains(struct iwn_softc *);
273 static int iwn4965_set_gains(struct iwn_softc *);
274 static int iwn5000_set_gains(struct iwn_softc *);
275 static void iwn_tune_sensitivity(struct iwn_softc *,
276 const struct iwn_rx_stats *);
277 static void iwn_save_stats_counters(struct iwn_softc *,
278 const struct iwn_stats *);
279 static int iwn_send_sensitivity(struct iwn_softc *);
280 static void iwn_check_rx_recovery(struct iwn_softc *, struct iwn_stats *);
281 static int iwn_set_pslevel(struct iwn_softc *, int, int, int);
282 static int iwn_send_btcoex(struct iwn_softc *);
283 static int iwn_send_advanced_btcoex(struct iwn_softc *);
284 static int iwn5000_runtime_calib(struct iwn_softc *);
285 static int iwn_config(struct iwn_softc *);
286 static uint8_t *ieee80211_add_ssid(uint8_t *, const uint8_t *, u_int);
287 static int iwn_scan(struct iwn_softc *, struct ieee80211vap *,
288 struct ieee80211_scan_state *, struct ieee80211_channel *);
289 static int iwn_auth(struct iwn_softc *, struct ieee80211vap *vap);
290 static int iwn_run(struct iwn_softc *, struct ieee80211vap *vap);
291 static int iwn_ampdu_rx_start(struct ieee80211_node *,
292 struct ieee80211_rx_ampdu *, int, int, int);
293 static void iwn_ampdu_rx_stop(struct ieee80211_node *,
294 struct ieee80211_rx_ampdu *);
295 static int iwn_addba_request(struct ieee80211_node *,
296 struct ieee80211_tx_ampdu *, int, int, int);
297 static int iwn_addba_response(struct ieee80211_node *,
298 struct ieee80211_tx_ampdu *, int, int, int);
299 static int iwn_ampdu_tx_start(struct ieee80211com *,
300 struct ieee80211_node *, uint8_t);
301 static void iwn_ampdu_tx_stop(struct ieee80211_node *,
302 struct ieee80211_tx_ampdu *);
303 static void iwn4965_ampdu_tx_start(struct iwn_softc *,
304 struct ieee80211_node *, int, uint8_t, uint16_t);
305 static void iwn4965_ampdu_tx_stop(struct iwn_softc *, int,
307 static void iwn5000_ampdu_tx_start(struct iwn_softc *,
308 struct ieee80211_node *, int, uint8_t, uint16_t);
309 static void iwn5000_ampdu_tx_stop(struct iwn_softc *, int,
311 static int iwn5000_query_calibration(struct iwn_softc *);
312 static int iwn5000_send_calibration(struct iwn_softc *);
313 static int iwn5000_send_wimax_coex(struct iwn_softc *);
314 static int iwn5000_crystal_calib(struct iwn_softc *);
315 static int iwn5000_temp_offset_calib(struct iwn_softc *);
316 static int iwn5000_temp_offset_calibv2(struct iwn_softc *);
317 static int iwn4965_post_alive(struct iwn_softc *);
318 static int iwn5000_post_alive(struct iwn_softc *);
319 static int iwn4965_load_bootcode(struct iwn_softc *, const uint8_t *,
321 static int iwn4965_load_firmware(struct iwn_softc *);
322 static int iwn5000_load_firmware_section(struct iwn_softc *, uint32_t,
323 const uint8_t *, int);
324 static int iwn5000_load_firmware(struct iwn_softc *);
325 static int iwn_read_firmware_leg(struct iwn_softc *,
326 struct iwn_fw_info *);
327 static int iwn_read_firmware_tlv(struct iwn_softc *,
328 struct iwn_fw_info *, uint16_t);
329 static int iwn_read_firmware(struct iwn_softc *);
330 static int iwn_clock_wait(struct iwn_softc *);
331 static int iwn_apm_init(struct iwn_softc *);
332 static void iwn_apm_stop_master(struct iwn_softc *);
333 static void iwn_apm_stop(struct iwn_softc *);
334 static int iwn4965_nic_config(struct iwn_softc *);
335 static int iwn5000_nic_config(struct iwn_softc *);
336 static int iwn_hw_prepare(struct iwn_softc *);
337 static int iwn_hw_init(struct iwn_softc *);
338 static void iwn_hw_stop(struct iwn_softc *);
339 static void iwn_radio_on_task(void *, int);
340 static void iwn_radio_off_task(void *, int);
341 static void iwn_panicked_task(void *, int);
342 static void iwn_init_locked(struct iwn_softc *);
343 static void iwn_init(void *);
344 static void iwn_stop_locked(struct iwn_softc *);
345 static void iwn_scan_start(struct ieee80211com *);
346 static void iwn_scan_end(struct ieee80211com *);
347 static void iwn_set_channel(struct ieee80211com *);
348 static void iwn_scan_curchan(struct ieee80211_scan_state *, unsigned long);
349 static void iwn_scan_mindwell(struct ieee80211_scan_state *);
350 static void iwn_hw_reset_task(void *, int);
352 static char *iwn_get_csr_string(int);
353 static void iwn_debug_register(struct iwn_softc *);
356 static device_method_t iwn_methods[] = {
357 /* Device interface */
358 DEVMETHOD(device_probe, iwn_pci_probe),
359 DEVMETHOD(device_attach, iwn_pci_attach),
360 DEVMETHOD(device_detach, iwn_pci_detach),
361 DEVMETHOD(device_shutdown, iwn_pci_shutdown),
362 DEVMETHOD(device_suspend, iwn_pci_suspend),
363 DEVMETHOD(device_resume, iwn_pci_resume),
368 static driver_t iwn_driver = {
371 sizeof(struct iwn_softc)
373 static devclass_t iwn_devclass;
375 DRIVER_MODULE(iwn, pci, iwn_driver, iwn_devclass, NULL, NULL);
377 MODULE_VERSION(iwn, 1);
379 MODULE_DEPEND(iwn, firmware, 1, 1, 1);
380 MODULE_DEPEND(iwn, pci, 1, 1, 1);
381 MODULE_DEPEND(iwn, wlan, 1, 1, 1);
382 MODULE_DEPEND(iwn, wlan_amrr, 1, 1, 1);
385 iwn_pci_probe(device_t dev)
387 const struct iwn_ident *ident;
389 /* no wlan serializer needed */
390 for (ident = iwn_ident_table; ident->name != NULL; ident++) {
391 if (pci_get_vendor(dev) == ident->vendor &&
392 pci_get_device(dev) == ident->device) {
393 device_set_desc(dev, ident->name);
394 return (BUS_PROBE_DEFAULT);
401 iwn_pci_attach(device_t dev)
403 struct iwn_softc *sc = (struct iwn_softc *)device_get_softc(dev);
404 struct ieee80211com *ic;
407 uint8_t macaddr[IEEE80211_ADDR_LEN];
408 char ethstr[ETHER_ADDRSTRLEN + 1];
410 wlan_serialize_enter();
415 if (bus_dma_tag_create(sc->sc_dmat,
417 BUS_SPACE_MAXADDR_32BIT,
425 device_printf(dev, "cannot allocate DMA tag\n");
431 error = resource_int_value(device_get_name(sc->sc_dev),
432 device_get_unit(sc->sc_dev), "debug", &(sc->sc_debug));
439 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: begin\n",__func__);
442 * Get the offset of the PCI Express Capability Structure in PCI
443 * Configuration Space.
445 error = pci_find_extcap(dev, PCIY_EXPRESS, &sc->sc_cap_off);
447 device_printf(dev, "PCIe capability structure not found!\n");
451 /* Clear device-specific "PCI retry timeout" register (41h). */
452 pci_write_config(dev, 0x41, 0, 1);
454 /* Enable bus-mastering. */
455 pci_enable_busmaster(dev);
458 sc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
460 if (sc->mem == NULL) {
461 device_printf(dev, "can't map mem space\n");
465 sc->sc_st = rman_get_bustag(sc->mem);
466 sc->sc_sh = rman_get_bushandle(sc->mem);
471 if (pci_alloc_msi(dev, &i) == 0)
474 /* Install interrupt handler. */
475 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE |
476 (rid != 0 ? 0 : RF_SHAREABLE));
477 if (sc->irq == NULL) {
478 device_printf(dev, "can't map interrupt\n");
483 /* Read hardware revision and attach. */
484 sc->hw_type = (IWN_READ(sc, IWN_HW_REV) >> IWN_HW_REV_TYPE_SHIFT)
485 & IWN_HW_REV_TYPE_MASK;
486 sc->subdevice_id = pci_get_subdevice(dev);
488 * 4965 versus 5000 and later have different methods.
489 * Let's set those up first.
491 if (sc->hw_type == IWN_HW_REV_TYPE_4965)
492 error = iwn4965_attach(sc, pci_get_device(dev));
494 error = iwn5000_attach(sc, pci_get_device(dev));
496 device_printf(dev, "could not attach device, error %d\n",
502 * Next, let's setup the various parameters of each NIC.
504 error = iwn_config_specific(sc, pci_get_device(dev));
506 device_printf(dev, "could not attach device, error %d\n",
511 if ((error = iwn_hw_prepare(sc)) != 0) {
512 device_printf(dev, "hardware not ready, error %d\n", error);
516 /* Allocate DMA memory for firmware transfers. */
517 if ((error = iwn_alloc_fwmem(sc)) != 0) {
519 "could not allocate memory for firmware, error %d\n",
524 /* Allocate "Keep Warm" page. */
525 if ((error = iwn_alloc_kw(sc)) != 0) {
527 "could not allocate keep warm page, error %d\n", error);
531 /* Allocate ICT table for 5000 Series. */
532 if (sc->hw_type != IWN_HW_REV_TYPE_4965 &&
533 (error = iwn_alloc_ict(sc)) != 0) {
534 device_printf(dev, "could not allocate ICT table, error %d\n",
539 /* Allocate TX scheduler "rings". */
540 if ((error = iwn_alloc_sched(sc)) != 0) {
542 "could not allocate TX scheduler rings, error %d\n", error);
546 /* Allocate TX rings (16 on 4965AGN, 20 on >=5000). */
547 for (i = 0; i < sc->ntxqs; i++) {
548 if ((error = iwn_alloc_tx_ring(sc, &sc->txq[i], i)) != 0) {
550 "could not allocate TX ring %d, error %d\n", i,
556 /* Allocate RX ring. */
557 if ((error = iwn_alloc_rx_ring(sc, &sc->rxq)) != 0) {
558 device_printf(dev, "could not allocate RX ring, error %d\n",
563 /* Clear pending interrupts. */
564 IWN_WRITE(sc, IWN_INT, 0xffffffff);
566 ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211);
568 device_printf(dev, "can not allocate ifnet structure\n");
574 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
575 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
577 /* Set device capabilities. */
579 IEEE80211_C_STA /* station mode supported */
580 | IEEE80211_C_MONITOR /* monitor mode supported */
581 | IEEE80211_C_BGSCAN /* background scanning */
582 | IEEE80211_C_TXPMGT /* tx power management */
583 | IEEE80211_C_SHSLOT /* short slot time supported */
585 | IEEE80211_C_SHPREAMBLE /* short preamble supported */
587 | IEEE80211_C_IBSS /* ibss/adhoc mode */
589 | IEEE80211_C_WME /* WME */
590 | IEEE80211_C_PMGT /* Station-side power mgmt */
593 /* Read MAC address, channels, etc from EEPROM. */
594 if ((error = iwn_read_eeprom(sc, macaddr)) != 0) {
595 device_printf(dev, "could not read EEPROM, error %d\n",
600 /* Count the number of available chains. */
602 ((sc->txchainmask >> 2) & 1) +
603 ((sc->txchainmask >> 1) & 1) +
604 ((sc->txchainmask >> 0) & 1);
606 ((sc->rxchainmask >> 2) & 1) +
607 ((sc->rxchainmask >> 1) & 1) +
608 ((sc->rxchainmask >> 0) & 1);
610 device_printf(dev, "MIMO %dT%dR, %.4s, address %s\n",
611 sc->ntxchains, sc->nrxchains, sc->eeprom_domain,
612 kether_ntoa(macaddr, ethstr));
615 if (sc->sc_flags & IWN_FLAG_HAS_11N) {
617 ic->ic_rxstream = sc->nrxchains;
618 ic->ic_txstream = sc->ntxchains;
622 * The NICs we currently support cap out at 2x2 support
623 * separate from the chains being used.
625 * This is a total hack to work around that until some
626 * per-device method is implemented to return the
627 * actual stream support.
629 * XXX Note: the 5350 is a 3x3 device; so we shouldn't
630 * cap this! But, anything that touches rates in the
631 * driver needs to be audited first before 3x3 is enabled.
634 if (ic->ic_rxstream > 2)
636 if (ic->ic_txstream > 2)
641 IEEE80211_HTCAP_SMPS_OFF /* SMPS mode disabled */
642 | IEEE80211_HTCAP_SHORTGI20 /* short GI in 20MHz */
643 | IEEE80211_HTCAP_CHWIDTH40 /* 40MHz channel width*/
644 | IEEE80211_HTCAP_SHORTGI40 /* short GI in 40MHz */
646 | IEEE80211_HTCAP_GREENFIELD
647 #if IWN_RBUF_SIZE == 8192
648 | IEEE80211_HTCAP_MAXAMSDU_7935 /* max A-MSDU length */
650 | IEEE80211_HTCAP_MAXAMSDU_3839 /* max A-MSDU length */
653 /* s/w capabilities */
654 | IEEE80211_HTC_HT /* HT operation */
655 | IEEE80211_HTC_AMPDU /* tx A-MPDU */
657 | IEEE80211_HTC_AMSDU /* tx A-MSDU */
662 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
664 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
665 ifp->if_init = iwn_init;
666 ifp->if_ioctl = iwn_ioctl;
667 ifp->if_start = iwn_start;
668 ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN);
670 ifq_set_ready(&ifp->if_snd);
673 ieee80211_ifattach(ic, macaddr);
674 ic->ic_vap_create = iwn_vap_create;
675 ic->ic_vap_delete = iwn_vap_delete;
676 ic->ic_raw_xmit = iwn_raw_xmit;
677 ic->ic_node_alloc = iwn_node_alloc;
678 sc->sc_ampdu_rx_start = ic->ic_ampdu_rx_start;
679 ic->ic_ampdu_rx_start = iwn_ampdu_rx_start;
680 sc->sc_ampdu_rx_stop = ic->ic_ampdu_rx_stop;
681 ic->ic_ampdu_rx_stop = iwn_ampdu_rx_stop;
682 sc->sc_addba_request = ic->ic_addba_request;
683 ic->ic_addba_request = iwn_addba_request;
684 sc->sc_addba_response = ic->ic_addba_response;
685 ic->ic_addba_response = iwn_addba_response;
686 sc->sc_addba_stop = ic->ic_addba_stop;
687 ic->ic_addba_stop = iwn_ampdu_tx_stop;
688 ic->ic_newassoc = iwn_newassoc;
689 ic->ic_wme.wme_update = iwn_updateedca;
690 ic->ic_update_mcast = iwn_update_mcast;
691 ic->ic_scan_start = iwn_scan_start;
692 ic->ic_scan_end = iwn_scan_end;
693 ic->ic_set_channel = iwn_set_channel;
694 ic->ic_scan_curchan = iwn_scan_curchan;
695 ic->ic_scan_mindwell = iwn_scan_mindwell;
696 ic->ic_setregdomain = iwn_setregdomain;
698 iwn_radiotap_attach(sc);
700 callout_init(&sc->calib_to);
701 callout_init(&sc->watchdog_to);
702 TASK_INIT(&sc->sc_reinit_task, 0, iwn_hw_reset_task, sc);
703 TASK_INIT(&sc->sc_radioon_task, 0, iwn_radio_on_task, sc);
704 TASK_INIT(&sc->sc_radiooff_task, 0, iwn_radio_off_task, sc);
705 TASK_INIT(&sc->sc_panic_task, 0, iwn_panicked_task, sc);
707 sc->sc_tq = taskqueue_create("iwn_taskq", M_WAITOK,
708 taskqueue_thread_enqueue, &sc->sc_tq);
709 error = taskqueue_start_threads(&sc->sc_tq, 1, TDPRI_KERN_DAEMON, -1,
712 device_printf(dev, "can't start threads, error %d\n", error);
716 iwn_sysctlattach(sc);
719 * Hook our interrupt after all initialization is complete.
721 error = bus_setup_intr(dev, sc->irq, INTR_MPSAFE,
722 iwn_intr, sc, &sc->sc_ih,
723 &wlan_global_serializer);
725 device_printf(dev, "can't establish interrupt, error %d\n",
731 device_printf(sc->sc_dev, "%s: rx_stats=%d, rx_stats_bt=%d\n",
733 sizeof(struct iwn_stats),
734 sizeof(struct iwn_stats_bt));
738 ieee80211_announce(ic);
739 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
740 wlan_serialize_exit();
743 wlan_serialize_exit();
745 wlan_serialize_enter();
747 wlan_serialize_exit();
748 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__);
753 * Define specific configuration based on device id and subdevice id
754 * pid : PCI device id
757 iwn_config_specific(struct iwn_softc *sc, uint16_t pid)
766 sc->base_params = &iwn4965_base_params;
767 sc->limits = &iwn4965_sensitivity_limits;
768 sc->fwname = "iwn4965fw";
769 /* Override chains masks, ROM is known to be broken. */
770 sc->txchainmask = IWN_ANT_AB;
771 sc->rxchainmask = IWN_ANT_ABC;
772 /* Enable normal btcoex */
773 sc->sc_flags |= IWN_FLAG_BTCOEX;
778 switch(sc->subdevice_id) {
779 case IWN_SDID_1000_1:
780 case IWN_SDID_1000_2:
781 case IWN_SDID_1000_3:
782 case IWN_SDID_1000_4:
783 case IWN_SDID_1000_5:
784 case IWN_SDID_1000_6:
785 case IWN_SDID_1000_7:
786 case IWN_SDID_1000_8:
787 case IWN_SDID_1000_9:
788 case IWN_SDID_1000_10:
789 case IWN_SDID_1000_11:
790 case IWN_SDID_1000_12:
791 sc->limits = &iwn1000_sensitivity_limits;
792 sc->base_params = &iwn1000_base_params;
793 sc->fwname = "iwn1000fw";
796 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
797 "0x%04x rev %d not supported (subdevice)\n", pid,
798 sc->subdevice_id,sc->hw_type);
807 sc->fwname = "iwn6000fw";
808 sc->limits = &iwn6000_sensitivity_limits;
809 switch(sc->subdevice_id) {
810 case IWN_SDID_6x00_1:
811 case IWN_SDID_6x00_2:
812 case IWN_SDID_6x00_8:
814 sc->base_params = &iwn_6000_base_params;
816 case IWN_SDID_6x00_3:
817 case IWN_SDID_6x00_6:
818 case IWN_SDID_6x00_9:
820 case IWN_SDID_6x00_4:
821 case IWN_SDID_6x00_7:
822 case IWN_SDID_6x00_10:
824 case IWN_SDID_6x00_5:
826 sc->base_params = &iwn_6000i_base_params;
827 sc->sc_flags |= IWN_FLAG_INTERNAL_PA;
828 sc->txchainmask = IWN_ANT_BC;
829 sc->rxchainmask = IWN_ANT_BC;
832 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
833 "0x%04x rev %d not supported (subdevice)\n", pid,
834 sc->subdevice_id,sc->hw_type);
841 switch(sc->subdevice_id) {
842 case IWN_SDID_6x05_1:
843 case IWN_SDID_6x05_4:
844 case IWN_SDID_6x05_6:
846 case IWN_SDID_6x05_2:
847 case IWN_SDID_6x05_5:
848 case IWN_SDID_6x05_7:
850 case IWN_SDID_6x05_3:
852 case IWN_SDID_6x05_8:
853 case IWN_SDID_6x05_9:
854 //iwl6005_2agn_sff_cfg
855 case IWN_SDID_6x05_10:
857 case IWN_SDID_6x05_11:
858 //iwl6005_2agn_mow1_cfg
859 case IWN_SDID_6x05_12:
860 //iwl6005_2agn_mow2_cfg
861 sc->fwname = "iwn6000g2afw";
862 sc->limits = &iwn6000_sensitivity_limits;
863 sc->base_params = &iwn_6000g2_base_params;
866 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
867 "0x%04x rev %d not supported (subdevice)\n", pid,
868 sc->subdevice_id,sc->hw_type);
875 switch(sc->subdevice_id) {
876 case IWN_SDID_6035_1:
877 case IWN_SDID_6035_2:
878 case IWN_SDID_6035_3:
879 case IWN_SDID_6035_4:
880 sc->fwname = "iwn6000g2bfw";
881 sc->limits = &iwn6235_sensitivity_limits;
882 sc->base_params = &iwn_6235_base_params;
885 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
886 "0x%04x rev %d not supported (subdevice)\n", pid,
887 sc->subdevice_id,sc->hw_type);
891 /* 6x50 WiFi/WiMax Series */
894 switch(sc->subdevice_id) {
895 case IWN_SDID_6050_1:
896 case IWN_SDID_6050_3:
897 case IWN_SDID_6050_5:
899 case IWN_SDID_6050_2:
900 case IWN_SDID_6050_4:
901 case IWN_SDID_6050_6:
903 sc->fwname = "iwn6050fw";
904 sc->txchainmask = IWN_ANT_AB;
905 sc->rxchainmask = IWN_ANT_AB;
906 sc->limits = &iwn6000_sensitivity_limits;
907 sc->base_params = &iwn_6050_base_params;
910 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
911 "0x%04x rev %d not supported (subdevice)\n", pid,
912 sc->subdevice_id,sc->hw_type);
916 /* 6150 WiFi/WiMax Series */
919 switch(sc->subdevice_id) {
920 case IWN_SDID_6150_1:
921 case IWN_SDID_6150_3:
922 case IWN_SDID_6150_5:
924 case IWN_SDID_6150_2:
925 case IWN_SDID_6150_4:
926 case IWN_SDID_6150_6:
928 sc->fwname = "iwn6050fw";
929 sc->limits = &iwn6000_sensitivity_limits;
930 sc->base_params = &iwn_6150_base_params;
933 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
934 "0x%04x rev %d not supported (subdevice)\n", pid,
935 sc->subdevice_id,sc->hw_type);
939 /* 6030 Series and 1030 Series */
944 switch(sc->subdevice_id) {
945 case IWN_SDID_x030_1:
946 case IWN_SDID_x030_3:
947 case IWN_SDID_x030_5:
949 case IWN_SDID_x030_2:
950 case IWN_SDID_x030_4:
951 case IWN_SDID_x030_6:
953 case IWN_SDID_x030_7:
954 case IWN_SDID_x030_10:
955 case IWN_SDID_x030_14:
957 case IWN_SDID_x030_8:
958 case IWN_SDID_x030_11:
959 case IWN_SDID_x030_15:
961 case IWN_SDID_x030_9:
962 case IWN_SDID_x030_12:
963 case IWN_SDID_x030_16:
965 case IWN_SDID_x030_13:
967 sc->fwname = "iwn6000g2bfw";
968 sc->limits = &iwn6000_sensitivity_limits;
969 sc->base_params = &iwn_6000g2b_base_params;
972 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
973 "0x%04x rev %d not supported (subdevice)\n", pid,
974 sc->subdevice_id,sc->hw_type);
978 /* 130 Series WiFi */
979 /* XXX: This series will need adjustment for rate.
980 * see rx_with_siso_diversity in linux kernel
984 switch(sc->subdevice_id) {
993 sc->fwname = "iwn6000g2bfw";
994 sc->limits = &iwn6000_sensitivity_limits;
995 sc->base_params = &iwn_6000g2b_base_params;
998 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
999 "0x%04x rev %d not supported (subdevice)\n", pid,
1000 sc->subdevice_id,sc->hw_type);
1004 /* 100 Series WiFi */
1007 switch(sc->subdevice_id) {
1008 case IWN_SDID_100_1:
1009 case IWN_SDID_100_2:
1010 case IWN_SDID_100_3:
1011 case IWN_SDID_100_4:
1012 case IWN_SDID_100_5:
1013 case IWN_SDID_100_6:
1014 sc->limits = &iwn1000_sensitivity_limits;
1015 sc->base_params = &iwn1000_base_params;
1016 sc->fwname = "iwn100fw";
1019 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1020 "0x%04x rev %d not supported (subdevice)\n", pid,
1021 sc->subdevice_id,sc->hw_type);
1027 /* XXX: This series will need adjustment for rate.
1028 * see rx_with_siso_diversity in linux kernel
1032 switch(sc->subdevice_id) {
1033 case IWN_SDID_105_1:
1034 case IWN_SDID_105_2:
1035 case IWN_SDID_105_3:
1037 case IWN_SDID_105_4:
1039 sc->limits = &iwn2030_sensitivity_limits;
1040 sc->base_params = &iwn2000_base_params;
1041 sc->fwname = "iwn105fw";
1044 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1045 "0x%04x rev %d not supported (subdevice)\n", pid,
1046 sc->subdevice_id,sc->hw_type);
1052 /* XXX: This series will need adjustment for rate.
1053 * see rx_with_siso_diversity in linux kernel
1057 switch(sc->subdevice_id) {
1058 case IWN_SDID_135_1:
1059 case IWN_SDID_135_2:
1060 case IWN_SDID_135_3:
1061 sc->limits = &iwn2030_sensitivity_limits;
1062 sc->base_params = &iwn2030_base_params;
1063 sc->fwname = "iwn135fw";
1066 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1067 "0x%04x rev %d not supported (subdevice)\n", pid,
1068 sc->subdevice_id,sc->hw_type);
1074 case IWN_DID_2x00_1:
1075 case IWN_DID_2x00_2:
1076 switch(sc->subdevice_id) {
1077 case IWN_SDID_2x00_1:
1078 case IWN_SDID_2x00_2:
1079 case IWN_SDID_2x00_3:
1081 case IWN_SDID_2x00_4:
1082 //iwl2000_2bgn_d_cfg
1083 sc->limits = &iwn2030_sensitivity_limits;
1084 sc->base_params = &iwn2000_base_params;
1085 sc->fwname = "iwn2000fw";
1088 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1089 "0x%04x rev %d not supported (subdevice) \n",
1090 pid, sc->subdevice_id, sc->hw_type);
1095 case IWN_DID_2x30_1:
1096 case IWN_DID_2x30_2:
1097 switch(sc->subdevice_id) {
1098 case IWN_SDID_2x30_1:
1099 case IWN_SDID_2x30_3:
1100 case IWN_SDID_2x30_5:
1102 case IWN_SDID_2x30_2:
1103 case IWN_SDID_2x30_4:
1104 case IWN_SDID_2x30_6:
1106 sc->limits = &iwn2030_sensitivity_limits;
1107 sc->base_params = &iwn2030_base_params;
1108 sc->fwname = "iwn2030fw";
1111 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1112 "0x%04x rev %d not supported (subdevice)\n", pid,
1113 sc->subdevice_id,sc->hw_type);
1118 case IWN_DID_5x00_1:
1119 case IWN_DID_5x00_2:
1120 case IWN_DID_5x00_3:
1121 case IWN_DID_5x00_4:
1122 sc->limits = &iwn5000_sensitivity_limits;
1123 sc->base_params = &iwn5000_base_params;
1124 sc->fwname = "iwn5000fw";
1125 switch(sc->subdevice_id) {
1126 case IWN_SDID_5x00_1:
1127 case IWN_SDID_5x00_2:
1128 case IWN_SDID_5x00_3:
1129 case IWN_SDID_5x00_4:
1130 case IWN_SDID_5x00_9:
1131 case IWN_SDID_5x00_10:
1132 case IWN_SDID_5x00_11:
1133 case IWN_SDID_5x00_12:
1134 case IWN_SDID_5x00_17:
1135 case IWN_SDID_5x00_18:
1136 case IWN_SDID_5x00_19:
1137 case IWN_SDID_5x00_20:
1139 sc->txchainmask = IWN_ANT_B;
1140 sc->rxchainmask = IWN_ANT_AB;
1142 case IWN_SDID_5x00_5:
1143 case IWN_SDID_5x00_6:
1144 case IWN_SDID_5x00_13:
1145 case IWN_SDID_5x00_14:
1146 case IWN_SDID_5x00_21:
1147 case IWN_SDID_5x00_22:
1149 sc->txchainmask = IWN_ANT_B;
1150 sc->rxchainmask = IWN_ANT_AB;
1152 case IWN_SDID_5x00_7:
1153 case IWN_SDID_5x00_8:
1154 case IWN_SDID_5x00_15:
1155 case IWN_SDID_5x00_16:
1156 case IWN_SDID_5x00_23:
1157 case IWN_SDID_5x00_24:
1159 sc->txchainmask = IWN_ANT_B;
1160 sc->rxchainmask = IWN_ANT_AB;
1162 case IWN_SDID_5x00_25:
1163 case IWN_SDID_5x00_26:
1164 case IWN_SDID_5x00_27:
1165 case IWN_SDID_5x00_28:
1166 case IWN_SDID_5x00_29:
1167 case IWN_SDID_5x00_30:
1168 case IWN_SDID_5x00_31:
1169 case IWN_SDID_5x00_32:
1170 case IWN_SDID_5x00_33:
1171 case IWN_SDID_5x00_34:
1172 case IWN_SDID_5x00_35:
1173 case IWN_SDID_5x00_36:
1175 sc->txchainmask = IWN_ANT_ABC;
1176 sc->rxchainmask = IWN_ANT_ABC;
1179 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1180 "0x%04x rev %d not supported (subdevice)\n", pid,
1181 sc->subdevice_id,sc->hw_type);
1186 case IWN_DID_5x50_1:
1187 case IWN_DID_5x50_2:
1188 case IWN_DID_5x50_3:
1189 case IWN_DID_5x50_4:
1190 sc->limits = &iwn5000_sensitivity_limits;
1191 sc->base_params = &iwn5000_base_params;
1192 sc->fwname = "iwn5000fw";
1193 switch(sc->subdevice_id) {
1194 case IWN_SDID_5x50_1:
1195 case IWN_SDID_5x50_2:
1196 case IWN_SDID_5x50_3:
1198 sc->limits = &iwn5000_sensitivity_limits;
1199 sc->base_params = &iwn5000_base_params;
1200 sc->fwname = "iwn5000fw";
1202 case IWN_SDID_5x50_4:
1203 case IWN_SDID_5x50_5:
1204 case IWN_SDID_5x50_8:
1205 case IWN_SDID_5x50_9:
1206 case IWN_SDID_5x50_10:
1207 case IWN_SDID_5x50_11:
1209 case IWN_SDID_5x50_6:
1210 case IWN_SDID_5x50_7:
1211 case IWN_SDID_5x50_12:
1212 case IWN_SDID_5x50_13:
1214 sc->limits = &iwn5000_sensitivity_limits;
1215 sc->fwname = "iwn5150fw";
1216 sc->base_params = &iwn_5x50_base_params;
1219 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1220 "0x%04x rev %d not supported (subdevice)\n", pid,
1221 sc->subdevice_id,sc->hw_type);
1226 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id : 0x%04x"
1227 "rev 0x%08x not supported (device)\n", pid, sc->subdevice_id,
1235 iwn4965_attach(struct iwn_softc *sc, uint16_t pid)
1237 struct iwn_ops *ops = &sc->ops;
1239 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1240 ops->load_firmware = iwn4965_load_firmware;
1241 ops->read_eeprom = iwn4965_read_eeprom;
1242 ops->post_alive = iwn4965_post_alive;
1243 ops->nic_config = iwn4965_nic_config;
1244 ops->update_sched = iwn4965_update_sched;
1245 ops->get_temperature = iwn4965_get_temperature;
1246 ops->get_rssi = iwn4965_get_rssi;
1247 ops->set_txpower = iwn4965_set_txpower;
1248 ops->init_gains = iwn4965_init_gains;
1249 ops->set_gains = iwn4965_set_gains;
1250 ops->add_node = iwn4965_add_node;
1251 ops->tx_done = iwn4965_tx_done;
1252 ops->ampdu_tx_start = iwn4965_ampdu_tx_start;
1253 ops->ampdu_tx_stop = iwn4965_ampdu_tx_stop;
1254 sc->ntxqs = IWN4965_NTXQUEUES;
1255 sc->firstaggqueue = IWN4965_FIRSTAGGQUEUE;
1256 sc->ndmachnls = IWN4965_NDMACHNLS;
1257 sc->broadcast_id = IWN4965_ID_BROADCAST;
1258 sc->rxonsz = IWN4965_RXONSZ;
1259 sc->schedsz = IWN4965_SCHEDSZ;
1260 sc->fw_text_maxsz = IWN4965_FW_TEXT_MAXSZ;
1261 sc->fw_data_maxsz = IWN4965_FW_DATA_MAXSZ;
1262 sc->fwsz = IWN4965_FWSZ;
1263 sc->sched_txfact_addr = IWN4965_SCHED_TXFACT;
1264 sc->limits = &iwn4965_sensitivity_limits;
1265 sc->fwname = "iwn4965fw";
1266 /* Override chains masks, ROM is known to be broken. */
1267 sc->txchainmask = IWN_ANT_AB;
1268 sc->rxchainmask = IWN_ANT_ABC;
1269 /* Enable normal btcoex */
1270 sc->sc_flags |= IWN_FLAG_BTCOEX;
1272 DPRINTF(sc, IWN_DEBUG_TRACE, "%s: end\n",__func__);
1278 iwn5000_attach(struct iwn_softc *sc, uint16_t pid)
1280 struct iwn_ops *ops = &sc->ops;
1282 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1284 ops->load_firmware = iwn5000_load_firmware;
1285 ops->read_eeprom = iwn5000_read_eeprom;
1286 ops->post_alive = iwn5000_post_alive;
1287 ops->nic_config = iwn5000_nic_config;
1288 ops->update_sched = iwn5000_update_sched;
1289 ops->get_temperature = iwn5000_get_temperature;
1290 ops->get_rssi = iwn5000_get_rssi;
1291 ops->set_txpower = iwn5000_set_txpower;
1292 ops->init_gains = iwn5000_init_gains;
1293 ops->set_gains = iwn5000_set_gains;
1294 ops->add_node = iwn5000_add_node;
1295 ops->tx_done = iwn5000_tx_done;
1296 ops->ampdu_tx_start = iwn5000_ampdu_tx_start;
1297 ops->ampdu_tx_stop = iwn5000_ampdu_tx_stop;
1298 sc->ntxqs = IWN5000_NTXQUEUES;
1299 sc->firstaggqueue = IWN5000_FIRSTAGGQUEUE;
1300 sc->ndmachnls = IWN5000_NDMACHNLS;
1301 sc->broadcast_id = IWN5000_ID_BROADCAST;
1302 sc->rxonsz = IWN5000_RXONSZ;
1303 sc->schedsz = IWN5000_SCHEDSZ;
1304 sc->fw_text_maxsz = IWN5000_FW_TEXT_MAXSZ;
1305 sc->fw_data_maxsz = IWN5000_FW_DATA_MAXSZ;
1306 sc->fwsz = IWN5000_FWSZ;
1307 sc->sched_txfact_addr = IWN5000_SCHED_TXFACT;
1308 sc->reset_noise_gain = IWN5000_PHY_CALIB_RESET_NOISE_GAIN;
1309 sc->noise_gain = IWN5000_PHY_CALIB_NOISE_GAIN;
1315 * Attach the interface to 802.11 radiotap.
1318 iwn_radiotap_attach(struct iwn_softc *sc)
1320 struct ifnet *ifp = sc->sc_ifp;
1321 struct ieee80211com *ic = ifp->if_l2com;
1322 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1323 ieee80211_radiotap_attach(ic,
1324 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
1325 IWN_TX_RADIOTAP_PRESENT,
1326 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
1327 IWN_RX_RADIOTAP_PRESENT);
1328 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
1332 iwn_sysctlattach(struct iwn_softc *sc)
1335 struct sysctl_ctx_list *ctx;
1336 struct sysctl_oid *tree;
1338 ctx = device_get_sysctl_ctx(sc->sc_dev);
1339 tree = device_get_sysctl_tree(sc->sc_dev);
1342 device_printf(sc->sc_dev, "can't add sysctl node\n");
1345 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
1346 "debug", CTLFLAG_RW, &sc->sc_debug, sc->sc_debug,
1347 "control debugging printfs");
1351 static struct ieee80211vap *
1352 iwn_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
1353 enum ieee80211_opmode opmode, int flags,
1354 const uint8_t bssid[IEEE80211_ADDR_LEN],
1355 const uint8_t mac[IEEE80211_ADDR_LEN])
1357 struct iwn_vap *ivp;
1358 struct ieee80211vap *vap;
1359 uint8_t mac1[IEEE80211_ADDR_LEN];
1360 struct iwn_softc *sc = ic->ic_ifp->if_softc;
1362 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */
1365 IEEE80211_ADDR_COPY(mac1, mac);
1367 ivp = kmalloc(sizeof(struct iwn_vap), M_80211_VAP, M_INTWAIT | M_ZERO);
1369 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac1);
1370 ivp->ctx = IWN_RXON_BSS_CTX;
1371 IEEE80211_ADDR_COPY(ivp->macaddr, mac1);
1372 vap->iv_bmissthreshold = 10; /* override default */
1373 /* Override with driver methods. */
1374 ivp->iv_newstate = vap->iv_newstate;
1375 vap->iv_newstate = iwn_newstate;
1376 sc->ivap[IWN_RXON_BSS_CTX] = vap;
1378 ieee80211_ratectl_init(vap);
1379 /* Complete setup. */
1380 ieee80211_vap_attach(vap, iwn_media_change, ieee80211_media_status);
1381 ic->ic_opmode = opmode;
1386 iwn_vap_delete(struct ieee80211vap *vap)
1388 struct iwn_vap *ivp = IWN_VAP(vap);
1390 ieee80211_ratectl_deinit(vap);
1391 ieee80211_vap_detach(vap);
1392 kfree(ivp, M_80211_VAP);
1396 iwn_pci_detach(device_t dev)
1398 struct iwn_softc *sc = device_get_softc(dev);
1399 struct ifnet *ifp = sc->sc_ifp;
1400 struct ieee80211com *ic;
1403 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1405 wlan_serialize_enter();
1410 ieee80211_draintask(ic, &sc->sc_reinit_task);
1411 ieee80211_draintask(ic, &sc->sc_radioon_task);
1412 ieee80211_draintask(ic, &sc->sc_radiooff_task);
1414 iwn_stop_locked(sc);
1417 // We don't need this for DragonFly as our taskqueue_free()
1418 // is running all remaining tasks before terminating.
1419 taskqueue_drain_all(sc->sc_tq);
1421 taskqueue_free(sc->sc_tq);
1423 callout_stop(&sc->watchdog_to);
1424 callout_stop(&sc->calib_to);
1425 ieee80211_ifdetach(ic);
1428 /* Uninstall interrupt handler. */
1429 if (sc->irq != NULL) {
1430 bus_teardown_intr(dev, sc->irq, sc->sc_ih);
1431 bus_release_resource(dev, SYS_RES_IRQ, rman_get_rid(sc->irq),
1433 pci_release_msi(dev);
1437 /* Free DMA resources. */
1438 iwn_free_rx_ring(sc, &sc->rxq);
1439 for (qid = 0; qid < sc->ntxqs; qid++)
1440 iwn_free_tx_ring(sc, &sc->txq[qid]);
1443 if (sc->ict != NULL) {
1449 if (sc->mem != NULL) {
1450 bus_release_resource(dev, SYS_RES_MEMORY,
1451 rman_get_rid(sc->mem), sc->mem);
1460 bus_dma_tag_destroy(sc->sc_dmat);
1462 wlan_serialize_exit();
1463 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n", __func__);
1468 iwn_pci_shutdown(device_t dev)
1470 struct iwn_softc *sc = device_get_softc(dev);
1472 wlan_serialize_enter();
1473 iwn_stop_locked(sc);
1474 wlan_serialize_exit();
1480 iwn_pci_suspend(device_t dev)
1482 struct iwn_softc *sc = device_get_softc(dev);
1483 struct ieee80211com *ic = sc->sc_ifp->if_l2com;
1485 ieee80211_suspend_all(ic);
1490 iwn_pci_resume(device_t dev)
1492 struct iwn_softc *sc = device_get_softc(dev);
1493 struct ieee80211com *ic = sc->sc_ifp->if_l2com;
1495 /* Clear device-specific "PCI retry timeout" register (41h). */
1496 pci_write_config(dev, 0x41, 0, 1);
1498 ieee80211_resume_all(ic);
1503 iwn_nic_lock(struct iwn_softc *sc)
1507 /* Request exclusive access to NIC. */
1508 IWN_SETBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_MAC_ACCESS_REQ);
1510 /* Spin until we actually get the lock. */
1511 for (ntries = 0; ntries < 1000; ntries++) {
1512 if ((IWN_READ(sc, IWN_GP_CNTRL) &
1513 (IWN_GP_CNTRL_MAC_ACCESS_ENA | IWN_GP_CNTRL_SLEEP)) ==
1514 IWN_GP_CNTRL_MAC_ACCESS_ENA)
1521 static __inline void
1522 iwn_nic_unlock(struct iwn_softc *sc)
1524 IWN_CLRBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_MAC_ACCESS_REQ);
1527 static __inline uint32_t
1528 iwn_prph_read(struct iwn_softc *sc, uint32_t addr)
1530 IWN_WRITE(sc, IWN_PRPH_RADDR, IWN_PRPH_DWORD | addr);
1531 IWN_BARRIER_READ_WRITE(sc);
1532 return IWN_READ(sc, IWN_PRPH_RDATA);
1535 static __inline void
1536 iwn_prph_write(struct iwn_softc *sc, uint32_t addr, uint32_t data)
1538 IWN_WRITE(sc, IWN_PRPH_WADDR, IWN_PRPH_DWORD | addr);
1539 IWN_BARRIER_WRITE(sc);
1540 IWN_WRITE(sc, IWN_PRPH_WDATA, data);
1543 static __inline void
1544 iwn_prph_setbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask)
1546 iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) | mask);
1549 static __inline void
1550 iwn_prph_clrbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask)
1552 iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) & ~mask);
1555 static __inline void
1556 iwn_prph_write_region_4(struct iwn_softc *sc, uint32_t addr,
1557 const uint32_t *data, int count)
1559 for (; count > 0; count--, data++, addr += 4)
1560 iwn_prph_write(sc, addr, *data);
1563 static __inline uint32_t
1564 iwn_mem_read(struct iwn_softc *sc, uint32_t addr)
1566 IWN_WRITE(sc, IWN_MEM_RADDR, addr);
1567 IWN_BARRIER_READ_WRITE(sc);
1568 return IWN_READ(sc, IWN_MEM_RDATA);
1571 static __inline void
1572 iwn_mem_write(struct iwn_softc *sc, uint32_t addr, uint32_t data)
1574 IWN_WRITE(sc, IWN_MEM_WADDR, addr);
1575 IWN_BARRIER_WRITE(sc);
1576 IWN_WRITE(sc, IWN_MEM_WDATA, data);
1579 static __inline void
1580 iwn_mem_write_2(struct iwn_softc *sc, uint32_t addr, uint16_t data)
1584 tmp = iwn_mem_read(sc, addr & ~3);
1586 tmp = (tmp & 0x0000ffff) | data << 16;
1588 tmp = (tmp & 0xffff0000) | data;
1589 iwn_mem_write(sc, addr & ~3, tmp);
1592 static __inline void
1593 iwn_mem_read_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t *data,
1596 for (; count > 0; count--, addr += 4)
1597 *data++ = iwn_mem_read(sc, addr);
1600 static __inline void
1601 iwn_mem_set_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t val,
1604 for (; count > 0; count--, addr += 4)
1605 iwn_mem_write(sc, addr, val);
1609 iwn_eeprom_lock(struct iwn_softc *sc)
1613 for (i = 0; i < 100; i++) {
1614 /* Request exclusive access to EEPROM. */
1615 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
1616 IWN_HW_IF_CONFIG_EEPROM_LOCKED);
1618 /* Spin until we actually get the lock. */
1619 for (ntries = 0; ntries < 100; ntries++) {
1620 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
1621 IWN_HW_IF_CONFIG_EEPROM_LOCKED)
1626 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end timeout\n", __func__);
1630 static __inline void
1631 iwn_eeprom_unlock(struct iwn_softc *sc)
1633 IWN_CLRBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_EEPROM_LOCKED);
1637 * Initialize access by host to One Time Programmable ROM.
1638 * NB: This kind of ROM can be found on 1000 or 6000 Series only.
1641 iwn_init_otprom(struct iwn_softc *sc)
1643 uint16_t prev, base, next;
1646 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1648 /* Wait for clock stabilization before accessing prph. */
1649 if ((error = iwn_clock_wait(sc)) != 0)
1652 if ((error = iwn_nic_lock(sc)) != 0)
1654 iwn_prph_setbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ);
1656 iwn_prph_clrbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ);
1659 /* Set auto clock gate disable bit for HW with OTP shadow RAM. */
1660 if (sc->base_params->shadow_ram_support) {
1661 IWN_SETBITS(sc, IWN_DBG_LINK_PWR_MGMT,
1662 IWN_RESET_LINK_PWR_MGMT_DIS);
1664 IWN_CLRBITS(sc, IWN_EEPROM_GP, IWN_EEPROM_GP_IF_OWNER);
1665 /* Clear ECC status. */
1666 IWN_SETBITS(sc, IWN_OTP_GP,
1667 IWN_OTP_GP_ECC_CORR_STTS | IWN_OTP_GP_ECC_UNCORR_STTS);
1670 * Find the block before last block (contains the EEPROM image)
1671 * for HW without OTP shadow RAM.
1673 if (! sc->base_params->shadow_ram_support) {
1674 /* Switch to absolute addressing mode. */
1675 IWN_CLRBITS(sc, IWN_OTP_GP, IWN_OTP_GP_RELATIVE_ACCESS);
1677 for (count = 0; count < sc->base_params->max_ll_items;
1679 error = iwn_read_prom_data(sc, base, &next, 2);
1682 if (next == 0) /* End of linked-list. */
1685 base = le16toh(next);
1687 if (count == 0 || count == sc->base_params->max_ll_items)
1689 /* Skip "next" word. */
1690 sc->prom_base = prev + 1;
1693 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
1699 iwn_read_prom_data(struct iwn_softc *sc, uint32_t addr, void *data, int count)
1701 uint8_t *out = data;
1705 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1707 addr += sc->prom_base;
1708 for (; count > 0; count -= 2, addr++) {
1709 IWN_WRITE(sc, IWN_EEPROM, addr << 2);
1710 for (ntries = 0; ntries < 10; ntries++) {
1711 val = IWN_READ(sc, IWN_EEPROM);
1712 if (val & IWN_EEPROM_READ_VALID)
1717 device_printf(sc->sc_dev,
1718 "timeout reading ROM at 0x%x\n", addr);
1721 if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) {
1722 /* OTPROM, check for ECC errors. */
1723 tmp = IWN_READ(sc, IWN_OTP_GP);
1724 if (tmp & IWN_OTP_GP_ECC_UNCORR_STTS) {
1725 device_printf(sc->sc_dev,
1726 "OTPROM ECC error at 0x%x\n", addr);
1729 if (tmp & IWN_OTP_GP_ECC_CORR_STTS) {
1730 /* Correctable ECC error, clear bit. */
1731 IWN_SETBITS(sc, IWN_OTP_GP,
1732 IWN_OTP_GP_ECC_CORR_STTS);
1740 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
1746 iwn_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
1750 KASSERT(nsegs == 1, ("too many DMA segments, %d should be 1", nsegs));
1751 *(bus_addr_t *)arg = segs[0].ds_addr;
1755 iwn_dma_contig_alloc(struct iwn_softc *sc, struct iwn_dma_info *dma,
1756 void **kvap, bus_size_t size, bus_size_t alignment)
1763 error = bus_dma_tag_create(sc->sc_dmat, alignment,
1764 0, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, size,
1765 1, size, BUS_DMA_NOWAIT, &dma->tag);
1769 error = bus_dmamem_alloc(dma->tag, (void **)&dma->vaddr,
1770 BUS_DMA_NOWAIT | BUS_DMA_ZERO | BUS_DMA_COHERENT, &dma->map);
1774 error = bus_dmamap_load(dma->tag, dma->map, dma->vaddr, size,
1775 iwn_dma_map_addr, &dma->paddr, BUS_DMA_NOWAIT);
1779 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
1786 fail: iwn_dma_contig_free(dma);
1791 iwn_dma_contig_free(struct iwn_dma_info *dma)
1793 if (dma->vaddr != NULL) {
1794 bus_dmamap_sync(dma->tag, dma->map,
1795 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1796 bus_dmamap_unload(dma->tag, dma->map);
1797 bus_dmamem_free(dma->tag, dma->vaddr, dma->map);
1800 if (dma->tag != NULL) {
1801 bus_dma_tag_destroy(dma->tag);
1807 iwn_alloc_sched(struct iwn_softc *sc)
1809 /* TX scheduler rings must be aligned on a 1KB boundary. */
1810 return iwn_dma_contig_alloc(sc, &sc->sched_dma, (void **)&sc->sched,
1815 iwn_free_sched(struct iwn_softc *sc)
1817 iwn_dma_contig_free(&sc->sched_dma);
1821 iwn_alloc_kw(struct iwn_softc *sc)
1823 /* "Keep Warm" page must be aligned on a 4KB boundary. */
1824 return iwn_dma_contig_alloc(sc, &sc->kw_dma, NULL, 4096, 4096);
1828 iwn_free_kw(struct iwn_softc *sc)
1830 iwn_dma_contig_free(&sc->kw_dma);
1834 iwn_alloc_ict(struct iwn_softc *sc)
1836 /* ICT table must be aligned on a 4KB boundary. */
1837 return iwn_dma_contig_alloc(sc, &sc->ict_dma, (void **)&sc->ict,
1838 IWN_ICT_SIZE, 4096);
1842 iwn_free_ict(struct iwn_softc *sc)
1844 iwn_dma_contig_free(&sc->ict_dma);
1848 iwn_alloc_fwmem(struct iwn_softc *sc)
1850 /* Must be aligned on a 16-byte boundary. */
1851 return iwn_dma_contig_alloc(sc, &sc->fw_dma, NULL, sc->fwsz, 16);
1855 iwn_free_fwmem(struct iwn_softc *sc)
1857 iwn_dma_contig_free(&sc->fw_dma);
1861 iwn_alloc_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1868 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1870 /* Allocate RX descriptors (256-byte aligned). */
1871 size = IWN_RX_RING_COUNT * sizeof (uint32_t);
1872 error = iwn_dma_contig_alloc(sc, &ring->desc_dma, (void **)&ring->desc,
1875 device_printf(sc->sc_dev,
1876 "%s: could not allocate RX ring DMA memory, error %d\n",
1881 /* Allocate RX status area (16-byte aligned). */
1882 error = iwn_dma_contig_alloc(sc, &ring->stat_dma, (void **)&ring->stat,
1883 sizeof (struct iwn_rx_status), 16);
1885 device_printf(sc->sc_dev,
1886 "%s: could not allocate RX status DMA memory, error %d\n",
1891 /* Create RX buffer DMA tag. */
1892 error = bus_dma_tag_create(sc->sc_dmat, 1, 0,
1893 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
1894 IWN_RBUF_SIZE, 1, IWN_RBUF_SIZE, BUS_DMA_NOWAIT, &ring->data_dmat);
1896 device_printf(sc->sc_dev,
1897 "%s: could not create RX buf DMA tag, error %d\n",
1903 * Allocate and map RX buffers.
1905 for (i = 0; i < IWN_RX_RING_COUNT; i++) {
1906 struct iwn_rx_data *data = &ring->data[i];
1909 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
1911 device_printf(sc->sc_dev,
1912 "%s: could not create RX buf DMA map, error %d\n",
1917 data->m = m_getjcl(MB_DONTWAIT, MT_DATA,
1918 M_PKTHDR, IWN_RBUF_SIZE);
1919 if (data->m == NULL) {
1920 device_printf(sc->sc_dev,
1921 "%s: could not allocate RX mbuf\n", __func__);
1926 error = bus_dmamap_load(ring->data_dmat, data->map,
1927 mtod(data->m, void *), IWN_RBUF_SIZE, iwn_dma_map_addr,
1928 &paddr, BUS_DMA_NOWAIT);
1929 if (error != 0 && error != EFBIG) {
1930 device_printf(sc->sc_dev,
1931 "%s: can't not map mbuf, error %d\n", __func__,
1936 /* Set physical address of RX buffer (256-byte aligned). */
1937 ring->desc[i] = htole32(paddr >> 8);
1940 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
1941 BUS_DMASYNC_PREWRITE);
1943 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
1947 fail: iwn_free_rx_ring(sc, ring);
1949 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__);
1955 iwn_reset_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1959 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
1961 if (iwn_nic_lock(sc) == 0) {
1962 IWN_WRITE(sc, IWN_FH_RX_CONFIG, 0);
1963 for (ntries = 0; ntries < 1000; ntries++) {
1964 if (IWN_READ(sc, IWN_FH_RX_STATUS) &
1965 IWN_FH_RX_STATUS_IDLE)
1972 sc->last_rx_valid = 0;
1976 iwn_free_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1980 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s \n", __func__);
1982 iwn_dma_contig_free(&ring->desc_dma);
1983 iwn_dma_contig_free(&ring->stat_dma);
1985 for (i = 0; i < IWN_RX_RING_COUNT; i++) {
1986 struct iwn_rx_data *data = &ring->data[i];
1988 if (data->m != NULL) {
1989 bus_dmamap_sync(ring->data_dmat, data->map,
1990 BUS_DMASYNC_POSTREAD);
1991 bus_dmamap_unload(ring->data_dmat, data->map);
1995 if (data->map != NULL)
1996 bus_dmamap_destroy(ring->data_dmat, data->map);
1998 if (ring->data_dmat != NULL) {
1999 bus_dma_tag_destroy(ring->data_dmat);
2000 ring->data_dmat = NULL;
2005 iwn_alloc_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring, int qid)
2015 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2017 /* Allocate TX descriptors (256-byte aligned). */
2018 size = IWN_TX_RING_COUNT * sizeof (struct iwn_tx_desc);
2019 error = iwn_dma_contig_alloc(sc, &ring->desc_dma, (void **)&ring->desc,
2022 device_printf(sc->sc_dev,
2023 "%s: could not allocate TX ring DMA memory, error %d\n",
2028 size = IWN_TX_RING_COUNT * sizeof (struct iwn_tx_cmd);
2029 error = iwn_dma_contig_alloc(sc, &ring->cmd_dma, (void **)&ring->cmd,
2032 device_printf(sc->sc_dev,
2033 "%s: could not allocate TX cmd DMA memory, error %d\n",
2038 error = bus_dma_tag_create(sc->sc_dmat, 1, 0,
2039 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES,
2040 IWN_MAX_SCATTER - 1, MCLBYTES, BUS_DMA_NOWAIT, &ring->data_dmat);
2042 device_printf(sc->sc_dev,
2043 "%s: could not create TX buf DMA tag, error %d\n",
2048 paddr = ring->cmd_dma.paddr;
2049 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
2050 struct iwn_tx_data *data = &ring->data[i];
2052 data->cmd_paddr = paddr;
2053 data->scratch_paddr = paddr + 12;
2054 paddr += sizeof (struct iwn_tx_cmd);
2056 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
2058 device_printf(sc->sc_dev,
2059 "%s: could not create TX buf DMA map, error %d\n",
2065 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2069 fail: iwn_free_tx_ring(sc, ring);
2070 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__);
2075 iwn_reset_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
2079 DPRINTF(sc, IWN_DEBUG_TRACE, "->doing %s \n", __func__);
2081 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
2082 struct iwn_tx_data *data = &ring->data[i];
2084 if (data->m != NULL) {
2085 bus_dmamap_sync(ring->data_dmat, data->map,
2086 BUS_DMASYNC_POSTWRITE);
2087 bus_dmamap_unload(ring->data_dmat, data->map);
2092 /* Clear TX descriptors. */
2093 memset(ring->desc, 0, ring->desc_dma.size);
2094 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
2095 BUS_DMASYNC_PREWRITE);
2096 sc->qfullmsk &= ~(1 << ring->qid);
2102 iwn_free_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
2106 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s \n", __func__);
2108 iwn_dma_contig_free(&ring->desc_dma);
2109 iwn_dma_contig_free(&ring->cmd_dma);
2111 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
2112 struct iwn_tx_data *data = &ring->data[i];
2114 if (data->m != NULL) {
2115 bus_dmamap_sync(ring->data_dmat, data->map,
2116 BUS_DMASYNC_POSTWRITE);
2117 bus_dmamap_unload(ring->data_dmat, data->map);
2120 if (data->map != NULL)
2121 bus_dmamap_destroy(ring->data_dmat, data->map);
2123 if (ring->data_dmat != NULL) {
2124 bus_dma_tag_destroy(ring->data_dmat);
2125 ring->data_dmat = NULL;
2130 iwn5000_ict_reset(struct iwn_softc *sc)
2132 /* Disable interrupts. */
2133 IWN_WRITE(sc, IWN_INT_MASK, 0);
2135 /* Reset ICT table. */
2136 memset(sc->ict, 0, IWN_ICT_SIZE);
2139 /* Set physical address of ICT table (4KB aligned). */
2140 DPRINTF(sc, IWN_DEBUG_RESET, "%s: enabling ICT\n", __func__);
2141 IWN_WRITE(sc, IWN_DRAM_INT_TBL, IWN_DRAM_INT_TBL_ENABLE |
2142 IWN_DRAM_INT_TBL_WRAP_CHECK | sc->ict_dma.paddr >> 12);
2144 /* Enable periodic RX interrupt. */
2145 sc->int_mask |= IWN_INT_RX_PERIODIC;
2146 /* Switch to ICT interrupt mode in driver. */
2147 sc->sc_flags |= IWN_FLAG_USE_ICT;
2149 /* Re-enable interrupts. */
2150 IWN_WRITE(sc, IWN_INT, 0xffffffff);
2151 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
2155 iwn_read_eeprom(struct iwn_softc *sc, uint8_t macaddr[IEEE80211_ADDR_LEN])
2157 struct iwn_ops *ops = &sc->ops;
2161 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2163 /* Check whether adapter has an EEPROM or an OTPROM. */
2164 if (sc->hw_type >= IWN_HW_REV_TYPE_1000 &&
2165 (IWN_READ(sc, IWN_OTP_GP) & IWN_OTP_GP_DEV_SEL_OTP))
2166 sc->sc_flags |= IWN_FLAG_HAS_OTPROM;
2167 DPRINTF(sc, IWN_DEBUG_RESET, "%s found\n",
2168 (sc->sc_flags & IWN_FLAG_HAS_OTPROM) ? "OTPROM" : "EEPROM");
2170 /* Adapter has to be powered on for EEPROM access to work. */
2171 if ((error = iwn_apm_init(sc)) != 0) {
2172 device_printf(sc->sc_dev,
2173 "%s: could not power ON adapter, error %d\n", __func__,
2178 if ((IWN_READ(sc, IWN_EEPROM_GP) & 0x7) == 0) {
2179 device_printf(sc->sc_dev, "%s: bad ROM signature\n", __func__);
2182 if ((error = iwn_eeprom_lock(sc)) != 0) {
2183 device_printf(sc->sc_dev, "%s: could not lock ROM, error %d\n",
2187 if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) {
2188 if ((error = iwn_init_otprom(sc)) != 0) {
2189 device_printf(sc->sc_dev,
2190 "%s: could not initialize OTPROM, error %d\n",
2196 iwn_read_prom_data(sc, IWN_EEPROM_SKU_CAP, &val, 2);
2197 DPRINTF(sc, IWN_DEBUG_RESET, "SKU capabilities=0x%04x\n", le16toh(val));
2198 /* Check if HT support is bonded out. */
2199 if (val & htole16(IWN_EEPROM_SKU_CAP_11N))
2200 sc->sc_flags |= IWN_FLAG_HAS_11N;
2202 iwn_read_prom_data(sc, IWN_EEPROM_RFCFG, &val, 2);
2203 sc->rfcfg = le16toh(val);
2204 DPRINTF(sc, IWN_DEBUG_RESET, "radio config=0x%04x\n", sc->rfcfg);
2205 /* Read Tx/Rx chains from ROM unless it's known to be broken. */
2206 if (sc->txchainmask == 0)
2207 sc->txchainmask = IWN_RFCFG_TXANTMSK(sc->rfcfg);
2208 if (sc->rxchainmask == 0)
2209 sc->rxchainmask = IWN_RFCFG_RXANTMSK(sc->rfcfg);
2211 /* Read MAC address. */
2212 iwn_read_prom_data(sc, IWN_EEPROM_MAC, macaddr, 6);
2214 /* Read adapter-specific information from EEPROM. */
2215 ops->read_eeprom(sc);
2217 iwn_apm_stop(sc); /* Power OFF adapter. */
2219 iwn_eeprom_unlock(sc);
2221 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2227 iwn4965_read_eeprom(struct iwn_softc *sc)
2233 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2235 /* Read regulatory domain (4 ASCII characters). */
2236 iwn_read_prom_data(sc, IWN4965_EEPROM_DOMAIN, sc->eeprom_domain, 4);
2238 /* Read the list of authorized channels (20MHz ones only). */
2239 for (i = 0; i < IWN_NBANDS - 1; i++) {
2240 addr = iwn4965_regulatory_bands[i];
2241 iwn_read_eeprom_channels(sc, i, addr);
2244 /* Read maximum allowed TX power for 2GHz and 5GHz bands. */
2245 iwn_read_prom_data(sc, IWN4965_EEPROM_MAXPOW, &val, 2);
2246 sc->maxpwr2GHz = val & 0xff;
2247 sc->maxpwr5GHz = val >> 8;
2248 /* Check that EEPROM values are within valid range. */
2249 if (sc->maxpwr5GHz < 20 || sc->maxpwr5GHz > 50)
2250 sc->maxpwr5GHz = 38;
2251 if (sc->maxpwr2GHz < 20 || sc->maxpwr2GHz > 50)
2252 sc->maxpwr2GHz = 38;
2253 DPRINTF(sc, IWN_DEBUG_RESET, "maxpwr 2GHz=%d 5GHz=%d\n",
2254 sc->maxpwr2GHz, sc->maxpwr5GHz);
2256 /* Read samples for each TX power group. */
2257 iwn_read_prom_data(sc, IWN4965_EEPROM_BANDS, sc->bands,
2260 /* Read voltage at which samples were taken. */
2261 iwn_read_prom_data(sc, IWN4965_EEPROM_VOLTAGE, &val, 2);
2262 sc->eeprom_voltage = (int16_t)le16toh(val);
2263 DPRINTF(sc, IWN_DEBUG_RESET, "voltage=%d (in 0.3V)\n",
2264 sc->eeprom_voltage);
2267 /* Print samples. */
2268 if (sc->sc_debug & IWN_DEBUG_ANY) {
2269 for (i = 0; i < IWN_NBANDS - 1; i++)
2270 iwn4965_print_power_group(sc, i);
2274 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2279 iwn4965_print_power_group(struct iwn_softc *sc, int i)
2281 struct iwn4965_eeprom_band *band = &sc->bands[i];
2282 struct iwn4965_eeprom_chan_samples *chans = band->chans;
2285 kprintf("===band %d===\n", i);
2286 kprintf("chan lo=%d, chan hi=%d\n", band->lo, band->hi);
2287 kprintf("chan1 num=%d\n", chans[0].num);
2288 for (c = 0; c < 2; c++) {
2289 for (j = 0; j < IWN_NSAMPLES; j++) {
2290 kprintf("chain %d, sample %d: temp=%d gain=%d "
2291 "power=%d pa_det=%d\n", c, j,
2292 chans[0].samples[c][j].temp,
2293 chans[0].samples[c][j].gain,
2294 chans[0].samples[c][j].power,
2295 chans[0].samples[c][j].pa_det);
2298 kprintf("chan2 num=%d\n", chans[1].num);
2299 for (c = 0; c < 2; c++) {
2300 for (j = 0; j < IWN_NSAMPLES; j++) {
2301 kprintf("chain %d, sample %d: temp=%d gain=%d "
2302 "power=%d pa_det=%d\n", c, j,
2303 chans[1].samples[c][j].temp,
2304 chans[1].samples[c][j].gain,
2305 chans[1].samples[c][j].power,
2306 chans[1].samples[c][j].pa_det);
2313 iwn5000_read_eeprom(struct iwn_softc *sc)
2315 struct iwn5000_eeprom_calib_hdr hdr;
2317 uint32_t base, addr;
2321 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2323 /* Read regulatory domain (4 ASCII characters). */
2324 iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);
2325 base = le16toh(val);
2326 iwn_read_prom_data(sc, base + IWN5000_EEPROM_DOMAIN,
2327 sc->eeprom_domain, 4);
2329 /* Read the list of authorized channels (20MHz ones only). */
2330 for (i = 0; i < IWN_NBANDS - 1; i++) {
2331 addr = base + sc->base_params->regulatory_bands[i];
2332 iwn_read_eeprom_channels(sc, i, addr);
2335 /* Read enhanced TX power information for 6000 Series. */
2336 if (sc->base_params->enhanced_TX_power)
2337 iwn_read_eeprom_enhinfo(sc);
2339 iwn_read_prom_data(sc, IWN5000_EEPROM_CAL, &val, 2);
2340 base = le16toh(val);
2341 iwn_read_prom_data(sc, base, &hdr, sizeof hdr);
2342 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
2343 "%s: calib version=%u pa type=%u voltage=%u\n", __func__,
2344 hdr.version, hdr.pa_type, le16toh(hdr.volt));
2345 sc->calib_ver = hdr.version;
2347 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2) {
2348 sc->eeprom_voltage = le16toh(hdr.volt);
2349 iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);
2350 sc->eeprom_temp_high=le16toh(val);
2351 iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2);
2352 sc->eeprom_temp = le16toh(val);
2355 if (sc->hw_type == IWN_HW_REV_TYPE_5150) {
2356 /* Compute temperature offset. */
2357 iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);
2358 sc->eeprom_temp = le16toh(val);
2359 iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2);
2360 volt = le16toh(val);
2361 sc->temp_off = sc->eeprom_temp - (volt / -5);
2362 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "temp=%d volt=%d offset=%dK\n",
2363 sc->eeprom_temp, volt, sc->temp_off);
2365 /* Read crystal calibration. */
2366 iwn_read_prom_data(sc, base + IWN5000_EEPROM_CRYSTAL,
2367 &sc->eeprom_crystal, sizeof (uint32_t));
2368 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "crystal calibration 0x%08x\n",
2369 le32toh(sc->eeprom_crystal));
2372 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2377 * Translate EEPROM flags to net80211.
2380 iwn_eeprom_channel_flags(struct iwn_eeprom_chan *channel)
2385 if ((channel->flags & IWN_EEPROM_CHAN_ACTIVE) == 0)
2386 nflags |= IEEE80211_CHAN_PASSIVE;
2387 if ((channel->flags & IWN_EEPROM_CHAN_IBSS) == 0)
2388 nflags |= IEEE80211_CHAN_NOADHOC;
2389 if (channel->flags & IWN_EEPROM_CHAN_RADAR) {
2390 nflags |= IEEE80211_CHAN_DFS;
2391 /* XXX apparently IBSS may still be marked */
2392 nflags |= IEEE80211_CHAN_NOADHOC;
2399 iwn_read_eeprom_band(struct iwn_softc *sc, int n)
2401 struct ifnet *ifp = sc->sc_ifp;
2402 struct ieee80211com *ic = ifp->if_l2com;
2403 struct iwn_eeprom_chan *channels = sc->eeprom_channels[n];
2404 const struct iwn_chan_band *band = &iwn_bands[n];
2405 struct ieee80211_channel *c;
2409 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2411 for (i = 0; i < band->nchan; i++) {
2412 if (!(channels[i].flags & IWN_EEPROM_CHAN_VALID)) {
2413 DPRINTF(sc, IWN_DEBUG_RESET,
2414 "skip chan %d flags 0x%x maxpwr %d\n",
2415 band->chan[i], channels[i].flags,
2416 channels[i].maxpwr);
2419 chan = band->chan[i];
2420 nflags = iwn_eeprom_channel_flags(&channels[i]);
2422 c = &ic->ic_channels[ic->ic_nchans++];
2424 c->ic_maxregpower = channels[i].maxpwr;
2425 c->ic_maxpower = 2*c->ic_maxregpower;
2427 if (n == 0) { /* 2GHz band */
2428 c->ic_freq = ieee80211_ieee2mhz(chan, IEEE80211_CHAN_G);
2429 /* G =>'s B is supported */
2430 c->ic_flags = IEEE80211_CHAN_B | nflags;
2431 c = &ic->ic_channels[ic->ic_nchans++];
2433 c->ic_flags = IEEE80211_CHAN_G | nflags;
2434 } else { /* 5GHz band */
2435 c->ic_freq = ieee80211_ieee2mhz(chan, IEEE80211_CHAN_A);
2436 c->ic_flags = IEEE80211_CHAN_A | nflags;
2439 /* Save maximum allowed TX power for this channel. */
2440 sc->maxpwr[chan] = channels[i].maxpwr;
2442 DPRINTF(sc, IWN_DEBUG_RESET,
2443 "add chan %d flags 0x%x maxpwr %d\n", chan,
2444 channels[i].flags, channels[i].maxpwr);
2446 if (sc->sc_flags & IWN_FLAG_HAS_11N) {
2447 /* add HT20, HT40 added separately */
2448 c = &ic->ic_channels[ic->ic_nchans++];
2450 c->ic_flags |= IEEE80211_CHAN_HT20;
2454 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2459 iwn_read_eeprom_ht40(struct iwn_softc *sc, int n)
2461 struct ifnet *ifp = sc->sc_ifp;
2462 struct ieee80211com *ic = ifp->if_l2com;
2463 struct iwn_eeprom_chan *channels = sc->eeprom_channels[n];
2464 const struct iwn_chan_band *band = &iwn_bands[n];
2465 struct ieee80211_channel *c, *cent, *extc;
2469 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s start\n", __func__);
2471 if (!(sc->sc_flags & IWN_FLAG_HAS_11N)) {
2472 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end no 11n\n", __func__);
2476 for (i = 0; i < band->nchan; i++) {
2477 if (!(channels[i].flags & IWN_EEPROM_CHAN_VALID)) {
2478 DPRINTF(sc, IWN_DEBUG_RESET,
2479 "skip chan %d flags 0x%x maxpwr %d\n",
2480 band->chan[i], channels[i].flags,
2481 channels[i].maxpwr);
2484 chan = band->chan[i];
2485 nflags = iwn_eeprom_channel_flags(&channels[i]);
2488 * Each entry defines an HT40 channel pair; find the
2489 * center channel, then the extension channel above.
2491 cent = ieee80211_find_channel_byieee(ic, chan,
2492 (n == 5 ? IEEE80211_CHAN_G : IEEE80211_CHAN_A));
2493 if (cent == NULL) { /* XXX shouldn't happen */
2494 device_printf(sc->sc_dev,
2495 "%s: no entry for channel %d\n", __func__, chan);
2498 extc = ieee80211_find_channel(ic, cent->ic_freq+20,
2499 (n == 5 ? IEEE80211_CHAN_G : IEEE80211_CHAN_A));
2501 DPRINTF(sc, IWN_DEBUG_RESET,
2502 "%s: skip chan %d, extension channel not found\n",
2507 DPRINTF(sc, IWN_DEBUG_RESET,
2508 "add ht40 chan %d flags 0x%x maxpwr %d\n",
2509 chan, channels[i].flags, channels[i].maxpwr);
2511 c = &ic->ic_channels[ic->ic_nchans++];
2513 c->ic_extieee = extc->ic_ieee;
2514 c->ic_flags &= ~IEEE80211_CHAN_HT;
2515 c->ic_flags |= IEEE80211_CHAN_HT40U | nflags;
2516 c = &ic->ic_channels[ic->ic_nchans++];
2518 c->ic_extieee = cent->ic_ieee;
2519 c->ic_flags &= ~IEEE80211_CHAN_HT;
2520 c->ic_flags |= IEEE80211_CHAN_HT40D | nflags;
2523 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2528 iwn_read_eeprom_channels(struct iwn_softc *sc, int n, uint32_t addr)
2530 struct ifnet *ifp = sc->sc_ifp;
2531 struct ieee80211com *ic = ifp->if_l2com;
2533 iwn_read_prom_data(sc, addr, &sc->eeprom_channels[n],
2534 iwn_bands[n].nchan * sizeof (struct iwn_eeprom_chan));
2537 iwn_read_eeprom_band(sc, n);
2539 iwn_read_eeprom_ht40(sc, n);
2540 ieee80211_sort_channels(ic->ic_channels, ic->ic_nchans);
2543 static struct iwn_eeprom_chan *
2544 iwn_find_eeprom_channel(struct iwn_softc *sc, struct ieee80211_channel *c)
2546 int band, chan, i, j;
2548 if (IEEE80211_IS_CHAN_HT40(c)) {
2549 band = IEEE80211_IS_CHAN_5GHZ(c) ? 6 : 5;
2550 if (IEEE80211_IS_CHAN_HT40D(c))
2551 chan = c->ic_extieee;
2554 for (i = 0; i < iwn_bands[band].nchan; i++) {
2555 if (iwn_bands[band].chan[i] == chan)
2556 return &sc->eeprom_channels[band][i];
2559 for (j = 0; j < 5; j++) {
2560 for (i = 0; i < iwn_bands[j].nchan; i++) {
2561 if (iwn_bands[j].chan[i] == c->ic_ieee)
2562 return &sc->eeprom_channels[j][i];
2570 * Enforce flags read from EEPROM.
2573 iwn_setregdomain(struct ieee80211com *ic, struct ieee80211_regdomain *rd,
2574 int nchan, struct ieee80211_channel chans[])
2576 struct iwn_softc *sc = ic->ic_ifp->if_softc;
2579 for (i = 0; i < nchan; i++) {
2580 struct ieee80211_channel *c = &chans[i];
2581 struct iwn_eeprom_chan *channel;
2583 channel = iwn_find_eeprom_channel(sc, c);
2584 if (channel == NULL) {
2585 if_printf(ic->ic_ifp,
2586 "%s: invalid channel %u freq %u/0x%x\n",
2587 __func__, c->ic_ieee, c->ic_freq, c->ic_flags);
2590 c->ic_flags |= iwn_eeprom_channel_flags(channel);
2597 iwn_read_eeprom_enhinfo(struct iwn_softc *sc)
2599 struct iwn_eeprom_enhinfo enhinfo[35];
2600 struct ifnet *ifp = sc->sc_ifp;
2601 struct ieee80211com *ic = ifp->if_l2com;
2602 struct ieee80211_channel *c;
2608 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2610 iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);
2611 base = le16toh(val);
2612 iwn_read_prom_data(sc, base + IWN6000_EEPROM_ENHINFO,
2613 enhinfo, sizeof enhinfo);
2615 for (i = 0; i < nitems(enhinfo); i++) {
2616 flags = enhinfo[i].flags;
2617 if (!(flags & IWN_ENHINFO_VALID))
2618 continue; /* Skip invalid entries. */
2621 if (sc->txchainmask & IWN_ANT_A)
2622 maxpwr = MAX(maxpwr, enhinfo[i].chain[0]);
2623 if (sc->txchainmask & IWN_ANT_B)
2624 maxpwr = MAX(maxpwr, enhinfo[i].chain[1]);
2625 if (sc->txchainmask & IWN_ANT_C)
2626 maxpwr = MAX(maxpwr, enhinfo[i].chain[2]);
2627 if (sc->ntxchains == 2)
2628 maxpwr = MAX(maxpwr, enhinfo[i].mimo2);
2629 else if (sc->ntxchains == 3)
2630 maxpwr = MAX(maxpwr, enhinfo[i].mimo3);
2632 for (j = 0; j < ic->ic_nchans; j++) {
2633 c = &ic->ic_channels[j];
2634 if ((flags & IWN_ENHINFO_5GHZ)) {
2635 if (!IEEE80211_IS_CHAN_A(c))
2637 } else if ((flags & IWN_ENHINFO_OFDM)) {
2638 if (!IEEE80211_IS_CHAN_G(c))
2640 } else if (!IEEE80211_IS_CHAN_B(c))
2642 if ((flags & IWN_ENHINFO_HT40)) {
2643 if (!IEEE80211_IS_CHAN_HT40(c))
2646 if (IEEE80211_IS_CHAN_HT40(c))
2649 if (enhinfo[i].chan != 0 &&
2650 enhinfo[i].chan != c->ic_ieee)
2653 DPRINTF(sc, IWN_DEBUG_RESET,
2654 "channel %d(%x), maxpwr %d\n", c->ic_ieee,
2655 c->ic_flags, maxpwr / 2);
2656 c->ic_maxregpower = maxpwr / 2;
2657 c->ic_maxpower = maxpwr;
2661 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2665 static struct ieee80211_node *
2666 iwn_node_alloc(struct ieee80211vap *vap, const uint8_t mac[IEEE80211_ADDR_LEN])
2668 return kmalloc(sizeof(struct iwn_node), M_80211_NODE,
2669 M_INTWAIT | M_ZERO);
2675 switch (rate & 0xff) {
2676 case 12: return 0xd;
2677 case 18: return 0xf;
2678 case 24: return 0x5;
2679 case 36: return 0x7;
2680 case 48: return 0x9;
2681 case 72: return 0xb;
2682 case 96: return 0x1;
2683 case 108: return 0x3;
2687 case 22: return 110;
2693 * Calculate the required PLCP value from the given rate,
2694 * to the given node.
2696 * This will take the node configuration (eg 11n, rate table
2697 * setup, etc) into consideration.
2700 iwn_rate_to_plcp(struct iwn_softc *sc, struct ieee80211_node *ni,
2703 #define RV(v) ((v) & IEEE80211_RATE_VAL)
2704 struct ieee80211com *ic = ni->ni_ic;
2705 uint8_t txant1, txant2;
2709 /* Use the first valid TX antenna. */
2710 txant1 = IWN_LSB(sc->txchainmask);
2711 txant2 = IWN_LSB(sc->txchainmask & ~txant1);
2714 * If it's an MCS rate, let's set the plcp correctly
2715 * and set the relevant flags based on the node config.
2717 if (rate & IEEE80211_RATE_MCS) {
2719 * Set the initial PLCP value to be between 0->31 for
2720 * MCS 0 -> MCS 31, then set the "I'm an MCS rate!"
2723 plcp = RV(rate) | IWN_RFLAG_MCS;
2726 * XXX the following should only occur if both
2727 * the local configuration _and_ the remote node
2728 * advertise these capabilities. Thus this code
2733 * Set the channel width and guard interval.
2735 if (IEEE80211_IS_CHAN_HT40(ni->ni_chan)) {
2736 plcp |= IWN_RFLAG_HT40;
2737 if (ni->ni_htcap & IEEE80211_HTCAP_SHORTGI40)
2738 plcp |= IWN_RFLAG_SGI;
2739 } else if (ni->ni_htcap & IEEE80211_HTCAP_SHORTGI20) {
2740 plcp |= IWN_RFLAG_SGI;
2744 * If it's a two stream rate, enable TX on both
2747 * XXX three stream rates?
2750 plcp |= IWN_RFLAG_ANT(txant1 | txant2);
2752 plcp |= IWN_RFLAG_ANT(txant1);
2755 * Set the initial PLCP - fine for both
2756 * OFDM and CCK rates.
2758 plcp = rate2plcp(rate);
2760 /* Set CCK flag if it's CCK */
2762 /* XXX It would be nice to have a method
2763 * to map the ridx -> phy table entry
2764 * so we could just query that, rather than
2765 * this hack to check against IWN_RIDX_OFDM6.
2767 ridx = ieee80211_legacy_rate_lookup(ic->ic_rt,
2768 rate & IEEE80211_RATE_VAL);
2769 if (ridx < IWN_RIDX_OFDM6 &&
2770 IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
2771 plcp |= IWN_RFLAG_CCK;
2773 /* Set antenna configuration */
2774 plcp |= IWN_RFLAG_ANT(txant1);
2777 DPRINTF(sc, IWN_DEBUG_TXRATE, "%s: rate=0x%02x, plcp=0x%08x\n",
2782 return (htole32(plcp));
2787 iwn_newassoc(struct ieee80211_node *ni, int isnew)
2789 /* Doesn't do anything at the moment */
2793 iwn_media_change(struct ifnet *ifp)
2797 error = ieee80211_media_change(ifp);
2798 /* NB: only the fixed rate can change and that doesn't need a reset */
2799 return (error == ENETRESET ? 0 : error);
2803 iwn_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
2805 struct iwn_vap *ivp = IWN_VAP(vap);
2806 struct ieee80211com *ic = vap->iv_ic;
2807 struct iwn_softc *sc = ic->ic_ifp->if_softc;
2810 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2812 DPRINTF(sc, IWN_DEBUG_STATE, "%s: %s -> %s\n", __func__,
2813 ieee80211_state_name[vap->iv_state], ieee80211_state_name[nstate]);
2815 callout_stop(&sc->calib_to);
2817 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
2820 case IEEE80211_S_ASSOC:
2821 if (vap->iv_state != IEEE80211_S_RUN)
2824 case IEEE80211_S_AUTH:
2825 if (vap->iv_state == IEEE80211_S_AUTH)
2829 * !AUTH -> AUTH transition requires state reset to handle
2830 * reassociations correctly.
2832 sc->rxon->associd = 0;
2833 sc->rxon->filter &= ~htole32(IWN_FILTER_BSS);
2834 sc->calib.state = IWN_CALIB_STATE_INIT;
2836 if ((error = iwn_auth(sc, vap)) != 0) {
2837 device_printf(sc->sc_dev,
2838 "%s: could not move to auth state\n", __func__);
2842 case IEEE80211_S_RUN:
2844 * RUN -> RUN transition; Just restart the timers.
2846 if (vap->iv_state == IEEE80211_S_RUN) {
2852 * !RUN -> RUN requires setting the association id
2853 * which is done with a firmware cmd. We also defer
2854 * starting the timers until that work is done.
2856 if ((error = iwn_run(sc, vap)) != 0) {
2857 device_printf(sc->sc_dev,
2858 "%s: could not move to run state\n", __func__);
2862 case IEEE80211_S_INIT:
2863 sc->calib.state = IWN_CALIB_STATE_INIT;
2870 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__);
2874 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
2876 return ivp->iv_newstate(vap, nstate, arg);
2880 iwn_calib_timeout(void *arg)
2882 struct iwn_softc *sc = arg;
2884 wlan_serialize_enter();
2886 /* Force automatic TX power calibration every 60 secs. */
2887 if (++sc->calib_cnt >= 120) {
2890 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s\n",
2891 "sending request for statistics");
2892 (void)iwn_cmd(sc, IWN_CMD_GET_STATISTICS, &flags,
2896 callout_reset(&sc->calib_to, msecs_to_ticks(500), iwn_calib_timeout,
2898 wlan_serialize_exit();
2902 * Process an RX_PHY firmware notification. This is usually immediately
2903 * followed by an MPDU_RX_DONE notification.
2906 iwn_rx_phy(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2907 struct iwn_rx_data *data)
2909 struct iwn_rx_stat *stat = (struct iwn_rx_stat *)(desc + 1);
2911 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: received PHY stats\n", __func__);
2912 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
2914 /* Save RX statistics, they will be used on MPDU_RX_DONE. */
2915 memcpy(&sc->last_rx_stat, stat, sizeof (*stat));
2916 sc->last_rx_valid = 1;
2920 * Process an RX_DONE (4965AGN only) or MPDU_RX_DONE firmware notification.
2921 * Each MPDU_RX_DONE notification must be preceded by an RX_PHY one.
2924 iwn_rx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2925 struct iwn_rx_data *data)
2927 struct iwn_ops *ops = &sc->ops;
2928 struct ifnet *ifp = sc->sc_ifp;
2929 struct ieee80211com *ic = ifp->if_l2com;
2930 struct iwn_rx_ring *ring = &sc->rxq;
2931 struct ieee80211_frame *wh;
2932 struct ieee80211_node *ni;
2933 struct mbuf *m, *m1;
2934 struct iwn_rx_stat *stat;
2938 int error, len, rssi, nf;
2940 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2942 if (desc->type == IWN_MPDU_RX_DONE) {
2943 /* Check for prior RX_PHY notification. */
2944 if (!sc->last_rx_valid) {
2945 DPRINTF(sc, IWN_DEBUG_ANY,
2946 "%s: missing RX_PHY\n", __func__);
2949 stat = &sc->last_rx_stat;
2951 stat = (struct iwn_rx_stat *)(desc + 1);
2953 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);
2955 if (stat->cfg_phy_len > IWN_STAT_MAXLEN) {
2956 device_printf(sc->sc_dev,
2957 "%s: invalid RX statistic header, len %d\n", __func__,
2961 if (desc->type == IWN_MPDU_RX_DONE) {
2962 struct iwn_rx_mpdu *mpdu = (struct iwn_rx_mpdu *)(desc + 1);
2963 head = (caddr_t)(mpdu + 1);
2964 len = le16toh(mpdu->len);
2966 head = (caddr_t)(stat + 1) + stat->cfg_phy_len;
2967 len = le16toh(stat->len);
2970 flags = le32toh(*(uint32_t *)(head + len));
2972 /* Discard frames with a bad FCS early. */
2973 if ((flags & IWN_RX_NOERROR) != IWN_RX_NOERROR) {
2974 DPRINTF(sc, IWN_DEBUG_RECV, "%s: RX flags error %x\n",
2976 IFNET_STAT_INC(ifp, ierrors, 1);
2979 /* Discard frames that are too short. */
2980 if (len < sizeof (*wh)) {
2981 DPRINTF(sc, IWN_DEBUG_RECV, "%s: frame too short: %d\n",
2983 IFNET_STAT_INC(ifp, ierrors, 1);
2987 m1 = m_getjcl(MB_DONTWAIT, MT_DATA, M_PKTHDR, IWN_RBUF_SIZE);
2989 DPRINTF(sc, IWN_DEBUG_ANY, "%s: no mbuf to restock ring\n",
2991 IFNET_STAT_INC(ifp, ierrors, 1);
2994 bus_dmamap_unload(ring->data_dmat, data->map);
2996 error = bus_dmamap_load(ring->data_dmat, data->map, mtod(m1, void *),
2997 IWN_RBUF_SIZE, iwn_dma_map_addr, &paddr, BUS_DMA_NOWAIT);
2998 if (error != 0 && error != EFBIG) {
2999 device_printf(sc->sc_dev,
3000 "%s: bus_dmamap_load failed, error %d\n", __func__, error);
3003 /* Try to reload the old mbuf. */
3004 error = bus_dmamap_load(ring->data_dmat, data->map,
3005 mtod(data->m, void *), IWN_RBUF_SIZE, iwn_dma_map_addr,
3006 &paddr, BUS_DMA_NOWAIT);
3007 if (error != 0 && error != EFBIG) {
3008 panic("%s: could not load old RX mbuf", __func__);
3010 /* Physical address may have changed. */
3011 ring->desc[ring->cur] = htole32(paddr >> 8);
3012 bus_dmamap_sync(ring->data_dmat, ring->desc_dma.map,
3013 BUS_DMASYNC_PREWRITE);
3014 IFNET_STAT_INC(ifp, ierrors, 1);
3020 /* Update RX descriptor. */
3021 ring->desc[ring->cur] = htole32(paddr >> 8);
3022 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
3023 BUS_DMASYNC_PREWRITE);
3025 /* Finalize mbuf. */
3026 m->m_pkthdr.rcvif = ifp;
3028 m->m_pkthdr.len = m->m_len = len;
3030 /* Grab a reference to the source node. */
3031 wh = mtod(m, struct ieee80211_frame *);
3032 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh);
3033 nf = (ni != NULL && ni->ni_vap->iv_state == IEEE80211_S_RUN &&
3034 (ic->ic_flags & IEEE80211_F_SCAN) == 0) ? sc->noise : -95;
3036 rssi = ops->get_rssi(sc, stat);
3038 if (ieee80211_radiotap_active(ic)) {
3039 struct iwn_rx_radiotap_header *tap = &sc->sc_rxtap;
3042 if (stat->flags & htole16(IWN_STAT_FLAG_SHPREAMBLE))
3043 tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
3044 tap->wr_dbm_antsignal = (int8_t)rssi;
3045 tap->wr_dbm_antnoise = (int8_t)nf;
3046 tap->wr_tsft = stat->tstamp;
3047 switch (stat->rate) {
3049 case 10: tap->wr_rate = 2; break;
3050 case 20: tap->wr_rate = 4; break;
3051 case 55: tap->wr_rate = 11; break;
3052 case 110: tap->wr_rate = 22; break;
3054 case 0xd: tap->wr_rate = 12; break;
3055 case 0xf: tap->wr_rate = 18; break;
3056 case 0x5: tap->wr_rate = 24; break;
3057 case 0x7: tap->wr_rate = 36; break;
3058 case 0x9: tap->wr_rate = 48; break;
3059 case 0xb: tap->wr_rate = 72; break;
3060 case 0x1: tap->wr_rate = 96; break;
3061 case 0x3: tap->wr_rate = 108; break;
3062 /* Unknown rate: should not happen. */
3063 default: tap->wr_rate = 0;
3067 /* Send the frame to the 802.11 layer. */
3069 if (ni->ni_flags & IEEE80211_NODE_HT)
3070 m->m_flags |= M_AMPDU;
3071 (void)ieee80211_input(ni, m, rssi - nf, nf);
3072 /* Node is no longer needed. */
3073 ieee80211_free_node(ni);
3075 (void)ieee80211_input_all(ic, m, rssi - nf, nf);
3078 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3082 /* Process an incoming Compressed BlockAck. */
3084 iwn_rx_compressed_ba(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3085 struct iwn_rx_data *data)
3087 struct iwn_ops *ops = &sc->ops;
3088 struct ifnet *ifp = sc->sc_ifp;
3089 struct iwn_node *wn;
3090 struct ieee80211_node *ni;
3091 struct iwn_compressed_ba *ba = (struct iwn_compressed_ba *)(desc + 1);
3092 struct iwn_tx_ring *txq;
3093 struct iwn_tx_data *txdata;
3094 struct ieee80211_tx_ampdu *tap;
3099 int ackfailcnt = 0, i, lastidx, qid, *res, shift;
3101 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3103 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3105 qid = le16toh(ba->qid);
3106 txq = &sc->txq[ba->qid];
3107 tap = sc->qid2tap[ba->qid];
3109 wn = (void *)tap->txa_ni;
3113 if (!IEEE80211_AMPDU_RUNNING(tap)) {
3114 res = tap->txa_private;
3115 ssn = tap->txa_start & 0xfff;
3118 for (lastidx = le16toh(ba->ssn) & 0xff; txq->read != lastidx;) {
3119 txdata = &txq->data[txq->read];
3121 /* Unmap and free mbuf. */
3122 bus_dmamap_sync(txq->data_dmat, txdata->map,
3123 BUS_DMASYNC_POSTWRITE);
3124 bus_dmamap_unload(txq->data_dmat, txdata->map);
3125 m = txdata->m, txdata->m = NULL;
3126 ni = txdata->ni, txdata->ni = NULL;
3128 KASSERT(ni != NULL, ("no node"));
3129 KASSERT(m != NULL, ("no mbuf"));
3131 ieee80211_tx_complete(ni, m, 1);
3134 txq->read = (txq->read + 1) % IWN_TX_RING_COUNT;
3137 if (txq->queued == 0 && res != NULL) {
3139 ops->ampdu_tx_stop(sc, qid, tid, ssn);
3141 sc->qid2tap[qid] = NULL;
3142 kfree(res, M_DEVBUF);
3146 if (wn->agg[tid].bitmap == 0)
3149 shift = wn->agg[tid].startidx - ((le16toh(ba->seq) >> 4) & 0xff);
3153 if (wn->agg[tid].nframes > (64 - shift))
3157 bitmap = (le64toh(ba->bitmap) >> shift) & wn->agg[tid].bitmap;
3158 for (i = 0; bitmap; i++) {
3159 if ((bitmap & 1) == 0) {
3160 IFNET_STAT_INC(ifp, oerrors, 1);
3161 ieee80211_ratectl_tx_complete(ni->ni_vap, ni,
3162 IEEE80211_RATECTL_TX_FAILURE, &ackfailcnt, NULL);
3164 IFNET_STAT_INC(ifp, opackets, 1);
3165 ieee80211_ratectl_tx_complete(ni->ni_vap, ni,
3166 IEEE80211_RATECTL_TX_SUCCESS, &ackfailcnt, NULL);
3171 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3176 * Process a CALIBRATION_RESULT notification sent by the initialization
3177 * firmware on response to a CMD_CALIB_CONFIG command (5000 only).
3180 iwn5000_rx_calib_results(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3181 struct iwn_rx_data *data)
3183 struct iwn_phy_calib *calib = (struct iwn_phy_calib *)(desc + 1);
3186 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3188 /* Runtime firmware should not send such a notification. */
3189 if (sc->sc_flags & IWN_FLAG_CALIB_DONE){
3190 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s received after clib done\n",
3194 len = (le32toh(desc->len) & 0x3fff) - 4;
3195 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3197 switch (calib->code) {
3198 case IWN5000_PHY_CALIB_DC:
3199 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_DC)
3202 case IWN5000_PHY_CALIB_LO:
3203 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_LO)
3206 case IWN5000_PHY_CALIB_TX_IQ:
3207 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TX_IQ)
3210 case IWN5000_PHY_CALIB_TX_IQ_PERIODIC:
3211 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TX_IQ_PERIODIC)
3214 case IWN5000_PHY_CALIB_BASE_BAND:
3215 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_BASE_BAND)
3219 if (idx == -1) /* Ignore other results. */
3222 /* Save calibration result. */
3223 if (sc->calibcmd[idx].buf != NULL)
3224 kfree(sc->calibcmd[idx].buf, M_DEVBUF);
3225 sc->calibcmd[idx].buf = kmalloc(len, M_DEVBUF, M_INTWAIT);
3226 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
3227 "saving calibration result idx=%d, code=%d len=%d\n", idx, calib->code, len);
3228 sc->calibcmd[idx].len = len;
3229 memcpy(sc->calibcmd[idx].buf, calib, len);
3233 iwn_stats_update(struct iwn_softc *sc, struct iwn_calib_state *calib,
3234 struct iwn_stats *stats, int len)
3236 struct iwn_stats_bt *stats_bt;
3237 struct iwn_stats *lstats;
3240 * First - check whether the length is the bluetooth or normal.
3242 * If it's normal - just copy it and bump out.
3243 * Otherwise we have to convert things.
3246 if (len == sizeof(struct iwn_stats) + 4) {
3247 memcpy(&sc->last_stat, stats, sizeof(struct iwn_stats));
3248 sc->last_stat_valid = 1;
3253 * If it's not the bluetooth size - log, then just copy.
3255 if (len != sizeof(struct iwn_stats_bt) + 4) {
3256 DPRINTF(sc, IWN_DEBUG_STATS,
3257 "%s: size of rx statistics (%d) not an expected size!\n",
3260 memcpy(&sc->last_stat, stats, sizeof(struct iwn_stats));
3261 sc->last_stat_valid = 1;
3268 stats_bt = (struct iwn_stats_bt *) stats;
3269 lstats = &sc->last_stat;
3272 lstats->flags = stats_bt->flags;
3274 memcpy(&lstats->rx.ofdm, &stats_bt->rx_bt.ofdm,
3275 sizeof(struct iwn_rx_phy_stats));
3276 memcpy(&lstats->rx.cck, &stats_bt->rx_bt.cck,
3277 sizeof(struct iwn_rx_phy_stats));
3278 memcpy(&lstats->rx.general, &stats_bt->rx_bt.general_bt.common,
3279 sizeof(struct iwn_rx_general_stats));
3280 memcpy(&lstats->rx.ht, &stats_bt->rx_bt.ht,
3281 sizeof(struct iwn_rx_ht_phy_stats));
3283 memcpy(&lstats->tx, &stats_bt->tx,
3284 sizeof(struct iwn_tx_stats));
3286 memcpy(&lstats->general, &stats_bt->general,
3287 sizeof(struct iwn_general_stats));
3289 /* XXX TODO: Squirrel away the extra bluetooth stats somewhere */
3290 sc->last_stat_valid = 1;
3294 * Process an RX_STATISTICS or BEACON_STATISTICS firmware notification.
3295 * The latter is sent by the firmware after each received beacon.
3298 iwn_rx_statistics(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3299 struct iwn_rx_data *data)
3301 struct iwn_ops *ops = &sc->ops;
3302 struct ifnet *ifp = sc->sc_ifp;
3303 struct ieee80211com *ic = ifp->if_l2com;
3304 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
3305 struct iwn_calib_state *calib = &sc->calib;
3306 struct iwn_stats *stats = (struct iwn_stats *)(desc + 1);
3307 struct iwn_stats *lstats;
3310 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3312 /* Ignore statistics received during a scan. */
3313 if (vap->iv_state != IEEE80211_S_RUN ||
3314 (ic->ic_flags & IEEE80211_F_SCAN)){
3315 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s received during calib\n",
3320 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3322 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_STATS,
3323 "%s: received statistics, cmd %d, len %d\n",
3324 __func__, desc->type, le16toh(desc->len));
3325 sc->calib_cnt = 0; /* Reset TX power calibration timeout. */
3328 * Collect/track general statistics for reporting.
3330 * This takes care of ensuring that the bluetooth sized message
3331 * will be correctly converted to the legacy sized message.
3333 iwn_stats_update(sc, calib, stats, le16toh(desc->len));
3336 * And now, let's take a reference of it to use!
3338 lstats = &sc->last_stat;
3340 /* Test if temperature has changed. */
3341 if (lstats->general.temp != sc->rawtemp) {
3342 /* Convert "raw" temperature to degC. */
3343 sc->rawtemp = stats->general.temp;
3344 temp = ops->get_temperature(sc);
3345 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: temperature %d\n",
3348 /* Update TX power if need be (4965AGN only). */
3349 if (sc->hw_type == IWN_HW_REV_TYPE_4965)
3350 iwn4965_power_calibration(sc, temp);
3353 if (desc->type != IWN_BEACON_STATISTICS)
3354 return; /* Reply to a statistics request. */
3356 sc->noise = iwn_get_noise(&lstats->rx.general);
3357 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: noise %d\n", __func__, sc->noise);
3359 /* Test that RSSI and noise are present in stats report. */
3360 if (le32toh(lstats->rx.general.flags) != 1) {
3361 DPRINTF(sc, IWN_DEBUG_ANY, "%s\n",
3362 "received statistics without RSSI");
3366 if (calib->state == IWN_CALIB_STATE_ASSOC)
3367 iwn_collect_noise(sc, &lstats->rx.general);
3368 else if (calib->state == IWN_CALIB_STATE_RUN) {
3369 iwn_tune_sensitivity(sc, &lstats->rx);
3371 * XXX TODO: Only run the RX recovery if we're associated!
3373 iwn_check_rx_recovery(sc, lstats);
3374 iwn_save_stats_counters(sc, lstats);
3377 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3381 * Save the relevant statistic counters for the next calibration
3385 iwn_save_stats_counters(struct iwn_softc *sc, const struct iwn_stats *rs)
3387 struct iwn_calib_state *calib = &sc->calib;
3389 /* Save counters values for next call. */
3390 calib->bad_plcp_cck = le32toh(rs->rx.cck.bad_plcp);
3391 calib->fa_cck = le32toh(rs->rx.cck.fa);
3392 calib->bad_plcp_ht = le32toh(rs->rx.ht.bad_plcp);
3393 calib->bad_plcp_ofdm = le32toh(rs->rx.ofdm.bad_plcp);
3394 calib->fa_ofdm = le32toh(rs->rx.ofdm.fa);
3396 /* Last time we received these tick values */
3397 sc->last_calib_ticks = ticks;
3401 * Process a TX_DONE firmware notification. Unfortunately, the 4965AGN
3402 * and 5000 adapters have different incompatible TX status formats.
3405 iwn4965_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3406 struct iwn_rx_data *data)
3408 struct iwn4965_tx_stat *stat = (struct iwn4965_tx_stat *)(desc + 1);
3409 struct iwn_tx_ring *ring;
3412 qid = desc->qid & 0xf;
3413 ring = &sc->txq[qid];
3415 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: "
3416 "qid %d idx %d retries %d nkill %d rate %x duration %d status %x\n",
3417 __func__, desc->qid, desc->idx, stat->ackfailcnt,
3418 stat->btkillcnt, stat->rate, le16toh(stat->duration),
3419 le32toh(stat->status));
3421 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3422 if (qid >= sc->firstaggqueue) {
3423 iwn_ampdu_tx_done(sc, qid, desc->idx, stat->nframes,
3426 iwn_tx_done(sc, desc, stat->ackfailcnt,
3427 le32toh(stat->status) & 0xff);
3432 iwn5000_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3433 struct iwn_rx_data *data)
3435 struct iwn5000_tx_stat *stat = (struct iwn5000_tx_stat *)(desc + 1);
3436 struct iwn_tx_ring *ring;
3439 qid = desc->qid & 0xf;
3440 ring = &sc->txq[qid];
3442 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: "
3443 "qid %d idx %d retries %d nkill %d rate %x duration %d status %x\n",
3444 __func__, desc->qid, desc->idx, stat->ackfailcnt,
3445 stat->btkillcnt, stat->rate, le16toh(stat->duration),
3446 le32toh(stat->status));
3449 /* Reset TX scheduler slot. */
3450 iwn5000_reset_sched(sc, desc->qid & 0xf, desc->idx);
3453 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3454 if (qid >= sc->firstaggqueue) {
3455 iwn_ampdu_tx_done(sc, qid, desc->idx, stat->nframes,
3458 iwn_tx_done(sc, desc, stat->ackfailcnt,
3459 le16toh(stat->status) & 0xff);
3464 * Adapter-independent backend for TX_DONE firmware notifications.
3467 iwn_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc, int ackfailcnt,
3470 struct ifnet *ifp = sc->sc_ifp;
3471 struct iwn_tx_ring *ring = &sc->txq[desc->qid & 0xf];
3472 struct iwn_tx_data *data = &ring->data[desc->idx];
3474 struct ieee80211_node *ni;
3475 struct ieee80211vap *vap;
3477 KASSERT(data->ni != NULL, ("no node"));
3479 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3481 /* Unmap and free mbuf. */
3482 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTWRITE);
3483 bus_dmamap_unload(ring->data_dmat, data->map);
3484 m = data->m, data->m = NULL;
3485 ni = data->ni, data->ni = NULL;
3489 * Update rate control statistics for the node.
3491 if (status & IWN_TX_FAIL) {
3492 IFNET_STAT_INC(ifp, oerrors, 1);
3493 ieee80211_ratectl_tx_complete(vap, ni,
3494 IEEE80211_RATECTL_TX_FAILURE, &ackfailcnt, NULL);
3496 IFNET_STAT_INC(ifp, opackets, 1);
3497 ieee80211_ratectl_tx_complete(vap, ni,
3498 IEEE80211_RATECTL_TX_SUCCESS, &ackfailcnt, NULL);
3502 * Channels marked for "radar" require traffic to be received
3503 * to unlock before we can transmit. Until traffic is seen
3504 * any attempt to transmit is returned immediately with status
3505 * set to IWN_TX_FAIL_TX_LOCKED. Unfortunately this can easily
3506 * happen on first authenticate after scanning. To workaround
3507 * this we ignore a failure of this sort in AUTH state so the
3508 * 802.11 layer will fall back to using a timeout to wait for
3509 * the AUTH reply. This allows the firmware time to see
3510 * traffic so a subsequent retry of AUTH succeeds. It's
3511 * unclear why the firmware does not maintain state for
3512 * channels recently visited as this would allow immediate
3513 * use of the channel after a scan (where we see traffic).
3515 if (status == IWN_TX_FAIL_TX_LOCKED &&
3516 ni->ni_vap->iv_state == IEEE80211_S_AUTH)
3517 ieee80211_tx_complete(ni, m, 0);
3519 ieee80211_tx_complete(ni, m,
3520 (status & IWN_TX_FAIL) != 0);
3522 sc->sc_tx_timer = 0;
3523 if (--ring->queued < IWN_TX_RING_LOMARK) {
3524 sc->qfullmsk &= ~(1 << ring->qid);
3525 if (sc->qfullmsk == 0 && ifq_is_oactive(&ifp->if_snd)) {
3526 ifq_clr_oactive(&ifp->if_snd);
3527 iwn_start_locked(ifp);
3531 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3536 * Process a "command done" firmware notification. This is where we wakeup
3537 * processes waiting for a synchronous command completion.
3540 iwn_cmd_done(struct iwn_softc *sc, struct iwn_rx_desc *desc)
3542 struct iwn_tx_ring *ring;
3543 struct iwn_tx_data *data;
3546 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT)
3547 cmd_queue_num = IWN_PAN_CMD_QUEUE;
3549 cmd_queue_num = IWN_CMD_QUEUE_NUM;
3551 if ((desc->qid & IWN_RX_DESC_QID_MSK) != cmd_queue_num)
3552 return; /* Not a command ack. */
3554 ring = &sc->txq[cmd_queue_num];
3555 data = &ring->data[desc->idx];
3557 /* If the command was mapped in an mbuf, free it. */
3558 if (data->m != NULL) {
3559 bus_dmamap_sync(ring->data_dmat, data->map,
3560 BUS_DMASYNC_POSTWRITE);
3561 bus_dmamap_unload(ring->data_dmat, data->map);
3565 wakeup(&ring->desc[desc->idx]);
3569 iwn_ampdu_tx_done(struct iwn_softc *sc, int qid, int idx, int nframes,
3572 struct iwn_ops *ops = &sc->ops;
3573 struct ifnet *ifp = sc->sc_ifp;
3574 struct iwn_tx_ring *ring = &sc->txq[qid];
3575 struct iwn_tx_data *data;
3577 struct iwn_node *wn;
3578 struct ieee80211_node *ni;
3579 struct ieee80211_tx_ampdu *tap;
3581 uint32_t *status = stat;
3582 uint16_t *aggstatus = stat;
3585 int bit, i, lastidx, *res, seqno, shift, start;
3587 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3590 if ((*status & 0xff) != 1 && (*status & 0xff) != 2) {
3592 kprintf("ieee80211_send_bar()\n");
3595 * If we completely fail a transmit, make sure a
3596 * notification is pushed up to the rate control
3599 tap = sc->qid2tap[qid];
3601 wn = (void *)tap->txa_ni;
3603 ieee80211_ratectl_tx_complete(ni->ni_vap, ni,
3604 IEEE80211_RATECTL_TX_FAILURE, &nframes, NULL);
3610 for (i = 0; i < nframes; i++) {
3611 if (le16toh(aggstatus[i * 2]) & 0xc)
3614 idx = le16toh(aggstatus[2*i + 1]) & 0xff;
3618 shift = 0x100 - idx + start;
3621 } else if (bit <= -64)
3622 bit = 0x100 - start + idx;
3624 shift = start - idx;
3628 bitmap = bitmap << shift;
3629 bitmap |= 1ULL << bit;
3631 tap = sc->qid2tap[qid];
3633 wn = (void *)tap->txa_ni;
3634 wn->agg[tid].bitmap = bitmap;
3635 wn->agg[tid].startidx = start;
3636 wn->agg[tid].nframes = nframes;
3640 if (!IEEE80211_AMPDU_RUNNING(tap)) {
3641 res = tap->txa_private;
3642 ssn = tap->txa_start & 0xfff;
3645 seqno = le32toh(*(status + nframes)) & 0xfff;
3646 for (lastidx = (seqno & 0xff); ring->read != lastidx;) {
3647 data = &ring->data[ring->read];
3649 /* Unmap and free mbuf. */
3650 bus_dmamap_sync(ring->data_dmat, data->map,
3651 BUS_DMASYNC_POSTWRITE);
3652 bus_dmamap_unload(ring->data_dmat, data->map);
3653 m = data->m, data->m = NULL;
3654 ni = data->ni, data->ni = NULL;
3656 KASSERT(ni != NULL, ("no node"));
3657 KASSERT(m != NULL, ("no mbuf"));
3659 ieee80211_tx_complete(ni, m, 1);
3662 ring->read = (ring->read + 1) % IWN_TX_RING_COUNT;
3665 if (ring->queued == 0 && res != NULL) {
3667 ops->ampdu_tx_stop(sc, qid, tid, ssn);
3669 sc->qid2tap[qid] = NULL;
3670 kfree(res, M_DEVBUF);
3674 sc->sc_tx_timer = 0;
3675 if (ring->queued < IWN_TX_RING_LOMARK) {
3676 sc->qfullmsk &= ~(1 << ring->qid);
3677 if (sc->qfullmsk == 0 && ifq_is_oactive(&ifp->if_snd)) {
3678 ifq_clr_oactive(&ifp->if_snd);
3679 iwn_start_locked(ifp);
3683 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3688 * Process an INT_FH_RX or INT_SW_RX interrupt.
3691 iwn_notif_intr(struct iwn_softc *sc)
3693 struct iwn_ops *ops = &sc->ops;
3694 struct ifnet *ifp = sc->sc_ifp;
3695 struct ieee80211com *ic = ifp->if_l2com;
3696 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
3699 bus_dmamap_sync(sc->rxq.stat_dma.tag, sc->rxq.stat_dma.map,
3700 BUS_DMASYNC_POSTREAD);
3702 hw = le16toh(sc->rxq.stat->closed_count) & 0xfff;
3703 while (sc->rxq.cur != hw) {
3704 struct iwn_rx_data *data = &sc->rxq.data[sc->rxq.cur];
3705 struct iwn_rx_desc *desc;
3707 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3708 BUS_DMASYNC_POSTREAD);
3709 desc = mtod(data->m, struct iwn_rx_desc *);
3711 DPRINTF(sc, IWN_DEBUG_RECV,
3712 "%s: cur=%d; qid %x idx %d flags %x type %d(%s) len %d\n",
3713 __func__, sc->rxq.cur, desc->qid & 0xf, desc->idx, desc->flags,
3714 desc->type, iwn_intr_str(desc->type),
3715 le16toh(desc->len));
3717 if (!(desc->qid & IWN_UNSOLICITED_RX_NOTIF)) /* Reply to a command. */
3718 iwn_cmd_done(sc, desc);
3720 switch (desc->type) {
3722 iwn_rx_phy(sc, desc, data);
3725 case IWN_RX_DONE: /* 4965AGN only. */
3726 case IWN_MPDU_RX_DONE:
3727 /* An 802.11 frame has been received. */
3728 iwn_rx_done(sc, desc, data);
3731 case IWN_RX_COMPRESSED_BA:
3732 /* A Compressed BlockAck has been received. */
3733 iwn_rx_compressed_ba(sc, desc, data);
3737 /* An 802.11 frame has been transmitted. */
3738 ops->tx_done(sc, desc, data);
3741 case IWN_RX_STATISTICS:
3742 case IWN_BEACON_STATISTICS:
3743 iwn_rx_statistics(sc, desc, data);
3746 case IWN_BEACON_MISSED:
3748 struct iwn_beacon_missed *miss =
3749 (struct iwn_beacon_missed *)(desc + 1);
3752 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3753 BUS_DMASYNC_POSTREAD);
3754 misses = le32toh(miss->consecutive);
3756 DPRINTF(sc, IWN_DEBUG_STATE,
3757 "%s: beacons missed %d/%d\n", __func__,
3758 misses, le32toh(miss->total));
3760 * If more than 5 consecutive beacons are missed,
3761 * reinitialize the sensitivity state machine.
3763 if (vap->iv_state == IEEE80211_S_RUN &&
3764 (ic->ic_flags & IEEE80211_F_SCAN) == 0) {
3766 (void)iwn_init_sensitivity(sc);
3767 if (misses >= vap->iv_bmissthreshold) {
3768 ieee80211_beacon_miss(ic);
3775 struct iwn_ucode_info *uc =
3776 (struct iwn_ucode_info *)(desc + 1);
3778 /* The microcontroller is ready. */
3779 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3780 BUS_DMASYNC_POSTREAD);
3781 DPRINTF(sc, IWN_DEBUG_RESET,
3782 "microcode alive notification version=%d.%d "
3783 "subtype=%x alive=%x\n", uc->major, uc->minor,
3784 uc->subtype, le32toh(uc->valid));
3786 if (le32toh(uc->valid) != 1) {
3787 device_printf(sc->sc_dev,
3788 "microcontroller initialization failed");
3791 if (uc->subtype == IWN_UCODE_INIT) {
3792 /* Save microcontroller report. */
3793 memcpy(&sc->ucode_info, uc, sizeof (*uc));
3795 /* Save the address of the error log in SRAM. */
3796 sc->errptr = le32toh(uc->errptr);
3799 case IWN_STATE_CHANGED:
3802 * State change allows hardware switch change to be
3803 * noted. However, we handle this in iwn_intr as we
3804 * get both the enable/disble intr.
3806 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3807 BUS_DMASYNC_POSTREAD);
3809 uint32_t *status = (uint32_t *)(desc + 1);
3810 DPRINTF(sc, IWN_DEBUG_INTR | IWN_DEBUG_STATE,
3811 "state changed to %x\n",
3816 case IWN_START_SCAN:
3818 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3819 BUS_DMASYNC_POSTREAD);
3821 struct iwn_start_scan *scan =
3822 (struct iwn_start_scan *)(desc + 1);
3823 DPRINTF(sc, IWN_DEBUG_ANY,
3824 "%s: scanning channel %d status %x\n",
3825 __func__, scan->chan, le32toh(scan->status));
3831 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3832 BUS_DMASYNC_POSTREAD);
3834 struct iwn_stop_scan *scan =
3835 (struct iwn_stop_scan *)(desc + 1);
3836 DPRINTF(sc, IWN_DEBUG_STATE | IWN_DEBUG_SCAN,
3837 "scan finished nchan=%d status=%d chan=%d\n",
3838 scan->nchan, scan->status, scan->chan);
3840 sc->sc_is_scanning = 0;
3841 ieee80211_scan_next(vap);
3844 case IWN5000_CALIBRATION_RESULT:
3845 iwn5000_rx_calib_results(sc, desc, data);
3848 case IWN5000_CALIBRATION_DONE:
3849 sc->sc_flags |= IWN_FLAG_CALIB_DONE;
3854 sc->rxq.cur = (sc->rxq.cur + 1) % IWN_RX_RING_COUNT;
3857 /* Tell the firmware what we have processed. */
3858 hw = (hw == 0) ? IWN_RX_RING_COUNT - 1 : hw - 1;
3859 IWN_WRITE(sc, IWN_FH_RX_WPTR, hw & ~7);
3863 * Process an INT_WAKEUP interrupt raised when the microcontroller wakes up
3864 * from power-down sleep mode.
3867 iwn_wakeup_intr(struct iwn_softc *sc)
3871 DPRINTF(sc, IWN_DEBUG_RESET, "%s: ucode wakeup from power-down sleep\n",
3874 /* Wakeup RX and TX rings. */
3875 IWN_WRITE(sc, IWN_FH_RX_WPTR, sc->rxq.cur & ~7);
3876 for (qid = 0; qid < sc->ntxqs; qid++) {
3877 struct iwn_tx_ring *ring = &sc->txq[qid];
3878 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | ring->cur);
3883 iwn_rftoggle_intr(struct iwn_softc *sc)
3885 struct ifnet *ifp = sc->sc_ifp;
3886 struct ieee80211com *ic = ifp->if_l2com;
3887 uint32_t tmp = IWN_READ(sc, IWN_GP_CNTRL);
3889 device_printf(sc->sc_dev, "RF switch: radio %s\n",
3890 (tmp & IWN_GP_CNTRL_RFKILL) ? "enabled" : "disabled");
3891 if (tmp & IWN_GP_CNTRL_RFKILL)
3892 ieee80211_runtask(ic, &sc->sc_radioon_task);
3894 ieee80211_runtask(ic, &sc->sc_radiooff_task);
3898 * Dump the error log of the firmware when a firmware panic occurs. Although
3899 * we can't debug the firmware because it is neither open source nor free, it
3900 * can help us to identify certain classes of problems.
3903 iwn_fatal_intr(struct iwn_softc *sc)
3905 struct iwn_fw_dump dump;
3908 /* Force a complete recalibration on next init. */
3909 sc->sc_flags &= ~IWN_FLAG_CALIB_DONE;
3911 /* Check that the error log address is valid. */
3912 if (sc->errptr < IWN_FW_DATA_BASE ||
3913 sc->errptr + sizeof (dump) >
3914 IWN_FW_DATA_BASE + sc->fw_data_maxsz) {
3915 kprintf("%s: bad firmware error log address 0x%08x\n", __func__,
3919 if (iwn_nic_lock(sc) != 0) {
3920 kprintf("%s: could not read firmware error log\n", __func__);
3923 /* Read firmware error log from SRAM. */
3924 iwn_mem_read_region_4(sc, sc->errptr, (uint32_t *)&dump,
3925 sizeof (dump) / sizeof (uint32_t));
3928 if (dump.valid == 0) {
3929 kprintf("%s: firmware error log is empty\n", __func__);
3932 kprintf("firmware error log:\n");
3933 kprintf(" error type = \"%s\" (0x%08X)\n",
3934 (dump.id < nitems(iwn_fw_errmsg)) ?
3935 iwn_fw_errmsg[dump.id] : "UNKNOWN",
3937 kprintf(" program counter = 0x%08X\n", dump.pc);
3938 kprintf(" source line = 0x%08X\n", dump.src_line);
3939 kprintf(" error data = 0x%08X%08X\n",
3940 dump.error_data[0], dump.error_data[1]);
3941 kprintf(" branch link = 0x%08X%08X\n",
3942 dump.branch_link[0], dump.branch_link[1]);
3943 kprintf(" interrupt link = 0x%08X%08X\n",
3944 dump.interrupt_link[0], dump.interrupt_link[1]);
3945 kprintf(" time = %u\n", dump.time[0]);
3947 /* Dump driver status (TX and RX rings) while we're here. */
3948 kprintf("driver status:\n");
3949 for (i = 0; i < sc->ntxqs; i++) {
3950 struct iwn_tx_ring *ring = &sc->txq[i];
3951 kprintf(" tx ring %2d: qid=%-2d cur=%-3d queued=%-3d\n",
3952 i, ring->qid, ring->cur, ring->queued);
3954 kprintf(" rx ring: cur=%d\n", sc->rxq.cur);
3960 struct iwn_softc *sc = arg;
3961 struct ifnet *ifp = sc->sc_ifp;
3962 uint32_t r1, r2, tmp;
3964 /* Disable interrupts. */
3965 IWN_WRITE(sc, IWN_INT_MASK, 0);
3967 /* Read interrupts from ICT (fast) or from registers (slow). */
3968 if (sc->sc_flags & IWN_FLAG_USE_ICT) {
3970 while (sc->ict[sc->ict_cur] != 0) {
3971 tmp |= sc->ict[sc->ict_cur];
3972 sc->ict[sc->ict_cur] = 0; /* Acknowledge. */
3973 sc->ict_cur = (sc->ict_cur + 1) % IWN_ICT_COUNT;
3976 if (tmp == 0xffffffff) /* Shouldn't happen. */
3978 else if (tmp & 0xc0000) /* Workaround a HW bug. */
3980 r1 = (tmp & 0xff00) << 16 | (tmp & 0xff);
3981 r2 = 0; /* Unused. */
3983 r1 = IWN_READ(sc, IWN_INT);
3984 if (r1 == 0xffffffff || (r1 & 0xfffffff0) == 0xa5a5a5a0)
3985 return; /* Hardware gone! */
3986 r2 = IWN_READ(sc, IWN_FH_INT);
3989 DPRINTF(sc, IWN_DEBUG_INTR, "interrupt reg1=0x%08x reg2=0x%08x\n"
3992 if (r1 == 0 && r2 == 0)
3993 goto done; /* Interrupt not for us. */
3995 /* Acknowledge interrupts. */
3996 IWN_WRITE(sc, IWN_INT, r1);
3997 if (!(sc->sc_flags & IWN_FLAG_USE_ICT))
3998 IWN_WRITE(sc, IWN_FH_INT, r2);
4000 if (r1 & IWN_INT_RF_TOGGLED) {
4001 iwn_rftoggle_intr(sc);
4004 if (r1 & IWN_INT_CT_REACHED) {
4005 device_printf(sc->sc_dev, "%s: critical temperature reached!\n",
4008 if (r1 & (IWN_INT_SW_ERR | IWN_INT_HW_ERR)) {
4009 device_printf(sc->sc_dev, "%s: fatal firmware error\n",
4012 iwn_debug_register(sc);
4014 /* Dump firmware error log and stop. */
4017 taskqueue_enqueue(sc->sc_tq, &sc->sc_panic_task);
4020 if ((r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX | IWN_INT_RX_PERIODIC)) ||
4021 (r2 & IWN_FH_INT_RX)) {
4022 if (sc->sc_flags & IWN_FLAG_USE_ICT) {
4023 if (r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX))
4024 IWN_WRITE(sc, IWN_FH_INT, IWN_FH_INT_RX);
4025 IWN_WRITE_1(sc, IWN_INT_PERIODIC,
4026 IWN_INT_PERIODIC_DIS);
4028 if (r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX)) {
4029 IWN_WRITE_1(sc, IWN_INT_PERIODIC,
4030 IWN_INT_PERIODIC_ENA);
4036 if ((r1 & IWN_INT_FH_TX) || (r2 & IWN_FH_INT_TX)) {
4037 if (sc->sc_flags & IWN_FLAG_USE_ICT)
4038 IWN_WRITE(sc, IWN_FH_INT, IWN_FH_INT_TX);
4039 wakeup(sc); /* FH DMA transfer completed. */
4042 if (r1 & IWN_INT_ALIVE)
4043 wakeup(sc); /* Firmware is alive. */
4045 if (r1 & IWN_INT_WAKEUP)
4046 iwn_wakeup_intr(sc);
4049 /* Re-enable interrupts. */
4050 if (ifp->if_flags & IFF_UP)
4051 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
4055 * Update TX scheduler ring when transmitting an 802.11 frame (4965AGN and
4056 * 5000 adapters use a slightly different format).
4059 iwn4965_update_sched(struct iwn_softc *sc, int qid, int idx, uint8_t id,
4062 uint16_t *w = &sc->sched[qid * IWN4965_SCHED_COUNT + idx];
4064 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
4066 *w = htole16(len + 8);
4067 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4068 BUS_DMASYNC_PREWRITE);
4069 if (idx < IWN_SCHED_WINSZ) {
4070 *(w + IWN_TX_RING_COUNT) = *w;
4071 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4072 BUS_DMASYNC_PREWRITE);
4077 iwn5000_update_sched(struct iwn_softc *sc, int qid, int idx, uint8_t id,
4080 uint16_t *w = &sc->sched[qid * IWN5000_SCHED_COUNT + idx];
4082 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
4084 *w = htole16(id << 12 | (len + 8));
4085 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4086 BUS_DMASYNC_PREWRITE);
4087 if (idx < IWN_SCHED_WINSZ) {
4088 *(w + IWN_TX_RING_COUNT) = *w;
4089 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4090 BUS_DMASYNC_PREWRITE);
4096 iwn5000_reset_sched(struct iwn_softc *sc, int qid, int idx)
4098 uint16_t *w = &sc->sched[qid * IWN5000_SCHED_COUNT + idx];
4100 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
4102 *w = (*w & htole16(0xf000)) | htole16(1);
4103 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4104 BUS_DMASYNC_PREWRITE);
4105 if (idx < IWN_SCHED_WINSZ) {
4106 *(w + IWN_TX_RING_COUNT) = *w;
4107 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4108 BUS_DMASYNC_PREWRITE);
4114 * Check whether OFDM 11g protection will be enabled for the given rate.
4116 * The original driver code only enabled protection for OFDM rates.
4117 * It didn't check to see whether it was operating in 11a or 11bg mode.
4120 iwn_check_rate_needs_protection(struct iwn_softc *sc,
4121 struct ieee80211vap *vap, uint8_t rate)
4123 struct ieee80211com *ic = vap->iv_ic;
4126 * Not in 2GHz mode? Then there's no need to enable OFDM
4129 if (! IEEE80211_IS_CHAN_2GHZ(ic->ic_curchan)) {
4134 * 11bg protection not enabled? Then don't use it.
4136 if ((ic->ic_flags & IEEE80211_F_USEPROT) == 0)
4140 * If it's an 11n rate, then for now we enable
4143 if (rate & IEEE80211_RATE_MCS) {
4148 * Do a rate table lookup. If the PHY is CCK,
4149 * don't do protection.
4151 if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_CCK)
4155 * Yup, enable protection.
4161 * return a value between 0 and IWN_MAX_TX_RETRIES-1 as an index into
4162 * the link quality table that reflects this particular entry.
4165 iwn_tx_rate_to_linkq_offset(struct iwn_softc *sc, struct ieee80211_node *ni,
4168 struct ieee80211_rateset *rs;
4175 * Figure out if we're using 11n or not here.
4177 if (IEEE80211_IS_CHAN_HT(ni->ni_chan) && ni->ni_htrates.rs_nrates > 0)
4183 * Use the correct rate table.
4186 rs = (struct ieee80211_rateset *) &ni->ni_htrates;
4187 nr = ni->ni_htrates.rs_nrates;
4194 * Find the relevant link quality entry in the table.
4196 for (i = 0; i < nr && i < IWN_MAX_TX_RETRIES - 1 ; i++) {
4198 * The link quality table index starts at 0 == highest
4199 * rate, so we walk the rate table backwards.
4201 cmp_rate = rs->rs_rates[(nr - 1) - i];
4202 if (rate & IEEE80211_RATE_MCS)
4203 cmp_rate |= IEEE80211_RATE_MCS;
4206 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: idx %d: nr=%d, rate=0x%02x, rateentry=0x%02x\n",
4214 if (cmp_rate == rate)
4218 /* Failed? Start at the end */
4219 return (IWN_MAX_TX_RETRIES - 1);
4223 iwn_tx_data(struct iwn_softc *sc, struct mbuf *m, struct ieee80211_node *ni)
4225 struct iwn_ops *ops = &sc->ops;
4226 const struct ieee80211_txparam *tp;
4227 struct ieee80211vap *vap = ni->ni_vap;
4228 struct ieee80211com *ic = ni->ni_ic;
4229 struct iwn_node *wn = (void *)ni;
4230 struct iwn_tx_ring *ring;
4231 struct iwn_tx_desc *desc;
4232 struct iwn_tx_data *data;
4233 struct iwn_tx_cmd *cmd;
4234 struct iwn_cmd_data *tx;
4235 struct ieee80211_frame *wh;
4236 struct ieee80211_key *k = NULL;
4241 bus_dma_segment_t *seg, segs[IWN_MAX_SCATTER];
4243 int ac, i, totlen, error, pad, nsegs = 0, rate;
4245 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
4247 wh = mtod(m, struct ieee80211_frame *);
4248 hdrlen = ieee80211_anyhdrsize(wh);
4249 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
4251 /* Select EDCA Access Category and TX ring for this frame. */
4252 if (IEEE80211_QOS_HAS_SEQ(wh)) {
4253 qos = ((const struct ieee80211_qosframe *)wh)->i_qos[0];
4254 tid = qos & IEEE80211_QOS_TID;
4259 ac = M_WME_GETAC(m);
4260 if (m->m_flags & M_AMPDU_MPDU) {
4262 struct ieee80211_tx_ampdu *tap = &ni->ni_tx_ampdu[ac];
4264 if (!IEEE80211_AMPDU_RUNNING(tap)) {
4270 * Queue this frame to the hardware ring that we've
4271 * negotiated AMPDU TX on.
4273 * Note that the sequence number must match the TX slot
4276 ac = *(int *)tap->txa_private;
4277 seqno = ni->ni_txseqs[tid];
4278 *(uint16_t *)wh->i_seq =
4279 htole16(seqno << IEEE80211_SEQ_SEQ_SHIFT);
4280 ring = &sc->txq[ac];
4281 if ((seqno % 256) != ring->cur) {
4282 device_printf(sc->sc_dev,
4283 "%s: m=%p: seqno (%d) (%d) != ring index (%d) !\n",
4290 ni->ni_txseqs[tid]++;
4292 ring = &sc->txq[ac];
4293 desc = &ring->desc[ring->cur];
4294 data = &ring->data[ring->cur];
4296 /* Choose a TX rate index. */
4297 tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)];
4298 if (type == IEEE80211_FC0_TYPE_MGT)
4299 rate = tp->mgmtrate;
4300 else if (IEEE80211_IS_MULTICAST(wh->i_addr1))
4301 rate = tp->mcastrate;
4302 else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE)
4303 rate = tp->ucastrate;
4304 else if (m->m_flags & M_EAPOL)
4305 rate = tp->mgmtrate;
4307 /* XXX pass pktlen */
4308 (void) ieee80211_ratectl_rate(ni, NULL, 0);
4309 rate = ni->ni_txrate;
4312 /* Encrypt the frame if need be. */
4313 if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
4314 /* Retrieve key for TX. */
4315 k = ieee80211_crypto_encap(ni, m);
4320 /* 802.11 header may have moved. */
4321 wh = mtod(m, struct ieee80211_frame *);
4323 totlen = m->m_pkthdr.len;
4325 if (ieee80211_radiotap_active_vap(vap)) {
4326 struct iwn_tx_radiotap_header *tap = &sc->sc_txtap;
4329 tap->wt_rate = rate;
4331 tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP;
4333 ieee80211_radiotap_tx(vap, m);
4336 /* Prepare TX firmware command. */
4337 cmd = &ring->cmd[ring->cur];
4338 cmd->code = IWN_CMD_TX_DATA;
4340 cmd->qid = ring->qid;
4341 cmd->idx = ring->cur;
4343 tx = (struct iwn_cmd_data *)cmd->data;
4344 /* NB: No need to clear tx, all fields are reinitialized here. */
4345 tx->scratch = 0; /* clear "scratch" area */
4348 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
4349 /* Unicast frame, check if an ACK is expected. */
4350 if (!qos || (qos & IEEE80211_QOS_ACKPOLICY) !=
4351 IEEE80211_QOS_ACKPOLICY_NOACK)
4352 flags |= IWN_TX_NEED_ACK;
4355 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
4356 (IEEE80211_FC0_TYPE_CTL | IEEE80211_FC0_SUBTYPE_BAR))
4357 flags |= IWN_TX_IMM_BA; /* Cannot happen yet. */
4359 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG)
4360 flags |= IWN_TX_MORE_FRAG; /* Cannot happen yet. */
4362 /* Check if frame must be protected using RTS/CTS or CTS-to-self. */
4363 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
4364 /* NB: Group frames are sent using CCK in 802.11b/g. */
4365 if (totlen + IEEE80211_CRC_LEN > vap->iv_rtsthreshold) {
4366 flags |= IWN_TX_NEED_RTS;
4367 } else if (iwn_check_rate_needs_protection(sc, vap, rate)) {
4368 if (ic->ic_protmode == IEEE80211_PROT_CTSONLY)
4369 flags |= IWN_TX_NEED_CTS;
4370 else if (ic->ic_protmode == IEEE80211_PROT_RTSCTS)
4371 flags |= IWN_TX_NEED_RTS;
4374 /* XXX HT protection? */
4376 if (flags & (IWN_TX_NEED_RTS | IWN_TX_NEED_CTS)) {
4377 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
4378 /* 5000 autoselects RTS/CTS or CTS-to-self. */
4379 flags &= ~(IWN_TX_NEED_RTS | IWN_TX_NEED_CTS);
4380 flags |= IWN_TX_NEED_PROTECTION;
4382 flags |= IWN_TX_FULL_TXOP;
4386 if (IEEE80211_IS_MULTICAST(wh->i_addr1) ||
4387 type != IEEE80211_FC0_TYPE_DATA)
4388 tx->id = sc->broadcast_id;
4392 if (type == IEEE80211_FC0_TYPE_MGT) {
4393 uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
4395 /* Tell HW to set timestamp in probe responses. */
4396 if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
4397 flags |= IWN_TX_INSERT_TSTAMP;
4398 if (subtype == IEEE80211_FC0_SUBTYPE_ASSOC_REQ ||
4399 subtype == IEEE80211_FC0_SUBTYPE_REASSOC_REQ)
4400 tx->timeout = htole16(3);
4402 tx->timeout = htole16(2);
4404 tx->timeout = htole16(0);
4407 /* First segment length must be a multiple of 4. */
4408 flags |= IWN_TX_NEED_PADDING;
4409 pad = 4 - (hdrlen & 3);
4413 tx->len = htole16(totlen);
4415 tx->rts_ntries = 60;
4416 tx->data_ntries = 15;
4417 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
4418 tx->rate = iwn_rate_to_plcp(sc, ni, rate);
4419 if (tx->id == sc->broadcast_id) {
4420 /* Group or management frame. */
4423 tx->linkq = iwn_tx_rate_to_linkq_offset(sc, ni, rate);
4424 flags |= IWN_TX_LINKQ; /* enable MRR */
4427 /* Set physical address of "scratch area". */
4428 tx->loaddr = htole32(IWN_LOADDR(data->scratch_paddr));
4429 tx->hiaddr = IWN_HIADDR(data->scratch_paddr);
4431 /* Copy 802.11 header in TX command. */
4432 memcpy((uint8_t *)(tx + 1), wh, hdrlen);
4434 /* Trim 802.11 header. */
4437 tx->flags = htole32(flags);
4439 error = bus_dmamap_load_mbuf_segment(ring->data_dmat, data->map,
4440 m, segs, IWN_MAX_SCATTER - 1,
4441 &nsegs, BUS_DMA_NOWAIT);
4443 if (error != EFBIG) {
4444 device_printf(sc->sc_dev,
4445 "%s: can't map mbuf (error %d)\n", __func__, error);
4449 /* Too many DMA segments, linearize mbuf. */
4450 m1 = m_defrag(m, MB_DONTWAIT);
4452 device_printf(sc->sc_dev,
4453 "%s: could not defrag mbuf\n", __func__);
4459 error = bus_dmamap_load_mbuf_segment(ring->data_dmat,
4461 IWN_MAX_SCATTER - 1,
4462 &nsegs, BUS_DMA_NOWAIT);
4464 device_printf(sc->sc_dev,
4465 "%s: can't map mbuf (error %d)\n", __func__, error);
4474 DPRINTF(sc, IWN_DEBUG_XMIT,
4475 "%s: qid %d idx %d len %d nsegs %d rate %04x plcp 0x%08x\n",
4484 /* Fill TX descriptor. */
4487 desc->nsegs += nsegs;
4488 /* First DMA segment is used by the TX command. */
4489 desc->segs[0].addr = htole32(IWN_LOADDR(data->cmd_paddr));
4490 desc->segs[0].len = htole16(IWN_HIADDR(data->cmd_paddr) |
4491 (4 + sizeof (*tx) + hdrlen + pad) << 4);
4492 /* Other DMA segments are for data payload. */
4494 for (i = 1; i <= nsegs; i++) {
4495 desc->segs[i].addr = htole32(IWN_LOADDR(seg->ds_addr));
4496 desc->segs[i].len = htole16(IWN_HIADDR(seg->ds_addr) |
4501 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
4502 bus_dmamap_sync(ring->data_dmat, ring->cmd_dma.map,
4503 BUS_DMASYNC_PREWRITE);
4504 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
4505 BUS_DMASYNC_PREWRITE);
4507 /* Update TX scheduler. */
4508 if (ring->qid >= sc->firstaggqueue)
4509 ops->update_sched(sc, ring->qid, ring->cur, tx->id, totlen);
4512 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
4513 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
4515 /* Mark TX ring as full if we reach a certain threshold. */
4516 if (++ring->queued > IWN_TX_RING_HIMARK)
4517 sc->qfullmsk |= 1 << ring->qid;
4519 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
4525 iwn_tx_data_raw(struct iwn_softc *sc, struct mbuf *m,
4526 struct ieee80211_node *ni, const struct ieee80211_bpf_params *params)
4528 struct iwn_ops *ops = &sc->ops;
4529 // struct ifnet *ifp = sc->sc_ifp;
4530 struct ieee80211vap *vap = ni->ni_vap;
4531 // struct ieee80211com *ic = ifp->if_l2com;
4532 struct iwn_tx_cmd *cmd;
4533 struct iwn_cmd_data *tx;
4534 struct ieee80211_frame *wh;
4535 struct iwn_tx_ring *ring;
4536 struct iwn_tx_desc *desc;
4537 struct iwn_tx_data *data;
4539 bus_dma_segment_t *seg, segs[IWN_MAX_SCATTER];
4542 int ac, totlen, error, pad, nsegs = 0, i, rate;
4545 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
4547 wh = mtod(m, struct ieee80211_frame *);
4548 hdrlen = ieee80211_anyhdrsize(wh);
4549 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
4551 ac = params->ibp_pri & 3;
4553 ring = &sc->txq[ac];
4554 desc = &ring->desc[ring->cur];
4555 data = &ring->data[ring->cur];
4557 /* Choose a TX rate. */
4558 rate = params->ibp_rate0;
4559 totlen = m->m_pkthdr.len;
4561 /* Prepare TX firmware command. */
4562 cmd = &ring->cmd[ring->cur];
4563 cmd->code = IWN_CMD_TX_DATA;
4565 cmd->qid = ring->qid;
4566 cmd->idx = ring->cur;
4568 tx = (struct iwn_cmd_data *)cmd->data;
4569 /* NB: No need to clear tx, all fields are reinitialized here. */
4570 tx->scratch = 0; /* clear "scratch" area */
4573 if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0)
4574 flags |= IWN_TX_NEED_ACK;
4575 if (params->ibp_flags & IEEE80211_BPF_RTS) {
4576 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
4577 /* 5000 autoselects RTS/CTS or CTS-to-self. */
4578 flags &= ~IWN_TX_NEED_RTS;
4579 flags |= IWN_TX_NEED_PROTECTION;
4581 flags |= IWN_TX_NEED_RTS | IWN_TX_FULL_TXOP;
4583 if (params->ibp_flags & IEEE80211_BPF_CTS) {
4584 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
4585 /* 5000 autoselects RTS/CTS or CTS-to-self. */
4586 flags &= ~IWN_TX_NEED_CTS;
4587 flags |= IWN_TX_NEED_PROTECTION;
4589 flags |= IWN_TX_NEED_CTS | IWN_TX_FULL_TXOP;
4591 if (type == IEEE80211_FC0_TYPE_MGT) {
4592 uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
4594 /* Tell HW to set timestamp in probe responses. */
4595 if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
4596 flags |= IWN_TX_INSERT_TSTAMP;
4598 if (subtype == IEEE80211_FC0_SUBTYPE_ASSOC_REQ ||
4599 subtype == IEEE80211_FC0_SUBTYPE_REASSOC_REQ)
4600 tx->timeout = htole16(3);
4602 tx->timeout = htole16(2);
4604 tx->timeout = htole16(0);
4607 /* First segment length must be a multiple of 4. */
4608 flags |= IWN_TX_NEED_PADDING;
4609 pad = 4 - (hdrlen & 3);
4613 if (ieee80211_radiotap_active_vap(vap)) {
4614 struct iwn_tx_radiotap_header *tap = &sc->sc_txtap;
4617 tap->wt_rate = rate;
4619 ieee80211_radiotap_tx(vap, m);
4622 tx->len = htole16(totlen);
4624 tx->id = sc->broadcast_id;
4625 tx->rts_ntries = params->ibp_try1;
4626 tx->data_ntries = params->ibp_try0;
4627 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
4628 tx->rate = iwn_rate_to_plcp(sc, ni, rate);
4630 /* Group or management frame. */
4633 /* Set physical address of "scratch area". */
4634 tx->loaddr = htole32(IWN_LOADDR(data->scratch_paddr));
4635 tx->hiaddr = IWN_HIADDR(data->scratch_paddr);
4637 /* Copy 802.11 header in TX command. */
4638 memcpy((uint8_t *)(tx + 1), wh, hdrlen);
4640 /* Trim 802.11 header. */
4643 tx->flags = htole32(flags);
4645 error = bus_dmamap_load_mbuf_segment(ring->data_dmat, data->map,
4647 IWN_MAX_SCATTER - 1,
4648 &nsegs, BUS_DMA_NOWAIT);
4650 if (error != EFBIG) {
4651 device_printf(sc->sc_dev,
4652 "%s: can't map mbuf (error %d)\n", __func__, error);
4656 /* Too many DMA segments, linearize mbuf. */
4657 m1 = m_defrag(m, M_NOWAIT);
4659 device_printf(sc->sc_dev,
4660 "%s: could not defrag mbuf\n", __func__);
4666 error = bus_dmamap_load_mbuf_segment(ring->data_dmat,
4668 IWN_MAX_SCATTER - 1,
4669 &nsegs, BUS_DMA_NOWAIT);
4671 device_printf(sc->sc_dev,
4672 "%s: can't map mbuf (error %d)\n", __func__, error);
4681 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: qid %d idx %d len %d nsegs %d\n",
4682 __func__, ring->qid, ring->cur, m->m_pkthdr.len, nsegs);
4684 /* Fill TX descriptor. */
4687 desc->nsegs += nsegs;
4688 /* First DMA segment is used by the TX command. */
4689 desc->segs[0].addr = htole32(IWN_LOADDR(data->cmd_paddr));
4690 desc->segs[0].len = htole16(IWN_HIADDR(data->cmd_paddr) |
4691 (4 + sizeof (*tx) + hdrlen + pad) << 4);
4692 /* Other DMA segments are for data payload. */
4694 for (i = 1; i <= nsegs; i++) {
4695 desc->segs[i].addr = htole32(IWN_LOADDR(seg->ds_addr));
4696 desc->segs[i].len = htole16(IWN_HIADDR(seg->ds_addr) |
4701 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
4702 bus_dmamap_sync(ring->data_dmat, ring->cmd_dma.map,
4703 BUS_DMASYNC_PREWRITE);
4704 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
4705 BUS_DMASYNC_PREWRITE);
4707 /* Update TX scheduler. */
4708 if (ring->qid >= sc->firstaggqueue)
4709 ops->update_sched(sc, ring->qid, ring->cur, tx->id, totlen);
4712 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
4713 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
4715 /* Mark TX ring as full if we reach a certain threshold. */
4716 if (++ring->queued > IWN_TX_RING_HIMARK)
4717 sc->qfullmsk |= 1 << ring->qid;
4719 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
4725 iwn_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
4726 const struct ieee80211_bpf_params *params)
4728 struct ieee80211com *ic = ni->ni_ic;
4729 struct ifnet *ifp = ic->ic_ifp;
4730 struct iwn_softc *sc = ifp->if_softc;
4733 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
4735 if ((ifp->if_flags & IFF_RUNNING) == 0) {
4736 ieee80211_free_node(ni);
4741 if (params == NULL) {
4743 * Legacy path; interpret frame contents to decide
4744 * precisely how to send the frame.
4746 error = iwn_tx_data(sc, m, ni);
4749 * Caller supplied explicit parameters to use in
4750 * sending the frame.
4752 error = iwn_tx_data_raw(sc, m, ni, params);
4755 /* NB: m is reclaimed on tx failure */
4756 ieee80211_free_node(ni);
4757 IFNET_STAT_INC(ifp, oerrors, 1);
4759 sc->sc_tx_timer = 5;
4761 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
4767 iwn_start(struct ifnet *ifp, struct ifaltq_subque *ifsq)
4769 ASSERT_ALTQ_SQ_DEFAULT(ifp, ifsq);
4770 iwn_start_locked(ifp);
4774 iwn_start_locked(struct ifnet *ifp)
4776 struct iwn_softc *sc = ifp->if_softc;
4777 struct ieee80211_node *ni;
4780 wlan_assert_serialized();
4782 if ((ifp->if_flags & IFF_RUNNING) == 0 ||
4783 ifq_is_oactive(&ifp->if_snd))
4787 if (sc->qfullmsk != 0) {
4788 ifq_set_oactive(&ifp->if_snd);
4791 m = ifq_dequeue(&ifp->if_snd);
4794 KKASSERT(M_TRAILINGSPACE(m) >= 0);
4795 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
4796 if (iwn_tx_data(sc, m, ni) != 0) {
4797 ieee80211_free_node(ni);
4798 IFNET_STAT_INC(ifp, oerrors, 1);
4801 sc->sc_tx_timer = 5;
4806 iwn_watchdog_timeout(void *arg)
4808 struct iwn_softc *sc = arg;
4809 struct ifnet *ifp = sc->sc_ifp;
4810 struct ieee80211com *ic = ifp->if_l2com;
4812 wlan_serialize_enter();
4814 KASSERT(ifp->if_flags & IFF_RUNNING, ("not running"));
4816 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
4818 if (sc->sc_tx_timer > 0) {
4819 if (--sc->sc_tx_timer == 0) {
4820 if_printf(ifp, "device timeout\n");
4821 ieee80211_runtask(ic, &sc->sc_reinit_task);
4822 wlan_serialize_exit();
4826 callout_reset(&sc->watchdog_to, hz, iwn_watchdog_timeout, sc);
4827 wlan_serialize_exit();
4831 iwn_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *ucred)
4833 struct iwn_softc *sc = ifp->if_softc;
4834 struct ieee80211com *ic = ifp->if_l2com;
4835 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
4836 struct ifreq *ifr = (struct ifreq *) data;
4837 int error = 0, startall = 0, stop = 0;
4839 wlan_assert_serialized();
4843 error = ether_ioctl(ifp, cmd, data);
4846 if (ifp->if_flags & IFF_UP) {
4847 if (!(ifp->if_flags & IFF_RUNNING)) {
4848 iwn_init_locked(sc);
4849 if (IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_RFKILL)
4855 if (ifp->if_flags & IFF_RUNNING)
4856 iwn_stop_locked(sc);
4859 ieee80211_start_all(ic);
4860 else if (vap != NULL && stop)
4861 ieee80211_stop(vap);
4864 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd);
4868 /* XXX validate permissions/memory/etc? */
4869 error = copyout(&sc->last_stat, ifr->ifr_data,
4870 sizeof(struct iwn_stats));
4875 memset(&sc->last_stat, 0, sizeof(struct iwn_stats));
4887 * Send a command to the firmware.
4890 iwn_cmd(struct iwn_softc *sc, int code, const void *buf, int size, int async)
4892 struct iwn_tx_ring *ring;
4893 struct iwn_tx_desc *desc;
4894 struct iwn_tx_data *data;
4895 struct iwn_tx_cmd *cmd;
4901 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
4903 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT)
4904 cmd_queue_num = IWN_PAN_CMD_QUEUE;
4906 cmd_queue_num = IWN_CMD_QUEUE_NUM;
4908 ring = &sc->txq[cmd_queue_num];
4909 desc = &ring->desc[ring->cur];
4910 data = &ring->data[ring->cur];
4913 if (size > sizeof cmd->data) {
4914 /* Command is too large to fit in a descriptor. */
4915 if (totlen > MJUMPAGESIZE)
4917 m = m_getjcl(MB_DONTWAIT, MT_DATA, M_PKTHDR, MJUMPAGESIZE);
4920 cmd = mtod(m, struct iwn_tx_cmd *);
4921 error = bus_dmamap_load(ring->data_dmat, data->map, cmd,
4922 totlen, iwn_dma_map_addr, &paddr, BUS_DMA_NOWAIT);
4929 cmd = &ring->cmd[ring->cur];
4930 paddr = data->cmd_paddr;
4935 cmd->qid = ring->qid;
4936 cmd->idx = ring->cur;
4937 memcpy(cmd->data, buf, size);
4940 desc->segs[0].addr = htole32(IWN_LOADDR(paddr));
4941 desc->segs[0].len = htole16(IWN_HIADDR(paddr) | totlen << 4);
4943 DPRINTF(sc, IWN_DEBUG_CMD, "%s: %s (0x%x) flags %d qid %d idx %d\n",
4944 __func__, iwn_intr_str(cmd->code), cmd->code,
4945 cmd->flags, cmd->qid, cmd->idx);
4947 if (size > sizeof cmd->data) {
4948 bus_dmamap_sync(ring->data_dmat, data->map,
4949 BUS_DMASYNC_PREWRITE);
4951 bus_dmamap_sync(ring->data_dmat, ring->cmd_dma.map,
4952 BUS_DMASYNC_PREWRITE);
4954 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
4955 BUS_DMASYNC_PREWRITE);
4957 /* Kick command ring. */
4958 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
4959 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
4961 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
4963 return async ? 0 : zsleep(desc, &wlan_global_serializer, 0, "iwncmd", hz);
4967 iwn4965_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async)
4969 struct iwn4965_node_info hnode;
4972 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
4975 * We use the node structure for 5000 Series internally (it is
4976 * a superset of the one for 4965AGN). We thus copy the common
4977 * fields before sending the command.
4979 src = (caddr_t)node;
4980 dst = (caddr_t)&hnode;
4981 memcpy(dst, src, 48);
4982 /* Skip TSC, RX MIC and TX MIC fields from ``src''. */
4983 memcpy(dst + 48, src + 72, 20);
4984 return iwn_cmd(sc, IWN_CMD_ADD_NODE, &hnode, sizeof hnode, async);
4988 iwn5000_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async)
4991 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
4993 /* Direct mapping. */
4994 return iwn_cmd(sc, IWN_CMD_ADD_NODE, node, sizeof (*node), async);
4998 iwn_set_link_quality(struct iwn_softc *sc, struct ieee80211_node *ni)
5000 #define RV(v) ((v) & IEEE80211_RATE_VAL)
5001 struct iwn_node *wn = (void *)ni;
5002 struct ieee80211_rateset *rs;
5003 struct iwn_cmd_link_quality linkq;
5005 int i, rate, txrate;
5008 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5010 /* Use the first valid TX antenna. */
5011 txant = IWN_LSB(sc->txchainmask);
5013 memset(&linkq, 0, sizeof linkq);
5015 linkq.antmsk_1stream = txant;
5018 * The '2 stream' setup is a bit .. odd.
5020 * For NICs that support only 1 antenna, default to IWN_ANT_AB or
5021 * the firmware panics (eg Intel 5100.)
5023 * For NICs that support two antennas, we use ANT_AB.
5025 * For NICs that support three antennas, we use the two that
5026 * wasn't the default one.
5028 * XXX TODO: if bluetooth (full concurrent) is enabled, restrict
5029 * this to only one antenna.
5032 /* So - if there's no secondary antenna, assume IWN_ANT_AB */
5034 /* Default - transmit on the other antennas */
5035 linkq.antmsk_2stream = (sc->txchainmask & ~IWN_LSB(sc->txchainmask));
5037 /* Now, if it's zero, set it to IWN_ANT_AB, so to not panic firmware */
5038 if (linkq.antmsk_2stream == 0)
5039 linkq.antmsk_2stream = IWN_ANT_AB;
5042 * If the NIC is a two-stream TX NIC, configure the TX mask to
5043 * the default chainmask
5045 else if (sc->ntxchains == 2)
5046 linkq.antmsk_2stream = sc->txchainmask;
5048 linkq.ampdu_max = 32; /* XXX negotiated? */
5049 linkq.ampdu_threshold = 3;
5050 linkq.ampdu_limit = htole16(4000); /* 4ms */
5052 DPRINTF(sc, IWN_DEBUG_XMIT,
5053 "%s: 1stream antenna=0x%02x, 2stream antenna=0x%02x, ntxstreams=%d\n",
5055 linkq.antmsk_1stream,
5056 linkq.antmsk_2stream,
5060 * Are we using 11n rates? Ensure the channel is
5061 * 11n _and_ we have some 11n rates, or don't
5064 if (IEEE80211_IS_CHAN_HT(ni->ni_chan) && ni->ni_htrates.rs_nrates > 0) {
5065 rs = (struct ieee80211_rateset *) &ni->ni_htrates;
5072 /* Start at highest available bit-rate. */
5074 * XXX this is all very dirty!
5077 txrate = ni->ni_htrates.rs_nrates - 1;
5079 txrate = rs->rs_nrates - 1;
5080 for (i = 0; i < IWN_MAX_TX_RETRIES; i++) {
5084 rate = IEEE80211_RATE_MCS | rs->rs_rates[txrate];
5086 rate = RV(rs->rs_rates[txrate]);
5088 DPRINTF(sc, IWN_DEBUG_XMIT,
5089 "%s: i=%d, txrate=%d, rate=0x%02x\n",
5095 /* Do rate -> PLCP config mapping */
5096 plcp = iwn_rate_to_plcp(sc, ni, rate);
5097 linkq.retry[i] = plcp;
5100 * The mimo field is an index into the table which
5101 * indicates the first index where it and subsequent entries
5102 * will not be using MIMO.
5104 * Since we're filling linkq from 0..15 and we're filling
5105 * from the higest MCS rates to the lowest rates, if we
5106 * _are_ doing a dual-stream rate, set mimo to idx+1 (ie,
5107 * the next entry.) That way if the next entry is a non-MIMO
5108 * entry, we're already pointing at it.
5110 if ((le32toh(plcp) & IWN_RFLAG_MCS) &&
5111 RV(le32toh(plcp)) > 7)
5114 /* Next retry at immediate lower bit-rate. */
5119 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5121 return iwn_cmd(sc, IWN_CMD_LINK_QUALITY, &linkq, sizeof linkq, 1);
5126 * Broadcast node is used to send group-addressed and management frames.
5129 iwn_add_broadcast_node(struct iwn_softc *sc, int async)
5131 struct iwn_ops *ops = &sc->ops;
5132 struct ifnet *ifp = sc->sc_ifp;
5133 struct ieee80211com *ic = ifp->if_l2com;
5134 struct iwn_node_info node;
5135 struct iwn_cmd_link_quality linkq;
5139 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5141 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
5143 memset(&node, 0, sizeof node);
5144 IEEE80211_ADDR_COPY(node.macaddr, ifp->if_broadcastaddr);
5145 node.id = sc->broadcast_id;
5146 DPRINTF(sc, IWN_DEBUG_RESET, "%s: adding broadcast node\n", __func__);
5147 if ((error = ops->add_node(sc, &node, async)) != 0)
5150 /* Use the first valid TX antenna. */
5151 txant = IWN_LSB(sc->txchainmask);
5153 memset(&linkq, 0, sizeof linkq);
5154 linkq.id = sc->broadcast_id;
5155 linkq.antmsk_1stream = txant;
5156 linkq.antmsk_2stream = IWN_ANT_AB;
5157 linkq.ampdu_max = 64;
5158 linkq.ampdu_threshold = 3;
5159 linkq.ampdu_limit = htole16(4000); /* 4ms */
5161 /* Use lowest mandatory bit-rate. */
5162 if (IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan))
5163 linkq.retry[0] = htole32(0xd);
5165 linkq.retry[0] = htole32(10 | IWN_RFLAG_CCK);
5166 linkq.retry[0] |= htole32(IWN_RFLAG_ANT(txant));
5167 /* Use same bit-rate for all TX retries. */
5168 for (i = 1; i < IWN_MAX_TX_RETRIES; i++) {
5169 linkq.retry[i] = linkq.retry[0];
5172 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5174 return iwn_cmd(sc, IWN_CMD_LINK_QUALITY, &linkq, sizeof linkq, async);
5178 iwn_updateedca(struct ieee80211com *ic)
5180 #define IWN_EXP2(x) ((1 << (x)) - 1) /* CWmin = 2^ECWmin - 1 */
5181 struct iwn_softc *sc = ic->ic_ifp->if_softc;
5182 struct iwn_edca_params cmd;
5185 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5187 memset(&cmd, 0, sizeof cmd);
5188 cmd.flags = htole32(IWN_EDCA_UPDATE);
5189 for (aci = 0; aci < WME_NUM_AC; aci++) {
5190 const struct wmeParams *ac =
5191 &ic->ic_wme.wme_chanParams.cap_wmeParams[aci];
5192 cmd.ac[aci].aifsn = ac->wmep_aifsn;
5193 cmd.ac[aci].cwmin = htole16(IWN_EXP2(ac->wmep_logcwmin));
5194 cmd.ac[aci].cwmax = htole16(IWN_EXP2(ac->wmep_logcwmax));
5195 cmd.ac[aci].txoplimit =
5196 htole16(IEEE80211_TXOP_TO_US(ac->wmep_txopLimit));
5198 (void)iwn_cmd(sc, IWN_CMD_EDCA_PARAMS, &cmd, sizeof cmd, 1);
5200 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5207 iwn_update_mcast(struct ifnet *ifp)
5213 iwn_set_led(struct iwn_softc *sc, uint8_t which, uint8_t off, uint8_t on)
5215 struct iwn_cmd_led led;
5217 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5220 /* XXX don't set LEDs during scan? */
5221 if (sc->sc_is_scanning)
5225 /* Clear microcode LED ownership. */
5226 IWN_CLRBITS(sc, IWN_LED, IWN_LED_BSM_CTRL);
5229 led.unit = htole32(10000); /* on/off in unit of 100ms */
5232 (void)iwn_cmd(sc, IWN_CMD_SET_LED, &led, sizeof led, 1);
5236 * Set the critical temperature at which the firmware will stop the radio
5240 iwn_set_critical_temp(struct iwn_softc *sc)
5242 struct iwn_critical_temp crit;
5245 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5247 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_CTEMP_STOP_RF);
5249 if (sc->hw_type == IWN_HW_REV_TYPE_5150)
5250 temp = (IWN_CTOK(110) - sc->temp_off) * -5;
5251 else if (sc->hw_type == IWN_HW_REV_TYPE_4965)
5252 temp = IWN_CTOK(110);
5255 memset(&crit, 0, sizeof crit);
5256 crit.tempR = htole32(temp);
5257 DPRINTF(sc, IWN_DEBUG_RESET, "setting critical temp to %d\n", temp);
5258 return iwn_cmd(sc, IWN_CMD_SET_CRITICAL_TEMP, &crit, sizeof crit, 0);
5262 iwn_set_timing(struct iwn_softc *sc, struct ieee80211_node *ni)
5264 struct iwn_cmd_timing cmd;
5267 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5269 memset(&cmd, 0, sizeof cmd);
5270 memcpy(&cmd.tstamp, ni->ni_tstamp.data, sizeof (uint64_t));
5271 cmd.bintval = htole16(ni->ni_intval);
5272 cmd.lintval = htole16(10);
5274 /* Compute remaining time until next beacon. */
5275 val = (uint64_t)ni->ni_intval * IEEE80211_DUR_TU;
5276 mod = le64toh(cmd.tstamp) % val;
5277 cmd.binitval = htole32((uint32_t)(val - mod));
5279 DPRINTF(sc, IWN_DEBUG_RESET, "timing bintval=%u tstamp=%ju, init=%u\n",
5280 ni->ni_intval, le64toh(cmd.tstamp), (uint32_t)(val - mod));
5282 return iwn_cmd(sc, IWN_CMD_TIMING, &cmd, sizeof cmd, 1);
5286 iwn4965_power_calibration(struct iwn_softc *sc, int temp)
5288 struct ifnet *ifp = sc->sc_ifp;
5289 struct ieee80211com *ic = ifp->if_l2com;
5291 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5293 /* Adjust TX power if need be (delta >= 3 degC). */
5294 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: temperature %d->%d\n",
5295 __func__, sc->temp, temp);
5296 if (abs(temp - sc->temp) >= 3) {
5297 /* Record temperature of last calibration. */
5299 (void)iwn4965_set_txpower(sc, ic->ic_bsschan, 1);
5304 * Set TX power for current channel (each rate has its own power settings).
5305 * This function takes into account the regulatory information from EEPROM,
5306 * the current temperature and the current voltage.
5309 iwn4965_set_txpower(struct iwn_softc *sc, struct ieee80211_channel *ch,
5312 /* Fixed-point arithmetic division using a n-bit fractional part. */
5313 #define fdivround(a, b, n) \
5314 ((((1 << n) * (a)) / (b) + (1 << n) / 2) / (1 << n))
5315 /* Linear interpolation. */
5316 #define interpolate(x, x1, y1, x2, y2, n) \
5317 ((y1) + fdivround(((int)(x) - (x1)) * ((y2) - (y1)), (x2) - (x1), n))
5319 static const int tdiv[IWN_NATTEN_GROUPS] = { 9, 8, 8, 8, 6 };
5320 struct iwn_ucode_info *uc = &sc->ucode_info;
5321 struct iwn4965_cmd_txpower cmd;
5322 struct iwn4965_eeprom_chan_samples *chans;
5323 const uint8_t *rf_gain, *dsp_gain;
5324 int32_t vdiff, tdiff;
5325 int i, c, grp, maxpwr;
5328 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
5329 /* Retrieve current channel from last RXON. */
5330 chan = sc->rxon->chan;
5331 DPRINTF(sc, IWN_DEBUG_RESET, "setting TX power for channel %d\n",
5334 memset(&cmd, 0, sizeof cmd);
5335 cmd.band = IEEE80211_IS_CHAN_5GHZ(ch) ? 0 : 1;
5338 if (IEEE80211_IS_CHAN_5GHZ(ch)) {
5339 maxpwr = sc->maxpwr5GHz;
5340 rf_gain = iwn4965_rf_gain_5ghz;
5341 dsp_gain = iwn4965_dsp_gain_5ghz;
5343 maxpwr = sc->maxpwr2GHz;
5344 rf_gain = iwn4965_rf_gain_2ghz;
5345 dsp_gain = iwn4965_dsp_gain_2ghz;
5348 /* Compute voltage compensation. */
5349 vdiff = ((int32_t)le32toh(uc->volt) - sc->eeprom_voltage) / 7;
5354 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5355 "%s: voltage compensation=%d (UCODE=%d, EEPROM=%d)\n",
5356 __func__, vdiff, le32toh(uc->volt), sc->eeprom_voltage);
5358 /* Get channel attenuation group. */
5359 if (chan <= 20) /* 1-20 */
5361 else if (chan <= 43) /* 34-43 */
5363 else if (chan <= 70) /* 44-70 */
5365 else if (chan <= 124) /* 71-124 */
5369 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5370 "%s: chan %d, attenuation group=%d\n", __func__, chan, grp);
5372 /* Get channel sub-band. */
5373 for (i = 0; i < IWN_NBANDS; i++)
5374 if (sc->bands[i].lo != 0 &&
5375 sc->bands[i].lo <= chan && chan <= sc->bands[i].hi)
5377 if (i == IWN_NBANDS) /* Can't happen in real-life. */
5379 chans = sc->bands[i].chans;
5380 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5381 "%s: chan %d sub-band=%d\n", __func__, chan, i);
5383 for (c = 0; c < 2; c++) {
5384 uint8_t power, gain, temp;
5385 int maxchpwr, pwr, ridx, idx;
5387 power = interpolate(chan,
5388 chans[0].num, chans[0].samples[c][1].power,
5389 chans[1].num, chans[1].samples[c][1].power, 1);
5390 gain = interpolate(chan,
5391 chans[0].num, chans[0].samples[c][1].gain,
5392 chans[1].num, chans[1].samples[c][1].gain, 1);
5393 temp = interpolate(chan,
5394 chans[0].num, chans[0].samples[c][1].temp,
5395 chans[1].num, chans[1].samples[c][1].temp, 1);
5396 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5397 "%s: Tx chain %d: power=%d gain=%d temp=%d\n",
5398 __func__, c, power, gain, temp);
5400 /* Compute temperature compensation. */
5401 tdiff = ((sc->temp - temp) * 2) / tdiv[grp];
5402 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5403 "%s: temperature compensation=%d (current=%d, EEPROM=%d)\n",
5404 __func__, tdiff, sc->temp, temp);
5406 for (ridx = 0; ridx <= IWN_RIDX_MAX; ridx++) {
5407 /* Convert dBm to half-dBm. */
5408 maxchpwr = sc->maxpwr[chan] * 2;
5410 maxchpwr -= 6; /* MIMO 2T: -3dB */
5414 /* Adjust TX power based on rate. */
5415 if ((ridx % 8) == 5)
5416 pwr -= 15; /* OFDM48: -7.5dB */
5417 else if ((ridx % 8) == 6)
5418 pwr -= 17; /* OFDM54: -8.5dB */
5419 else if ((ridx % 8) == 7)
5420 pwr -= 20; /* OFDM60: -10dB */
5422 pwr -= 10; /* Others: -5dB */
5424 /* Do not exceed channel max TX power. */
5428 idx = gain - (pwr - power) - tdiff - vdiff;
5429 if ((ridx / 8) & 1) /* MIMO */
5430 idx += (int32_t)le32toh(uc->atten[grp][c]);
5433 idx += 9; /* 5GHz */
5434 if (ridx == IWN_RIDX_MAX)
5437 /* Make sure idx stays in a valid range. */
5440 else if (idx > IWN4965_MAX_PWR_INDEX)
5441 idx = IWN4965_MAX_PWR_INDEX;
5443 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5444 "%s: Tx chain %d, rate idx %d: power=%d\n",
5445 __func__, c, ridx, idx);
5446 cmd.power[ridx].rf_gain[c] = rf_gain[idx];
5447 cmd.power[ridx].dsp_gain[c] = dsp_gain[idx];
5451 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5452 "%s: set tx power for chan %d\n", __func__, chan);
5453 return iwn_cmd(sc, IWN_CMD_TXPOWER, &cmd, sizeof cmd, async);
5460 iwn5000_set_txpower(struct iwn_softc *sc, struct ieee80211_channel *ch,
5463 struct iwn5000_cmd_txpower cmd;
5465 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5468 * TX power calibration is handled automatically by the firmware
5471 memset(&cmd, 0, sizeof cmd);
5472 cmd.global_limit = 2 * IWN5000_TXPOWER_MAX_DBM; /* 16 dBm */
5473 cmd.flags = IWN5000_TXPOWER_NO_CLOSED;
5474 cmd.srv_limit = IWN5000_TXPOWER_AUTO;
5475 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: setting TX power\n", __func__);
5476 return iwn_cmd(sc, IWN_CMD_TXPOWER_DBM, &cmd, sizeof cmd, async);
5480 * Retrieve the maximum RSSI (in dBm) among receivers.
5483 iwn4965_get_rssi(struct iwn_softc *sc, struct iwn_rx_stat *stat)
5485 struct iwn4965_rx_phystat *phy = (void *)stat->phybuf;
5489 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5491 mask = (le16toh(phy->antenna) >> 4) & IWN_ANT_ABC;
5492 agc = (le16toh(phy->agc) >> 7) & 0x7f;
5495 if (mask & IWN_ANT_A)
5496 rssi = MAX(rssi, phy->rssi[0]);
5497 if (mask & IWN_ANT_B)
5498 rssi = MAX(rssi, phy->rssi[2]);
5499 if (mask & IWN_ANT_C)
5500 rssi = MAX(rssi, phy->rssi[4]);
5502 DPRINTF(sc, IWN_DEBUG_RECV,
5503 "%s: agc %d mask 0x%x rssi %d %d %d result %d\n", __func__, agc,
5504 mask, phy->rssi[0], phy->rssi[2], phy->rssi[4],
5505 rssi - agc - IWN_RSSI_TO_DBM);
5506 return rssi - agc - IWN_RSSI_TO_DBM;
5510 iwn5000_get_rssi(struct iwn_softc *sc, struct iwn_rx_stat *stat)
5512 struct iwn5000_rx_phystat *phy = (void *)stat->phybuf;
5516 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5518 agc = (le32toh(phy->agc) >> 9) & 0x7f;
5520 rssi = MAX(le16toh(phy->rssi[0]) & 0xff,
5521 le16toh(phy->rssi[1]) & 0xff);
5522 rssi = MAX(le16toh(phy->rssi[2]) & 0xff, rssi);
5524 DPRINTF(sc, IWN_DEBUG_RECV,
5525 "%s: agc %d rssi %d %d %d result %d\n", __func__, agc,
5526 phy->rssi[0], phy->rssi[1], phy->rssi[2],
5527 rssi - agc - IWN_RSSI_TO_DBM);
5528 return rssi - agc - IWN_RSSI_TO_DBM;
5532 * Retrieve the average noise (in dBm) among receivers.
5535 iwn_get_noise(const struct iwn_rx_general_stats *stats)
5537 int i, total, nbant, noise;
5540 for (i = 0; i < 3; i++) {
5541 if ((noise = le32toh(stats->noise[i]) & 0xff) == 0)
5546 /* There should be at least one antenna but check anyway. */
5547 return (nbant == 0) ? -127 : (total / nbant) - 107;
5551 * Compute temperature (in degC) from last received statistics.
5554 iwn4965_get_temperature(struct iwn_softc *sc)
5556 struct iwn_ucode_info *uc = &sc->ucode_info;
5557 int32_t r1, r2, r3, r4, temp;
5559 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5561 r1 = le32toh(uc->temp[0].chan20MHz);
5562 r2 = le32toh(uc->temp[1].chan20MHz);
5563 r3 = le32toh(uc->temp[2].chan20MHz);
5564 r4 = le32toh(sc->rawtemp);
5566 if (r1 == r3) /* Prevents division by 0 (should not happen). */
5569 /* Sign-extend 23-bit R4 value to 32-bit. */
5570 r4 = ((r4 & 0xffffff) ^ 0x800000) - 0x800000;
5571 /* Compute temperature in Kelvin. */
5572 temp = (259 * (r4 - r2)) / (r3 - r1);
5573 temp = (temp * 97) / 100 + 8;
5575 DPRINTF(sc, IWN_DEBUG_ANY, "temperature %dK/%dC\n", temp,
5577 return IWN_KTOC(temp);
5581 iwn5000_get_temperature(struct iwn_softc *sc)
5585 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5588 * Temperature is not used by the driver for 5000 Series because
5589 * TX power calibration is handled by firmware.
5591 temp = le32toh(sc->rawtemp);
5592 if (sc->hw_type == IWN_HW_REV_TYPE_5150) {
5593 temp = (temp / -5) + sc->temp_off;
5594 temp = IWN_KTOC(temp);
5600 * Initialize sensitivity calibration state machine.
5603 iwn_init_sensitivity(struct iwn_softc *sc)
5605 struct iwn_ops *ops = &sc->ops;
5606 struct iwn_calib_state *calib = &sc->calib;
5610 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5612 /* Reset calibration state machine. */
5613 memset(calib, 0, sizeof (*calib));
5614 calib->state = IWN_CALIB_STATE_INIT;
5615 calib->cck_state = IWN_CCK_STATE_HIFA;
5616 /* Set initial correlation values. */
5617 calib->ofdm_x1 = sc->limits->min_ofdm_x1;
5618 calib->ofdm_mrc_x1 = sc->limits->min_ofdm_mrc_x1;
5619 calib->ofdm_x4 = sc->limits->min_ofdm_x4;
5620 calib->ofdm_mrc_x4 = sc->limits->min_ofdm_mrc_x4;
5621 calib->cck_x4 = 125;
5622 calib->cck_mrc_x4 = sc->limits->min_cck_mrc_x4;
5623 calib->energy_cck = sc->limits->energy_cck;
5625 /* Write initial sensitivity. */
5626 if ((error = iwn_send_sensitivity(sc)) != 0)
5629 /* Write initial gains. */
5630 if ((error = ops->init_gains(sc)) != 0)
5633 /* Request statistics at each beacon interval. */
5635 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: sending request for statistics\n",
5637 return iwn_cmd(sc, IWN_CMD_GET_STATISTICS, &flags, sizeof flags, 1);
5641 * Collect noise and RSSI statistics for the first 20 beacons received
5642 * after association and use them to determine connected antennas and
5643 * to set differential gains.
5646 iwn_collect_noise(struct iwn_softc *sc,
5647 const struct iwn_rx_general_stats *stats)
5649 struct iwn_ops *ops = &sc->ops;
5650 struct iwn_calib_state *calib = &sc->calib;
5651 struct ifnet *ifp = sc->sc_ifp;
5652 struct ieee80211com *ic = ifp->if_l2com;
5656 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5658 /* Accumulate RSSI and noise for all 3 antennas. */
5659 for (i = 0; i < 3; i++) {
5660 calib->rssi[i] += le32toh(stats->rssi[i]) & 0xff;
5661 calib->noise[i] += le32toh(stats->noise[i]) & 0xff;
5663 /* NB: We update differential gains only once after 20 beacons. */
5664 if (++calib->nbeacons < 20)
5667 /* Determine highest average RSSI. */
5668 val = MAX(calib->rssi[0], calib->rssi[1]);
5669 val = MAX(calib->rssi[2], val);
5671 /* Determine which antennas are connected. */
5672 sc->chainmask = sc->rxchainmask;
5673 for (i = 0; i < 3; i++)
5674 if (val - calib->rssi[i] > 15 * 20)
5675 sc->chainmask &= ~(1 << i);
5676 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5677 "%s: RX chains mask: theoretical=0x%x, actual=0x%x\n",
5678 __func__, sc->rxchainmask, sc->chainmask);
5680 /* If none of the TX antennas are connected, keep at least one. */
5681 if ((sc->chainmask & sc->txchainmask) == 0)
5682 sc->chainmask |= IWN_LSB(sc->txchainmask);
5684 (void)ops->set_gains(sc);
5685 calib->state = IWN_CALIB_STATE_RUN;
5688 /* XXX Disable RX chains with no antennas connected. */
5689 sc->rxon->rxchain = htole16(IWN_RXCHAIN_SEL(sc->chainmask));
5690 if (sc->sc_is_scanning)
5691 device_printf(sc->sc_dev,
5692 "%s: is_scanning set, before RXON\n",
5694 (void)iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, 1);
5697 /* Enable power-saving mode if requested by user. */
5698 if (ic->ic_flags & IEEE80211_F_PMGTON)
5699 (void)iwn_set_pslevel(sc, 0, 3, 1);
5701 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5706 iwn4965_init_gains(struct iwn_softc *sc)
5708 struct iwn_phy_calib_gain cmd;
5710 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5712 memset(&cmd, 0, sizeof cmd);
5713 cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN;
5714 /* Differential gains initially set to 0 for all 3 antennas. */
5715 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5716 "%s: setting initial differential gains\n", __func__);
5717 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
5721 iwn5000_init_gains(struct iwn_softc *sc)
5723 struct iwn_phy_calib cmd;
5725 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5727 memset(&cmd, 0, sizeof cmd);
5728 cmd.code = sc->reset_noise_gain;
5731 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5732 "%s: setting initial differential gains\n", __func__);
5733 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
5737 iwn4965_set_gains(struct iwn_softc *sc)
5739 struct iwn_calib_state *calib = &sc->calib;
5740 struct iwn_phy_calib_gain cmd;
5741 int i, delta, noise;
5743 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5745 /* Get minimal noise among connected antennas. */
5746 noise = INT_MAX; /* NB: There's at least one antenna. */
5747 for (i = 0; i < 3; i++)
5748 if (sc->chainmask & (1 << i))
5749 noise = MIN(calib->noise[i], noise);
5751 memset(&cmd, 0, sizeof cmd);
5752 cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN;
5753 /* Set differential gains for connected antennas. */
5754 for (i = 0; i < 3; i++) {
5755 if (sc->chainmask & (1 << i)) {
5756 /* Compute attenuation (in unit of 1.5dB). */
5757 delta = (noise - (int32_t)calib->noise[i]) / 30;
5758 /* NB: delta <= 0 */
5759 /* Limit to [-4.5dB,0]. */
5760 cmd.gain[i] = MIN(abs(delta), 3);
5762 cmd.gain[i] |= 1 << 2; /* sign bit */
5765 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5766 "setting differential gains Ant A/B/C: %x/%x/%x (%x)\n",
5767 cmd.gain[0], cmd.gain[1], cmd.gain[2], sc->chainmask);
5768 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
5772 iwn5000_set_gains(struct iwn_softc *sc)
5774 struct iwn_calib_state *calib = &sc->calib;
5775 struct iwn_phy_calib_gain cmd;
5776 int i, ant, div, delta;
5778 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5780 /* We collected 20 beacons and !=6050 need a 1.5 factor. */
5781 div = (sc->hw_type == IWN_HW_REV_TYPE_6050) ? 20 : 30;
5783 memset(&cmd, 0, sizeof cmd);
5784 cmd.code = sc->noise_gain;
5787 /* Get first available RX antenna as referential. */
5788 ant = IWN_LSB(sc->rxchainmask);
5789 /* Set differential gains for other antennas. */
5790 for (i = ant + 1; i < 3; i++) {
5791 if (sc->chainmask & (1 << i)) {
5792 /* The delta is relative to antenna "ant". */
5793 delta = ((int32_t)calib->noise[ant] -
5794 (int32_t)calib->noise[i]) / div;
5795 /* Limit to [-4.5dB,+4.5dB]. */
5796 cmd.gain[i - 1] = MIN(abs(delta), 3);
5798 cmd.gain[i - 1] |= 1 << 2; /* sign bit */
5801 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5802 "setting differential gains Ant B/C: %x/%x (%x)\n",
5803 cmd.gain[0], cmd.gain[1], sc->chainmask);
5804 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
5808 * Tune RF RX sensitivity based on the number of false alarms detected
5809 * during the last beacon period.
5812 iwn_tune_sensitivity(struct iwn_softc *sc, const struct iwn_rx_stats *stats)
5814 #define inc(val, inc, max) \
5815 if ((val) < (max)) { \
5816 if ((val) < (max) - (inc)) \
5822 #define dec(val, dec, min) \
5823 if ((val) > (min)) { \
5824 if ((val) > (min) + (dec)) \
5831 const struct iwn_sensitivity_limits *limits = sc->limits;
5832 struct iwn_calib_state *calib = &sc->calib;
5833 uint32_t val, rxena, fa;
5834 uint32_t energy[3], energy_min;
5835 uint8_t noise[3], noise_ref;
5836 int i, needs_update = 0;
5838 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5840 /* Check that we've been enabled long enough. */
5841 if ((rxena = le32toh(stats->general.load)) == 0){
5842 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end not so long\n", __func__);
5846 /* Compute number of false alarms since last call for OFDM. */
5847 fa = le32toh(stats->ofdm.bad_plcp) - calib->bad_plcp_ofdm;
5848 fa += le32toh(stats->ofdm.fa) - calib->fa_ofdm;
5849 fa *= 200 * IEEE80211_DUR_TU; /* 200TU */
5851 if (fa > 50 * rxena) {
5852 /* High false alarm count, decrease sensitivity. */
5853 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5854 "%s: OFDM high false alarm count: %u\n", __func__, fa);
5855 inc(calib->ofdm_x1, 1, limits->max_ofdm_x1);
5856 inc(calib->ofdm_mrc_x1, 1, limits->max_ofdm_mrc_x1);
5857 inc(calib->ofdm_x4, 1, limits->max_ofdm_x4);
5858 inc(calib->ofdm_mrc_x4, 1, limits->max_ofdm_mrc_x4);
5860 } else if (fa < 5 * rxena) {
5861 /* Low false alarm count, increase sensitivity. */
5862 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5863 "%s: OFDM low false alarm count: %u\n", __func__, fa);
5864 dec(calib->ofdm_x1, 1, limits->min_ofdm_x1);
5865 dec(calib->ofdm_mrc_x1, 1, limits->min_ofdm_mrc_x1);
5866 dec(calib->ofdm_x4, 1, limits->min_ofdm_x4);
5867 dec(calib->ofdm_mrc_x4, 1, limits->min_ofdm_mrc_x4);
5870 /* Compute maximum noise among 3 receivers. */
5871 for (i = 0; i < 3; i++)
5872 noise[i] = (le32toh(stats->general.noise[i]) >> 8) & 0xff;
5873 val = MAX(noise[0], noise[1]);
5874 val = MAX(noise[2], val);
5875 /* Insert it into our samples table. */
5876 calib->noise_samples[calib->cur_noise_sample] = val;
5877 calib->cur_noise_sample = (calib->cur_noise_sample + 1) % 20;
5879 /* Compute maximum noise among last 20 samples. */
5880 noise_ref = calib->noise_samples[0];
5881 for (i = 1; i < 20; i++)
5882 noise_ref = MAX(noise_ref, calib->noise_samples[i]);
5884 /* Compute maximum energy among 3 receivers. */
5885 for (i = 0; i < 3; i++)
5886 energy[i] = le32toh(stats->general.energy[i]);
5887 val = MIN(energy[0], energy[1]);
5888 val = MIN(energy[2], val);
5889 /* Insert it into our samples table. */
5890 calib->energy_samples[calib->cur_energy_sample] = val;
5891 calib->cur_energy_sample = (calib->cur_energy_sample + 1) % 10;
5893 /* Compute minimum energy among last 10 samples. */
5894 energy_min = calib->energy_samples[0];
5895 for (i = 1; i < 10; i++)
5896 energy_min = MAX(energy_min, calib->energy_samples[i]);
5899 /* Compute number of false alarms since last call for CCK. */
5900 fa = le32toh(stats->cck.bad_plcp) - calib->bad_plcp_cck;
5901 fa += le32toh(stats->cck.fa) - calib->fa_cck;
5902 fa *= 200 * IEEE80211_DUR_TU; /* 200TU */
5904 if (fa > 50 * rxena) {
5905 /* High false alarm count, decrease sensitivity. */
5906 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5907 "%s: CCK high false alarm count: %u\n", __func__, fa);
5908 calib->cck_state = IWN_CCK_STATE_HIFA;
5911 if (calib->cck_x4 > 160) {
5912 calib->noise_ref = noise_ref;
5913 if (calib->energy_cck > 2)
5914 dec(calib->energy_cck, 2, energy_min);
5916 if (calib->cck_x4 < 160) {
5917 calib->cck_x4 = 161;
5920 inc(calib->cck_x4, 3, limits->max_cck_x4);
5922 inc(calib->cck_mrc_x4, 3, limits->max_cck_mrc_x4);
5924 } else if (fa < 5 * rxena) {
5925 /* Low false alarm count, increase sensitivity. */
5926 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5927 "%s: CCK low false alarm count: %u\n", __func__, fa);
5928 calib->cck_state = IWN_CCK_STATE_LOFA;
5931 if (calib->cck_state != IWN_CCK_STATE_INIT &&
5932 (((int32_t)calib->noise_ref - (int32_t)noise_ref) > 2 ||
5933 calib->low_fa > 100)) {
5934 inc(calib->energy_cck, 2, limits->min_energy_cck);
5935 dec(calib->cck_x4, 3, limits->min_cck_x4);
5936 dec(calib->cck_mrc_x4, 3, limits->min_cck_mrc_x4);
5939 /* Not worth to increase or decrease sensitivity. */
5940 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5941 "%s: CCK normal false alarm count: %u\n", __func__, fa);
5943 calib->noise_ref = noise_ref;
5945 if (calib->cck_state == IWN_CCK_STATE_HIFA) {
5946 /* Previous interval had many false alarms. */
5947 dec(calib->energy_cck, 8, energy_min);
5949 calib->cck_state = IWN_CCK_STATE_INIT;
5953 (void)iwn_send_sensitivity(sc);
5955 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5962 iwn_send_sensitivity(struct iwn_softc *sc)
5964 struct iwn_calib_state *calib = &sc->calib;
5965 struct iwn_enhanced_sensitivity_cmd cmd;
5968 memset(&cmd, 0, sizeof cmd);
5969 len = sizeof (struct iwn_sensitivity_cmd);
5970 cmd.which = IWN_SENSITIVITY_WORKTBL;
5971 /* OFDM modulation. */
5972 cmd.corr_ofdm_x1 = htole16(calib->ofdm_x1);
5973 cmd.corr_ofdm_mrc_x1 = htole16(calib->ofdm_mrc_x1);
5974 cmd.corr_ofdm_x4 = htole16(calib->ofdm_x4);
5975 cmd.corr_ofdm_mrc_x4 = htole16(calib->ofdm_mrc_x4);
5976 cmd.energy_ofdm = htole16(sc->limits->energy_ofdm);
5977 cmd.energy_ofdm_th = htole16(62);
5978 /* CCK modulation. */
5979 cmd.corr_cck_x4 = htole16(calib->cck_x4);
5980 cmd.corr_cck_mrc_x4 = htole16(calib->cck_mrc_x4);
5981 cmd.energy_cck = htole16(calib->energy_cck);
5982 /* Barker modulation: use default values. */
5983 cmd.corr_barker = htole16(190);
5984 cmd.corr_barker_mrc = htole16(sc->limits->barker_mrc);
5986 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5987 "%s: set sensitivity %d/%d/%d/%d/%d/%d/%d\n", __func__,
5988 calib->ofdm_x1, calib->ofdm_mrc_x1, calib->ofdm_x4,
5989 calib->ofdm_mrc_x4, calib->cck_x4,
5990 calib->cck_mrc_x4, calib->energy_cck);
5992 if (!(sc->sc_flags & IWN_FLAG_ENH_SENS))
5994 /* Enhanced sensitivity settings. */
5995 len = sizeof (struct iwn_enhanced_sensitivity_cmd);
5996 cmd.ofdm_det_slope_mrc = htole16(668);
5997 cmd.ofdm_det_icept_mrc = htole16(4);
5998 cmd.ofdm_det_slope = htole16(486);
5999 cmd.ofdm_det_icept = htole16(37);
6000 cmd.cck_det_slope_mrc = htole16(853);
6001 cmd.cck_det_icept_mrc = htole16(4);
6002 cmd.cck_det_slope = htole16(476);
6003 cmd.cck_det_icept = htole16(99);
6005 return iwn_cmd(sc, IWN_CMD_SET_SENSITIVITY, &cmd, len, 1);
6009 * Look at the increase of PLCP errors over time; if it exceeds
6010 * a programmed threshold then trigger an RF retune.
6013 iwn_check_rx_recovery(struct iwn_softc *sc, struct iwn_stats *rs)
6015 int32_t delta_ofdm, delta_ht, delta_cck;
6016 struct iwn_calib_state *calib = &sc->calib;
6017 int delta_ticks, cur_ticks;
6022 * Calculate the difference between the current and
6023 * previous statistics.
6025 delta_cck = le32toh(rs->rx.cck.bad_plcp) - calib->bad_plcp_cck;
6026 delta_ofdm = le32toh(rs->rx.ofdm.bad_plcp) - calib->bad_plcp_ofdm;
6027 delta_ht = le32toh(rs->rx.ht.bad_plcp) - calib->bad_plcp_ht;
6030 * Calculate the delta in time between successive statistics
6031 * messages. Yes, it can roll over; so we make sure that
6032 * this doesn't happen.
6034 * XXX go figure out what to do about rollover
6035 * XXX go figure out what to do if ticks rolls over to -ve instead!
6036 * XXX go stab signed integer overflow undefined-ness in the face.
6039 delta_ticks = cur_ticks - sc->last_calib_ticks;
6042 * If any are negative, then the firmware likely reset; so just
6043 * bail. We'll pick this up next time.
6045 if (delta_cck < 0 || delta_ofdm < 0 || delta_ht < 0 || delta_ticks < 0)
6049 * delta_ticks is in ticks; we need to convert it up to milliseconds
6050 * so we can do some useful math with it.
6052 delta_msec = ticks_to_msecs(delta_ticks);
6055 * Calculate what our threshold is given the current delta_msec.
6057 thresh = sc->base_params->plcp_err_threshold * delta_msec;
6059 DPRINTF(sc, IWN_DEBUG_STATE,
6060 "%s: time delta: %d; cck=%d, ofdm=%d, ht=%d, total=%d, thresh=%d\n",
6066 (delta_msec + delta_cck + delta_ofdm + delta_ht),
6070 * If we need a retune, then schedule a single channel scan
6071 * to a channel that isn't the currently active one!
6073 * The math from linux iwlwifi:
6075 * if ((delta * 100 / msecs) > threshold)
6077 if (thresh > 0 && (delta_cck + delta_ofdm + delta_ht) * 100 > thresh) {
6078 DPRINTF(sc, IWN_DEBUG_ANY,
6079 "%s: PLCP error threshold raw (%d) comparison (%d) "
6080 "over limit (%d); retune!\n",
6082 (delta_cck + delta_ofdm + delta_ht),
6083 (delta_cck + delta_ofdm + delta_ht) * 100,
6089 * Set STA mode power saving level (between 0 and 5).
6090 * Level 0 is CAM (Continuously Aware Mode), 5 is for maximum power saving.
6093 iwn_set_pslevel(struct iwn_softc *sc, int dtim, int level, int async)
6095 struct iwn_pmgt_cmd cmd;
6096 const struct iwn_pmgt *pmgt;
6097 uint32_t max, skip_dtim;
6101 DPRINTF(sc, IWN_DEBUG_PWRSAVE,
6102 "%s: dtim=%d, level=%d, async=%d\n",
6108 /* Select which PS parameters to use. */
6110 pmgt = &iwn_pmgt[0][level];
6111 else if (dtim <= 10)
6112 pmgt = &iwn_pmgt[1][level];
6114 pmgt = &iwn_pmgt[2][level];
6116 memset(&cmd, 0, sizeof cmd);
6117 if (level != 0) /* not CAM */
6118 cmd.flags |= htole16(IWN_PS_ALLOW_SLEEP);
6120 cmd.flags |= htole16(IWN_PS_FAST_PD);
6121 /* Retrieve PCIe Active State Power Management (ASPM). */
6122 reg = pci_read_config(sc->sc_dev, sc->sc_cap_off + 0x10, 1);
6123 if (!(reg & 0x1)) /* L0s Entry disabled. */
6124 cmd.flags |= htole16(IWN_PS_PCI_PMGT);
6125 cmd.rxtimeout = htole32(pmgt->rxtimeout * 1024);
6126 cmd.txtimeout = htole32(pmgt->txtimeout * 1024);
6132 skip_dtim = pmgt->skip_dtim;
6133 if (skip_dtim != 0) {
6134 cmd.flags |= htole16(IWN_PS_SLEEP_OVER_DTIM);
6135 max = pmgt->intval[4];
6136 if (max == (uint32_t)-1)
6137 max = dtim * (skip_dtim + 1);
6138 else if (max > dtim)
6139 max = (max / dtim) * dtim;
6142 for (i = 0; i < 5; i++)
6143 cmd.intval[i] = htole32(MIN(max, pmgt->intval[i]));
6145 DPRINTF(sc, IWN_DEBUG_RESET, "setting power saving level to %d\n",
6147 return iwn_cmd(sc, IWN_CMD_SET_POWER_MODE, &cmd, sizeof cmd, async);
6151 iwn_send_btcoex(struct iwn_softc *sc)
6153 struct iwn_bluetooth cmd;
6155 memset(&cmd, 0, sizeof cmd);
6156 cmd.flags = IWN_BT_COEX_CHAN_ANN | IWN_BT_COEX_BT_PRIO;
6157 cmd.lead_time = IWN_BT_LEAD_TIME_DEF;
6158 cmd.max_kill = IWN_BT_MAX_KILL_DEF;
6159 DPRINTF(sc, IWN_DEBUG_RESET, "%s: configuring bluetooth coexistence\n",
6161 return iwn_cmd(sc, IWN_CMD_BT_COEX, &cmd, sizeof(cmd), 0);
6165 iwn_send_advanced_btcoex(struct iwn_softc *sc)
6167 static const uint32_t btcoex_3wire[12] = {
6168 0xaaaaaaaa, 0xaaaaaaaa, 0xaeaaaaaa, 0xaaaaaaaa,
6169 0xcc00ff28, 0x0000aaaa, 0xcc00aaaa, 0x0000aaaa,
6170 0xc0004000, 0x00004000, 0xf0005000, 0xf0005000,
6172 struct iwn6000_btcoex_config btconfig;
6173 struct iwn2000_btcoex_config btconfig2k;
6174 struct iwn_btcoex_priotable btprio;
6175 struct iwn_btcoex_prot btprot;
6179 memset(&btconfig, 0, sizeof btconfig);
6180 memset(&btconfig2k, 0, sizeof btconfig2k);
6182 flags = IWN_BT_FLAG_COEX6000_MODE_3W <<
6183 IWN_BT_FLAG_COEX6000_MODE_SHIFT; // Done as is in linux kernel 3.2
6185 if (sc->base_params->bt_sco_disable)
6186 flags &= ~IWN_BT_FLAG_SYNC_2_BT_DISABLE;
6188 flags |= IWN_BT_FLAG_SYNC_2_BT_DISABLE;
6190 flags |= IWN_BT_FLAG_COEX6000_CHAN_INHIBITION;
6192 /* Default flags result is 145 as old value */
6195 * Flags value has to be review. Values must change if we
6196 * which to disable it
6198 if (sc->base_params->bt_session_2) {
6199 btconfig2k.flags = flags;
6200 btconfig2k.max_kill = 5;
6201 btconfig2k.bt3_t7_timer = 1;
6202 btconfig2k.kill_ack = htole32(0xffff0000);
6203 btconfig2k.kill_cts = htole32(0xffff0000);
6204 btconfig2k.sample_time = 2;
6205 btconfig2k.bt3_t2_timer = 0xc;
6207 for (i = 0; i < 12; i++)
6208 btconfig2k.lookup_table[i] = htole32(btcoex_3wire[i]);
6209 btconfig2k.valid = htole16(0xff);
6210 btconfig2k.prio_boost = htole32(0xf0);
6211 DPRINTF(sc, IWN_DEBUG_RESET,
6212 "%s: configuring advanced bluetooth coexistence"
6213 " session 2, flags : 0x%x\n",
6216 error = iwn_cmd(sc, IWN_CMD_BT_COEX, &btconfig2k,
6217 sizeof(btconfig2k), 1);
6219 btconfig.flags = flags;
6220 btconfig.max_kill = 5;
6221 btconfig.bt3_t7_timer = 1;
6222 btconfig.kill_ack = htole32(0xffff0000);
6223 btconfig.kill_cts = htole32(0xffff0000);
6224 btconfig.sample_time = 2;
6225 btconfig.bt3_t2_timer = 0xc;
6227 for (i = 0; i < 12; i++)
6228 btconfig.lookup_table[i] = htole32(btcoex_3wire[i]);
6229 btconfig.valid = htole16(0xff);
6230 btconfig.prio_boost = 0xf0;
6231 DPRINTF(sc, IWN_DEBUG_RESET,
6232 "%s: configuring advanced bluetooth coexistence,"
6236 error = iwn_cmd(sc, IWN_CMD_BT_COEX, &btconfig,
6237 sizeof(btconfig), 1);
6243 memset(&btprio, 0, sizeof btprio);
6244 btprio.calib_init1 = 0x6;
6245 btprio.calib_init2 = 0x7;
6246 btprio.calib_periodic_low1 = 0x2;
6247 btprio.calib_periodic_low2 = 0x3;
6248 btprio.calib_periodic_high1 = 0x4;
6249 btprio.calib_periodic_high2 = 0x5;
6251 btprio.scan52 = 0x8;
6252 btprio.scan24 = 0xa;
6253 error = iwn_cmd(sc, IWN_CMD_BT_COEX_PRIOTABLE, &btprio, sizeof(btprio),
6258 /* Force BT state machine change. */
6259 memset(&btprot, 0, sizeof btprot);
6262 error = iwn_cmd(sc, IWN_CMD_BT_COEX_PROT, &btprot, sizeof(btprot), 1);
6266 return iwn_cmd(sc, IWN_CMD_BT_COEX_PROT, &btprot, sizeof(btprot), 1);
6270 iwn5000_runtime_calib(struct iwn_softc *sc)
6272 struct iwn5000_calib_config cmd;
6274 memset(&cmd, 0, sizeof cmd);
6275 cmd.ucode.once.enable = 0xffffffff;
6276 cmd.ucode.once.start = IWN5000_CALIB_DC;
6277 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6278 "%s: configuring runtime calibration\n", __func__);
6279 return iwn_cmd(sc, IWN5000_CMD_CALIB_CONFIG, &cmd, sizeof(cmd), 0);
6283 iwn_config(struct iwn_softc *sc)
6285 struct iwn_ops *ops = &sc->ops;
6286 struct ifnet *ifp = sc->sc_ifp;
6287 struct ieee80211com *ic = ifp->if_l2com;
6292 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
6294 if ((sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET)
6295 && (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2)) {
6296 device_printf(sc->sc_dev,"%s: temp_offset and temp_offsetv2 are"
6297 " exclusive each together. Review NIC config file. Conf"
6298 " : 0x%08x Flags : 0x%08x \n", __func__,
6299 sc->base_params->calib_need,
6300 (IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET |
6301 IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2));
6305 /* Compute temperature calib if needed. Will be send by send calib */
6306 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET) {
6307 error = iwn5000_temp_offset_calib(sc);
6309 device_printf(sc->sc_dev,
6310 "%s: could not set temperature offset\n", __func__);
6313 } else if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2) {
6314 error = iwn5000_temp_offset_calibv2(sc);
6316 device_printf(sc->sc_dev,
6317 "%s: could not compute temperature offset v2\n",
6323 if (sc->hw_type == IWN_HW_REV_TYPE_6050) {
6324 /* Configure runtime DC calibration. */
6325 error = iwn5000_runtime_calib(sc);
6327 device_printf(sc->sc_dev,
6328 "%s: could not configure runtime calibration\n",
6334 /* Configure valid TX chains for >=5000 Series. */
6335 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
6336 txmask = htole32(sc->txchainmask);
6337 DPRINTF(sc, IWN_DEBUG_RESET,
6338 "%s: configuring valid TX chains 0x%x\n", __func__, txmask);
6339 error = iwn_cmd(sc, IWN5000_CMD_TX_ANT_CONFIG, &txmask,
6342 device_printf(sc->sc_dev,
6343 "%s: could not configure valid TX chains, "
6344 "error %d\n", __func__, error);
6349 /* Configure bluetooth coexistence. */
6352 /* Configure bluetooth coexistence if needed. */
6353 if (sc->base_params->bt_mode == IWN_BT_ADVANCED)
6354 error = iwn_send_advanced_btcoex(sc);
6355 if (sc->base_params->bt_mode == IWN_BT_SIMPLE)
6356 error = iwn_send_btcoex(sc);
6359 device_printf(sc->sc_dev,
6360 "%s: could not configure bluetooth coexistence, error %d\n",
6365 /* Set mode, channel, RX filter and enable RX. */
6366 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
6367 memset(sc->rxon, 0, sizeof (struct iwn_rxon));
6368 IEEE80211_ADDR_COPY(sc->rxon->myaddr, IF_LLADDR(ifp));
6369 IEEE80211_ADDR_COPY(sc->rxon->wlap, IF_LLADDR(ifp));
6370 sc->rxon->chan = ieee80211_chan2ieee(ic, ic->ic_curchan);
6371 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
6372 if (IEEE80211_IS_CHAN_2GHZ(ic->ic_curchan))
6373 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
6374 switch (ic->ic_opmode) {
6375 case IEEE80211_M_STA:
6376 sc->rxon->mode = IWN_MODE_STA;
6377 sc->rxon->filter = htole32(IWN_FILTER_MULTICAST);
6379 case IEEE80211_M_MONITOR:
6380 sc->rxon->mode = IWN_MODE_MONITOR;
6381 sc->rxon->filter = htole32(IWN_FILTER_MULTICAST |
6382 IWN_FILTER_CTL | IWN_FILTER_PROMISC);
6385 /* Should not get there. */
6388 sc->rxon->cck_mask = 0x0f; /* not yet negotiated */
6389 sc->rxon->ofdm_mask = 0xff; /* not yet negotiated */
6390 sc->rxon->ht_single_mask = 0xff;
6391 sc->rxon->ht_dual_mask = 0xff;
6392 sc->rxon->ht_triple_mask = 0xff;
6394 IWN_RXCHAIN_VALID(sc->rxchainmask) |
6395 IWN_RXCHAIN_MIMO_COUNT(2) |
6396 IWN_RXCHAIN_IDLE_COUNT(2);
6397 sc->rxon->rxchain = htole16(rxchain);
6398 DPRINTF(sc, IWN_DEBUG_RESET, "%s: setting configuration\n", __func__);
6399 if (sc->sc_is_scanning)
6400 device_printf(sc->sc_dev,
6401 "%s: is_scanning set, before RXON\n",
6403 error = iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, 0);
6405 device_printf(sc->sc_dev, "%s: RXON command failed\n",
6410 if ((error = iwn_add_broadcast_node(sc, 0)) != 0) {
6411 device_printf(sc->sc_dev, "%s: could not add broadcast node\n",
6416 /* Configuration has changed, set TX power accordingly. */
6417 if ((error = ops->set_txpower(sc, ic->ic_curchan, 0)) != 0) {
6418 device_printf(sc->sc_dev, "%s: could not set TX power\n",
6423 if ((error = iwn_set_critical_temp(sc)) != 0) {
6424 device_printf(sc->sc_dev,
6425 "%s: could not set critical temperature\n", __func__);
6429 /* Set power saving level to CAM during initialization. */
6430 if ((error = iwn_set_pslevel(sc, 0, 0, 0)) != 0) {
6431 device_printf(sc->sc_dev,
6432 "%s: could not set power saving level\n", __func__);
6436 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
6442 * Add an ssid element to a frame.
6445 ieee80211_add_ssid(uint8_t *frm, const uint8_t *ssid, u_int len)
6447 *frm++ = IEEE80211_ELEMID_SSID;
6449 memcpy(frm, ssid, len);
6454 iwn_get_active_dwell_time(struct iwn_softc *sc,
6455 struct ieee80211_channel *c, uint8_t n_probes)
6457 /* No channel? Default to 2GHz settings */
6458 if (c == NULL || IEEE80211_IS_CHAN_2GHZ(c)) {
6459 return (IWN_ACTIVE_DWELL_TIME_2GHZ +
6460 IWN_ACTIVE_DWELL_FACTOR_2GHZ * (n_probes + 1));
6463 /* 5GHz dwell time */
6464 return (IWN_ACTIVE_DWELL_TIME_5GHZ +
6465 IWN_ACTIVE_DWELL_FACTOR_5GHZ * (n_probes + 1));
6469 * Limit the total dwell time to 85% of the beacon interval.
6471 * Returns the dwell time in milliseconds.
6474 iwn_limit_dwell(struct iwn_softc *sc, uint16_t dwell_time)
6476 struct ieee80211com *ic = sc->sc_ifp->if_l2com;
6477 struct ieee80211vap *vap = NULL;
6480 /* bintval is in TU (1.024mS) */
6481 if (! TAILQ_EMPTY(&ic->ic_vaps)) {
6482 vap = TAILQ_FIRST(&ic->ic_vaps);
6483 bintval = vap->iv_bss->ni_intval;
6487 * If it's non-zero, we should calculate the minimum of
6488 * it and the DWELL_BASE.
6490 * XXX Yes, the math should take into account that bintval
6491 * is 1.024mS, not 1mS..
6494 DPRINTF(sc, IWN_DEBUG_SCAN,
6498 return (MIN(IWN_PASSIVE_DWELL_BASE, ((bintval * 85) / 100)));
6501 /* No association context? Default */
6502 return (IWN_PASSIVE_DWELL_BASE);
6506 iwn_get_passive_dwell_time(struct iwn_softc *sc, struct ieee80211_channel *c)
6510 if (c == NULL || IEEE80211_IS_CHAN_2GHZ(c)) {
6511 passive = IWN_PASSIVE_DWELL_BASE + IWN_PASSIVE_DWELL_TIME_2GHZ;
6513 passive = IWN_PASSIVE_DWELL_BASE + IWN_PASSIVE_DWELL_TIME_5GHZ;
6516 /* Clamp to the beacon interval if we're associated */
6517 return (iwn_limit_dwell(sc, passive));
6521 iwn_scan(struct iwn_softc *sc, struct ieee80211vap *vap,
6522 struct ieee80211_scan_state *ss, struct ieee80211_channel *c)
6524 struct ifnet *ifp = sc->sc_ifp;
6525 struct ieee80211com *ic = ifp->if_l2com;
6526 struct ieee80211_node *ni = vap->iv_bss;
6527 struct iwn_scan_hdr *hdr;
6528 struct iwn_cmd_data *tx;
6529 struct iwn_scan_essid *essid;
6530 struct iwn_scan_chan *chan;
6531 struct ieee80211_frame *wh;
6532 struct ieee80211_rateset *rs;
6538 uint16_t dwell_active, dwell_passive;
6539 uint32_t extra, scan_service_time;
6541 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
6544 * We are absolutely not allowed to send a scan command when another
6545 * scan command is pending.
6547 if (sc->sc_is_scanning) {
6548 device_printf(sc->sc_dev, "%s: called whilst scanning!\n",
6553 /* Assign the scan channel */
6556 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
6557 buf = kmalloc(IWN_SCAN_MAXSZ, M_DEVBUF, M_INTWAIT | M_ZERO);
6558 hdr = (struct iwn_scan_hdr *)buf;
6560 * Move to the next channel if no frames are received within 10ms
6561 * after sending the probe request.
6563 hdr->quiet_time = htole16(10); /* timeout in milliseconds */
6564 hdr->quiet_threshold = htole16(1); /* min # of packets */
6566 * Max needs to be greater than active and passive and quiet!
6567 * It's also in microseconds!
6569 hdr->max_svc = htole32(250 * 1024);
6572 * Reset scan: interval=100
6573 * Normal scan: interval=becaon interval
6574 * suspend_time: 100 (TU)
6577 extra = (100 /* suspend_time */ / 100 /* beacon interval */) << 22;
6578 //scan_service_time = extra | ((100 /* susp */ % 100 /* int */) * 1024);
6579 scan_service_time = (4 << 22) | (100 * 1024); /* Hardcode for now! */
6580 hdr->pause_svc = htole32(scan_service_time);
6582 /* Select antennas for scanning. */
6584 IWN_RXCHAIN_VALID(sc->rxchainmask) |
6585 IWN_RXCHAIN_FORCE_MIMO_SEL(sc->rxchainmask) |
6586 IWN_RXCHAIN_DRIVER_FORCE;
6587 if (IEEE80211_IS_CHAN_A(c) &&
6588 sc->hw_type == IWN_HW_REV_TYPE_4965) {
6589 /* Ant A must be avoided in 5GHz because of an HW bug. */
6590 rxchain |= IWN_RXCHAIN_FORCE_SEL(IWN_ANT_B);
6591 } else /* Use all available RX antennas. */
6592 rxchain |= IWN_RXCHAIN_FORCE_SEL(sc->rxchainmask);
6593 hdr->rxchain = htole16(rxchain);
6594 hdr->filter = htole32(IWN_FILTER_MULTICAST | IWN_FILTER_BEACON);
6596 tx = (struct iwn_cmd_data *)(hdr + 1);
6597 tx->flags = htole32(IWN_TX_AUTO_SEQ);
6598 tx->id = sc->broadcast_id;
6599 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
6601 if (IEEE80211_IS_CHAN_5GHZ(c)) {
6602 /* Send probe requests at 6Mbps. */
6603 tx->rate = htole32(0xd);
6604 rs = &ic->ic_sup_rates[IEEE80211_MODE_11A];
6606 hdr->flags = htole32(IWN_RXON_24GHZ | IWN_RXON_AUTO);
6607 if (sc->hw_type == IWN_HW_REV_TYPE_4965 &&
6608 sc->rxon->associd && sc->rxon->chan > 14)
6609 tx->rate = htole32(0xd);
6611 /* Send probe requests at 1Mbps. */
6612 tx->rate = htole32(10 | IWN_RFLAG_CCK);
6614 rs = &ic->ic_sup_rates[IEEE80211_MODE_11G];
6616 /* Use the first valid TX antenna. */
6617 txant = IWN_LSB(sc->txchainmask);
6618 tx->rate |= htole32(IWN_RFLAG_ANT(txant));
6621 * Only do active scanning if we're announcing a probe request
6622 * for a given SSID (or more, if we ever add it to the driver.)
6627 * If we're scanning for a specific SSID, add it to the command.
6629 * XXX maybe look at adding support for scanning multiple SSIDs?
6631 essid = (struct iwn_scan_essid *)(tx + 1);
6633 if (ss->ss_ssid[0].len != 0) {
6634 essid[0].id = IEEE80211_ELEMID_SSID;
6635 essid[0].len = ss->ss_ssid[0].len;
6636 memcpy(essid[0].data, ss->ss_ssid[0].ssid, ss->ss_ssid[0].len);
6639 DPRINTF(sc, IWN_DEBUG_SCAN, "%s: ssid_len=%d, ssid=%*s\n",
6643 ss->ss_ssid[0].ssid);
6645 if (ss->ss_nssid > 0)
6650 * Build a probe request frame. Most of the following code is a
6651 * copy & paste of what is done in net80211.
6653 wh = (struct ieee80211_frame *)(essid + 20);
6654 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT |
6655 IEEE80211_FC0_SUBTYPE_PROBE_REQ;
6656 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS;
6657 IEEE80211_ADDR_COPY(wh->i_addr1, ifp->if_broadcastaddr);
6658 IEEE80211_ADDR_COPY(wh->i_addr2, IF_LLADDR(ifp));
6659 IEEE80211_ADDR_COPY(wh->i_addr3, ifp->if_broadcastaddr);
6660 *(uint16_t *)&wh->i_dur[0] = 0; /* filled by HW */
6661 *(uint16_t *)&wh->i_seq[0] = 0; /* filled by HW */
6663 frm = (uint8_t *)(wh + 1);
6664 frm = ieee80211_add_ssid(frm, NULL, 0);
6665 frm = ieee80211_add_rates(frm, rs);
6666 if (rs->rs_nrates > IEEE80211_RATE_SIZE)
6667 frm = ieee80211_add_xrates(frm, rs);
6668 if (ic->ic_htcaps & IEEE80211_HTC_HT)
6669 frm = ieee80211_add_htcap(frm, ni);
6671 /* Set length of probe request. */
6672 tx->len = htole16(frm - (uint8_t *)wh);
6675 * If active scanning is requested but a certain channel is
6676 * marked passive, we can do active scanning if we detect
6679 * There is an issue with some firmware versions that triggers
6680 * a sysassert on a "good CRC threshold" of zero (== disabled),
6681 * on a radar channel even though this means that we should NOT
6684 * The "good CRC threshold" is the number of frames that we
6685 * need to receive during our dwell time on a channel before
6686 * sending out probes -- setting this to a huge value will
6687 * mean we never reach it, but at the same time work around
6688 * the aforementioned issue. Thus use IWL_GOOD_CRC_TH_NEVER
6689 * here instead of IWL_GOOD_CRC_TH_DISABLED.
6691 * This was fixed in later versions along with some other
6692 * scan changes, and the threshold behaves as a flag in those
6697 * If we're doing active scanning, set the crc_threshold
6698 * to a suitable value. This is different to active veruss
6699 * passive scanning depending upon the channel flags; the
6700 * firmware will obey that particular check for us.
6702 if (sc->tlv_feature_flags & IWN_UCODE_TLV_FLAGS_NEWSCAN)
6703 hdr->crc_threshold = is_active ?
6704 IWN_GOOD_CRC_TH_DEFAULT : IWN_GOOD_CRC_TH_DISABLED;
6706 hdr->crc_threshold = is_active ?
6707 IWN_GOOD_CRC_TH_DEFAULT : IWN_GOOD_CRC_TH_NEVER;
6709 chan = (struct iwn_scan_chan *)frm;
6710 chan->chan = htole16(ieee80211_chan2ieee(ic, c));
6712 if (ss->ss_nssid > 0)
6713 chan->flags |= htole32(IWN_CHAN_NPBREQS(1));
6714 chan->dsp_gain = 0x6e;
6717 * Set the passive/active flag depending upon the channel mode.
6718 * XXX TODO: take the is_active flag into account as well?
6720 if (c->ic_flags & IEEE80211_CHAN_PASSIVE)
6721 chan->flags |= htole32(IWN_CHAN_PASSIVE);
6723 chan->flags |= htole32(IWN_CHAN_ACTIVE);
6726 * Calculate the active/passive dwell times.
6729 dwell_active = iwn_get_active_dwell_time(sc, c, ss->ss_nssid);
6730 dwell_passive = iwn_get_passive_dwell_time(sc, c);
6732 /* Make sure they're valid */
6733 if (dwell_passive <= dwell_active)
6734 dwell_passive = dwell_active + 1;
6736 chan->active = htole16(dwell_active);
6737 chan->passive = htole16(dwell_passive);
6739 if (IEEE80211_IS_CHAN_5GHZ(c) &&
6740 !(c->ic_flags & IEEE80211_CHAN_PASSIVE)) {
6741 chan->rf_gain = 0x3b;
6742 } else if (IEEE80211_IS_CHAN_5GHZ(c)) {
6743 chan->rf_gain = 0x3b;
6744 } else if (!(c->ic_flags & IEEE80211_CHAN_PASSIVE)) {
6745 chan->rf_gain = 0x28;
6747 chan->rf_gain = 0x28;
6750 DPRINTF(sc, IWN_DEBUG_STATE,
6751 "%s: chan %u flags 0x%x rf_gain 0x%x "
6752 "dsp_gain 0x%x active %d passive %d scan_svc_time %d crc 0x%x "
6753 "isactive=%d numssid=%d\n", __func__,
6754 chan->chan, chan->flags, chan->rf_gain, chan->dsp_gain,
6755 dwell_active, dwell_passive, scan_service_time,
6756 hdr->crc_threshold, is_active, ss->ss_nssid);
6760 buflen = (uint8_t *)chan - buf;
6761 hdr->len = htole16(buflen);
6763 if (sc->sc_is_scanning) {
6764 device_printf(sc->sc_dev,
6765 "%s: called with is_scanning set!\n",
6768 sc->sc_is_scanning = 1;
6770 DPRINTF(sc, IWN_DEBUG_STATE, "sending scan command nchan=%d\n",
6772 error = iwn_cmd(sc, IWN_CMD_SCAN, buf, buflen, 1);
6773 kfree(buf, M_DEVBUF);
6775 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
6781 iwn_auth(struct iwn_softc *sc, struct ieee80211vap *vap)
6783 struct iwn_ops *ops = &sc->ops;
6784 struct ifnet *ifp = sc->sc_ifp;
6785 struct ieee80211com *ic = ifp->if_l2com;
6786 struct ieee80211_node *ni = vap->iv_bss;
6789 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
6791 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
6792 /* Update adapter configuration. */
6793 IEEE80211_ADDR_COPY(sc->rxon->bssid, ni->ni_bssid);
6794 sc->rxon->chan = ieee80211_chan2ieee(ic, ni->ni_chan);
6795 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
6796 if (IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
6797 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
6798 if (ic->ic_flags & IEEE80211_F_SHSLOT)
6799 sc->rxon->flags |= htole32(IWN_RXON_SHSLOT);
6800 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
6801 sc->rxon->flags |= htole32(IWN_RXON_SHPREAMBLE);
6802 if (IEEE80211_IS_CHAN_A(ni->ni_chan)) {
6803 sc->rxon->cck_mask = 0;
6804 sc->rxon->ofdm_mask = 0x15;
6805 } else if (IEEE80211_IS_CHAN_B(ni->ni_chan)) {
6806 sc->rxon->cck_mask = 0x03;
6807 sc->rxon->ofdm_mask = 0;
6809 /* Assume 802.11b/g. */
6810 sc->rxon->cck_mask = 0x03;
6811 sc->rxon->ofdm_mask = 0x15;
6813 DPRINTF(sc, IWN_DEBUG_STATE, "rxon chan %d flags %x cck %x ofdm %x\n",
6814 sc->rxon->chan, sc->rxon->flags, sc->rxon->cck_mask,
6815 sc->rxon->ofdm_mask);
6816 if (sc->sc_is_scanning)
6817 device_printf(sc->sc_dev,
6818 "%s: is_scanning set, before RXON\n",
6820 error = iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, 1);
6822 device_printf(sc->sc_dev, "%s: RXON command failed, error %d\n",
6827 /* Configuration has changed, set TX power accordingly. */
6828 if ((error = ops->set_txpower(sc, ni->ni_chan, 1)) != 0) {
6829 device_printf(sc->sc_dev,
6830 "%s: could not set TX power, error %d\n", __func__, error);
6834 * Reconfiguring RXON clears the firmware nodes table so we must
6835 * add the broadcast node again.
6837 if ((error = iwn_add_broadcast_node(sc, 1)) != 0) {
6838 device_printf(sc->sc_dev,
6839 "%s: could not add broadcast node, error %d\n", __func__,
6844 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
6850 iwn_run(struct iwn_softc *sc, struct ieee80211vap *vap)
6852 struct iwn_ops *ops = &sc->ops;
6853 struct ifnet *ifp = sc->sc_ifp;
6854 struct ieee80211com *ic = ifp->if_l2com;
6855 struct ieee80211_node *ni = vap->iv_bss;
6856 struct iwn_node_info node;
6857 uint32_t htflags = 0;
6860 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
6862 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
6863 if (ic->ic_opmode == IEEE80211_M_MONITOR) {
6864 /* Link LED blinks while monitoring. */
6865 iwn_set_led(sc, IWN_LED_LINK, 5, 5);
6868 if ((error = iwn_set_timing(sc, ni)) != 0) {
6869 device_printf(sc->sc_dev,
6870 "%s: could not set timing, error %d\n", __func__, error);
6874 /* Update adapter configuration. */
6875 IEEE80211_ADDR_COPY(sc->rxon->bssid, ni->ni_bssid);
6876 sc->rxon->associd = htole16(IEEE80211_AID(ni->ni_associd));
6877 sc->rxon->chan = ieee80211_chan2ieee(ic, ni->ni_chan);
6878 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
6879 if (IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
6880 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
6881 if (ic->ic_flags & IEEE80211_F_SHSLOT)
6882 sc->rxon->flags |= htole32(IWN_RXON_SHSLOT);
6883 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
6884 sc->rxon->flags |= htole32(IWN_RXON_SHPREAMBLE);
6885 if (IEEE80211_IS_CHAN_A(ni->ni_chan)) {
6886 sc->rxon->cck_mask = 0;
6887 sc->rxon->ofdm_mask = 0x15;
6888 } else if (IEEE80211_IS_CHAN_B(ni->ni_chan)) {
6889 sc->rxon->cck_mask = 0x03;
6890 sc->rxon->ofdm_mask = 0;
6892 /* Assume 802.11b/g. */
6893 sc->rxon->cck_mask = 0x0f;
6894 sc->rxon->ofdm_mask = 0x15;
6896 if (IEEE80211_IS_CHAN_HT(ni->ni_chan)) {
6897 htflags |= IWN_RXON_HT_PROTMODE(ic->ic_curhtprotmode);
6898 if (IEEE80211_IS_CHAN_HT40(ni->ni_chan)) {
6899 switch (ic->ic_curhtprotmode) {
6900 case IEEE80211_HTINFO_OPMODE_HT20PR:
6901 htflags |= IWN_RXON_HT_MODEPURE40;
6904 htflags |= IWN_RXON_HT_MODEMIXED;
6908 if (IEEE80211_IS_CHAN_HT40D(ni->ni_chan))
6909 htflags |= IWN_RXON_HT_HT40MINUS;
6911 sc->rxon->flags |= htole32(htflags);
6912 sc->rxon->filter |= htole32(IWN_FILTER_BSS);
6913 DPRINTF(sc, IWN_DEBUG_STATE, "rxon chan %d flags %x\n",
6914 sc->rxon->chan, sc->rxon->flags);
6915 if (sc->sc_is_scanning)
6916 device_printf(sc->sc_dev,
6917 "%s: is_scanning set, before RXON\n",
6919 error = iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, 1);
6921 device_printf(sc->sc_dev,
6922 "%s: could not update configuration, error %d\n", __func__,
6927 /* Configuration has changed, set TX power accordingly. */
6928 if ((error = ops->set_txpower(sc, ni->ni_chan, 1)) != 0) {
6929 device_printf(sc->sc_dev,
6930 "%s: could not set TX power, error %d\n", __func__, error);
6934 /* Fake a join to initialize the TX rate. */
6935 ((struct iwn_node *)ni)->id = IWN_ID_BSS;
6936 iwn_newassoc(ni, 1);
6939 memset(&node, 0, sizeof node);
6940 IEEE80211_ADDR_COPY(node.macaddr, ni->ni_macaddr);
6941 node.id = IWN_ID_BSS;
6942 if (IEEE80211_IS_CHAN_HT(ni->ni_chan)) {
6943 switch (ni->ni_htcap & IEEE80211_HTCAP_SMPS) {
6944 case IEEE80211_HTCAP_SMPS_ENA:
6945 node.htflags |= htole32(IWN_SMPS_MIMO_DIS);
6947 case IEEE80211_HTCAP_SMPS_DYNAMIC:
6948 node.htflags |= htole32(IWN_SMPS_MIMO_PROT);
6951 node.htflags |= htole32(IWN_AMDPU_SIZE_FACTOR(3) |
6952 IWN_AMDPU_DENSITY(5)); /* 4us */
6953 if (IEEE80211_IS_CHAN_HT40(ni->ni_chan))
6954 node.htflags |= htole32(IWN_NODE_HT40);
6956 DPRINTF(sc, IWN_DEBUG_STATE, "%s: adding BSS node\n", __func__);
6957 error = ops->add_node(sc, &node, 1);
6959 device_printf(sc->sc_dev,
6960 "%s: could not add BSS node, error %d\n", __func__, error);
6963 DPRINTF(sc, IWN_DEBUG_STATE, "%s: setting link quality for node %d\n",
6965 if ((error = iwn_set_link_quality(sc, ni)) != 0) {
6966 device_printf(sc->sc_dev,
6967 "%s: could not setup link quality for node %d, error %d\n",
6968 __func__, node.id, error);
6972 if ((error = iwn_init_sensitivity(sc)) != 0) {
6973 device_printf(sc->sc_dev,
6974 "%s: could not set sensitivity, error %d\n", __func__,
6978 /* Start periodic calibration timer. */
6979 sc->calib.state = IWN_CALIB_STATE_ASSOC;
6981 callout_reset(&sc->calib_to, msecs_to_ticks(500), iwn_calib_timeout,
6984 /* Link LED always on while associated. */
6985 iwn_set_led(sc, IWN_LED_LINK, 0, 1);
6987 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
6993 * This function is called by upper layer when an ADDBA request is received
6994 * from another STA and before the ADDBA response is sent.
6997 iwn_ampdu_rx_start(struct ieee80211_node *ni, struct ieee80211_rx_ampdu *rap,
6998 int baparamset, int batimeout, int baseqctl)
7000 #define MS(_v, _f) (((_v) & _f) >> _f##_S)
7001 struct iwn_softc *sc = ni->ni_ic->ic_ifp->if_softc;
7002 struct iwn_ops *ops = &sc->ops;
7003 struct iwn_node *wn = (void *)ni;
7004 struct iwn_node_info node;
7009 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7011 tid = MS(le16toh(baparamset), IEEE80211_BAPS_TID);
7012 ssn = MS(le16toh(baseqctl), IEEE80211_BASEQ_START);
7014 memset(&node, 0, sizeof node);
7016 node.control = IWN_NODE_UPDATE;
7017 node.flags = IWN_FLAG_SET_ADDBA;
7018 node.addba_tid = tid;
7019 node.addba_ssn = htole16(ssn);
7020 DPRINTF(sc, IWN_DEBUG_RECV, "ADDBA RA=%d TID=%d SSN=%d\n",
7022 error = ops->add_node(sc, &node, 1);
7025 return sc->sc_ampdu_rx_start(ni, rap, baparamset, batimeout, baseqctl);
7030 * This function is called by upper layer on teardown of an HT-immediate
7031 * Block Ack agreement (eg. uppon receipt of a DELBA frame).
7034 iwn_ampdu_rx_stop(struct ieee80211_node *ni, struct ieee80211_rx_ampdu *rap)
7036 struct ieee80211com *ic = ni->ni_ic;
7037 struct iwn_softc *sc = ic->ic_ifp->if_softc;
7038 struct iwn_ops *ops = &sc->ops;
7039 struct iwn_node *wn = (void *)ni;
7040 struct iwn_node_info node;
7043 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7045 /* XXX: tid as an argument */
7046 for (tid = 0; tid < WME_NUM_TID; tid++) {
7047 if (&ni->ni_rx_ampdu[tid] == rap)
7051 memset(&node, 0, sizeof node);
7053 node.control = IWN_NODE_UPDATE;
7054 node.flags = IWN_FLAG_SET_DELBA;
7055 node.delba_tid = tid;
7056 DPRINTF(sc, IWN_DEBUG_RECV, "DELBA RA=%d TID=%d\n", wn->id, tid);
7057 (void)ops->add_node(sc, &node, 1);
7058 sc->sc_ampdu_rx_stop(ni, rap);
7062 iwn_addba_request(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
7063 int dialogtoken, int baparamset, int batimeout)
7065 struct iwn_softc *sc = ni->ni_ic->ic_ifp->if_softc;
7068 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7070 for (qid = sc->firstaggqueue; qid < sc->ntxqs; qid++) {
7071 if (sc->qid2tap[qid] == NULL)
7074 if (qid == sc->ntxqs) {
7075 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: not free aggregation queue\n",
7079 tap->txa_private = kmalloc(sizeof(int), M_DEVBUF, M_INTWAIT);
7080 sc->qid2tap[qid] = tap;
7081 *(int *)tap->txa_private = qid;
7082 return sc->sc_addba_request(ni, tap, dialogtoken, baparamset,
7087 iwn_addba_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
7088 int code, int baparamset, int batimeout)
7090 struct iwn_softc *sc = ni->ni_ic->ic_ifp->if_softc;
7091 int qid = *(int *)tap->txa_private;
7092 uint8_t tid = tap->txa_ac;
7095 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7097 if (code == IEEE80211_STATUS_SUCCESS) {
7098 ni->ni_txseqs[tid] = tap->txa_start & 0xfff;
7099 ret = iwn_ampdu_tx_start(ni->ni_ic, ni, tid);
7103 sc->qid2tap[qid] = NULL;
7104 kfree(tap->txa_private, M_DEVBUF);
7105 tap->txa_private = NULL;
7107 return sc->sc_addba_response(ni, tap, code, baparamset, batimeout);
7111 * This function is called by upper layer when an ADDBA response is received
7115 iwn_ampdu_tx_start(struct ieee80211com *ic, struct ieee80211_node *ni,
7118 struct ieee80211_tx_ampdu *tap = &ni->ni_tx_ampdu[tid];
7119 struct iwn_softc *sc = ni->ni_ic->ic_ifp->if_softc;
7120 struct iwn_ops *ops = &sc->ops;
7121 struct iwn_node *wn = (void *)ni;
7122 struct iwn_node_info node;
7125 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7127 /* Enable TX for the specified RA/TID. */
7128 wn->disable_tid &= ~(1 << tid);
7129 memset(&node, 0, sizeof node);
7131 node.control = IWN_NODE_UPDATE;
7132 node.flags = IWN_FLAG_SET_DISABLE_TID;
7133 node.disable_tid = htole16(wn->disable_tid);
7134 error = ops->add_node(sc, &node, 1);
7138 if ((error = iwn_nic_lock(sc)) != 0)
7140 qid = *(int *)tap->txa_private;
7141 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: ra=%d tid=%d ssn=%d qid=%d\n",
7142 __func__, wn->id, tid, tap->txa_start, qid);
7143 ops->ampdu_tx_start(sc, ni, qid, tid, tap->txa_start & 0xfff);
7146 iwn_set_link_quality(sc, ni);
7151 iwn_ampdu_tx_stop(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap)
7153 struct iwn_softc *sc = ni->ni_ic->ic_ifp->if_softc;
7154 struct iwn_ops *ops = &sc->ops;
7155 uint8_t tid = tap->txa_ac;
7158 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7160 sc->sc_addba_stop(ni, tap);
7162 if (tap->txa_private == NULL)
7165 qid = *(int *)tap->txa_private;
7166 if (sc->txq[qid].queued != 0)
7168 if (iwn_nic_lock(sc) != 0)
7170 ops->ampdu_tx_stop(sc, qid, tid, tap->txa_start & 0xfff);
7172 sc->qid2tap[qid] = NULL;
7173 kfree(tap->txa_private, M_DEVBUF);
7174 tap->txa_private = NULL;
7178 iwn4965_ampdu_tx_start(struct iwn_softc *sc, struct ieee80211_node *ni,
7179 int qid, uint8_t tid, uint16_t ssn)
7181 struct iwn_node *wn = (void *)ni;
7183 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7185 /* Stop TX scheduler while we're changing its configuration. */
7186 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7187 IWN4965_TXQ_STATUS_CHGACT);
7189 /* Assign RA/TID translation to the queue. */
7190 iwn_mem_write_2(sc, sc->sched_base + IWN4965_SCHED_TRANS_TBL(qid),
7193 /* Enable chain-building mode for the queue. */
7194 iwn_prph_setbits(sc, IWN4965_SCHED_QCHAIN_SEL, 1 << qid);
7196 /* Set starting sequence number from the ADDBA request. */
7197 sc->txq[qid].cur = sc->txq[qid].read = (ssn & 0xff);
7198 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7199 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), ssn);
7201 /* Set scheduler window size. */
7202 iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid),
7204 /* Set scheduler frame limit. */
7205 iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid) + 4,
7206 IWN_SCHED_LIMIT << 16);
7208 /* Enable interrupts for the queue. */
7209 iwn_prph_setbits(sc, IWN4965_SCHED_INTR_MASK, 1 << qid);
7211 /* Mark the queue as active. */
7212 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7213 IWN4965_TXQ_STATUS_ACTIVE | IWN4965_TXQ_STATUS_AGGR_ENA |
7214 iwn_tid2fifo[tid] << 1);
7218 iwn4965_ampdu_tx_stop(struct iwn_softc *sc, int qid, uint8_t tid, uint16_t ssn)
7220 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7222 /* Stop TX scheduler while we're changing its configuration. */
7223 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7224 IWN4965_TXQ_STATUS_CHGACT);
7226 /* Set starting sequence number from the ADDBA request. */
7227 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7228 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), ssn);
7230 /* Disable interrupts for the queue. */
7231 iwn_prph_clrbits(sc, IWN4965_SCHED_INTR_MASK, 1 << qid);
7233 /* Mark the queue as inactive. */
7234 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7235 IWN4965_TXQ_STATUS_INACTIVE | iwn_tid2fifo[tid] << 1);
7239 iwn5000_ampdu_tx_start(struct iwn_softc *sc, struct ieee80211_node *ni,
7240 int qid, uint8_t tid, uint16_t ssn)
7242 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7244 struct iwn_node *wn = (void *)ni;
7246 /* Stop TX scheduler while we're changing its configuration. */
7247 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7248 IWN5000_TXQ_STATUS_CHGACT);
7250 /* Assign RA/TID translation to the queue. */
7251 iwn_mem_write_2(sc, sc->sched_base + IWN5000_SCHED_TRANS_TBL(qid),
7254 /* Enable chain-building mode for the queue. */
7255 iwn_prph_setbits(sc, IWN5000_SCHED_QCHAIN_SEL, 1 << qid);
7257 /* Enable aggregation for the queue. */
7258 iwn_prph_setbits(sc, IWN5000_SCHED_AGGR_SEL, 1 << qid);
7260 /* Set starting sequence number from the ADDBA request. */
7261 sc->txq[qid].cur = sc->txq[qid].read = (ssn & 0xff);
7262 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7263 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), ssn);
7265 /* Set scheduler window size and frame limit. */
7266 iwn_mem_write(sc, sc->sched_base + IWN5000_SCHED_QUEUE_OFFSET(qid) + 4,
7267 IWN_SCHED_LIMIT << 16 | IWN_SCHED_WINSZ);
7269 /* Enable interrupts for the queue. */
7270 iwn_prph_setbits(sc, IWN5000_SCHED_INTR_MASK, 1 << qid);
7272 /* Mark the queue as active. */
7273 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7274 IWN5000_TXQ_STATUS_ACTIVE | iwn_tid2fifo[tid]);
7278 iwn5000_ampdu_tx_stop(struct iwn_softc *sc, int qid, uint8_t tid, uint16_t ssn)
7280 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7282 /* Stop TX scheduler while we're changing its configuration. */
7283 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7284 IWN5000_TXQ_STATUS_CHGACT);
7286 /* Disable aggregation for the queue. */
7287 iwn_prph_clrbits(sc, IWN5000_SCHED_AGGR_SEL, 1 << qid);
7289 /* Set starting sequence number from the ADDBA request. */
7290 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7291 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), ssn);
7293 /* Disable interrupts for the queue. */
7294 iwn_prph_clrbits(sc, IWN5000_SCHED_INTR_MASK, 1 << qid);
7296 /* Mark the queue as inactive. */
7297 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7298 IWN5000_TXQ_STATUS_INACTIVE | iwn_tid2fifo[tid]);
7302 * Query calibration tables from the initialization firmware. We do this
7303 * only once at first boot. Called from a process context.
7306 iwn5000_query_calibration(struct iwn_softc *sc)
7308 struct iwn5000_calib_config cmd;
7311 memset(&cmd, 0, sizeof cmd);
7312 cmd.ucode.once.enable = htole32(0xffffffff);
7313 cmd.ucode.once.start = htole32(0xffffffff);
7314 cmd.ucode.once.send = htole32(0xffffffff);
7315 cmd.ucode.flags = htole32(0xffffffff);
7316 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: sending calibration query\n",
7318 error = iwn_cmd(sc, IWN5000_CMD_CALIB_CONFIG, &cmd, sizeof cmd, 0);
7322 /* Wait at most two seconds for calibration to complete. */
7323 if (!(sc->sc_flags & IWN_FLAG_CALIB_DONE))
7324 error = zsleep(sc, &wlan_global_serializer, 0, "iwncal", 2 * hz);
7329 * Send calibration results to the runtime firmware. These results were
7330 * obtained on first boot from the initialization firmware.
7333 iwn5000_send_calibration(struct iwn_softc *sc)
7337 for (idx = 0; idx < IWN5000_PHY_CALIB_MAX_RESULT; idx++) {
7338 if (!(sc->base_params->calib_need & (1<<idx))) {
7339 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7340 "No need of calib %d\n",
7342 continue; /* no need for this calib */
7344 if (sc->calibcmd[idx].buf == NULL) {
7345 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7346 "Need calib idx : %d but no available data\n",
7351 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7352 "send calibration result idx=%d len=%d\n", idx,
7353 sc->calibcmd[idx].len);
7354 error = iwn_cmd(sc, IWN_CMD_PHY_CALIB, sc->calibcmd[idx].buf,
7355 sc->calibcmd[idx].len, 0);
7357 device_printf(sc->sc_dev,
7358 "%s: could not send calibration result, error %d\n",
7367 iwn5000_send_wimax_coex(struct iwn_softc *sc)
7369 struct iwn5000_wimax_coex wimax;
7372 if (sc->hw_type == IWN_HW_REV_TYPE_6050) {
7373 /* Enable WiMAX coexistence for combo adapters. */
7375 IWN_WIMAX_COEX_ASSOC_WA_UNMASK |
7376 IWN_WIMAX_COEX_UNASSOC_WA_UNMASK |
7377 IWN_WIMAX_COEX_STA_TABLE_VALID |
7378 IWN_WIMAX_COEX_ENABLE;
7379 memcpy(wimax.events, iwn6050_wimax_events,
7380 sizeof iwn6050_wimax_events);
7384 /* Disable WiMAX coexistence. */
7386 memset(wimax.events, 0, sizeof wimax.events);
7388 DPRINTF(sc, IWN_DEBUG_RESET, "%s: Configuring WiMAX coexistence\n",
7390 return iwn_cmd(sc, IWN5000_CMD_WIMAX_COEX, &wimax, sizeof wimax, 0);
7394 iwn5000_crystal_calib(struct iwn_softc *sc)
7396 struct iwn5000_phy_calib_crystal cmd;
7398 memset(&cmd, 0, sizeof cmd);
7399 cmd.code = IWN5000_PHY_CALIB_CRYSTAL;
7402 cmd.cap_pin[0] = le32toh(sc->eeprom_crystal) & 0xff;
7403 cmd.cap_pin[1] = (le32toh(sc->eeprom_crystal) >> 16) & 0xff;
7404 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "sending crystal calibration %d, %d\n",
7405 cmd.cap_pin[0], cmd.cap_pin[1]);
7406 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
7410 iwn5000_temp_offset_calib(struct iwn_softc *sc)
7412 struct iwn5000_phy_calib_temp_offset cmd;
7414 memset(&cmd, 0, sizeof cmd);
7415 cmd.code = IWN5000_PHY_CALIB_TEMP_OFFSET;
7418 if (sc->eeprom_temp != 0)
7419 cmd.offset = htole16(sc->eeprom_temp);
7421 cmd.offset = htole16(IWN_DEFAULT_TEMP_OFFSET);
7422 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "setting radio sensor offset to %d\n",
7423 le16toh(cmd.offset));
7424 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
7428 iwn5000_temp_offset_calibv2(struct iwn_softc *sc)
7430 struct iwn5000_phy_calib_temp_offsetv2 cmd;
7432 memset(&cmd, 0, sizeof cmd);
7433 cmd.code = IWN5000_PHY_CALIB_TEMP_OFFSET;
7436 if (sc->eeprom_temp != 0) {
7437 cmd.offset_low = htole16(sc->eeprom_temp);
7438 cmd.offset_high = htole16(sc->eeprom_temp_high);
7440 cmd.offset_low = htole16(IWN_DEFAULT_TEMP_OFFSET);
7441 cmd.offset_high = htole16(IWN_DEFAULT_TEMP_OFFSET);
7443 cmd.burnt_voltage_ref = htole16(sc->eeprom_voltage);
7445 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7446 "setting radio sensor low offset to %d, high offset to %d, voltage to %d\n",
7447 le16toh(cmd.offset_low),
7448 le16toh(cmd.offset_high),
7449 le16toh(cmd.burnt_voltage_ref));
7451 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
7455 * This function is called after the runtime firmware notifies us of its
7456 * readiness (called in a process context).
7459 iwn4965_post_alive(struct iwn_softc *sc)
7463 if ((error = iwn_nic_lock(sc)) != 0)
7466 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7468 /* Clear TX scheduler state in SRAM. */
7469 sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR);
7470 iwn_mem_set_region_4(sc, sc->sched_base + IWN4965_SCHED_CTX_OFF, 0,
7471 IWN4965_SCHED_CTX_LEN / sizeof (uint32_t));
7473 /* Set physical address of TX scheduler rings (1KB aligned). */
7474 iwn_prph_write(sc, IWN4965_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10);
7476 IWN_SETBITS(sc, IWN_FH_TX_CHICKEN, IWN_FH_TX_CHICKEN_SCHED_RETRY);
7478 /* Disable chain mode for all our 16 queues. */
7479 iwn_prph_write(sc, IWN4965_SCHED_QCHAIN_SEL, 0);
7481 for (qid = 0; qid < IWN4965_NTXQUEUES; qid++) {
7482 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), 0);
7483 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | 0);
7485 /* Set scheduler window size. */
7486 iwn_mem_write(sc, sc->sched_base +
7487 IWN4965_SCHED_QUEUE_OFFSET(qid), IWN_SCHED_WINSZ);
7488 /* Set scheduler frame limit. */
7489 iwn_mem_write(sc, sc->sched_base +
7490 IWN4965_SCHED_QUEUE_OFFSET(qid) + 4,
7491 IWN_SCHED_LIMIT << 16);
7494 /* Enable interrupts for all our 16 queues. */
7495 iwn_prph_write(sc, IWN4965_SCHED_INTR_MASK, 0xffff);
7496 /* Identify TX FIFO rings (0-7). */
7497 iwn_prph_write(sc, IWN4965_SCHED_TXFACT, 0xff);
7499 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
7500 for (qid = 0; qid < 7; qid++) {
7501 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 4, 5, 6 };
7502 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7503 IWN4965_TXQ_STATUS_ACTIVE | qid2fifo[qid] << 1);
7510 * This function is called after the initialization or runtime firmware
7511 * notifies us of its readiness (called in a process context).
7514 iwn5000_post_alive(struct iwn_softc *sc)
7518 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
7520 /* Switch to using ICT interrupt mode. */
7521 iwn5000_ict_reset(sc);
7523 if ((error = iwn_nic_lock(sc)) != 0){
7524 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__);
7528 /* Clear TX scheduler state in SRAM. */
7529 sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR);
7530 iwn_mem_set_region_4(sc, sc->sched_base + IWN5000_SCHED_CTX_OFF, 0,
7531 IWN5000_SCHED_CTX_LEN / sizeof (uint32_t));
7533 /* Set physical address of TX scheduler rings (1KB aligned). */
7534 iwn_prph_write(sc, IWN5000_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10);
7536 IWN_SETBITS(sc, IWN_FH_TX_CHICKEN, IWN_FH_TX_CHICKEN_SCHED_RETRY);
7538 /* Enable chain mode for all queues, except command queue. */
7539 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT)
7540 iwn_prph_write(sc, IWN5000_SCHED_QCHAIN_SEL, 0xfffdf);
7542 iwn_prph_write(sc, IWN5000_SCHED_QCHAIN_SEL, 0xfffef);
7543 iwn_prph_write(sc, IWN5000_SCHED_AGGR_SEL, 0);
7545 for (qid = 0; qid < IWN5000_NTXQUEUES; qid++) {
7546 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), 0);
7547 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | 0);
7549 iwn_mem_write(sc, sc->sched_base +
7550 IWN5000_SCHED_QUEUE_OFFSET(qid), 0);
7551 /* Set scheduler window size and frame limit. */
7552 iwn_mem_write(sc, sc->sched_base +
7553 IWN5000_SCHED_QUEUE_OFFSET(qid) + 4,
7554 IWN_SCHED_LIMIT << 16 | IWN_SCHED_WINSZ);
7557 /* Enable interrupts for all our 20 queues. */
7558 iwn_prph_write(sc, IWN5000_SCHED_INTR_MASK, 0xfffff);
7559 /* Identify TX FIFO rings (0-7). */
7560 iwn_prph_write(sc, IWN5000_SCHED_TXFACT, 0xff);
7562 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
7563 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT) {
7564 /* Mark TX rings as active. */
7565 for (qid = 0; qid < 11; qid++) {
7566 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 0, 4, 2, 5, 4, 7, 5 };
7567 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7568 IWN5000_TXQ_STATUS_ACTIVE | qid2fifo[qid]);
7571 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
7572 for (qid = 0; qid < 7; qid++) {
7573 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 7, 5, 6 };
7574 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7575 IWN5000_TXQ_STATUS_ACTIVE | qid2fifo[qid]);
7580 /* Configure WiMAX coexistence for combo adapters. */
7581 error = iwn5000_send_wimax_coex(sc);
7583 device_printf(sc->sc_dev,
7584 "%s: could not configure WiMAX coexistence, error %d\n",
7588 if (sc->hw_type != IWN_HW_REV_TYPE_5150) {
7589 /* Perform crystal calibration. */
7590 error = iwn5000_crystal_calib(sc);
7592 device_printf(sc->sc_dev,
7593 "%s: crystal calibration failed, error %d\n",
7598 if (!(sc->sc_flags & IWN_FLAG_CALIB_DONE)) {
7599 /* Query calibration from the initialization firmware. */
7600 if ((error = iwn5000_query_calibration(sc)) != 0) {
7601 device_printf(sc->sc_dev,
7602 "%s: could not query calibration, error %d\n",
7607 * We have the calibration results now, reboot with the
7608 * runtime firmware (call ourselves recursively!)
7611 error = iwn_hw_init(sc);
7613 /* Send calibration results to runtime firmware. */
7614 error = iwn5000_send_calibration(sc);
7617 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
7623 * The firmware boot code is small and is intended to be copied directly into
7624 * the NIC internal memory (no DMA transfer).
7627 iwn4965_load_bootcode(struct iwn_softc *sc, const uint8_t *ucode, int size)
7631 size /= sizeof (uint32_t);
7633 if ((error = iwn_nic_lock(sc)) != 0)
7636 /* Copy microcode image into NIC memory. */
7637 iwn_prph_write_region_4(sc, IWN_BSM_SRAM_BASE,
7638 (const uint32_t *)ucode, size);
7640 iwn_prph_write(sc, IWN_BSM_WR_MEM_SRC, 0);
7641 iwn_prph_write(sc, IWN_BSM_WR_MEM_DST, IWN_FW_TEXT_BASE);
7642 iwn_prph_write(sc, IWN_BSM_WR_DWCOUNT, size);
7644 /* Start boot load now. */
7645 iwn_prph_write(sc, IWN_BSM_WR_CTRL, IWN_BSM_WR_CTRL_START);
7647 /* Wait for transfer to complete. */
7648 for (ntries = 0; ntries < 1000; ntries++) {
7649 if (!(iwn_prph_read(sc, IWN_BSM_WR_CTRL) &
7650 IWN_BSM_WR_CTRL_START))
7654 if (ntries == 1000) {
7655 device_printf(sc->sc_dev, "%s: could not load boot firmware\n",
7661 /* Enable boot after power up. */
7662 iwn_prph_write(sc, IWN_BSM_WR_CTRL, IWN_BSM_WR_CTRL_START_EN);
7669 iwn4965_load_firmware(struct iwn_softc *sc)
7671 struct iwn_fw_info *fw = &sc->fw;
7672 struct iwn_dma_info *dma = &sc->fw_dma;
7675 /* Copy initialization sections into pre-allocated DMA-safe memory. */
7676 memcpy(dma->vaddr, fw->init.data, fw->init.datasz);
7677 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
7678 memcpy(dma->vaddr + IWN4965_FW_DATA_MAXSZ,
7679 fw->init.text, fw->init.textsz);
7680 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
7682 /* Tell adapter where to find initialization sections. */
7683 if ((error = iwn_nic_lock(sc)) != 0)
7685 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4);
7686 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->init.datasz);
7687 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR,
7688 (dma->paddr + IWN4965_FW_DATA_MAXSZ) >> 4);
7689 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE, fw->init.textsz);
7692 /* Load firmware boot code. */
7693 error = iwn4965_load_bootcode(sc, fw->boot.text, fw->boot.textsz);
7695 device_printf(sc->sc_dev, "%s: could not load boot firmware\n",
7699 /* Now press "execute". */
7700 IWN_WRITE(sc, IWN_RESET, 0);
7702 /* Wait at most one second for first alive notification. */
7703 if ((error = zsleep(sc, &wlan_global_serializer, 0, "iwninit", hz)) != 0) {
7704 device_printf(sc->sc_dev,
7705 "%s: timeout waiting for adapter to initialize, error %d\n",
7710 /* Retrieve current temperature for initial TX power calibration. */
7711 sc->rawtemp = sc->ucode_info.temp[3].chan20MHz;
7712 sc->temp = iwn4965_get_temperature(sc);
7714 /* Copy runtime sections into pre-allocated DMA-safe memory. */
7715 memcpy(dma->vaddr, fw->main.data, fw->main.datasz);
7716 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
7717 memcpy(dma->vaddr + IWN4965_FW_DATA_MAXSZ,
7718 fw->main.text, fw->main.textsz);
7719 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
7721 /* Tell adapter where to find runtime sections. */
7722 if ((error = iwn_nic_lock(sc)) != 0)
7724 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4);
7725 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->main.datasz);
7726 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR,
7727 (dma->paddr + IWN4965_FW_DATA_MAXSZ) >> 4);
7728 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE,
7729 IWN_FW_UPDATED | fw->main.textsz);
7736 iwn5000_load_firmware_section(struct iwn_softc *sc, uint32_t dst,
7737 const uint8_t *section, int size)
7739 struct iwn_dma_info *dma = &sc->fw_dma;
7742 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7744 /* Copy firmware section into pre-allocated DMA-safe memory. */
7745 memcpy(dma->vaddr, section, size);
7746 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
7748 if ((error = iwn_nic_lock(sc)) != 0)
7751 IWN_WRITE(sc, IWN_FH_TX_CONFIG(IWN_SRVC_DMACHNL),
7752 IWN_FH_TX_CONFIG_DMA_PAUSE);
7754 IWN_WRITE(sc, IWN_FH_SRAM_ADDR(IWN_SRVC_DMACHNL), dst);
7755 IWN_WRITE(sc, IWN_FH_TFBD_CTRL0(IWN_SRVC_DMACHNL),
7756 IWN_LOADDR(dma->paddr));
7757 IWN_WRITE(sc, IWN_FH_TFBD_CTRL1(IWN_SRVC_DMACHNL),
7758 IWN_HIADDR(dma->paddr) << 28 | size);
7759 IWN_WRITE(sc, IWN_FH_TXBUF_STATUS(IWN_SRVC_DMACHNL),
7760 IWN_FH_TXBUF_STATUS_TBNUM(1) |
7761 IWN_FH_TXBUF_STATUS_TBIDX(1) |
7762 IWN_FH_TXBUF_STATUS_TFBD_VALID);
7764 /* Kick Flow Handler to start DMA transfer. */
7765 IWN_WRITE(sc, IWN_FH_TX_CONFIG(IWN_SRVC_DMACHNL),
7766 IWN_FH_TX_CONFIG_DMA_ENA | IWN_FH_TX_CONFIG_CIRQ_HOST_ENDTFD);
7770 /* Wait at most five seconds for FH DMA transfer to complete. */
7771 return zsleep(sc, &wlan_global_serializer, 0, "iwninit", 5 * hz);
7775 iwn5000_load_firmware(struct iwn_softc *sc)
7777 struct iwn_fw_part *fw;
7780 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7782 /* Load the initialization firmware on first boot only. */
7783 fw = (sc->sc_flags & IWN_FLAG_CALIB_DONE) ?
7784 &sc->fw.main : &sc->fw.init;
7786 error = iwn5000_load_firmware_section(sc, IWN_FW_TEXT_BASE,
7787 fw->text, fw->textsz);
7789 device_printf(sc->sc_dev,
7790 "%s: could not load firmware %s section, error %d\n",
7791 __func__, ".text", error);
7794 error = iwn5000_load_firmware_section(sc, IWN_FW_DATA_BASE,
7795 fw->data, fw->datasz);
7797 device_printf(sc->sc_dev,
7798 "%s: could not load firmware %s section, error %d\n",
7799 __func__, ".data", error);
7803 /* Now press "execute". */
7804 IWN_WRITE(sc, IWN_RESET, 0);
7809 * Extract text and data sections from a legacy firmware image.
7812 iwn_read_firmware_leg(struct iwn_softc *sc, struct iwn_fw_info *fw)
7814 const uint32_t *ptr;
7818 ptr = (const uint32_t *)fw->data;
7819 rev = le32toh(*ptr++);
7821 /* Check firmware API version. */
7822 if (IWN_FW_API(rev) <= 1) {
7823 device_printf(sc->sc_dev,
7824 "%s: bad firmware, need API version >=2\n", __func__);
7827 if (IWN_FW_API(rev) >= 3) {
7828 /* Skip build number (version 2 header). */
7832 if (fw->size < hdrlen) {
7833 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
7834 __func__, fw->size);
7837 fw->main.textsz = le32toh(*ptr++);
7838 fw->main.datasz = le32toh(*ptr++);
7839 fw->init.textsz = le32toh(*ptr++);
7840 fw->init.datasz = le32toh(*ptr++);
7841 fw->boot.textsz = le32toh(*ptr++);
7843 /* Check that all firmware sections fit. */
7844 if (fw->size < hdrlen + fw->main.textsz + fw->main.datasz +
7845 fw->init.textsz + fw->init.datasz + fw->boot.textsz) {
7846 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
7847 __func__, fw->size);
7851 /* Get pointers to firmware sections. */
7852 fw->main.text = (const uint8_t *)ptr;
7853 fw->main.data = fw->main.text + fw->main.textsz;
7854 fw->init.text = fw->main.data + fw->main.datasz;
7855 fw->init.data = fw->init.text + fw->init.textsz;
7856 fw->boot.text = fw->init.data + fw->init.datasz;
7861 * Extract text and data sections from a TLV firmware image.
7864 iwn_read_firmware_tlv(struct iwn_softc *sc, struct iwn_fw_info *fw,
7867 const struct iwn_fw_tlv_hdr *hdr;
7868 const struct iwn_fw_tlv *tlv;
7869 const uint8_t *ptr, *end;
7873 if (fw->size < sizeof (*hdr)) {
7874 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
7875 __func__, fw->size);
7878 hdr = (const struct iwn_fw_tlv_hdr *)fw->data;
7879 if (hdr->signature != htole32(IWN_FW_SIGNATURE)) {
7880 device_printf(sc->sc_dev, "%s: bad firmware signature 0x%08x\n",
7881 __func__, le32toh(hdr->signature));
7884 DPRINTF(sc, IWN_DEBUG_RESET, "FW: \"%.64s\", build 0x%x\n", hdr->descr,
7885 le32toh(hdr->build));
7888 * Select the closest supported alternative that is less than
7889 * or equal to the specified one.
7891 altmask = le64toh(hdr->altmask);
7892 while (alt > 0 && !(altmask & (1ULL << alt)))
7893 alt--; /* Downgrade. */
7894 DPRINTF(sc, IWN_DEBUG_RESET, "using alternative %d\n", alt);
7896 ptr = (const uint8_t *)(hdr + 1);
7897 end = (const uint8_t *)(fw->data + fw->size);
7899 /* Parse type-length-value fields. */
7900 while (ptr + sizeof (*tlv) <= end) {
7901 tlv = (const struct iwn_fw_tlv *)ptr;
7902 len = le32toh(tlv->len);
7904 ptr += sizeof (*tlv);
7905 if (ptr + len > end) {
7906 device_printf(sc->sc_dev,
7907 "%s: firmware too short: %zu bytes\n", __func__,
7911 /* Skip other alternatives. */
7912 if (tlv->alt != 0 && tlv->alt != htole16(alt))
7915 switch (le16toh(tlv->type)) {
7916 case IWN_FW_TLV_MAIN_TEXT:
7917 fw->main.text = ptr;
7918 fw->main.textsz = len;
7920 case IWN_FW_TLV_MAIN_DATA:
7921 fw->main.data = ptr;
7922 fw->main.datasz = len;
7924 case IWN_FW_TLV_INIT_TEXT:
7925 fw->init.text = ptr;
7926 fw->init.textsz = len;
7928 case IWN_FW_TLV_INIT_DATA:
7929 fw->init.data = ptr;
7930 fw->init.datasz = len;
7932 case IWN_FW_TLV_BOOT_TEXT:
7933 fw->boot.text = ptr;
7934 fw->boot.textsz = len;
7936 case IWN_FW_TLV_ENH_SENS:
7938 sc->sc_flags |= IWN_FLAG_ENH_SENS;
7940 case IWN_FW_TLV_PHY_CALIB:
7941 tmp = le32toh(*ptr);
7943 sc->reset_noise_gain = tmp;
7944 sc->noise_gain = tmp + 1;
7947 case IWN_FW_TLV_PAN:
7948 sc->sc_flags |= IWN_FLAG_PAN_SUPPORT;
7949 DPRINTF(sc, IWN_DEBUG_RESET,
7950 "PAN Support found: %d\n", 1);
7952 case IWN_FW_TLV_FLAGS:
7953 if (len < sizeof(uint32_t))
7955 if (len % sizeof(uint32_t))
7957 sc->tlv_feature_flags = le32toh(*ptr);
7958 DPRINTF(sc, IWN_DEBUG_RESET,
7959 "%s: feature: 0x%08x\n",
7961 sc->tlv_feature_flags);
7963 case IWN_FW_TLV_PBREQ_MAXLEN:
7964 case IWN_FW_TLV_RUNT_EVTLOG_PTR:
7965 case IWN_FW_TLV_RUNT_EVTLOG_SIZE:
7966 case IWN_FW_TLV_RUNT_ERRLOG_PTR:
7967 case IWN_FW_TLV_INIT_EVTLOG_PTR:
7968 case IWN_FW_TLV_INIT_EVTLOG_SIZE:
7969 case IWN_FW_TLV_INIT_ERRLOG_PTR:
7970 case IWN_FW_TLV_WOWLAN_INST:
7971 case IWN_FW_TLV_WOWLAN_DATA:
7972 DPRINTF(sc, IWN_DEBUG_RESET,
7973 "TLV type %d recognized but not handled\n",
7974 le16toh(tlv->type));
7977 DPRINTF(sc, IWN_DEBUG_RESET,
7978 "TLV type %d not handled\n", le16toh(tlv->type));
7981 next: /* TLV fields are 32-bit aligned. */
7982 ptr += (len + 3) & ~3;
7988 iwn_read_firmware(struct iwn_softc *sc)
7990 struct iwn_fw_info *fw = &sc->fw;
7993 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7995 wlan_assert_serialized();
7996 memset(fw, 0, sizeof (*fw));
7999 * Read firmware image from filesystem. The firmware can block
8000 * in a taskq and deadlock against our serializer so unlock
8003 wlan_serialize_exit();
8004 sc->fw_fp = firmware_get(sc->fwname);
8005 wlan_serialize_enter();
8006 if (sc->fw_fp == NULL) {
8007 device_printf(sc->sc_dev, "%s: could not read firmware %s\n",
8008 __func__, sc->fwname);
8012 fw->size = sc->fw_fp->datasize;
8013 fw->data = (const uint8_t *)sc->fw_fp->data;
8014 if (fw->size < sizeof (uint32_t)) {
8015 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
8016 __func__, fw->size);
8017 firmware_put(sc->fw_fp, FIRMWARE_UNLOAD);
8022 /* Retrieve text and data sections. */
8023 if (*(const uint32_t *)fw->data != 0) /* Legacy image. */
8024 error = iwn_read_firmware_leg(sc, fw);
8026 error = iwn_read_firmware_tlv(sc, fw, 1);
8028 device_printf(sc->sc_dev,
8029 "%s: could not read firmware sections, error %d\n",
8031 firmware_put(sc->fw_fp, FIRMWARE_UNLOAD);
8036 /* Make sure text and data sections fit in hardware memory. */
8037 if (fw->main.textsz > sc->fw_text_maxsz ||
8038 fw->main.datasz > sc->fw_data_maxsz ||
8039 fw->init.textsz > sc->fw_text_maxsz ||
8040 fw->init.datasz > sc->fw_data_maxsz ||
8041 fw->boot.textsz > IWN_FW_BOOT_TEXT_MAXSZ ||
8042 (fw->boot.textsz & 3) != 0) {
8043 device_printf(sc->sc_dev, "%s: firmware sections too large\n",
8045 firmware_put(sc->fw_fp, FIRMWARE_UNLOAD);
8050 /* We can proceed with loading the firmware. */
8055 iwn_clock_wait(struct iwn_softc *sc)
8059 /* Set "initialization complete" bit. */
8060 IWN_SETBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_INIT_DONE);
8062 /* Wait for clock stabilization. */
8063 for (ntries = 0; ntries < 2500; ntries++) {
8064 if (IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_MAC_CLOCK_READY)
8068 device_printf(sc->sc_dev,
8069 "%s: timeout waiting for clock stabilization\n", __func__);
8074 iwn_apm_init(struct iwn_softc *sc)
8079 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8081 /* Disable L0s exit timer (NMI bug workaround). */
8082 IWN_SETBITS(sc, IWN_GIO_CHICKEN, IWN_GIO_CHICKEN_DIS_L0S_TIMER);
8083 /* Don't wait for ICH L0s (ICH bug workaround). */
8084 IWN_SETBITS(sc, IWN_GIO_CHICKEN, IWN_GIO_CHICKEN_L1A_NO_L0S_RX);
8086 /* Set FH wait threshold to max (HW bug under stress workaround). */
8087 IWN_SETBITS(sc, IWN_DBG_HPET_MEM, 0xffff0000);
8089 /* Enable HAP INTA to move adapter from L1a to L0s. */
8090 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_HAP_WAKE_L1A);
8092 /* Retrieve PCIe Active State Power Management (ASPM). */
8093 reg = pci_read_config(sc->sc_dev, sc->sc_cap_off + 0x10, 1);
8094 /* Workaround for HW instability in PCIe L0->L0s->L1 transition. */
8095 if (reg & 0x02) /* L1 Entry enabled. */
8096 IWN_SETBITS(sc, IWN_GIO, IWN_GIO_L0S_ENA);
8098 IWN_CLRBITS(sc, IWN_GIO, IWN_GIO_L0S_ENA);
8100 if (sc->base_params->pll_cfg_val)
8101 IWN_SETBITS(sc, IWN_ANA_PLL, sc->base_params->pll_cfg_val);
8103 /* Wait for clock stabilization before accessing prph. */
8104 if ((error = iwn_clock_wait(sc)) != 0)
8107 if ((error = iwn_nic_lock(sc)) != 0)
8109 if (sc->hw_type == IWN_HW_REV_TYPE_4965) {
8110 /* Enable DMA and BSM (Bootstrap State Machine). */
8111 iwn_prph_write(sc, IWN_APMG_CLK_EN,
8112 IWN_APMG_CLK_CTRL_DMA_CLK_RQT |
8113 IWN_APMG_CLK_CTRL_BSM_CLK_RQT);
8116 iwn_prph_write(sc, IWN_APMG_CLK_EN,
8117 IWN_APMG_CLK_CTRL_DMA_CLK_RQT);
8120 /* Disable L1-Active. */
8121 iwn_prph_setbits(sc, IWN_APMG_PCI_STT, IWN_APMG_PCI_STT_L1A_DIS);
8128 iwn_apm_stop_master(struct iwn_softc *sc)
8132 /* Stop busmaster DMA activity. */
8133 IWN_SETBITS(sc, IWN_RESET, IWN_RESET_STOP_MASTER);
8134 for (ntries = 0; ntries < 100; ntries++) {
8135 if (IWN_READ(sc, IWN_RESET) & IWN_RESET_MASTER_DISABLED)
8139 device_printf(sc->sc_dev, "%s: timeout waiting for master\n", __func__);
8143 iwn_apm_stop(struct iwn_softc *sc)
8145 iwn_apm_stop_master(sc);
8147 /* Reset the entire device. */
8148 IWN_SETBITS(sc, IWN_RESET, IWN_RESET_SW);
8150 /* Clear "initialization complete" bit. */
8151 IWN_CLRBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_INIT_DONE);
8155 iwn4965_nic_config(struct iwn_softc *sc)
8157 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8159 if (IWN_RFCFG_TYPE(sc->rfcfg) == 1) {
8161 * I don't believe this to be correct but this is what the
8162 * vendor driver is doing. Probably the bits should not be
8163 * shifted in IWN_RFCFG_*.
8165 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8166 IWN_RFCFG_TYPE(sc->rfcfg) |
8167 IWN_RFCFG_STEP(sc->rfcfg) |
8168 IWN_RFCFG_DASH(sc->rfcfg));
8170 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8171 IWN_HW_IF_CONFIG_RADIO_SI | IWN_HW_IF_CONFIG_MAC_SI);
8176 iwn5000_nic_config(struct iwn_softc *sc)
8181 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8183 if (IWN_RFCFG_TYPE(sc->rfcfg) < 3) {
8184 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8185 IWN_RFCFG_TYPE(sc->rfcfg) |
8186 IWN_RFCFG_STEP(sc->rfcfg) |
8187 IWN_RFCFG_DASH(sc->rfcfg));
8189 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8190 IWN_HW_IF_CONFIG_RADIO_SI | IWN_HW_IF_CONFIG_MAC_SI);
8192 if ((error = iwn_nic_lock(sc)) != 0)
8194 iwn_prph_setbits(sc, IWN_APMG_PS, IWN_APMG_PS_EARLY_PWROFF_DIS);
8196 if (sc->hw_type == IWN_HW_REV_TYPE_1000) {
8198 * Select first Switching Voltage Regulator (1.32V) to
8199 * solve a stability issue related to noisy DC2DC line
8200 * in the silicon of 1000 Series.
8202 tmp = iwn_prph_read(sc, IWN_APMG_DIGITAL_SVR);
8203 tmp &= ~IWN_APMG_DIGITAL_SVR_VOLTAGE_MASK;
8204 tmp |= IWN_APMG_DIGITAL_SVR_VOLTAGE_1_32;
8205 iwn_prph_write(sc, IWN_APMG_DIGITAL_SVR, tmp);
8209 if (sc->sc_flags & IWN_FLAG_INTERNAL_PA) {
8210 /* Use internal power amplifier only. */
8211 IWN_WRITE(sc, IWN_GP_DRIVER, IWN_GP_DRIVER_RADIO_2X2_IPA);
8213 if (sc->base_params->additional_nic_config && sc->calib_ver >= 6) {
8214 /* Indicate that ROM calibration version is >=6. */
8215 IWN_SETBITS(sc, IWN_GP_DRIVER, IWN_GP_DRIVER_CALIB_VER6);
8217 if (sc->base_params->additional_gp_drv_bit)
8218 IWN_SETBITS(sc, IWN_GP_DRIVER,
8219 sc->base_params->additional_gp_drv_bit);
8224 * Take NIC ownership over Intel Active Management Technology (AMT).
8227 iwn_hw_prepare(struct iwn_softc *sc)
8231 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8233 /* Check if hardware is ready. */
8234 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_NIC_READY);
8235 for (ntries = 0; ntries < 5; ntries++) {
8236 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
8237 IWN_HW_IF_CONFIG_NIC_READY)
8242 /* Hardware not ready, force into ready state. */
8243 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_PREPARE);
8244 for (ntries = 0; ntries < 15000; ntries++) {
8245 if (!(IWN_READ(sc, IWN_HW_IF_CONFIG) &
8246 IWN_HW_IF_CONFIG_PREPARE_DONE))
8250 if (ntries == 15000)
8253 /* Hardware should be ready now. */
8254 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_NIC_READY);
8255 for (ntries = 0; ntries < 5; ntries++) {
8256 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
8257 IWN_HW_IF_CONFIG_NIC_READY)
8265 iwn_hw_init(struct iwn_softc *sc)
8267 struct iwn_ops *ops = &sc->ops;
8268 int error, chnl, qid;
8270 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
8272 /* Clear pending interrupts. */
8273 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8275 if ((error = iwn_apm_init(sc)) != 0) {
8276 device_printf(sc->sc_dev,
8277 "%s: could not power ON adapter, error %d\n", __func__,
8282 /* Select VMAIN power source. */
8283 if ((error = iwn_nic_lock(sc)) != 0)
8285 iwn_prph_clrbits(sc, IWN_APMG_PS, IWN_APMG_PS_PWR_SRC_MASK);
8288 /* Perform adapter-specific initialization. */
8289 if ((error = ops->nic_config(sc)) != 0)
8292 /* Initialize RX ring. */
8293 if ((error = iwn_nic_lock(sc)) != 0)
8295 IWN_WRITE(sc, IWN_FH_RX_CONFIG, 0);
8296 IWN_WRITE(sc, IWN_FH_RX_WPTR, 0);
8297 /* Set physical address of RX ring (256-byte aligned). */
8298 IWN_WRITE(sc, IWN_FH_RX_BASE, sc->rxq.desc_dma.paddr >> 8);
8299 /* Set physical address of RX status (16-byte aligned). */
8300 IWN_WRITE(sc, IWN_FH_STATUS_WPTR, sc->rxq.stat_dma.paddr >> 4);
8302 IWN_WRITE(sc, IWN_FH_RX_CONFIG,
8303 IWN_FH_RX_CONFIG_ENA |
8304 IWN_FH_RX_CONFIG_IGN_RXF_EMPTY | /* HW bug workaround */
8305 IWN_FH_RX_CONFIG_IRQ_DST_HOST |
8306 IWN_FH_RX_CONFIG_SINGLE_FRAME |
8307 IWN_FH_RX_CONFIG_RB_TIMEOUT(0) |
8308 IWN_FH_RX_CONFIG_NRBD(IWN_RX_RING_COUNT_LOG));
8310 IWN_WRITE(sc, IWN_FH_RX_WPTR, (IWN_RX_RING_COUNT - 1) & ~7);
8312 if ((error = iwn_nic_lock(sc)) != 0)
8315 /* Initialize TX scheduler. */
8316 iwn_prph_write(sc, sc->sched_txfact_addr, 0);
8318 /* Set physical address of "keep warm" page (16-byte aligned). */
8319 IWN_WRITE(sc, IWN_FH_KW_ADDR, sc->kw_dma.paddr >> 4);
8321 /* Initialize TX rings. */
8322 for (qid = 0; qid < sc->ntxqs; qid++) {
8323 struct iwn_tx_ring *txq = &sc->txq[qid];
8325 /* Set physical address of TX ring (256-byte aligned). */
8326 IWN_WRITE(sc, IWN_FH_CBBC_QUEUE(qid),
8327 txq->desc_dma.paddr >> 8);
8331 /* Enable DMA channels. */
8332 for (chnl = 0; chnl < sc->ndmachnls; chnl++) {
8333 IWN_WRITE(sc, IWN_FH_TX_CONFIG(chnl),
8334 IWN_FH_TX_CONFIG_DMA_ENA |
8335 IWN_FH_TX_CONFIG_DMA_CREDIT_ENA);
8338 /* Clear "radio off" and "commands blocked" bits. */
8339 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
8340 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_CMD_BLOCKED);
8342 /* Clear pending interrupts. */
8343 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8344 /* Enable interrupt coalescing. */
8345 IWN_WRITE(sc, IWN_INT_COALESCING, 512 / 8);
8346 /* Enable interrupts. */
8347 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
8349 /* _Really_ make sure "radio off" bit is cleared! */
8350 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
8351 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
8353 /* Enable shadow registers. */
8354 if (sc->base_params->shadow_reg_enable)
8355 IWN_SETBITS(sc, IWN_SHADOW_REG_CTRL, 0x800fffff);
8357 if ((error = ops->load_firmware(sc)) != 0) {
8358 device_printf(sc->sc_dev,
8359 "%s: could not load firmware, error %d\n", __func__,
8363 /* Wait at most one second for firmware alive notification. */
8364 if ((error = zsleep(sc, &wlan_global_serializer, 0, "iwninit", hz)) != 0) {
8365 device_printf(sc->sc_dev,
8366 "%s: timeout waiting for adapter to initialize, error %d\n",
8370 /* Do post-firmware initialization. */
8372 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
8374 return ops->post_alive(sc);
8378 iwn_hw_stop(struct iwn_softc *sc)
8380 int chnl, qid, ntries;
8382 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8384 IWN_WRITE(sc, IWN_RESET, IWN_RESET_NEVO);
8386 /* Disable interrupts. */
8387 IWN_WRITE(sc, IWN_INT_MASK, 0);
8388 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8389 IWN_WRITE(sc, IWN_FH_INT, 0xffffffff);
8390 sc->sc_flags &= ~IWN_FLAG_USE_ICT;
8392 /* Make sure we no longer hold the NIC lock. */
8395 /* Stop TX scheduler. */
8396 iwn_prph_write(sc, sc->sched_txfact_addr, 0);
8398 /* Stop all DMA channels. */
8399 if (iwn_nic_lock(sc) == 0) {
8400 for (chnl = 0; chnl < sc->ndmachnls; chnl++) {
8401 IWN_WRITE(sc, IWN_FH_TX_CONFIG(chnl), 0);
8402 for (ntries = 0; ntries < 200; ntries++) {
8403 if (IWN_READ(sc, IWN_FH_TX_STATUS) &
8404 IWN_FH_TX_STATUS_IDLE(chnl))
8413 iwn_reset_rx_ring(sc, &sc->rxq);
8415 /* Reset all TX rings. */
8416 for (qid = 0; qid < sc->ntxqs; qid++)
8417 iwn_reset_tx_ring(sc, &sc->txq[qid]);
8419 if (iwn_nic_lock(sc) == 0) {
8420 iwn_prph_write(sc, IWN_APMG_CLK_DIS,
8421 IWN_APMG_CLK_CTRL_DMA_CLK_RQT);
8425 /* Power OFF adapter. */
8430 iwn_radio_on_task(void *arg0, int pending)
8432 struct iwn_softc *sc = arg0;
8434 struct ieee80211com *ic;
8435 struct ieee80211vap *vap;
8437 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8439 wlan_serialize_enter();
8442 vap = TAILQ_FIRST(&ic->ic_vaps);
8444 iwn_init_locked(sc);
8445 ieee80211_init(vap);
8447 wlan_serialize_exit();
8451 iwn_radio_off_task(void *arg0, int pending)
8453 struct iwn_softc *sc = arg0;
8455 struct ieee80211com *ic;
8456 struct ieee80211vap *vap;
8458 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8460 wlan_serialize_enter();
8463 vap = TAILQ_FIRST(&ic->ic_vaps);
8464 iwn_stop_locked(sc);
8466 ieee80211_stop(vap);
8468 /* Enable interrupts to get RF toggle notification. */
8469 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8470 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
8471 wlan_serialize_exit();
8475 iwn_panicked_task(void *arg0, int pending)
8477 struct iwn_softc *sc = arg0;
8478 struct ifnet *ifp = sc->sc_ifp;
8479 struct ieee80211com *ic = ifp->if_l2com;
8480 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
8484 kprintf("%s: null vap\n", __func__);
8488 device_printf(sc->sc_dev, "%s: controller panicked, iv_state = %d; "
8489 "resetting...\n", __func__, vap->iv_state);
8491 wlan_serialize_enter();
8493 iwn_stop_locked(sc);
8494 iwn_init_locked(sc);
8495 if (vap->iv_state >= IEEE80211_S_AUTH &&
8496 (error = iwn_auth(sc, vap)) != 0) {
8497 device_printf(sc->sc_dev,
8498 "%s: could not move to auth state\n", __func__);
8500 if (vap->iv_state >= IEEE80211_S_RUN &&
8501 (error = iwn_run(sc, vap)) != 0) {
8502 device_printf(sc->sc_dev,
8503 "%s: could not move to run state\n", __func__);
8506 /* Only run start once the NIC is in a useful state, like associated */
8507 iwn_start_locked(sc->sc_ifp);
8509 wlan_serialize_exit();
8513 iwn_init_locked(struct iwn_softc *sc)
8515 struct ifnet *ifp = sc->sc_ifp;
8518 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
8521 * Make sure we hold the serializer or we will have timing issues
8522 * with the wlan subsystem.
8524 wlan_assert_serialized();
8525 if ((error = iwn_hw_prepare(sc)) != 0) {
8526 device_printf(sc->sc_dev, "%s: hardware not ready, error %d\n",
8531 /* Initialize interrupt mask to default value. */
8532 sc->int_mask = IWN_INT_MASK_DEF;
8533 sc->sc_flags &= ~IWN_FLAG_USE_ICT;
8535 /* Check that the radio is not disabled by hardware switch. */
8536 if (!(IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_RFKILL)) {
8537 device_printf(sc->sc_dev,
8538 "radio is disabled by hardware switch\n");
8539 /* Enable interrupts to get RF toggle notifications. */
8540 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8541 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
8545 /* Read firmware images from the filesystem. */
8546 if ((error = iwn_read_firmware(sc)) != 0) {
8547 device_printf(sc->sc_dev,
8548 "%s: could not read firmware, error %d\n", __func__,
8553 /* Initialize hardware and upload firmware. */
8554 error = iwn_hw_init(sc);
8555 firmware_put(sc->fw_fp, FIRMWARE_UNLOAD);
8558 device_printf(sc->sc_dev,
8559 "%s: could not initialize hardware, error %d\n", __func__,
8564 /* Configure adapter now that it is ready. */
8565 if ((error = iwn_config(sc)) != 0) {
8566 device_printf(sc->sc_dev,
8567 "%s: could not configure device, error %d\n", __func__,
8572 ifq_clr_oactive(&ifp->if_snd);
8573 ifp->if_flags |= IFF_RUNNING;
8575 callout_reset(&sc->watchdog_to, hz, iwn_watchdog_timeout, sc);
8577 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
8581 fail: iwn_stop_locked(sc);
8582 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__);
8588 struct iwn_softc *sc = arg;
8589 struct ifnet *ifp = sc->sc_ifp;
8590 struct ieee80211com *ic = ifp->if_l2com;
8592 wlan_assert_serialized();
8593 iwn_init_locked(sc);
8595 if (ifp->if_flags & IFF_RUNNING)
8596 ieee80211_start_all(ic);
8600 iwn_stop_locked(struct iwn_softc *sc)
8602 struct ifnet *ifp = sc->sc_ifp;
8604 sc->sc_is_scanning = 0;
8605 sc->sc_tx_timer = 0;
8606 callout_stop(&sc->watchdog_to);
8607 callout_stop(&sc->calib_to);
8608 ifp->if_flags &= ~IFF_RUNNING;
8609 ifq_clr_oactive(&ifp->if_snd);
8611 /* Power OFF hardware. */
8616 * Callback from net80211 to start a scan.
8619 iwn_scan_start(struct ieee80211com *ic)
8621 struct ifnet *ifp = ic->ic_ifp;
8622 struct iwn_softc *sc = ifp->if_softc;
8624 /* make the link LED blink while we're scanning */
8625 iwn_set_led(sc, IWN_LED_LINK, 20, 2);
8629 * Callback from net80211 to terminate a scan.
8632 iwn_scan_end(struct ieee80211com *ic)
8634 struct ifnet *ifp = ic->ic_ifp;
8635 struct iwn_softc *sc = ifp->if_softc;
8636 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
8638 if (vap->iv_state == IEEE80211_S_RUN) {
8639 /* Set link LED to ON status if we are associated */
8640 iwn_set_led(sc, IWN_LED_LINK, 0, 1);
8645 * Callback from net80211 to force a channel change.
8648 iwn_set_channel(struct ieee80211com *ic)
8650 const struct ieee80211_channel *c = ic->ic_curchan;
8651 struct ifnet *ifp = ic->ic_ifp;
8652 struct iwn_softc *sc = ifp->if_softc;
8655 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8657 sc->sc_rxtap.wr_chan_freq = htole16(c->ic_freq);
8658 sc->sc_rxtap.wr_chan_flags = htole16(c->ic_flags);
8659 sc->sc_txtap.wt_chan_freq = htole16(c->ic_freq);
8660 sc->sc_txtap.wt_chan_flags = htole16(c->ic_flags);
8663 * Only need to set the channel in Monitor mode. AP scanning and auth
8664 * are already taken care of by their respective firmware commands.
8666 if (ic->ic_opmode == IEEE80211_M_MONITOR) {
8667 error = iwn_config(sc);
8669 device_printf(sc->sc_dev,
8670 "%s: error %d settting channel\n", __func__, error);
8675 * Callback from net80211 to start scanning of the current channel.
8678 iwn_scan_curchan(struct ieee80211_scan_state *ss, unsigned long maxdwell)
8680 struct ieee80211vap *vap = ss->ss_vap;
8681 struct iwn_softc *sc = vap->iv_ic->ic_ifp->if_softc;
8682 struct ieee80211com *ic = vap->iv_ic;
8685 error = iwn_scan(sc, vap, ss, ic->ic_curchan);
8687 ieee80211_cancel_scan(vap);
8691 * Callback from net80211 to handle the minimum dwell time being met.
8692 * The intent is to terminate the scan but we just let the firmware
8693 * notify us when it's finished as we have no safe way to abort it.
8696 iwn_scan_mindwell(struct ieee80211_scan_state *ss)
8698 /* NB: don't try to abort scan; wait for firmware to finish */
8702 iwn_hw_reset_task(void *arg0, int pending)
8704 struct iwn_softc *sc = arg0;
8706 struct ieee80211com *ic;
8708 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8710 wlan_serialize_enter();
8713 iwn_stop_locked(sc);
8714 iwn_init_locked(sc);
8715 ieee80211_notify_radio(ic, 1);
8716 wlan_serialize_exit();
8719 #define IWN_DESC(x) case x: return #x
8720 #define COUNTOF(array) (sizeof(array) / sizeof(array[0]))
8723 * Translate CSR code to string
8725 static char *iwn_get_csr_string(int csr)
8728 IWN_DESC(IWN_HW_IF_CONFIG);
8729 IWN_DESC(IWN_INT_COALESCING);
8731 IWN_DESC(IWN_INT_MASK);
8732 IWN_DESC(IWN_FH_INT);
8733 IWN_DESC(IWN_GPIO_IN);
8734 IWN_DESC(IWN_RESET);
8735 IWN_DESC(IWN_GP_CNTRL);
8736 IWN_DESC(IWN_HW_REV);
8737 IWN_DESC(IWN_EEPROM);
8738 IWN_DESC(IWN_EEPROM_GP);
8739 IWN_DESC(IWN_OTP_GP);
8741 IWN_DESC(IWN_GP_UCODE);
8742 IWN_DESC(IWN_GP_DRIVER);
8743 IWN_DESC(IWN_UCODE_GP1);
8744 IWN_DESC(IWN_UCODE_GP2);
8746 IWN_DESC(IWN_DRAM_INT_TBL);
8747 IWN_DESC(IWN_GIO_CHICKEN);
8748 IWN_DESC(IWN_ANA_PLL);
8749 IWN_DESC(IWN_HW_REV_WA);
8750 IWN_DESC(IWN_DBG_HPET_MEM);
8752 return "UNKNOWN CSR";
8757 * This function print firmware register
8760 iwn_debug_register(struct iwn_softc *sc)
8763 static const uint32_t csr_tbl[] = {
8788 DPRINTF(sc, IWN_DEBUG_REGISTER,
8789 "CSR values: (2nd byte of IWN_INT_COALESCING is IWN_INT_PERIODIC)%s",
8791 for (i = 0; i < COUNTOF(csr_tbl); i++){
8792 DPRINTF(sc, IWN_DEBUG_REGISTER," %10s: 0x%08x ",
8793 iwn_get_csr_string(csr_tbl[i]), IWN_READ(sc, csr_tbl[i]));
8795 DPRINTF(sc, IWN_DEBUG_REGISTER,"%s","\n");
8797 DPRINTF(sc, IWN_DEBUG_REGISTER,"%s","\n");