2 * Copyright (c) 2011 The FreeBSD Foundation
3 * Copyright (c) 2015 François Tigeot
6 * This software was developed by Konstantin Belousov under sponsorship from
7 * the FreeBSD Foundation.
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 #ifndef AGP_AGP_I810_H
32 #define AGP_AGP_I810_H
34 #include <sys/param.h>
35 #include <sys/sglist.h>
38 #include <vm/vm_page.h>
40 #include <linux/types.h>
42 /* Special gtt memory types */
43 #define AGP_DCACHE_MEMORY 1
44 #define AGP_PHYS_MEMORY 2
46 /* New caching attributes for gen6/sandybridge */
47 #define AGP_USER_CACHED_MEMORY_LLC_MLC (AGP_USER_TYPES + 2)
48 #define AGP_USER_UNCACHED_MEMORY (AGP_USER_TYPES + 4)
50 /* flag for GFDT type */
51 #define AGP_USER_CACHED_MEMORY_GFDT (1 << 3)
54 /* Size of memory reserved for graphics by the BIOS */
56 /* Total number of gtt entries. */
57 u_int gtt_total_entries;
58 /* Part of the gtt that is mappable by the cpu, for those chips where
59 * this is not the full gtt. */
60 u_int gtt_mappable_entries;
61 /* Whether we idle the gpu before mapping/unmapping */
62 unsigned int do_idle_maps : 1;
63 /* Share the scratch page dma with ppgtts. */
64 vm_paddr_t scratch_page_dma;
65 struct vm_page *scratch_page;
66 /* for ppgtt PDE access */
68 /* needed for ioremap in drm/i915 */
69 bus_addr_t gma_bus_addr;
72 struct intel_gtt agp_intel_gtt_get(device_t dev);
73 int agp_intel_gtt_chipset_flush(device_t dev);
74 void agp_intel_gtt_unmap_memory(device_t dev, struct sglist *sg_list);
75 void agp_intel_gtt_clear_range(device_t dev, u_int first_entry,
77 int agp_intel_gtt_map_memory(device_t dev, vm_page_t *pages, u_int num_entries,
78 struct sglist **sg_list);
79 void agp_intel_gtt_insert_sg_entries(device_t dev, struct sglist *sg_list,
80 u_int pg_start, u_int flags);
81 void agp_intel_gtt_insert_pages(device_t dev, u_int first_entry,
82 u_int num_entries, vm_page_t *pages, u_int flags);
84 void intel_gtt_get(size_t *gtt_total, size_t *stolen_size,
85 phys_addr_t *mappable_base, unsigned long *mappable_end);
87 int intel_gtt_chipset_flush(void);
88 void intel_gtt_unmap_memory(struct sglist *sg_list);
89 void intel_gtt_clear_range(u_int first_entry, u_int num_entries);
90 int intel_gtt_map_memory(vm_page_t *pages, u_int num_entries,
91 struct sglist **sg_list);
92 void intel_gtt_insert_sg_entries(struct sglist *sg_list, u_int pg_start,
94 void intel_gtt_insert_pages(u_int first_entry, u_int num_entries,
95 vm_page_t *pages, u_int flags);
96 void intel_gtt_sync_pte(u_int entry);
97 void intel_gtt_write(u_int entry, uint32_t val);
99 static inline void intel_gmch_remove(void)