2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification.
11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
13 * redistribution must be conditioned upon including a substantially
14 * similar Disclaimer requirement for further binary redistribution.
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
27 * THE POSSIBILITY OF SUCH DAMAGES.
29 * $FreeBSD: head/sys/dev/ath/if_ath.c 203751 2010-02-10 11:12:39Z rpaulo $");
33 * Driver for the Atheros Wireless LAN controller.
35 * This software is derived from work of Atsushi Onoe; his contribution
36 * is greatly appreciated.
43 #include <sys/param.h>
44 #include <sys/systm.h>
45 #include <sys/sysctl.h>
47 #include <sys/malloc.h>
49 #include <sys/mutex.h>
50 #include <sys/kernel.h>
51 #include <sys/socket.h>
52 #include <sys/sockio.h>
53 #include <sys/errno.h>
54 #include <sys/callout.h>
56 #include <sys/endian.h>
57 #include <sys/kthread.h>
58 #include <sys/taskqueue.h>
62 #include <net/if_dl.h>
63 #include <net/if_media.h>
64 #include <net/if_types.h>
65 #include <net/if_arp.h>
66 #include <net/if_llc.h>
67 #include <net/ifq_var.h>
69 #include <netproto/802_11/ieee80211_var.h>
70 #include <netproto/802_11/ieee80211_regdomain.h>
71 #ifdef IEEE80211_SUPPORT_SUPERG
72 #include <netproto/802_11/ieee80211_superg.h>
74 #ifdef IEEE80211_SUPPORT_TDMA
75 #include <netproto/802_11/ieee80211_tdma.h>
81 #include <netinet/in.h>
82 #include <netinet/if_ether.h>
85 #include <dev/netif/ath/ath/if_athvar.h>
86 #include <dev/netif/ath/hal/ath_hal/ah_devid.h> /* XXX for softled */
89 #include <dev/netif/ath_tx99/ath_tx99.h>
93 * ATH_BCBUF determines the number of vap's that can transmit
94 * beacons and also (currently) the number of vap's that can
95 * have unique mac addresses/bssid. When staggering beacons
96 * 4 is probably a good max as otherwise the beacons become
97 * very closely spaced and there is limited time for cab q traffic
98 * to go out. You can burst beacons instead but that is not good
99 * for stations in power save and at some point you really want
100 * another radio (and channel).
102 * The limit on the number of mac addresses is tied to our use of
103 * the U/L bit and tracking addresses in a byte; it would be
104 * worthwhile to allow more for applications like proxy sta.
106 CTASSERT(ATH_BCBUF <= 8);
108 /* unaligned little endian access */
109 #define LE_READ_2(p) \
111 ((((u_int8_t *)(p))[0] ) | (((u_int8_t *)(p))[1] << 8)))
112 #define LE_READ_4(p) \
114 ((((u_int8_t *)(p))[0] ) | (((u_int8_t *)(p))[1] << 8) | \
115 (((u_int8_t *)(p))[2] << 16) | (((u_int8_t *)(p))[3] << 24)))
117 static struct ieee80211vap *ath_vap_create(struct ieee80211com *,
118 const char name[IFNAMSIZ], int unit, int opmode,
119 int flags, const uint8_t bssid[IEEE80211_ADDR_LEN],
120 const uint8_t mac[IEEE80211_ADDR_LEN]);
121 static void ath_vap_delete(struct ieee80211vap *);
122 static void ath_init(void *);
123 static void ath_stop_locked(struct ifnet *);
124 static void ath_stop(struct ifnet *);
125 static void ath_start(struct ifnet *, struct ifaltq_subque *);
126 static int ath_reset(struct ifnet *);
127 static int ath_reset_vap(struct ieee80211vap *, u_long);
128 static int ath_media_change(struct ifnet *);
129 static void ath_watchdog_callout(void *);
130 static int ath_ioctl(struct ifnet *, u_long, caddr_t, struct ucred *);
131 static void ath_fatal_proc(void *, int);
132 static void ath_bmiss_vap(struct ieee80211vap *);
133 static void ath_bmiss_task(void *, int);
134 static int ath_keyset(struct ath_softc *, const struct ieee80211_key *,
135 struct ieee80211_node *);
136 static int ath_key_alloc(struct ieee80211vap *,
137 struct ieee80211_key *,
138 ieee80211_keyix *, ieee80211_keyix *);
139 static int ath_key_delete(struct ieee80211vap *,
140 const struct ieee80211_key *);
141 static int ath_key_set(struct ieee80211vap *, const struct ieee80211_key *,
142 const u_int8_t mac[IEEE80211_ADDR_LEN]);
143 static void ath_key_update_begin(struct ieee80211vap *);
144 static void ath_key_update_end(struct ieee80211vap *);
145 static void ath_update_mcast(struct ifnet *);
146 static void ath_update_promisc(struct ifnet *);
147 static void ath_mode_init(struct ath_softc *);
148 static void ath_setslottime(struct ath_softc *);
149 static void ath_updateslot(struct ifnet *);
150 static int ath_beaconq_setup(struct ath_hal *);
151 static int ath_beacon_alloc(struct ath_softc *, struct ieee80211_node *);
152 static void ath_beacon_update(struct ieee80211vap *, int item);
153 static void ath_beacon_setup(struct ath_softc *, struct ath_buf *);
154 static void ath_beacon_proc(void *, int);
155 static struct ath_buf *ath_beacon_generate(struct ath_softc *,
156 struct ieee80211vap *);
157 static void ath_bstuck_task(void *, int);
158 static void ath_beacon_return(struct ath_softc *, struct ath_buf *);
159 static void ath_beacon_free(struct ath_softc *);
160 static void ath_beacon_config(struct ath_softc *, struct ieee80211vap *);
161 static void ath_descdma_cleanup(struct ath_softc *sc,
162 struct ath_descdma *, ath_bufhead *);
163 static int ath_desc_alloc(struct ath_softc *);
164 static void ath_desc_free(struct ath_softc *);
165 static struct ieee80211_node *ath_node_alloc(struct ieee80211vap *,
166 const uint8_t [IEEE80211_ADDR_LEN]);
167 static void ath_node_free(struct ieee80211_node *);
168 static void ath_node_getsignal(const struct ieee80211_node *,
170 static int ath_rxbuf_init(struct ath_softc *, struct ath_buf *);
171 static void ath_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m,
172 int subtype, int rssi, int nf);
173 static void ath_setdefantenna(struct ath_softc *, u_int);
174 static void ath_rx_task(void *, int);
175 static void ath_txq_init(struct ath_softc *sc, struct ath_txq *, int);
176 static struct ath_txq *ath_txq_setup(struct ath_softc*, int qtype, int subtype);
177 static int ath_tx_setup(struct ath_softc *, int, int);
178 static int ath_wme_update(struct ieee80211com *);
179 static void ath_tx_cleanupq(struct ath_softc *, struct ath_txq *);
180 static void ath_tx_cleanup(struct ath_softc *);
181 static void ath_freetx(struct mbuf *);
182 static int ath_tx_start(struct ath_softc *, struct ieee80211_node *,
183 struct ath_buf *, struct mbuf *);
184 static void ath_tx_task_q0(void *, int);
185 static void ath_tx_task_q0123(void *, int);
186 static void ath_tx_task(void *, int);
187 static void ath_tx_draintxq(struct ath_softc *, struct ath_txq *);
188 static int ath_chan_set(struct ath_softc *, struct ieee80211_channel *);
189 static void ath_draintxq(struct ath_softc *);
190 static void ath_stoprecv(struct ath_softc *);
191 static int ath_startrecv(struct ath_softc *);
192 static void ath_chan_change(struct ath_softc *, struct ieee80211_channel *);
193 static void ath_scan_start(struct ieee80211com *);
194 static void ath_scan_end(struct ieee80211com *);
195 static void ath_set_channel(struct ieee80211com *);
196 static void ath_calibrate_callout(void *);
197 static int ath_newstate(struct ieee80211vap *, enum ieee80211_state, int);
198 static void ath_setup_stationkey(struct ieee80211_node *);
199 static void ath_newassoc(struct ieee80211_node *, int);
200 static int ath_setregdomain(struct ieee80211com *,
201 struct ieee80211_regdomain *, int,
202 struct ieee80211_channel []);
203 static void ath_getradiocaps(struct ieee80211com *, int, int *,
204 struct ieee80211_channel []);
205 static int ath_getchannels(struct ath_softc *);
206 static void ath_led_event(struct ath_softc *, int);
208 static int ath_rate_setup(struct ath_softc *, u_int mode);
209 static void ath_setcurmode(struct ath_softc *, enum ieee80211_phymode);
211 static void ath_sysctlattach(struct ath_softc *);
212 static int ath_raw_xmit(struct ieee80211_node *,
213 struct mbuf *, const struct ieee80211_bpf_params *);
214 static void ath_announce(struct ath_softc *);
215 static void ath_sysctl_stats_attach(struct ath_softc *sc);
217 #ifdef IEEE80211_SUPPORT_TDMA
218 static void ath_tdma_settimers(struct ath_softc *sc, u_int32_t nexttbtt,
220 static void ath_tdma_bintvalsetup(struct ath_softc *sc,
221 const struct ieee80211_tdma_state *tdma);
222 static void ath_tdma_config(struct ath_softc *sc, struct ieee80211vap *vap);
223 static void ath_tdma_update(struct ieee80211_node *ni,
224 const struct ieee80211_tdma_param *tdma, int);
225 static void ath_tdma_beacon_send(struct ath_softc *sc,
226 struct ieee80211vap *vap);
229 ath_hal_setcca(struct ath_hal *ah, int ena)
232 * NB: fill me in; this is not provided by default because disabling
233 * CCA in most locales violates regulatory.
238 ath_hal_getcca(struct ath_hal *ah)
241 if (ath_hal_getcapability(ah, HAL_CAP_DIAG, 0, &diag) != HAL_OK)
243 return ((diag & 0x500000) == 0);
246 #define TDMA_EP_MULTIPLIER (1<<10) /* pow2 to optimize out * and / */
247 #define TDMA_LPF_LEN 6
248 #define TDMA_DUMMY_MARKER 0x127
249 #define TDMA_EP_MUL(x, mul) ((x) * (mul))
250 #define TDMA_IN(x) (TDMA_EP_MUL((x), TDMA_EP_MULTIPLIER))
251 #define TDMA_LPF(x, y, len) \
252 ((x != TDMA_DUMMY_MARKER) ? (((x) * ((len)-1) + (y)) / (len)) : (y))
253 #define TDMA_SAMPLE(x, y) do { \
254 x = TDMA_LPF((x), TDMA_IN(y), TDMA_LPF_LEN); \
256 #define TDMA_EP_RND(x,mul) \
257 ((((x)%(mul)) >= ((mul)/2)) ? ((x) + ((mul) - 1)) / (mul) : (x)/(mul))
258 #define TDMA_AVG(x) TDMA_EP_RND(x, TDMA_EP_MULTIPLIER)
259 #endif /* IEEE80211_SUPPORT_TDMA */
261 SYSCTL_DECL(_hw_ath);
263 /* XXX validate sysctl values */
264 static int ath_longcalinterval = 30; /* long cals every 30 secs */
265 SYSCTL_INT(_hw_ath, OID_AUTO, longcal, CTLFLAG_RW, &ath_longcalinterval,
266 0, "long chip calibration interval (secs)");
267 static int ath_shortcalinterval = 100; /* short cals every 100 ms */
268 SYSCTL_INT(_hw_ath, OID_AUTO, shortcal, CTLFLAG_RW, &ath_shortcalinterval,
269 0, "short chip calibration interval (msecs)");
270 static int ath_resetcalinterval = 20*60; /* reset cal state 20 mins */
271 SYSCTL_INT(_hw_ath, OID_AUTO, resetcal, CTLFLAG_RW, &ath_resetcalinterval,
272 0, "reset chip calibration results (secs)");
274 static int ath_rxbuf = ATH_RXBUF; /* # rx buffers to allocate */
275 SYSCTL_INT(_hw_ath, OID_AUTO, rxbuf, CTLFLAG_RW, &ath_rxbuf,
276 0, "rx buffers allocated");
277 TUNABLE_INT("hw.ath.rxbuf", &ath_rxbuf);
278 static int ath_txbuf = ATH_TXBUF; /* # tx buffers to allocate */
279 SYSCTL_INT(_hw_ath, OID_AUTO, txbuf, CTLFLAG_RW, &ath_txbuf,
280 0, "tx buffers allocated");
281 TUNABLE_INT("hw.ath.txbuf", &ath_txbuf);
283 static int ath_bstuck_threshold = 4; /* max missed beacons */
284 SYSCTL_INT(_hw_ath, OID_AUTO, bstuck, CTLFLAG_RW, &ath_bstuck_threshold,
285 0, "max missed beacon xmits before chip reset");
289 ATH_DEBUG_XMIT = 0x00000001, /* basic xmit operation */
290 ATH_DEBUG_XMIT_DESC = 0x00000002, /* xmit descriptors */
291 ATH_DEBUG_RECV = 0x00000004, /* basic recv operation */
292 ATH_DEBUG_RECV_DESC = 0x00000008, /* recv descriptors */
293 ATH_DEBUG_RATE = 0x00000010, /* rate control */
294 ATH_DEBUG_RESET = 0x00000020, /* reset processing */
295 ATH_DEBUG_MODE = 0x00000040, /* mode init/setup */
296 ATH_DEBUG_BEACON = 0x00000080, /* beacon handling */
297 ATH_DEBUG_WATCHDOG = 0x00000100, /* watchdog timeout */
298 ATH_DEBUG_INTR = 0x00001000, /* ISR */
299 ATH_DEBUG_TX_PROC = 0x00002000, /* tx ISR proc */
300 ATH_DEBUG_RX_PROC = 0x00004000, /* rx ISR proc */
301 ATH_DEBUG_BEACON_PROC = 0x00008000, /* beacon ISR proc */
302 ATH_DEBUG_CALIBRATE = 0x00010000, /* periodic calibration */
303 ATH_DEBUG_KEYCACHE = 0x00020000, /* key cache management */
304 ATH_DEBUG_STATE = 0x00040000, /* 802.11 state transitions */
305 ATH_DEBUG_NODE = 0x00080000, /* node management */
306 ATH_DEBUG_LED = 0x00100000, /* led management */
307 ATH_DEBUG_FF = 0x00200000, /* fast frames */
308 ATH_DEBUG_DFS = 0x00400000, /* DFS processing */
309 ATH_DEBUG_TDMA = 0x00800000, /* TDMA processing */
310 ATH_DEBUG_TDMA_TIMER = 0x01000000, /* TDMA timer processing */
311 ATH_DEBUG_REGDOMAIN = 0x02000000, /* regulatory processing */
312 ATH_DEBUG_FATAL = 0x80000000, /* fatal errors */
313 ATH_DEBUG_ANY = 0xffffffff
315 static int ath_debug = 0;
316 SYSCTL_INT(_hw_ath, OID_AUTO, debug, CTLFLAG_RW, &ath_debug,
317 0, "control debugging printfs");
318 TUNABLE_INT("hw.ath.debug", &ath_debug);
320 #define IFF_DUMPPKTS(sc, m) \
321 ((sc->sc_debug & (m)) || \
322 (sc->sc_ifp->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2))
323 #define DPRINTF(sc, m, fmt, ...) do { \
324 if (sc->sc_debug & (m)) \
325 kprintf(fmt, __VA_ARGS__); \
327 #define KEYPRINTF(sc, ix, hk, mac) do { \
328 if (sc->sc_debug & ATH_DEBUG_KEYCACHE) \
329 ath_keyprint(sc, __func__, ix, hk, mac); \
331 static void ath_printrxbuf(struct ath_softc *, const struct ath_buf *bf,
333 static void ath_printtxbuf(struct ath_softc *, const struct ath_buf *bf,
334 u_int qnum, u_int ix, int done);
336 #define IFF_DUMPPKTS(sc, m) \
337 ((sc->sc_ifp->if_flags & (IFF_DEBUG|IFF_LINK2)) == (IFF_DEBUG|IFF_LINK2))
338 #define DPRINTF(sc, m, fmt, ...) do { \
341 #define KEYPRINTF(sc, k, ix, mac) do { \
346 MALLOC_DEFINE(M_ATHDEV, "athdev", "ath driver dma buffers");
349 ath_attach(u_int16_t devid, struct ath_softc *sc)
352 struct ieee80211com *ic;
353 struct ath_hal *ah = NULL;
357 uint8_t macaddr[IEEE80211_ADDR_LEN];
359 DPRINTF(sc, ATH_DEBUG_ANY, "%s: devid 0x%x\n", __func__, devid);
361 ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211);
363 device_printf(sc->sc_dev, "can not if_alloc()\n");
369 /* set these up early for if_printf use */
370 if_initname(ifp, device_get_name(sc->sc_dev),
371 device_get_unit(sc->sc_dev));
373 /* prepare sysctl tree for use in sub modules */
374 sysctl_ctx_init(&sc->sc_sysctl_ctx);
375 sc->sc_sysctl_tree = SYSCTL_ADD_NODE(&sc->sc_sysctl_ctx,
376 SYSCTL_STATIC_CHILDREN(_hw),
378 device_get_nameunit(sc->sc_dev),
381 ah = ath_hal_attach(devid, sc, sc->sc_st, sc->sc_sh, &status);
383 if_printf(ifp, "unable to attach hardware; HAL status %u\n",
389 sc->sc_invalid = 0; /* ready to go, enable interrupt handling */
391 sc->sc_debug = ath_debug;
395 * Check if the MAC has multi-rate retry support.
396 * We do this by trying to setup a fake extended
397 * descriptor. MAC's that don't have support will
398 * return false w/o doing anything. MAC's that do
399 * support it will return true w/o doing anything.
401 sc->sc_mrretry = ath_hal_setupxtxdesc(ah, NULL, 0,0, 0,0, 0,0);
404 * Check if the device has hardware counters for PHY
405 * errors. If so we need to enable the MIB interrupt
406 * so we can act on stat triggers.
408 if (ath_hal_hwphycounters(ah))
412 * Get the hardware key cache size.
414 sc->sc_keymax = ath_hal_keycachesize(ah);
415 if (sc->sc_keymax > ATH_KEYMAX) {
416 if_printf(ifp, "Warning, using only %u of %u key cache slots\n",
417 ATH_KEYMAX, sc->sc_keymax);
418 sc->sc_keymax = ATH_KEYMAX;
421 * Reset the key cache since some parts do not
422 * reset the contents on initial power up.
424 for (i = 0; i < sc->sc_keymax; i++)
425 ath_hal_keyreset(ah, i);
428 * Collect the default channel list.
430 error = ath_getchannels(sc);
435 * Setup rate tables for all potential media types.
437 ath_rate_setup(sc, IEEE80211_MODE_11A);
438 ath_rate_setup(sc, IEEE80211_MODE_11B);
439 ath_rate_setup(sc, IEEE80211_MODE_11G);
440 ath_rate_setup(sc, IEEE80211_MODE_TURBO_A);
441 ath_rate_setup(sc, IEEE80211_MODE_TURBO_G);
442 ath_rate_setup(sc, IEEE80211_MODE_STURBO_A);
443 ath_rate_setup(sc, IEEE80211_MODE_11NA);
444 ath_rate_setup(sc, IEEE80211_MODE_11NG);
445 ath_rate_setup(sc, IEEE80211_MODE_HALF);
446 ath_rate_setup(sc, IEEE80211_MODE_QUARTER);
448 /* NB: setup here so ath_rate_update is happy */
449 ath_setcurmode(sc, IEEE80211_MODE_11A);
452 * Allocate tx+rx descriptors and populate the lists.
454 wlan_assert_serialized();
455 wlan_serialize_exit();
456 error = ath_desc_alloc(sc);
457 wlan_serialize_enter();
459 if_printf(ifp, "failed to allocate descriptors: %d\n", error);
462 callout_init(&sc->sc_cal_ch);
463 callout_init(&sc->sc_wd_ch);
465 sc->sc_tq = taskqueue_create("ath_taskq", M_INTWAIT,
466 taskqueue_thread_enqueue, &sc->sc_tq);
467 taskqueue_start_threads(&sc->sc_tq, 1, TDPRI_KERN_DAEMON, -1,
468 "%s taskq", ifp->if_xname);
470 TASK_INIT(&sc->sc_rxtask, 0, ath_rx_task, sc);
471 TASK_INIT(&sc->sc_bmisstask, 0, ath_bmiss_task, sc);
472 TASK_INIT(&sc->sc_bstucktask,0, ath_bstuck_task, sc);
475 * Allocate hardware transmit queues: one queue for
476 * beacon frames and one data queue for each QoS
477 * priority. Note that the hal handles reseting
478 * these queues at the needed time.
482 sc->sc_bhalq = ath_beaconq_setup(ah);
483 if (sc->sc_bhalq == (u_int) -1) {
484 if_printf(ifp, "unable to setup a beacon xmit queue!\n");
488 sc->sc_cabq = ath_txq_setup(sc, HAL_TX_QUEUE_CAB, 0);
489 if (sc->sc_cabq == NULL) {
490 if_printf(ifp, "unable to setup CAB xmit queue!\n");
494 /* NB: insure BK queue is the lowest priority h/w queue */
495 if (!ath_tx_setup(sc, WME_AC_BK, HAL_WME_AC_BK)) {
496 if_printf(ifp, "unable to setup xmit queue for %s traffic!\n",
497 ieee80211_wme_acnames[WME_AC_BK]);
501 if (!ath_tx_setup(sc, WME_AC_BE, HAL_WME_AC_BE) ||
502 !ath_tx_setup(sc, WME_AC_VI, HAL_WME_AC_VI) ||
503 !ath_tx_setup(sc, WME_AC_VO, HAL_WME_AC_VO)) {
505 * Not enough hardware tx queues to properly do WME;
506 * just punt and assign them all to the same h/w queue.
507 * We could do a better job of this if, for example,
508 * we allocate queues when we switch from station to
511 if (sc->sc_ac2q[WME_AC_VI] != NULL)
512 ath_tx_cleanupq(sc, sc->sc_ac2q[WME_AC_VI]);
513 if (sc->sc_ac2q[WME_AC_BE] != NULL)
514 ath_tx_cleanupq(sc, sc->sc_ac2q[WME_AC_BE]);
515 sc->sc_ac2q[WME_AC_BE] = sc->sc_ac2q[WME_AC_BK];
516 sc->sc_ac2q[WME_AC_VI] = sc->sc_ac2q[WME_AC_BK];
517 sc->sc_ac2q[WME_AC_VO] = sc->sc_ac2q[WME_AC_BK];
521 * Special case certain configurations. Note the
522 * CAB queue is handled by these specially so don't
523 * include them when checking the txq setup mask.
525 switch (sc->sc_txqsetup &~ (1<<sc->sc_cabq->axq_qnum)) {
527 TASK_INIT(&sc->sc_txtask, 0, ath_tx_task_q0, sc);
530 TASK_INIT(&sc->sc_txtask, 0, ath_tx_task_q0123, sc);
533 TASK_INIT(&sc->sc_txtask, 0, ath_tx_task, sc);
538 * Setup rate control. Some rate control modules
539 * call back to change the anntena state so expose
540 * the necessary entry points.
541 * XXX maybe belongs in struct ath_ratectrl?
543 sc->sc_setdefantenna = ath_setdefantenna;
544 sc->sc_rc = ath_rate_attach(sc);
545 if (sc->sc_rc == NULL) {
552 sc->sc_ledon = 0; /* low true */
553 sc->sc_ledidle = (2700*hz)/1000; /* 2.7sec */
554 callout_init_mp(&sc->sc_ledtimer);
556 * Auto-enable soft led processing for IBM cards and for
557 * 5211 minipci cards. Users can also manually enable/disable
558 * support with a sysctl.
560 sc->sc_softled = (devid == AR5212_DEVID_IBM || devid == AR5211_DEVID);
561 if (sc->sc_softled) {
562 ath_hal_gpioCfgOutput(ah, sc->sc_ledpin,
563 HAL_GPIO_MUX_MAC_NETWORK_LED);
564 ath_hal_gpioset(ah, sc->sc_ledpin, !sc->sc_ledon);
568 ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST;
569 ifp->if_start = ath_start;
570 ifp->if_ioctl = ath_ioctl;
571 ifp->if_init = ath_init;
572 ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN);
573 ifq_set_ready(&ifp->if_snd);
576 /* XXX not right but it's not used anywhere important */
577 ic->ic_phytype = IEEE80211_T_OFDM;
578 ic->ic_opmode = IEEE80211_M_STA;
580 IEEE80211_C_STA /* station mode */
581 | IEEE80211_C_IBSS /* ibss, nee adhoc, mode */
582 | IEEE80211_C_HOSTAP /* hostap mode */
583 | IEEE80211_C_MONITOR /* monitor mode */
584 | IEEE80211_C_AHDEMO /* adhoc demo mode */
585 | IEEE80211_C_WDS /* 4-address traffic works */
586 | IEEE80211_C_MBSS /* mesh point link mode */
587 | IEEE80211_C_SHPREAMBLE /* short preamble supported */
588 | IEEE80211_C_SHSLOT /* short slot time supported */
589 | IEEE80211_C_WPA /* capable of WPA1+WPA2 */
590 | IEEE80211_C_BGSCAN /* capable of bg scanning */
591 | IEEE80211_C_TXFRAG /* handle tx frags */
594 * Query the hal to figure out h/w crypto support.
596 if (ath_hal_ciphersupported(ah, HAL_CIPHER_WEP))
597 ic->ic_cryptocaps |= IEEE80211_CRYPTO_WEP;
598 if (ath_hal_ciphersupported(ah, HAL_CIPHER_AES_OCB))
599 ic->ic_cryptocaps |= IEEE80211_CRYPTO_AES_OCB;
600 if (ath_hal_ciphersupported(ah, HAL_CIPHER_AES_CCM))
601 ic->ic_cryptocaps |= IEEE80211_CRYPTO_AES_CCM;
602 if (ath_hal_ciphersupported(ah, HAL_CIPHER_CKIP))
603 ic->ic_cryptocaps |= IEEE80211_CRYPTO_CKIP;
604 if (ath_hal_ciphersupported(ah, HAL_CIPHER_TKIP)) {
605 ic->ic_cryptocaps |= IEEE80211_CRYPTO_TKIP;
607 * Check if h/w does the MIC and/or whether the
608 * separate key cache entries are required to
609 * handle both tx+rx MIC keys.
611 if (ath_hal_ciphersupported(ah, HAL_CIPHER_MIC))
612 ic->ic_cryptocaps |= IEEE80211_CRYPTO_TKIPMIC;
614 * If the h/w supports storing tx+rx MIC keys
615 * in one cache slot automatically enable use.
617 if (ath_hal_hastkipsplit(ah) ||
618 !ath_hal_settkipsplit(ah, AH_FALSE))
621 * If the h/w can do TKIP MIC together with WME then
622 * we use it; otherwise we force the MIC to be done
623 * in software by the net80211 layer.
625 if (ath_hal_haswmetkipmic(ah))
626 sc->sc_wmetkipmic = 1;
628 sc->sc_hasclrkey = ath_hal_ciphersupported(ah, HAL_CIPHER_CLR);
630 * Check for multicast key search support.
632 if (ath_hal_hasmcastkeysearch(sc->sc_ah) &&
633 !ath_hal_getmcastkeysearch(sc->sc_ah)) {
634 ath_hal_setmcastkeysearch(sc->sc_ah, 1);
636 sc->sc_mcastkey = ath_hal_getmcastkeysearch(ah);
638 * Mark key cache slots associated with global keys
639 * as in use. If we knew TKIP was not to be used we
640 * could leave the +32, +64, and +32+64 slots free.
642 for (i = 0; i < IEEE80211_WEP_NKID; i++) {
643 setbit(sc->sc_keymap, i);
644 setbit(sc->sc_keymap, i+64);
645 if (sc->sc_splitmic) {
646 setbit(sc->sc_keymap, i+32);
647 setbit(sc->sc_keymap, i+32+64);
651 * TPC support can be done either with a global cap or
652 * per-packet support. The latter is not available on
653 * all parts. We're a bit pedantic here as all parts
654 * support a global cap.
656 if (ath_hal_hastpc(ah) || ath_hal_hastxpowlimit(ah))
657 ic->ic_caps |= IEEE80211_C_TXPMGT;
660 * Mark WME capability only if we have sufficient
661 * hardware queues to do proper priority scheduling.
663 if (sc->sc_ac2q[WME_AC_BE] != sc->sc_ac2q[WME_AC_BK])
664 ic->ic_caps |= IEEE80211_C_WME;
666 * Check for misc other capabilities.
668 if (ath_hal_hasbursting(ah))
669 ic->ic_caps |= IEEE80211_C_BURST;
670 sc->sc_hasbmask = ath_hal_hasbssidmask(ah);
671 sc->sc_hasbmatch = ath_hal_hasbssidmatch(ah);
672 sc->sc_hastsfadd = ath_hal_hastsfadjust(ah);
673 if (ath_hal_hasfastframes(ah))
674 ic->ic_caps |= IEEE80211_C_FF;
675 wmodes = ath_hal_getwirelessmodes(ah);
676 if (wmodes & (HAL_MODE_108G|HAL_MODE_TURBO))
677 ic->ic_caps |= IEEE80211_C_TURBOP;
678 #ifdef IEEE80211_SUPPORT_TDMA
679 if (ath_hal_macversion(ah) > 0x78) {
680 ic->ic_caps |= IEEE80211_C_TDMA; /* capable of TDMA */
681 ic->ic_tdma_update = ath_tdma_update;
685 * Indicate we need the 802.11 header padded to a
686 * 32-bit boundary for 4-address and QoS frames.
688 ic->ic_flags |= IEEE80211_F_DATAPAD;
691 * Query the hal about antenna support.
693 sc->sc_defant = ath_hal_getdefantenna(ah);
696 * Not all chips have the VEOL support we want to
697 * use with IBSS beacons; check here for it.
699 sc->sc_hasveol = ath_hal_hasveol(ah);
701 /* get mac address from hardware */
702 ath_hal_getmac(ah, macaddr);
704 ath_hal_getbssidmask(ah, sc->sc_hwbssidmask);
706 /* NB: used to size node table key mapping array */
707 ic->ic_max_keyix = sc->sc_keymax;
708 /* call MI attach routine. */
709 ieee80211_ifattach(ic, macaddr);
710 ic->ic_setregdomain = ath_setregdomain;
711 ic->ic_getradiocaps = ath_getradiocaps;
712 sc->sc_opmode = HAL_M_STA;
714 /* override default methods */
715 ic->ic_newassoc = ath_newassoc;
716 ic->ic_updateslot = ath_updateslot;
717 ic->ic_wme.wme_update = ath_wme_update;
718 ic->ic_vap_create = ath_vap_create;
719 ic->ic_vap_delete = ath_vap_delete;
720 ic->ic_raw_xmit = ath_raw_xmit;
721 ic->ic_update_mcast = ath_update_mcast;
722 ic->ic_update_promisc = ath_update_promisc;
723 ic->ic_node_alloc = ath_node_alloc;
724 sc->sc_node_free = ic->ic_node_free;
725 ic->ic_node_free = ath_node_free;
726 ic->ic_node_getsignal = ath_node_getsignal;
727 ic->ic_scan_start = ath_scan_start;
728 ic->ic_scan_end = ath_scan_end;
729 ic->ic_set_channel = ath_set_channel;
731 ieee80211_radiotap_attach(ic,
732 &sc->sc_tx_th.wt_ihdr, sizeof(sc->sc_tx_th),
733 ATH_TX_RADIOTAP_PRESENT,
734 &sc->sc_rx_th.wr_ihdr, sizeof(sc->sc_rx_th),
735 ATH_RX_RADIOTAP_PRESENT);
738 * Setup dynamic sysctl's now that country code and
739 * regdomain are available from the hal.
741 ath_sysctlattach(sc);
742 ath_sysctl_stats_attach(sc);
745 ieee80211_announce(ic);
761 ath_detach(struct ath_softc *sc)
763 struct ifnet *ifp = sc->sc_ifp;
765 DPRINTF(sc, ATH_DEBUG_ANY, "%s: if_flags %x\n",
766 __func__, ifp->if_flags);
769 * NB: the order of these is important:
770 * o stop the chip so no more interrupts will fire
771 * o call the 802.11 layer before detaching the hal to
772 * insure callbacks into the driver to delete global
773 * key cache entries can be handled
774 * o free the taskqueue which drains any pending tasks
775 * o reclaim the tx queue data structures after calling
776 * the 802.11 layer as we'll get called back to reclaim
777 * node state and potentially want to use them
778 * o to cleanup the tx queues the hal is called, so detach
780 * Other than that, it's straightforward...
783 ieee80211_ifdetach(ifp->if_l2com);
784 taskqueue_free(sc->sc_tq);
786 if (sc->sc_tx99 != NULL)
787 sc->sc_tx99->detach(sc->sc_tx99);
789 ath_rate_detach(sc->sc_rc);
792 ath_hal_detach(sc->sc_ah); /* NB: sets chip in full sleep */
793 if (sc->sc_sysctl_tree) {
794 sysctl_ctx_free(&sc->sc_sysctl_ctx);
795 sc->sc_sysctl_tree = NULL;
803 * MAC address handling for multiple BSS on the same radio.
804 * The first vap uses the MAC address from the EEPROM. For
805 * subsequent vap's we set the U/L bit (bit 1) in the MAC
806 * address and use the next six bits as an index.
809 assign_address(struct ath_softc *sc, uint8_t mac[IEEE80211_ADDR_LEN], int clone)
813 if (clone && sc->sc_hasbmask) {
814 /* NB: we only do this if h/w supports multiple bssid */
815 for (i = 0; i < 8; i++)
816 if ((sc->sc_bssidmask & (1<<i)) == 0)
819 mac[0] |= (i << 2)|0x2;
822 sc->sc_bssidmask |= 1<<i;
823 sc->sc_hwbssidmask[0] &= ~mac[0];
829 reclaim_address(struct ath_softc *sc, const uint8_t mac[IEEE80211_ADDR_LEN])
834 if (i != 0 || --sc->sc_nbssid0 == 0) {
835 sc->sc_bssidmask &= ~(1<<i);
836 /* recalculate bssid mask from remaining addresses */
838 for (i = 1; i < 8; i++)
839 if (sc->sc_bssidmask & (1<<i))
840 mask &= ~((i<<2)|0x2);
841 sc->sc_hwbssidmask[0] |= mask;
846 * Assign a beacon xmit slot. We try to space out
847 * assignments so when beacons are staggered the
848 * traffic coming out of the cab q has maximal time
849 * to go out before the next beacon is scheduled.
852 assign_bslot(struct ath_softc *sc)
857 for (slot = 0; slot < ATH_BCBUF; slot++)
858 if (sc->sc_bslot[slot] == NULL) {
859 if (sc->sc_bslot[(slot+1)%ATH_BCBUF] == NULL &&
860 sc->sc_bslot[(slot-1)%ATH_BCBUF] == NULL)
863 /* NB: keep looking for a double slot */
868 static struct ieee80211vap *
869 ath_vap_create(struct ieee80211com *ic,
870 const char name[IFNAMSIZ], int unit, int opmode, int flags,
871 const uint8_t bssid[IEEE80211_ADDR_LEN],
872 const uint8_t mac0[IEEE80211_ADDR_LEN])
874 struct ath_softc *sc = ic->ic_ifp->if_softc;
876 struct ieee80211vap *vap;
877 uint8_t mac[IEEE80211_ADDR_LEN];
878 int ic_opmode, needbeacon, error;
880 avp = (struct ath_vap *) kmalloc(sizeof(struct ath_vap),
881 M_80211_VAP, M_WAITOK | M_ZERO);
883 IEEE80211_ADDR_COPY(mac, mac0);
885 ic_opmode = opmode; /* default to opmode of new vap */
887 case IEEE80211_M_STA:
888 if (sc->sc_nstavaps != 0) { /* XXX only 1 for now */
889 device_printf(sc->sc_dev, "only 1 sta vap supported\n");
894 * With multiple vaps we must fall back
895 * to s/w beacon miss handling.
897 flags |= IEEE80211_CLONE_NOBEACONS;
899 if (flags & IEEE80211_CLONE_NOBEACONS) {
901 * Station mode w/o beacons are implemented w/ AP mode.
903 ic_opmode = IEEE80211_M_HOSTAP;
906 case IEEE80211_M_IBSS:
907 if (sc->sc_nvaps != 0) { /* XXX only 1 for now */
908 device_printf(sc->sc_dev,
909 "only 1 ibss vap supported\n");
914 case IEEE80211_M_AHDEMO:
915 #ifdef IEEE80211_SUPPORT_TDMA
916 if (flags & IEEE80211_CLONE_TDMA) {
917 if (sc->sc_nvaps != 0) {
918 device_printf(sc->sc_dev,
919 "only 1 tdma vap supported\n");
923 flags |= IEEE80211_CLONE_NOBEACONS;
927 case IEEE80211_M_MONITOR:
928 if (sc->sc_nvaps != 0 && ic->ic_opmode != opmode) {
930 * Adopt existing mode. Adding a monitor or ahdemo
931 * vap to an existing configuration is of dubious
932 * value but should be ok.
934 /* XXX not right for monitor mode */
935 ic_opmode = ic->ic_opmode;
938 case IEEE80211_M_HOSTAP:
939 case IEEE80211_M_MBSS:
942 case IEEE80211_M_WDS:
943 if (sc->sc_nvaps != 0 && ic->ic_opmode == IEEE80211_M_STA) {
944 device_printf(sc->sc_dev,
945 "wds not supported in sta mode\n");
949 * Silently remove any request for a unique
950 * bssid; WDS vap's always share the local
953 flags &= ~IEEE80211_CLONE_BSSID;
954 if (sc->sc_nvaps == 0)
955 ic_opmode = IEEE80211_M_HOSTAP;
957 ic_opmode = ic->ic_opmode;
960 device_printf(sc->sc_dev, "unknown opmode %d\n", opmode);
964 * Check that a beacon buffer is available; the code below assumes it.
966 if (needbeacon & STAILQ_EMPTY(&sc->sc_bbuf)) {
967 device_printf(sc->sc_dev, "no beacon buffer available\n");
972 if (opmode == IEEE80211_M_HOSTAP || opmode == IEEE80211_M_MBSS) {
973 assign_address(sc, mac, flags & IEEE80211_CLONE_BSSID);
974 ath_hal_setbssidmask(sc->sc_ah, sc->sc_hwbssidmask);
978 /* XXX can't hold mutex across if_alloc */
979 error = ieee80211_vap_setup(ic, vap, name, unit, opmode, flags,
982 device_printf(sc->sc_dev, "%s: error %d creating vap\n",
987 /* h/w crypto support */
988 vap->iv_key_alloc = ath_key_alloc;
989 vap->iv_key_delete = ath_key_delete;
990 vap->iv_key_set = ath_key_set;
991 vap->iv_key_update_begin = ath_key_update_begin;
992 vap->iv_key_update_end = ath_key_update_end;
994 /* override various methods */
995 avp->av_recv_mgmt = vap->iv_recv_mgmt;
996 vap->iv_recv_mgmt = ath_recv_mgmt;
997 vap->iv_reset = ath_reset_vap;
998 vap->iv_update_beacon = ath_beacon_update;
999 avp->av_newstate = vap->iv_newstate;
1000 vap->iv_newstate = ath_newstate;
1001 avp->av_bmiss = vap->iv_bmiss;
1002 vap->iv_bmiss = ath_bmiss_vap;
1007 * Allocate beacon state and setup the q for buffered
1008 * multicast frames. We know a beacon buffer is
1009 * available because we checked above.
1011 avp->av_bcbuf = STAILQ_FIRST(&sc->sc_bbuf);
1012 STAILQ_REMOVE_HEAD(&sc->sc_bbuf, bf_list);
1013 if (opmode != IEEE80211_M_IBSS || !sc->sc_hasveol) {
1015 * Assign the vap to a beacon xmit slot. As above
1016 * this cannot fail to find a free one.
1018 avp->av_bslot = assign_bslot(sc);
1019 KASSERT(sc->sc_bslot[avp->av_bslot] == NULL,
1020 ("beacon slot %u not empty", avp->av_bslot));
1021 sc->sc_bslot[avp->av_bslot] = vap;
1024 if (sc->sc_hastsfadd && sc->sc_nbcnvaps > 0) {
1026 * Multple vaps are to transmit beacons and we
1027 * have h/w support for TSF adjusting; enable
1028 * use of staggered beacons.
1030 sc->sc_stagbeacons = 1;
1032 ath_txq_init(sc, &avp->av_mcastq, ATH_TXQ_SWQ);
1035 ic->ic_opmode = ic_opmode;
1036 if (opmode != IEEE80211_M_WDS) {
1038 if (opmode == IEEE80211_M_STA)
1040 if (opmode == IEEE80211_M_MBSS)
1043 switch (ic_opmode) {
1044 case IEEE80211_M_IBSS:
1045 sc->sc_opmode = HAL_M_IBSS;
1047 case IEEE80211_M_STA:
1048 sc->sc_opmode = HAL_M_STA;
1050 case IEEE80211_M_AHDEMO:
1051 #ifdef IEEE80211_SUPPORT_TDMA
1052 if (vap->iv_caps & IEEE80211_C_TDMA) {
1054 /* NB: disable tsf adjust */
1055 sc->sc_stagbeacons = 0;
1058 * NB: adhoc demo mode is a pseudo mode; to the hal it's
1063 case IEEE80211_M_HOSTAP:
1064 case IEEE80211_M_MBSS:
1065 sc->sc_opmode = HAL_M_HOSTAP;
1067 case IEEE80211_M_MONITOR:
1068 sc->sc_opmode = HAL_M_MONITOR;
1071 /* XXX should not happen */
1074 if (sc->sc_hastsfadd) {
1076 * Configure whether or not TSF adjust should be done.
1078 ath_hal_settsfadjust(sc->sc_ah, sc->sc_stagbeacons);
1080 if (flags & IEEE80211_CLONE_NOBEACONS) {
1082 * Enable s/w beacon miss handling.
1087 /* complete setup */
1088 ieee80211_vap_attach(vap, ath_media_change, ieee80211_media_status);
1091 reclaim_address(sc, mac);
1092 ath_hal_setbssidmask(sc->sc_ah, sc->sc_hwbssidmask);
1094 kfree(avp, M_80211_VAP);
1099 ath_vap_delete(struct ieee80211vap *vap)
1101 struct ieee80211com *ic = vap->iv_ic;
1102 struct ifnet *ifp = ic->ic_ifp;
1103 struct ath_softc *sc = ifp->if_softc;
1104 struct ath_hal *ah = sc->sc_ah;
1105 struct ath_vap *avp = ATH_VAP(vap);
1107 if (ifp->if_flags & IFF_RUNNING) {
1109 * Quiesce the hardware while we remove the vap. In
1110 * particular we need to reclaim all references to
1111 * the vap state by any frames pending on the tx queues.
1113 ath_hal_intrset(ah, 0); /* disable interrupts */
1114 ath_draintxq(sc); /* stop xmit side */
1115 ath_stoprecv(sc); /* stop recv side */
1118 ieee80211_vap_detach(vap);
1120 * Reclaim beacon state. Note this must be done before
1121 * the vap instance is reclaimed as we may have a reference
1122 * to it in the buffer for the beacon frame.
1124 if (avp->av_bcbuf != NULL) {
1125 if (avp->av_bslot != -1) {
1126 sc->sc_bslot[avp->av_bslot] = NULL;
1129 ath_beacon_return(sc, avp->av_bcbuf);
1130 avp->av_bcbuf = NULL;
1131 if (sc->sc_nbcnvaps == 0) {
1132 sc->sc_stagbeacons = 0;
1133 if (sc->sc_hastsfadd)
1134 ath_hal_settsfadjust(sc->sc_ah, 0);
1137 * Reclaim any pending mcast frames for the vap.
1139 ath_tx_draintxq(sc, &avp->av_mcastq);
1142 * Update bookkeeping.
1144 if (vap->iv_opmode == IEEE80211_M_STA) {
1146 if (sc->sc_nstavaps == 0 && sc->sc_swbmiss)
1148 } else if (vap->iv_opmode == IEEE80211_M_HOSTAP ||
1149 vap->iv_opmode == IEEE80211_M_MBSS) {
1150 reclaim_address(sc, vap->iv_myaddr);
1151 ath_hal_setbssidmask(ah, sc->sc_hwbssidmask);
1152 if (vap->iv_opmode == IEEE80211_M_MBSS)
1155 if (vap->iv_opmode != IEEE80211_M_WDS)
1157 #ifdef IEEE80211_SUPPORT_TDMA
1158 /* TDMA operation ceases when the last vap is destroyed */
1159 if (sc->sc_tdma && sc->sc_nvaps == 0) {
1164 kfree(avp, M_80211_VAP);
1166 if (ifp->if_flags & IFF_RUNNING) {
1168 * Restart rx+tx machines if still running (RUNNING will
1169 * be reset if we just destroyed the last vap).
1171 if (ath_startrecv(sc) != 0)
1172 if_printf(ifp, "%s: unable to restart recv logic\n",
1174 if (sc->sc_beacons) { /* restart beacons */
1175 #ifdef IEEE80211_SUPPORT_TDMA
1177 ath_tdma_config(sc, NULL);
1180 ath_beacon_config(sc, NULL);
1182 ath_hal_intrset(ah, sc->sc_imask);
1187 ath_suspend(struct ath_softc *sc)
1189 struct ifnet *ifp = sc->sc_ifp;
1190 struct ieee80211com *ic = ifp->if_l2com;
1192 DPRINTF(sc, ATH_DEBUG_ANY, "%s: if_flags %x\n",
1193 __func__, ifp->if_flags);
1195 sc->sc_resume_up = (ifp->if_flags & IFF_UP) != 0;
1196 if (ic->ic_opmode == IEEE80211_M_STA)
1199 ieee80211_suspend_all(ic);
1201 * NB: don't worry about putting the chip in low power
1202 * mode; pci will power off our socket on suspend and
1203 * CardBus detaches the device.
1208 * Reset the key cache since some parts do not reset the
1209 * contents on resume. First we clear all entries, then
1210 * re-load keys that the 802.11 layer assumes are setup
1214 ath_reset_keycache(struct ath_softc *sc)
1216 struct ifnet *ifp = sc->sc_ifp;
1217 struct ieee80211com *ic = ifp->if_l2com;
1218 struct ath_hal *ah = sc->sc_ah;
1221 for (i = 0; i < sc->sc_keymax; i++)
1222 ath_hal_keyreset(ah, i);
1223 ieee80211_crypto_reload_keys(ic);
1227 ath_resume(struct ath_softc *sc)
1229 struct ifnet *ifp = sc->sc_ifp;
1230 struct ieee80211com *ic = ifp->if_l2com;
1231 struct ath_hal *ah = sc->sc_ah;
1234 DPRINTF(sc, ATH_DEBUG_ANY, "%s: if_flags %x\n",
1235 __func__, ifp->if_flags);
1238 * Must reset the chip before we reload the
1239 * keycache as we were powered down on suspend.
1241 ath_hal_reset(ah, sc->sc_opmode,
1242 sc->sc_curchan != NULL ? sc->sc_curchan : ic->ic_curchan,
1244 ath_reset_keycache(sc);
1245 if (sc->sc_resume_up) {
1246 if (ic->ic_opmode == IEEE80211_M_STA) {
1249 * Program the beacon registers using the last rx'd
1250 * beacon frame and enable sync on the next beacon
1251 * we see. This should handle the case where we
1252 * wakeup and find the same AP and also the case where
1253 * we wakeup and need to roam. For the latter we
1254 * should get bmiss events that trigger a roam.
1256 ath_beacon_config(sc, NULL);
1257 sc->sc_syncbeacon = 1;
1259 ieee80211_resume_all(ic);
1261 if (sc->sc_softled) {
1262 ath_hal_gpioCfgOutput(ah, sc->sc_ledpin,
1263 HAL_GPIO_MUX_MAC_NETWORK_LED);
1264 ath_hal_gpioset(ah, sc->sc_ledpin, !sc->sc_ledon);
1269 ath_shutdown(struct ath_softc *sc)
1271 struct ifnet *ifp = sc->sc_ifp;
1273 DPRINTF(sc, ATH_DEBUG_ANY, "%s: if_flags %x\n",
1274 __func__, ifp->if_flags);
1277 /* NB: no point powering down chip as we're about to reboot */
1281 * Interrupt handler. Most of the actual processing is deferred.
1286 struct ath_softc *sc = arg;
1287 struct ifnet *ifp = sc->sc_ifp;
1288 struct ath_hal *ah = sc->sc_ah;
1292 if (sc->sc_invalid) {
1294 * The hardware is not ready/present, don't touch anything.
1295 * Note this can happen early on if the IRQ is shared.
1297 DPRINTF(sc, ATH_DEBUG_ANY, "%s: invalid; ignored\n", __func__);
1301 if (!ath_hal_intrpend(ah)) /* shared irq, not for us */
1303 if ((ifp->if_flags & IFF_UP) == 0 ||
1304 (ifp->if_flags & IFF_RUNNING) == 0) {
1307 DPRINTF(sc, ATH_DEBUG_ANY, "%s: if_flags 0x%x\n",
1308 __func__, ifp->if_flags);
1309 ath_hal_getisr(ah, &status); /* clear ISR */
1310 ath_hal_intrset(ah, 0); /* disable further intr's */
1314 * Figure out the reason(s) for the interrupt. Note
1315 * that the hal returns a pseudo-ISR that may include
1316 * bits we haven't explicitly enabled so we mask the
1317 * value to insure we only process bits we requested.
1319 ath_hal_getisr(ah, &ostatus); /* NB: clears ISR too */
1320 DPRINTF(sc, ATH_DEBUG_INTR, "%s: status 0x%x\n", __func__, ostatus);
1321 status = ostatus & sc->sc_imask; /* discard unasked for bits */
1322 if (status & HAL_INT_FATAL) {
1323 sc->sc_stats.ast_hardware++;
1324 ath_hal_intrset(ah, 0); /* disable intr's until reset */
1325 ath_fatal_proc(sc, 0);
1327 if (status & HAL_INT_SWBA) {
1329 * Software beacon alert--time to send a beacon.
1330 * Handle beacon transmission directly; deferring
1331 * this is too slow to meet timing constraints
1334 #ifdef IEEE80211_SUPPORT_TDMA
1336 if (sc->sc_tdmaswba == 0) {
1337 struct ieee80211com *ic = ifp->if_l2com;
1338 struct ieee80211vap *vap =
1339 TAILQ_FIRST(&ic->ic_vaps);
1340 ath_tdma_beacon_send(sc, vap);
1342 vap->iv_tdma->tdma_bintval;
1348 ath_beacon_proc(sc, 0);
1349 #ifdef IEEE80211_SUPPORT_SUPERG
1351 * Schedule the rx taskq in case there's no
1352 * traffic so any frames held on the staging
1353 * queue are aged and potentially flushed.
1355 taskqueue_enqueue(sc->sc_tq, &sc->sc_rxtask);
1361 * NB: The hardware should re-read the link when the RXE
1362 * bit is written, but it doesn't work at least on
1365 if (status & HAL_INT_RXEOL) {
1366 sc->sc_stats.ast_rxeol++;
1367 sc->sc_rxlink = NULL;
1370 if (status & HAL_INT_TXURN) {
1371 sc->sc_stats.ast_txurn++;
1372 /* bump tx trigger level */
1373 ath_hal_updatetxtriglevel(ah, AH_TRUE);
1376 if (status & HAL_INT_RX)
1377 taskqueue_enqueue(sc->sc_tq, &sc->sc_rxtask);
1379 if (status & HAL_INT_TX)
1380 taskqueue_enqueue(sc->sc_tq, &sc->sc_txtask);
1382 if (status & HAL_INT_BMISS) {
1383 sc->sc_stats.ast_bmiss++;
1384 taskqueue_enqueue(sc->sc_tq, &sc->sc_bmisstask);
1387 if (status & HAL_INT_MIB) {
1388 sc->sc_stats.ast_mib++;
1390 * Disable interrupts until we service the MIB
1391 * interrupt; otherwise it will continue to fire.
1393 ath_hal_intrset(ah, 0);
1395 * Let the hal handle the event. We assume it will
1396 * clear whatever condition caused the interrupt.
1398 ath_hal_mibevent(ah, &sc->sc_halstats);
1399 ath_hal_intrset(ah, sc->sc_imask);
1402 if (status & HAL_INT_RXORN) {
1403 /* NB: hal marks HAL_INT_FATAL when RXORN is fatal */
1404 sc->sc_stats.ast_rxorn++;
1410 ath_fatal_proc(void *arg, int pending)
1412 struct ath_softc *sc = arg;
1413 struct ifnet *ifp = sc->sc_ifp;
1418 if_printf(ifp, "hardware error; resetting\n");
1420 * Fatal errors are unrecoverable. Typically these
1421 * are caused by DMA errors. Collect h/w state from
1422 * the hal so we can diagnose what's going on.
1424 if (ath_hal_getfatalstate(sc->sc_ah, &sp, &len)) {
1425 KASSERT(len >= 6*sizeof(u_int32_t), ("len %u bytes", len));
1427 if_printf(ifp, "0x%08x 0x%08x 0x%08x, 0x%08x 0x%08x 0x%08x\n",
1428 state[0], state[1] , state[2], state[3],
1429 state[4], state[5]);
1435 ath_bmiss_vap(struct ieee80211vap *vap)
1438 * Workaround phantom bmiss interrupts by sanity-checking
1439 * the time of our last rx'd frame. If it is within the
1440 * beacon miss interval then ignore the interrupt. If it's
1441 * truly a bmiss we'll get another interrupt soon and that'll
1442 * be dispatched up for processing. Note this applies only
1443 * for h/w beacon miss events.
1445 if ((vap->iv_flags_ext & IEEE80211_FEXT_SWBMISS) == 0) {
1446 struct ifnet *ifp = vap->iv_ic->ic_ifp;
1447 struct ath_softc *sc = ifp->if_softc;
1448 u_int64_t lastrx = sc->sc_lastrx;
1449 u_int64_t tsf = ath_hal_gettsf64(sc->sc_ah);
1450 u_int bmisstimeout =
1451 vap->iv_bmissthreshold * vap->iv_bss->ni_intval * 1024;
1453 DPRINTF(sc, ATH_DEBUG_BEACON,
1454 "%s: tsf %llu lastrx %lld (%llu) bmiss %u\n",
1455 __func__, (unsigned long long) tsf,
1456 (unsigned long long)(tsf - lastrx),
1457 (unsigned long long) lastrx, bmisstimeout);
1459 if (tsf - lastrx <= bmisstimeout) {
1460 sc->sc_stats.ast_bmiss_phantom++;
1464 ATH_VAP(vap)->av_bmiss(vap);
1468 ath_hal_gethangstate(struct ath_hal *ah, uint32_t mask, uint32_t *hangs)
1473 if (!ath_hal_getdiagstate(ah, 32, &mask, sizeof(mask), &sp, &rsize))
1475 KASSERT(rsize == sizeof(uint32_t), ("resultsize %u", rsize));
1476 *hangs = *(uint32_t *)sp;
1481 ath_bmiss_task(void *arg, int pending)
1483 struct ath_softc *sc = arg;
1484 struct ifnet *ifp = sc->sc_ifp;
1487 wlan_serialize_enter();
1488 DPRINTF(sc, ATH_DEBUG_ANY, "%s: pending %u\n", __func__, pending);
1490 if (ath_hal_gethangstate(sc->sc_ah, 0xff, &hangs) && hangs != 0) {
1491 if_printf(ifp, "bb hang detected (0x%x), reseting\n", hangs);
1494 ieee80211_beacon_miss(ifp->if_l2com);
1496 wlan_serialize_exit();
1500 * Handle TKIP MIC setup to deal hardware that doesn't do MIC
1501 * calcs together with WME. If necessary disable the crypto
1502 * hardware and mark the 802.11 state so keys will be setup
1503 * with the MIC work done in software.
1506 ath_settkipmic(struct ath_softc *sc)
1508 struct ifnet *ifp = sc->sc_ifp;
1509 struct ieee80211com *ic = ifp->if_l2com;
1511 if ((ic->ic_cryptocaps & IEEE80211_CRYPTO_TKIP) && !sc->sc_wmetkipmic) {
1512 if (ic->ic_flags & IEEE80211_F_WME) {
1513 ath_hal_settkipmic(sc->sc_ah, AH_FALSE);
1514 ic->ic_cryptocaps &= ~IEEE80211_CRYPTO_TKIPMIC;
1516 ath_hal_settkipmic(sc->sc_ah, AH_TRUE);
1517 ic->ic_cryptocaps |= IEEE80211_CRYPTO_TKIPMIC;
1525 struct ath_softc *sc = (struct ath_softc *) arg;
1526 struct ifnet *ifp = sc->sc_ifp;
1527 struct ieee80211com *ic = ifp->if_l2com;
1528 struct ath_hal *ah = sc->sc_ah;
1531 DPRINTF(sc, ATH_DEBUG_ANY, "%s: if_flags 0x%x\n",
1532 __func__, ifp->if_flags);
1535 * Stop anything previously setup. This is safe
1536 * whether this is the first time through or not.
1538 ath_stop_locked(ifp);
1541 * The basic interface to setting the hardware in a good
1542 * state is ``reset''. On return the hardware is known to
1543 * be powered up and with interrupts disabled. This must
1544 * be followed by initialization of the appropriate bits
1545 * and then setup of the interrupt mask.
1548 if (!ath_hal_reset(ah, sc->sc_opmode, ic->ic_curchan, AH_FALSE, &status)) {
1549 if_printf(ifp, "unable to reset hardware; hal status %u\n",
1553 ath_chan_change(sc, ic->ic_curchan);
1556 * Likewise this is set during reset so update
1557 * state cached in the driver.
1559 sc->sc_diversity = ath_hal_getdiversity(ah);
1560 sc->sc_lastlongcal = 0;
1561 sc->sc_resetcal = 1;
1562 sc->sc_lastcalreset = 0;
1565 * Setup the hardware after reset: the key cache
1566 * is filled as needed and the receive engine is
1567 * set going. Frame transmit is handled entirely
1568 * in the frame output path; there's nothing to do
1569 * here except setup the interrupt mask.
1571 if (ath_startrecv(sc) != 0) {
1572 if_printf(ifp, "unable to start recv logic\n");
1577 * Enable interrupts.
1579 sc->sc_imask = HAL_INT_RX | HAL_INT_TX
1580 | HAL_INT_RXEOL | HAL_INT_RXORN
1581 | HAL_INT_FATAL | HAL_INT_GLOBAL;
1583 * Enable MIB interrupts when there are hardware phy counters.
1584 * Note we only do this (at the moment) for station mode.
1586 if (sc->sc_needmib && ic->ic_opmode == IEEE80211_M_STA)
1587 sc->sc_imask |= HAL_INT_MIB;
1589 ifp->if_flags |= IFF_RUNNING;
1590 callout_reset(&sc->sc_wd_ch, hz, ath_watchdog_callout, sc);
1591 ath_hal_intrset(ah, sc->sc_imask);
1594 #ifdef ATH_TX99_DIAG
1595 if (sc->sc_tx99 != NULL)
1596 sc->sc_tx99->start(sc->sc_tx99);
1599 ieee80211_start_all(ic); /* start all vap's */
1603 ath_stop_locked(struct ifnet *ifp)
1605 struct ath_softc *sc = ifp->if_softc;
1606 struct ath_hal *ah = sc->sc_ah;
1608 DPRINTF(sc, ATH_DEBUG_ANY, "%s: invalid %u if_flags 0x%x\n",
1609 __func__, sc->sc_invalid, ifp->if_flags);
1611 if (ifp->if_flags & IFF_RUNNING) {
1613 * Shutdown the hardware and driver:
1614 * reset 802.11 state machine
1616 * disable interrupts
1617 * turn off the radio
1618 * clear transmit machinery
1619 * clear receive machinery
1620 * drain and release tx queues
1621 * reclaim beacon resources
1622 * power down hardware
1624 * Note that some of this work is not possible if the
1625 * hardware is gone (invalid).
1627 #ifdef ATH_TX99_DIAG
1628 if (sc->sc_tx99 != NULL)
1629 sc->sc_tx99->stop(sc->sc_tx99);
1631 callout_stop(&sc->sc_wd_ch);
1632 sc->sc_wd_timer = 0;
1633 ifp->if_flags &= ~IFF_RUNNING;
1634 if (!sc->sc_invalid) {
1635 if (sc->sc_softled) {
1636 callout_stop(&sc->sc_ledtimer);
1637 ath_hal_gpioset(ah, sc->sc_ledpin,
1639 sc->sc_blinking = 0;
1641 ath_hal_intrset(ah, 0);
1644 if (!sc->sc_invalid) {
1646 ath_hal_phydisable(ah);
1648 sc->sc_rxlink = NULL;
1649 ath_beacon_free(sc); /* XXX not needed */
1654 ath_stop(struct ifnet *ifp)
1656 struct ath_softc *sc __unused = ifp->if_softc;
1658 ath_stop_locked(ifp);
1662 * Reset the hardware w/o losing operational state. This is
1663 * basically a more efficient way of doing ath_stop, ath_init,
1664 * followed by state transitions to the current 802.11
1665 * operational state. Used to recover from various errors and
1666 * to reset or reload hardware state.
1669 ath_reset(struct ifnet *ifp)
1671 struct ath_softc *sc = ifp->if_softc;
1672 struct ieee80211com *ic = ifp->if_l2com;
1673 struct ath_hal *ah = sc->sc_ah;
1676 ath_hal_intrset(ah, 0); /* disable interrupts */
1677 ath_draintxq(sc); /* stop xmit side */
1678 ath_stoprecv(sc); /* stop recv side */
1679 ath_settkipmic(sc); /* configure TKIP MIC handling */
1680 /* NB: indicate channel change so we do a full reset */
1681 if (!ath_hal_reset(ah, sc->sc_opmode, ic->ic_curchan, AH_TRUE, &status))
1682 if_printf(ifp, "%s: unable to reset hardware; hal status %u\n",
1684 sc->sc_diversity = ath_hal_getdiversity(ah);
1685 if (ath_startrecv(sc) != 0) /* restart recv */
1686 if_printf(ifp, "%s: unable to start recv logic\n", __func__);
1688 * We may be doing a reset in response to an ioctl
1689 * that changes the channel so update any state that
1690 * might change as a result.
1692 ath_chan_change(sc, ic->ic_curchan);
1693 if (sc->sc_beacons) { /* restart beacons */
1694 #ifdef IEEE80211_SUPPORT_TDMA
1696 ath_tdma_config(sc, NULL);
1699 ath_beacon_config(sc, NULL);
1701 ath_hal_intrset(ah, sc->sc_imask);
1703 if_devstart(ifp); /* restart xmit */
1708 ath_reset_vap(struct ieee80211vap *vap, u_long cmd)
1710 struct ieee80211com *ic = vap->iv_ic;
1711 struct ifnet *ifp = ic->ic_ifp;
1712 struct ath_softc *sc = ifp->if_softc;
1713 struct ath_hal *ah = sc->sc_ah;
1716 case IEEE80211_IOC_TXPOWER:
1718 * If per-packet TPC is enabled, then we have nothing
1719 * to do; otherwise we need to force the global limit.
1720 * All this can happen directly; no need to reset.
1722 if (!ath_hal_gettpc(ah))
1723 ath_hal_settxpowlimit(ah, ic->ic_txpowlimit);
1726 return ath_reset(ifp);
1729 static struct ath_buf *
1730 _ath_getbuf_locked(struct ath_softc *sc)
1734 bf = STAILQ_FIRST(&sc->sc_txbuf);
1735 if (bf != NULL && (bf->bf_flags & ATH_BUF_BUSY) == 0)
1736 STAILQ_REMOVE_HEAD(&sc->sc_txbuf, bf_list);
1740 kprintf("ath: ran out of descriptors\n");
1741 DPRINTF(sc, ATH_DEBUG_XMIT, "%s: %s\n", __func__,
1742 STAILQ_FIRST(&sc->sc_txbuf) == NULL ?
1743 "out of xmit buffers" : "xmit buffer busy");
1748 static struct ath_buf *
1749 ath_getbuf(struct ath_softc *sc)
1753 bf = _ath_getbuf_locked(sc);
1755 struct ifnet *ifp = sc->sc_ifp;
1757 DPRINTF(sc, ATH_DEBUG_XMIT, "%s: stop queue\n", __func__);
1758 sc->sc_stats.ast_tx_qstop++;
1759 ifq_set_oactive(&ifp->if_snd);
1765 * Cleanup driver resources when we run out of buffers
1766 * while processing fragments; return the tx buffers
1767 * allocated and drop node references.
1770 ath_txfrag_cleanup(struct ath_softc *sc,
1771 ath_bufhead *frags, struct ieee80211_node *ni)
1773 struct ath_buf *bf, *next;
1775 STAILQ_FOREACH_MUTABLE(bf, frags, bf_list, next) {
1776 /* NB: bf assumed clean */
1777 STAILQ_REMOVE_HEAD(frags, bf_list);
1778 STAILQ_INSERT_HEAD(&sc->sc_txbuf, bf, bf_list);
1779 ieee80211_node_decref(ni);
1784 * Setup xmit of a fragmented frame. Allocate a buffer
1785 * for each frag and bump the node reference count to
1786 * reflect the held reference to be setup by ath_tx_start.
1789 ath_txfrag_setup(struct ath_softc *sc, ath_bufhead *frags,
1790 struct mbuf *m0, struct ieee80211_node *ni)
1795 for (m = m0->m_nextpkt; m != NULL; m = m->m_nextpkt) {
1796 bf = _ath_getbuf_locked(sc);
1797 if (bf == NULL) { /* out of buffers, cleanup */
1798 ath_txfrag_cleanup(sc, frags, ni);
1801 ieee80211_node_incref(ni);
1802 STAILQ_INSERT_TAIL(frags, bf, bf_list);
1805 return !STAILQ_EMPTY(frags);
1809 ath_start(struct ifnet *ifp, struct ifaltq_subque *ifsq)
1811 struct ath_softc *sc = ifp->if_softc;
1812 struct ieee80211_node *ni;
1814 struct mbuf *m, *next;
1817 ASSERT_ALTQ_SQ_DEFAULT(ifp, ifsq);
1819 if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid) {
1820 ifq_purge(&ifp->if_snd);
1825 * Grab a TX buffer and associated resources.
1827 bf = ath_getbuf(sc);
1831 m = ifq_dequeue(&ifp->if_snd, NULL);
1833 STAILQ_INSERT_HEAD(&sc->sc_txbuf, bf, bf_list);
1836 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
1838 * Check for fragmentation. If this frame
1839 * has been broken up verify we have enough
1840 * buffers to send all the fragments so all
1843 STAILQ_INIT(&frags);
1844 if ((m->m_flags & M_FRAG) &&
1845 !ath_txfrag_setup(sc, &frags, m, ni)) {
1846 DPRINTF(sc, ATH_DEBUG_XMIT,
1847 "%s: out of txfrag buffers\n", __func__);
1848 sc->sc_stats.ast_tx_nofrag++;
1856 * Pass the frame to the h/w for transmission.
1857 * Fragmented frames have each frag chained together
1858 * with m_nextpkt. We know there are sufficient ath_buf's
1859 * to send all the frags because of work done by
1860 * ath_txfrag_setup. We leave m_nextpkt set while
1861 * calling ath_tx_start so it can use it to extend the
1862 * the tx duration to cover the subsequent frag and
1863 * so it can reclaim all the mbufs in case of an error;
1864 * ath_tx_start clears m_nextpkt once it commits to
1865 * handing the frame to the hardware.
1867 next = m->m_nextpkt;
1868 if (ath_tx_start(sc, ni, bf, m)) {
1874 STAILQ_INSERT_HEAD(&sc->sc_txbuf, bf, bf_list);
1875 ath_txfrag_cleanup(sc, &frags, ni);
1877 ieee80211_free_node(ni);
1882 * Beware of state changing between frags.
1883 * XXX check sta power-save state?
1885 if (ni->ni_vap->iv_state != IEEE80211_S_RUN) {
1886 DPRINTF(sc, ATH_DEBUG_XMIT,
1887 "%s: flush fragmented packet, state %s\n",
1889 ieee80211_state_name[ni->ni_vap->iv_state]);
1894 bf = STAILQ_FIRST(&frags);
1895 KASSERT(bf != NULL, ("no buf for txfrag"));
1896 STAILQ_REMOVE_HEAD(&frags, bf_list);
1900 sc->sc_wd_timer = 5;
1905 ath_media_change(struct ifnet *ifp)
1907 int error = ieee80211_media_change(ifp);
1908 /* NB: only the fixed rate can change and that doesn't need a reset */
1909 return (error == ENETRESET ? 0 : error);
1914 ath_keyprint(struct ath_softc *sc, const char *tag, u_int ix,
1915 const HAL_KEYVAL *hk, const u_int8_t mac[IEEE80211_ADDR_LEN])
1917 static const char *ciphers[] = {
1925 char ethstr[ETHER_ADDRSTRLEN + 1];
1928 kprintf("%s: [%02u] %-7s ", tag, ix, ciphers[hk->kv_type]);
1929 for (i = 0, n = hk->kv_len; i < n; i++)
1930 kprintf("%02x", hk->kv_val[i]);
1931 kprintf(" mac %s", kether_ntoa(mac, ethstr));
1932 if (hk->kv_type == HAL_CIPHER_TKIP) {
1933 kprintf(" %s ", sc->sc_splitmic ? "mic" : "rxmic");
1934 for (i = 0; i < sizeof(hk->kv_mic); i++)
1935 kprintf("%02x", hk->kv_mic[i]);
1936 if (!sc->sc_splitmic) {
1938 for (i = 0; i < sizeof(hk->kv_txmic); i++)
1939 kprintf("%02x", hk->kv_txmic[i]);
1947 * Set a TKIP key into the hardware. This handles the
1948 * potential distribution of key state to multiple key
1949 * cache slots for TKIP.
1952 ath_keyset_tkip(struct ath_softc *sc, const struct ieee80211_key *k,
1953 HAL_KEYVAL *hk, const u_int8_t mac[IEEE80211_ADDR_LEN])
1955 #define IEEE80211_KEY_XR (IEEE80211_KEY_XMIT | IEEE80211_KEY_RECV)
1956 static const u_int8_t zerobssid[IEEE80211_ADDR_LEN];
1957 struct ath_hal *ah = sc->sc_ah;
1959 KASSERT(k->wk_cipher->ic_cipher == IEEE80211_CIPHER_TKIP,
1960 ("got a non-TKIP key, cipher %u", k->wk_cipher->ic_cipher));
1961 if ((k->wk_flags & IEEE80211_KEY_XR) == IEEE80211_KEY_XR) {
1962 if (sc->sc_splitmic) {
1964 * TX key goes at first index, RX key at the rx index.
1965 * The hal handles the MIC keys at index+64.
1967 memcpy(hk->kv_mic, k->wk_txmic, sizeof(hk->kv_mic));
1968 KEYPRINTF(sc, k->wk_keyix, hk, zerobssid);
1969 if (!ath_hal_keyset(ah, k->wk_keyix, hk, zerobssid))
1972 memcpy(hk->kv_mic, k->wk_rxmic, sizeof(hk->kv_mic));
1973 KEYPRINTF(sc, k->wk_keyix+32, hk, mac);
1974 /* XXX delete tx key on failure? */
1975 return ath_hal_keyset(ah, k->wk_keyix+32, hk, mac);
1978 * Room for both TX+RX MIC keys in one key cache
1979 * slot, just set key at the first index; the hal
1980 * will handle the rest.
1982 memcpy(hk->kv_mic, k->wk_rxmic, sizeof(hk->kv_mic));
1983 memcpy(hk->kv_txmic, k->wk_txmic, sizeof(hk->kv_txmic));
1984 KEYPRINTF(sc, k->wk_keyix, hk, mac);
1985 return ath_hal_keyset(ah, k->wk_keyix, hk, mac);
1987 } else if (k->wk_flags & IEEE80211_KEY_XMIT) {
1988 if (sc->sc_splitmic) {
1990 * NB: must pass MIC key in expected location when
1991 * the keycache only holds one MIC key per entry.
1993 memcpy(hk->kv_mic, k->wk_txmic, sizeof(hk->kv_txmic));
1995 memcpy(hk->kv_txmic, k->wk_txmic, sizeof(hk->kv_txmic));
1996 KEYPRINTF(sc, k->wk_keyix, hk, mac);
1997 return ath_hal_keyset(ah, k->wk_keyix, hk, mac);
1998 } else if (k->wk_flags & IEEE80211_KEY_RECV) {
1999 memcpy(hk->kv_mic, k->wk_rxmic, sizeof(hk->kv_mic));
2000 KEYPRINTF(sc, k->wk_keyix, hk, mac);
2001 return ath_hal_keyset(ah, k->wk_keyix, hk, mac);
2004 #undef IEEE80211_KEY_XR
2008 * Set a net80211 key into the hardware. This handles the
2009 * potential distribution of key state to multiple key
2010 * cache slots for TKIP with hardware MIC support.
2013 ath_keyset(struct ath_softc *sc, const struct ieee80211_key *k,
2014 struct ieee80211_node *bss)
2016 static const u_int8_t ciphermap[] = {
2017 HAL_CIPHER_WEP, /* IEEE80211_CIPHER_WEP */
2018 HAL_CIPHER_TKIP, /* IEEE80211_CIPHER_TKIP */
2019 HAL_CIPHER_AES_OCB, /* IEEE80211_CIPHER_AES_OCB */
2020 HAL_CIPHER_AES_CCM, /* IEEE80211_CIPHER_AES_CCM */
2021 (u_int8_t) -1, /* 4 is not allocated */
2022 HAL_CIPHER_CKIP, /* IEEE80211_CIPHER_CKIP */
2023 HAL_CIPHER_CLR, /* IEEE80211_CIPHER_NONE */
2025 struct ath_hal *ah = sc->sc_ah;
2026 const struct ieee80211_cipher *cip = k->wk_cipher;
2027 u_int8_t gmac[IEEE80211_ADDR_LEN];
2028 const u_int8_t *mac;
2031 memset(&hk, 0, sizeof(hk));
2033 * Software crypto uses a "clear key" so non-crypto
2034 * state kept in the key cache are maintained and
2035 * so that rx frames have an entry to match.
2037 if ((k->wk_flags & IEEE80211_KEY_SWCRYPT) == 0) {
2038 KASSERT(cip->ic_cipher < NELEM(ciphermap),
2039 ("invalid cipher type %u", cip->ic_cipher));
2040 hk.kv_type = ciphermap[cip->ic_cipher];
2041 hk.kv_len = k->wk_keylen;
2042 memcpy(hk.kv_val, k->wk_key, k->wk_keylen);
2044 hk.kv_type = HAL_CIPHER_CLR;
2046 if ((k->wk_flags & IEEE80211_KEY_GROUP) && sc->sc_mcastkey) {
2048 * Group keys on hardware that supports multicast frame
2049 * key search use a MAC that is the sender's address with
2050 * the high bit set instead of the app-specified address.
2052 IEEE80211_ADDR_COPY(gmac, bss->ni_macaddr);
2056 mac = k->wk_macaddr;
2058 if (hk.kv_type == HAL_CIPHER_TKIP &&
2059 (k->wk_flags & IEEE80211_KEY_SWMIC) == 0) {
2060 return ath_keyset_tkip(sc, k, &hk, mac);
2062 KEYPRINTF(sc, k->wk_keyix, &hk, mac);
2063 return ath_hal_keyset(ah, k->wk_keyix, &hk, mac);
2068 * Allocate tx/rx key slots for TKIP. We allocate two slots for
2069 * each key, one for decrypt/encrypt and the other for the MIC.
2072 key_alloc_2pair(struct ath_softc *sc,
2073 ieee80211_keyix *txkeyix, ieee80211_keyix *rxkeyix)
2077 KASSERT(sc->sc_splitmic, ("key cache !split"));
2078 /* XXX could optimize */
2079 for (i = 0; i < NELEM(sc->sc_keymap)/4; i++) {
2080 u_int8_t b = sc->sc_keymap[i];
2083 * One or more slots in this byte are free.
2091 /* XXX IEEE80211_KEY_XMIT | IEEE80211_KEY_RECV */
2092 if (isset(sc->sc_keymap, keyix+32) ||
2093 isset(sc->sc_keymap, keyix+64) ||
2094 isset(sc->sc_keymap, keyix+32+64)) {
2095 /* full pair unavailable */
2097 if (keyix == (i+1)*NBBY) {
2098 /* no slots were appropriate, advance */
2103 setbit(sc->sc_keymap, keyix);
2104 setbit(sc->sc_keymap, keyix+64);
2105 setbit(sc->sc_keymap, keyix+32);
2106 setbit(sc->sc_keymap, keyix+32+64);
2107 DPRINTF(sc, ATH_DEBUG_KEYCACHE,
2108 "%s: key pair %u,%u %u,%u\n",
2109 __func__, keyix, keyix+64,
2110 keyix+32, keyix+32+64);
2112 *rxkeyix = keyix+32;
2116 DPRINTF(sc, ATH_DEBUG_KEYCACHE, "%s: out of pair space\n", __func__);
2121 * Allocate tx/rx key slots for TKIP. We allocate two slots for
2122 * each key, one for decrypt/encrypt and the other for the MIC.
2125 key_alloc_pair(struct ath_softc *sc,
2126 ieee80211_keyix *txkeyix, ieee80211_keyix *rxkeyix)
2130 KASSERT(!sc->sc_splitmic, ("key cache split"));
2131 /* XXX could optimize */
2132 for (i = 0; i < NELEM(sc->sc_keymap)/4; i++) {
2133 u_int8_t b = sc->sc_keymap[i];
2136 * One or more slots in this byte are free.
2144 if (isset(sc->sc_keymap, keyix+64)) {
2145 /* full pair unavailable */
2147 if (keyix == (i+1)*NBBY) {
2148 /* no slots were appropriate, advance */
2153 setbit(sc->sc_keymap, keyix);
2154 setbit(sc->sc_keymap, keyix+64);
2155 DPRINTF(sc, ATH_DEBUG_KEYCACHE,
2156 "%s: key pair %u,%u\n",
2157 __func__, keyix, keyix+64);
2158 *txkeyix = *rxkeyix = keyix;
2162 DPRINTF(sc, ATH_DEBUG_KEYCACHE, "%s: out of pair space\n", __func__);
2167 * Allocate a single key cache slot.
2170 key_alloc_single(struct ath_softc *sc,
2171 ieee80211_keyix *txkeyix, ieee80211_keyix *rxkeyix)
2175 /* XXX try i,i+32,i+64,i+32+64 to minimize key pair conflicts */
2176 for (i = 0; i < NELEM(sc->sc_keymap); i++) {
2177 u_int8_t b = sc->sc_keymap[i];
2180 * One or more slots are free.
2185 setbit(sc->sc_keymap, keyix);
2186 DPRINTF(sc, ATH_DEBUG_KEYCACHE, "%s: key %u\n",
2188 *txkeyix = *rxkeyix = keyix;
2192 DPRINTF(sc, ATH_DEBUG_KEYCACHE, "%s: out of space\n", __func__);
2197 * Allocate one or more key cache slots for a uniacst key. The
2198 * key itself is needed only to identify the cipher. For hardware
2199 * TKIP with split cipher+MIC keys we allocate two key cache slot
2200 * pairs so that we can setup separate TX and RX MIC keys. Note
2201 * that the MIC key for a TKIP key at slot i is assumed by the
2202 * hardware to be at slot i+64. This limits TKIP keys to the first
2206 ath_key_alloc(struct ieee80211vap *vap, struct ieee80211_key *k,
2207 ieee80211_keyix *keyix, ieee80211_keyix *rxkeyix)
2209 struct ath_softc *sc = vap->iv_ic->ic_ifp->if_softc;
2212 * Group key allocation must be handled specially for
2213 * parts that do not support multicast key cache search
2214 * functionality. For those parts the key id must match
2215 * the h/w key index so lookups find the right key. On
2216 * parts w/ the key search facility we install the sender's
2217 * mac address (with the high bit set) and let the hardware
2218 * find the key w/o using the key id. This is preferred as
2219 * it permits us to support multiple users for adhoc and/or
2220 * multi-station operation.
2222 if (k->wk_keyix != IEEE80211_KEYIX_NONE) {
2224 * Only global keys should have key index assigned.
2226 if (!(&vap->iv_nw_keys[0] <= k &&
2227 k < &vap->iv_nw_keys[IEEE80211_WEP_NKID])) {
2228 /* should not happen */
2229 DPRINTF(sc, ATH_DEBUG_KEYCACHE,
2230 "%s: bogus group key\n", __func__);
2233 if (vap->iv_opmode != IEEE80211_M_HOSTAP ||
2234 !(k->wk_flags & IEEE80211_KEY_GROUP) ||
2237 * XXX we pre-allocate the global keys so
2238 * have no way to check if they've already
2241 *keyix = *rxkeyix = k - vap->iv_nw_keys;
2245 * Group key and device supports multicast key search.
2247 k->wk_keyix = IEEE80211_KEYIX_NONE;
2251 * We allocate two pair for TKIP when using the h/w to do
2252 * the MIC. For everything else, including software crypto,
2253 * we allocate a single entry. Note that s/w crypto requires
2254 * a pass-through slot on the 5211 and 5212. The 5210 does
2255 * not support pass-through cache entries and we map all
2256 * those requests to slot 0.
2258 if (k->wk_flags & IEEE80211_KEY_SWCRYPT) {
2259 return key_alloc_single(sc, keyix, rxkeyix);
2260 } else if (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_TKIP &&
2261 (k->wk_flags & IEEE80211_KEY_SWMIC) == 0) {
2262 if (sc->sc_splitmic)
2263 return key_alloc_2pair(sc, keyix, rxkeyix);
2265 return key_alloc_pair(sc, keyix, rxkeyix);
2267 return key_alloc_single(sc, keyix, rxkeyix);
2272 * Delete an entry in the key cache allocated by ath_key_alloc.
2275 ath_key_delete(struct ieee80211vap *vap, const struct ieee80211_key *k)
2277 struct ath_softc *sc = vap->iv_ic->ic_ifp->if_softc;
2278 struct ath_hal *ah = sc->sc_ah;
2279 const struct ieee80211_cipher *cip = k->wk_cipher;
2280 u_int keyix = k->wk_keyix;
2282 DPRINTF(sc, ATH_DEBUG_KEYCACHE, "%s: delete key %u\n", __func__, keyix);
2284 ath_hal_keyreset(ah, keyix);
2286 * Handle split tx/rx keying required for TKIP with h/w MIC.
2288 if (cip->ic_cipher == IEEE80211_CIPHER_TKIP &&
2289 (k->wk_flags & IEEE80211_KEY_SWMIC) == 0 && sc->sc_splitmic)
2290 ath_hal_keyreset(ah, keyix+32); /* RX key */
2291 if (keyix >= IEEE80211_WEP_NKID) {
2293 * Don't touch keymap entries for global keys so
2294 * they are never considered for dynamic allocation.
2296 clrbit(sc->sc_keymap, keyix);
2297 if (cip->ic_cipher == IEEE80211_CIPHER_TKIP &&
2298 (k->wk_flags & IEEE80211_KEY_SWMIC) == 0) {
2299 clrbit(sc->sc_keymap, keyix+64); /* TX key MIC */
2300 if (sc->sc_splitmic) {
2301 /* +32 for RX key, +32+64 for RX key MIC */
2302 clrbit(sc->sc_keymap, keyix+32);
2303 clrbit(sc->sc_keymap, keyix+32+64);
2311 * Set the key cache contents for the specified key. Key cache
2312 * slot(s) must already have been allocated by ath_key_alloc.
2315 ath_key_set(struct ieee80211vap *vap, const struct ieee80211_key *k,
2316 const u_int8_t mac[IEEE80211_ADDR_LEN])
2318 struct ath_softc *sc = vap->iv_ic->ic_ifp->if_softc;
2320 return ath_keyset(sc, k, vap->iv_bss);
2324 * Block/unblock tx+rx processing while a key change is done.
2325 * We assume the caller serializes key management operations
2326 * so we only need to worry about synchronization with other
2327 * uses that originate in the driver.
2330 ath_key_update_begin(struct ieee80211vap *vap)
2332 struct ifnet *ifp = vap->iv_ic->ic_ifp;
2333 struct ath_softc *sc = ifp->if_softc;
2335 DPRINTF(sc, ATH_DEBUG_KEYCACHE, "%s:\n", __func__);
2336 taskqueue_block(sc->sc_tq);
2340 ath_key_update_end(struct ieee80211vap *vap)
2342 struct ifnet *ifp = vap->iv_ic->ic_ifp;
2343 struct ath_softc *sc = ifp->if_softc;
2345 DPRINTF(sc, ATH_DEBUG_KEYCACHE, "%s:\n", __func__);
2346 taskqueue_unblock(sc->sc_tq);
2350 * Calculate the receive filter according to the
2351 * operating mode and state:
2353 * o always accept unicast, broadcast, and multicast traffic
2354 * o accept PHY error frames when hardware doesn't have MIB support
2355 * to count and we need them for ANI (sta mode only until recently)
2356 * and we are not scanning (ANI is disabled)
2357 * NB: older hal's add rx filter bits out of sight and we need to
2358 * blindly preserve them
2359 * o probe request frames are accepted only when operating in
2360 * hostap, adhoc, mesh, or monitor modes
2361 * o enable promiscuous mode
2362 * - when in monitor mode
2363 * - if interface marked PROMISC (assumes bridge setting is filtered)
2365 * - when operating in station mode for collecting rssi data when
2366 * the station is otherwise quiet, or
2367 * - when operating in adhoc mode so the 802.11 layer creates
2368 * node table entries for peers,
2370 * - when doing s/w beacon miss (e.g. for ap+sta)
2371 * - when operating in ap mode in 11g to detect overlapping bss that
2372 * require protection
2373 * - when operating in mesh mode to detect neighbors
2374 * o accept control frames:
2375 * - when in monitor mode
2376 * XXX BAR frames for 11n
2377 * XXX HT protection for 11n
2380 ath_calcrxfilter(struct ath_softc *sc)
2382 struct ifnet *ifp = sc->sc_ifp;
2383 struct ieee80211com *ic = ifp->if_l2com;
2386 rfilt = HAL_RX_FILTER_UCAST | HAL_RX_FILTER_BCAST | HAL_RX_FILTER_MCAST;
2387 if (!sc->sc_needmib && !sc->sc_scanning)
2388 rfilt |= HAL_RX_FILTER_PHYERR;
2389 if (ic->ic_opmode != IEEE80211_M_STA)
2390 rfilt |= HAL_RX_FILTER_PROBEREQ;
2391 /* XXX ic->ic_monvaps != 0? */
2392 if (ic->ic_opmode == IEEE80211_M_MONITOR || (ifp->if_flags & IFF_PROMISC))
2393 rfilt |= HAL_RX_FILTER_PROM;
2394 if (ic->ic_opmode == IEEE80211_M_STA ||
2395 ic->ic_opmode == IEEE80211_M_IBSS ||
2396 sc->sc_swbmiss || sc->sc_scanning)
2397 rfilt |= HAL_RX_FILTER_BEACON;
2399 * NB: We don't recalculate the rx filter when
2400 * ic_protmode changes; otherwise we could do
2401 * this only when ic_protmode != NONE.
2403 if (ic->ic_opmode == IEEE80211_M_HOSTAP &&
2404 IEEE80211_IS_CHAN_ANYG(ic->ic_curchan))
2405 rfilt |= HAL_RX_FILTER_BEACON;
2406 if (sc->sc_nmeshvaps) {
2407 rfilt |= HAL_RX_FILTER_BEACON;
2408 if (sc->sc_hasbmatch)
2409 rfilt |= HAL_RX_FILTER_BSSID;
2411 rfilt |= HAL_RX_FILTER_PROM;
2413 if (ic->ic_opmode == IEEE80211_M_MONITOR)
2414 rfilt |= HAL_RX_FILTER_CONTROL;
2415 DPRINTF(sc, ATH_DEBUG_MODE, "%s: RX filter 0x%x, %s if_flags 0x%x\n",
2416 __func__, rfilt, ieee80211_opmode_name[ic->ic_opmode], ifp->if_flags);
2421 ath_update_promisc(struct ifnet *ifp)
2423 struct ath_softc *sc = ifp->if_softc;
2426 /* configure rx filter */
2427 rfilt = ath_calcrxfilter(sc);
2428 ath_hal_setrxfilter(sc->sc_ah, rfilt);
2430 DPRINTF(sc, ATH_DEBUG_MODE, "%s: RX filter 0x%x\n", __func__, rfilt);
2434 ath_update_mcast(struct ifnet *ifp)
2436 struct ath_softc *sc = ifp->if_softc;
2439 /* calculate and install multicast filter */
2440 if ((ifp->if_flags & IFF_ALLMULTI) == 0) {
2441 struct ifmultiaddr *ifma;
2443 * Merge multicast addresses to form the hardware filter.
2445 mfilt[0] = mfilt[1] = 0;
2447 if_maddr_rlock(ifp); /* XXX need some fiddling to remove? */
2449 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
2454 /* calculate XOR of eight 6bit values */
2455 dl = LLADDR((struct sockaddr_dl *) ifma->ifma_addr);
2456 val = LE_READ_4(dl + 0);
2457 pos = (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val;
2458 val = LE_READ_4(dl + 3);
2459 pos ^= (val >> 18) ^ (val >> 12) ^ (val >> 6) ^ val;
2461 mfilt[pos / 32] |= (1 << (pos % 32));
2464 if_maddr_runlock(ifp);
2467 mfilt[0] = mfilt[1] = ~0;
2468 ath_hal_setmcastfilter(sc->sc_ah, mfilt[0], mfilt[1]);
2469 DPRINTF(sc, ATH_DEBUG_MODE, "%s: MC filter %08x:%08x\n",
2470 __func__, mfilt[0], mfilt[1]);
2474 ath_mode_init(struct ath_softc *sc)
2476 struct ifnet *ifp = sc->sc_ifp;
2477 struct ath_hal *ah = sc->sc_ah;
2480 /* configure rx filter */
2481 rfilt = ath_calcrxfilter(sc);
2482 ath_hal_setrxfilter(ah, rfilt);
2484 /* configure operational mode */
2485 ath_hal_setopmode(ah);
2487 /* handle any link-level address change */
2488 ath_hal_setmac(ah, IF_LLADDR(ifp));
2490 /* calculate and install multicast filter */
2491 ath_update_mcast(ifp);
2495 * Set the slot time based on the current setting.
2498 ath_setslottime(struct ath_softc *sc)
2500 struct ieee80211com *ic = sc->sc_ifp->if_l2com;
2501 struct ath_hal *ah = sc->sc_ah;
2504 if (IEEE80211_IS_CHAN_HALF(ic->ic_curchan))
2506 else if (IEEE80211_IS_CHAN_QUARTER(ic->ic_curchan))
2508 else if (IEEE80211_IS_CHAN_ANYG(ic->ic_curchan)) {
2509 /* honor short/long slot time only in 11g */
2510 /* XXX shouldn't honor on pure g or turbo g channel */
2511 if (ic->ic_flags & IEEE80211_F_SHSLOT)
2512 usec = HAL_SLOT_TIME_9;
2514 usec = HAL_SLOT_TIME_20;
2516 usec = HAL_SLOT_TIME_9;
2518 DPRINTF(sc, ATH_DEBUG_RESET,
2519 "%s: chan %u MHz flags 0x%x %s slot, %u usec\n",
2520 __func__, ic->ic_curchan->ic_freq, ic->ic_curchan->ic_flags,
2521 ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long", usec);
2523 ath_hal_setslottime(ah, usec);
2524 sc->sc_updateslot = OK;
2528 * Callback from the 802.11 layer to update the
2529 * slot time based on the current setting.
2532 ath_updateslot(struct ifnet *ifp)
2534 struct ath_softc *sc = ifp->if_softc;
2535 struct ieee80211com *ic = ifp->if_l2com;
2538 * When not coordinating the BSS, change the hardware
2539 * immediately. For other operation we defer the change
2540 * until beacon updates have propagated to the stations.
2542 if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
2543 ic->ic_opmode == IEEE80211_M_MBSS)
2544 sc->sc_updateslot = UPDATE;
2546 ath_setslottime(sc);
2550 * Setup a h/w transmit queue for beacons.
2553 ath_beaconq_setup(struct ath_hal *ah)
2557 memset(&qi, 0, sizeof(qi));
2558 qi.tqi_aifs = HAL_TXQ_USEDEFAULT;
2559 qi.tqi_cwmin = HAL_TXQ_USEDEFAULT;
2560 qi.tqi_cwmax = HAL_TXQ_USEDEFAULT;
2561 /* NB: for dynamic turbo, don't enable any other interrupts */
2562 qi.tqi_qflags = HAL_TXQ_TXDESCINT_ENABLE;
2563 return ath_hal_setuptxqueue(ah, HAL_TX_QUEUE_BEACON, &qi);
2567 * Setup the transmit queue parameters for the beacon queue.
2570 ath_beaconq_config(struct ath_softc *sc)
2572 #define ATH_EXPONENT_TO_VALUE(v) ((1<<(v))-1)
2573 struct ieee80211com *ic = sc->sc_ifp->if_l2com;
2574 struct ath_hal *ah = sc->sc_ah;
2577 ath_hal_gettxqueueprops(ah, sc->sc_bhalq, &qi);
2578 if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
2579 ic->ic_opmode == IEEE80211_M_MBSS) {
2581 * Always burst out beacon and CAB traffic.
2583 qi.tqi_aifs = ATH_BEACON_AIFS_DEFAULT;
2584 qi.tqi_cwmin = ATH_BEACON_CWMIN_DEFAULT;
2585 qi.tqi_cwmax = ATH_BEACON_CWMAX_DEFAULT;
2587 struct wmeParams *wmep =
2588 &ic->ic_wme.wme_chanParams.cap_wmeParams[WME_AC_BE];
2590 * Adhoc mode; important thing is to use 2x cwmin.
2592 qi.tqi_aifs = wmep->wmep_aifsn;
2593 qi.tqi_cwmin = 2*ATH_EXPONENT_TO_VALUE(wmep->wmep_logcwmin);
2594 qi.tqi_cwmax = ATH_EXPONENT_TO_VALUE(wmep->wmep_logcwmax);
2597 if (!ath_hal_settxqueueprops(ah, sc->sc_bhalq, &qi)) {
2598 device_printf(sc->sc_dev, "unable to update parameters for "
2599 "beacon hardware queue!\n");
2602 ath_hal_resettxqueue(ah, sc->sc_bhalq); /* push to h/w */
2605 #undef ATH_EXPONENT_TO_VALUE
2609 * Allocate and setup an initial beacon frame.
2612 ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_node *ni)
2614 struct ieee80211vap *vap = ni->ni_vap;
2615 struct ath_vap *avp = ATH_VAP(vap);
2621 if (bf->bf_m != NULL) {
2622 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
2626 if (bf->bf_node != NULL) {
2627 ieee80211_free_node(bf->bf_node);
2632 * NB: the beacon data buffer must be 32-bit aligned;
2633 * we assume the mbuf routines will return us something
2634 * with this alignment (perhaps should assert).
2636 m = ieee80211_beacon_alloc(ni, &avp->av_boff);
2638 device_printf(sc->sc_dev, "%s: cannot get mbuf\n", __func__);
2639 sc->sc_stats.ast_be_nombuf++;
2642 error = bus_dmamap_load_mbuf_segment(sc->sc_dmat, bf->bf_dmamap, m,
2643 bf->bf_segs, 1, &bf->bf_nseg,
2646 device_printf(sc->sc_dev,
2647 "%s: cannot map mbuf, bus_dmamap_load_mbuf_segment returns %d\n",
2654 * Calculate a TSF adjustment factor required for staggered
2655 * beacons. Note that we assume the format of the beacon
2656 * frame leaves the tstamp field immediately following the
2659 if (sc->sc_stagbeacons && avp->av_bslot > 0) {
2661 struct ieee80211_frame *wh;
2664 * The beacon interval is in TU's; the TSF is in usecs.
2665 * We figure out how many TU's to add to align the timestamp
2666 * then convert to TSF units and handle byte swapping before
2667 * inserting it in the frame. The hardware will then add this
2668 * each time a beacon frame is sent. Note that we align vap's
2669 * 1..N and leave vap 0 untouched. This means vap 0 has a
2670 * timestamp in one beacon interval while the others get a
2671 * timstamp aligned to the next interval.
2673 tsfadjust = ni->ni_intval *
2674 (ATH_BCBUF - avp->av_bslot) / ATH_BCBUF;
2675 tsfadjust = htole64(tsfadjust << 10); /* TU -> TSF */
2677 DPRINTF(sc, ATH_DEBUG_BEACON,
2678 "%s: %s beacons bslot %d intval %u tsfadjust %llu\n",
2679 __func__, sc->sc_stagbeacons ? "stagger" : "burst",
2680 avp->av_bslot, ni->ni_intval,
2681 (long long unsigned) le64toh(tsfadjust));
2683 wh = mtod(m, struct ieee80211_frame *);
2684 memcpy(&wh[1], &tsfadjust, sizeof(tsfadjust));
2687 bf->bf_node = ieee80211_ref_node(ni);
2693 * Setup the beacon frame for transmit.
2696 ath_beacon_setup(struct ath_softc *sc, struct ath_buf *bf)
2698 #define USE_SHPREAMBLE(_ic) \
2699 (((_ic)->ic_flags & (IEEE80211_F_SHPREAMBLE | IEEE80211_F_USEBARKER))\
2700 == IEEE80211_F_SHPREAMBLE)
2701 struct ieee80211_node *ni = bf->bf_node;
2702 struct ieee80211com *ic = ni->ni_ic;
2703 struct mbuf *m = bf->bf_m;
2704 struct ath_hal *ah = sc->sc_ah;
2705 struct ath_desc *ds;
2707 const HAL_RATE_TABLE *rt;
2710 DPRINTF(sc, ATH_DEBUG_BEACON_PROC, "%s: m %p len %u\n",
2711 __func__, m, m->m_len);
2713 /* setup descriptors */
2716 flags = HAL_TXDESC_NOACK;
2717 if (ic->ic_opmode == IEEE80211_M_IBSS && sc->sc_hasveol) {
2718 ds->ds_link = bf->bf_daddr; /* self-linked */
2719 flags |= HAL_TXDESC_VEOL;
2721 * Let hardware handle antenna switching.
2723 antenna = sc->sc_txantenna;
2727 * Switch antenna every 4 beacons.
2728 * XXX assumes two antenna
2730 if (sc->sc_txantenna != 0)
2731 antenna = sc->sc_txantenna;
2732 else if (sc->sc_stagbeacons && sc->sc_nbcnvaps != 0)
2733 antenna = ((sc->sc_stats.ast_be_xmit / sc->sc_nbcnvaps) & 4 ? 2 : 1);
2735 antenna = (sc->sc_stats.ast_be_xmit & 4 ? 2 : 1);
2738 KASSERT(bf->bf_nseg == 1,
2739 ("multi-segment beacon frame; nseg %u", bf->bf_nseg));
2740 ds->ds_data = bf->bf_segs[0].ds_addr;
2742 * Calculate rate code.
2743 * XXX everything at min xmit rate
2746 rt = sc->sc_currates;
2747 rate = rt->info[rix].rateCode;
2748 if (USE_SHPREAMBLE(ic))
2749 rate |= rt->info[rix].shortPreamble;
2750 ath_hal_setuptxdesc(ah, ds
2751 , m->m_len + IEEE80211_CRC_LEN /* frame length */
2752 , sizeof(struct ieee80211_frame)/* header length */
2753 , HAL_PKT_TYPE_BEACON /* Atheros packet type */
2754 , ni->ni_txpower /* txpower XXX */
2755 , rate, 1 /* series 0 rate/tries */
2756 , HAL_TXKEYIX_INVALID /* no encryption */
2757 , antenna /* antenna mode */
2758 , flags /* no ack, veol for beacons */
2759 , 0 /* rts/cts rate */
2760 , 0 /* rts/cts duration */
2762 /* NB: beacon's BufLen must be a multiple of 4 bytes */
2763 ath_hal_filltxdesc(ah, ds
2764 , roundup(m->m_len, 4) /* buffer length */
2765 , AH_TRUE /* first segment */
2766 , AH_TRUE /* last segment */
2767 , ds /* first descriptor */
2772 #undef USE_SHPREAMBLE
2776 ath_beacon_update(struct ieee80211vap *vap, int item)
2778 struct ieee80211_beacon_offsets *bo = &ATH_VAP(vap)->av_boff;
2780 setbit(bo->bo_flags, item);
2784 * Append the contents of src to dst; both queues
2785 * are assumed to be locked.
2788 ath_txqmove(struct ath_txq *dst, struct ath_txq *src)
2790 STAILQ_CONCAT(&dst->axq_q, &src->axq_q);
2792 dst->axq_link = src->axq_link;
2793 src->axq_link = NULL;
2794 dst->axq_depth += src->axq_depth;
2799 * Transmit a beacon frame at SWBA. Dynamic updates to the
2800 * frame contents are done as needed and the slot time is
2801 * also adjusted based on current state.
2804 ath_beacon_proc(void *arg, int pending)
2806 struct ath_softc *sc = arg;
2807 struct ath_hal *ah = sc->sc_ah;
2808 struct ieee80211vap *vap;
2813 DPRINTF(sc, ATH_DEBUG_BEACON_PROC, "%s: pending %u\n",
2816 * Check if the previous beacon has gone out. If
2817 * not don't try to post another, skip this period
2818 * and wait for the next. Missed beacons indicate
2819 * a problem and should not occur. If we miss too
2820 * many consecutive beacons reset the device.
2822 if (ath_hal_numtxpending(ah, sc->sc_bhalq) != 0) {
2823 sc->sc_bmisscount++;
2824 DPRINTF(sc, ATH_DEBUG_BEACON,
2825 "%s: missed %u consecutive beacons\n",
2826 __func__, sc->sc_bmisscount);
2827 if (sc->sc_bmisscount >= ath_bstuck_threshold)
2828 taskqueue_enqueue(sc->sc_tq, &sc->sc_bstucktask);
2831 if (sc->sc_bmisscount != 0) {
2832 DPRINTF(sc, ATH_DEBUG_BEACON,
2833 "%s: resume beacon xmit after %u misses\n",
2834 __func__, sc->sc_bmisscount);
2835 sc->sc_bmisscount = 0;
2839 * Stop any current dma before messing with the beacon linkages.
2841 if (!ath_hal_stoptxdma(ah, sc->sc_bhalq)) {
2842 DPRINTF(sc, ATH_DEBUG_ANY,
2843 "%s: beacon queue %u did not stop?\n",
2844 __func__, sc->sc_bhalq);
2847 if (sc->sc_stagbeacons) { /* staggered beacons */
2848 struct ieee80211com *ic = sc->sc_ifp->if_l2com;
2851 tsftu = ath_hal_gettsf32(ah) >> 10;
2853 slot = ((tsftu % ic->ic_lintval) * ATH_BCBUF) / ic->ic_lintval;
2854 vap = sc->sc_bslot[(slot+1) % ATH_BCBUF];
2856 if (vap != NULL && vap->iv_state >= IEEE80211_S_RUN) {
2857 bf = ath_beacon_generate(sc, vap);
2859 bfaddr = bf->bf_daddr;
2861 } else { /* burst'd beacons */
2862 uint32_t *bflink = &bfaddr;
2864 for (slot = 0; slot < ATH_BCBUF; slot++) {
2865 vap = sc->sc_bslot[slot];
2866 if (vap != NULL && vap->iv_state >= IEEE80211_S_RUN) {
2867 bf = ath_beacon_generate(sc, vap);
2869 *bflink = bf->bf_daddr;
2870 bflink = &bf->bf_desc->ds_link;
2874 *bflink = 0; /* terminate list */
2878 * Handle slot time change when a non-ERP station joins/leaves
2879 * an 11g network. The 802.11 layer notifies us via callback,
2880 * we mark updateslot, then wait one beacon before effecting
2881 * the change. This gives associated stations at least one
2882 * beacon interval to note the state change.
2885 if (sc->sc_updateslot == UPDATE) {
2886 sc->sc_updateslot = COMMIT; /* commit next beacon */
2887 sc->sc_slotupdate = slot;
2888 } else if (sc->sc_updateslot == COMMIT && sc->sc_slotupdate == slot)
2889 ath_setslottime(sc); /* commit change to h/w */
2892 * Check recent per-antenna transmit statistics and flip
2893 * the default antenna if noticeably more frames went out
2894 * on the non-default antenna.
2895 * XXX assumes 2 anntenae
2897 if (!sc->sc_diversity && (!sc->sc_stagbeacons || slot == 0)) {
2898 otherant = sc->sc_defant & 1 ? 2 : 1;
2899 if (sc->sc_ant_tx[otherant] > sc->sc_ant_tx[sc->sc_defant] + 2)
2900 ath_setdefantenna(sc, otherant);
2901 sc->sc_ant_tx[1] = sc->sc_ant_tx[2] = 0;
2905 /* NB: cabq traffic should already be queued and primed */
2906 ath_hal_puttxbuf(ah, sc->sc_bhalq, bfaddr);
2907 sc->sc_stats.ast_be_xmit++;
2908 ath_hal_txstart(ah, sc->sc_bhalq);
2910 /* else no beacon will be generated */
2913 static struct ath_buf *
2914 ath_beacon_generate(struct ath_softc *sc, struct ieee80211vap *vap)
2916 struct ath_vap *avp = ATH_VAP(vap);
2917 struct ath_txq *cabq = sc->sc_cabq;
2922 KASSERT(vap->iv_state >= IEEE80211_S_RUN,
2923 ("not running, state %d", vap->iv_state));
2924 KASSERT(avp->av_bcbuf != NULL, ("no beacon buffer"));
2927 * Update dynamic beacon contents. If this returns
2928 * non-zero then we need to remap the memory because
2929 * the beacon frame changed size (probably because
2930 * of the TIM bitmap).
2934 nmcastq = avp->av_mcastq.axq_depth;
2935 if (ieee80211_beacon_update(bf->bf_node, &avp->av_boff, m, nmcastq)) {
2936 /* XXX too conservative? */
2937 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
2938 error = bus_dmamap_load_mbuf_segment(sc->sc_dmat, bf->bf_dmamap, m,
2939 bf->bf_segs, 1, &bf->bf_nseg,
2942 if_printf(vap->iv_ifp,
2943 "%s: bus_dmamap_load_mbuf_segment failed, error %u\n",
2948 if ((avp->av_boff.bo_tim[4] & 1) && cabq->axq_depth) {
2949 DPRINTF(sc, ATH_DEBUG_BEACON,
2950 "%s: cabq did not drain, mcastq %u cabq %u\n",
2951 __func__, nmcastq, cabq->axq_depth);
2952 sc->sc_stats.ast_cabq_busy++;
2953 if (sc->sc_nvaps > 1 && sc->sc_stagbeacons) {
2955 * CABQ traffic from a previous vap is still pending.
2956 * We must drain the q before this beacon frame goes
2957 * out as otherwise this vap's stations will get cab
2958 * frames from a different vap.
2959 * XXX could be slow causing us to miss DBA
2961 ath_tx_draintxq(sc, cabq);
2964 ath_beacon_setup(sc, bf);
2965 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
2968 * Enable the CAB queue before the beacon queue to
2969 * insure cab frames are triggered by this beacon.
2971 if (avp->av_boff.bo_tim[4] & 1) {
2972 struct ath_hal *ah = sc->sc_ah;
2974 /* NB: only at DTIM */
2976 struct ath_buf *bfm;
2980 * Move frames from the s/w mcast q to the h/w cab q.
2983 bfm = STAILQ_FIRST(&avp->av_mcastq.axq_q);
2984 qbusy = ath_hal_txqenabled(ah, cabq->axq_qnum);
2986 if (cabq->axq_link != NULL) {
2988 *cabq->axq_link = bfm->bf_daddr;
2989 cabq->axq_flags |= ATH_TXQ_PUTPENDING;
2992 ath_hal_puttxbuf(ah, cabq->axq_qnum,
2996 if (cabq->axq_link != NULL) {
2998 *cabq->axq_link = bfm->bf_daddr;
3000 cabq->axq_flags |= ATH_TXQ_PUTPENDING;
3002 ath_txqmove(cabq, &avp->av_mcastq);
3004 sc->sc_stats.ast_cabq_xmit += nmcastq;
3006 /* NB: gated by beacon so safe to start here */
3007 ath_hal_txstart(ah, cabq->axq_qnum);
3013 ath_beacon_start_adhoc(struct ath_softc *sc, struct ieee80211vap *vap)
3015 struct ath_vap *avp = ATH_VAP(vap);
3016 struct ath_hal *ah = sc->sc_ah;
3021 KASSERT(avp->av_bcbuf != NULL, ("no beacon buffer"));
3024 * Update dynamic beacon contents. If this returns
3025 * non-zero then we need to remap the memory because
3026 * the beacon frame changed size (probably because
3027 * of the TIM bitmap).
3031 if (ieee80211_beacon_update(bf->bf_node, &avp->av_boff, m, 0)) {
3032 /* XXX too conservative? */
3033 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
3034 error = bus_dmamap_load_mbuf_segment(sc->sc_dmat, bf->bf_dmamap, m,
3035 bf->bf_segs, 1, &bf->bf_nseg,
3038 if_printf(vap->iv_ifp,
3039 "%s: bus_dmamap_load_mbuf_segment failed, error %u\n",
3044 ath_beacon_setup(sc, bf);
3045 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
3047 /* NB: caller is known to have already stopped tx dma */
3048 ath_hal_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr);
3049 ath_hal_txstart(ah, sc->sc_bhalq);
3053 * Reset the hardware after detecting beacons have stopped.
3056 ath_bstuck_task(void *arg, int pending)
3058 struct ath_softc *sc = arg;
3059 struct ifnet *ifp = sc->sc_ifp;
3061 wlan_serialize_enter();
3062 if_printf(ifp, "stuck beacon; resetting (bmiss count %u)\n",
3064 sc->sc_stats.ast_bstuck++;
3066 wlan_serialize_exit();
3070 * Reclaim beacon resources and return buffer to the pool.
3073 ath_beacon_return(struct ath_softc *sc, struct ath_buf *bf)
3076 if (bf->bf_m != NULL) {
3077 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
3081 if (bf->bf_node != NULL) {
3082 ieee80211_free_node(bf->bf_node);
3085 STAILQ_INSERT_TAIL(&sc->sc_bbuf, bf, bf_list);
3089 * Reclaim beacon resources.
3092 ath_beacon_free(struct ath_softc *sc)
3096 STAILQ_FOREACH(bf, &sc->sc_bbuf, bf_list) {
3097 if (bf->bf_m != NULL) {
3098 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
3102 if (bf->bf_node != NULL) {
3103 ieee80211_free_node(bf->bf_node);
3110 * Configure the beacon and sleep timers.
3112 * When operating as an AP this resets the TSF and sets
3113 * up the hardware to notify us when we need to issue beacons.
3115 * When operating in station mode this sets up the beacon
3116 * timers according to the timestamp of the last received
3117 * beacon and the current TSF, configures PCF and DTIM
3118 * handling, programs the sleep registers so the hardware
3119 * will wakeup in time to receive beacons, and configures
3120 * the beacon miss handling so we'll receive a BMISS
3121 * interrupt when we stop seeing beacons from the AP
3122 * we've associated with.
3125 ath_beacon_config(struct ath_softc *sc, struct ieee80211vap *vap)
3127 #define TSF_TO_TU(_h,_l) \
3128 ((((u_int32_t)(_h)) << 22) | (((u_int32_t)(_l)) >> 10))
3130 struct ath_hal *ah = sc->sc_ah;
3131 struct ieee80211com *ic = sc->sc_ifp->if_l2com;
3132 struct ieee80211_node *ni;
3133 u_int32_t nexttbtt, intval, tsftu;
3137 vap = TAILQ_FIRST(&ic->ic_vaps); /* XXX */
3140 /* extract tstamp from last beacon and convert to TU */
3141 nexttbtt = TSF_TO_TU(LE_READ_4(ni->ni_tstamp.data + 4),
3142 LE_READ_4(ni->ni_tstamp.data));
3143 if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
3144 ic->ic_opmode == IEEE80211_M_MBSS) {
3146 * For multi-bss ap/mesh support beacons are either staggered
3147 * evenly over N slots or burst together. For the former
3148 * arrange for the SWBA to be delivered for each slot.
3149 * Slots that are not occupied will generate nothing.
3151 /* NB: the beacon interval is kept internally in TU's */
3152 intval = ni->ni_intval & HAL_BEACON_PERIOD;
3153 if (sc->sc_stagbeacons)
3154 intval /= ATH_BCBUF;
3156 /* NB: the beacon interval is kept internally in TU's */
3157 intval = ni->ni_intval & HAL_BEACON_PERIOD;
3159 if (nexttbtt == 0) /* e.g. for ap mode */
3161 else if (intval) /* NB: can be 0 for monitor mode */
3162 nexttbtt = roundup(nexttbtt, intval);
3163 DPRINTF(sc, ATH_DEBUG_BEACON, "%s: nexttbtt %u intval %u (%u)\n",
3164 __func__, nexttbtt, intval, ni->ni_intval);
3165 if (ic->ic_opmode == IEEE80211_M_STA && !sc->sc_swbmiss) {
3166 HAL_BEACON_STATE bs;
3167 int dtimperiod, dtimcount;
3168 int cfpperiod, cfpcount;
3171 * Setup dtim and cfp parameters according to
3172 * last beacon we received (which may be none).
3174 dtimperiod = ni->ni_dtim_period;
3175 if (dtimperiod <= 0) /* NB: 0 if not known */
3177 dtimcount = ni->ni_dtim_count;
3178 if (dtimcount >= dtimperiod) /* NB: sanity check */
3179 dtimcount = 0; /* XXX? */
3180 cfpperiod = 1; /* NB: no PCF support yet */
3183 * Pull nexttbtt forward to reflect the current
3184 * TSF and calculate dtim+cfp state for the result.
3186 tsf = ath_hal_gettsf64(ah);
3187 tsftu = TSF_TO_TU(tsf>>32, tsf) + FUDGE;
3190 if (--dtimcount < 0) {
3191 dtimcount = dtimperiod - 1;
3193 cfpcount = cfpperiod - 1;
3195 } while (nexttbtt < tsftu);
3196 memset(&bs, 0, sizeof(bs));
3197 bs.bs_intval = intval;
3198 bs.bs_nexttbtt = nexttbtt;
3199 bs.bs_dtimperiod = dtimperiod*intval;
3200 bs.bs_nextdtim = bs.bs_nexttbtt + dtimcount*intval;
3201 bs.bs_cfpperiod = cfpperiod*bs.bs_dtimperiod;
3202 bs.bs_cfpnext = bs.bs_nextdtim + cfpcount*bs.bs_dtimperiod;
3203 bs.bs_cfpmaxduration = 0;
3206 * The 802.11 layer records the offset to the DTIM
3207 * bitmap while receiving beacons; use it here to
3208 * enable h/w detection of our AID being marked in
3209 * the bitmap vector (to indicate frames for us are
3210 * pending at the AP).
3211 * XXX do DTIM handling in s/w to WAR old h/w bugs
3212 * XXX enable based on h/w rev for newer chips
3214 bs.bs_timoffset = ni->ni_timoff;
3217 * Calculate the number of consecutive beacons to miss
3218 * before taking a BMISS interrupt.
3219 * Note that we clamp the result to at most 10 beacons.
3221 bs.bs_bmissthreshold = vap->iv_bmissthreshold;
3222 if (bs.bs_bmissthreshold > 10)
3223 bs.bs_bmissthreshold = 10;
3224 else if (bs.bs_bmissthreshold <= 0)
3225 bs.bs_bmissthreshold = 1;
3228 * Calculate sleep duration. The configuration is
3229 * given in ms. We insure a multiple of the beacon
3230 * period is used. Also, if the sleep duration is
3231 * greater than the DTIM period then it makes senses
3232 * to make it a multiple of that.
3234 * XXX fixed at 100ms
3236 bs.bs_sleepduration =
3237 roundup(IEEE80211_MS_TO_TU(100), bs.bs_intval);
3238 if (bs.bs_sleepduration > bs.bs_dtimperiod)
3239 bs.bs_sleepduration = roundup(bs.bs_sleepduration, bs.bs_dtimperiod);
3241 DPRINTF(sc, ATH_DEBUG_BEACON,
3242 "%s: tsf %ju tsf:tu %u intval %u nexttbtt %u dtim %u nextdtim %u bmiss %u sleep %u cfp:period %u maxdur %u next %u timoffset %u\n"
3249 , bs.bs_bmissthreshold
3250 , bs.bs_sleepduration
3252 , bs.bs_cfpmaxduration
3256 ath_hal_intrset(ah, 0);
3257 ath_hal_beacontimers(ah, &bs);
3258 sc->sc_imask |= HAL_INT_BMISS;
3259 ath_hal_intrset(ah, sc->sc_imask);
3261 ath_hal_intrset(ah, 0);
3262 if (nexttbtt == intval)
3263 intval |= HAL_BEACON_RESET_TSF;
3264 if (ic->ic_opmode == IEEE80211_M_IBSS) {
3266 * In IBSS mode enable the beacon timers but only
3267 * enable SWBA interrupts if we need to manually
3268 * prepare beacon frames. Otherwise we use a
3269 * self-linked tx descriptor and let the hardware
3272 intval |= HAL_BEACON_ENA;
3273 if (!sc->sc_hasveol)
3274 sc->sc_imask |= HAL_INT_SWBA;
3275 if ((intval & HAL_BEACON_RESET_TSF) == 0) {
3277 * Pull nexttbtt forward to reflect
3280 tsf = ath_hal_gettsf64(ah);
3281 tsftu = TSF_TO_TU(tsf>>32, tsf) + FUDGE;
3284 } while (nexttbtt < tsftu);
3286 ath_beaconq_config(sc);
3287 } else if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
3288 ic->ic_opmode == IEEE80211_M_MBSS) {
3290 * In AP/mesh mode we enable the beacon timers
3291 * and SWBA interrupts to prepare beacon frames.
3293 intval |= HAL_BEACON_ENA;
3294 sc->sc_imask |= HAL_INT_SWBA; /* beacon prepare */
3295 ath_beaconq_config(sc);
3297 ath_hal_beaconinit(ah, nexttbtt, intval);
3298 sc->sc_bmisscount = 0;
3299 ath_hal_intrset(ah, sc->sc_imask);
3301 * When using a self-linked beacon descriptor in
3302 * ibss mode load it once here.
3304 if (ic->ic_opmode == IEEE80211_M_IBSS && sc->sc_hasveol)
3305 ath_beacon_start_adhoc(sc, vap);
3307 sc->sc_syncbeacon = 0;
3313 ath_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
3315 bus_addr_t *paddr = (bus_addr_t*) arg;
3316 KASSERT(error == 0, ("error %u on bus_dma callback", error));
3317 *paddr = segs->ds_addr;
3321 ath_descdma_setup(struct ath_softc *sc,
3322 struct ath_descdma *dd, ath_bufhead *head,
3323 const char *name, int nbuf, int ndesc)
3325 #define DS2PHYS(_dd, _ds) \
3326 ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc))
3327 struct ifnet *ifp = sc->sc_ifp;
3328 struct ath_desc *ds;
3330 int i, bsize, error;
3332 DPRINTF(sc, ATH_DEBUG_RESET, "%s: %s DMA: %u buffers %u desc/buf\n",
3333 __func__, name, nbuf, ndesc);
3336 dd->dd_desc_len = sizeof(struct ath_desc) * nbuf * ndesc;
3339 * Setup DMA descriptor area.
3341 error = bus_dma_tag_create(dd->dd_dmat, /* parent */
3342 PAGE_SIZE, 0, /* alignment, bounds */
3343 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
3344 BUS_SPACE_MAXADDR, /* highaddr */
3345 NULL, NULL, /* filter, filterarg */
3346 dd->dd_desc_len, /* maxsize */
3348 dd->dd_desc_len, /* maxsegsize */
3349 BUS_DMA_ALLOCNOW, /* flags */
3352 if_printf(ifp, "cannot allocate %s DMA tag\n", dd->dd_name);
3356 /* allocate descriptors */
3357 error = bus_dmamap_create(dd->dd_dmat, BUS_DMA_NOWAIT, &dd->dd_dmamap);
3359 if_printf(ifp, "unable to create dmamap for %s descriptors, "
3360 "error %u\n", dd->dd_name, error);
3364 error = bus_dmamem_alloc(dd->dd_dmat, (void**) &dd->dd_desc,
3365 BUS_DMA_NOWAIT | BUS_DMA_COHERENT,
3368 if_printf(ifp, "unable to alloc memory for %u %s descriptors, "
3369 "error %u\n", nbuf * ndesc, dd->dd_name, error);
3373 error = bus_dmamap_load(dd->dd_dmat, dd->dd_dmamap,
3374 dd->dd_desc, dd->dd_desc_len,
3375 ath_load_cb, &dd->dd_desc_paddr,
3378 if_printf(ifp, "unable to map %s descriptors, error %u\n",
3379 dd->dd_name, error);
3384 DPRINTF(sc, ATH_DEBUG_RESET, "%s: %s DMA map: %p (%lu) -> %p (%lu)\n",
3385 __func__, dd->dd_name, ds, (u_long) dd->dd_desc_len,
3386 (caddr_t) dd->dd_desc_paddr, /*XXX*/ (u_long) dd->dd_desc_len);
3388 /* allocate rx buffers */
3389 bsize = sizeof(struct ath_buf) * nbuf;
3390 bf = kmalloc(bsize, M_ATHDEV, M_INTWAIT | M_ZERO);
3394 for (i = 0; i < nbuf; i++, bf++, ds += ndesc) {
3396 bf->bf_daddr = DS2PHYS(dd, ds);
3397 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT,
3400 if_printf(ifp, "unable to create dmamap for %s "
3401 "buffer %u, error %u\n", dd->dd_name, i, error);
3402 ath_descdma_cleanup(sc, dd, head);
3405 STAILQ_INSERT_TAIL(head, bf, bf_list);
3409 bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap);
3411 bus_dmamap_destroy(dd->dd_dmat, dd->dd_dmamap);
3413 bus_dma_tag_destroy(dd->dd_dmat);
3414 memset(dd, 0, sizeof(*dd));
3420 ath_descdma_cleanup(struct ath_softc *sc,
3421 struct ath_descdma *dd, ath_bufhead *head)
3424 struct ieee80211_node *ni;
3426 bus_dmamap_unload(dd->dd_dmat, dd->dd_dmamap);
3427 bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap);
3428 bus_dmamap_destroy(dd->dd_dmat, dd->dd_dmamap);
3429 bus_dma_tag_destroy(dd->dd_dmat);
3431 STAILQ_FOREACH(bf, head, bf_list) {
3436 if (bf->bf_dmamap != NULL) {
3437 bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap);
3438 bf->bf_dmamap = NULL;
3444 * Reclaim node reference.
3446 ieee80211_free_node(ni);
3451 kfree(dd->dd_bufptr, M_ATHDEV);
3452 memset(dd, 0, sizeof(*dd));
3456 ath_desc_alloc(struct ath_softc *sc)
3460 error = ath_descdma_setup(sc, &sc->sc_rxdma, &sc->sc_rxbuf,
3461 "rx", ath_rxbuf, 1);
3465 error = ath_descdma_setup(sc, &sc->sc_txdma, &sc->sc_txbuf,
3466 "tx", ath_txbuf, ATH_TXDESC);
3468 ath_descdma_cleanup(sc, &sc->sc_rxdma, &sc->sc_rxbuf);
3472 error = ath_descdma_setup(sc, &sc->sc_bdma, &sc->sc_bbuf,
3473 "beacon", ATH_BCBUF, 1);
3475 ath_descdma_cleanup(sc, &sc->sc_txdma, &sc->sc_txbuf);
3476 ath_descdma_cleanup(sc, &sc->sc_rxdma, &sc->sc_rxbuf);
3483 ath_desc_free(struct ath_softc *sc)
3486 if (sc->sc_bdma.dd_desc_len != 0)
3487 ath_descdma_cleanup(sc, &sc->sc_bdma, &sc->sc_bbuf);
3488 if (sc->sc_txdma.dd_desc_len != 0)
3489 ath_descdma_cleanup(sc, &sc->sc_txdma, &sc->sc_txbuf);
3490 if (sc->sc_rxdma.dd_desc_len != 0)
3491 ath_descdma_cleanup(sc, &sc->sc_rxdma, &sc->sc_rxbuf);
3494 static struct ieee80211_node *
3495 ath_node_alloc(struct ieee80211vap *vap, const uint8_t mac[IEEE80211_ADDR_LEN])
3497 struct ieee80211com *ic = vap->iv_ic;
3498 struct ath_softc *sc = ic->ic_ifp->if_softc;
3499 const size_t space = sizeof(struct ath_node) + sc->sc_rc->arc_space;
3500 struct ath_node *an;
3502 an = kmalloc(space, M_80211_NODE, M_INTWAIT|M_ZERO);
3503 ath_rate_node_init(sc, an);
3505 DPRINTF(sc, ATH_DEBUG_NODE, "%s: an %p\n", __func__, an);
3506 return &an->an_node;
3510 ath_node_free(struct ieee80211_node *ni)
3512 struct ieee80211com *ic = ni->ni_ic;
3513 struct ath_softc *sc = ic->ic_ifp->if_softc;
3515 DPRINTF(sc, ATH_DEBUG_NODE, "%s: ni %p\n", __func__, ni);
3517 ath_rate_node_cleanup(sc, ATH_NODE(ni));
3518 sc->sc_node_free(ni);
3522 ath_node_getsignal(const struct ieee80211_node *ni, int8_t *rssi, int8_t *noise)
3524 struct ieee80211com *ic = ni->ni_ic;
3525 struct ath_softc *sc = ic->ic_ifp->if_softc;
3526 struct ath_hal *ah = sc->sc_ah;
3528 *rssi = ic->ic_node_getrssi(ni);
3529 if (ni->ni_chan != IEEE80211_CHAN_ANYC)
3530 *noise = ath_hal_getchannoise(ah, ni->ni_chan);
3532 *noise = -95; /* nominally correct */
3536 ath_rxbuf_init(struct ath_softc *sc, struct ath_buf *bf)
3538 struct ath_hal *ah = sc->sc_ah;
3541 struct ath_desc *ds;
3546 * NB: by assigning a page to the rx dma buffer we
3547 * implicitly satisfy the Atheros requirement that
3548 * this buffer be cache-line-aligned and sized to be
3549 * multiple of the cache line size. Not doing this
3550 * causes weird stuff to happen (for the 5210 at least).
3552 m = m_getcl(MB_WAIT, MT_DATA, M_PKTHDR);
3554 kprintf("ath_rxbuf_init: no mbuf\n");
3555 DPRINTF(sc, ATH_DEBUG_ANY,
3556 "%s: no mbuf/cluster\n", __func__);
3557 sc->sc_stats.ast_rx_nombuf++;
3560 m->m_pkthdr.len = m->m_len = m->m_ext.ext_size;
3562 error = bus_dmamap_load_mbuf_segment(sc->sc_dmat,
3564 bf->bf_segs, 1, &bf->bf_nseg,
3567 DPRINTF(sc, ATH_DEBUG_ANY,
3568 "%s: bus_dmamap_load_mbuf_segment failed; error %d\n",
3570 sc->sc_stats.ast_rx_busdma++;
3574 KASSERT(bf->bf_nseg == 1,
3575 ("multi-segment packet; nseg %u", bf->bf_nseg));
3578 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREREAD);
3581 * Setup descriptors. For receive we always terminate
3582 * the descriptor list with a self-linked entry so we'll
3583 * not get overrun under high load (as can happen with a
3584 * 5212 when ANI processing enables PHY error frames).
3586 * To insure the last descriptor is self-linked we create
3587 * each descriptor as self-linked and add it to the end. As
3588 * each additional descriptor is added the previous self-linked
3589 * entry is ``fixed'' naturally. This should be safe even
3590 * if DMA is happening. When processing RX interrupts we
3591 * never remove/process the last, self-linked, entry on the
3592 * descriptor list. This insures the hardware always has
3593 * someplace to write a new frame.
3596 ds->ds_link = bf->bf_daddr; /* link to self */
3597 ds->ds_data = bf->bf_segs[0].ds_addr;
3598 ath_hal_setuprxdesc(ah, ds
3599 , m->m_len /* buffer size */
3603 if (sc->sc_rxlink != NULL)
3604 *sc->sc_rxlink = bf->bf_daddr;
3605 sc->sc_rxlink = &ds->ds_link;
3610 * Extend 15-bit time stamp from rx descriptor to
3611 * a full 64-bit TSF using the specified TSF.
3613 static __inline u_int64_t
3614 ath_extend_tsf(u_int32_t rstamp, u_int64_t tsf)
3616 if ((tsf & 0x7fff) < rstamp)
3618 return ((tsf &~ 0x7fff) | rstamp);
3622 * Intercept management frames to collect beacon rssi data
3623 * and to do ibss merges.
3626 ath_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m,
3627 int subtype, int rssi, int nf)
3629 struct ieee80211vap *vap = ni->ni_vap;
3630 struct ath_softc *sc = vap->iv_ic->ic_ifp->if_softc;
3633 * Call up first so subsequent work can use information
3634 * potentially stored in the node (e.g. for ibss merge).
3636 ATH_VAP(vap)->av_recv_mgmt(ni, m, subtype, rssi, nf);
3638 case IEEE80211_FC0_SUBTYPE_BEACON:
3639 /* update rssi statistics for use by the hal */
3640 ATH_RSSI_LPF(sc->sc_halstats.ns_avgbrssi, rssi);
3641 if (sc->sc_syncbeacon &&
3642 ni == vap->iv_bss && vap->iv_state == IEEE80211_S_RUN) {
3644 * Resync beacon timers using the tsf of the beacon
3645 * frame we just received.
3647 ath_beacon_config(sc, vap);
3650 case IEEE80211_FC0_SUBTYPE_PROBE_RESP:
3651 if (vap->iv_opmode == IEEE80211_M_IBSS &&
3652 vap->iv_state == IEEE80211_S_RUN) {
3653 uint32_t rstamp = sc->sc_lastrs->rs_tstamp;
3654 u_int64_t tsf = ath_extend_tsf(rstamp,
3655 ath_hal_gettsf64(sc->sc_ah));
3657 * Handle ibss merge as needed; check the tsf on the
3658 * frame before attempting the merge. The 802.11 spec
3659 * says the station should change it's bssid to match
3660 * the oldest station with the same ssid, where oldest
3661 * is determined by the tsf. Note that hardware
3662 * reconfiguration happens through callback to
3663 * ath_newstate as the state machine will go from
3664 * RUN -> RUN when this happens.
3666 if (le64toh(ni->ni_tstamp.tsf) >= tsf) {
3667 DPRINTF(sc, ATH_DEBUG_STATE,
3668 "ibss merge, rstamp %u tsf %ju "
3669 "tstamp %ju\n", rstamp, (uintmax_t)tsf,
3670 (uintmax_t)ni->ni_tstamp.tsf);
3671 (void) ieee80211_ibss_merge(ni);
3679 * Set the default antenna.
3682 ath_setdefantenna(struct ath_softc *sc, u_int antenna)
3684 struct ath_hal *ah = sc->sc_ah;
3686 /* XXX block beacon interrupts */
3687 ath_hal_setdefantenna(ah, antenna);
3688 if (sc->sc_defant != antenna)
3689 sc->sc_stats.ast_ant_defswitch++;
3690 sc->sc_defant = antenna;
3691 sc->sc_rxotherant = 0;
3695 ath_rx_tap(struct ifnet *ifp, struct mbuf *m,
3696 const struct ath_rx_status *rs, u_int64_t tsf, int16_t nf)
3698 #define CHAN_HT20 htole32(IEEE80211_CHAN_HT20)
3699 #define CHAN_HT40U htole32(IEEE80211_CHAN_HT40U)
3700 #define CHAN_HT40D htole32(IEEE80211_CHAN_HT40D)
3701 #define CHAN_HT (CHAN_HT20|CHAN_HT40U|CHAN_HT40D)
3702 struct ath_softc *sc = ifp->if_softc;
3703 const HAL_RATE_TABLE *rt;
3706 rt = sc->sc_currates;
3707 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
3708 rix = rt->rateCodeToIndex[rs->rs_rate];
3709 sc->sc_rx_th.wr_rate = sc->sc_hwmap[rix].ieeerate;
3710 sc->sc_rx_th.wr_flags = sc->sc_hwmap[rix].rxflags;
3711 #ifdef AH_SUPPORT_AR5416
3712 sc->sc_rx_th.wr_chan_flags &= ~CHAN_HT;
3713 if (sc->sc_rx_th.wr_rate & IEEE80211_RATE_MCS) { /* HT rate */
3714 struct ieee80211com *ic = ifp->if_l2com;
3716 if ((rs->rs_flags & HAL_RX_2040) == 0)
3717 sc->sc_rx_th.wr_chan_flags |= CHAN_HT20;
3718 else if (IEEE80211_IS_CHAN_HT40U(ic->ic_curchan))
3719 sc->sc_rx_th.wr_chan_flags |= CHAN_HT40U;
3721 sc->sc_rx_th.wr_chan_flags |= CHAN_HT40D;
3722 if ((rs->rs_flags & HAL_RX_GI) == 0)
3723 sc->sc_rx_th.wr_flags |= IEEE80211_RADIOTAP_F_SHORTGI;
3726 sc->sc_rx_th.wr_tsf = htole64(ath_extend_tsf(rs->rs_tstamp, tsf));
3727 if (rs->rs_status & HAL_RXERR_CRC)
3728 sc->sc_rx_th.wr_flags |= IEEE80211_RADIOTAP_F_BADFCS;
3729 /* XXX propagate other error flags from descriptor */
3730 sc->sc_rx_th.wr_antnoise = nf;
3731 sc->sc_rx_th.wr_antsignal = nf + rs->rs_rssi;
3732 sc->sc_rx_th.wr_antenna = rs->rs_antenna;
3740 ath_handle_micerror(struct ieee80211com *ic,
3741 struct ieee80211_frame *wh, int keyix)
3743 struct ieee80211_node *ni;
3745 /* XXX recheck MIC to deal w/ chips that lie */
3746 /* XXX discard MIC errors on !data frames */
3747 ni = ieee80211_find_rxnode(ic, (const struct ieee80211_frame_min *) wh);
3749 ieee80211_notify_michael_failure(ni->ni_vap, wh, keyix);
3750 ieee80211_free_node(ni);
3755 ath_rx_task(void *arg, int npending)
3757 #define PA2DESC(_sc, _pa) \
3758 ((struct ath_desc *)((caddr_t)(_sc)->sc_rxdma.dd_desc + \
3759 ((_pa) - (_sc)->sc_rxdma.dd_desc_paddr)))
3760 struct ath_softc *sc = arg;
3763 struct ieee80211com *ic;
3765 struct ath_desc *ds;
3766 struct ath_rx_status *rs;
3768 struct ieee80211_node *ni;
3769 int len, type, ngood;
3775 wlan_serialize_enter();
3780 DPRINTF(sc, ATH_DEBUG_RX_PROC, "%s: pending %u\n", __func__, npending);
3782 nf = ath_hal_getchannoise(ah, sc->sc_curchan);
3783 sc->sc_stats.ast_rx_noise = nf;
3784 tsf = ath_hal_gettsf64(ah);
3786 bf = STAILQ_FIRST(&sc->sc_rxbuf);
3787 if (bf == NULL) { /* NB: shouldn't happen */
3788 if_printf(ifp, "%s: no buffer!\n", __func__);
3792 if (m == NULL) { /* NB: shouldn't happen */
3794 * If mbuf allocation failed previously there
3795 * will be no mbuf; try again to re-populate it.
3797 /* XXX make debug msg */
3798 if_printf(ifp, "%s: no mbuf!\n", __func__);
3799 STAILQ_REMOVE_HEAD(&sc->sc_rxbuf, bf_list);
3803 if (ds->ds_link == bf->bf_daddr) {
3804 /* NB: never process the self-linked entry at the end */
3807 /* XXX sync descriptor memory */
3809 * Must provide the virtual address of the current
3810 * descriptor, the physical address, and the virtual
3811 * address of the next descriptor in the h/w chain.
3812 * This allows the HAL to look ahead to see if the
3813 * hardware is done with a descriptor by checking the
3814 * done bit in the following descriptor and the address
3815 * of the current descriptor the DMA engine is working
3816 * on. All this is necessary because of our use of
3817 * a self-linked list to avoid rx overruns.
3819 rs = &bf->bf_status.ds_rxstat;
3820 status = ath_hal_rxprocdesc(ah, ds,
3821 bf->bf_daddr, PA2DESC(sc, ds->ds_link), rs);
3823 if (sc->sc_debug & ATH_DEBUG_RECV_DESC)
3824 ath_printrxbuf(sc, bf, 0, status == HAL_OK);
3826 if (status == HAL_EINPROGRESS)
3828 STAILQ_REMOVE_HEAD(&sc->sc_rxbuf, bf_list);
3829 if (rs->rs_status != 0) {
3830 if (rs->rs_status & HAL_RXERR_CRC)
3831 sc->sc_stats.ast_rx_crcerr++;
3832 if (rs->rs_status & HAL_RXERR_FIFO)
3833 sc->sc_stats.ast_rx_fifoerr++;
3834 if (rs->rs_status & HAL_RXERR_PHY) {
3835 sc->sc_stats.ast_rx_phyerr++;
3836 phyerr = rs->rs_phyerr & 0x1f;
3837 sc->sc_stats.ast_rx_phy[phyerr]++;
3838 goto rx_error; /* NB: don't count in ierrors */
3840 if (rs->rs_status & HAL_RXERR_DECRYPT) {
3842 * Decrypt error. If the error occurred
3843 * because there was no hardware key, then
3844 * let the frame through so the upper layers
3845 * can process it. This is necessary for 5210
3846 * parts which have no way to setup a ``clear''
3849 * XXX do key cache faulting
3851 if (rs->rs_keyix == HAL_RXKEYIX_INVALID)
3853 sc->sc_stats.ast_rx_badcrypt++;
3855 if (rs->rs_status & HAL_RXERR_MIC) {
3856 sc->sc_stats.ast_rx_badmic++;
3858 * Do minimal work required to hand off
3859 * the 802.11 header for notification.
3861 /* XXX frag's and qos frames */
3862 len = rs->rs_datalen;
3863 if (len >= sizeof (struct ieee80211_frame)) {
3864 bus_dmamap_sync(sc->sc_dmat,
3866 BUS_DMASYNC_POSTREAD);
3867 ath_handle_micerror(ic,
3868 mtod(m, struct ieee80211_frame *),
3870 rs->rs_keyix-32 : rs->rs_keyix);
3876 * Cleanup any pending partial frame.
3878 if (sc->sc_rxpending != NULL) {
3879 m_freem(sc->sc_rxpending);
3880 sc->sc_rxpending = NULL;
3883 * When a tap is present pass error frames
3884 * that have been requested. By default we
3885 * pass decrypt+mic errors but others may be
3886 * interesting (e.g. crc).
3888 if (ieee80211_radiotap_active(ic) &&
3889 (rs->rs_status & sc->sc_monpass)) {
3890 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap,
3891 BUS_DMASYNC_POSTREAD);
3892 /* NB: bpf needs the mbuf length setup */
3893 len = rs->rs_datalen;
3894 m->m_pkthdr.len = m->m_len = len;
3895 ath_rx_tap(ifp, m, rs, tsf, nf);
3896 ieee80211_radiotap_rx_all(ic, m);
3898 /* XXX pass MIC errors up for s/w reclaculation */
3903 * Sync and unmap the frame. At this point we're
3904 * committed to passing the mbuf somewhere so clear
3905 * bf_m; this means a new mbuf must be allocated
3906 * when the rx descriptor is setup again to receive
3909 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap,
3910 BUS_DMASYNC_POSTREAD);
3911 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
3914 len = rs->rs_datalen;
3919 * Frame spans multiple descriptors; save
3920 * it for the next completed descriptor, it
3921 * will be used to construct a jumbogram.
3923 if (sc->sc_rxpending != NULL) {
3924 /* NB: max frame size is currently 2 clusters */
3925 sc->sc_stats.ast_rx_toobig++;
3926 m_freem(sc->sc_rxpending);
3928 m->m_pkthdr.rcvif = ifp;
3929 m->m_pkthdr.len = len;
3930 sc->sc_rxpending = m;
3932 } else if (sc->sc_rxpending != NULL) {
3934 * This is the second part of a jumbogram,
3935 * chain it to the first mbuf, adjust the
3936 * frame length, and clear the rxpending state.
3938 sc->sc_rxpending->m_next = m;
3939 sc->sc_rxpending->m_pkthdr.len += len;
3940 m = sc->sc_rxpending;
3941 sc->sc_rxpending = NULL;
3944 * Normal single-descriptor receive; setup
3945 * the rcvif and packet length.
3947 m->m_pkthdr.rcvif = ifp;
3948 m->m_pkthdr.len = len;
3952 sc->sc_stats.ast_ant_rx[rs->rs_antenna]++;
3955 * Populate the rx status block. When there are bpf
3956 * listeners we do the additional work to provide
3957 * complete status. Otherwise we fill in only the
3958 * material required by ieee80211_input. Note that
3959 * noise setting is filled in above.
3961 if (ieee80211_radiotap_active(ic))
3962 ath_rx_tap(ifp, m, rs, tsf, nf);
3965 * From this point on we assume the frame is at least
3966 * as large as ieee80211_frame_min; verify that.
3968 if (len < IEEE80211_MIN_LEN) {
3969 if (!ieee80211_radiotap_active(ic)) {
3970 DPRINTF(sc, ATH_DEBUG_RECV,
3971 "%s: short packet %d\n", __func__, len);
3972 sc->sc_stats.ast_rx_tooshort++;
3974 /* NB: in particular this captures ack's */
3975 ieee80211_radiotap_rx_all(ic, m);
3981 if (IFF_DUMPPKTS(sc, ATH_DEBUG_RECV)) {
3982 const HAL_RATE_TABLE *rt = sc->sc_currates;
3983 uint8_t rix = rt->rateCodeToIndex[rs->rs_rate];
3985 ieee80211_dump_pkt(ic, mtod(m, caddr_t), len,
3986 sc->sc_hwmap[rix].ieeerate, rs->rs_rssi);
3989 m_adj(m, -IEEE80211_CRC_LEN);
3992 * Locate the node for sender, track state, and then
3993 * pass the (referenced) node up to the 802.11 layer
3996 ni = ieee80211_find_rxnode_withkey(ic,
3997 mtod(m, const struct ieee80211_frame_min *),
3998 rs->rs_keyix == HAL_RXKEYIX_INVALID ?
3999 IEEE80211_KEYIX_NONE : rs->rs_keyix);
4002 * Sending station is known, dispatch directly.
4005 type = ieee80211_input(ni, m, rs->rs_rssi, nf);
4006 ieee80211_free_node(ni);
4008 * Arrange to update the last rx timestamp only for
4009 * frames from our ap when operating in station mode.
4010 * This assumes the rx key is always setup when
4013 if (ic->ic_opmode == IEEE80211_M_STA &&
4014 rs->rs_keyix != HAL_RXKEYIX_INVALID)
4017 type = ieee80211_input_all(ic, m, rs->rs_rssi, nf);
4020 * Track rx rssi and do any rx antenna management.
4022 ATH_RSSI_LPF(sc->sc_halstats.ns_avgrssi, rs->rs_rssi);
4023 if (sc->sc_diversity) {
4025 * When using fast diversity, change the default rx
4026 * antenna if diversity chooses the other antenna 3
4029 if (sc->sc_defant != rs->rs_antenna) {
4030 if (++sc->sc_rxotherant >= 3)
4031 ath_setdefantenna(sc, rs->rs_antenna);
4033 sc->sc_rxotherant = 0;
4035 if (sc->sc_softled) {
4037 * Blink for any data frame. Otherwise do a
4038 * heartbeat-style blink when idle. The latter
4039 * is mainly for station mode where we depend on
4040 * periodic beacon frames to trigger the poll event.
4042 if (type == IEEE80211_FC0_TYPE_DATA) {
4043 const HAL_RATE_TABLE *rt = sc->sc_currates;
4045 rt->rateCodeToIndex[rs->rs_rate]);
4046 } else if (ticks - sc->sc_ledevent >= sc->sc_ledidle)
4047 ath_led_event(sc, 0);
4050 STAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list);
4051 } while (ath_rxbuf_init(sc, bf) == 0);
4053 /* rx signal state monitoring */
4054 ath_hal_rxmonitor(ah, &sc->sc_halstats, sc->sc_curchan);
4056 sc->sc_lastrx = tsf;
4058 if (!ifq_is_oactive(&ifp->if_snd)) {
4059 #ifdef IEEE80211_SUPPORT_SUPERG
4060 ieee80211_ff_age_all(ic, 100);
4062 if (!ifq_is_empty(&ifp->if_snd))
4065 wlan_serialize_exit();
4070 ath_txq_init(struct ath_softc *sc, struct ath_txq *txq, int qnum)
4072 txq->axq_qnum = qnum;
4075 txq->axq_intrcnt = 0;
4076 txq->axq_link = NULL;
4077 STAILQ_INIT(&txq->axq_q);
4081 * Setup a h/w transmit queue.
4083 static struct ath_txq *
4084 ath_txq_setup(struct ath_softc *sc, int qtype, int subtype)
4086 struct ath_hal *ah = sc->sc_ah;
4090 memset(&qi, 0, sizeof(qi));
4091 qi.tqi_subtype = subtype;
4092 qi.tqi_aifs = HAL_TXQ_USEDEFAULT;
4093 qi.tqi_cwmin = HAL_TXQ_USEDEFAULT;
4094 qi.tqi_cwmax = HAL_TXQ_USEDEFAULT;
4096 * Enable interrupts only for EOL and DESC conditions.
4097 * We mark tx descriptors to receive a DESC interrupt
4098 * when a tx queue gets deep; otherwise waiting for the
4099 * EOL to reap descriptors. Note that this is done to
4100 * reduce interrupt load and this only defers reaping
4101 * descriptors, never transmitting frames. Aside from
4102 * reducing interrupts this also permits more concurrency.
4103 * The only potential downside is if the tx queue backs
4104 * up in which case the top half of the kernel may backup
4105 * due to a lack of tx descriptors.
4107 qi.tqi_qflags = HAL_TXQ_TXEOLINT_ENABLE | HAL_TXQ_TXDESCINT_ENABLE;
4108 qnum = ath_hal_setuptxqueue(ah, qtype, &qi);
4111 * NB: don't print a message, this happens
4112 * normally on parts with too few tx queues
4116 if (qnum >= NELEM(sc->sc_txq)) {
4117 device_printf(sc->sc_dev,
4118 "hal qnum %u out of range, max %zu!\n",
4119 qnum, NELEM(sc->sc_txq));
4120 ath_hal_releasetxqueue(ah, qnum);
4123 if (!ATH_TXQ_SETUP(sc, qnum)) {
4124 ath_txq_init(sc, &sc->sc_txq[qnum], qnum);
4125 sc->sc_txqsetup |= 1<<qnum;
4127 return &sc->sc_txq[qnum];
4131 * Setup a hardware data transmit queue for the specified
4132 * access control. The hal may not support all requested
4133 * queues in which case it will return a reference to a
4134 * previously setup queue. We record the mapping from ac's
4135 * to h/w queues for use by ath_tx_start and also track
4136 * the set of h/w queues being used to optimize work in the
4137 * transmit interrupt handler and related routines.
4140 ath_tx_setup(struct ath_softc *sc, int ac, int haltype)
4142 struct ath_txq *txq;
4144 if (ac >= NELEM(sc->sc_ac2q)) {
4145 device_printf(sc->sc_dev, "AC %u out of range, max %zu!\n",
4146 ac, NELEM(sc->sc_ac2q));
4149 txq = ath_txq_setup(sc, HAL_TX_QUEUE_DATA, haltype);
4152 sc->sc_ac2q[ac] = txq;
4159 * Update WME parameters for a transmit queue.
4162 ath_txq_update(struct ath_softc *sc, int ac)
4164 #define ATH_EXPONENT_TO_VALUE(v) ((1<<v)-1)
4165 #define ATH_TXOP_TO_US(v) (v<<5)
4166 struct ifnet *ifp = sc->sc_ifp;
4167 struct ieee80211com *ic = ifp->if_l2com;
4168 struct ath_txq *txq = sc->sc_ac2q[ac];
4169 struct wmeParams *wmep = &ic->ic_wme.wme_chanParams.cap_wmeParams[ac];
4170 struct ath_hal *ah = sc->sc_ah;
4173 ath_hal_gettxqueueprops(ah, txq->axq_qnum, &qi);
4174 #ifdef IEEE80211_SUPPORT_TDMA
4177 * AIFS is zero so there's no pre-transmit wait. The
4178 * burst time defines the slot duration and is configured
4179 * through net80211. The QCU is setup to not do post-xmit
4180 * back off, lockout all lower-priority QCU's, and fire
4181 * off the DMA beacon alert timer which is setup based
4182 * on the slot configuration.
4184 qi.tqi_qflags = HAL_TXQ_TXOKINT_ENABLE
4185 | HAL_TXQ_TXERRINT_ENABLE
4186 | HAL_TXQ_TXURNINT_ENABLE
4187 | HAL_TXQ_TXEOLINT_ENABLE
4189 | HAL_TXQ_BACKOFF_DISABLE
4190 | HAL_TXQ_ARB_LOCKOUT_GLOBAL
4194 qi.tqi_readyTime = sc->sc_tdmaslotlen;
4195 qi.tqi_burstTime = qi.tqi_readyTime;
4198 qi.tqi_qflags = HAL_TXQ_TXOKINT_ENABLE
4199 | HAL_TXQ_TXERRINT_ENABLE
4200 | HAL_TXQ_TXDESCINT_ENABLE
4201 | HAL_TXQ_TXURNINT_ENABLE
4203 qi.tqi_aifs = wmep->wmep_aifsn;
4204 qi.tqi_cwmin = ATH_EXPONENT_TO_VALUE(wmep->wmep_logcwmin);
4205 qi.tqi_cwmax = ATH_EXPONENT_TO_VALUE(wmep->wmep_logcwmax);
4206 qi.tqi_readyTime = 0;
4207 qi.tqi_burstTime = ATH_TXOP_TO_US(wmep->wmep_txopLimit);
4208 #ifdef IEEE80211_SUPPORT_TDMA
4212 DPRINTF(sc, ATH_DEBUG_RESET,
4213 "%s: Q%u qflags 0x%x aifs %u cwmin %u cwmax %u burstTime %u\n",
4214 __func__, txq->axq_qnum, qi.tqi_qflags,
4215 qi.tqi_aifs, qi.tqi_cwmin, qi.tqi_cwmax, qi.tqi_burstTime);
4217 if (!ath_hal_settxqueueprops(ah, txq->axq_qnum, &qi)) {
4218 if_printf(ifp, "unable to update hardware queue "
4219 "parameters for %s traffic!\n",
4220 ieee80211_wme_acnames[ac]);
4223 ath_hal_resettxqueue(ah, txq->axq_qnum); /* push to h/w */
4226 #undef ATH_TXOP_TO_US
4227 #undef ATH_EXPONENT_TO_VALUE
4231 * Callback from the 802.11 layer to update WME parameters.
4234 ath_wme_update(struct ieee80211com *ic)
4236 struct ath_softc *sc = ic->ic_ifp->if_softc;
4238 return !ath_txq_update(sc, WME_AC_BE) ||
4239 !ath_txq_update(sc, WME_AC_BK) ||
4240 !ath_txq_update(sc, WME_AC_VI) ||
4241 !ath_txq_update(sc, WME_AC_VO) ? EIO : 0;
4245 * Reclaim resources for a setup queue.
4248 ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq)
4251 ath_hal_releasetxqueue(sc->sc_ah, txq->axq_qnum);
4252 sc->sc_txqsetup &= ~(1<<txq->axq_qnum);
4256 * Reclaim all tx queue resources.
4259 ath_tx_cleanup(struct ath_softc *sc)
4263 for (i = 0; i < HAL_NUM_TX_QUEUES; i++)
4264 if (ATH_TXQ_SETUP(sc, i))
4265 ath_tx_cleanupq(sc, &sc->sc_txq[i]);
4269 * Return h/w rate index for an IEEE rate (w/o basic rate bit)
4270 * using the current rates in sc_rixmap.
4273 ath_tx_findrix(const struct ath_softc *sc, uint8_t rate)
4275 int rix = sc->sc_rixmap[rate];
4276 /* NB: return lowest rix for invalid rate */
4277 return (rix == 0xff ? 0 : rix);
4281 * Reclaim mbuf resources. For fragmented frames we
4282 * need to claim each frag chained with m_nextpkt.
4285 ath_freetx(struct mbuf *m)
4290 next = m->m_nextpkt;
4291 m->m_nextpkt = NULL;
4293 } while ((m = next) != NULL);
4297 ath_tx_dmasetup(struct ath_softc *sc, struct ath_buf *bf, struct mbuf *m0)
4303 * Load the DMA map so any coalescing is done. This
4304 * also calculates the number of descriptors we need.
4306 error = bus_dmamap_load_mbuf_defrag(sc->sc_dmat, bf->bf_dmamap, &m0,
4307 bf->bf_segs, ATH_TXDESC,
4308 &bf->bf_nseg, BUS_DMA_NOWAIT);
4310 sc->sc_stats.ast_tx_busdma++;
4316 * Discard null packets.
4318 if (bf->bf_nseg == 0) { /* null packet, discard */
4319 sc->sc_stats.ast_tx_nodata++;
4323 DPRINTF(sc, ATH_DEBUG_XMIT, "%s: m %p len %u\n",
4324 __func__, m0, m0->m_pkthdr.len);
4325 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
4332 ath_tx_handoff(struct ath_softc *sc, struct ath_txq *txq, struct ath_buf *bf)
4334 struct ath_hal *ah = sc->sc_ah;
4335 struct ath_desc *ds, *ds0;
4339 * Fillin the remainder of the descriptor info.
4341 ds0 = ds = bf->bf_desc;
4342 for (i = 0; i < bf->bf_nseg; i++, ds++) {
4343 ds->ds_data = bf->bf_segs[i].ds_addr;
4344 if (i == bf->bf_nseg - 1)
4347 ds->ds_link = bf->bf_daddr + sizeof(*ds) * (i + 1);
4348 ath_hal_filltxdesc(ah, ds
4349 , bf->bf_segs[i].ds_len /* segment length */
4350 , i == 0 /* first segment */
4351 , i == bf->bf_nseg - 1 /* last segment */
4352 , ds0 /* first descriptor */
4354 DPRINTF(sc, ATH_DEBUG_XMIT,
4355 "%s: %d: %08x %08x %08x %08x %08x %08x\n",
4356 __func__, i, ds->ds_link, ds->ds_data,
4357 ds->ds_ctl0, ds->ds_ctl1, ds->ds_hw[0], ds->ds_hw[1]);
4360 * Insert the frame on the outbound list and pass it on
4361 * to the hardware. Multicast frames buffered for power
4362 * save stations and transmit from the CAB queue are stored
4363 * on a s/w only queue and loaded on to the CAB queue in
4364 * the SWBA handler since frames only go out on DTIM and
4365 * to avoid possible races.
4367 KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0,
4368 ("busy status 0x%x", bf->bf_flags));
4369 if (txq->axq_qnum != ATH_TXQ_SWQ) {
4370 #ifdef IEEE80211_SUPPORT_TDMA
4372 * Supporting transmit dma. If the queue is busy it is
4373 * impossible to determine if we've won the race against
4374 * the chipset checking the link field or not, so we don't
4375 * try. Instead we let the TX interrupt detect the case
4376 * and restart the transmitter.
4378 * If the queue is not busy we can start things rolling
4383 ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
4384 qbusy = ath_hal_txqenabled(ah, txq->axq_qnum);
4387 if (txq->axq_link != NULL) {
4389 * We had already started one previously but
4390 * not yet processed the TX interrupt. Don't
4391 * try to race a restart because we do not
4392 * know where it stopped, let the TX interrupt
4393 * restart us when it figures out where we
4397 *txq->axq_link = bf->bf_daddr;
4398 txq->axq_flags |= ATH_TXQ_PUTPENDING;
4401 * We are first in line, we can safely start
4405 ath_hal_puttxbuf(ah, txq->axq_qnum,
4410 * The queue is busy, go ahead and link us in but
4411 * do not try to start/restart the tx. We just
4412 * don't know whether it will pick up our link
4413 * or not and we don't want to double-xmit.
4415 if (txq->axq_link != NULL) {
4417 *txq->axq_link = bf->bf_daddr;
4419 txq->axq_flags |= ATH_TXQ_PUTPENDING;
4422 ath_hal_puttxbuf(ah, txq->axq_qnum,
4423 STAILQ_FIRST(&txq->axq_q)->bf_daddr);
4426 ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
4427 if (txq->axq_link == NULL) {
4428 ath_hal_puttxbuf(ah, txq->axq_qnum, bf->bf_daddr);
4429 DPRINTF(sc, ATH_DEBUG_XMIT,
4430 "%s: TXDP[%u] = %p (%p) depth %d\n",
4431 __func__, txq->axq_qnum,
4432 (caddr_t)bf->bf_daddr, bf->bf_desc,
4435 *txq->axq_link = bf->bf_daddr;
4436 DPRINTF(sc, ATH_DEBUG_XMIT,
4437 "%s: link[%u](%p)=%p (%p) depth %d\n", __func__,
4438 txq->axq_qnum, txq->axq_link,
4439 (caddr_t)bf->bf_daddr, bf->bf_desc, txq->axq_depth);
4441 #endif /* IEEE80211_SUPPORT_TDMA */
4442 txq->axq_link = &bf->bf_desc[bf->bf_nseg - 1].ds_link;
4443 ath_hal_txstart(ah, txq->axq_qnum);
4445 if (txq->axq_link != NULL) {
4446 struct ath_buf *last = ATH_TXQ_LAST(txq);
4447 struct ieee80211_frame *wh;
4449 /* mark previous frame */
4450 wh = mtod(last->bf_m, struct ieee80211_frame *);
4451 wh->i_fc[1] |= IEEE80211_FC1_MORE_DATA;
4452 bus_dmamap_sync(sc->sc_dmat, last->bf_dmamap,
4453 BUS_DMASYNC_PREWRITE);
4455 /* link descriptor */
4456 *txq->axq_link = bf->bf_daddr;
4458 ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
4459 txq->axq_link = &bf->bf_desc[bf->bf_nseg - 1].ds_link;
4464 ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni, struct ath_buf *bf,
4467 struct ieee80211vap *vap = ni->ni_vap;
4468 struct ath_vap *avp = ATH_VAP(vap);
4469 struct ath_hal *ah = sc->sc_ah;
4470 struct ifnet *ifp = sc->sc_ifp;
4471 struct ieee80211com *ic = ifp->if_l2com;
4472 const struct chanAccParams *cap = &ic->ic_wme.wme_chanParams;
4473 int error, iswep, ismcast, isfrag, ismrr;
4474 int keyix, hdrlen, pktlen, try0;
4475 u_int8_t rix, txrate, ctsrate;
4476 u_int8_t cix = 0xff; /* NB: silence compiler */
4477 struct ath_desc *ds;
4478 struct ath_txq *txq;
4479 struct ieee80211_frame *wh;
4480 u_int subtype, flags, ctsduration;
4482 const HAL_RATE_TABLE *rt;
4483 HAL_BOOL shortPreamble;
4484 struct ath_node *an;
4487 wh = mtod(m0, struct ieee80211_frame *);
4488 iswep = wh->i_fc[1] & IEEE80211_FC1_WEP;
4489 ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
4490 isfrag = m0->m_flags & M_FRAG;
4491 hdrlen = ieee80211_anyhdrsize(wh);
4493 * Packet length must not include any
4494 * pad bytes; deduct them here.
4496 pktlen = m0->m_pkthdr.len - (hdrlen & 3);
4499 const struct ieee80211_cipher *cip;
4500 struct ieee80211_key *k;
4503 * Construct the 802.11 header+trailer for an encrypted
4504 * frame. The only reason this can fail is because of an
4505 * unknown or unsupported cipher/key type.
4507 k = ieee80211_crypto_encap(ni, m0);
4510 * This can happen when the key is yanked after the
4511 * frame was queued. Just discard the frame; the
4512 * 802.11 layer counts failures and provides
4513 * debugging/diagnostics.
4519 * Adjust the packet + header lengths for the crypto
4520 * additions and calculate the h/w key index. When
4521 * a s/w mic is done the frame will have had any mic
4522 * added to it prior to entry so m0->m_pkthdr.len will
4523 * account for it. Otherwise we need to add it to the
4527 hdrlen += cip->ic_header;
4528 pktlen += cip->ic_header + cip->ic_trailer;
4529 /* NB: frags always have any TKIP MIC done in s/w */
4530 if ((k->wk_flags & IEEE80211_KEY_SWMIC) == 0 && !isfrag)
4531 pktlen += cip->ic_miclen;
4532 keyix = k->wk_keyix;
4534 /* packet header may have moved, reset our local pointer */
4535 wh = mtod(m0, struct ieee80211_frame *);
4536 } else if (ni->ni_ucastkey.wk_cipher == &ieee80211_cipher_none) {
4538 * Use station key cache slot, if assigned.
4540 keyix = ni->ni_ucastkey.wk_keyix;
4541 if (keyix == IEEE80211_KEYIX_NONE)
4542 keyix = HAL_TXKEYIX_INVALID;
4544 keyix = HAL_TXKEYIX_INVALID;
4546 pktlen += IEEE80211_CRC_LEN;
4549 * Load the DMA map so any coalescing is done. This
4550 * also calculates the number of descriptors we need.
4552 error = ath_tx_dmasetup(sc, bf, m0);
4556 bf->bf_node = ni; /* NB: held reference */
4557 m0 = bf->bf_m; /* NB: may have changed */
4558 wh = mtod(m0, struct ieee80211_frame *);
4560 /* setup descriptors */
4562 rt = sc->sc_currates;
4563 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
4566 * NB: the 802.11 layer marks whether or not we should
4567 * use short preamble based on the current mode and
4568 * negotiated parameters.
4570 if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) &&
4571 (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE)) {
4572 shortPreamble = AH_TRUE;
4573 sc->sc_stats.ast_tx_shortpre++;
4575 shortPreamble = AH_FALSE;
4579 flags = HAL_TXDESC_CLRDMASK; /* XXX needed for crypto errs */
4580 ismrr = 0; /* default no multi-rate retry*/
4581 pri = M_WME_GETAC(m0); /* honor classification */
4582 /* XXX use txparams instead of fixed values */
4584 * Calculate Atheros packet type from IEEE80211 packet header,
4585 * setup for rate calculations, and select h/w transmit queue.
4587 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) {
4588 case IEEE80211_FC0_TYPE_MGT:
4589 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
4590 if (subtype == IEEE80211_FC0_SUBTYPE_BEACON)
4591 atype = HAL_PKT_TYPE_BEACON;
4592 else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
4593 atype = HAL_PKT_TYPE_PROBE_RESP;
4594 else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM)
4595 atype = HAL_PKT_TYPE_ATIM;
4597 atype = HAL_PKT_TYPE_NORMAL; /* XXX */
4598 rix = an->an_mgmtrix;
4599 txrate = rt->info[rix].rateCode;
4601 txrate |= rt->info[rix].shortPreamble;
4602 try0 = ATH_TXMGTTRY;
4603 flags |= HAL_TXDESC_INTREQ; /* force interrupt */
4605 case IEEE80211_FC0_TYPE_CTL:
4606 atype = HAL_PKT_TYPE_PSPOLL; /* stop setting of duration */
4607 rix = an->an_mgmtrix;
4608 txrate = rt->info[rix].rateCode;
4610 txrate |= rt->info[rix].shortPreamble;
4611 try0 = ATH_TXMGTTRY;
4612 flags |= HAL_TXDESC_INTREQ; /* force interrupt */
4614 case IEEE80211_FC0_TYPE_DATA:
4615 atype = HAL_PKT_TYPE_NORMAL; /* default */
4617 * Data frames: multicast frames go out at a fixed rate,
4618 * EAPOL frames use the mgmt frame rate; otherwise consult
4619 * the rate control module for the rate to use.
4622 rix = an->an_mcastrix;
4623 txrate = rt->info[rix].rateCode;
4625 txrate |= rt->info[rix].shortPreamble;
4627 } else if (m0->m_flags & M_EAPOL) {
4628 /* XXX? maybe always use long preamble? */
4629 rix = an->an_mgmtrix;
4630 txrate = rt->info[rix].rateCode;
4632 txrate |= rt->info[rix].shortPreamble;
4633 try0 = ATH_TXMAXTRY; /* XXX?too many? */
4635 ath_rate_findrate(sc, an, shortPreamble, pktlen,
4636 &rix, &try0, &txrate);
4637 sc->sc_txrix = rix; /* for LED blinking */
4638 sc->sc_lastdatarix = rix; /* for fast frames */
4639 if (try0 != ATH_TXMAXTRY)
4642 if (cap->cap_wmeParams[pri].wmep_noackPolicy)
4643 flags |= HAL_TXDESC_NOACK;
4646 if_printf(ifp, "bogus frame type 0x%x (%s)\n",
4647 wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__);
4652 txq = sc->sc_ac2q[pri];
4655 * When servicing one or more stations in power-save mode
4656 * (or) if there is some mcast data waiting on the mcast
4657 * queue (to prevent out of order delivery) multicast
4658 * frames must be buffered until after the beacon.
4660 if (ismcast && (vap->iv_ps_sta || avp->av_mcastq.axq_depth))
4661 txq = &avp->av_mcastq;
4664 * Calculate miscellaneous flags.
4667 flags |= HAL_TXDESC_NOACK; /* no ack on broad/multicast */
4668 } else if (pktlen > vap->iv_rtsthreshold &&
4669 (ni->ni_ath_flags & IEEE80211_NODE_FF) == 0) {
4670 flags |= HAL_TXDESC_RTSENA; /* RTS based on frame length */
4671 cix = rt->info[rix].controlRate;
4672 sc->sc_stats.ast_tx_rts++;
4674 if (flags & HAL_TXDESC_NOACK) /* NB: avoid double counting */
4675 sc->sc_stats.ast_tx_noack++;
4676 #ifdef IEEE80211_SUPPORT_TDMA
4677 if (sc->sc_tdma && (flags & HAL_TXDESC_NOACK) == 0) {
4678 DPRINTF(sc, ATH_DEBUG_TDMA,
4679 "%s: discard frame, ACK required w/ TDMA\n", __func__);
4680 sc->sc_stats.ast_tdma_ack++;
4687 * If 802.11g protection is enabled, determine whether
4688 * to use RTS/CTS or just CTS. Note that this is only
4689 * done for OFDM unicast frames.
4691 if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
4692 rt->info[rix].phy == IEEE80211_T_OFDM &&
4693 (flags & HAL_TXDESC_NOACK) == 0) {
4694 /* XXX fragments must use CCK rates w/ protection */
4695 if (ic->ic_protmode == IEEE80211_PROT_RTSCTS)
4696 flags |= HAL_TXDESC_RTSENA;
4697 else if (ic->ic_protmode == IEEE80211_PROT_CTSONLY)
4698 flags |= HAL_TXDESC_CTSENA;
4701 * For frags it would be desirable to use the
4702 * highest CCK rate for RTS/CTS. But stations
4703 * farther away may detect it at a lower CCK rate
4704 * so use the configured protection rate instead
4707 cix = rt->info[sc->sc_protrix].controlRate;
4709 cix = rt->info[sc->sc_protrix].controlRate;
4710 sc->sc_stats.ast_tx_protect++;
4714 * Calculate duration. This logically belongs in the 802.11
4715 * layer but it lacks sufficient information to calculate it.
4717 if ((flags & HAL_TXDESC_NOACK) == 0 &&
4718 (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_CTL) {
4721 dur = rt->info[rix].spAckDuration;
4723 dur = rt->info[rix].lpAckDuration;
4724 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) {
4725 dur += dur; /* additional SIFS+ACK */
4726 KASSERT(m0->m_nextpkt != NULL, ("no fragment"));
4728 * Include the size of next fragment so NAV is
4729 * updated properly. The last fragment uses only
4732 dur += ath_hal_computetxtime(ah, rt,
4733 m0->m_nextpkt->m_pkthdr.len,
4734 rix, shortPreamble);
4738 * Force hardware to use computed duration for next
4739 * fragment by disabling multi-rate retry which updates
4740 * duration based on the multi-rate duration table.
4743 try0 = ATH_TXMGTTRY; /* XXX? */
4745 *(u_int16_t *)wh->i_dur = htole16(dur);
4749 * Calculate RTS/CTS rate and duration if needed.
4752 if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA)) {
4754 * CTS transmit rate is derived from the transmit rate
4755 * by looking in the h/w rate table. We must also factor
4756 * in whether or not a short preamble is to be used.
4758 /* NB: cix is set above where RTS/CTS is enabled */
4759 KASSERT(cix != 0xff, ("cix not setup"));
4760 ctsrate = rt->info[cix].rateCode;
4762 * Compute the transmit duration based on the frame
4763 * size and the size of an ACK frame. We call into the
4764 * HAL to do the computation since it depends on the
4765 * characteristics of the actual PHY being used.
4767 * NB: CTS is assumed the same size as an ACK so we can
4768 * use the precalculated ACK durations.
4770 if (shortPreamble) {
4771 ctsrate |= rt->info[cix].shortPreamble;
4772 if (flags & HAL_TXDESC_RTSENA) /* SIFS + CTS */
4773 ctsduration += rt->info[cix].spAckDuration;
4774 ctsduration += ath_hal_computetxtime(ah,
4775 rt, pktlen, rix, AH_TRUE);
4776 if ((flags & HAL_TXDESC_NOACK) == 0) /* SIFS + ACK */
4777 ctsduration += rt->info[rix].spAckDuration;
4779 if (flags & HAL_TXDESC_RTSENA) /* SIFS + CTS */
4780 ctsduration += rt->info[cix].lpAckDuration;
4781 ctsduration += ath_hal_computetxtime(ah,
4782 rt, pktlen, rix, AH_FALSE);
4783 if ((flags & HAL_TXDESC_NOACK) == 0) /* SIFS + ACK */
4784 ctsduration += rt->info[rix].lpAckDuration;
4787 * Must disable multi-rate retry when using RTS/CTS.
4790 try0 = ATH_TXMGTTRY; /* XXX */
4795 * At this point we are committed to sending the frame
4796 * and we don't need to look at m_nextpkt; clear it in
4797 * case this frame is part of frag chain.
4799 m0->m_nextpkt = NULL;
4801 if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT))
4802 ieee80211_dump_pkt(ic, mtod(m0, const uint8_t *), m0->m_len,
4803 sc->sc_hwmap[rix].ieeerate, -1);
4805 if (ieee80211_radiotap_active_vap(vap)) {
4806 u_int64_t tsf = ath_hal_gettsf64(ah);
4808 sc->sc_tx_th.wt_tsf = htole64(tsf);
4809 sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags;
4811 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
4813 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG;
4814 sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate;
4815 sc->sc_tx_th.wt_txpower = ni->ni_txpower;
4816 sc->sc_tx_th.wt_antenna = sc->sc_txantenna;
4818 ieee80211_radiotap_tx(vap, m0);
4822 * Determine if a tx interrupt should be generated for
4823 * this descriptor. We take a tx interrupt to reap
4824 * descriptors when the h/w hits an EOL condition or
4825 * when the descriptor is specifically marked to generate
4826 * an interrupt. We periodically mark descriptors in this
4827 * way to insure timely replenishing of the supply needed
4828 * for sending frames. Defering interrupts reduces system
4829 * load and potentially allows more concurrent work to be
4830 * done but if done to aggressively can cause senders to
4833 * NB: use >= to deal with sc_txintrperiod changing
4834 * dynamically through sysctl.
4836 if (flags & HAL_TXDESC_INTREQ) {
4837 txq->axq_intrcnt = 0;
4838 } else if (++txq->axq_intrcnt >= sc->sc_txintrperiod) {
4839 flags |= HAL_TXDESC_INTREQ;
4840 txq->axq_intrcnt = 0;
4844 * Formulate first tx descriptor with tx controls.
4846 /* XXX check return value? */
4847 ath_hal_setuptxdesc(ah, ds
4848 , pktlen /* packet length */
4849 , hdrlen /* header length */
4850 , atype /* Atheros packet type */
4851 , ni->ni_txpower /* txpower */
4852 , txrate, try0 /* series 0 rate/tries */
4853 , keyix /* key cache index */
4854 , sc->sc_txantenna /* antenna mode */
4856 , ctsrate /* rts/cts rate */
4857 , ctsduration /* rts/cts duration */
4859 bf->bf_txflags = flags;
4861 * Setup the multi-rate retry state only when we're
4862 * going to use it. This assumes ath_hal_setuptxdesc
4863 * initializes the descriptors (so we don't have to)
4864 * when the hardware supports multi-rate retry and
4868 ath_rate_setupxtxdesc(sc, an, ds, shortPreamble, rix);
4870 ath_tx_handoff(sc, txq, bf);
4875 * Process completed xmit descriptors from the specified queue.
4878 ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq)
4880 struct ath_hal *ah = sc->sc_ah;
4881 struct ifnet *ifp = sc->sc_ifp;
4882 struct ieee80211com *ic = ifp->if_l2com;
4883 struct ath_buf *bf, *last;
4884 struct ath_desc *ds;
4885 struct ath_tx_status *ts;
4886 struct ieee80211_node *ni;
4887 struct ath_node *an;
4888 int sr, lr, pri, nacked;
4891 DPRINTF(sc, ATH_DEBUG_TX_PROC, "%s: tx queue %u head %p link %p\n",
4892 __func__, txq->axq_qnum,
4893 (caddr_t)(uintptr_t) ath_hal_gettxbuf(sc->sc_ah, txq->axq_qnum),
4899 txq->axq_intrcnt = 0; /* reset periodic desc intr count */
4900 bf = STAILQ_FIRST(&txq->axq_q);
4903 ds = &bf->bf_desc[bf->bf_nseg - 1];
4904 ts = &bf->bf_status.ds_txstat;
4905 qbusy = ath_hal_txqenabled(ah, txq->axq_qnum);
4906 status = ath_hal_txprocdesc(ah, ds, ts);
4908 if (sc->sc_debug & ATH_DEBUG_XMIT_DESC)
4909 ath_printtxbuf(sc, bf, txq->axq_qnum, 0,
4912 if (status == HAL_EINPROGRESS) {
4913 #ifdef IEEE80211_SUPPORT_TDMA
4915 * If not done and the queue is not busy then the
4916 * transmitter raced the hardware on the link field
4917 * and we have to restart it.
4921 ath_hal_puttxbuf(ah, txq->axq_qnum,
4923 ath_hal_txstart(ah, txq->axq_qnum);
4928 ATH_TXQ_REMOVE_HEAD(txq, bf_list);
4929 #ifdef IEEE80211_SUPPORT_TDMA
4930 if (txq->axq_depth > 0) {
4932 * More frames follow. Mark the buffer busy
4933 * so it's not re-used while the hardware may
4934 * still re-read the link field in the descriptor.
4936 bf->bf_flags |= ATH_BUF_BUSY;
4939 if (txq->axq_depth == 0)
4941 txq->axq_link = NULL;
4946 if (ts->ts_status == 0) {
4947 u_int8_t txant = ts->ts_antenna;
4948 sc->sc_stats.ast_ant_tx[txant]++;
4949 sc->sc_ant_tx[txant]++;
4950 if (ts->ts_finaltsi != 0)
4951 sc->sc_stats.ast_tx_altrate++;
4952 pri = M_WME_GETAC(bf->bf_m);
4953 if (pri >= WME_AC_VO)
4954 ic->ic_wme.wme_hipri_traffic++;
4955 if ((bf->bf_txflags & HAL_TXDESC_NOACK) == 0)
4956 ni->ni_inact = ni->ni_inact_reload;
4958 if (ts->ts_status & HAL_TXERR_XRETRY)
4959 sc->sc_stats.ast_tx_xretries++;
4960 if (ts->ts_status & HAL_TXERR_FIFO)
4961 sc->sc_stats.ast_tx_fifoerr++;
4962 if (ts->ts_status & HAL_TXERR_FILT)
4963 sc->sc_stats.ast_tx_filtered++;
4964 if (bf->bf_m->m_flags & M_FF)
4965 sc->sc_stats.ast_ff_txerr++;
4967 sr = ts->ts_shortretry;
4968 lr = ts->ts_longretry;
4969 sc->sc_stats.ast_tx_shortretry += sr;
4970 sc->sc_stats.ast_tx_longretry += lr;
4972 * Hand the descriptor to the rate control algorithm.
4974 if ((ts->ts_status & HAL_TXERR_FILT) == 0 &&
4975 (bf->bf_txflags & HAL_TXDESC_NOACK) == 0) {
4977 * If frame was ack'd update statistics,
4978 * including the last rx time used to
4979 * workaround phantom bmiss interrupts.
4981 if (ts->ts_status == 0) {
4983 sc->sc_stats.ast_tx_rssi = ts->ts_rssi;
4984 ATH_RSSI_LPF(sc->sc_halstats.ns_avgtxrssi,
4987 ath_rate_tx_complete(sc, an, bf);
4990 * Do any tx complete callback. Note this must
4991 * be done before releasing the node reference.
4993 if (bf->bf_m->m_flags & M_TXCB)
4994 ieee80211_process_callback(ni, bf->bf_m,
4995 (bf->bf_txflags & HAL_TXDESC_NOACK) == 0 ?
4996 ts->ts_status : HAL_TXERR_XRETRY);
4997 ieee80211_free_node(ni);
4999 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap,
5000 BUS_DMASYNC_POSTWRITE);
5001 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
5007 last = STAILQ_LAST(&sc->sc_txbuf, ath_buf, bf_list);
5009 last->bf_flags &= ~ATH_BUF_BUSY;
5010 STAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
5012 #ifdef IEEE80211_SUPPORT_SUPERG
5014 * Flush fast-frame staging queue when traffic slows.
5016 if (txq->axq_depth <= 1)
5017 ieee80211_ff_flush(ic, txq->axq_ac);
5023 txqactive(struct ath_hal *ah, int qnum)
5025 u_int32_t txqs = 1<<qnum;
5026 ath_hal_gettxintrtxqs(ah, &txqs);
5027 return (txqs & (1<<qnum));
5031 * Deferred processing of transmit interrupt; special-cased
5032 * for a single hardware transmit queue (e.g. 5210 and 5211).
5035 ath_tx_task_q0(void *arg, int npending)
5037 struct ath_softc *sc = arg;
5038 struct ifnet *ifp = sc->sc_ifp;
5040 wlan_serialize_enter();
5041 if (txqactive(sc->sc_ah, 0) && ath_tx_processq(sc, &sc->sc_txq[0]))
5042 sc->sc_lastrx = ath_hal_gettsf64(sc->sc_ah);
5043 if (txqactive(sc->sc_ah, sc->sc_cabq->axq_qnum))
5044 ath_tx_processq(sc, sc->sc_cabq);
5045 ifq_clr_oactive(&ifp->if_snd);
5046 sc->sc_wd_timer = 0;
5049 ath_led_event(sc, sc->sc_txrix);
5052 wlan_serialize_exit();
5056 * Deferred processing of transmit interrupt; special-cased
5057 * for four hardware queues, 0-3 (e.g. 5212 w/ WME support).
5060 ath_tx_task_q0123(void *arg, int npending)
5062 struct ath_softc *sc = arg;
5063 struct ifnet *ifp = sc->sc_ifp;
5066 wlan_serialize_enter();
5068 * Process each active queue.
5071 if (txqactive(sc->sc_ah, 0))
5072 nacked += ath_tx_processq(sc, &sc->sc_txq[0]);
5073 if (txqactive(sc->sc_ah, 1))
5074 nacked += ath_tx_processq(sc, &sc->sc_txq[1]);
5075 if (txqactive(sc->sc_ah, 2))
5076 nacked += ath_tx_processq(sc, &sc->sc_txq[2]);
5077 if (txqactive(sc->sc_ah, 3))
5078 nacked += ath_tx_processq(sc, &sc->sc_txq[3]);
5079 if (txqactive(sc->sc_ah, sc->sc_cabq->axq_qnum))
5080 ath_tx_processq(sc, sc->sc_cabq);
5082 sc->sc_lastrx = ath_hal_gettsf64(sc->sc_ah);
5084 ifq_clr_oactive(&ifp->if_snd);
5085 sc->sc_wd_timer = 0;
5088 ath_led_event(sc, sc->sc_txrix);
5091 wlan_serialize_exit();
5095 * Deferred processing of transmit interrupt.
5098 ath_tx_task(void *arg, int npending)
5100 struct ath_softc *sc = arg;
5101 struct ifnet *ifp = sc->sc_ifp;
5104 wlan_serialize_enter();
5107 * Process each active queue.
5110 for (i = 0; i < HAL_NUM_TX_QUEUES; i++) {
5111 if (ATH_TXQ_SETUP(sc, i) && txqactive(sc->sc_ah, i))
5112 nacked += ath_tx_processq(sc, &sc->sc_txq[i]);
5115 sc->sc_lastrx = ath_hal_gettsf64(sc->sc_ah);
5117 ifq_clr_oactive(&ifp->if_snd);
5118 sc->sc_wd_timer = 0;
5121 ath_led_event(sc, sc->sc_txrix);
5124 wlan_serialize_exit();
5128 ath_tx_draintxq(struct ath_softc *sc, struct ath_txq *txq)
5131 struct ath_hal *ah = sc->sc_ah;
5133 struct ieee80211_node *ni;
5138 * NB: this assumes output has been stopped and
5139 * we do not need to block ath_tx_proc
5141 bf = STAILQ_LAST(&sc->sc_txbuf, ath_buf, bf_list);
5143 bf->bf_flags &= ~ATH_BUF_BUSY;
5144 for (ix = 0;; ix++) {
5145 bf = STAILQ_FIRST(&txq->axq_q);
5147 txq->axq_link = NULL;
5150 ATH_TXQ_REMOVE_HEAD(txq, bf_list);
5152 if (sc->sc_debug & ATH_DEBUG_RESET) {
5153 struct ieee80211com *ic = sc->sc_ifp->if_l2com;
5155 ath_printtxbuf(sc, bf, txq->axq_qnum, ix,
5156 ath_hal_txprocdesc(ah, bf->bf_desc,
5157 &bf->bf_status.ds_txstat) == HAL_OK);
5158 ieee80211_dump_pkt(ic, mtod(bf->bf_m, const uint8_t *),
5159 bf->bf_m->m_len, 0, -1);
5161 #endif /* ATH_DEBUG */
5162 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
5167 * Do any callback and reclaim the node reference.
5169 if (bf->bf_m->m_flags & M_TXCB)
5170 ieee80211_process_callback(ni, bf->bf_m, -1);
5171 ieee80211_free_node(ni);
5175 bf->bf_flags &= ~ATH_BUF_BUSY;
5177 STAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
5182 ath_tx_stopdma(struct ath_softc *sc, struct ath_txq *txq)
5184 struct ath_hal *ah = sc->sc_ah;
5186 DPRINTF(sc, ATH_DEBUG_RESET, "%s: tx queue [%u] %p, link %p\n",
5187 __func__, txq->axq_qnum,
5188 (caddr_t)(uintptr_t) ath_hal_gettxbuf(ah, txq->axq_qnum),
5190 (void) ath_hal_stoptxdma(ah, txq->axq_qnum);
5194 * Drain the transmit queues and reclaim resources.
5197 ath_draintxq(struct ath_softc *sc)
5199 struct ath_hal *ah = sc->sc_ah;
5200 struct ifnet *ifp = sc->sc_ifp;
5203 /* XXX return value */
5204 if (!sc->sc_invalid) {
5205 /* don't touch the hardware if marked invalid */
5206 DPRINTF(sc, ATH_DEBUG_RESET, "%s: tx queue [%u] %p, link %p\n",
5207 __func__, sc->sc_bhalq,
5208 (caddr_t)(uintptr_t) ath_hal_gettxbuf(ah, sc->sc_bhalq),
5210 (void) ath_hal_stoptxdma(ah, sc->sc_bhalq);
5211 for (i = 0; i < HAL_NUM_TX_QUEUES; i++)
5212 if (ATH_TXQ_SETUP(sc, i))
5213 ath_tx_stopdma(sc, &sc->sc_txq[i]);
5215 for (i = 0; i < HAL_NUM_TX_QUEUES; i++)
5216 if (ATH_TXQ_SETUP(sc, i))
5217 ath_tx_draintxq(sc, &sc->sc_txq[i]);
5219 if (sc->sc_debug & ATH_DEBUG_RESET) {
5220 struct ath_buf *bf = STAILQ_FIRST(&sc->sc_bbuf);
5221 if (bf != NULL && bf->bf_m != NULL) {
5222 ath_printtxbuf(sc, bf, sc->sc_bhalq, 0,
5223 ath_hal_txprocdesc(ah, bf->bf_desc,
5224 &bf->bf_status.ds_txstat) == HAL_OK);
5225 ieee80211_dump_pkt(ifp->if_l2com,
5226 mtod(bf->bf_m, const uint8_t *), bf->bf_m->m_len,
5230 #endif /* ATH_DEBUG */
5231 ifq_clr_oactive(&ifp->if_snd);
5232 sc->sc_wd_timer = 0;
5236 * Disable the receive h/w in preparation for a reset.
5239 ath_stoprecv(struct ath_softc *sc)
5241 #define PA2DESC(_sc, _pa) \
5242 ((struct ath_desc *)((caddr_t)(_sc)->sc_rxdma.dd_desc + \
5243 ((_pa) - (_sc)->sc_rxdma.dd_desc_paddr)))
5244 struct ath_hal *ah = sc->sc_ah;
5246 ath_hal_stoppcurecv(ah); /* disable PCU */
5247 ath_hal_setrxfilter(ah, 0); /* clear recv filter */
5248 ath_hal_stopdmarecv(ah); /* disable DMA engine */
5249 DELAY(3000); /* 3ms is long enough for 1 frame */
5251 if (sc->sc_debug & (ATH_DEBUG_RESET | ATH_DEBUG_FATAL)) {
5255 kprintf("%s: rx queue %p, link %p\n", __func__,
5256 (caddr_t)(uintptr_t) ath_hal_getrxbuf(ah), sc->sc_rxlink);
5258 STAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
5259 struct ath_desc *ds = bf->bf_desc;
5260 struct ath_rx_status *rs = &bf->bf_status.ds_rxstat;
5261 HAL_STATUS status = ath_hal_rxprocdesc(ah, ds,
5262 bf->bf_daddr, PA2DESC(sc, ds->ds_link), rs);
5263 if (status == HAL_OK || (sc->sc_debug & ATH_DEBUG_FATAL))
5264 ath_printrxbuf(sc, bf, ix, status == HAL_OK);
5269 if (sc->sc_rxpending != NULL) {
5270 m_freem(sc->sc_rxpending);
5271 sc->sc_rxpending = NULL;
5273 sc->sc_rxlink = NULL; /* just in case */
5278 * Enable the receive h/w following a reset.
5281 ath_startrecv(struct ath_softc *sc)
5283 struct ath_hal *ah = sc->sc_ah;
5286 sc->sc_rxlink = NULL;
5287 sc->sc_rxpending = NULL;
5288 STAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
5289 int error = ath_rxbuf_init(sc, bf);
5291 DPRINTF(sc, ATH_DEBUG_RECV,
5292 "%s: ath_rxbuf_init failed %d\n",
5298 bf = STAILQ_FIRST(&sc->sc_rxbuf);
5299 ath_hal_putrxbuf(ah, bf->bf_daddr);
5300 ath_hal_rxena(ah); /* enable recv descriptors */
5301 ath_mode_init(sc); /* set filters, etc. */
5302 ath_hal_startpcurecv(ah); /* re-enable PCU/DMA engine */
5307 * Update internal state after a channel change.
5310 ath_chan_change(struct ath_softc *sc, struct ieee80211_channel *chan)
5312 enum ieee80211_phymode mode;
5315 * Change channels and update the h/w rate map
5316 * if we're switching; e.g. 11a to 11b/g.
5318 mode = ieee80211_chan2mode(chan);
5319 if (mode != sc->sc_curmode)
5320 ath_setcurmode(sc, mode);
5321 sc->sc_curchan = chan;
5325 * Set/change channels. If the channel is really being changed,
5326 * it's done by reseting the chip. To accomplish this we must
5327 * first cleanup any pending DMA, then restart stuff after a la
5331 ath_chan_set(struct ath_softc *sc, struct ieee80211_channel *chan)
5333 struct ifnet *ifp = sc->sc_ifp;
5334 struct ieee80211com *ic = ifp->if_l2com;
5335 struct ath_hal *ah = sc->sc_ah;
5337 DPRINTF(sc, ATH_DEBUG_RESET, "%s: %u (%u MHz, flags 0x%x)\n",
5338 __func__, ieee80211_chan2ieee(ic, chan),
5339 chan->ic_freq, chan->ic_flags);
5340 if (chan != sc->sc_curchan) {
5343 * To switch channels clear any pending DMA operations;
5344 * wait long enough for the RX fifo to drain, reset the
5345 * hardware at the new frequency, and then re-enable
5346 * the relevant bits of the h/w.
5348 ath_hal_intrset(ah, 0); /* disable interrupts */
5349 ath_draintxq(sc); /* clear pending tx frames */
5350 ath_stoprecv(sc); /* turn off frame recv */
5351 if (!ath_hal_reset(ah, sc->sc_opmode, chan, AH_TRUE, &status)) {
5352 if_printf(ifp, "%s: unable to reset "
5353 "channel %u (%u MHz, flags 0x%x), hal status %u\n",
5354 __func__, ieee80211_chan2ieee(ic, chan),
5355 chan->ic_freq, chan->ic_flags, status);
5358 sc->sc_diversity = ath_hal_getdiversity(ah);
5361 * Re-enable rx framework.
5363 if (ath_startrecv(sc) != 0) {
5364 if_printf(ifp, "%s: unable to restart recv logic\n",
5370 * Change channels and update the h/w rate map
5371 * if we're switching; e.g. 11a to 11b/g.
5373 ath_chan_change(sc, chan);
5376 * Re-enable interrupts.
5378 ath_hal_intrset(ah, sc->sc_imask);
5384 * Periodically recalibrate the PHY to account
5385 * for temperature/environment changes.
5388 ath_calibrate_callout(void *arg)
5390 struct ath_softc *sc = arg;
5391 struct ath_hal *ah = sc->sc_ah;
5392 struct ifnet *ifp = sc->sc_ifp;
5393 struct ieee80211com *ic = ifp->if_l2com;
5394 HAL_BOOL longCal, isCalDone;
5397 wlan_serialize_enter();
5399 if (ic->ic_flags & IEEE80211_F_SCAN) /* defer, off channel */
5401 longCal = (ticks - sc->sc_lastlongcal >= ath_longcalinterval*hz);
5403 sc->sc_stats.ast_per_cal++;
5404 sc->sc_lastlongcal = ticks;
5405 if (ath_hal_getrfgain(ah) == HAL_RFGAIN_NEED_CHANGE) {
5407 * Rfgain is out of bounds, reset the chip
5408 * to load new gain values.
5410 DPRINTF(sc, ATH_DEBUG_CALIBRATE,
5411 "%s: rfgain change\n", __func__);
5412 sc->sc_stats.ast_per_rfgain++;
5416 * If this long cal is after an idle period, then
5417 * reset the data collection state so we start fresh.
5419 if (sc->sc_resetcal) {
5420 (void) ath_hal_calreset(ah, sc->sc_curchan);
5421 sc->sc_lastcalreset = ticks;
5422 sc->sc_resetcal = 0;
5425 if (ath_hal_calibrateN(ah, sc->sc_curchan, longCal, &isCalDone)) {
5428 * Calibrate noise floor data again in case of change.
5430 ath_hal_process_noisefloor(ah);
5433 DPRINTF(sc, ATH_DEBUG_ANY,
5434 "%s: calibration of channel %u failed\n",
5435 __func__, sc->sc_curchan->ic_freq);
5436 sc->sc_stats.ast_per_calfail++;
5441 * Use a shorter interval to potentially collect multiple
5442 * data samples required to complete calibration. Once
5443 * we're told the work is done we drop back to a longer
5444 * interval between requests. We're more aggressive doing
5445 * work when operating as an AP to improve operation right
5448 nextcal = (1000*ath_shortcalinterval)/hz;
5449 if (sc->sc_opmode != HAL_M_HOSTAP)
5452 nextcal = ath_longcalinterval*hz;
5453 if (sc->sc_lastcalreset == 0)
5454 sc->sc_lastcalreset = sc->sc_lastlongcal;
5455 else if (ticks - sc->sc_lastcalreset >= ath_resetcalinterval*hz)
5456 sc->sc_resetcal = 1; /* setup reset next trip */
5460 DPRINTF(sc, ATH_DEBUG_CALIBRATE, "%s: next +%u (%sisCalDone)\n",
5461 __func__, nextcal, isCalDone ? "" : "!");
5462 callout_reset(&sc->sc_cal_ch, nextcal,
5463 ath_calibrate_callout, sc);
5465 DPRINTF(sc, ATH_DEBUG_CALIBRATE, "%s: calibration disabled\n",
5467 /* NB: don't rearm timer */
5469 wlan_serialize_exit();
5473 ath_scan_start(struct ieee80211com *ic)
5475 struct ifnet *ifp = ic->ic_ifp;
5476 struct ath_softc *sc = ifp->if_softc;
5477 struct ath_hal *ah = sc->sc_ah;
5478 char ethstr[ETHER_ADDRSTRLEN + 1];
5481 /* XXX calibration timer? */
5483 sc->sc_scanning = 1;
5484 sc->sc_syncbeacon = 0;
5485 rfilt = ath_calcrxfilter(sc);
5486 ath_hal_setrxfilter(ah, rfilt);
5487 ath_hal_setassocid(ah, ifp->if_broadcastaddr, 0);
5489 DPRINTF(sc, ATH_DEBUG_STATE, "%s: RX filter 0x%x bssid %s aid 0\n",
5490 __func__, rfilt, kether_ntoa(ifp->if_broadcastaddr, ethstr));
5494 ath_scan_end(struct ieee80211com *ic)
5496 struct ifnet *ifp = ic->ic_ifp;
5497 struct ath_softc *sc = ifp->if_softc;
5498 struct ath_hal *ah = sc->sc_ah;
5499 char ethstr[ETHER_ADDRSTRLEN + 1];
5502 sc->sc_scanning = 0;
5503 rfilt = ath_calcrxfilter(sc);
5504 ath_hal_setrxfilter(ah, rfilt);
5505 ath_hal_setassocid(ah, sc->sc_curbssid, sc->sc_curaid);
5507 ath_hal_process_noisefloor(ah);
5509 DPRINTF(sc, ATH_DEBUG_STATE, "%s: RX filter 0x%x bssid %s aid 0x%x\n",
5510 __func__, rfilt, kether_ntoa(sc->sc_curbssid, ethstr),
5515 ath_set_channel(struct ieee80211com *ic)
5517 struct ifnet *ifp = ic->ic_ifp;
5518 struct ath_softc *sc = ifp->if_softc;
5520 (void) ath_chan_set(sc, ic->ic_curchan);
5522 * If we are returning to our bss channel then mark state
5523 * so the next recv'd beacon's tsf will be used to sync the
5524 * beacon timers. Note that since we only hear beacons in
5525 * sta/ibss mode this has no effect in other operating modes.
5527 if (!sc->sc_scanning && ic->ic_curchan == ic->ic_bsschan)
5528 sc->sc_syncbeacon = 1;
5532 * Walk the vap list and check if there any vap's in RUN state.
5535 ath_isanyrunningvaps(struct ieee80211vap *this)
5537 struct ieee80211com *ic = this->iv_ic;
5538 struct ieee80211vap *vap;
5540 TAILQ_FOREACH(vap, &ic->ic_vaps, iv_next) {
5541 if (vap != this && vap->iv_state >= IEEE80211_S_RUN)
5548 ath_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
5550 struct ieee80211com *ic = vap->iv_ic;
5551 struct ath_softc *sc = ic->ic_ifp->if_softc;
5552 struct ath_vap *avp = ATH_VAP(vap);
5553 struct ath_hal *ah = sc->sc_ah;
5554 struct ieee80211_node *ni = NULL;
5555 int i, error, stamode;
5557 char ethstr[ETHER_ADDRSTRLEN + 1];
5558 static const HAL_LED_STATE leds[] = {
5559 HAL_LED_INIT, /* IEEE80211_S_INIT */
5560 HAL_LED_SCAN, /* IEEE80211_S_SCAN */
5561 HAL_LED_AUTH, /* IEEE80211_S_AUTH */
5562 HAL_LED_ASSOC, /* IEEE80211_S_ASSOC */
5563 HAL_LED_RUN, /* IEEE80211_S_CAC */
5564 HAL_LED_RUN, /* IEEE80211_S_RUN */
5565 HAL_LED_RUN, /* IEEE80211_S_CSA */
5566 HAL_LED_RUN, /* IEEE80211_S_SLEEP */
5569 DPRINTF(sc, ATH_DEBUG_STATE, "%s: %s -> %s\n", __func__,
5570 ieee80211_state_name[vap->iv_state],
5571 ieee80211_state_name[nstate]);
5573 callout_stop(&sc->sc_cal_ch);
5574 ath_hal_setledstate(ah, leds[nstate]); /* set LED */
5576 if (nstate == IEEE80211_S_SCAN) {
5578 * Scanning: turn off beacon miss and don't beacon.
5579 * Mark beacon state so when we reach RUN state we'll
5580 * [re]setup beacons. Unblock the task q thread so
5581 * deferred interrupt processing is done.
5584 sc->sc_imask &~ (HAL_INT_SWBA | HAL_INT_BMISS));
5585 sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS);
5587 taskqueue_unblock(sc->sc_tq);
5591 rfilt = ath_calcrxfilter(sc);
5592 stamode = (vap->iv_opmode == IEEE80211_M_STA ||
5593 vap->iv_opmode == IEEE80211_M_AHDEMO ||
5594 vap->iv_opmode == IEEE80211_M_IBSS);
5595 if (stamode && nstate == IEEE80211_S_RUN) {
5596 sc->sc_curaid = ni->ni_associd;
5597 IEEE80211_ADDR_COPY(sc->sc_curbssid, ni->ni_bssid);
5598 ath_hal_setassocid(ah, sc->sc_curbssid, sc->sc_curaid);
5600 DPRINTF(sc, ATH_DEBUG_STATE, "%s: RX filter 0x%x bssid %s aid 0x%x\n",
5601 __func__, rfilt, kether_ntoa(sc->sc_curbssid, ethstr), sc->sc_curaid);
5602 ath_hal_setrxfilter(ah, rfilt);
5604 /* XXX is this to restore keycache on resume? */
5605 if (vap->iv_opmode != IEEE80211_M_STA &&
5606 (vap->iv_flags & IEEE80211_F_PRIVACY)) {
5607 for (i = 0; i < IEEE80211_WEP_NKID; i++)
5608 if (ath_hal_keyisvalid(ah, i))
5609 ath_hal_keysetmac(ah, i, ni->ni_bssid);
5613 * Invoke the parent method to do net80211 work.
5615 error = avp->av_newstate(vap, nstate, arg);
5619 if (nstate == IEEE80211_S_RUN) {
5620 /* NB: collect bss node again, it may have changed */
5623 DPRINTF(sc, ATH_DEBUG_STATE,
5624 "%s(RUN): iv_flags 0x%08x bintvl %d bssid %s "
5625 "capinfo 0x%04x chan %d\n", __func__,
5626 vap->iv_flags, ni->ni_intval, kether_ntoa(ni->ni_bssid, ethstr),
5627 ni->ni_capinfo, ieee80211_chan2ieee(ic, ic->ic_curchan));
5629 switch (vap->iv_opmode) {
5630 #ifdef IEEE80211_SUPPORT_TDMA
5631 case IEEE80211_M_AHDEMO:
5632 if ((vap->iv_caps & IEEE80211_C_TDMA) == 0)
5636 case IEEE80211_M_HOSTAP:
5637 case IEEE80211_M_IBSS:
5638 case IEEE80211_M_MBSS:
5640 * Allocate and setup the beacon frame.
5642 * Stop any previous beacon DMA. This may be
5643 * necessary, for example, when an ibss merge
5644 * causes reconfiguration; there will be a state
5645 * transition from RUN->RUN that means we may
5646 * be called with beacon transmission active.
5648 ath_hal_stoptxdma(ah, sc->sc_bhalq);
5650 error = ath_beacon_alloc(sc, ni);
5654 * If joining an adhoc network defer beacon timer
5655 * configuration to the next beacon frame so we
5656 * have a current TSF to use. Otherwise we're
5657 * starting an ibss/bss so there's no need to delay;
5658 * if this is the first vap moving to RUN state, then
5659 * beacon state needs to be [re]configured.
5661 if (vap->iv_opmode == IEEE80211_M_IBSS &&
5662 ni->ni_tstamp.tsf != 0) {
5663 sc->sc_syncbeacon = 1;
5664 } else if (!sc->sc_beacons) {
5665 #ifdef IEEE80211_SUPPORT_TDMA
5666 if (vap->iv_caps & IEEE80211_C_TDMA)
5667 ath_tdma_config(sc, vap);
5670 ath_beacon_config(sc, vap);
5674 case IEEE80211_M_STA:
5676 * Defer beacon timer configuration to the next
5677 * beacon frame so we have a current TSF to use
5678 * (any TSF collected when scanning is likely old).
5680 sc->sc_syncbeacon = 1;
5682 case IEEE80211_M_MONITOR:
5684 * Monitor mode vaps have only INIT->RUN and RUN->RUN
5685 * transitions so we must re-enable interrupts here to
5686 * handle the case of a single monitor mode vap.
5688 ath_hal_intrset(ah, sc->sc_imask);
5690 case IEEE80211_M_WDS:
5696 * Let the hal process statistics collected during a
5697 * scan so it can provide calibrated noise floor data.
5699 ath_hal_process_noisefloor(ah);
5701 * Reset rssi stats; maybe not the best place...
5703 sc->sc_halstats.ns_avgbrssi = ATH_RSSI_DUMMY_MARKER;
5704 sc->sc_halstats.ns_avgrssi = ATH_RSSI_DUMMY_MARKER;
5705 sc->sc_halstats.ns_avgtxrssi = ATH_RSSI_DUMMY_MARKER;
5707 * Finally, start any timers and the task q thread
5708 * (in case we didn't go through SCAN state).
5710 if (ath_longcalinterval != 0) {
5711 /* start periodic recalibration timer */
5712 callout_reset(&sc->sc_cal_ch, 1,
5713 ath_calibrate_callout, sc);
5715 DPRINTF(sc, ATH_DEBUG_CALIBRATE,
5716 "%s: calibration disabled\n", __func__);
5718 taskqueue_unblock(sc->sc_tq);
5719 } else if (nstate == IEEE80211_S_INIT) {
5721 * If there are no vaps left in RUN state then
5722 * shutdown host/driver operation:
5723 * o disable interrupts
5724 * o disable the task queue thread
5725 * o mark beacon processing as stopped
5727 if (!ath_isanyrunningvaps(vap)) {
5728 sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS);
5729 /* disable interrupts */
5730 ath_hal_intrset(ah, sc->sc_imask &~ HAL_INT_GLOBAL);
5731 taskqueue_block(sc->sc_tq);
5734 #ifdef IEEE80211_SUPPORT_TDMA
5735 ath_hal_setcca(ah, AH_TRUE);
5743 * Allocate a key cache slot to the station so we can
5744 * setup a mapping from key index to node. The key cache
5745 * slot is needed for managing antenna state and for
5746 * compression when stations do not use crypto. We do
5747 * it uniliaterally here; if crypto is employed this slot
5748 * will be reassigned.
5751 ath_setup_stationkey(struct ieee80211_node *ni)
5753 struct ieee80211vap *vap = ni->ni_vap;
5754 struct ath_softc *sc = vap->iv_ic->ic_ifp->if_softc;
5755 ieee80211_keyix keyix, rxkeyix;
5757 if (!ath_key_alloc(vap, &ni->ni_ucastkey, &keyix, &rxkeyix)) {
5759 * Key cache is full; we'll fall back to doing
5760 * the more expensive lookup in software. Note
5761 * this also means no h/w compression.
5763 /* XXX msg+statistic */
5766 ni->ni_ucastkey.wk_keyix = keyix;
5767 ni->ni_ucastkey.wk_rxkeyix = rxkeyix;
5768 /* NB: must mark device key to get called back on delete */
5769 ni->ni_ucastkey.wk_flags |= IEEE80211_KEY_DEVKEY;
5770 IEEE80211_ADDR_COPY(ni->ni_ucastkey.wk_macaddr, ni->ni_macaddr);
5771 /* NB: this will create a pass-thru key entry */
5772 ath_keyset(sc, &ni->ni_ucastkey, vap->iv_bss);
5777 * Setup driver-specific state for a newly associated node.
5778 * Note that we're called also on a re-associate, the isnew
5779 * param tells us if this is the first time or not.
5782 ath_newassoc(struct ieee80211_node *ni, int isnew)
5784 struct ath_node *an = ATH_NODE(ni);
5785 struct ieee80211vap *vap = ni->ni_vap;
5786 struct ath_softc *sc = vap->iv_ic->ic_ifp->if_softc;
5787 const struct ieee80211_txparam *tp = ni->ni_txparms;
5789 an->an_mcastrix = ath_tx_findrix(sc, tp->mcastrate);
5790 an->an_mgmtrix = ath_tx_findrix(sc, tp->mgmtrate);
5792 ath_rate_newassoc(sc, an, isnew);
5794 (vap->iv_flags & IEEE80211_F_PRIVACY) == 0 && sc->sc_hasclrkey &&
5795 ni->ni_ucastkey.wk_keyix == IEEE80211_KEYIX_NONE)
5796 ath_setup_stationkey(ni);
5800 ath_setregdomain(struct ieee80211com *ic, struct ieee80211_regdomain *reg,
5801 int nchans, struct ieee80211_channel chans[])
5803 struct ath_softc *sc = ic->ic_ifp->if_softc;
5804 struct ath_hal *ah = sc->sc_ah;
5807 DPRINTF(sc, ATH_DEBUG_REGDOMAIN,
5808 "%s: rd %u cc %u location %c%s\n",
5809 __func__, reg->regdomain, reg->country, reg->location,
5810 reg->ecm ? " ecm" : "");
5812 status = ath_hal_set_channels(ah, chans, nchans,
5813 reg->country, reg->regdomain);
5814 if (status != HAL_OK) {
5815 DPRINTF(sc, ATH_DEBUG_REGDOMAIN, "%s: failed, status %u\n",
5817 return EINVAL; /* XXX */
5823 ath_getradiocaps(struct ieee80211com *ic,
5824 int maxchans, int *nchans, struct ieee80211_channel chans[])
5826 struct ath_softc *sc = ic->ic_ifp->if_softc;
5827 struct ath_hal *ah = sc->sc_ah;
5829 DPRINTF(sc, ATH_DEBUG_REGDOMAIN, "%s: use rd %u cc %d\n",
5830 __func__, SKU_DEBUG, CTRY_DEFAULT);
5832 /* XXX check return */
5833 (void) ath_hal_getchannels(ah, chans, maxchans, nchans,
5834 HAL_MODE_ALL, CTRY_DEFAULT, SKU_DEBUG, AH_TRUE);
5839 ath_getchannels(struct ath_softc *sc)
5841 struct ifnet *ifp = sc->sc_ifp;
5842 struct ieee80211com *ic = ifp->if_l2com;
5843 struct ath_hal *ah = sc->sc_ah;
5847 * Collect channel set based on EEPROM contents.
5849 status = ath_hal_init_channels(ah, ic->ic_channels, IEEE80211_CHAN_MAX,
5850 &ic->ic_nchans, HAL_MODE_ALL, CTRY_DEFAULT, SKU_NONE, AH_TRUE);
5851 if (status != HAL_OK) {
5852 if_printf(ifp, "%s: unable to collect channel list from hal, "
5853 "status %d\n", __func__, status);
5856 (void) ath_hal_getregdomain(ah, &sc->sc_eerd);
5857 ath_hal_getcountrycode(ah, &sc->sc_eecc); /* NB: cannot fail */
5858 /* XXX map Atheros sku's to net80211 SKU's */
5859 /* XXX net80211 types too small */
5860 ic->ic_regdomain.regdomain = (uint16_t) sc->sc_eerd;
5861 ic->ic_regdomain.country = (uint16_t) sc->sc_eecc;
5862 ic->ic_regdomain.isocc[0] = ' '; /* XXX don't know */
5863 ic->ic_regdomain.isocc[1] = ' ';
5865 ic->ic_regdomain.ecm = 1;
5866 ic->ic_regdomain.location = 'I';
5868 DPRINTF(sc, ATH_DEBUG_REGDOMAIN,
5869 "%s: eeprom rd %u cc %u (mapped rd %u cc %u) location %c%s\n",
5870 __func__, sc->sc_eerd, sc->sc_eecc,
5871 ic->ic_regdomain.regdomain, ic->ic_regdomain.country,
5872 ic->ic_regdomain.location, ic->ic_regdomain.ecm ? " ecm" : "");
5877 ath_led_done_callout(void *arg)
5879 struct ath_softc *sc = arg;
5881 wlan_serialize_enter();
5882 sc->sc_blinking = 0;
5883 wlan_serialize_exit();
5887 * Turn the LED off: flip the pin and then set a timer so no
5888 * update will happen for the specified duration.
5891 ath_led_off_callout(void *arg)
5893 struct ath_softc *sc = arg;
5895 wlan_serialize_enter();
5896 ath_hal_gpioset(sc->sc_ah, sc->sc_ledpin, !sc->sc_ledon);
5897 callout_reset(&sc->sc_ledtimer, sc->sc_ledoff,
5898 ath_led_done_callout, sc);
5899 wlan_serialize_exit();
5903 * Blink the LED according to the specified on/off times.
5906 ath_led_blink(struct ath_softc *sc, int on, int off)
5908 DPRINTF(sc, ATH_DEBUG_LED, "%s: on %u off %u\n", __func__, on, off);
5909 ath_hal_gpioset(sc->sc_ah, sc->sc_ledpin, sc->sc_ledon);
5910 sc->sc_blinking = 1;
5911 sc->sc_ledoff = off;
5912 callout_reset(&sc->sc_ledtimer, on, ath_led_off_callout, sc);
5916 ath_led_event(struct ath_softc *sc, int rix)
5918 sc->sc_ledevent = ticks; /* time of last event */
5919 if (sc->sc_blinking) /* don't interrupt active blink */
5921 ath_led_blink(sc, sc->sc_hwmap[rix].ledon, sc->sc_hwmap[rix].ledoff);
5925 ath_rate_setup(struct ath_softc *sc, u_int mode)
5927 struct ath_hal *ah = sc->sc_ah;
5928 const HAL_RATE_TABLE *rt;
5931 case IEEE80211_MODE_11A:
5932 rt = ath_hal_getratetable(ah, HAL_MODE_11A);
5934 case IEEE80211_MODE_HALF:
5935 rt = ath_hal_getratetable(ah, HAL_MODE_11A_HALF_RATE);
5937 case IEEE80211_MODE_QUARTER:
5938 rt = ath_hal_getratetable(ah, HAL_MODE_11A_QUARTER_RATE);
5940 case IEEE80211_MODE_11B:
5941 rt = ath_hal_getratetable(ah, HAL_MODE_11B);
5943 case IEEE80211_MODE_11G:
5944 rt = ath_hal_getratetable(ah, HAL_MODE_11G);
5946 case IEEE80211_MODE_TURBO_A:
5947 rt = ath_hal_getratetable(ah, HAL_MODE_108A);
5949 case IEEE80211_MODE_TURBO_G:
5950 rt = ath_hal_getratetable(ah, HAL_MODE_108G);
5952 case IEEE80211_MODE_STURBO_A:
5953 rt = ath_hal_getratetable(ah, HAL_MODE_TURBO);
5955 case IEEE80211_MODE_11NA:
5956 rt = ath_hal_getratetable(ah, HAL_MODE_11NA_HT20);
5958 case IEEE80211_MODE_11NG:
5959 rt = ath_hal_getratetable(ah, HAL_MODE_11NG_HT20);
5962 DPRINTF(sc, ATH_DEBUG_ANY, "%s: invalid mode %u\n",
5966 sc->sc_rates[mode] = rt;
5967 return (rt != NULL);
5971 ath_setcurmode(struct ath_softc *sc, enum ieee80211_phymode mode)
5973 /* NB: on/off times from the Atheros NDIS driver, w/ permission */
5974 static const struct {
5975 u_int rate; /* tx/rx 802.11 rate */
5976 u_int16_t timeOn; /* LED on time (ms) */
5977 u_int16_t timeOff; /* LED off time (ms) */
5993 /* XXX half/quarter rates */
5995 const HAL_RATE_TABLE *rt;
5998 memset(sc->sc_rixmap, 0xff, sizeof(sc->sc_rixmap));
5999 rt = sc->sc_rates[mode];
6000 KASSERT(rt != NULL, ("no h/w rate set for phy mode %u", mode));
6001 for (i = 0; i < rt->rateCount; i++) {
6002 uint8_t ieeerate = rt->info[i].dot11Rate & IEEE80211_RATE_VAL;
6003 if (rt->info[i].phy != IEEE80211_T_HT)
6004 sc->sc_rixmap[ieeerate] = i;
6006 sc->sc_rixmap[ieeerate | IEEE80211_RATE_MCS] = i;
6008 memset(sc->sc_hwmap, 0, sizeof(sc->sc_hwmap));
6009 for (i = 0; i < NELEM(sc->sc_hwmap); i++) {
6010 if (i >= rt->rateCount) {
6011 sc->sc_hwmap[i].ledon = (500 * hz) / 1000;
6012 sc->sc_hwmap[i].ledoff = (130 * hz) / 1000;
6015 sc->sc_hwmap[i].ieeerate =
6016 rt->info[i].dot11Rate & IEEE80211_RATE_VAL;
6017 if (rt->info[i].phy == IEEE80211_T_HT)
6018 sc->sc_hwmap[i].ieeerate |= IEEE80211_RATE_MCS;
6019 sc->sc_hwmap[i].txflags = IEEE80211_RADIOTAP_F_DATAPAD;
6020 if (rt->info[i].shortPreamble ||
6021 rt->info[i].phy == IEEE80211_T_OFDM)
6022 sc->sc_hwmap[i].txflags |= IEEE80211_RADIOTAP_F_SHORTPRE;
6023 sc->sc_hwmap[i].rxflags = sc->sc_hwmap[i].txflags;
6024 for (j = 0; j < NELEM(blinkrates)-1; j++)
6025 if (blinkrates[j].rate == sc->sc_hwmap[i].ieeerate)
6027 /* NB: this uses the last entry if the rate isn't found */
6028 /* XXX beware of overlow */
6029 sc->sc_hwmap[i].ledon = (blinkrates[j].timeOn * hz) / 1000;
6030 sc->sc_hwmap[i].ledoff = (blinkrates[j].timeOff * hz) / 1000;
6032 sc->sc_currates = rt;
6033 sc->sc_curmode = mode;
6035 * All protection frames are transmited at 2Mb/s for
6036 * 11g, otherwise at 1Mb/s.
6038 if (mode == IEEE80211_MODE_11G)
6039 sc->sc_protrix = ath_tx_findrix(sc, 2*2);
6041 sc->sc_protrix = ath_tx_findrix(sc, 2*1);
6042 /* NB: caller is responsible for reseting rate control state */
6047 ath_printrxbuf(struct ath_softc *sc, const struct ath_buf *bf,
6050 const struct ath_rx_status *rs = &bf->bf_status.ds_rxstat;
6051 struct ath_hal *ah = sc->sc_ah;
6052 const struct ath_desc *ds;
6055 for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) {
6056 kprintf("R[%2u] (DS.V:%p DS.P:%p) L:%08x D:%08x%s\n"
6057 " %08x %08x %08x %08x\n",
6058 ix, ds, (const struct ath_desc *)bf->bf_daddr + i,
6059 ds->ds_link, ds->ds_data,
6060 !done ? "" : (rs->rs_status == 0) ? " *" : " !",
6061 ds->ds_ctl0, ds->ds_ctl1,
6062 ds->ds_hw[0], ds->ds_hw[1]);
6063 if (ah->ah_magic == 0x20065416) {
6064 kprintf(" %08x %08x %08x %08x %08x %08x %08x\n",
6065 ds->ds_hw[2], ds->ds_hw[3], ds->ds_hw[4],
6066 ds->ds_hw[5], ds->ds_hw[6], ds->ds_hw[7],
6073 ath_printtxbuf(struct ath_softc *sc, const struct ath_buf *bf,
6074 u_int qnum, u_int ix, int done)
6076 const struct ath_tx_status *ts = &bf->bf_status.ds_txstat;
6077 struct ath_hal *ah = sc->sc_ah;
6078 const struct ath_desc *ds;
6081 kprintf("Q%u[%3u]", qnum, ix);
6082 for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) {
6083 kprintf(" (DS.V:%p DS.P:%p) L:%08x D:%08x F:04%x%s\n"
6084 " %08x %08x %08x %08x %08x %08x\n",
6085 ds, (const struct ath_desc *)bf->bf_daddr + i,
6086 ds->ds_link, ds->ds_data, bf->bf_txflags,
6087 !done ? "" : (ts->ts_status == 0) ? " *" : " !",
6088 ds->ds_ctl0, ds->ds_ctl1,
6089 ds->ds_hw[0], ds->ds_hw[1], ds->ds_hw[2], ds->ds_hw[3]);
6090 if (ah->ah_magic == 0x20065416) {
6091 kprintf(" %08x %08x %08x %08x %08x %08x %08x %08x\n",
6092 ds->ds_hw[4], ds->ds_hw[5], ds->ds_hw[6],
6093 ds->ds_hw[7], ds->ds_hw[8], ds->ds_hw[9],
6094 ds->ds_hw[10],ds->ds_hw[11]);
6095 kprintf(" %08x %08x %08x %08x %08x %08x %08x %08x\n",
6096 ds->ds_hw[12],ds->ds_hw[13],ds->ds_hw[14],
6097 ds->ds_hw[15],ds->ds_hw[16],ds->ds_hw[17],
6098 ds->ds_hw[18], ds->ds_hw[19]);
6102 #endif /* ATH_DEBUG */
6105 ath_watchdog_callout(void *arg)
6107 struct ath_softc *sc = arg;
6109 wlan_serialize_enter();
6110 if (sc->sc_wd_timer != 0 && --sc->sc_wd_timer == 0) {
6111 struct ifnet *ifp = sc->sc_ifp;
6114 if (ath_hal_gethangstate(sc->sc_ah, 0xffff, &hangs) &&
6116 if_printf(ifp, "%s hang detected (0x%x)\n",
6117 hangs & 0xff ? "bb" : "mac", hangs);
6119 if_printf(ifp, "device timeout\n");
6122 sc->sc_stats.ast_watchdog++;
6124 callout_reset(&sc->sc_wd_ch, hz, ath_watchdog_callout, sc);
6125 wlan_serialize_exit();
6130 * Diagnostic interface to the HAL. This is used by various
6131 * tools to do things like retrieve register contents for
6132 * debugging. The mechanism is intentionally opaque so that
6133 * it can change frequently w/o concern for compatiblity.
6136 ath_ioctl_diag(struct ath_softc *sc, struct ath_diag *ad)
6138 struct ath_hal *ah = sc->sc_ah;
6139 u_int id = ad->ad_id & ATH_DIAG_ID;
6140 void *indata = NULL;
6141 void *outdata = NULL;
6142 u_int32_t insize = ad->ad_in_size;
6143 u_int32_t outsize = ad->ad_out_size;
6146 if (ad->ad_id & ATH_DIAG_IN) {
6150 indata = kmalloc(insize, M_TEMP, M_INTWAIT);
6151 error = copyin(ad->ad_in_data, indata, insize);
6155 if (ad->ad_id & ATH_DIAG_DYN) {
6157 * Allocate a buffer for the results (otherwise the HAL
6158 * returns a pointer to a buffer where we can read the
6159 * results). Note that we depend on the HAL leaving this
6160 * pointer for us to use below in reclaiming the buffer;
6161 * may want to be more defensive.
6163 outdata = kmalloc(outsize, M_TEMP, M_INTWAIT);
6165 if (ath_hal_getdiagstate(ah, id, indata, insize, &outdata, &outsize)) {
6166 if (outsize < ad->ad_out_size)
6167 ad->ad_out_size = outsize;
6168 if (outdata != NULL)
6169 error = copyout(outdata, ad->ad_out_data,
6175 if ((ad->ad_id & ATH_DIAG_IN) && indata != NULL)
6176 kfree(indata, M_TEMP);
6177 if ((ad->ad_id & ATH_DIAG_DYN) && outdata != NULL)
6178 kfree(outdata, M_TEMP);
6181 #endif /* ATH_DIAGAPI */
6184 ath_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *ucred)
6186 #define IS_RUNNING(ifp) \
6187 ((ifp->if_flags & IFF_UP) && (ifp->if_flags & IFF_RUNNING))
6188 struct ath_softc *sc = ifp->if_softc;
6189 struct ieee80211com *ic = ifp->if_l2com;
6190 struct ifreq *ifr = (struct ifreq *)data;
6191 const HAL_RATE_TABLE *rt;
6196 if (IS_RUNNING(ifp)) {
6198 * To avoid rescanning another access point,
6199 * do not call ath_init() here. Instead,
6200 * only reflect promisc mode settings.
6203 } else if (ifp->if_flags & IFF_UP) {
6205 * Beware of being called during attach/detach
6206 * to reset promiscuous mode. In that case we
6207 * will still be marked UP but not RUNNING.
6208 * However trying to re-init the interface
6209 * is the wrong thing to do as we've already
6210 * torn down much of our state. There's
6211 * probably a better way to deal with this.
6213 if (!sc->sc_invalid)
6214 ath_init(sc); /* XXX lose error */
6216 ath_stop_locked(ifp);
6218 /* XXX must wakeup in places like ath_vap_delete */
6219 if (!sc->sc_invalid)
6220 ath_hal_setpower(sc->sc_ah, HAL_PM_FULL_SLEEP);
6226 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd);
6229 /* NB: embed these numbers to get a consistent view */
6230 sc->sc_stats.ast_tx_packets = ifp->if_opackets;
6231 sc->sc_stats.ast_rx_packets = ifp->if_ipackets;
6232 sc->sc_stats.ast_tx_rssi = ATH_RSSI(sc->sc_halstats.ns_avgtxrssi);
6233 sc->sc_stats.ast_rx_rssi = ATH_RSSI(sc->sc_halstats.ns_avgrssi);
6234 #ifdef IEEE80211_SUPPORT_TDMA
6235 sc->sc_stats.ast_tdma_tsfadjp = TDMA_AVG(sc->sc_avgtsfdeltap);
6236 sc->sc_stats.ast_tdma_tsfadjm = TDMA_AVG(sc->sc_avgtsfdeltam);
6238 rt = sc->sc_currates;
6240 sc->sc_stats.ast_tx_rate =
6241 rt->info[sc->sc_txrix].dot11Rate &~ IEEE80211_RATE_BASIC;
6242 return copyout(&sc->sc_stats,
6243 ifr->ifr_data, sizeof (sc->sc_stats));
6245 error = priv_check(curthread, PRIV_DRIVER);
6247 memset(&sc->sc_stats, 0, sizeof(sc->sc_stats));
6251 error = ath_ioctl_diag(sc, (struct ath_diag *) ifr);
6255 error = ether_ioctl(ifp, cmd, data);
6266 ath_sysctl_slottime(SYSCTL_HANDLER_ARGS)
6268 struct ath_softc *sc = arg1;
6272 wlan_serialize_enter();
6273 slottime = ath_hal_getslottime(sc->sc_ah);
6274 error = sysctl_handle_int(oidp, &slottime, 0, req);
6275 if (error == 0 && req->newptr) {
6276 if (!ath_hal_setslottime(sc->sc_ah, slottime))
6279 wlan_serialize_exit();
6284 ath_sysctl_acktimeout(SYSCTL_HANDLER_ARGS)
6286 struct ath_softc *sc = arg1;
6290 wlan_serialize_enter();
6291 acktimeout = ath_hal_getacktimeout(sc->sc_ah);
6292 error = sysctl_handle_int(oidp, &acktimeout, 0, req);
6293 if (error == 0 && req->newptr) {
6294 if (!ath_hal_setacktimeout(sc->sc_ah, acktimeout))
6297 wlan_serialize_exit();
6302 ath_sysctl_ctstimeout(SYSCTL_HANDLER_ARGS)
6304 struct ath_softc *sc = arg1;
6308 wlan_serialize_enter();
6309 ctstimeout = ath_hal_getctstimeout(sc->sc_ah);
6310 error = sysctl_handle_int(oidp, &ctstimeout, 0, req);
6311 if (error == 0 && req->newptr) {
6312 if (!ath_hal_setctstimeout(sc->sc_ah, ctstimeout))
6315 wlan_serialize_exit();
6320 ath_sysctl_softled(SYSCTL_HANDLER_ARGS)
6322 struct ath_softc *sc = arg1;
6323 int softled = sc->sc_softled;
6326 error = sysctl_handle_int(oidp, &softled, 0, req);
6327 if (error || !req->newptr)
6329 wlan_serialize_enter();
6330 softled = (softled != 0);
6331 if (softled != sc->sc_softled) {
6333 /* NB: handle any sc_ledpin change */
6334 ath_hal_gpioCfgOutput(sc->sc_ah, sc->sc_ledpin,
6335 HAL_GPIO_MUX_MAC_NETWORK_LED);
6336 ath_hal_gpioset(sc->sc_ah, sc->sc_ledpin,
6339 sc->sc_softled = softled;
6341 wlan_serialize_exit();
6346 ath_sysctl_ledpin(SYSCTL_HANDLER_ARGS)
6348 struct ath_softc *sc = arg1;
6349 int ledpin = sc->sc_ledpin;
6352 error = sysctl_handle_int(oidp, &ledpin, 0, req);
6353 if (error || !req->newptr)
6355 wlan_serialize_enter();
6356 if (ledpin != sc->sc_ledpin) {
6357 sc->sc_ledpin = ledpin;
6358 if (sc->sc_softled) {
6359 ath_hal_gpioCfgOutput(sc->sc_ah, sc->sc_ledpin,
6360 HAL_GPIO_MUX_MAC_NETWORK_LED);
6361 ath_hal_gpioset(sc->sc_ah, sc->sc_ledpin,
6365 wlan_serialize_exit();
6370 ath_sysctl_txantenna(SYSCTL_HANDLER_ARGS)
6372 struct ath_softc *sc = arg1;
6376 wlan_serialize_enter();
6377 txantenna = ath_hal_getantennaswitch(sc->sc_ah);
6378 error = sysctl_handle_int(oidp, &txantenna, 0, req);
6380 if (!error && req->newptr) {
6381 /* XXX assumes 2 antenna ports */
6382 if (txantenna < HAL_ANT_VARIABLE ||
6383 txantenna > HAL_ANT_FIXED_B) {
6386 ath_hal_setantennaswitch(sc->sc_ah, txantenna);
6388 * NB: with the switch locked this isn't meaningful,
6389 * but set it anyway so things like radiotap get
6390 * consistent info in their data.
6392 sc->sc_txantenna = txantenna;
6395 wlan_serialize_exit();
6400 ath_sysctl_rxantenna(SYSCTL_HANDLER_ARGS)
6402 struct ath_softc *sc = arg1;
6406 wlan_serialize_enter();
6407 defantenna = ath_hal_getdefantenna(sc->sc_ah);
6408 error = sysctl_handle_int(oidp, &defantenna, 0, req);
6409 if (error == 0 && req->newptr)
6410 ath_hal_setdefantenna(sc->sc_ah, defantenna);
6411 wlan_serialize_exit();
6416 ath_sysctl_diversity(SYSCTL_HANDLER_ARGS)
6418 struct ath_softc *sc = arg1;
6422 wlan_serialize_enter();
6423 diversity = ath_hal_getdiversity(sc->sc_ah);
6424 error = sysctl_handle_int(oidp, &diversity, 0, req);
6425 if (error == 0 && req->newptr) {
6426 if (!ath_hal_setdiversity(sc->sc_ah, diversity))
6429 sc->sc_diversity = diversity;
6431 wlan_serialize_exit();
6436 ath_sysctl_diag(SYSCTL_HANDLER_ARGS)
6438 struct ath_softc *sc = arg1;
6442 wlan_serialize_enter();
6443 if (!ath_hal_getdiag(sc->sc_ah, &diag)) {
6446 error = sysctl_handle_int(oidp, &diag, 0, req);
6447 if (error == 0 && req->newptr) {
6448 if (!ath_hal_setdiag(sc->sc_ah, diag))
6452 wlan_serialize_exit();
6457 ath_sysctl_tpscale(SYSCTL_HANDLER_ARGS)
6459 struct ath_softc *sc = arg1;
6460 struct ifnet *ifp = sc->sc_ifp;
6464 wlan_serialize_enter();
6465 (void)ath_hal_gettpscale(sc->sc_ah, &scale);
6466 error = sysctl_handle_int(oidp, &scale, 0, req);
6467 if (error == 0 && req->newptr) {
6468 if (!ath_hal_settpscale(sc->sc_ah, scale))
6470 else if (ifp->if_flags & IFF_RUNNING)
6471 error = ath_reset(ifp);
6473 wlan_serialize_exit();
6478 ath_sysctl_tpc(SYSCTL_HANDLER_ARGS)
6480 struct ath_softc *sc = arg1;
6484 wlan_serialize_enter();
6485 tpc = ath_hal_gettpc(sc->sc_ah);
6486 error = sysctl_handle_int(oidp, &tpc, 0, req);
6487 if (error == 0 && req->newptr) {
6488 if (!ath_hal_settpc(sc->sc_ah, tpc))
6491 wlan_serialize_exit();
6496 ath_sysctl_rfkill(SYSCTL_HANDLER_ARGS)
6498 struct ath_softc *sc = arg1;
6504 wlan_serialize_enter();
6507 rfkill = ath_hal_getrfkill(ah);
6509 error = sysctl_handle_int(oidp, &rfkill, 0, req);
6510 if (error == 0 && req->newptr) {
6511 if (rfkill != ath_hal_getrfkill(ah)) {
6512 if (!ath_hal_setrfkill(ah, rfkill))
6514 else if (ifp->if_flags & IFF_RUNNING)
6515 error = ath_reset(ifp);
6518 wlan_serialize_exit();
6523 ath_sysctl_rfsilent(SYSCTL_HANDLER_ARGS)
6525 struct ath_softc *sc = arg1;
6529 wlan_serialize_enter();
6530 (void)ath_hal_getrfsilent(sc->sc_ah, &rfsilent);
6531 error = sysctl_handle_int(oidp, &rfsilent, 0, req);
6532 if (error == 0 && req->newptr) {
6533 if (!ath_hal_setrfsilent(sc->sc_ah, rfsilent)) {
6536 sc->sc_rfsilentpin = rfsilent & 0x1c;
6537 sc->sc_rfsilentpol = (rfsilent & 0x2) != 0;
6540 wlan_serialize_exit();
6545 ath_sysctl_tpack(SYSCTL_HANDLER_ARGS)
6547 struct ath_softc *sc = arg1;
6551 wlan_serialize_enter();
6552 (void)ath_hal_gettpack(sc->sc_ah, &tpack);
6553 error = sysctl_handle_int(oidp, &tpack, 0, req);
6554 if (error == 0 && req->newptr) {
6555 if (!ath_hal_settpack(sc->sc_ah, tpack))
6558 wlan_serialize_exit();
6563 ath_sysctl_tpcts(SYSCTL_HANDLER_ARGS)
6565 struct ath_softc *sc = arg1;
6569 wlan_serialize_enter();
6570 (void)ath_hal_gettpcts(sc->sc_ah, &tpcts);
6571 error = sysctl_handle_int(oidp, &tpcts, 0, req);
6572 if (error == 0 && req->newptr) {
6573 if (!ath_hal_settpcts(sc->sc_ah, tpcts))
6576 wlan_serialize_exit();
6581 ath_sysctl_intmit(SYSCTL_HANDLER_ARGS)
6583 struct ath_softc *sc = arg1;
6586 wlan_serialize_enter();
6587 intmit = ath_hal_getintmit(sc->sc_ah);
6588 error = sysctl_handle_int(oidp, &intmit, 0, req);
6589 if (error == 0 && req->newptr) {
6590 if (!ath_hal_setintmit(sc->sc_ah, intmit))
6593 wlan_serialize_exit();
6597 #ifdef IEEE80211_SUPPORT_TDMA
6599 ath_sysctl_setcca(SYSCTL_HANDLER_ARGS)
6601 struct ath_softc *sc = arg1;
6604 wlan_serialize_enter();
6605 setcca = sc->sc_setcca;
6606 error = sysctl_handle_int(oidp, &setcca, 0, req);
6607 if (error == 0 && req->newptr)
6608 sc->sc_setcca = (setcca != 0);
6609 wlan_serialize_exit();
6612 #endif /* IEEE80211_SUPPORT_TDMA */
6615 ath_sysctlattach(struct ath_softc *sc)
6617 struct sysctl_ctx_list *ctx;
6618 struct sysctl_oid *tree;
6619 struct ath_hal *ah = sc->sc_ah;
6621 ctx = &sc->sc_sysctl_ctx;
6622 tree = sc->sc_sysctl_tree;
6624 device_printf(sc->sc_dev, "can't add sysctl node\n");
6628 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6629 "countrycode", CTLFLAG_RD, &sc->sc_eecc, 0,
6630 "EEPROM country code");
6631 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6632 "regdomain", CTLFLAG_RD, &sc->sc_eerd, 0,
6633 "EEPROM regdomain code");
6635 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6636 "debug", CTLFLAG_RW, &sc->sc_debug, 0,
6637 "control debugging printfs");
6639 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6640 "slottime", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
6641 ath_sysctl_slottime, "I", "802.11 slot time (us)");
6642 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6643 "acktimeout", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
6644 ath_sysctl_acktimeout, "I", "802.11 ACK timeout (us)");
6645 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6646 "ctstimeout", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
6647 ath_sysctl_ctstimeout, "I", "802.11 CTS timeout (us)");
6648 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6649 "softled", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
6650 ath_sysctl_softled, "I", "enable/disable software LED support");
6651 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6652 "ledpin", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
6653 ath_sysctl_ledpin, "I", "GPIO pin connected to LED");
6654 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6655 "ledon", CTLFLAG_RW, &sc->sc_ledon, 0,
6656 "setting to turn LED on");
6657 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6658 "ledidle", CTLFLAG_RW, &sc->sc_ledidle, 0,
6659 "idle time for inactivity LED (ticks)");
6660 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6661 "txantenna", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
6662 ath_sysctl_txantenna, "I", "antenna switch");
6663 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6664 "rxantenna", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
6665 ath_sysctl_rxantenna, "I", "default/rx antenna");
6666 if (ath_hal_hasdiversity(ah))
6667 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6668 "diversity", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
6669 ath_sysctl_diversity, "I", "antenna diversity");
6670 sc->sc_txintrperiod = ATH_TXINTR_PERIOD;
6671 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6672 "txintrperiod", CTLFLAG_RW, &sc->sc_txintrperiod, 0,
6673 "tx descriptor batching");
6674 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6675 "diag", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
6676 ath_sysctl_diag, "I", "h/w diagnostic control");
6677 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6678 "tpscale", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
6679 ath_sysctl_tpscale, "I", "tx power scaling");
6680 if (ath_hal_hastpc(ah)) {
6681 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6682 "tpc", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
6683 ath_sysctl_tpc, "I", "enable/disable per-packet TPC");
6684 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6685 "tpack", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
6686 ath_sysctl_tpack, "I", "tx power for ack frames");
6687 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6688 "tpcts", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
6689 ath_sysctl_tpcts, "I", "tx power for cts frames");
6691 if (ath_hal_hasrfsilent(ah)) {
6692 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6693 "rfsilent", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
6694 ath_sysctl_rfsilent, "I", "h/w RF silent config");
6695 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6696 "rfkill", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
6697 ath_sysctl_rfkill, "I", "enable/disable RF kill switch");
6699 if (ath_hal_hasintmit(ah)) {
6700 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6701 "intmit", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
6702 ath_sysctl_intmit, "I", "interference mitigation");
6704 sc->sc_monpass = HAL_RXERR_DECRYPT | HAL_RXERR_MIC;
6705 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6706 "monpass", CTLFLAG_RW, &sc->sc_monpass, 0,
6707 "mask of error frames to pass when monitoring");
6708 #ifdef IEEE80211_SUPPORT_TDMA
6709 if (ath_hal_macversion(ah) > 0x78) {
6710 sc->sc_tdmadbaprep = 2;
6711 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6712 "dbaprep", CTLFLAG_RW, &sc->sc_tdmadbaprep, 0,
6713 "TDMA DBA preparation time");
6714 sc->sc_tdmaswbaprep = 10;
6715 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6716 "swbaprep", CTLFLAG_RW, &sc->sc_tdmaswbaprep, 0,
6717 "TDMA SWBA preparation time");
6718 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6719 "guardtime", CTLFLAG_RW, &sc->sc_tdmaguard, 0,
6720 "TDMA slot guard time");
6721 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6722 "superframe", CTLFLAG_RD, &sc->sc_tdmabintval, 0,
6723 "TDMA calculated super frame");
6724 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6725 "setcca", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
6726 ath_sysctl_setcca, "I", "enable CCA control");
6732 ath_tx_raw_start(struct ath_softc *sc, struct ieee80211_node *ni,
6733 struct ath_buf *bf, struct mbuf *m0,
6734 const struct ieee80211_bpf_params *params)
6736 struct ifnet *ifp = sc->sc_ifp;
6737 struct ieee80211com *ic = ifp->if_l2com;
6738 struct ath_hal *ah = sc->sc_ah;
6739 struct ieee80211vap *vap = ni->ni_vap;
6740 int error, ismcast, ismrr;
6741 int keyix, hdrlen, pktlen, try0, txantenna;
6742 u_int8_t rix, cix, txrate, ctsrate, rate1, rate2, rate3;
6743 struct ieee80211_frame *wh;
6744 u_int flags, ctsduration;
6746 const HAL_RATE_TABLE *rt;
6747 struct ath_desc *ds;
6750 wh = mtod(m0, struct ieee80211_frame *);
6751 ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
6752 hdrlen = ieee80211_anyhdrsize(wh);
6754 * Packet length must not include any
6755 * pad bytes; deduct them here.
6757 /* XXX honor IEEE80211_BPF_DATAPAD */
6758 pktlen = m0->m_pkthdr.len - (hdrlen & 3) + IEEE80211_CRC_LEN;
6760 if (params->ibp_flags & IEEE80211_BPF_CRYPTO) {
6761 const struct ieee80211_cipher *cip;
6762 struct ieee80211_key *k;
6765 * Construct the 802.11 header+trailer for an encrypted
6766 * frame. The only reason this can fail is because of an
6767 * unknown or unsupported cipher/key type.
6769 k = ieee80211_crypto_encap(ni, m0);
6772 * This can happen when the key is yanked after the
6773 * frame was queued. Just discard the frame; the
6774 * 802.11 layer counts failures and provides
6775 * debugging/diagnostics.
6781 * Adjust the packet + header lengths for the crypto
6782 * additions and calculate the h/w key index. When
6783 * a s/w mic is done the frame will have had any mic
6784 * added to it prior to entry so m0->m_pkthdr.len will
6785 * account for it. Otherwise we need to add it to the
6789 hdrlen += cip->ic_header;
6790 pktlen += cip->ic_header + cip->ic_trailer;
6791 /* NB: frags always have any TKIP MIC done in s/w */
6792 if ((k->wk_flags & IEEE80211_KEY_SWMIC) == 0)
6793 pktlen += cip->ic_miclen;
6794 keyix = k->wk_keyix;
6796 /* packet header may have moved, reset our local pointer */
6797 wh = mtod(m0, struct ieee80211_frame *);
6798 } else if (ni->ni_ucastkey.wk_cipher == &ieee80211_cipher_none) {
6800 * Use station key cache slot, if assigned.
6802 keyix = ni->ni_ucastkey.wk_keyix;
6803 if (keyix == IEEE80211_KEYIX_NONE)
6804 keyix = HAL_TXKEYIX_INVALID;
6806 keyix = HAL_TXKEYIX_INVALID;
6808 error = ath_tx_dmasetup(sc, bf, m0);
6811 m0 = bf->bf_m; /* NB: may have changed */
6812 wh = mtod(m0, struct ieee80211_frame *);
6813 bf->bf_node = ni; /* NB: held reference */
6815 flags = HAL_TXDESC_CLRDMASK; /* XXX needed for crypto errs */
6816 flags |= HAL_TXDESC_INTREQ; /* force interrupt */
6817 if (params->ibp_flags & IEEE80211_BPF_RTS)
6818 flags |= HAL_TXDESC_RTSENA;
6819 else if (params->ibp_flags & IEEE80211_BPF_CTS)
6820 flags |= HAL_TXDESC_CTSENA;
6821 /* XXX leave ismcast to injector? */
6822 if ((params->ibp_flags & IEEE80211_BPF_NOACK) || ismcast)
6823 flags |= HAL_TXDESC_NOACK;
6825 rt = sc->sc_currates;
6826 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
6827 rix = ath_tx_findrix(sc, params->ibp_rate0);
6828 txrate = rt->info[rix].rateCode;
6829 if (params->ibp_flags & IEEE80211_BPF_SHORTPRE)
6830 txrate |= rt->info[rix].shortPreamble;
6832 try0 = params->ibp_try0;
6833 ismrr = (params->ibp_try1 != 0);
6834 txantenna = params->ibp_pri >> 2;
6835 if (txantenna == 0) /* XXX? */
6836 txantenna = sc->sc_txantenna;
6838 if (flags & (HAL_TXDESC_CTSENA | HAL_TXDESC_RTSENA)) {
6839 cix = ath_tx_findrix(sc, params->ibp_ctsrate);
6840 ctsrate = rt->info[cix].rateCode;
6841 if (params->ibp_flags & IEEE80211_BPF_SHORTPRE) {
6842 ctsrate |= rt->info[cix].shortPreamble;
6843 if (flags & HAL_TXDESC_RTSENA) /* SIFS + CTS */
6844 ctsduration += rt->info[cix].spAckDuration;
6845 ctsduration += ath_hal_computetxtime(ah,
6846 rt, pktlen, rix, AH_TRUE);
6847 if ((flags & HAL_TXDESC_NOACK) == 0) /* SIFS + ACK */
6848 ctsduration += rt->info[rix].spAckDuration;
6850 if (flags & HAL_TXDESC_RTSENA) /* SIFS + CTS */
6851 ctsduration += rt->info[cix].lpAckDuration;
6852 ctsduration += ath_hal_computetxtime(ah,
6853 rt, pktlen, rix, AH_FALSE);
6854 if ((flags & HAL_TXDESC_NOACK) == 0) /* SIFS + ACK */
6855 ctsduration += rt->info[rix].lpAckDuration;
6857 ismrr = 0; /* XXX */
6860 pri = params->ibp_pri & 3;
6862 * NB: we mark all packets as type PSPOLL so the h/w won't
6863 * set the sequence number, duration, etc.
6865 atype = HAL_PKT_TYPE_PSPOLL;
6867 if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT))
6868 ieee80211_dump_pkt(ic, mtod(m0, caddr_t), m0->m_len,
6869 sc->sc_hwmap[rix].ieeerate, -1);
6871 if (ieee80211_radiotap_active_vap(vap)) {
6872 u_int64_t tsf = ath_hal_gettsf64(ah);
6874 sc->sc_tx_th.wt_tsf = htole64(tsf);
6875 sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags;
6876 if (wh->i_fc[1] & IEEE80211_FC1_WEP)
6877 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
6878 if (m0->m_flags & M_FRAG)
6879 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG;
6880 sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate;
6881 sc->sc_tx_th.wt_txpower = ni->ni_txpower;
6882 sc->sc_tx_th.wt_antenna = sc->sc_txantenna;
6884 ieee80211_radiotap_tx(vap, m0);
6888 * Formulate first tx descriptor with tx controls.
6891 /* XXX check return value? */
6892 ath_hal_setuptxdesc(ah, ds
6893 , pktlen /* packet length */
6894 , hdrlen /* header length */
6895 , atype /* Atheros packet type */
6896 , params->ibp_power /* txpower */
6897 , txrate, try0 /* series 0 rate/tries */
6898 , keyix /* key cache index */
6899 , txantenna /* antenna mode */
6901 , ctsrate /* rts/cts rate */
6902 , ctsduration /* rts/cts duration */
6904 bf->bf_txflags = flags;
6907 rix = ath_tx_findrix(sc, params->ibp_rate1);
6908 rate1 = rt->info[rix].rateCode;
6909 if (params->ibp_flags & IEEE80211_BPF_SHORTPRE)
6910 rate1 |= rt->info[rix].shortPreamble;
6911 if (params->ibp_try2) {
6912 rix = ath_tx_findrix(sc, params->ibp_rate2);
6913 rate2 = rt->info[rix].rateCode;
6914 if (params->ibp_flags & IEEE80211_BPF_SHORTPRE)
6915 rate2 |= rt->info[rix].shortPreamble;
6918 if (params->ibp_try3) {
6919 rix = ath_tx_findrix(sc, params->ibp_rate3);
6920 rate3 = rt->info[rix].rateCode;
6921 if (params->ibp_flags & IEEE80211_BPF_SHORTPRE)
6922 rate3 |= rt->info[rix].shortPreamble;
6925 ath_hal_setupxtxdesc(ah, ds
6926 , rate1, params->ibp_try1 /* series 1 */
6927 , rate2, params->ibp_try2 /* series 2 */
6928 , rate3, params->ibp_try3 /* series 3 */
6932 /* NB: no buffered multicast in power save support */
6933 ath_tx_handoff(sc, sc->sc_ac2q[pri], bf);
6938 ath_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
6939 const struct ieee80211_bpf_params *params)
6941 struct ieee80211com *ic = ni->ni_ic;
6942 struct ifnet *ifp = ic->ic_ifp;
6943 struct ath_softc *sc = ifp->if_softc;
6947 if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid) {
6948 DPRINTF(sc, ATH_DEBUG_XMIT, "%s: discard frame, %s", __func__,
6949 (ifp->if_flags & IFF_RUNNING) == 0 ?
6950 "!running" : "invalid");
6956 * Grab a TX buffer and associated resources.
6958 bf = ath_getbuf(sc);
6960 sc->sc_stats.ast_tx_nobuf++;
6966 if (params == NULL) {
6968 * Legacy path; interpret frame contents to decide
6969 * precisely how to send the frame.
6971 if (ath_tx_start(sc, ni, bf, m)) {
6972 error = EIO; /* XXX */
6977 * Caller supplied explicit parameters to use in
6978 * sending the frame.
6980 if (ath_tx_raw_start(sc, ni, bf, m, params)) {
6981 error = EIO; /* XXX */
6985 sc->sc_wd_timer = 5;
6987 sc->sc_stats.ast_tx_raw++;
6991 STAILQ_INSERT_HEAD(&sc->sc_txbuf, bf, bf_list);
6994 sc->sc_stats.ast_tx_raw_fail++;
6995 ieee80211_free_node(ni);
7000 * Announce various information on device/driver attach.
7003 ath_announce(struct ath_softc *sc)
7005 struct ifnet *ifp = sc->sc_ifp;
7006 struct ath_hal *ah = sc->sc_ah;
7008 if_printf(ifp, "AR%s mac %d.%d RF%s phy %d.%d\n",
7009 ath_hal_mac_name(ah), ah->ah_macVersion, ah->ah_macRev,
7010 ath_hal_rf_name(ah), ah->ah_phyRev >> 4, ah->ah_phyRev & 0xf);
7013 for (i = 0; i <= WME_AC_VO; i++) {
7014 struct ath_txq *txq = sc->sc_ac2q[i];
7015 if_printf(ifp, "Use hw queue %u for %s traffic\n",
7016 txq->axq_qnum, ieee80211_wme_acnames[i]);
7018 if_printf(ifp, "Use hw queue %u for CAB traffic\n",
7019 sc->sc_cabq->axq_qnum);
7020 if_printf(ifp, "Use hw queue %u for beacons\n", sc->sc_bhalq);
7022 if (ath_rxbuf != ATH_RXBUF)
7023 if_printf(ifp, "using %u rx buffers\n", ath_rxbuf);
7024 if (ath_txbuf != ATH_TXBUF)
7025 if_printf(ifp, "using %u tx buffers\n", ath_txbuf);
7026 if (sc->sc_mcastkey && bootverbose)
7027 if_printf(ifp, "using multicast key search\n");
7030 #ifdef IEEE80211_SUPPORT_TDMA
7031 static __inline uint32_t
7032 ath_hal_getnexttbtt(struct ath_hal *ah)
7034 #define AR_TIMER0 0x8028
7035 return OS_REG_READ(ah, AR_TIMER0);
7038 static __inline void
7039 ath_hal_adjusttsf(struct ath_hal *ah, int32_t tsfdelta)
7041 /* XXX handle wrap/overflow */
7042 OS_REG_WRITE(ah, AR_TSF_L32, OS_REG_READ(ah, AR_TSF_L32) + tsfdelta);
7046 ath_tdma_settimers(struct ath_softc *sc, u_int32_t nexttbtt, u_int32_t bintval)
7048 struct ath_hal *ah = sc->sc_ah;
7049 HAL_BEACON_TIMERS bt;
7051 bt.bt_intval = bintval | HAL_BEACON_ENA;
7052 bt.bt_nexttbtt = nexttbtt;
7053 bt.bt_nextdba = (nexttbtt<<3) - sc->sc_tdmadbaprep;
7054 bt.bt_nextswba = (nexttbtt<<3) - sc->sc_tdmaswbaprep;
7055 bt.bt_nextatim = nexttbtt+1;
7056 ath_hal_beaconsettimers(ah, &bt);
7060 * Calculate the beacon interval. This is periodic in the
7061 * superframe for the bss. We assume each station is configured
7062 * identically wrt transmit rate so the guard time we calculate
7063 * above will be the same on all stations. Note we need to
7064 * factor in the xmit time because the hardware will schedule
7065 * a frame for transmit if the start of the frame is within
7066 * the burst time. When we get hardware that properly kills
7067 * frames in the PCU we can reduce/eliminate the guard time.
7069 * Roundup to 1024 is so we have 1 TU buffer in the guard time
7070 * to deal with the granularity of the nexttbtt timer. 11n MAC's
7071 * with 1us timer granularity should allow us to reduce/eliminate
7075 ath_tdma_bintvalsetup(struct ath_softc *sc,
7076 const struct ieee80211_tdma_state *tdma)
7078 /* copy from vap state (XXX check all vaps have same value?) */
7079 sc->sc_tdmaslotlen = tdma->tdma_slotlen;
7081 sc->sc_tdmabintval = roundup((sc->sc_tdmaslotlen+sc->sc_tdmaguard) *
7082 tdma->tdma_slotcnt, 1024);
7083 sc->sc_tdmabintval >>= 10; /* TSF -> TU */
7084 if (sc->sc_tdmabintval & 1)
7085 sc->sc_tdmabintval++;
7087 if (tdma->tdma_slot == 0) {
7089 * Only slot 0 beacons; other slots respond.
7091 sc->sc_imask |= HAL_INT_SWBA;
7092 sc->sc_tdmaswba = 0; /* beacon immediately */
7094 /* XXX all vaps must be slot 0 or slot !0 */
7095 sc->sc_imask &= ~HAL_INT_SWBA;
7100 * Max 802.11 overhead. This assumes no 4-address frames and
7101 * the encapsulation done by ieee80211_encap (llc). We also
7102 * include potential crypto overhead.
7104 #define IEEE80211_MAXOVERHEAD \
7105 (sizeof(struct ieee80211_qosframe) \
7106 + sizeof(struct llc) \
7107 + IEEE80211_ADDR_LEN \
7108 + IEEE80211_WEP_IVLEN \
7109 + IEEE80211_WEP_KIDLEN \
7110 + IEEE80211_WEP_CRCLEN \
7111 + IEEE80211_WEP_MICLEN \
7112 + IEEE80211_CRC_LEN)
7115 * Setup initially for tdma operation. Start the beacon
7116 * timers and enable SWBA if we are slot 0. Otherwise
7117 * we wait for slot 0 to arrive so we can sync up before
7118 * starting to transmit.
7121 ath_tdma_config(struct ath_softc *sc, struct ieee80211vap *vap)
7123 struct ath_hal *ah = sc->sc_ah;
7124 struct ifnet *ifp = sc->sc_ifp;
7125 struct ieee80211com *ic = ifp->if_l2com;
7126 const struct ieee80211_txparam *tp;
7127 const struct ieee80211_tdma_state *tdma = NULL;
7131 vap = TAILQ_FIRST(&ic->ic_vaps); /* XXX */
7133 if_printf(ifp, "%s: no vaps?\n", __func__);
7137 tp = vap->iv_bss->ni_txparms;
7139 * Calculate the guard time for each slot. This is the
7140 * time to send a maximal-size frame according to the
7141 * fixed/lowest transmit rate. Note that the interface
7142 * mtu does not include the 802.11 overhead so we must
7143 * tack that on (ath_hal_computetxtime includes the
7144 * preamble and plcp in it's calculation).
7146 tdma = vap->iv_tdma;
7147 if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE)
7148 rix = ath_tx_findrix(sc, tp->ucastrate);
7150 rix = ath_tx_findrix(sc, tp->mcastrate);
7151 /* XXX short preamble assumed */
7152 sc->sc_tdmaguard = ath_hal_computetxtime(ah, sc->sc_currates,
7153 ifp->if_mtu + IEEE80211_MAXOVERHEAD, rix, AH_TRUE);
7155 ath_hal_intrset(ah, 0);
7157 ath_beaconq_config(sc); /* setup h/w beacon q */
7159 ath_hal_setcca(ah, AH_FALSE); /* disable CCA */
7160 ath_tdma_bintvalsetup(sc, tdma); /* calculate beacon interval */
7161 ath_tdma_settimers(sc, sc->sc_tdmabintval,
7162 sc->sc_tdmabintval | HAL_BEACON_RESET_TSF);
7163 sc->sc_syncbeacon = 0;
7165 sc->sc_avgtsfdeltap = TDMA_DUMMY_MARKER;
7166 sc->sc_avgtsfdeltam = TDMA_DUMMY_MARKER;
7168 ath_hal_intrset(ah, sc->sc_imask);
7170 DPRINTF(sc, ATH_DEBUG_TDMA, "%s: slot %u len %uus cnt %u "
7171 "bsched %u guard %uus bintval %u TU dba prep %u\n", __func__,
7172 tdma->tdma_slot, tdma->tdma_slotlen, tdma->tdma_slotcnt,
7173 tdma->tdma_bintval, sc->sc_tdmaguard, sc->sc_tdmabintval,
7174 sc->sc_tdmadbaprep);
7178 * Update tdma operation. Called from the 802.11 layer
7179 * when a beacon is received from the TDMA station operating
7180 * in the slot immediately preceding us in the bss. Use
7181 * the rx timestamp for the beacon frame to update our
7182 * beacon timers so we follow their schedule. Note that
7183 * by using the rx timestamp we implicitly include the
7184 * propagation delay in our schedule.
7187 ath_tdma_update(struct ieee80211_node *ni,
7188 const struct ieee80211_tdma_param *tdma, int changed)
7190 #define TSF_TO_TU(_h,_l) \
7191 ((((u_int32_t)(_h)) << 22) | (((u_int32_t)(_l)) >> 10))
7192 #define TU_TO_TSF(_tu) (((u_int64_t)(_tu)) << 10)
7193 struct ieee80211vap *vap = ni->ni_vap;
7194 struct ieee80211com *ic = ni->ni_ic;
7195 struct ath_softc *sc = ic->ic_ifp->if_softc;
7196 struct ath_hal *ah = sc->sc_ah;
7197 const HAL_RATE_TABLE *rt = sc->sc_currates;
7198 u_int64_t tsf, rstamp, nextslot;
7199 u_int32_t txtime, nextslottu, timer0;
7200 int32_t tudelta, tsfdelta;
7201 const struct ath_rx_status *rs;
7204 sc->sc_stats.ast_tdma_update++;
7207 * Check for and adopt configuration changes.
7210 const struct ieee80211_tdma_state *ts = vap->iv_tdma;
7212 ath_tdma_bintvalsetup(sc, ts);
7213 if (changed & TDMA_UPDATE_SLOTLEN)
7216 DPRINTF(sc, ATH_DEBUG_TDMA,
7217 "%s: adopt slot %u slotcnt %u slotlen %u us "
7218 "bintval %u TU\n", __func__,
7219 ts->tdma_slot, ts->tdma_slotcnt, ts->tdma_slotlen,
7220 sc->sc_tdmabintval);
7223 ath_hal_intrset(ah, sc->sc_imask);
7224 /* NB: beacon timers programmed below */
7227 /* extend rx timestamp to 64 bits */
7229 tsf = ath_hal_gettsf64(ah);
7230 rstamp = ath_extend_tsf(rs->rs_tstamp, tsf);
7232 * The rx timestamp is set by the hardware on completing
7233 * reception (at the point where the rx descriptor is DMA'd
7234 * to the host). To find the start of our next slot we
7235 * must adjust this time by the time required to send
7236 * the packet just received.
7238 rix = rt->rateCodeToIndex[rs->rs_rate];
7239 txtime = ath_hal_computetxtime(ah, rt, rs->rs_datalen, rix,
7240 rt->info[rix].shortPreamble);
7241 /* NB: << 9 is to cvt to TU and /2 */
7242 nextslot = (rstamp - txtime) + (sc->sc_tdmabintval << 9);
7243 nextslottu = TSF_TO_TU(nextslot>>32, nextslot) & HAL_BEACON_PERIOD;
7246 * TIMER0 is the h/w's idea of NextTBTT (in TU's). Convert
7247 * to usecs and calculate the difference between what the
7248 * other station thinks and what we have programmed. This
7249 * lets us figure how to adjust our timers to match. The
7250 * adjustments are done by pulling the TSF forward and possibly
7251 * rewriting the beacon timers.
7253 timer0 = ath_hal_getnexttbtt(ah);
7254 tsfdelta = (int32_t)((nextslot % TU_TO_TSF(HAL_BEACON_PERIOD+1)) - TU_TO_TSF(timer0));
7256 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
7257 "tsfdelta %d avg +%d/-%d\n", tsfdelta,
7258 TDMA_AVG(sc->sc_avgtsfdeltap), TDMA_AVG(sc->sc_avgtsfdeltam));
7261 TDMA_SAMPLE(sc->sc_avgtsfdeltap, 0);
7262 TDMA_SAMPLE(sc->sc_avgtsfdeltam, -tsfdelta);
7263 tsfdelta = -tsfdelta % 1024;
7265 } else if (tsfdelta > 0) {
7266 TDMA_SAMPLE(sc->sc_avgtsfdeltap, tsfdelta);
7267 TDMA_SAMPLE(sc->sc_avgtsfdeltam, 0);
7268 tsfdelta = 1024 - (tsfdelta % 1024);
7271 TDMA_SAMPLE(sc->sc_avgtsfdeltap, 0);
7272 TDMA_SAMPLE(sc->sc_avgtsfdeltam, 0);
7274 tudelta = nextslottu - timer0;
7277 * Copy sender's timetstamp into tdma ie so they can
7278 * calculate roundtrip time. We submit a beacon frame
7279 * below after any timer adjustment. The frame goes out
7280 * at the next TBTT so the sender can calculate the
7281 * roundtrip by inspecting the tdma ie in our beacon frame.
7283 * NB: This tstamp is subtlely preserved when
7284 * IEEE80211_BEACON_TDMA is marked (e.g. when the
7285 * slot position changes) because ieee80211_add_tdma
7286 * skips over the data.
7288 memcpy(ATH_VAP(vap)->av_boff.bo_tdma +
7289 __offsetof(struct ieee80211_tdma_param, tdma_tstamp),
7290 &ni->ni_tstamp.data, 8);
7292 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
7293 "tsf %llu nextslot %llu (%d, %d) nextslottu %u timer0 %u (%d)\n",
7294 (unsigned long long) tsf, (unsigned long long) nextslot,
7295 (int)(nextslot - tsf), tsfdelta,
7296 nextslottu, timer0, tudelta);
7299 * Adjust the beacon timers only when pulling them forward
7300 * or when going back by less than the beacon interval.
7301 * Negative jumps larger than the beacon interval seem to
7302 * cause the timers to stop and generally cause instability.
7303 * This basically filters out jumps due to missed beacons.
7305 if (tudelta != 0 && (tudelta > 0 || -tudelta < sc->sc_tdmabintval)) {
7306 ath_tdma_settimers(sc, nextslottu, sc->sc_tdmabintval);
7307 sc->sc_stats.ast_tdma_timers++;
7310 ath_hal_adjusttsf(ah, tsfdelta);
7311 sc->sc_stats.ast_tdma_tsf++;
7313 ath_tdma_beacon_send(sc, vap); /* prepare response */
7319 * Transmit a beacon frame at SWBA. Dynamic updates
7320 * to the frame contents are done as needed.
7323 ath_tdma_beacon_send(struct ath_softc *sc, struct ieee80211vap *vap)
7325 struct ath_hal *ah = sc->sc_ah;
7330 * Check if the previous beacon has gone out. If
7331 * not don't try to post another, skip this period
7332 * and wait for the next. Missed beacons indicate
7333 * a problem and should not occur. If we miss too
7334 * many consecutive beacons reset the device.
7336 if (ath_hal_numtxpending(ah, sc->sc_bhalq) != 0) {
7337 sc->sc_bmisscount++;
7338 DPRINTF(sc, ATH_DEBUG_BEACON,
7339 "%s: missed %u consecutive beacons\n",
7340 __func__, sc->sc_bmisscount);
7341 if (sc->sc_bmisscount >= ath_bstuck_threshold)
7342 taskqueue_enqueue(sc->sc_tq, &sc->sc_bstucktask);
7345 if (sc->sc_bmisscount != 0) {
7346 DPRINTF(sc, ATH_DEBUG_BEACON,
7347 "%s: resume beacon xmit after %u misses\n",
7348 __func__, sc->sc_bmisscount);
7349 sc->sc_bmisscount = 0;
7353 * Check recent per-antenna transmit statistics and flip
7354 * the default antenna if noticeably more frames went out
7355 * on the non-default antenna.
7356 * XXX assumes 2 anntenae
7358 if (!sc->sc_diversity) {
7359 otherant = sc->sc_defant & 1 ? 2 : 1;
7360 if (sc->sc_ant_tx[otherant] > sc->sc_ant_tx[sc->sc_defant] + 2)
7361 ath_setdefantenna(sc, otherant);
7362 sc->sc_ant_tx[1] = sc->sc_ant_tx[2] = 0;
7366 * Stop any current dma before messing with the beacon linkages.
7368 * This should never fail since we check above that no frames
7369 * are still pending on the queue.
7371 if (!ath_hal_stoptxdma(ah, sc->sc_bhalq)) {
7372 DPRINTF(sc, ATH_DEBUG_ANY,
7373 "%s: beacon queue %u did not stop?\n",
7374 __func__, sc->sc_bhalq);
7375 /* NB: the HAL still stops DMA, so proceed */
7377 bf = ath_beacon_generate(sc, vap);
7379 ath_hal_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr);
7380 ath_hal_txstart(ah, sc->sc_bhalq);
7382 sc->sc_stats.ast_be_xmit++; /* XXX per-vap? */
7385 * Record local TSF for our last send for use
7386 * in arbitrating slot collisions.
7388 vap->iv_bss->ni_tstamp.tsf = ath_hal_gettsf64(ah);
7390 device_printf(sc->sc_dev, "tdma beacon gen failed!\n");
7393 #endif /* IEEE80211_SUPPORT_TDMA */
7396 ath_sysctl_clearstats(SYSCTL_HANDLER_ARGS)
7398 struct ath_softc *sc = arg1;
7402 error = sysctl_handle_int(oidp, &val, 0, req);
7403 if (error || !req->newptr)
7406 return 0; /* Not clearing the stats is still valid */
7407 memset(&sc->sc_stats, 0, sizeof(sc->sc_stats));
7413 ath_sysctl_stats_attach(struct ath_softc *sc)
7415 struct sysctl_oid *tree;
7416 struct sysctl_ctx_list *ctx;
7417 struct sysctl_oid_list *child;
7419 ctx = &sc->sc_sysctl_ctx;
7420 tree = sc->sc_sysctl_tree;
7421 child = SYSCTL_CHILDREN(tree);
7423 /* Create "clear" node */
7424 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
7425 "clear_stats", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
7426 ath_sysctl_clearstats, "I", "clear stats");
7428 /* Create stats node */
7429 tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "stats", CTLFLAG_RD,
7430 NULL, "Statistics");
7431 child = SYSCTL_CHILDREN(tree);
7433 /* This was generated from if_athioctl.h */
7435 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_watchdog", CTLFLAG_RD,
7436 &sc->sc_stats.ast_watchdog, 0, "device reset by watchdog");
7437 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_hardware", CTLFLAG_RD,
7438 &sc->sc_stats.ast_hardware, 0, "fatal hardware error interrupts");
7439 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_bmiss", CTLFLAG_RD,
7440 &sc->sc_stats.ast_bmiss, 0, "beacon miss interrupts");
7441 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_bmiss_phantom", CTLFLAG_RD,
7442 &sc->sc_stats.ast_bmiss_phantom, 0, "beacon miss interrupts");
7443 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_bstuck", CTLFLAG_RD,
7444 &sc->sc_stats.ast_bstuck, 0, "beacon stuck interrupts");
7445 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rxorn", CTLFLAG_RD,
7446 &sc->sc_stats.ast_rxorn, 0, "rx overrun interrupts");
7447 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rxeol", CTLFLAG_RD,
7448 &sc->sc_stats.ast_rxeol, 0, "rx eol interrupts");
7449 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_txurn", CTLFLAG_RD,
7450 &sc->sc_stats.ast_txurn, 0, "tx underrun interrupts");
7451 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_mib", CTLFLAG_RD,
7452 &sc->sc_stats.ast_mib, 0, "mib interrupts");
7453 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_intrcoal", CTLFLAG_RD,
7454 &sc->sc_stats.ast_intrcoal, 0, "interrupts coalesced");
7455 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_packets", CTLFLAG_RD,
7456 &sc->sc_stats.ast_tx_packets, 0, "packet sent on the interface");
7457 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_mgmt", CTLFLAG_RD,
7458 &sc->sc_stats.ast_tx_mgmt, 0, "management frames transmitted");
7459 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_discard", CTLFLAG_RD,
7460 &sc->sc_stats.ast_tx_discard, 0, "frames discarded prior to assoc");
7461 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_qstop", CTLFLAG_RD,
7462 &sc->sc_stats.ast_tx_qstop, 0, "output stopped 'cuz no buffer");
7463 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_encap", CTLFLAG_RD,
7464 &sc->sc_stats.ast_tx_encap, 0, "tx encapsulation failed");
7465 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nonode", CTLFLAG_RD,
7466 &sc->sc_stats.ast_tx_nonode, 0, "tx failed 'cuz no node");
7467 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nombuf", CTLFLAG_RD,
7468 &sc->sc_stats.ast_tx_nombuf, 0, "tx failed 'cuz no mbuf");
7469 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nomcl", CTLFLAG_RD,
7470 &sc->sc_stats.ast_tx_nomcl, 0, "tx failed 'cuz no cluster");
7471 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_linear", CTLFLAG_RD,
7472 &sc->sc_stats.ast_tx_linear, 0, "tx linearized to cluster");
7473 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nodata", CTLFLAG_RD,
7474 &sc->sc_stats.ast_tx_nodata, 0, "tx discarded empty frame");
7475 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_busdma", CTLFLAG_RD,
7476 &sc->sc_stats.ast_tx_busdma, 0, "tx failed for dma resrcs");
7477 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_xretries", CTLFLAG_RD,
7478 &sc->sc_stats.ast_tx_xretries, 0, "tx failed 'cuz too many retries");
7479 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_fifoerr", CTLFLAG_RD,
7480 &sc->sc_stats.ast_tx_fifoerr, 0, "tx failed 'cuz FIFO underrun");
7481 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_filtered", CTLFLAG_RD,
7482 &sc->sc_stats.ast_tx_filtered, 0, "tx failed 'cuz xmit filtered");
7483 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_shortretry", CTLFLAG_RD,
7484 &sc->sc_stats.ast_tx_shortretry, 0, "tx on-chip retries (short)");
7485 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_longretry", CTLFLAG_RD,
7486 &sc->sc_stats.ast_tx_longretry, 0, "tx on-chip retries (long)");
7487 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_badrate", CTLFLAG_RD,
7488 &sc->sc_stats.ast_tx_badrate, 0, "tx failed 'cuz bogus xmit rate");
7489 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_noack", CTLFLAG_RD,
7490 &sc->sc_stats.ast_tx_noack, 0, "tx frames with no ack marked");
7491 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_rts", CTLFLAG_RD,
7492 &sc->sc_stats.ast_tx_rts, 0, "tx frames with rts enabled");
7493 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_cts", CTLFLAG_RD,
7494 &sc->sc_stats.ast_tx_cts, 0, "tx frames with cts enabled");
7495 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_shortpre", CTLFLAG_RD,
7496 &sc->sc_stats.ast_tx_shortpre, 0, "tx frames with short preamble");
7497 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_altrate", CTLFLAG_RD,
7498 &sc->sc_stats.ast_tx_altrate, 0, "tx frames with alternate rate");
7499 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_protect", CTLFLAG_RD,
7500 &sc->sc_stats.ast_tx_protect, 0, "tx frames with protection");
7501 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_ctsburst", CTLFLAG_RD,
7502 &sc->sc_stats.ast_tx_ctsburst, 0, "tx frames with cts and bursting");
7503 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_ctsext", CTLFLAG_RD,
7504 &sc->sc_stats.ast_tx_ctsext, 0, "tx frames with cts extension");
7505 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_nombuf", CTLFLAG_RD,
7506 &sc->sc_stats.ast_rx_nombuf, 0, "rx setup failed 'cuz no mbuf");
7507 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_busdma", CTLFLAG_RD,
7508 &sc->sc_stats.ast_rx_busdma, 0, "rx setup failed for dma resrcs");
7509 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_orn", CTLFLAG_RD,
7510 &sc->sc_stats.ast_rx_orn, 0, "rx failed 'cuz of desc overrun");
7511 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_crcerr", CTLFLAG_RD,
7512 &sc->sc_stats.ast_rx_crcerr, 0, "rx failed 'cuz of bad CRC");
7513 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_fifoerr", CTLFLAG_RD,
7514 &sc->sc_stats.ast_rx_fifoerr, 0, "rx failed 'cuz of FIFO overrun");
7515 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_badcrypt", CTLFLAG_RD,
7516 &sc->sc_stats.ast_rx_badcrypt, 0, "rx failed 'cuz decryption");
7517 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_badmic", CTLFLAG_RD,
7518 &sc->sc_stats.ast_rx_badmic, 0, "rx failed 'cuz MIC failure");
7519 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_phyerr", CTLFLAG_RD,
7520 &sc->sc_stats.ast_rx_phyerr, 0, "rx failed 'cuz of PHY err");
7521 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_tooshort", CTLFLAG_RD,
7522 &sc->sc_stats.ast_rx_tooshort, 0, "rx discarded 'cuz frame too short");
7523 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_toobig", CTLFLAG_RD,
7524 &sc->sc_stats.ast_rx_toobig, 0, "rx discarded 'cuz frame too large");
7525 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_packets", CTLFLAG_RD,
7526 &sc->sc_stats.ast_rx_packets, 0, "packet recv on the interface");
7527 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_mgt", CTLFLAG_RD,
7528 &sc->sc_stats.ast_rx_mgt, 0, "management frames received");
7529 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rx_ctl", CTLFLAG_RD,
7530 &sc->sc_stats.ast_rx_ctl, 0, "rx discarded 'cuz ctl frame");
7531 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_be_xmit", CTLFLAG_RD,
7532 &sc->sc_stats.ast_be_xmit, 0, "beacons transmitted");
7533 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_be_nombuf", CTLFLAG_RD,
7534 &sc->sc_stats.ast_be_nombuf, 0, "beacon setup failed 'cuz no mbuf");
7535 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_per_cal", CTLFLAG_RD,
7536 &sc->sc_stats.ast_per_cal, 0, "periodic calibration calls");
7537 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_per_calfail", CTLFLAG_RD,
7538 &sc->sc_stats.ast_per_calfail, 0, "periodic calibration failed");
7539 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_per_rfgain", CTLFLAG_RD,
7540 &sc->sc_stats.ast_per_rfgain, 0, "periodic calibration rfgain reset");
7541 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rate_calls", CTLFLAG_RD,
7542 &sc->sc_stats.ast_rate_calls, 0, "rate control checks");
7543 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rate_raise", CTLFLAG_RD,
7544 &sc->sc_stats.ast_rate_raise, 0, "rate control raised xmit rate");
7545 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_rate_drop", CTLFLAG_RD,
7546 &sc->sc_stats.ast_rate_drop, 0, "rate control dropped xmit rate");
7547 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ant_defswitch", CTLFLAG_RD,
7548 &sc->sc_stats.ast_ant_defswitch, 0, "rx/default antenna switches");
7549 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ant_txswitch", CTLFLAG_RD,
7550 &sc->sc_stats.ast_ant_txswitch, 0, "tx antenna switches");
7551 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_cabq_xmit", CTLFLAG_RD,
7552 &sc->sc_stats.ast_cabq_xmit, 0, "cabq frames transmitted");
7553 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_cabq_busy", CTLFLAG_RD,
7554 &sc->sc_stats.ast_cabq_busy, 0, "cabq found busy");
7555 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_raw", CTLFLAG_RD,
7556 &sc->sc_stats.ast_tx_raw, 0, "tx frames through raw api");
7557 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ff_txok", CTLFLAG_RD,
7558 &sc->sc_stats.ast_ff_txok, 0, "fast frames tx'd successfully");
7559 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ff_txerr", CTLFLAG_RD,
7560 &sc->sc_stats.ast_ff_txerr, 0, "fast frames tx'd w/ error");
7561 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ff_rx", CTLFLAG_RD,
7562 &sc->sc_stats.ast_ff_rx, 0, "fast frames rx'd");
7563 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_ff_flush", CTLFLAG_RD,
7564 &sc->sc_stats.ast_ff_flush, 0, "fast frames flushed from staging q");
7565 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_qfull", CTLFLAG_RD,
7566 &sc->sc_stats.ast_tx_qfull, 0, "tx dropped 'cuz of queue limit");
7567 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nobuf", CTLFLAG_RD,
7568 &sc->sc_stats.ast_tx_nobuf, 0, "tx dropped 'cuz no ath buffer");
7569 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tdma_update", CTLFLAG_RD,
7570 &sc->sc_stats.ast_tdma_update, 0, "TDMA slot timing updates");
7571 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tdma_timers", CTLFLAG_RD,
7572 &sc->sc_stats.ast_tdma_timers, 0, "TDMA slot update set beacon timers");
7573 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tdma_tsf", CTLFLAG_RD,
7574 &sc->sc_stats.ast_tdma_tsf, 0, "TDMA slot update set TSF");
7575 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tdma_ack", CTLFLAG_RD,
7576 &sc->sc_stats.ast_tdma_ack, 0, "TDMA tx failed 'cuz ACK required");
7577 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_raw_fail", CTLFLAG_RD,
7578 &sc->sc_stats.ast_tx_raw_fail, 0, "raw tx failed 'cuz h/w down");
7579 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_nofrag", CTLFLAG_RD,
7580 &sc->sc_stats.ast_tx_nofrag, 0, "tx dropped 'cuz no ath frag buffer");
7582 SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_be_missed", CTLFLAG_RD,
7583 &sc->sc_stats.ast_be_missed, 0, "number of -missed- beacons");