2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification.
11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
13 * redistribution must be conditioned upon including a substantially
14 * similar Disclaimer requirement for further binary redistribution.
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
27 * THE POSSIBILITY OF SUCH DAMAGES.
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
34 * Driver for the Atheros Wireless LAN controller.
36 * This software is derived from work of Atsushi Onoe; his contribution
37 * is greatly appreciated.
43 * This is needed for register operations which are performed
44 * by the driver - eg, calls to ath_hal_gettsf32().
46 * It's also required for any AH_DEBUG checks in here, eg the
47 * module dependencies.
52 #include <sys/param.h>
53 #include <sys/systm.h>
54 #include <sys/sysctl.h>
56 #include <sys/malloc.h>
58 #include <sys/mutex.h>
59 #include <sys/kernel.h>
60 #include <sys/socket.h>
61 #include <sys/sockio.h>
62 #include <sys/errno.h>
63 #include <sys/callout.h>
65 #include <sys/endian.h>
66 #include <sys/kthread.h>
67 #include <sys/taskqueue.h>
69 #include <sys/module.h>
73 #include <net/if_var.h>
74 #include <net/if_dl.h>
75 #include <net/if_media.h>
76 #include <net/if_types.h>
77 #include <net/if_arp.h>
78 #include <net/ethernet.h>
79 #include <net/if_llc.h>
81 #include <netproto/802_11/ieee80211_var.h>
82 #include <netproto/802_11/ieee80211_regdomain.h>
83 #ifdef IEEE80211_SUPPORT_SUPERG
84 #include <netproto/802_11/ieee80211_superg.h>
86 #ifdef IEEE80211_SUPPORT_TDMA
87 #include <netproto/802_11/ieee80211_tdma.h>
93 #include <netinet/in.h>
94 #include <netinet/if_ether.h>
97 #include <dev/netif/ath/ath/if_athvar.h>
98 #include <dev/netif/ath/ath_hal/ah_devid.h> /* XXX for softled */
99 #include <dev/netif/ath/ath_hal/ah_diagcodes.h>
101 #include <dev/netif/ath/ath/if_ath_debug.h>
102 #include <dev/netif/ath/ath/if_ath_misc.h>
103 #include <dev/netif/ath/ath/if_ath_tsf.h>
104 #include <dev/netif/ath/ath/if_ath_tx.h>
105 #include <dev/netif/ath/ath/if_ath_sysctl.h>
106 #include <dev/netif/ath/ath/if_ath_led.h>
107 #include <dev/netif/ath/ath/if_ath_keycache.h>
108 #include <dev/netif/ath/ath/if_ath_rx.h>
109 #include <dev/netif/ath/ath/if_ath_beacon.h>
110 #include <dev/netif/ath/ath/if_athdfs.h>
113 #include <dev/netif/ath/ath_tx99/ath_tx99.h>
117 #include <dev/netif/ath/ath/if_ath_alq.h>
120 #ifdef IEEE80211_SUPPORT_TDMA
121 #include <dev/netif/ath/ath/if_ath_tdma.h>
123 static void ath_tdma_settimers(struct ath_softc *sc, u_int32_t nexttbtt,
125 static void ath_tdma_bintvalsetup(struct ath_softc *sc,
126 const struct ieee80211_tdma_state *tdma);
127 #endif /* IEEE80211_SUPPORT_TDMA */
129 #ifdef IEEE80211_SUPPORT_TDMA
131 ath_tdma_settimers(struct ath_softc *sc, u_int32_t nexttbtt, u_int32_t bintval)
133 struct ath_hal *ah = sc->sc_ah;
134 HAL_BEACON_TIMERS bt;
136 bt.bt_intval = bintval | HAL_BEACON_ENA;
137 bt.bt_nexttbtt = nexttbtt;
138 bt.bt_nextdba = (nexttbtt<<3) - sc->sc_tdmadbaprep;
139 bt.bt_nextswba = (nexttbtt<<3) - sc->sc_tdmaswbaprep;
140 bt.bt_nextatim = nexttbtt+1;
141 /* Enables TBTT, DBA, SWBA timers by default */
144 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
145 "%s: intval=%d (0x%08x) nexttbtt=%u (0x%08x), nextdba=%u (0x%08x), nextswba=%u (0x%08x),nextatim=%u (0x%08x)\n",
160 if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_TDMA_TIMER_SET)) {
161 struct if_ath_alq_tdma_timer_set t;
162 t.bt_intval = htobe32(bt.bt_intval);
163 t.bt_nexttbtt = htobe32(bt.bt_nexttbtt);
164 t.bt_nextdba = htobe32(bt.bt_nextdba);
165 t.bt_nextswba = htobe32(bt.bt_nextswba);
166 t.bt_nextatim = htobe32(bt.bt_nextatim);
167 t.bt_flags = htobe32(bt.bt_flags);
168 t.sc_tdmadbaprep = htobe32(sc->sc_tdmadbaprep);
169 t.sc_tdmaswbaprep = htobe32(sc->sc_tdmaswbaprep);
170 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_TIMER_SET,
171 sizeof(t), (char *) &t);
175 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
176 "%s: nexttbtt=%u (0x%08x), nexttbtt tsf=%lld (0x%08llx)\n",
180 (long long) ( ((u_int64_t) (bt.bt_nexttbtt)) << 10),
181 (long long) ( ((u_int64_t) (bt.bt_nexttbtt)) << 10));
182 ath_hal_beaconsettimers(ah, &bt);
186 * Calculate the beacon interval. This is periodic in the
187 * superframe for the bss. We assume each station is configured
188 * identically wrt transmit rate so the guard time we calculate
189 * above will be the same on all stations. Note we need to
190 * factor in the xmit time because the hardware will schedule
191 * a frame for transmit if the start of the frame is within
192 * the burst time. When we get hardware that properly kills
193 * frames in the PCU we can reduce/eliminate the guard time.
195 * Roundup to 1024 is so we have 1 TU buffer in the guard time
196 * to deal with the granularity of the nexttbtt timer. 11n MAC's
197 * with 1us timer granularity should allow us to reduce/eliminate
201 ath_tdma_bintvalsetup(struct ath_softc *sc,
202 const struct ieee80211_tdma_state *tdma)
204 /* copy from vap state (XXX check all vaps have same value?) */
205 sc->sc_tdmaslotlen = tdma->tdma_slotlen;
207 sc->sc_tdmabintval = roundup((sc->sc_tdmaslotlen+sc->sc_tdmaguard) *
208 tdma->tdma_slotcnt, 1024);
209 sc->sc_tdmabintval >>= 10; /* TSF -> TU */
210 if (sc->sc_tdmabintval & 1)
211 sc->sc_tdmabintval++;
213 if (tdma->tdma_slot == 0) {
215 * Only slot 0 beacons; other slots respond.
217 sc->sc_imask |= HAL_INT_SWBA;
218 sc->sc_tdmaswba = 0; /* beacon immediately */
220 /* XXX all vaps must be slot 0 or slot !0 */
221 sc->sc_imask &= ~HAL_INT_SWBA;
226 * Max 802.11 overhead. This assumes no 4-address frames and
227 * the encapsulation done by ieee80211_encap (llc). We also
228 * include potential crypto overhead.
230 #define IEEE80211_MAXOVERHEAD \
231 (sizeof(struct ieee80211_qosframe) \
232 + sizeof(struct llc) \
233 + IEEE80211_ADDR_LEN \
234 + IEEE80211_WEP_IVLEN \
235 + IEEE80211_WEP_KIDLEN \
236 + IEEE80211_WEP_CRCLEN \
237 + IEEE80211_WEP_MICLEN \
241 * Setup initially for tdma operation. Start the beacon
242 * timers and enable SWBA if we are slot 0. Otherwise
243 * we wait for slot 0 to arrive so we can sync up before
244 * starting to transmit.
247 ath_tdma_config(struct ath_softc *sc, struct ieee80211vap *vap)
249 struct ath_hal *ah = sc->sc_ah;
250 struct ifnet *ifp = sc->sc_ifp;
251 struct ieee80211com *ic = ifp->if_l2com;
252 const struct ieee80211_txparam *tp;
253 const struct ieee80211_tdma_state *tdma = NULL;
257 vap = TAILQ_FIRST(&ic->ic_vaps); /* XXX */
259 if_printf(ifp, "%s: no vaps?\n", __func__);
263 /* XXX should take a locked ref to iv_bss */
264 tp = vap->iv_bss->ni_txparms;
266 * Calculate the guard time for each slot. This is the
267 * time to send a maximal-size frame according to the
268 * fixed/lowest transmit rate. Note that the interface
269 * mtu does not include the 802.11 overhead so we must
270 * tack that on (ath_hal_computetxtime includes the
271 * preamble and plcp in it's calculation).
274 if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE)
275 rix = ath_tx_findrix(sc, tp->ucastrate);
277 rix = ath_tx_findrix(sc, tp->mcastrate);
280 * If the chip supports enforcing TxOP on transmission,
281 * we can just delete the guard window. It isn't at all required.
283 if (sc->sc_hasenforcetxop) {
284 sc->sc_tdmaguard = 0;
286 /* XXX short preamble assumed */
287 /* XXX non-11n rate assumed */
288 sc->sc_tdmaguard = ath_hal_computetxtime(ah, sc->sc_currates,
289 ifp->if_mtu + IEEE80211_MAXOVERHEAD, rix, AH_TRUE);
292 ath_hal_intrset(ah, 0);
294 ath_beaconq_config(sc); /* setup h/w beacon q */
296 ath_hal_setcca(ah, AH_FALSE); /* disable CCA */
297 ath_tdma_bintvalsetup(sc, tdma); /* calculate beacon interval */
298 ath_tdma_settimers(sc, sc->sc_tdmabintval,
299 sc->sc_tdmabintval | HAL_BEACON_RESET_TSF);
300 sc->sc_syncbeacon = 0;
302 sc->sc_avgtsfdeltap = TDMA_DUMMY_MARKER;
303 sc->sc_avgtsfdeltam = TDMA_DUMMY_MARKER;
305 ath_hal_intrset(ah, sc->sc_imask);
307 DPRINTF(sc, ATH_DEBUG_TDMA, "%s: slot %u len %uus cnt %u "
308 "bsched %u guard %uus bintval %u TU dba prep %u\n", __func__,
309 tdma->tdma_slot, tdma->tdma_slotlen, tdma->tdma_slotcnt,
310 tdma->tdma_bintval, sc->sc_tdmaguard, sc->sc_tdmabintval,
314 if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_TDMA_TIMER_CONFIG)) {
315 struct if_ath_alq_tdma_timer_config t;
317 t.tdma_slot = htobe32(tdma->tdma_slot);
318 t.tdma_slotlen = htobe32(tdma->tdma_slotlen);
319 t.tdma_slotcnt = htobe32(tdma->tdma_slotcnt);
320 t.tdma_bintval = htobe32(tdma->tdma_bintval);
321 t.tdma_guard = htobe32(sc->sc_tdmaguard);
322 t.tdma_scbintval = htobe32(sc->sc_tdmabintval);
323 t.tdma_dbaprep = htobe32(sc->sc_tdmadbaprep);
325 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_TIMER_CONFIG,
326 sizeof(t), (char *) &t);
328 #endif /* ATH_DEBUG_ALQ */
332 * Update tdma operation. Called from the 802.11 layer
333 * when a beacon is received from the TDMA station operating
334 * in the slot immediately preceding us in the bss. Use
335 * the rx timestamp for the beacon frame to update our
336 * beacon timers so we follow their schedule. Note that
337 * by using the rx timestamp we implicitly include the
338 * propagation delay in our schedule.
340 * XXX TODO: since the changes for the AR5416 and later chips
341 * involved changing the TSF/TU calculations, we need to make
342 * sure that various calculations wrap consistently.
344 * A lot of the problems stemmed from the calculations wrapping
345 * at 65,535 TU. Since a lot of the math is still being done in
346 * TU, please audit it to ensure that when the TU values programmed
347 * into the timers wrap at (2^31)-1 TSF, all the various terms
351 ath_tdma_update(struct ieee80211_node *ni,
352 const struct ieee80211_tdma_param *tdma, int changed)
354 #define TSF_TO_TU(_h,_l) \
355 ((((u_int32_t)(_h)) << 22) | (((u_int32_t)(_l)) >> 10))
356 #define TU_TO_TSF(_tu) (((u_int64_t)(_tu)) << 10)
357 struct ieee80211vap *vap = ni->ni_vap;
358 struct ieee80211com *ic = ni->ni_ic;
359 struct ath_softc *sc = ic->ic_ifp->if_softc;
360 struct ath_hal *ah = sc->sc_ah;
361 const HAL_RATE_TABLE *rt = sc->sc_currates;
362 u_int64_t tsf, rstamp, nextslot, nexttbtt, nexttbtt_full;
363 u_int32_t txtime, nextslottu;
364 int32_t tudelta, tsfdelta;
365 const struct ath_rx_status *rs;
368 sc->sc_stats.ast_tdma_update++;
371 * Check for and adopt configuration changes.
374 const struct ieee80211_tdma_state *ts = vap->iv_tdma;
376 ath_tdma_bintvalsetup(sc, ts);
377 if (changed & TDMA_UPDATE_SLOTLEN)
380 DPRINTF(sc, ATH_DEBUG_TDMA,
381 "%s: adopt slot %u slotcnt %u slotlen %u us "
382 "bintval %u TU\n", __func__,
383 ts->tdma_slot, ts->tdma_slotcnt, ts->tdma_slotlen,
387 ath_hal_intrset(ah, sc->sc_imask);
388 /* NB: beacon timers programmed below */
391 /* extend rx timestamp to 64 bits */
393 tsf = ath_hal_gettsf64(ah);
394 rstamp = ath_extend_tsf(sc, rs->rs_tstamp, tsf);
396 * The rx timestamp is set by the hardware on completing
397 * reception (at the point where the rx descriptor is DMA'd
398 * to the host). To find the start of our next slot we
399 * must adjust this time by the time required to send
400 * the packet just received.
402 rix = rt->rateCodeToIndex[rs->rs_rate];
405 * To calculate the packet duration for legacy rates, we
406 * only need the rix and preamble.
408 * For 11n non-aggregate frames, we also need the channel
409 * width and short/long guard interval.
411 * For 11n aggregate frames, the required hacks are a little
412 * more subtle. You need to figure out the frame duration
413 * for each frame, including the delimiters. However, when
414 * a frame isn't received successfully, we won't hear it
415 * (unless you enable reception of CRC errored frames), so
416 * your duration calculation is going to be off.
418 * However, we can assume that the beacon frames won't be
419 * transmitted as aggregate frames, so we should be okay.
420 * Just add a check to ensure that we aren't handed something
423 * For ath_hal_pkt_txtime() - for 11n rates, shortPreamble is
424 * actually short guard interval. For legacy rates,
425 * it's short preamble.
427 txtime = ath_hal_pkt_txtime(ah, rt, rs->rs_datalen,
429 !! (rs->rs_flags & HAL_RX_2040),
431 (! (rs->rs_flags & HAL_RX_GI)) : rt->info[rix].shortPreamble);
432 /* NB: << 9 is to cvt to TU and /2 */
433 nextslot = (rstamp - txtime) + (sc->sc_tdmabintval << 9);
436 * For 802.11n chips: nextslottu needs to be the full TSF space,
437 * not just 0..65535 TU.
439 nextslottu = TSF_TO_TU(nextslot>>32, nextslot);
441 * Retrieve the hardware NextTBTT in usecs
442 * and calculate the difference between what the
443 * other station thinks and what we have programmed. This
444 * lets us figure how to adjust our timers to match. The
445 * adjustments are done by pulling the TSF forward and possibly
446 * rewriting the beacon timers.
449 * The logic here assumes the nexttbtt counter is in TSF
450 * but the prr-11n NICs are in TU. The HAL shifts them
451 * to TSF but there's two important differences:
453 * + The TU->TSF values have 0's for the low 9 bits, and
454 * + The counter wraps at TU_TO_TSF(HAL_BEACON_PERIOD + 1) for
455 * the pre-11n NICs, but not for the 11n NICs.
457 * So for now, just make sure the nexttbtt value we get
458 * matches the second issue or once nexttbtt exceeds this
459 * value, tsfdelta ends up becoming very negative and all
460 * of the adjustments get very messed up.
464 * We need to track the full nexttbtt rather than having it
465 * truncated at HAL_BEACON_PERIOD, as programming the
466 * nexttbtt (and related) registers for the 11n chips is
467 * actually going to take the full 32 bit space, rather than
470 nexttbtt_full = ath_hal_getnexttbtt(ah);
471 nexttbtt = nexttbtt_full % (TU_TO_TSF(HAL_BEACON_PERIOD + 1));
472 tsfdelta = (int32_t)((nextslot % TU_TO_TSF(HAL_BEACON_PERIOD + 1)) - nexttbtt);
474 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
475 "rs->rstamp %llu rstamp %llu tsf %llu txtime %d, nextslot %llu, "
476 "nextslottu %d, nextslottume %d\n",
477 (unsigned long long) rs->rs_tstamp,
478 (unsigned long long) rstamp,
479 (unsigned long long) tsf, txtime,
480 (unsigned long long) nextslot,
481 nextslottu, TSF_TO_TU(nextslot >> 32, nextslot));
482 DPRINTF(sc, ATH_DEBUG_TDMA,
483 " beacon tstamp: %llu (0x%016llx)\n",
484 (unsigned long long) le64toh(ni->ni_tstamp.tsf),
485 (unsigned long long) le64toh(ni->ni_tstamp.tsf));
487 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
488 "nexttbtt %llu (0x%08llx) tsfdelta %d avg +%d/-%d\n",
489 (unsigned long long) nexttbtt,
490 (long long) nexttbtt,
492 TDMA_AVG(sc->sc_avgtsfdeltap), TDMA_AVG(sc->sc_avgtsfdeltam));
495 TDMA_SAMPLE(sc->sc_avgtsfdeltap, 0);
496 TDMA_SAMPLE(sc->sc_avgtsfdeltam, -tsfdelta);
497 tsfdelta = -tsfdelta % 1024;
499 } else if (tsfdelta > 0) {
500 TDMA_SAMPLE(sc->sc_avgtsfdeltap, tsfdelta);
501 TDMA_SAMPLE(sc->sc_avgtsfdeltam, 0);
502 tsfdelta = 1024 - (tsfdelta % 1024);
505 TDMA_SAMPLE(sc->sc_avgtsfdeltap, 0);
506 TDMA_SAMPLE(sc->sc_avgtsfdeltam, 0);
508 tudelta = nextslottu - TSF_TO_TU(nexttbtt_full >> 32, nexttbtt_full);
511 if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_TDMA_BEACON_STATE)) {
512 struct if_ath_alq_tdma_beacon_state t;
513 t.rx_tsf = htobe64(rstamp);
514 t.beacon_tsf = htobe64(le64toh(ni->ni_tstamp.tsf));
515 t.tsf64 = htobe64(tsf);
516 t.nextslot_tsf = htobe64(nextslot);
517 t.nextslot_tu = htobe32(nextslottu);
518 t.txtime = htobe32(txtime);
519 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_BEACON_STATE,
520 sizeof(t), (char *) &t);
523 if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_TDMA_SLOT_CALC)) {
524 struct if_ath_alq_tdma_slot_calc t;
526 t.nexttbtt = htobe64(nexttbtt_full);
527 t.next_slot = htobe64(nextslot);
528 t.tsfdelta = htobe32(tsfdelta);
529 t.avg_plus = htobe32(TDMA_AVG(sc->sc_avgtsfdeltap));
530 t.avg_minus = htobe32(TDMA_AVG(sc->sc_avgtsfdeltam));
532 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_SLOT_CALC,
533 sizeof(t), (char *) &t);
538 * Copy sender's timetstamp into tdma ie so they can
539 * calculate roundtrip time. We submit a beacon frame
540 * below after any timer adjustment. The frame goes out
541 * at the next TBTT so the sender can calculate the
542 * roundtrip by inspecting the tdma ie in our beacon frame.
544 * NB: This tstamp is subtlely preserved when
545 * IEEE80211_BEACON_TDMA is marked (e.g. when the
546 * slot position changes) because ieee80211_add_tdma
547 * skips over the data.
549 memcpy(ATH_VAP(vap)->av_boff.bo_tdma +
550 __offsetof(struct ieee80211_tdma_param, tdma_tstamp),
551 &ni->ni_tstamp.data, 8);
553 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
554 "tsf %llu nextslot %llu (%d, %d) nextslottu %u nexttbtt %llu (%d)\n",
555 (unsigned long long) tsf, (unsigned long long) nextslot,
556 (int)(nextslot - tsf), tsfdelta, nextslottu, nexttbtt, tudelta);
559 * Adjust the beacon timers only when pulling them forward
560 * or when going back by less than the beacon interval.
561 * Negative jumps larger than the beacon interval seem to
562 * cause the timers to stop and generally cause instability.
563 * This basically filters out jumps due to missed beacons.
565 if (tudelta != 0 && (tudelta > 0 || -tudelta < sc->sc_tdmabintval)) {
566 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
567 "%s: calling ath_tdma_settimers; nextslottu=%d, bintval=%d\n",
571 ath_tdma_settimers(sc, nextslottu, sc->sc_tdmabintval);
572 sc->sc_stats.ast_tdma_timers++;
577 /* XXX should just teach ath_hal_adjusttsf() to do this */
578 tsf = ath_hal_gettsf64(ah);
579 ath_hal_settsf64(ah, tsf + tsfdelta);
580 DPRINTF(sc, ATH_DEBUG_TDMA_TIMER,
581 "%s: calling ath_hal_adjusttsf: TSF=%llu, tsfdelta=%d\n",
583 (unsigned long long) tsf,
587 if (if_ath_alq_checkdebug(&sc->sc_alq,
588 ATH_ALQ_TDMA_TSF_ADJUST)) {
589 struct if_ath_alq_tdma_tsf_adjust t;
591 t.tsfdelta = htobe32(tsfdelta);
592 t.tsf64_old = htobe64(tsf);
593 t.tsf64_new = htobe64(tsf + tsfdelta);
594 if_ath_alq_post(&sc->sc_alq, ATH_ALQ_TDMA_TSF_ADJUST,
595 sizeof(t), (char *) &t);
597 #endif /* ATH_DEBUG_ALQ */
598 sc->sc_stats.ast_tdma_tsf++;
600 ath_tdma_beacon_send(sc, vap); /* prepare response */
606 * Transmit a beacon frame at SWBA. Dynamic updates
607 * to the frame contents are done as needed.
610 ath_tdma_beacon_send(struct ath_softc *sc, struct ieee80211vap *vap)
612 struct ath_hal *ah = sc->sc_ah;
617 * Check if the previous beacon has gone out. If
618 * not don't try to post another, skip this period
619 * and wait for the next. Missed beacons indicate
620 * a problem and should not occur. If we miss too
621 * many consecutive beacons reset the device.
623 if (ath_hal_numtxpending(ah, sc->sc_bhalq) != 0) {
625 DPRINTF(sc, ATH_DEBUG_BEACON,
626 "%s: missed %u consecutive beacons\n",
627 __func__, sc->sc_bmisscount);
628 if (sc->sc_bmisscount >= ath_bstuck_threshold)
629 taskqueue_enqueue(sc->sc_tq, &sc->sc_bstucktask);
632 if (sc->sc_bmisscount != 0) {
633 DPRINTF(sc, ATH_DEBUG_BEACON,
634 "%s: resume beacon xmit after %u misses\n",
635 __func__, sc->sc_bmisscount);
636 sc->sc_bmisscount = 0;
640 * Check recent per-antenna transmit statistics and flip
641 * the default antenna if noticeably more frames went out
642 * on the non-default antenna.
643 * XXX assumes 2 anntenae
645 if (!sc->sc_diversity) {
646 otherant = sc->sc_defant & 1 ? 2 : 1;
647 if (sc->sc_ant_tx[otherant] > sc->sc_ant_tx[sc->sc_defant] + 2)
648 ath_setdefantenna(sc, otherant);
649 sc->sc_ant_tx[1] = sc->sc_ant_tx[2] = 0;
652 bf = ath_beacon_generate(sc, vap);
653 /* XXX We don't do cabq traffic, but just for completeness .. */
654 ATH_TXQ_LOCK(sc->sc_cabq);
655 ath_beacon_cabq_start(sc);
656 ATH_TXQ_UNLOCK(sc->sc_cabq);
660 * Stop any current dma and put the new frame on the queue.
661 * This should never fail since we check above that no frames
662 * are still pending on the queue.
664 if ((! sc->sc_isedma) &&
665 (! ath_hal_stoptxdma(ah, sc->sc_bhalq))) {
666 DPRINTF(sc, ATH_DEBUG_ANY,
667 "%s: beacon queue %u did not stop?\n",
668 __func__, sc->sc_bhalq);
669 /* NB: the HAL still stops DMA, so proceed */
671 ath_hal_puttxbuf(ah, sc->sc_bhalq, bf->bf_daddr);
672 ath_hal_txstart(ah, sc->sc_bhalq);
674 sc->sc_stats.ast_be_xmit++; /* XXX per-vap? */
677 * Record local TSF for our last send for use
678 * in arbitrating slot collisions.
680 /* XXX should take a locked ref to iv_bss */
681 vap->iv_bss->ni_tstamp.tsf = ath_hal_gettsf64(ah);
684 #endif /* IEEE80211_SUPPORT_TDMA */