1 /* $FreeBSD: head/sys/dev/ral/rt2661.c 195618 2009-07-11 15:02:45Z rpaulo $ */
5 * Damien Bergamini <damien.bergamini@free.fr>
7 * Permission to use, copy, modify, and distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 * $FreeBSD: head/sys/dev/ral/rt2661.c 195618 2009-07-11 15:02:45Z rpaulo $
23 * Ralink Technology RT2561, RT2561S and RT2661 chipset driver
24 * http://www.ralinktech.com/
27 #include <sys/param.h>
28 #include <sys/sysctl.h>
29 #include <sys/sockio.h>
31 #include <sys/kernel.h>
32 #include <sys/socket.h>
33 #include <sys/systm.h>
34 #include <sys/malloc.h>
36 #include <sys/mutex.h>
37 #include <sys/module.h>
39 #include <sys/endian.h>
40 #include <sys/firmware.h>
45 #include <net/if_arp.h>
46 #include <net/ethernet.h>
47 #include <net/if_dl.h>
48 #include <net/if_media.h>
49 #include <net/if_types.h>
50 #include <net/ifq_var.h>
52 #include <netproto/802_11/ieee80211_var.h>
53 #include <netproto/802_11/ieee80211_radiotap.h>
54 #include <netproto/802_11/ieee80211_regdomain.h>
55 #include <netproto/802_11/ieee80211_ratectl.h>
57 #include <netinet/in.h>
58 #include <netinet/in_systm.h>
59 #include <netinet/in_var.h>
60 #include <netinet/ip.h>
61 #include <netinet/if_ether.h>
63 #include <dev/netif/ral/rt2661reg.h>
64 #include <dev/netif/ral/rt2661var.h>
68 #define DPRINTF(sc, fmt, ...) do { \
69 if (sc->sc_debug > 0) \
70 kprintf(fmt, __VA_ARGS__); \
72 #define DPRINTFN(sc, n, fmt, ...) do { \
73 if (sc->sc_debug >= (n)) \
74 kprintf(fmt, __VA_ARGS__); \
77 #define DPRINTF(sc, fmt, ...)
78 #define DPRINTFN(sc, n, fmt, ...)
81 static struct ieee80211vap *rt2661_vap_create(struct ieee80211com *,
82 const char name[IFNAMSIZ], int unit,
83 enum ieee80211_opmode opmode,
84 int flags, const uint8_t bssid[IEEE80211_ADDR_LEN],
85 const uint8_t mac[IEEE80211_ADDR_LEN]);
86 static void rt2661_vap_delete(struct ieee80211vap *);
87 static void rt2661_dma_map_addr(void *, bus_dma_segment_t *, int,
89 static int rt2661_alloc_tx_ring(struct rt2661_softc *,
90 struct rt2661_tx_ring *, int);
91 static void rt2661_reset_tx_ring(struct rt2661_softc *,
92 struct rt2661_tx_ring *);
93 static void rt2661_free_tx_ring(struct rt2661_softc *,
94 struct rt2661_tx_ring *);
95 static int rt2661_alloc_rx_ring(struct rt2661_softc *,
96 struct rt2661_rx_ring *, int);
97 static void rt2661_reset_rx_ring(struct rt2661_softc *,
98 struct rt2661_rx_ring *);
99 static void rt2661_free_rx_ring(struct rt2661_softc *,
100 struct rt2661_rx_ring *);
101 static int rt2661_newstate(struct ieee80211vap *,
102 enum ieee80211_state, int);
103 static uint16_t rt2661_eeprom_read(struct rt2661_softc *, uint8_t);
104 static void rt2661_rx_intr(struct rt2661_softc *);
105 static void rt2661_tx_intr(struct rt2661_softc *);
106 static void rt2661_tx_dma_intr(struct rt2661_softc *,
107 struct rt2661_tx_ring *);
108 static void rt2661_mcu_beacon_expire(struct rt2661_softc *);
109 static void rt2661_mcu_wakeup(struct rt2661_softc *);
110 static void rt2661_mcu_cmd_intr(struct rt2661_softc *);
111 static void rt2661_scan_start(struct ieee80211com *);
112 static void rt2661_scan_end(struct ieee80211com *);
113 static void rt2661_set_channel(struct ieee80211com *);
114 static void rt2661_setup_tx_desc(struct rt2661_softc *,
115 struct rt2661_tx_desc *, uint32_t, uint16_t, int,
116 int, const bus_dma_segment_t *, int, int);
117 static int rt2661_tx_data(struct rt2661_softc *, struct mbuf *,
118 struct ieee80211_node *, int);
119 static int rt2661_tx_mgt(struct rt2661_softc *, struct mbuf *,
120 struct ieee80211_node *);
121 static void rt2661_start_locked(struct ifnet *);
122 static void rt2661_start(struct ifnet *, struct ifaltq_subque *);
123 static int rt2661_raw_xmit(struct ieee80211_node *, struct mbuf *,
124 const struct ieee80211_bpf_params *);
125 static void rt2661_watchdog_callout(void *);
126 static int rt2661_ioctl(struct ifnet *, u_long, caddr_t,
128 static void rt2661_bbp_write(struct rt2661_softc *, uint8_t,
130 static uint8_t rt2661_bbp_read(struct rt2661_softc *, uint8_t);
131 static void rt2661_rf_write(struct rt2661_softc *, uint8_t,
133 static int rt2661_tx_cmd(struct rt2661_softc *, uint8_t,
135 static void rt2661_select_antenna(struct rt2661_softc *);
136 static void rt2661_enable_mrr(struct rt2661_softc *);
137 static void rt2661_set_txpreamble(struct rt2661_softc *);
138 static void rt2661_set_basicrates(struct rt2661_softc *,
139 const struct ieee80211_rateset *);
140 static void rt2661_select_band(struct rt2661_softc *,
141 struct ieee80211_channel *);
142 static void rt2661_set_chan(struct rt2661_softc *,
143 struct ieee80211_channel *);
144 static void rt2661_set_bssid(struct rt2661_softc *,
146 static void rt2661_set_macaddr(struct rt2661_softc *,
148 static void rt2661_update_promisc(struct ifnet *);
149 static int rt2661_wme_update(struct ieee80211com *) __unused;
150 static void rt2661_update_slot(struct ifnet *);
151 static const char *rt2661_get_rf(int);
152 static void rt2661_read_eeprom(struct rt2661_softc *,
153 uint8_t macaddr[IEEE80211_ADDR_LEN]);
154 static int rt2661_bbp_init(struct rt2661_softc *);
155 static void rt2661_init_locked(struct rt2661_softc *);
156 static void rt2661_init(void *);
157 static void rt2661_stop_locked(struct rt2661_softc *);
158 static void rt2661_stop(void *);
159 static int rt2661_load_microcode(struct rt2661_softc *);
161 static void rt2661_rx_tune(struct rt2661_softc *);
162 static void rt2661_radar_start(struct rt2661_softc *);
163 static int rt2661_radar_stop(struct rt2661_softc *);
165 static int rt2661_prepare_beacon(struct rt2661_softc *,
166 struct ieee80211vap *);
167 static void rt2661_enable_tsf_sync(struct rt2661_softc *);
168 static void rt2661_enable_tsf(struct rt2661_softc *);
169 static int rt2661_get_rssi(struct rt2661_softc *, uint8_t);
171 static const struct {
174 } rt2661_def_mac[] = {
178 static const struct {
181 } rt2661_def_bbp[] = {
185 static const struct rfprog {
187 uint32_t r1, r2, r3, r4;
188 } rt2661_rf5225_1[] = {
190 }, rt2661_rf5225_2[] = {
195 rt2661_attach(device_t dev, int id)
197 struct rt2661_softc *sc = device_get_softc(dev);
198 struct ieee80211com *ic;
201 int error, ac, ntries;
203 uint8_t macaddr[IEEE80211_ADDR_LEN];
204 struct sysctl_ctx_list *ctx;
205 struct sysctl_oid *tree;
210 ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211);
212 device_printf(sc->sc_dev, "can not if_alloc()\n");
217 callout_init(&sc->watchdog_ch);
219 /* wait for NIC to initialize */
220 for (ntries = 0; ntries < 1000; ntries++) {
221 if ((val = RAL_READ(sc, RT2661_MAC_CSR0)) != 0)
225 if (ntries == 1000) {
226 device_printf(sc->sc_dev,
227 "timeout waiting for NIC to initialize\n");
232 /* retrieve RF rev. no and various other things from EEPROM */
233 rt2661_read_eeprom(sc, macaddr);
235 device_printf(dev, "MAC/BBP RT%X, RF %s\n", val,
236 rt2661_get_rf(sc->rf_rev));
239 * Allocate Tx and Rx rings.
241 for (ac = 0; ac < 4; ac++) {
242 error = rt2661_alloc_tx_ring(sc, &sc->txq[ac],
243 RT2661_TX_RING_COUNT);
245 device_printf(sc->sc_dev,
246 "could not allocate Tx ring %d\n", ac);
251 error = rt2661_alloc_tx_ring(sc, &sc->mgtq, RT2661_MGT_RING_COUNT);
253 device_printf(sc->sc_dev, "could not allocate Mgt ring\n");
257 error = rt2661_alloc_rx_ring(sc, &sc->rxq, RT2661_RX_RING_COUNT);
259 device_printf(sc->sc_dev, "could not allocate Rx ring\n");
264 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
265 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
266 ifp->if_init = rt2661_init;
267 ifp->if_ioctl = rt2661_ioctl;
268 ifp->if_start = rt2661_start;
269 ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN);
271 ifq_set_ready(&ifp->if_snd);
275 ic->ic_opmode = IEEE80211_M_STA;
276 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
278 /* set device capabilities */
280 IEEE80211_C_STA /* station mode */
281 | IEEE80211_C_IBSS /* ibss, nee adhoc, mode */
282 | IEEE80211_C_HOSTAP /* hostap mode */
283 | IEEE80211_C_MONITOR /* monitor mode */
284 | IEEE80211_C_AHDEMO /* adhoc demo mode */
285 | IEEE80211_C_WDS /* 4-address traffic works */
286 | IEEE80211_C_MBSS /* mesh point link mode */
287 | IEEE80211_C_SHPREAMBLE /* short preamble supported */
288 | IEEE80211_C_SHSLOT /* short slot time supported */
289 | IEEE80211_C_WPA /* capable of WPA1+WPA2 */
290 | IEEE80211_C_BGSCAN /* capable of bg scanning */
292 | IEEE80211_C_TXFRAG /* handle tx frags */
293 | IEEE80211_C_WME /* 802.11e */
298 setbit(&bands, IEEE80211_MODE_11B);
299 setbit(&bands, IEEE80211_MODE_11G);
300 if (sc->rf_rev == RT2661_RF_5225 || sc->rf_rev == RT2661_RF_5325)
301 setbit(&bands, IEEE80211_MODE_11A);
302 ieee80211_init_channels(ic, NULL, &bands);
304 ieee80211_ifattach(ic, macaddr);
306 ic->ic_wme.wme_update = rt2661_wme_update;
308 ic->ic_scan_start = rt2661_scan_start;
309 ic->ic_scan_end = rt2661_scan_end;
310 ic->ic_set_channel = rt2661_set_channel;
311 ic->ic_updateslot = rt2661_update_slot;
312 ic->ic_update_promisc = rt2661_update_promisc;
313 ic->ic_raw_xmit = rt2661_raw_xmit;
315 ic->ic_vap_create = rt2661_vap_create;
316 ic->ic_vap_delete = rt2661_vap_delete;
318 ieee80211_radiotap_attach(ic,
319 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
320 RT2661_TX_RADIOTAP_PRESENT,
321 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
322 RT2661_RX_RADIOTAP_PRESENT);
324 ctx = &sc->sc_sysctl_ctx;
325 sysctl_ctx_init(ctx);
326 tree = SYSCTL_ADD_NODE(ctx, SYSCTL_STATIC_CHILDREN(_hw),
328 device_get_nameunit(sc->sc_dev),
331 device_printf(sc->sc_dev, "can't add sysctl node\n");
335 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
336 "debug", CTLFLAG_RW, &sc->sc_debug, 0, "debug msgs");
339 ieee80211_announce(ic);
343 fail3: rt2661_free_tx_ring(sc, &sc->mgtq);
344 fail2: while (--ac >= 0)
345 rt2661_free_tx_ring(sc, &sc->txq[ac]);
352 rt2661_detach(void *xsc)
354 struct rt2661_softc *sc = xsc;
355 struct ifnet *ifp = sc->sc_ifp;
356 struct ieee80211com *ic = ifp->if_l2com;
358 rt2661_stop_locked(sc);
360 ieee80211_ifdetach(ic);
362 rt2661_free_tx_ring(sc, &sc->txq[0]);
363 rt2661_free_tx_ring(sc, &sc->txq[1]);
364 rt2661_free_tx_ring(sc, &sc->txq[2]);
365 rt2661_free_tx_ring(sc, &sc->txq[3]);
366 rt2661_free_tx_ring(sc, &sc->mgtq);
367 rt2661_free_rx_ring(sc, &sc->rxq);
374 static struct ieee80211vap *
375 rt2661_vap_create(struct ieee80211com *ic,
376 const char name[IFNAMSIZ], int unit,
377 enum ieee80211_opmode opmode, int flags,
378 const uint8_t bssid[IEEE80211_ADDR_LEN],
379 const uint8_t mac[IEEE80211_ADDR_LEN])
381 struct ifnet *ifp = ic->ic_ifp;
382 struct rt2661_vap *rvp;
383 struct ieee80211vap *vap;
386 case IEEE80211_M_STA:
387 case IEEE80211_M_IBSS:
388 case IEEE80211_M_AHDEMO:
389 case IEEE80211_M_MONITOR:
390 case IEEE80211_M_HOSTAP:
391 case IEEE80211_M_MBSS:
393 if (!TAILQ_EMPTY(&ic->ic_vaps)) {
394 if_printf(ifp, "only 1 vap supported\n");
397 if (opmode == IEEE80211_M_STA)
398 flags |= IEEE80211_CLONE_NOBEACONS;
400 case IEEE80211_M_WDS:
401 if (TAILQ_EMPTY(&ic->ic_vaps) ||
402 ic->ic_opmode != IEEE80211_M_HOSTAP) {
403 if_printf(ifp, "wds only supported in ap mode\n");
407 * Silently remove any request for a unique
408 * bssid; WDS vap's always share the local
411 flags &= ~IEEE80211_CLONE_BSSID;
414 if_printf(ifp, "unknown opmode %d\n", opmode);
417 rvp = (struct rt2661_vap *) kmalloc(sizeof(struct rt2661_vap),
418 M_80211_VAP, M_INTWAIT | M_ZERO);
422 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac);
424 /* override state transition machine */
425 rvp->ral_newstate = vap->iv_newstate;
426 vap->iv_newstate = rt2661_newstate;
428 vap->iv_update_beacon = rt2661_beacon_update;
431 ieee80211_ratectl_init(vap);
433 ieee80211_vap_attach(vap, ieee80211_media_change, ieee80211_media_status);
434 if (TAILQ_FIRST(&ic->ic_vaps) == vap)
435 ic->ic_opmode = opmode;
440 rt2661_vap_delete(struct ieee80211vap *vap)
442 struct rt2661_vap *rvp = RT2661_VAP(vap);
444 ieee80211_ratectl_deinit(vap);
445 ieee80211_vap_detach(vap);
446 kfree(rvp, M_80211_VAP);
450 rt2661_shutdown(void *xsc)
452 struct rt2661_softc *sc = xsc;
458 rt2661_suspend(void *xsc)
460 struct rt2661_softc *sc = xsc;
466 rt2661_resume(void *xsc)
468 struct rt2661_softc *sc = xsc;
469 struct ifnet *ifp = sc->sc_ifp;
471 if (ifp->if_flags & IFF_UP)
476 rt2661_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error)
481 KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg));
483 *(bus_addr_t *)arg = segs[0].ds_addr;
487 rt2661_alloc_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring,
494 ring->cur = ring->next = ring->stat = 0;
496 error = bus_dma_tag_create(ring->desc_dmat, 4, 0,
497 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
498 count * RT2661_TX_DESC_SIZE, 1, count * RT2661_TX_DESC_SIZE,
499 0, &ring->desc_dmat);
501 device_printf(sc->sc_dev, "could not create desc DMA tag\n");
505 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc,
506 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map);
508 device_printf(sc->sc_dev, "could not allocate DMA memory\n");
512 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc,
513 count * RT2661_TX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr,
516 device_printf(sc->sc_dev, "could not load desc DMA map\n");
520 ring->data = kmalloc(count * sizeof (struct rt2661_tx_data), M_DEVBUF,
522 if (ring->data == NULL) {
523 device_printf(sc->sc_dev, "could not allocate soft data\n");
528 error = bus_dma_tag_create(ring->data_dmat, 1, 0,
529 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES,
530 RT2661_MAX_SCATTER, MCLBYTES, 0, &ring->data_dmat);
532 device_printf(sc->sc_dev, "could not create data DMA tag\n");
536 for (i = 0; i < count; i++) {
537 error = bus_dmamap_create(ring->data_dmat, 0,
540 device_printf(sc->sc_dev, "could not create DMA map\n");
547 fail: rt2661_free_tx_ring(sc, ring);
552 rt2661_reset_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring)
554 struct rt2661_tx_desc *desc;
555 struct rt2661_tx_data *data;
558 for (i = 0; i < ring->count; i++) {
559 desc = &ring->desc[i];
560 data = &ring->data[i];
562 if (data->m != NULL) {
563 bus_dmamap_sync(ring->data_dmat, data->map,
564 BUS_DMASYNC_POSTWRITE);
565 bus_dmamap_unload(ring->data_dmat, data->map);
570 if (data->ni != NULL) {
571 ieee80211_free_node(data->ni);
578 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
581 ring->cur = ring->next = ring->stat = 0;
585 rt2661_free_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring)
587 struct rt2661_tx_data *data;
590 if (ring->desc != NULL) {
591 bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
592 BUS_DMASYNC_POSTWRITE);
593 bus_dmamap_unload(ring->desc_dmat, ring->desc_map);
594 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
597 if (ring->desc_dmat != NULL)
598 bus_dma_tag_destroy(ring->desc_dmat);
600 if (ring->data != NULL) {
601 for (i = 0; i < ring->count; i++) {
602 data = &ring->data[i];
604 if (data->m != NULL) {
605 bus_dmamap_sync(ring->data_dmat, data->map,
606 BUS_DMASYNC_POSTWRITE);
607 bus_dmamap_unload(ring->data_dmat, data->map);
611 if (data->ni != NULL)
612 ieee80211_free_node(data->ni);
614 if (data->map != NULL)
615 bus_dmamap_destroy(ring->data_dmat, data->map);
618 kfree(ring->data, M_DEVBUF);
621 if (ring->data_dmat != NULL)
622 bus_dma_tag_destroy(ring->data_dmat);
626 rt2661_alloc_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring,
629 struct rt2661_rx_desc *desc;
630 struct rt2661_rx_data *data;
635 ring->cur = ring->next = 0;
637 error = bus_dma_tag_create(ring->desc_dmat, 4, 0,
638 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
639 count * RT2661_RX_DESC_SIZE, 1, count * RT2661_RX_DESC_SIZE,
640 0, &ring->desc_dmat);
642 device_printf(sc->sc_dev, "could not create desc DMA tag\n");
646 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc,
647 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map);
649 device_printf(sc->sc_dev, "could not allocate DMA memory\n");
653 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc,
654 count * RT2661_RX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr,
657 device_printf(sc->sc_dev, "could not load desc DMA map\n");
661 ring->data = kmalloc(count * sizeof (struct rt2661_rx_data), M_DEVBUF,
663 if (ring->data == NULL) {
664 device_printf(sc->sc_dev, "could not allocate soft data\n");
670 * Pre-allocate Rx buffers and populate Rx ring.
672 error = bus_dma_tag_create(ring->data_dmat, 1, 0,
673 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES,
674 1, MCLBYTES, 0, &ring->data_dmat);
676 device_printf(sc->sc_dev, "could not create data DMA tag\n");
680 for (i = 0; i < count; i++) {
681 desc = &sc->rxq.desc[i];
682 data = &sc->rxq.data[i];
684 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
686 device_printf(sc->sc_dev, "could not create DMA map\n");
690 data->m = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR);
691 if (data->m == NULL) {
692 device_printf(sc->sc_dev,
693 "could not allocate rx mbuf\n");
698 error = bus_dmamap_load(ring->data_dmat, data->map,
699 mtod(data->m, void *), MCLBYTES, rt2661_dma_map_addr,
702 device_printf(sc->sc_dev,
703 "could not load rx buf DMA map");
707 desc->flags = htole32(RT2661_RX_BUSY);
708 desc->physaddr = htole32(physaddr);
711 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
715 fail: rt2661_free_rx_ring(sc, ring);
720 rt2661_reset_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring)
724 for (i = 0; i < ring->count; i++)
725 ring->desc[i].flags = htole32(RT2661_RX_BUSY);
727 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
729 ring->cur = ring->next = 0;
733 rt2661_free_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring)
735 struct rt2661_rx_data *data;
738 if (ring->desc != NULL) {
739 bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
740 BUS_DMASYNC_POSTWRITE);
741 bus_dmamap_unload(ring->desc_dmat, ring->desc_map);
742 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
745 if (ring->desc_dmat != NULL)
746 bus_dma_tag_destroy(ring->desc_dmat);
748 if (ring->data != NULL) {
749 for (i = 0; i < ring->count; i++) {
750 data = &ring->data[i];
752 if (data->m != NULL) {
753 bus_dmamap_sync(ring->data_dmat, data->map,
754 BUS_DMASYNC_POSTREAD);
755 bus_dmamap_unload(ring->data_dmat, data->map);
759 if (data->map != NULL)
760 bus_dmamap_destroy(ring->data_dmat, data->map);
763 kfree(ring->data, M_DEVBUF);
766 if (ring->data_dmat != NULL)
767 bus_dma_tag_destroy(ring->data_dmat);
771 rt2661_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
773 struct rt2661_vap *rvp = RT2661_VAP(vap);
774 struct ieee80211com *ic = vap->iv_ic;
775 struct rt2661_softc *sc = ic->ic_ifp->if_softc;
778 if (nstate == IEEE80211_S_INIT && vap->iv_state == IEEE80211_S_RUN) {
781 /* abort TSF synchronization */
782 tmp = RAL_READ(sc, RT2661_TXRX_CSR9);
783 RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0x00ffffff);
786 error = rvp->ral_newstate(vap, nstate, arg);
788 if (error == 0 && nstate == IEEE80211_S_RUN) {
789 struct ieee80211_node *ni = vap->iv_bss;
791 if (vap->iv_opmode != IEEE80211_M_MONITOR) {
792 rt2661_enable_mrr(sc);
793 rt2661_set_txpreamble(sc);
794 rt2661_set_basicrates(sc, &ni->ni_rates);
795 rt2661_set_bssid(sc, ni->ni_bssid);
798 if (vap->iv_opmode == IEEE80211_M_HOSTAP ||
799 vap->iv_opmode == IEEE80211_M_IBSS ||
800 vap->iv_opmode == IEEE80211_M_MBSS) {
801 error = rt2661_prepare_beacon(sc, vap);
805 if (vap->iv_opmode != IEEE80211_M_MONITOR)
806 rt2661_enable_tsf_sync(sc);
808 rt2661_enable_tsf(sc);
814 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or
818 rt2661_eeprom_read(struct rt2661_softc *sc, uint8_t addr)
824 /* clock C once before the first command */
825 RT2661_EEPROM_CTL(sc, 0);
827 RT2661_EEPROM_CTL(sc, RT2661_S);
828 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
829 RT2661_EEPROM_CTL(sc, RT2661_S);
831 /* write start bit (1) */
832 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D);
833 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C);
835 /* write READ opcode (10) */
836 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D);
837 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C);
838 RT2661_EEPROM_CTL(sc, RT2661_S);
839 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
841 /* write address (A5-A0 or A7-A0) */
842 n = (RAL_READ(sc, RT2661_E2PROM_CSR) & RT2661_93C46) ? 5 : 7;
843 for (; n >= 0; n--) {
844 RT2661_EEPROM_CTL(sc, RT2661_S |
845 (((addr >> n) & 1) << RT2661_SHIFT_D));
846 RT2661_EEPROM_CTL(sc, RT2661_S |
847 (((addr >> n) & 1) << RT2661_SHIFT_D) | RT2661_C);
850 RT2661_EEPROM_CTL(sc, RT2661_S);
852 /* read data Q15-Q0 */
854 for (n = 15; n >= 0; n--) {
855 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
856 tmp = RAL_READ(sc, RT2661_E2PROM_CSR);
857 val |= ((tmp & RT2661_Q) >> RT2661_SHIFT_Q) << n;
858 RT2661_EEPROM_CTL(sc, RT2661_S);
861 RT2661_EEPROM_CTL(sc, 0);
863 /* clear Chip Select and clock C */
864 RT2661_EEPROM_CTL(sc, RT2661_S);
865 RT2661_EEPROM_CTL(sc, 0);
866 RT2661_EEPROM_CTL(sc, RT2661_C);
872 rt2661_tx_intr(struct rt2661_softc *sc)
874 struct ifnet *ifp = sc->sc_ifp;
875 struct rt2661_tx_ring *txq;
876 struct rt2661_tx_data *data;
879 struct ieee80211vap *vap;
882 struct ieee80211_node *ni;
885 val = RAL_READ(sc, RT2661_STA_CSR4);
886 if (!(val & RT2661_TX_STAT_VALID))
889 /* retrieve the queue in which this frame was sent */
890 qid = RT2661_TX_QID(val);
891 txq = (qid <= 3) ? &sc->txq[qid] : &sc->mgtq;
893 /* retrieve rate control algorithm context */
894 data = &txq->data[txq->stat];
901 /* if no frame has been sent, ignore */
907 switch (RT2661_TX_RESULT(val)) {
908 case RT2661_TX_SUCCESS:
909 retrycnt = RT2661_TX_RETRYCNT(val);
911 DPRINTFN(sc, 10, "data frame sent successfully after "
912 "%d retries\n", retrycnt);
913 if (data->rix != IEEE80211_FIXED_RATE_NONE)
914 ieee80211_ratectl_tx_complete(vap, ni,
915 IEEE80211_RATECTL_TX_SUCCESS,
917 IFNET_STAT_INC(ifp, opackets, 1);
920 case RT2661_TX_RETRY_FAIL:
921 retrycnt = RT2661_TX_RETRYCNT(val);
923 DPRINTFN(sc, 9, "%s\n",
924 "sending data frame failed (too much retries)");
925 if (data->rix != IEEE80211_FIXED_RATE_NONE)
926 ieee80211_ratectl_tx_complete(vap, ni,
927 IEEE80211_RATECTL_TX_FAILURE,
929 IFNET_STAT_INC(ifp, oerrors, 1);
934 device_printf(sc->sc_dev,
935 "sending data frame failed 0x%08x\n", val);
936 IFNET_STAT_INC(ifp, oerrors, 1);
939 DPRINTFN(sc, 15, "tx done q=%d idx=%u\n", qid, txq->stat);
942 if (++txq->stat >= txq->count) /* faster than % count */
945 if (m->m_flags & M_TXCB)
946 ieee80211_process_callback(ni, m,
947 RT2661_TX_RESULT(val) != RT2661_TX_SUCCESS);
949 ieee80211_free_node(ni);
953 ifq_clr_oactive(&ifp->if_snd);
955 rt2661_start_locked(ifp);
959 rt2661_tx_dma_intr(struct rt2661_softc *sc, struct rt2661_tx_ring *txq)
961 struct rt2661_tx_desc *desc;
962 struct rt2661_tx_data *data;
964 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_POSTREAD);
967 desc = &txq->desc[txq->next];
968 data = &txq->data[txq->next];
970 if ((le32toh(desc->flags) & RT2661_TX_BUSY) ||
971 !(le32toh(desc->flags) & RT2661_TX_VALID))
974 bus_dmamap_sync(txq->data_dmat, data->map,
975 BUS_DMASYNC_POSTWRITE);
976 bus_dmamap_unload(txq->data_dmat, data->map);
978 /* descriptor is no longer valid */
979 desc->flags &= ~htole32(RT2661_TX_VALID);
981 DPRINTFN(sc, 15, "tx dma done q=%p idx=%u\n", txq, txq->next);
983 if (++txq->next >= txq->count) /* faster than % count */
987 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE);
991 rt2661_rx_intr(struct rt2661_softc *sc)
993 struct ifnet *ifp = sc->sc_ifp;
994 struct ieee80211com *ic = ifp->if_l2com;
995 struct rt2661_rx_desc *desc;
996 struct rt2661_rx_data *data;
998 struct ieee80211_frame *wh;
999 struct ieee80211_node *ni;
1000 struct mbuf *mnew, *m;
1003 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
1004 BUS_DMASYNC_POSTREAD);
1009 desc = &sc->rxq.desc[sc->rxq.cur];
1010 data = &sc->rxq.data[sc->rxq.cur];
1012 if (le32toh(desc->flags) & RT2661_RX_BUSY)
1015 if ((le32toh(desc->flags) & RT2661_RX_PHY_ERROR) ||
1016 (le32toh(desc->flags) & RT2661_RX_CRC_ERROR)) {
1018 * This should not happen since we did not request
1019 * to receive those frames when we filled TXRX_CSR0.
1021 DPRINTFN(sc, 5, "PHY or CRC error flags 0x%08x\n",
1022 le32toh(desc->flags));
1023 IFNET_STAT_INC(ifp, ierrors, 1);
1027 if ((le32toh(desc->flags) & RT2661_RX_CIPHER_MASK) != 0) {
1028 IFNET_STAT_INC(ifp, ierrors, 1);
1033 * Try to allocate a new mbuf for this ring element and load it
1034 * before processing the current mbuf. If the ring element
1035 * cannot be loaded, drop the received packet and reuse the old
1036 * mbuf. In the unlikely case that the old mbuf can't be
1037 * reloaded either, explicitly panic.
1039 mnew = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR);
1041 IFNET_STAT_INC(ifp, ierrors, 1);
1045 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
1046 BUS_DMASYNC_POSTREAD);
1047 bus_dmamap_unload(sc->rxq.data_dmat, data->map);
1049 error = bus_dmamap_load(sc->rxq.data_dmat, data->map,
1050 mtod(mnew, void *), MCLBYTES, rt2661_dma_map_addr,
1055 /* try to reload the old mbuf */
1056 error = bus_dmamap_load(sc->rxq.data_dmat, data->map,
1057 mtod(data->m, void *), MCLBYTES,
1058 rt2661_dma_map_addr, &physaddr, 0);
1060 /* very unlikely that it will fail... */
1061 panic("%s: could not load old rx mbuf",
1062 device_get_name(sc->sc_dev));
1064 IFNET_STAT_INC(ifp, ierrors, 1);
1069 * New mbuf successfully loaded, update Rx ring and continue
1074 desc->physaddr = htole32(physaddr);
1077 m->m_pkthdr.rcvif = ifp;
1078 m->m_pkthdr.len = m->m_len =
1079 (le32toh(desc->flags) >> 16) & 0xfff;
1081 rssi = rt2661_get_rssi(sc, desc->rssi);
1082 /* Error happened during RSSI conversion. */
1084 rssi = -30; /* XXX ignored by net80211 */
1085 nf = RT2661_NOISE_FLOOR;
1087 if (ieee80211_radiotap_active(ic)) {
1088 struct rt2661_rx_radiotap_header *tap = &sc->sc_rxtap;
1089 uint32_t tsf_lo, tsf_hi;
1091 /* get timestamp (low and high 32 bits) */
1092 tsf_hi = RAL_READ(sc, RT2661_TXRX_CSR13);
1093 tsf_lo = RAL_READ(sc, RT2661_TXRX_CSR12);
1096 htole64(((uint64_t)tsf_hi << 32) | tsf_lo);
1098 tap->wr_rate = ieee80211_plcp2rate(desc->rate,
1099 (desc->flags & htole32(RT2661_RX_OFDM)) ?
1100 IEEE80211_T_OFDM : IEEE80211_T_CCK);
1101 tap->wr_antsignal = nf + rssi;
1102 tap->wr_antnoise = nf;
1104 sc->sc_flags |= RAL_INPUT_RUNNING;
1105 wh = mtod(m, struct ieee80211_frame *);
1107 /* send the frame to the 802.11 layer */
1108 ni = ieee80211_find_rxnode(ic,
1109 (struct ieee80211_frame_min *)wh);
1111 (void) ieee80211_input(ni, m, rssi, nf);
1112 ieee80211_free_node(ni);
1114 (void) ieee80211_input_all(ic, m, rssi, nf);
1116 sc->sc_flags &= ~RAL_INPUT_RUNNING;
1118 skip: desc->flags |= htole32(RT2661_RX_BUSY);
1120 DPRINTFN(sc, 15, "rx intr idx=%u\n", sc->rxq.cur);
1122 sc->rxq.cur = (sc->rxq.cur + 1) % RT2661_RX_RING_COUNT;
1125 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
1126 BUS_DMASYNC_PREWRITE);
1131 rt2661_mcu_beacon_expire(struct rt2661_softc *sc)
1137 rt2661_mcu_wakeup(struct rt2661_softc *sc)
1139 RAL_WRITE(sc, RT2661_MAC_CSR11, 5 << 16);
1141 RAL_WRITE(sc, RT2661_SOFT_RESET_CSR, 0x7);
1142 RAL_WRITE(sc, RT2661_IO_CNTL_CSR, 0x18);
1143 RAL_WRITE(sc, RT2661_PCI_USEC_CSR, 0x20);
1145 /* send wakeup command to MCU */
1146 rt2661_tx_cmd(sc, RT2661_MCU_CMD_WAKEUP, 0);
1150 rt2661_mcu_cmd_intr(struct rt2661_softc *sc)
1152 RAL_READ(sc, RT2661_M2H_CMD_DONE_CSR);
1153 RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff);
1157 rt2661_intr(void *arg)
1159 struct rt2661_softc *sc = arg;
1160 struct ifnet *ifp = sc->sc_ifp;
1163 /* disable MAC and MCU interrupts */
1164 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffff7f);
1165 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff);
1167 /* don't re-enable interrupts if we're shutting down */
1168 if (!(ifp->if_flags & IFF_RUNNING)) {
1172 r1 = RAL_READ(sc, RT2661_INT_SOURCE_CSR);
1173 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, r1);
1175 r2 = RAL_READ(sc, RT2661_MCU_INT_SOURCE_CSR);
1176 RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, r2);
1178 if (r1 & RT2661_MGT_DONE)
1179 rt2661_tx_dma_intr(sc, &sc->mgtq);
1181 if (r1 & RT2661_RX_DONE)
1184 if (r1 & RT2661_TX0_DMA_DONE)
1185 rt2661_tx_dma_intr(sc, &sc->txq[0]);
1187 if (r1 & RT2661_TX1_DMA_DONE)
1188 rt2661_tx_dma_intr(sc, &sc->txq[1]);
1190 if (r1 & RT2661_TX2_DMA_DONE)
1191 rt2661_tx_dma_intr(sc, &sc->txq[2]);
1193 if (r1 & RT2661_TX3_DMA_DONE)
1194 rt2661_tx_dma_intr(sc, &sc->txq[3]);
1196 if (r1 & RT2661_TX_DONE)
1199 if (r2 & RT2661_MCU_CMD_DONE)
1200 rt2661_mcu_cmd_intr(sc);
1202 if (r2 & RT2661_MCU_BEACON_EXPIRE)
1203 rt2661_mcu_beacon_expire(sc);
1205 if (r2 & RT2661_MCU_WAKEUP)
1206 rt2661_mcu_wakeup(sc);
1208 /* re-enable MAC and MCU interrupts */
1209 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10);
1210 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0);
1215 rt2661_plcp_signal(int rate)
1218 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
1219 case 12: return 0xb;
1220 case 18: return 0xf;
1221 case 24: return 0xa;
1222 case 36: return 0xe;
1223 case 48: return 0x9;
1224 case 72: return 0xd;
1225 case 96: return 0x8;
1226 case 108: return 0xc;
1228 /* CCK rates (NB: not IEEE std, device-specific) */
1231 case 11: return 0x2;
1232 case 22: return 0x3;
1234 return 0xff; /* XXX unsupported/unknown rate */
1238 rt2661_setup_tx_desc(struct rt2661_softc *sc, struct rt2661_tx_desc *desc,
1239 uint32_t flags, uint16_t xflags, int len, int rate,
1240 const bus_dma_segment_t *segs, int nsegs, int ac)
1242 struct ifnet *ifp = sc->sc_ifp;
1243 struct ieee80211com *ic = ifp->if_l2com;
1244 uint16_t plcp_length;
1247 desc->flags = htole32(flags);
1248 desc->flags |= htole32(len << 16);
1249 desc->flags |= htole32(RT2661_TX_BUSY | RT2661_TX_VALID);
1251 desc->xflags = htole16(xflags);
1252 desc->xflags |= htole16(nsegs << 13);
1254 desc->wme = htole16(
1257 RT2661_LOGCWMIN(4) |
1258 RT2661_LOGCWMAX(10));
1261 * Remember in which queue this frame was sent. This field is driver
1262 * private data only. It will be made available by the NIC in STA_CSR4
1267 /* setup PLCP fields */
1268 desc->plcp_signal = rt2661_plcp_signal(rate);
1269 desc->plcp_service = 4;
1271 len += IEEE80211_CRC_LEN;
1272 if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) {
1273 desc->flags |= htole32(RT2661_TX_OFDM);
1275 plcp_length = len & 0xfff;
1276 desc->plcp_length_hi = plcp_length >> 6;
1277 desc->plcp_length_lo = plcp_length & 0x3f;
1279 plcp_length = (16 * len + rate - 1) / rate;
1281 remainder = (16 * len) % 22;
1282 if (remainder != 0 && remainder < 7)
1283 desc->plcp_service |= RT2661_PLCP_LENGEXT;
1285 desc->plcp_length_hi = plcp_length >> 8;
1286 desc->plcp_length_lo = plcp_length & 0xff;
1288 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1289 desc->plcp_signal |= 0x08;
1292 /* RT2x61 supports scatter with up to 5 segments */
1293 for (i = 0; i < nsegs; i++) {
1294 desc->addr[i] = htole32(segs[i].ds_addr);
1295 desc->len [i] = htole16(segs[i].ds_len);
1300 rt2661_tx_mgt(struct rt2661_softc *sc, struct mbuf *m0,
1301 struct ieee80211_node *ni)
1303 struct ieee80211vap *vap = ni->ni_vap;
1304 struct ieee80211com *ic = ni->ni_ic;
1305 struct rt2661_tx_desc *desc;
1306 struct rt2661_tx_data *data;
1307 struct ieee80211_frame *wh;
1308 struct ieee80211_key *k;
1309 bus_dma_segment_t segs[RT2661_MAX_SCATTER];
1311 uint32_t flags = 0; /* XXX HWSEQ */
1312 int nsegs, rate, error;
1314 desc = &sc->mgtq.desc[sc->mgtq.cur];
1315 data = &sc->mgtq.data[sc->mgtq.cur];
1317 rate = vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)].mgmtrate;
1319 wh = mtod(m0, struct ieee80211_frame *);
1321 if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1322 k = ieee80211_crypto_encap(ni, m0);
1329 error = bus_dmamap_load_mbuf_segment(sc->mgtq.data_dmat, data->map, m0,
1330 segs, 1, &nsegs, BUS_DMA_NOWAIT);
1332 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
1338 if (ieee80211_radiotap_active_vap(vap)) {
1339 struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap;
1342 tap->wt_rate = rate;
1344 ieee80211_radiotap_tx(vap, m0);
1349 /* management frames are not taken into account for amrr */
1350 data->rix = IEEE80211_FIXED_RATE_NONE;
1352 wh = mtod(m0, struct ieee80211_frame *);
1354 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1355 flags |= RT2661_TX_NEED_ACK;
1357 dur = ieee80211_ack_duration(ic->ic_rt,
1358 rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE);
1359 *(uint16_t *)wh->i_dur = htole16(dur);
1361 /* tell hardware to add timestamp in probe responses */
1363 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
1364 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP))
1365 flags |= RT2661_TX_TIMESTAMP;
1368 rt2661_setup_tx_desc(sc, desc, flags, 0 /* XXX HWSEQ */,
1369 m0->m_pkthdr.len, rate, segs, nsegs, RT2661_QID_MGT);
1371 bus_dmamap_sync(sc->mgtq.data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1372 bus_dmamap_sync(sc->mgtq.desc_dmat, sc->mgtq.desc_map,
1373 BUS_DMASYNC_PREWRITE);
1375 DPRINTFN(sc, 10, "sending mgt frame len=%u idx=%u rate=%u\n",
1376 m0->m_pkthdr.len, sc->mgtq.cur, rate);
1380 sc->mgtq.cur = (sc->mgtq.cur + 1) % RT2661_MGT_RING_COUNT;
1381 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, RT2661_KICK_MGT);
1387 rt2661_sendprot(struct rt2661_softc *sc, int ac,
1388 const struct mbuf *m, struct ieee80211_node *ni, int prot, int rate)
1390 struct ieee80211com *ic = ni->ni_ic;
1391 struct rt2661_tx_ring *txq = &sc->txq[ac];
1392 const struct ieee80211_frame *wh;
1393 struct rt2661_tx_desc *desc;
1394 struct rt2661_tx_data *data;
1396 int protrate, pktlen, flags, isshort, error;
1398 bus_dma_segment_t segs[RT2661_MAX_SCATTER];
1401 KASSERT(prot == IEEE80211_PROT_RTSCTS || prot == IEEE80211_PROT_CTSONLY,
1402 ("protection %d", prot));
1404 wh = mtod(m, const struct ieee80211_frame *);
1405 pktlen = m->m_pkthdr.len + IEEE80211_CRC_LEN;
1407 protrate = ieee80211_ctl_rate(ic->ic_rt, rate);
1408 ieee80211_ack_rate(ic->ic_rt, rate);
1410 isshort = (ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0;
1411 dur = ieee80211_compute_duration(ic->ic_rt, pktlen, rate, isshort)
1412 + ieee80211_ack_duration(ic->ic_rt, rate, isshort);
1413 flags = RT2661_TX_MORE_FRAG;
1414 if (prot == IEEE80211_PROT_RTSCTS) {
1415 /* NB: CTS is the same size as an ACK */
1416 dur += ieee80211_ack_duration(ic->ic_rt, rate, isshort);
1417 flags |= RT2661_TX_NEED_ACK;
1418 mprot = ieee80211_alloc_rts(ic, wh->i_addr1, wh->i_addr2, dur);
1420 mprot = ieee80211_alloc_cts(ic, ni->ni_vap->iv_myaddr, dur);
1422 if (mprot == NULL) {
1423 /* XXX stat + msg */
1427 data = &txq->data[txq->cur];
1428 desc = &txq->desc[txq->cur];
1430 error = bus_dmamap_load_mbuf_segment(txq->data_dmat, data->map, mprot, segs,
1431 1, &nsegs, BUS_DMA_NOWAIT);
1433 device_printf(sc->sc_dev,
1434 "could not map mbuf (error %d)\n", error);
1440 data->ni = ieee80211_ref_node(ni);
1441 /* ctl frames are not taken into account for amrr */
1442 data->rix = IEEE80211_FIXED_RATE_NONE;
1444 rt2661_setup_tx_desc(sc, desc, flags, 0, mprot->m_pkthdr.len,
1445 protrate, segs, 1, ac);
1447 bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1448 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE);
1451 txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT;
1457 rt2661_tx_data(struct rt2661_softc *sc, struct mbuf *m0,
1458 struct ieee80211_node *ni, int ac)
1460 struct ieee80211vap *vap = ni->ni_vap;
1461 struct ifnet *ifp = sc->sc_ifp;
1462 struct ieee80211com *ic = ifp->if_l2com;
1463 struct rt2661_tx_ring *txq = &sc->txq[ac];
1464 struct rt2661_tx_desc *desc;
1465 struct rt2661_tx_data *data;
1466 struct ieee80211_frame *wh;
1467 const struct ieee80211_txparam *tp;
1468 struct ieee80211_key *k;
1469 const struct chanAccParams *cap;
1471 bus_dma_segment_t segs[RT2661_MAX_SCATTER];
1474 int error, nsegs, rate, noack = 0;
1476 wh = mtod(m0, struct ieee80211_frame *);
1478 tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)];
1479 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1480 rate = tp->mcastrate;
1481 } else if (m0->m_flags & M_EAPOL) {
1482 rate = tp->mgmtrate;
1483 } else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) {
1484 rate = tp->ucastrate;
1486 ieee80211_ratectl_rate(ni, NULL, 0);
1487 rate = ni->ni_txrate;
1489 rate &= IEEE80211_RATE_VAL;
1491 if (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_QOS) {
1492 cap = &ic->ic_wme.wme_chanParams;
1493 noack = cap->cap_wmeParams[ac].wmep_noackPolicy;
1496 if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1497 k = ieee80211_crypto_encap(ni, m0);
1503 /* packet header may have moved, reset our local pointer */
1504 wh = mtod(m0, struct ieee80211_frame *);
1508 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1509 int prot = IEEE80211_PROT_NONE;
1510 if (m0->m_pkthdr.len + IEEE80211_CRC_LEN > vap->iv_rtsthreshold)
1511 prot = IEEE80211_PROT_RTSCTS;
1512 else if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
1513 ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM)
1514 prot = ic->ic_protmode;
1515 if (prot != IEEE80211_PROT_NONE) {
1516 error = rt2661_sendprot(sc, ac, m0, ni, prot, rate);
1521 flags |= RT2661_TX_LONG_RETRY | RT2661_TX_IFS;
1525 data = &txq->data[txq->cur];
1526 desc = &txq->desc[txq->cur];
1528 error = bus_dmamap_load_mbuf_segment(txq->data_dmat, data->map, m0, segs,
1529 1, &nsegs, BUS_DMA_NOWAIT);
1530 if (error != 0 && error != EFBIG) {
1531 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
1537 mnew = m_defrag(m0, MB_DONTWAIT);
1539 device_printf(sc->sc_dev,
1540 "could not defragment mbuf\n");
1546 error = bus_dmamap_load_mbuf_segment(txq->data_dmat, data->map, m0,
1547 segs, 1, &nsegs, BUS_DMA_NOWAIT);
1549 device_printf(sc->sc_dev,
1550 "could not map mbuf (error %d)\n", error);
1555 /* packet header have moved, reset our local pointer */
1556 wh = mtod(m0, struct ieee80211_frame *);
1559 if (ieee80211_radiotap_active_vap(vap)) {
1560 struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap;
1563 tap->wt_rate = rate;
1565 ieee80211_radiotap_tx(vap, m0);
1571 /* remember link conditions for rate adaptation algorithm */
1572 if (tp->ucastrate == IEEE80211_FIXED_RATE_NONE) {
1573 data->rix = ni->ni_txrate;
1574 /* XXX probably need last rssi value and not avg */
1575 data->rssi = ic->ic_node_getrssi(ni);
1577 data->rix = IEEE80211_FIXED_RATE_NONE;
1579 if (!noack && !IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1580 flags |= RT2661_TX_NEED_ACK;
1582 dur = ieee80211_ack_duration(ic->ic_rt,
1583 rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE);
1584 *(uint16_t *)wh->i_dur = htole16(dur);
1587 rt2661_setup_tx_desc(sc, desc, flags, 0, m0->m_pkthdr.len, rate, segs,
1590 bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1591 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE);
1593 DPRINTFN(sc, 10, "sending data frame len=%u idx=%u rate=%u\n",
1594 m0->m_pkthdr.len, txq->cur, rate);
1598 txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT;
1599 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 1 << ac);
1605 rt2661_start_locked(struct ifnet *ifp)
1607 struct rt2661_softc *sc = ifp->if_softc;
1609 struct ieee80211_node *ni;
1612 /* prevent management frames from being sent if we're not ready */
1613 if (!(ifp->if_flags & IFF_RUNNING) || sc->sc_invalid)
1617 m = ifq_dequeue(&ifp->if_snd);
1621 ac = M_WME_GETAC(m);
1622 if (sc->txq[ac].queued >= RT2661_TX_RING_COUNT - 1) {
1623 /* there is no place left in this ring */
1624 ifq_prepend(&ifp->if_snd, m);
1625 ifq_set_oactive(&ifp->if_snd);
1628 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
1629 if (rt2661_tx_data(sc, m, ni, ac) != 0) {
1630 ieee80211_free_node(ni);
1631 IFNET_STAT_INC(ifp, oerrors, 1);
1635 sc->sc_tx_timer = 5;
1640 rt2661_start(struct ifnet *ifp, struct ifaltq_subque *ifsq)
1642 ASSERT_ALTQ_SQ_DEFAULT(ifp, ifsq);
1643 rt2661_start_locked(ifp);
1647 rt2661_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
1648 const struct ieee80211_bpf_params *params)
1650 struct ieee80211com *ic = ni->ni_ic;
1651 struct ifnet *ifp = ic->ic_ifp;
1652 struct rt2661_softc *sc = ifp->if_softc;
1654 /* prevent management frames from being sent if we're not ready */
1655 if (!(ifp->if_flags & IFF_RUNNING)) {
1657 ieee80211_free_node(ni);
1660 if (sc->mgtq.queued >= RT2661_MGT_RING_COUNT) {
1661 ifq_set_oactive(&ifp->if_snd);
1663 ieee80211_free_node(ni);
1664 return ENOBUFS; /* XXX */
1667 IFNET_STAT_INC(ifp, opackets, 1);
1670 * Legacy path; interpret frame contents to decide
1671 * precisely how to send the frame.
1674 if (rt2661_tx_mgt(sc, m, ni) != 0)
1676 sc->sc_tx_timer = 5;
1680 IFNET_STAT_INC(ifp, oerrors, 1);
1681 ieee80211_free_node(ni);
1682 return EIO; /* XXX */
1686 rt2661_watchdog_callout(void *arg)
1688 struct rt2661_softc *sc = (struct rt2661_softc *)arg;
1689 struct ifnet *ifp = sc->sc_ifp;
1691 KASSERT(ifp->if_flags & IFF_RUNNING, ("not running"));
1693 if (sc->sc_invalid) /* card ejected */
1696 if (sc->sc_tx_timer > 0 && --sc->sc_tx_timer == 0) {
1697 if_printf(ifp, "device timeout\n");
1698 rt2661_init_locked(sc);
1699 IFNET_STAT_INC(ifp, oerrors, 1);
1700 /* NB: callout is reset in rt2661_init() */
1703 callout_reset(&sc->watchdog_ch, hz, rt2661_watchdog_callout, sc);
1708 rt2661_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *ucred)
1710 struct rt2661_softc *sc = ifp->if_softc;
1711 struct ieee80211com *ic = ifp->if_l2com;
1712 struct ifreq *ifr = (struct ifreq *) data;
1713 int error = 0, startall = 0;
1717 if (ifp->if_flags & IFF_UP) {
1718 if ((ifp->if_flags & IFF_RUNNING) == 0) {
1719 rt2661_init_locked(sc);
1722 rt2661_update_promisc(ifp);
1724 if (ifp->if_flags & IFF_RUNNING)
1725 rt2661_stop_locked(sc);
1728 ieee80211_start_all(ic);
1731 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd);
1734 error = ether_ioctl(ifp, cmd, data);
1744 rt2661_bbp_write(struct rt2661_softc *sc, uint8_t reg, uint8_t val)
1749 for (ntries = 0; ntries < 100; ntries++) {
1750 if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY))
1754 if (ntries == 100) {
1755 device_printf(sc->sc_dev, "could not write to BBP\n");
1759 tmp = RT2661_BBP_BUSY | (reg & 0x7f) << 8 | val;
1760 RAL_WRITE(sc, RT2661_PHY_CSR3, tmp);
1762 DPRINTFN(sc, 15, "BBP R%u <- 0x%02x\n", reg, val);
1766 rt2661_bbp_read(struct rt2661_softc *sc, uint8_t reg)
1771 for (ntries = 0; ntries < 100; ntries++) {
1772 if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY))
1776 if (ntries == 100) {
1777 device_printf(sc->sc_dev, "could not read from BBP\n");
1781 val = RT2661_BBP_BUSY | RT2661_BBP_READ | reg << 8;
1782 RAL_WRITE(sc, RT2661_PHY_CSR3, val);
1784 for (ntries = 0; ntries < 100; ntries++) {
1785 val = RAL_READ(sc, RT2661_PHY_CSR3);
1786 if (!(val & RT2661_BBP_BUSY))
1791 device_printf(sc->sc_dev, "could not read from BBP\n");
1796 rt2661_rf_write(struct rt2661_softc *sc, uint8_t reg, uint32_t val)
1801 for (ntries = 0; ntries < 100; ntries++) {
1802 if (!(RAL_READ(sc, RT2661_PHY_CSR4) & RT2661_RF_BUSY))
1806 if (ntries == 100) {
1807 device_printf(sc->sc_dev, "could not write to RF\n");
1811 tmp = RT2661_RF_BUSY | RT2661_RF_21BIT | (val & 0x1fffff) << 2 |
1813 RAL_WRITE(sc, RT2661_PHY_CSR4, tmp);
1815 /* remember last written value in sc */
1816 sc->rf_regs[reg] = val;
1818 DPRINTFN(sc, 15, "RF R[%u] <- 0x%05x\n", reg & 3, val & 0x1fffff);
1822 rt2661_tx_cmd(struct rt2661_softc *sc, uint8_t cmd, uint16_t arg)
1824 if (RAL_READ(sc, RT2661_H2M_MAILBOX_CSR) & RT2661_H2M_BUSY)
1825 return EIO; /* there is already a command pending */
1827 RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR,
1828 RT2661_H2M_BUSY | RT2661_TOKEN_NO_INTR << 16 | arg);
1830 RAL_WRITE(sc, RT2661_HOST_CMD_CSR, RT2661_KICK_CMD | cmd);
1836 rt2661_select_antenna(struct rt2661_softc *sc)
1838 uint8_t bbp4, bbp77;
1841 bbp4 = rt2661_bbp_read(sc, 4);
1842 bbp77 = rt2661_bbp_read(sc, 77);
1846 /* make sure Rx is disabled before switching antenna */
1847 tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
1848 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
1850 rt2661_bbp_write(sc, 4, bbp4);
1851 rt2661_bbp_write(sc, 77, bbp77);
1853 /* restore Rx filter */
1854 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
1858 * Enable multi-rate retries for frames sent at OFDM rates.
1859 * In 802.11b/g mode, allow fallback to CCK rates.
1862 rt2661_enable_mrr(struct rt2661_softc *sc)
1864 struct ifnet *ifp = sc->sc_ifp;
1865 struct ieee80211com *ic = ifp->if_l2com;
1868 tmp = RAL_READ(sc, RT2661_TXRX_CSR4);
1870 tmp &= ~RT2661_MRR_CCK_FALLBACK;
1871 if (!IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan))
1872 tmp |= RT2661_MRR_CCK_FALLBACK;
1873 tmp |= RT2661_MRR_ENABLED;
1875 RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp);
1879 rt2661_set_txpreamble(struct rt2661_softc *sc)
1881 struct ifnet *ifp = sc->sc_ifp;
1882 struct ieee80211com *ic = ifp->if_l2com;
1885 tmp = RAL_READ(sc, RT2661_TXRX_CSR4);
1887 tmp &= ~RT2661_SHORT_PREAMBLE;
1888 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
1889 tmp |= RT2661_SHORT_PREAMBLE;
1891 RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp);
1895 rt2661_set_basicrates(struct rt2661_softc *sc,
1896 const struct ieee80211_rateset *rs)
1898 #define RV(r) ((r) & IEEE80211_RATE_VAL)
1899 struct ifnet *ifp = sc->sc_ifp;
1900 struct ieee80211com *ic = ifp->if_l2com;
1905 for (i = 0; i < rs->rs_nrates; i++) {
1906 rate = rs->rs_rates[i];
1908 if (!(rate & IEEE80211_RATE_BASIC))
1912 * Find h/w rate index. We know it exists because the rate
1913 * set has already been negotiated.
1915 for (j = 0; ic->ic_sup_rates[IEEE80211_MODE_11G].rs_rates[j] != RV(rate); j++);
1920 RAL_WRITE(sc, RT2661_TXRX_CSR5, mask);
1922 DPRINTF(sc, "Setting basic rate mask to 0x%x\n", mask);
1927 * Reprogram MAC/BBP to switch to a new band. Values taken from the reference
1931 rt2661_select_band(struct rt2661_softc *sc, struct ieee80211_channel *c)
1933 uint8_t bbp17, bbp35, bbp96, bbp97, bbp98, bbp104;
1936 /* update all BBP registers that depend on the band */
1937 bbp17 = 0x20; bbp96 = 0x48; bbp104 = 0x2c;
1938 bbp35 = 0x50; bbp97 = 0x48; bbp98 = 0x48;
1939 if (IEEE80211_IS_CHAN_5GHZ(c)) {
1940 bbp17 += 0x08; bbp96 += 0x10; bbp104 += 0x0c;
1941 bbp35 += 0x10; bbp97 += 0x10; bbp98 += 0x10;
1943 if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) ||
1944 (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) {
1945 bbp17 += 0x10; bbp96 += 0x10; bbp104 += 0x10;
1948 rt2661_bbp_write(sc, 17, bbp17);
1949 rt2661_bbp_write(sc, 96, bbp96);
1950 rt2661_bbp_write(sc, 104, bbp104);
1952 if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) ||
1953 (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) {
1954 rt2661_bbp_write(sc, 75, 0x80);
1955 rt2661_bbp_write(sc, 86, 0x80);
1956 rt2661_bbp_write(sc, 88, 0x80);
1959 rt2661_bbp_write(sc, 35, bbp35);
1960 rt2661_bbp_write(sc, 97, bbp97);
1961 rt2661_bbp_write(sc, 98, bbp98);
1963 tmp = RAL_READ(sc, RT2661_PHY_CSR0);
1964 tmp &= ~(RT2661_PA_PE_2GHZ | RT2661_PA_PE_5GHZ);
1965 if (IEEE80211_IS_CHAN_2GHZ(c))
1966 tmp |= RT2661_PA_PE_2GHZ;
1968 tmp |= RT2661_PA_PE_5GHZ;
1969 RAL_WRITE(sc, RT2661_PHY_CSR0, tmp);
1973 rt2661_set_chan(struct rt2661_softc *sc, struct ieee80211_channel *c)
1975 struct ifnet *ifp = sc->sc_ifp;
1976 struct ieee80211com *ic = ifp->if_l2com;
1977 const struct rfprog *rfprog;
1978 uint8_t bbp3, bbp94 = RT2661_BBPR94_DEFAULT;
1982 chan = ieee80211_chan2ieee(ic, c);
1983 KASSERT(chan != 0 && chan != IEEE80211_CHAN_ANY, ("chan 0x%x", chan));
1985 /* select the appropriate RF settings based on what EEPROM says */
1986 rfprog = (sc->rfprog == 0) ? rt2661_rf5225_1 : rt2661_rf5225_2;
1988 /* find the settings for this channel (we know it exists) */
1989 for (i = 0; rfprog[i].chan != chan; i++);
1991 power = sc->txpow[i];
1995 } else if (power > 31) {
1996 bbp94 += power - 31;
2001 * If we are switching from the 2GHz band to the 5GHz band or
2002 * vice-versa, BBP registers need to be reprogrammed.
2004 if (c->ic_flags != sc->sc_curchan->ic_flags) {
2005 rt2661_select_band(sc, c);
2006 rt2661_select_antenna(sc);
2010 rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
2011 rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
2012 rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7);
2013 rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
2017 rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
2018 rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
2019 rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7 | 1);
2020 rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
2024 rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
2025 rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
2026 rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7);
2027 rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
2029 /* enable smart mode for MIMO-capable RFs */
2030 bbp3 = rt2661_bbp_read(sc, 3);
2032 bbp3 &= ~RT2661_SMART_MODE;
2033 if (sc->rf_rev == RT2661_RF_5325 || sc->rf_rev == RT2661_RF_2529)
2034 bbp3 |= RT2661_SMART_MODE;
2036 rt2661_bbp_write(sc, 3, bbp3);
2038 if (bbp94 != RT2661_BBPR94_DEFAULT)
2039 rt2661_bbp_write(sc, 94, bbp94);
2041 /* 5GHz radio needs a 1ms delay here */
2042 if (IEEE80211_IS_CHAN_5GHZ(c))
2047 rt2661_set_bssid(struct rt2661_softc *sc, const uint8_t *bssid)
2051 tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24;
2052 RAL_WRITE(sc, RT2661_MAC_CSR4, tmp);
2054 tmp = bssid[4] | bssid[5] << 8 | RT2661_ONE_BSSID << 16;
2055 RAL_WRITE(sc, RT2661_MAC_CSR5, tmp);
2059 rt2661_set_macaddr(struct rt2661_softc *sc, const uint8_t *addr)
2063 tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24;
2064 RAL_WRITE(sc, RT2661_MAC_CSR2, tmp);
2066 tmp = addr[4] | addr[5] << 8;
2067 RAL_WRITE(sc, RT2661_MAC_CSR3, tmp);
2071 rt2661_update_promisc(struct ifnet *ifp)
2073 struct rt2661_softc *sc = ifp->if_softc;
2076 tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
2078 tmp &= ~RT2661_DROP_NOT_TO_ME;
2079 if (!(ifp->if_flags & IFF_PROMISC))
2080 tmp |= RT2661_DROP_NOT_TO_ME;
2082 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
2084 DPRINTF(sc, "%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ?
2085 "entering" : "leaving");
2089 * Update QoS (802.11e) settings for each h/w Tx ring.
2092 rt2661_wme_update(struct ieee80211com *ic)
2094 struct rt2661_softc *sc = ic->ic_ifp->if_softc;
2095 const struct wmeParams *wmep;
2097 wmep = ic->ic_wme.wme_chanParams.cap_wmeParams;
2099 /* XXX: not sure about shifts. */
2100 /* XXX: the reference driver plays with AC_VI settings too. */
2103 RAL_WRITE(sc, RT2661_AC_TXOP_CSR0,
2104 wmep[WME_AC_BE].wmep_txopLimit << 16 |
2105 wmep[WME_AC_BK].wmep_txopLimit);
2106 RAL_WRITE(sc, RT2661_AC_TXOP_CSR1,
2107 wmep[WME_AC_VI].wmep_txopLimit << 16 |
2108 wmep[WME_AC_VO].wmep_txopLimit);
2111 RAL_WRITE(sc, RT2661_CWMIN_CSR,
2112 wmep[WME_AC_BE].wmep_logcwmin << 12 |
2113 wmep[WME_AC_BK].wmep_logcwmin << 8 |
2114 wmep[WME_AC_VI].wmep_logcwmin << 4 |
2115 wmep[WME_AC_VO].wmep_logcwmin);
2118 RAL_WRITE(sc, RT2661_CWMAX_CSR,
2119 wmep[WME_AC_BE].wmep_logcwmax << 12 |
2120 wmep[WME_AC_BK].wmep_logcwmax << 8 |
2121 wmep[WME_AC_VI].wmep_logcwmax << 4 |
2122 wmep[WME_AC_VO].wmep_logcwmax);
2125 RAL_WRITE(sc, RT2661_AIFSN_CSR,
2126 wmep[WME_AC_BE].wmep_aifsn << 12 |
2127 wmep[WME_AC_BK].wmep_aifsn << 8 |
2128 wmep[WME_AC_VI].wmep_aifsn << 4 |
2129 wmep[WME_AC_VO].wmep_aifsn);
2135 rt2661_update_slot(struct ifnet *ifp)
2137 struct rt2661_softc *sc = ifp->if_softc;
2138 struct ieee80211com *ic = ifp->if_l2com;
2142 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
2144 tmp = RAL_READ(sc, RT2661_MAC_CSR9);
2145 tmp = (tmp & ~0xff) | slottime;
2146 RAL_WRITE(sc, RT2661_MAC_CSR9, tmp);
2150 rt2661_get_rf(int rev)
2153 case RT2661_RF_5225: return "RT5225";
2154 case RT2661_RF_5325: return "RT5325 (MIMO XR)";
2155 case RT2661_RF_2527: return "RT2527";
2156 case RT2661_RF_2529: return "RT2529 (MIMO XR)";
2157 default: return "unknown";
2162 rt2661_read_eeprom(struct rt2661_softc *sc, uint8_t macaddr[IEEE80211_ADDR_LEN])
2167 /* read MAC address */
2168 val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC01);
2169 macaddr[0] = val & 0xff;
2170 macaddr[1] = val >> 8;
2172 val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC23);
2173 macaddr[2] = val & 0xff;
2174 macaddr[3] = val >> 8;
2176 val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC45);
2177 macaddr[4] = val & 0xff;
2178 macaddr[5] = val >> 8;
2180 val = rt2661_eeprom_read(sc, RT2661_EEPROM_ANTENNA);
2181 /* XXX: test if different from 0xffff? */
2182 sc->rf_rev = (val >> 11) & 0x1f;
2183 sc->hw_radio = (val >> 10) & 0x1;
2184 sc->rx_ant = (val >> 4) & 0x3;
2185 sc->tx_ant = (val >> 2) & 0x3;
2186 sc->nb_ant = val & 0x3;
2188 DPRINTF(sc, "RF revision=%d\n", sc->rf_rev);
2190 val = rt2661_eeprom_read(sc, RT2661_EEPROM_CONFIG2);
2191 sc->ext_5ghz_lna = (val >> 6) & 0x1;
2192 sc->ext_2ghz_lna = (val >> 4) & 0x1;
2194 DPRINTF(sc, "External 2GHz LNA=%d\nExternal 5GHz LNA=%d\n",
2195 sc->ext_2ghz_lna, sc->ext_5ghz_lna);
2197 val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_2GHZ_OFFSET);
2198 if ((val & 0xff) != 0xff)
2199 sc->rssi_2ghz_corr = (int8_t)(val & 0xff); /* signed */
2201 /* Only [-10, 10] is valid */
2202 if (sc->rssi_2ghz_corr < -10 || sc->rssi_2ghz_corr > 10)
2203 sc->rssi_2ghz_corr = 0;
2205 val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_5GHZ_OFFSET);
2206 if ((val & 0xff) != 0xff)
2207 sc->rssi_5ghz_corr = (int8_t)(val & 0xff); /* signed */
2209 /* Only [-10, 10] is valid */
2210 if (sc->rssi_5ghz_corr < -10 || sc->rssi_5ghz_corr > 10)
2211 sc->rssi_5ghz_corr = 0;
2213 /* adjust RSSI correction for external low-noise amplifier */
2214 if (sc->ext_2ghz_lna)
2215 sc->rssi_2ghz_corr -= 14;
2216 if (sc->ext_5ghz_lna)
2217 sc->rssi_5ghz_corr -= 14;
2219 DPRINTF(sc, "RSSI 2GHz corr=%d\nRSSI 5GHz corr=%d\n",
2220 sc->rssi_2ghz_corr, sc->rssi_5ghz_corr);
2222 val = rt2661_eeprom_read(sc, RT2661_EEPROM_FREQ_OFFSET);
2223 if ((val >> 8) != 0xff)
2224 sc->rfprog = (val >> 8) & 0x3;
2225 if ((val & 0xff) != 0xff)
2226 sc->rffreq = val & 0xff;
2228 DPRINTF(sc, "RF prog=%d\nRF freq=%d\n", sc->rfprog, sc->rffreq);
2230 /* read Tx power for all a/b/g channels */
2231 for (i = 0; i < 19; i++) {
2232 val = rt2661_eeprom_read(sc, RT2661_EEPROM_TXPOWER + i);
2233 sc->txpow[i * 2] = (int8_t)(val >> 8); /* signed */
2234 DPRINTF(sc, "Channel=%d Tx power=%d\n",
2235 rt2661_rf5225_1[i * 2].chan, sc->txpow[i * 2]);
2236 sc->txpow[i * 2 + 1] = (int8_t)(val & 0xff); /* signed */
2237 DPRINTF(sc, "Channel=%d Tx power=%d\n",
2238 rt2661_rf5225_1[i * 2 + 1].chan, sc->txpow[i * 2 + 1]);
2241 /* read vendor-specific BBP values */
2242 for (i = 0; i < 16; i++) {
2243 val = rt2661_eeprom_read(sc, RT2661_EEPROM_BBP_BASE + i);
2244 if (val == 0 || val == 0xffff)
2245 continue; /* skip invalid entries */
2246 sc->bbp_prom[i].reg = val >> 8;
2247 sc->bbp_prom[i].val = val & 0xff;
2248 DPRINTF(sc, "BBP R%d=%02x\n", sc->bbp_prom[i].reg,
2249 sc->bbp_prom[i].val);
2254 rt2661_bbp_init(struct rt2661_softc *sc)
2256 #define N(a) (sizeof (a) / sizeof ((a)[0]))
2260 /* wait for BBP to be ready */
2261 for (ntries = 0; ntries < 100; ntries++) {
2262 val = rt2661_bbp_read(sc, 0);
2263 if (val != 0 && val != 0xff)
2267 if (ntries == 100) {
2268 device_printf(sc->sc_dev, "timeout waiting for BBP\n");
2272 /* initialize BBP registers to default values */
2273 for (i = 0; i < N(rt2661_def_bbp); i++) {
2274 rt2661_bbp_write(sc, rt2661_def_bbp[i].reg,
2275 rt2661_def_bbp[i].val);
2278 /* write vendor-specific BBP values (from EEPROM) */
2279 for (i = 0; i < 16; i++) {
2280 if (sc->bbp_prom[i].reg == 0)
2282 rt2661_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
2290 rt2661_init_locked(struct rt2661_softc *sc)
2292 #define N(a) (sizeof (a) / sizeof ((a)[0]))
2293 struct ifnet *ifp = sc->sc_ifp;
2294 struct ieee80211com *ic = ifp->if_l2com;
2295 uint32_t tmp, sta[3];
2296 int i, error, ntries;
2298 if ((sc->sc_flags & RAL_FW_LOADED) == 0) {
2299 error = rt2661_load_microcode(sc);
2302 "%s: could not load 8051 microcode, error %d\n",
2306 sc->sc_flags |= RAL_FW_LOADED;
2309 rt2661_stop_locked(sc);
2311 /* initialize Tx rings */
2312 RAL_WRITE(sc, RT2661_AC1_BASE_CSR, sc->txq[1].physaddr);
2313 RAL_WRITE(sc, RT2661_AC0_BASE_CSR, sc->txq[0].physaddr);
2314 RAL_WRITE(sc, RT2661_AC2_BASE_CSR, sc->txq[2].physaddr);
2315 RAL_WRITE(sc, RT2661_AC3_BASE_CSR, sc->txq[3].physaddr);
2317 /* initialize Mgt ring */
2318 RAL_WRITE(sc, RT2661_MGT_BASE_CSR, sc->mgtq.physaddr);
2320 /* initialize Rx ring */
2321 RAL_WRITE(sc, RT2661_RX_BASE_CSR, sc->rxq.physaddr);
2323 /* initialize Tx rings sizes */
2324 RAL_WRITE(sc, RT2661_TX_RING_CSR0,
2325 RT2661_TX_RING_COUNT << 24 |
2326 RT2661_TX_RING_COUNT << 16 |
2327 RT2661_TX_RING_COUNT << 8 |
2328 RT2661_TX_RING_COUNT);
2330 RAL_WRITE(sc, RT2661_TX_RING_CSR1,
2331 RT2661_TX_DESC_WSIZE << 16 |
2332 RT2661_TX_RING_COUNT << 8 | /* XXX: HCCA ring unused */
2333 RT2661_MGT_RING_COUNT);
2335 /* initialize Rx rings */
2336 RAL_WRITE(sc, RT2661_RX_RING_CSR,
2337 RT2661_RX_DESC_BACK << 16 |
2338 RT2661_RX_DESC_WSIZE << 8 |
2339 RT2661_RX_RING_COUNT);
2341 /* XXX: some magic here */
2342 RAL_WRITE(sc, RT2661_TX_DMA_DST_CSR, 0xaa);
2344 /* load base addresses of all 5 Tx rings (4 data + 1 mgt) */
2345 RAL_WRITE(sc, RT2661_LOAD_TX_RING_CSR, 0x1f);
2347 /* load base address of Rx ring */
2348 RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 2);
2350 /* initialize MAC registers to default values */
2351 for (i = 0; i < N(rt2661_def_mac); i++)
2352 RAL_WRITE(sc, rt2661_def_mac[i].reg, rt2661_def_mac[i].val);
2354 rt2661_set_macaddr(sc, IF_LLADDR(ifp));
2356 /* set host ready */
2357 RAL_WRITE(sc, RT2661_MAC_CSR1, 3);
2358 RAL_WRITE(sc, RT2661_MAC_CSR1, 0);
2360 /* wait for BBP/RF to wakeup */
2361 for (ntries = 0; ntries < 1000; ntries++) {
2362 if (RAL_READ(sc, RT2661_MAC_CSR12) & 8)
2366 if (ntries == 1000) {
2367 kprintf("timeout waiting for BBP/RF to wakeup\n");
2368 rt2661_stop_locked(sc);
2372 if (rt2661_bbp_init(sc) != 0) {
2373 rt2661_stop_locked(sc);
2377 /* select default channel */
2378 sc->sc_curchan = ic->ic_curchan;
2379 rt2661_select_band(sc, sc->sc_curchan);
2380 rt2661_select_antenna(sc);
2381 rt2661_set_chan(sc, sc->sc_curchan);
2383 /* update Rx filter */
2384 tmp = RAL_READ(sc, RT2661_TXRX_CSR0) & 0xffff;
2386 tmp |= RT2661_DROP_PHY_ERROR | RT2661_DROP_CRC_ERROR;
2387 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2388 tmp |= RT2661_DROP_CTL | RT2661_DROP_VER_ERROR |
2390 if (ic->ic_opmode != IEEE80211_M_HOSTAP &&
2391 ic->ic_opmode != IEEE80211_M_MBSS)
2392 tmp |= RT2661_DROP_TODS;
2393 if (!(ifp->if_flags & IFF_PROMISC))
2394 tmp |= RT2661_DROP_NOT_TO_ME;
2397 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
2399 /* clear STA registers */
2400 RAL_READ_REGION_4(sc, RT2661_STA_CSR0, sta, N(sta));
2402 /* initialize ASIC */
2403 RAL_WRITE(sc, RT2661_MAC_CSR1, 4);
2405 /* clear any pending interrupt */
2406 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff);
2408 /* enable interrupts */
2409 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10);
2410 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0);
2413 RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 1);
2415 ifq_clr_oactive(&ifp->if_snd);
2416 ifp->if_flags |= IFF_RUNNING;
2418 callout_reset(&sc->watchdog_ch, hz, rt2661_watchdog_callout, sc);
2423 rt2661_init(void *priv)
2425 struct rt2661_softc *sc = priv;
2426 struct ifnet *ifp = sc->sc_ifp;
2427 struct ieee80211com *ic = ifp->if_l2com;
2429 rt2661_init_locked(sc);
2431 if (ifp->if_flags & IFF_RUNNING)
2432 ieee80211_start_all(ic); /* start all vap's */
2436 rt2661_stop_locked(struct rt2661_softc *sc)
2438 struct ifnet *ifp = sc->sc_ifp;
2440 volatile int *flags = &sc->sc_flags;
2442 while (*flags & RAL_INPUT_RUNNING)
2443 zsleep(sc, &wlan_global_serializer, 0, "ralrunning", hz/10);
2445 callout_stop(&sc->watchdog_ch);
2446 sc->sc_tx_timer = 0;
2448 if (ifp->if_flags & IFF_RUNNING) {
2449 ifp->if_flags &= ~IFF_RUNNING;
2450 ifq_clr_oactive(&ifp->if_snd);
2452 /* abort Tx (for all 5 Tx rings) */
2453 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 0x1f << 16);
2455 /* disable Rx (value remains after reset!) */
2456 tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
2457 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
2460 RAL_WRITE(sc, RT2661_MAC_CSR1, 3);
2461 RAL_WRITE(sc, RT2661_MAC_CSR1, 0);
2463 /* disable interrupts */
2464 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffffff);
2465 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff);
2467 /* clear any pending interrupt */
2468 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff);
2469 RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, 0xffffffff);
2471 /* reset Tx and Rx rings */
2472 rt2661_reset_tx_ring(sc, &sc->txq[0]);
2473 rt2661_reset_tx_ring(sc, &sc->txq[1]);
2474 rt2661_reset_tx_ring(sc, &sc->txq[2]);
2475 rt2661_reset_tx_ring(sc, &sc->txq[3]);
2476 rt2661_reset_tx_ring(sc, &sc->mgtq);
2477 rt2661_reset_rx_ring(sc, &sc->rxq);
2482 rt2661_stop(void *priv)
2484 struct rt2661_softc *sc = priv;
2486 rt2661_stop_locked(sc);
2490 rt2661_load_microcode(struct rt2661_softc *sc)
2492 struct ifnet *ifp = sc->sc_ifp;
2493 const struct firmware *fp;
2494 const char *imagename;
2497 switch (sc->sc_id) {
2498 case 0x0301: imagename = "rt2561sfw"; break;
2499 case 0x0302: imagename = "rt2561fw"; break;
2500 case 0x0401: imagename = "rt2661fw"; break;
2502 if_printf(ifp, "%s: unexpected pci device id 0x%x, "
2503 "don't know how to retrieve firmware\n",
2504 __func__, sc->sc_id);
2508 wlan_assert_serialized();
2509 wlan_serialize_exit();
2510 fp = firmware_get(imagename);
2511 wlan_serialize_enter();
2514 if_printf(ifp, "%s: unable to retrieve firmware image %s\n",
2515 __func__, imagename);
2520 * Load 8051 microcode into NIC.
2523 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET);
2525 /* cancel any pending Host to MCU command */
2526 RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR, 0);
2527 RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff);
2528 RAL_WRITE(sc, RT2661_HOST_CMD_CSR, 0);
2530 /* write 8051's microcode */
2531 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET | RT2661_MCU_SEL);
2532 RAL_WRITE_REGION_1(sc, RT2661_MCU_CODE_BASE, fp->data, fp->datasize);
2533 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET);
2535 /* kick 8051's ass */
2536 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, 0);
2538 /* wait for 8051 to initialize */
2539 for (ntries = 0; ntries < 500; ntries++) {
2540 if (RAL_READ(sc, RT2661_MCU_CNTL_CSR) & RT2661_MCU_READY)
2544 if (ntries == 500) {
2545 if_printf(ifp, "%s: timeout waiting for MCU to initialize\n",
2551 firmware_put(fp, FIRMWARE_UNLOAD);
2557 * Dynamically tune Rx sensitivity (BBP register 17) based on average RSSI and
2558 * false CCA count. This function is called periodically (every seconds) when
2559 * in the RUN state. Values taken from the reference driver.
2562 rt2661_rx_tune(struct rt2661_softc *sc)
2569 * Tuning range depends on operating band and on the presence of an
2570 * external low-noise amplifier.
2573 if (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan))
2575 if ((IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan) && sc->ext_2ghz_lna) ||
2576 (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan) && sc->ext_5ghz_lna))
2580 /* retrieve false CCA count since last call (clear on read) */
2581 cca = RAL_READ(sc, RT2661_STA_CSR1) & 0xffff;
2585 } else if (dbm >= -58) {
2587 } else if (dbm >= -66) {
2589 } else if (dbm >= -74) {
2592 /* RSSI < -74dBm, tune using false CCA count */
2594 bbp17 = sc->bbp17; /* current value */
2596 hi -= 2 * (-74 - dbm);
2603 } else if (cca > 512) {
2606 } else if (cca < 100) {
2612 if (bbp17 != sc->bbp17) {
2613 rt2661_bbp_write(sc, 17, bbp17);
2619 * Enter/Leave radar detection mode.
2620 * This is for 802.11h additional regulatory domains.
2623 rt2661_radar_start(struct rt2661_softc *sc)
2628 tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
2629 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
2631 rt2661_bbp_write(sc, 82, 0x20);
2632 rt2661_bbp_write(sc, 83, 0x00);
2633 rt2661_bbp_write(sc, 84, 0x40);
2635 /* save current BBP registers values */
2636 sc->bbp18 = rt2661_bbp_read(sc, 18);
2637 sc->bbp21 = rt2661_bbp_read(sc, 21);
2638 sc->bbp22 = rt2661_bbp_read(sc, 22);
2639 sc->bbp16 = rt2661_bbp_read(sc, 16);
2640 sc->bbp17 = rt2661_bbp_read(sc, 17);
2641 sc->bbp64 = rt2661_bbp_read(sc, 64);
2643 rt2661_bbp_write(sc, 18, 0xff);
2644 rt2661_bbp_write(sc, 21, 0x3f);
2645 rt2661_bbp_write(sc, 22, 0x3f);
2646 rt2661_bbp_write(sc, 16, 0xbd);
2647 rt2661_bbp_write(sc, 17, sc->ext_5ghz_lna ? 0x44 : 0x34);
2648 rt2661_bbp_write(sc, 64, 0x21);
2650 /* restore Rx filter */
2651 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
2655 rt2661_radar_stop(struct rt2661_softc *sc)
2659 /* read radar detection result */
2660 bbp66 = rt2661_bbp_read(sc, 66);
2662 /* restore BBP registers values */
2663 rt2661_bbp_write(sc, 16, sc->bbp16);
2664 rt2661_bbp_write(sc, 17, sc->bbp17);
2665 rt2661_bbp_write(sc, 18, sc->bbp18);
2666 rt2661_bbp_write(sc, 21, sc->bbp21);
2667 rt2661_bbp_write(sc, 22, sc->bbp22);
2668 rt2661_bbp_write(sc, 64, sc->bbp64);
2675 rt2661_prepare_beacon(struct rt2661_softc *sc, struct ieee80211vap *vap)
2677 struct ieee80211com *ic = vap->iv_ic;
2678 struct ieee80211_beacon_offsets bo;
2679 struct rt2661_tx_desc desc;
2683 m0 = ieee80211_beacon_alloc(vap->iv_bss, &bo);
2685 device_printf(sc->sc_dev, "could not allocate beacon frame\n");
2689 /* send beacons at the lowest available rate */
2690 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan) ? 12 : 2;
2692 rt2661_setup_tx_desc(sc, &desc, RT2661_TX_TIMESTAMP, RT2661_TX_HWSEQ,
2693 m0->m_pkthdr.len, rate, NULL, 0, RT2661_QID_MGT);
2695 /* copy the first 24 bytes of Tx descriptor into NIC memory */
2696 RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0, (uint8_t *)&desc, 24);
2698 /* copy beacon header and payload into NIC memory */
2699 RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0 + 24,
2700 mtod(m0, uint8_t *), m0->m_pkthdr.len);
2708 * Enable TSF synchronization and tell h/w to start sending beacons for IBSS
2709 * and HostAP operating modes.
2712 rt2661_enable_tsf_sync(struct rt2661_softc *sc)
2714 struct ifnet *ifp = sc->sc_ifp;
2715 struct ieee80211com *ic = ifp->if_l2com;
2716 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
2719 if (vap->iv_opmode != IEEE80211_M_STA) {
2721 * Change default 16ms TBTT adjustment to 8ms.
2722 * Must be done before enabling beacon generation.
2724 RAL_WRITE(sc, RT2661_TXRX_CSR10, 1 << 12 | 8);
2727 tmp = RAL_READ(sc, RT2661_TXRX_CSR9) & 0xff000000;
2729 /* set beacon interval (in 1/16ms unit) */
2730 tmp |= vap->iv_bss->ni_intval * 16;
2732 tmp |= RT2661_TSF_TICKING | RT2661_ENABLE_TBTT;
2733 if (vap->iv_opmode == IEEE80211_M_STA)
2734 tmp |= RT2661_TSF_MODE(1);
2736 tmp |= RT2661_TSF_MODE(2) | RT2661_GENERATE_BEACON;
2738 RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp);
2742 rt2661_enable_tsf(struct rt2661_softc *sc)
2744 RAL_WRITE(sc, RT2661_TXRX_CSR9,
2745 (RAL_READ(sc, RT2661_TXRX_CSR9) & 0xff000000)
2746 | RT2661_TSF_TICKING | RT2661_TSF_MODE(2));
2750 * Retrieve the "Received Signal Strength Indicator" from the raw values
2751 * contained in Rx descriptors. The computation depends on which band the
2752 * frame was received. Correction values taken from the reference driver.
2755 rt2661_get_rssi(struct rt2661_softc *sc, uint8_t raw)
2759 lna = (raw >> 5) & 0x3;
2764 * No mapping available.
2766 * NB: Since RSSI is relative to noise floor, -1 is
2767 * adequate for caller to know error happened.
2772 rssi = (2 * agc) - RT2661_NOISE_FLOOR;
2774 if (IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan)) {
2775 rssi += sc->rssi_2ghz_corr;
2784 rssi += sc->rssi_5ghz_corr;
2797 rt2661_scan_start(struct ieee80211com *ic)
2799 struct ifnet *ifp = ic->ic_ifp;
2800 struct rt2661_softc *sc = ifp->if_softc;
2803 /* abort TSF synchronization */
2804 tmp = RAL_READ(sc, RT2661_TXRX_CSR9);
2805 RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0xffffff);
2806 rt2661_set_bssid(sc, ifp->if_broadcastaddr);
2810 rt2661_scan_end(struct ieee80211com *ic)
2812 struct ifnet *ifp = ic->ic_ifp;
2813 struct rt2661_softc *sc = ifp->if_softc;
2814 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
2816 rt2661_enable_tsf_sync(sc);
2817 /* XXX keep local copy */
2818 rt2661_set_bssid(sc, vap->iv_bss->ni_bssid);
2822 rt2661_set_channel(struct ieee80211com *ic)
2824 struct ifnet *ifp = ic->ic_ifp;
2825 struct rt2661_softc *sc = ifp->if_softc;
2827 rt2661_set_chan(sc, ic->ic_curchan);