2 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
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6 * modification, are permitted provided that the following conditions
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29 * $FreeBSD: head/sys/dev/ath/ah_osdep.c 196970 2009-09-08 13:19:05Z phk $
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/kernel.h>
36 #include <sys/module.h>
37 #include <sys/sysctl.h>
39 #include <sys/malloc.h>
43 #include <net/if_media.h>
44 #include <net/if_arp.h>
46 #include <machine/stdarg.h>
48 #include <netproto/802_11/ieee80211_var.h>
50 #include <dev/netif/ath/hal/ath_hal/ah.h>
53 * WiSoC boards overload the bus tag with information about the
54 * board layout. We must extract the bus space tag from that
55 * indirect structure. For everyone else the tag is passed in
57 * XXX cache indirect ref privately
59 #ifdef AH_SUPPORT_AR5312
61 ((bus_space_tag_t) ((struct ar531x_config *)((ah)->ah_st))->tag)
63 #define BUSTAG(ah) ((ah)->ah_st)
66 extern void ath_hal_printf(struct ath_hal *, const char*, ...)
68 extern void ath_hal_vprintf(struct ath_hal *, const char*, __va_list)
70 extern const char* ath_hal_ether_sprintf(const u_int8_t *mac);
71 extern void *ath_hal_malloc(size_t);
72 extern void ath_hal_free(void *);
74 extern void ath_hal_assert_failed(const char* filename,
75 int lineno, const char* msg);
78 extern void HALDEBUG(struct ath_hal *ah, u_int mask, const char* fmt, ...);
81 /* NB: put this here instead of the driver to avoid circular references */
82 SYSCTL_NODE(_hw, OID_AUTO, ath, CTLFLAG_RD, 0, "Atheros driver parameters");
83 SYSCTL_NODE(_hw_ath, OID_AUTO, hal, CTLFLAG_RD, 0, "Atheros HAL parameters");
86 static int ath_hal_debug = 0xffffffff;
87 SYSCTL_INT(_hw_ath_hal, OID_AUTO, debug, CTLFLAG_RW, &ath_hal_debug,
88 0, "Atheros HAL debugging printfs");
89 TUNABLE_INT("hw.ath.hal.debug", &ath_hal_debug);
92 /* NB: these are deprecated; they exist for now for compatibility */
93 int ath_hal_dma_beacon_response_time = 2; /* in TU's */
94 SYSCTL_INT(_hw_ath_hal, OID_AUTO, dma_brt, CTLFLAG_RW,
95 &ath_hal_dma_beacon_response_time, 0,
96 "Atheros HAL DMA beacon response time");
97 int ath_hal_sw_beacon_response_time = 10; /* in TU's */
98 SYSCTL_INT(_hw_ath_hal, OID_AUTO, sw_brt, CTLFLAG_RW,
99 &ath_hal_sw_beacon_response_time, 0,
100 "Atheros HAL software beacon response time");
101 int ath_hal_additional_swba_backoff = 0; /* in TU's */
102 SYSCTL_INT(_hw_ath_hal, OID_AUTO, swba_backoff, CTLFLAG_RW,
103 &ath_hal_additional_swba_backoff, 0,
104 "Atheros HAL additional SWBA backoff time");
106 MALLOC_DEFINE(M_ATH_HAL, "ath_hal", "ath hal data");
109 ath_hal_malloc(size_t size)
111 return kmalloc(size, M_ATH_HAL, M_NOWAIT | M_ZERO);
115 ath_hal_free(void* p)
121 ath_hal_vprintf(struct ath_hal *ah, const char* fmt, __va_list ap)
127 ath_hal_printf(struct ath_hal *ah, const char* fmt, ...)
131 ath_hal_vprintf(ah, fmt, ap);
136 ath_hal_ether_sprintf(const u_int8_t *mac)
138 static char etherbuf[18];
140 ksnprintf(etherbuf, sizeof(etherbuf), "%6D", mac, ":");
146 HALDEBUG(struct ath_hal *ah, u_int mask, const char* fmt, ...)
148 if (ath_hal_debug & mask) {
151 ath_hal_vprintf(ah, fmt, ap);
155 #endif /* AH_DEBUG */
159 * ALQ register tracing support.
161 * Setting hw.ath.hal.alq=1 enables tracing of all register reads and
162 * writes to the file /tmp/ath_hal.log. The file format is a simple
163 * fixed-size array of records. When done logging set hw.ath.hal.alq=0
164 * and then decode the file with the arcode program (that is part of the
165 * HAL). If you start+stop tracing the data will be appended to an
168 * NB: doesn't handle multiple devices properly; only one DEVICE record
169 * is emitted and the different devices are not identified.
172 #include <sys/pcpu.h>
173 #include <dev/netif/ath/hal/ath_hal/ah_decode.h>
175 static struct alq *ath_hal_alq;
176 static int ath_hal_alq_emitdev; /* need to emit DEVICE record */
177 static u_int ath_hal_alq_lost; /* count of lost records */
178 static const char *ath_hal_logfile = "/tmp/ath_hal.log";
179 static u_int ath_hal_alq_qsize = 64*1024;
182 ath_hal_setlogging(int enable)
187 error = alq_open(&ath_hal_alq, ath_hal_logfile,
188 curthread->td_ucred, ALQ_DEFAULT_CMODE,
189 sizeof (struct athregrec), ath_hal_alq_qsize);
190 ath_hal_alq_lost = 0;
191 ath_hal_alq_emitdev = 1;
192 printf("ath_hal: logging to %s enabled\n",
196 alq_close(ath_hal_alq);
198 printf("ath_hal: logging disabled\n");
205 sysctl_hw_ath_hal_log(SYSCTL_HANDLER_ARGS)
209 wlan_serialize_enter();
210 enable = (ath_hal_alq != NULL);
211 error = sysctl_handle_int(oidp, &enable, 0, req);
212 if (error == 0 && req->newptr)
213 error = ath_hal_setlogging(enable);
214 wlan_serialize_exit();
217 SYSCTL_PROC(_hw_ath_hal, OID_AUTO, alq, CTLTYPE_INT|CTLFLAG_RW,
218 0, 0, sysctl_hw_ath_hal_log, "I", "Enable HAL register logging");
219 SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_size, CTLFLAG_RW,
220 &ath_hal_alq_qsize, 0, "In-memory log size (#records)");
221 SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_lost, CTLFLAG_RW,
222 &ath_hal_alq_lost, 0, "Register operations not logged");
225 ath_hal_alq_get(struct ath_hal *ah)
229 if (ath_hal_alq_emitdev) {
230 ale = alq_get(ath_hal_alq, ALQ_NOWAIT);
232 struct athregrec *r =
233 (struct athregrec *) ale->ae_data;
236 r->val = ah->ah_devid;
237 alq_post(ath_hal_alq, ale);
238 ath_hal_alq_emitdev = 0;
242 ale = alq_get(ath_hal_alq, ALQ_NOWAIT);
249 ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val)
251 bus_space_tag_t tag = BUSTAG(ah);
252 bus_space_handle_t h = ah->ah_sh;
255 struct ale *ale = ath_hal_alq_get(ah);
257 struct athregrec *r = (struct athregrec *) ale->ae_data;
261 alq_post(ath_hal_alq, ale);
264 #if _BYTE_ORDER == _BIG_ENDIAN
265 if (OS_REG_UNSWAPPED(reg))
266 bus_space_write_4(tag, h, reg, val);
269 bus_space_write_stream_4(tag, h, reg, val);
273 ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg)
275 bus_space_tag_t tag = BUSTAG(ah);
276 bus_space_handle_t h = ah->ah_sh;
279 #if _BYTE_ORDER == _BIG_ENDIAN
280 if (OS_REG_UNSWAPPED(reg))
281 val = bus_space_read_4(tag, h, reg);
284 val = bus_space_read_stream_4(tag, h, reg);
286 struct ale *ale = ath_hal_alq_get(ah);
288 struct athregrec *r = (struct athregrec *) ale->ae_data;
292 alq_post(ath_hal_alq, ale);
299 OS_MARK(struct ath_hal *ah, u_int id, u_int32_t v)
302 struct ale *ale = ath_hal_alq_get(ah);
304 struct athregrec *r = (struct athregrec *) ale->ae_data;
308 alq_post(ath_hal_alq, ale);
312 #elif defined(AH_DEBUG) || defined(AH_REGOPS_FUNC)
314 * Memory-mapped device register read/write. These are here
315 * as routines when debugging support is enabled and/or when
316 * explicitly configured to use function calls. The latter is
317 * for architectures that might need to do something before
318 * referencing memory (e.g. remap an i/o window).
320 * NB: see the comments in ah_osdep.h about byte-swapping register
321 * reads and writes to understand what's going on below.
325 ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val)
327 bus_space_tag_t tag = BUSTAG(ah);
328 bus_space_handle_t h = ah->ah_sh;
330 #if _BYTE_ORDER == _BIG_ENDIAN
331 if (OS_REG_UNSWAPPED(reg))
332 bus_space_write_4(tag, h, reg, val);
335 bus_space_write_stream_4(tag, h, reg, val);
339 ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg)
341 bus_space_tag_t tag = BUSTAG(ah);
342 bus_space_handle_t h = ah->ah_sh;
345 #if _BYTE_ORDER == _BIG_ENDIAN
346 if (OS_REG_UNSWAPPED(reg))
347 val = bus_space_read_4(tag, h, reg);
350 val = bus_space_read_stream_4(tag, h, reg);
353 #endif /* AH_DEBUG || AH_REGOPS_FUNC */
357 ath_hal_assert_failed(const char* filename, int lineno, const char *msg)
359 printf("Atheros HAL assertion failure: %s: line %u: %s\n",
360 filename, lineno, msg);
361 panic("ath_hal_assert");
363 #endif /* AH_ASSERT */
369 ath_hal_modevent(module_t mod, int type, void *unused)
373 wlan_serialize_enter();
386 wlan_serialize_exit();
390 static moduledata_t ath_hal_mod = {
396 DECLARE_MODULE(ath_hal, ath_hal_mod, SI_SUB_DRIVERS, SI_ORDER_ANY);
397 MODULE_VERSION(ath_hal, 1);