2 * Copyright (c) 2006 The DragonFly Project. All rights reserved.
4 * This code is derived from software contributed to The DragonFly Project
5 * by Sepherosa Ziehau <sepherosa@gmail.com>
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * 3. Neither the name of The DragonFly Project nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific, prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
24 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
25 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
27 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
29 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * $DragonFly: src/sys/dev/netif/acx/if_acx.c,v 1.2 2006/05/18 13:51:45 sephe Exp $
38 * Copyright (c) 2003-2004 wlan.kewl.org Project
39 * All rights reserved.
41 * $Id: LICENSE,v 1.1.1.1 2004/07/01 12:20:39 darron Exp $
43 * Redistribution and use in source and binary forms, with or without
44 * modification, are permitted provided that the following conditions
47 * 1. Redistributions of source code must retain the above copyright
48 * notice, this list of conditions and the following disclaimer.
50 * 2. Redistributions in binary form must reproduce the above copyright
51 * notice, this list of conditions and the following disclaimer in the
52 * documentation and/or other materials provided with the distribution.
54 * 3. All advertising materials mentioning features or use of this software
55 * must display the following acknowledgement:
57 * This product includes software developed by the wlan.kewl.org Project.
59 * 4. Neither the name of the wlan.kewl.org Project nor the names of its
60 * contributors may be used to endorse or promote products derived from
61 * this software without specific prior written permission.
63 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
64 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
65 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
66 * THE wlan.kewl.org Project BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
67 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
68 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
69 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
70 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
71 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
72 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
75 #include <sys/param.h>
76 #include <sys/endian.h>
77 #include <sys/kernel.h>
79 #include <sys/malloc.h>
82 #include <sys/serialize.h>
83 #include <sys/socket.h>
84 #include <sys/sockio.h>
85 #include <sys/sysctl.h>
87 #include <machine/bus.h>
88 #include <machine/resource.h>
90 #include <net/ethernet.h>
93 #include <net/if_arp.h>
94 #include <net/if_dl.h>
95 #include <net/if_media.h>
96 #include <net/ifq_var.h>
98 #include <netproto/802_11/ieee80211_var.h>
100 #include <bus/pci/pcireg.h>
101 #include <bus/pci/pcivar.h>
102 #include <bus/pci/pcidevs.h>
106 #include "if_acxreg.h"
107 #include "if_acxvar.h"
110 #define ACX_ENABLE_TXCHAN(sc, chan) \
112 if (acx_enable_txchan((sc), (chan)) != 0) { \
113 if_printf(&(sc)->sc_ic.ic_if, \
114 "enable TX on channel %d failed\n", (chan)); \
118 #define ACX_ENABLE_RXCHAN(sc, chan) \
120 if (acx_enable_rxchan((sc), (chan)) != 0) { \
121 if_printf(&(sc)->sc_ic.ic_if, \
122 "enable RX on channel %d failed\n", (chan)); \
126 #define SIOCSLOADFW _IOW('i', 137, struct ifreq) /* load firmware */
127 #define SIOCGRADIO _IOW('i', 138, struct ifreq) /* get radio type */
128 #define SIOCGSTATS _IOW('i', 139, struct ifreq) /* get acx stats */
129 #define SIOCSKILLFW _IOW('i', 140, struct ifreq) /* free firmware */
130 #define SIOCGFWVER _IOW('i', 141, struct ifreq) /* get firmware ver */
131 #define SIOCGHWID _IOW('i', 142, struct ifreq) /* get hardware id */
133 static int acx_probe(device_t);
134 static int acx_attach(device_t);
135 static int acx_detach(device_t);
136 static int acx_shutdown(device_t);
138 static void acx_init(void *);
139 static int acx_stop(struct acx_softc *);
140 static void acx_init_info_reg(struct acx_softc *);
141 static int acx_config(struct acx_softc *);
142 static int acx_read_config(struct acx_softc *, struct acx_config *);
143 static int acx_write_config(struct acx_softc *, struct acx_config *);
144 static int acx_set_wepkeys(struct acx_softc *);
146 static void acx_begin_scan(struct acx_softc *);
148 static void acx_next_scan(void *);
150 static void acx_start(struct ifnet *);
151 static void acx_watchdog(struct ifnet *);
153 static int acx_ioctl(struct ifnet *, u_long, caddr_t, struct ucred *);
155 static void acx_intr(void *);
156 static void acx_disable_intr(struct acx_softc *);
157 static void acx_enable_intr(struct acx_softc *);
158 static void acx_txeof(struct acx_softc *);
159 static void acx_txerr(struct acx_softc *, uint8_t);
160 static void acx_rxeof(struct acx_softc *);
162 static int acx_dma_alloc(struct acx_softc *);
163 static void acx_dma_free(struct acx_softc *);
164 static int acx_init_tx_ring(struct acx_softc *);
165 static int acx_init_rx_ring(struct acx_softc *);
166 static int acx_newbuf(struct acx_softc *, struct acx_rxbuf *, int);
167 static int acx_encap(struct acx_softc *, struct acx_txbuf *,
168 struct mbuf *, struct ieee80211_node *, int);
170 static int acx_reset(struct acx_softc *);
172 static int acx_set_null_tmplt(struct acx_softc *);
173 static int acx_set_probe_req_tmplt(struct acx_softc *, const char *, int);
174 static int acx_set_probe_resp_tmplt(struct acx_softc *, const char *, int,
176 static int acx_set_beacon_tmplt(struct acx_softc *, const char *, int,
179 static int acx_read_eeprom(struct acx_softc *, uint32_t, uint8_t *);
180 static int acx_read_phyreg(struct acx_softc *, uint32_t, uint8_t *);
182 static int acx_copyin_firmware(struct acx_softc *, struct ifreq *);
183 static void acx_free_firmware(struct acx_softc *);
184 static int acx_load_firmware(struct acx_softc *, uint32_t,
185 const uint8_t *, int);
186 static int acx_load_radio_firmware(struct acx_softc *, const uint8_t *,
188 static int acx_load_base_firmware(struct acx_softc *, const uint8_t *,
191 static struct ieee80211_node *acx_node_alloc(struct ieee80211_node_table *);
192 static void acx_node_init(struct acx_softc *, struct acx_node *);
193 static void acx_node_update(struct acx_softc *, struct acx_node *,
195 static int acx_newstate(struct ieee80211com *, enum ieee80211_state, int);
197 static int acx_sysctl_txrate_upd_intvl_min(SYSCTL_HANDLER_ARGS);
198 static int acx_sysctl_txrate_upd_intvl_max(SYSCTL_HANDLER_ARGS);
199 static int acx_sysctl_txrate_sample_thresh(SYSCTL_HANDLER_ARGS);
200 static int acx_sysctl_long_retry_limit(SYSCTL_HANDLER_ARGS);
201 static int acx_sysctl_short_retry_limit(SYSCTL_HANDLER_ARGS);
202 static int acx_sysctl_msdu_lifetime(SYSCTL_HANDLER_ARGS);
204 const struct ieee80211_rateset acx_rates_11b =
205 { 4, { 2, 4, 11, 22 } };
206 const struct ieee80211_rateset acx_rates_11g =
207 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } };
209 static int acx_chanscan_rate = 5; /* 5/second */
210 int acx_beacon_intvl = 100; /* 100 TU */
212 static const struct acx_device {
215 void (*set_param)(device_t);
218 { PCI_VENDOR_TI, PCI_PRODUCT_TI_ACX100A, acx100_set_param,
219 "Texas Instruments TNETW1100A Wireless Adapter" },
220 { PCI_VENDOR_TI, PCI_PRODUCT_TI_ACX100B, acx100_set_param,
221 "Texas Instruments TNETW1100B Wireless Adapter" },
222 { PCI_VENDOR_TI, PCI_PRODUCT_TI_ACX111, acx111_set_param,
223 "Texas Instruments TNETW1130 Wireless Adapter" },
227 static device_method_t acx_methods[] = {
228 DEVMETHOD(device_probe, acx_probe),
229 DEVMETHOD(device_attach, acx_attach),
230 DEVMETHOD(device_detach, acx_detach),
231 DEVMETHOD(device_shutdown, acx_shutdown),
233 DEVMETHOD(device_suspend, acx_suspend),
234 DEVMETHOD(device_resume, acx_resume),
239 static driver_t acx_driver = {
242 sizeof(struct acx_softc)
245 static devclass_t acx_devclass;
247 DRIVER_MODULE(acx, pci, acx_driver, acx_devclass, 0, 0);
248 DRIVER_MODULE(acx, cardbus, acx_driver, acx_devclass, 0, 0);
250 MODULE_DEPEND(acx, wlan, 1, 1, 1);
251 MODULE_DEPEND(acx, pci, 1, 1, 1);
252 MODULE_DEPEND(acx, cardbus, 1, 1, 1);
255 acx_probe(device_t dev)
257 const struct acx_device *a;
260 vid = pci_get_vendor(dev);
261 did = pci_get_device(dev);
262 for (a = acx_devices; a->desc != NULL; ++a) {
263 if (vid == a->vid && did == a->did) {
265 device_set_desc(dev, a->desc);
273 acx_attach(device_t dev)
275 struct acx_softc *sc;
277 struct ieee80211com *ic;
280 sc = device_get_softc(dev);
284 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
287 if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) {
288 uint32_t mem1, mem2, irq;
290 mem1 = pci_read_config(dev, sc->chip_mem1_rid, 4);
291 mem2 = pci_read_config(dev, sc->chip_mem2_rid, 4);
292 irq = pci_read_config(dev, PCIR_INTLINE, 4);
294 device_printf(dev, "chip is in D%d power mode "
295 "-- setting to D0\n", pci_get_powerstate(dev));
297 pci_set_powerstate(dev, PCI_POWERSTATE_D0);
299 pci_write_config(dev, sc->chip_mem1_rid, mem1, 4);
300 pci_write_config(dev, sc->chip_mem2_rid, mem2, 4);
301 pci_write_config(dev, PCIR_INTLINE, irq, 4);
303 #endif /* !BURN_BRIDGE */
305 /* Enable bus mastering */
306 pci_enable_busmaster(dev);
308 /* Allocate IO memory 1 */
309 sc->sc_mem1_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
312 if (sc->sc_mem1_res == NULL) {
314 device_printf(dev, "can't allocate IO mem1\n");
317 sc->sc_mem1_bt = rman_get_bustag(sc->sc_mem1_res);
318 sc->sc_mem1_bh = rman_get_bushandle(sc->sc_mem1_res);
320 /* Allocate IO memory 2 */
321 sc->sc_mem2_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
324 if (sc->sc_mem2_res == NULL) {
326 device_printf(dev, "can't allocate IO mem2\n");
329 sc->sc_mem2_bt = rman_get_bustag(sc->sc_mem2_res);
330 sc->sc_mem2_bh = rman_get_bushandle(sc->sc_mem2_res);
333 sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
335 RF_SHAREABLE | RF_ACTIVE);
336 if (sc->sc_irq_res == NULL) {
338 device_printf(dev, "can't allocate intr\n");
342 /* Initilize channel scanning timer */
343 callout_init(&sc->sc_chanscan_timer);
345 /* Allocate busdma stuffs */
346 error = acx_dma_alloc(sc);
351 error = acx_reset(sc);
355 /* Disable interrupts before firmware is loaded */
356 acx_disable_intr(sc);
358 /* Get radio type and form factor */
359 #define EEINFO_RETRY_MAX 50
360 for (i = 0; i < EEINFO_RETRY_MAX; ++i) {
363 ee_info = CSR_READ_2(sc, ACXREG_EEPROM_INFO);
364 if (ACX_EEINFO_HAS_RADIO_TYPE(ee_info)) {
365 sc->sc_form_factor = ACX_EEINFO_FORM_FACTOR(ee_info);
366 sc->sc_radio_type = ACX_EEINFO_RADIO_TYPE(ee_info);
371 if (i == EEINFO_RETRY_MAX) {
375 #undef EEINFO_RETRY_MAX
377 DPRINTF((&sc->sc_ic.ic_if, "radio type %02x\n", sc->sc_radio_type));
380 for (i = 0; i < 0x40; ++i) {
383 error = acx_read_eeprom(sc, i, &val);
386 printf("%02x ", val);
389 #endif /* DUMP_EEPROM */
391 /* Get EEPROM version */
392 error = acx_read_eeprom(sc, ACX_EE_VERSION_OFS, &sc->sc_eeprom_ver);
395 DPRINTF((&sc->sc_ic.ic_if, "EEPROM version %u\n", sc->sc_eeprom_ver));
398 ifp->if_init = acx_init;
399 ifp->if_ioctl = acx_ioctl;
400 ifp->if_start = acx_start;
401 ifp->if_watchdog = acx_watchdog;
402 ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST;
403 ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN);
404 ifq_set_ready(&ifp->if_snd);
407 for (i = 1; i <= 14; ++i) {
408 ic->ic_channels[i].ic_freq =
409 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ);
410 ic->ic_channels[i].ic_flags = sc->chip_chan_flags;
413 ic->ic_opmode = IEEE80211_M_STA;
414 ic->ic_state = IEEE80211_S_INIT;
416 ic->ic_caps = IEEE80211_C_WEP | /* WEP */
417 IEEE80211_C_IBSS | /* IBSS modes */
418 IEEE80211_C_SHPREAMBLE; /* Short preamble */
421 for (i = 0; i < IEEE80211_ADDR_LEN; ++i) {
422 error = acx_read_eeprom(sc, sc->chip_ee_eaddr_ofs - i,
426 ieee80211_ifattach(ic);
428 /* Override node alloc */
429 ic->ic_node_alloc = acx_node_alloc;
431 /* Override newstate */
432 sc->sc_newstate = ic->ic_newstate;
433 ic->ic_newstate = acx_newstate;
435 ieee80211_media_init(ic, ieee80211_media_change, ieee80211_media_status);
437 sc->sc_txrate_upd_intvl_min = 10; /* 10 seconds */
438 sc->sc_txrate_upd_intvl_max = 300; /* 5 minutes */
439 sc->sc_txrate_sample_thresh = 30; /* 30 packets */
440 sc->sc_long_retry_limit = 4;
441 sc->sc_short_retry_limit = 7;
442 sc->sc_msdu_lifetime = 4096;
444 sysctl_ctx_init(&sc->sc_sysctl_ctx);
445 sc->sc_sysctl_tree = SYSCTL_ADD_NODE(&sc->sc_sysctl_ctx,
446 SYSCTL_STATIC_CHILDREN(_hw),
448 device_get_nameunit(dev),
450 if (sc->sc_sysctl_tree == NULL) {
451 device_printf(dev, "can't add sysctl node\n");
456 SYSCTL_ADD_PROC(&sc->sc_sysctl_ctx,
457 SYSCTL_CHILDREN(sc->sc_sysctl_tree),
458 OID_AUTO, "txrate_upd_intvl_min",
459 CTLTYPE_INT | CTLFLAG_RW,
460 sc, 0, acx_sysctl_txrate_upd_intvl_min, "I",
461 "min seconds to wait before raising TX rate");
462 SYSCTL_ADD_PROC(&sc->sc_sysctl_ctx,
463 SYSCTL_CHILDREN(sc->sc_sysctl_tree),
464 OID_AUTO, "txrate_upd_intvl_max",
465 CTLTYPE_INT | CTLFLAG_RW,
466 sc, 0, acx_sysctl_txrate_upd_intvl_max, "I",
467 "max seconds to wait before raising TX rate");
468 SYSCTL_ADD_PROC(&sc->sc_sysctl_ctx,
469 SYSCTL_CHILDREN(sc->sc_sysctl_tree),
470 OID_AUTO, "txrate_sample_threshold",
471 CTLTYPE_INT | CTLFLAG_RW,
472 sc, 0, acx_sysctl_txrate_sample_thresh, "I",
473 "number of packets to be sampled "
474 "before raising TX rate");
476 SYSCTL_ADD_PROC(&sc->sc_sysctl_ctx,
477 SYSCTL_CHILDREN(sc->sc_sysctl_tree),
478 OID_AUTO, "long_retry_limit",
479 CTLTYPE_INT | CTLFLAG_RW,
480 sc, 0, acx_sysctl_long_retry_limit, "I",
481 "max number of retries for RTS packets");
482 SYSCTL_ADD_PROC(&sc->sc_sysctl_ctx,
483 SYSCTL_CHILDREN(sc->sc_sysctl_tree),
484 OID_AUTO, "short_retry_limit",
485 CTLTYPE_INT | CTLFLAG_RW,
486 sc, 0, acx_sysctl_short_retry_limit, "I",
487 "max number of retries for non-RTS packets");
489 SYSCTL_ADD_PROC(&sc->sc_sysctl_ctx,
490 SYSCTL_CHILDREN(sc->sc_sysctl_tree),
491 OID_AUTO, "msdu_lifetime",
492 CTLTYPE_INT | CTLFLAG_RW,
493 sc, 0, acx_sysctl_msdu_lifetime, "I",
496 error = bus_setup_intr(dev, sc->sc_irq_res, INTR_MPSAFE, acx_intr, sc,
497 &sc->sc_irq_handle, ifp->if_serializer);
499 device_printf(dev, "can't set up interrupt\n");
504 ieee80211_announce(ic);
508 ieee80211_ifdetach(ic);
515 acx_detach(device_t dev)
517 struct acx_softc *sc = device_get_softc(dev);
519 if (device_is_attached(dev)) {
520 struct ieee80211com *ic = &sc->sc_ic;
521 struct ifnet *ifp = &ic->ic_if;
523 lwkt_serialize_enter(ifp->if_serializer);
526 acx_free_firmware(sc);
527 bus_teardown_intr(dev, sc->sc_irq_res, sc->sc_irq_handle);
529 lwkt_serialize_exit(ifp->if_serializer);
531 ieee80211_ifdetach(ic);
534 if (sc->sc_sysctl_tree != NULL)
535 sysctl_ctx_free(&sc->sc_sysctl_ctx);
537 if (sc->sc_irq_res != NULL) {
538 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irq_rid,
541 if (sc->sc_mem1_res != NULL) {
542 bus_release_resource(dev, SYS_RES_MEMORY, sc->chip_mem1_rid,
545 if (sc->sc_mem2_res != NULL) {
546 bus_release_resource(dev, SYS_RES_MEMORY, sc->chip_mem2_rid,
555 acx_shutdown(device_t dev)
557 struct acx_softc *sc = device_get_softc(dev);
559 lwkt_serialize_enter(sc->sc_ic.ic_if.if_serializer);
561 lwkt_serialize_exit(sc->sc_ic.ic_if.if_serializer);
568 struct acx_softc *sc = arg;
569 struct ifnet *ifp = &sc->sc_ic.ic_if;
570 struct acx_firmware *fw = &sc->sc_firmware;
573 error = acx_stop(sc);
577 if (fw->base_fw == NULL) {
579 if_printf(ifp, "base firmware is not loaded yet\n");
583 error = acx_init_tx_ring(sc);
585 if_printf(ifp, "can't initialize TX ring\n");
589 error = acx_init_rx_ring(sc);
591 if_printf(ifp, "can't initialize RX ring\n");
595 error = acx_load_base_firmware(sc, fw->base_fw, fw->base_fw_len);
600 * Initialize command and information registers
601 * NOTE: This should be done after base firmware is loaded
603 acx_init_cmd_reg(sc);
604 acx_init_info_reg(sc);
606 sc->sc_flags |= ACX_FLAG_FW_LOADED;
609 if (sc->chip_post_basefw != NULL) {
610 error = sc->chip_post_basefw(sc);
616 if (fw->radio_fw != NULL) {
617 error = acx_load_radio_firmware(sc, fw->radio_fw,
623 error = sc->chip_init(sc);
627 /* Get and set device various configuration */
628 error = acx_config(sc);
633 if (sc->sc_ic.ic_flags & IEEE80211_F_PRIVACY) {
634 error = acx_set_wepkeys(sc);
637 sc->sc_ic.ic_flags &= ~IEEE80211_F_DROPUNENC;
640 /* Turn on power led */
641 CSR_CLRB_2(sc, ACXREG_GPIO_OUT, sc->chip_gpio_pled);
645 ifp->if_flags |= IFF_RUNNING;
646 ifp->if_flags &= ~IFF_OACTIVE;
648 /* Begin background scanning */
652 ieee80211_new_state(&sc->sc_ic, IEEE80211_S_SCAN, -1);
661 acx_init_info_reg(struct acx_softc *sc)
663 sc->sc_info = CSR_READ_4(sc, ACXREG_INFO_REG_OFFSET);
664 sc->sc_info_param = sc->sc_info + ACX_INFO_REG_SIZE;
668 acx_set_wepkeys(struct acx_softc *sc)
670 struct ieee80211com *ic = &sc->sc_ic;
671 struct acx_conf_wep_txkey wep_txkey;
672 int i, error, got_wk = 0;
674 for (i = 0; i < IEEE80211_WEP_NKID; ++i) {
675 struct ieee80211_key *wk = &ic->ic_nw_keys[i];
677 if (wk->wk_keylen == 0)
680 error = sc->chip_set_wepkey(sc, wk, i);
684 if (sc->sc_softwep && (wk->wk_flags & IEEE80211_KEY_XMIT))
685 wk->wk_flags |= IEEE80211_KEY_SWCRYPT;
689 if (!got_wk || ic->ic_def_txkey == IEEE80211_KEYIX_NONE)
692 /* Set current WEP key index */
693 wep_txkey.wep_txkey = ic->ic_def_txkey;
694 if (acx_set_wep_txkey_conf(sc, &wep_txkey) != 0) {
695 if_printf(&ic->ic_if, "set WEP txkey failed\n");
703 acx_begin_scan(struct acx_softc *sc)
705 struct ieee80211com *ic = &sc->sc_ic;
708 ieee80211_begin_scan(ic, 1);
710 chan = ieee80211_chan2ieee(ic, ic->ic_bss->ni_chan);
712 ACX_ENABLE_TXCHAN(sc, chan);
713 ACX_ENABLE_RXCHAN(sc, chan);
715 /* Start background scanning */
716 callout_reset(&sc->sc_chanscan_timer, hz / acx_chanscan_rate,
722 acx_next_scan(void *arg)
724 struct acx_softc *sc = arg;
725 struct ieee80211com *ic = &sc->sc_ic;
726 struct ifnet *ifp = &ic->ic_if;
728 lwkt_serialize_enter(ifp->if_serializer);
730 if (ic->ic_state == IEEE80211_S_SCAN) {
735 ieee80211_next_scan(ic);
738 chan = ieee80211_chan2ieee(ic, ic->ic_bss->ni_chan);
740 ACX_ENABLE_TXCHAN(sc, chan);
741 ACX_ENABLE_RXCHAN(sc, chan);
743 callout_reset(&sc->sc_chanscan_timer, hz / acx_chanscan_rate,
748 lwkt_serialize_exit(ifp->if_serializer);
752 acx_stop(struct acx_softc *sc)
754 struct ieee80211com *ic = &sc->sc_ic;
755 struct ifnet *ifp = &ic->ic_if;
756 struct acx_buf_data *bd = &sc->sc_buf_data;
757 struct acx_ring_data *rd = &sc->sc_ring_data;
760 ASSERT_SERIALIZED(ifp->if_serializer);
762 sc->sc_firmware_ver = 0;
763 sc->sc_hardware_id = 0;
766 error = acx_reset(sc);
770 /* Firmware no longer functions after hardware reset */
771 sc->sc_flags &= ~ACX_FLAG_FW_LOADED;
773 acx_disable_intr(sc);
775 /* Stop backgroud scanning */
776 callout_stop(&sc->sc_chanscan_timer);
778 /* Turn off power led */
779 CSR_SETB_2(sc, ACXREG_GPIO_OUT, sc->chip_gpio_pled);
782 for (i = 0; i < ACX_TX_DESC_CNT; ++i) {
783 struct acx_txbuf *buf;
784 struct ieee80211_node *ni;
786 buf = &bd->tx_buf[i];
788 if (buf->tb_mbuf != NULL) {
789 bus_dmamap_unload(bd->mbuf_dma_tag,
790 buf->tb_mbuf_dmamap);
791 m_freem(buf->tb_mbuf);
795 ni = (struct ieee80211_node *)buf->tb_node;
797 ieee80211_free_node(ni);
801 /* Clear TX host descriptors */
802 bzero(rd->tx_ring, ACX_TX_RING_SIZE);
805 for (i = 0; i < ACX_RX_DESC_CNT; ++i) {
806 if (bd->rx_buf[i].rb_mbuf != NULL) {
807 bus_dmamap_unload(bd->mbuf_dma_tag,
808 bd->rx_buf[i].rb_mbuf_dmamap);
809 m_freem(bd->rx_buf[i].rb_mbuf);
810 bd->rx_buf[i].rb_mbuf = NULL;
814 /* Clear RX host descriptors */
815 bzero(rd->rx_ring, ACX_RX_RING_SIZE);
818 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
819 ieee80211_new_state(&sc->sc_ic, IEEE80211_S_INIT, -1);
825 acx_config(struct acx_softc *sc)
827 struct acx_config conf;
830 error = acx_read_config(sc, &conf);
834 error = acx_write_config(sc, &conf);
838 if (acx_set_probe_req_tmplt(sc, "", 0) != 0) {
839 if_printf(&sc->sc_ic.ic_if, "can't set probe req template "
845 if (acx_set_null_tmplt(sc) != 0) {
846 if_printf(&sc->sc_ic.ic_if, "can't set null data template\n");
853 acx_read_config(struct acx_softc *sc, struct acx_config *conf)
855 struct acx_conf_eaddr addr;
856 struct acx_conf_regdom reg_dom;
857 struct acx_conf_antenna ant;
858 struct acx_conf_fwrev fw_rev;
864 if (acx_get_eaddr_conf(sc, &addr) != 0) {
865 if_printf(&sc->sc_ic.ic_if, "can't get station id\n");
870 * Get and print station id in case that EEPROM station id's
871 * offset is not correct
873 for (i = 0; i < IEEE80211_ADDR_LEN; ++i)
874 conf->eaddr[IEEE80211_ADDR_LEN - 1 - i] = addr.eaddr[i];
875 if_printf(&sc->sc_ic.ic_if, "MAC address (from firmware): %6D\n",
878 /* Get region domain */
879 if (acx_get_regdom_conf(sc, ®_dom) != 0) {
880 if_printf(&sc->sc_ic.ic_if, "can't get region domain\n");
883 conf->regdom = reg_dom.regdom;
884 DPRINTF((&sc->sc_ic.ic_if, "regdom %02x\n", reg_dom.regdom));
887 if (acx_get_antenna_conf(sc, &ant) != 0) {
888 if_printf(&sc->sc_ic.ic_if, "can't get antenna\n");
891 conf->antenna = ant.antenna;
892 DPRINTF((&sc->sc_ic.ic_if, "antenna %02x\n", ant.antenna));
894 /* Get sensitivity XXX not used */
895 if (sc->sc_radio_type == ACX_RADIO_TYPE_MAXIM ||
896 sc->sc_radio_type == ACX_RADIO_TYPE_RFMD ||
897 sc->sc_radio_type == ACX_RADIO_TYPE_RALINK) {
898 error = acx_read_phyreg(sc, ACXRV_PHYREG_SENSITIVITY, &sen);
900 if_printf(&sc->sc_ic.ic_if, "can't get sensitivity\n");
906 DPRINTF((&sc->sc_ic.ic_if, "sensitivity %02x\n", sen));
908 /* Get firmware revision */
909 if (acx_get_fwrev_conf(sc, &fw_rev) != 0) {
910 if_printf(&sc->sc_ic.ic_if, "can't get firmware revision\n");
914 if (strncmp(fw_rev.fw_rev, "Rev ", 4) != 0) {
915 if_printf(&sc->sc_ic.ic_if, "strange revision string -- %s\n",
917 fw_rev_no = 0x01090407;
926 s = &fw_rev.fw_rev[4];
928 for (i = 0; i < 4; ++i) {
931 val = strtoul(s, &endp, 16);
932 fw_rev_no |= val << ((3 - i) * 8);
940 sc->sc_firmware_ver = fw_rev_no;
941 sc->sc_hardware_id = le32toh(fw_rev.hw_id);
942 DPRINTF((&sc->sc_ic.ic_if, "fw rev %08x, hw id %08x\n",
943 sc->sc_firmware_ver, sc->sc_hardware_id));
945 if (sc->chip_read_config != NULL) {
946 error = sc->chip_read_config(sc, conf);
954 acx_write_config(struct acx_softc *sc, struct acx_config *conf)
956 struct acx_conf_nretry_short sretry;
957 struct acx_conf_nretry_long lretry;
958 struct acx_conf_msdu_lifetime msdu_lifetime;
959 struct acx_conf_rate_fallback rate_fb;
960 struct acx_conf_antenna ant;
961 struct acx_conf_regdom reg_dom;
962 struct acx_conf_rxopt rx_opt;
965 /* Set number of long/short retry */
966 sretry.nretry = sc->sc_short_retry_limit;
967 if (acx_set_nretry_short_conf(sc, &sretry) != 0) {
968 if_printf(&sc->sc_ic.ic_if, "can't set short retry limit\n");
972 lretry.nretry = sc->sc_long_retry_limit;
973 if (acx_set_nretry_long_conf(sc, &lretry) != 0) {
974 if_printf(&sc->sc_ic.ic_if, "can't set long retry limit\n");
978 /* Set MSDU lifetime */
979 msdu_lifetime.lifetime = htole32(sc->sc_msdu_lifetime);
980 if (acx_set_msdu_lifetime_conf(sc, &msdu_lifetime) != 0) {
981 if_printf(&sc->sc_ic.ic_if, "can't set MSDU lifetime\n");
985 /* Enable rate fallback */
986 rate_fb.ratefb_enable = 1;
987 if (acx_set_rate_fallback_conf(sc, &rate_fb) != 0) {
988 if_printf(&sc->sc_ic.ic_if, "can't enable rate fallback\n");
993 ant.antenna = conf->antenna;
994 if (acx_set_antenna_conf(sc, &ant) != 0) {
995 if_printf(&sc->sc_ic.ic_if, "can't set antenna\n");
999 /* Set region domain */
1000 reg_dom.regdom = conf->regdom;
1001 if (acx_set_regdom_conf(sc, ®_dom) != 0) {
1002 if_printf(&sc->sc_ic.ic_if, "can't set region domain\n");
1006 if (sc->chip_write_config != NULL) {
1007 error = sc->chip_write_config(sc, conf);
1012 /* What we want to receive and how to receive */
1013 /* XXX may not belong here, acx_init() */
1014 rx_opt.opt1 = RXOPT1_FILT_FDEST | RXOPT1_INCL_RXBUF_HDR;
1015 rx_opt.opt2 = RXOPT2_RECV_ASSOC_REQ |
1017 RXOPT2_RECV_BEACON |
1022 RXOPT2_RECV_PROBE_REQ |
1023 RXOPT2_RECV_PROBE_RESP |
1025 if (acx_set_rxopt_conf(sc, &rx_opt) != 0) {
1026 if_printf(&sc->sc_ic.ic_if, "can't set RX option\n");
1033 acx_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *cr)
1035 struct acx_softc *sc = ifp->if_softc;
1040 req = (struct ifreq *)data;
1044 error = suser_cred(cr, NULL_CRED_OKAY);
1048 error = acx_copyin_firmware(sc, req);
1051 error = suser_cred(cr, NULL_CRED_OKAY);
1054 acx_free_firmware(sc);
1057 error = copyout(&sc->sc_radio_type, req->ifr_data,
1058 sizeof(sc->sc_radio_type));
1061 error = copyout(&sc->sc_firmware_ver, req->ifr_data,
1062 sizeof(sc->sc_firmware_ver));
1065 error = copyout(&sc->sc_hardware_id, req->ifr_data,
1066 sizeof(sc->sc_hardware_id));
1069 error = copyout(&sc->sc_stats, req->ifr_data,
1070 sizeof(sc->sc_stats));
1073 if (ifp->if_flags & IFF_UP) {
1074 if ((ifp->if_flags & IFF_RUNNING) == 0)
1077 if (ifp->if_flags & IFF_RUNNING)
1086 error = ieee80211_ioctl(&sc->sc_ic, cmd, data, cr);
1090 if (error == ENETRESET) {
1091 if ((ifp->if_flags & (IFF_RUNNING | IFF_UP)) ==
1092 (IFF_RUNNING | IFF_UP))
1100 acx_start(struct ifnet *ifp)
1102 struct acx_softc *sc = ifp->if_softc;
1103 struct ieee80211com *ic = &sc->sc_ic;
1104 struct acx_buf_data *bd = &sc->sc_buf_data;
1105 struct acx_txbuf *buf;
1108 ASSERT_SERIALIZED(ifp->if_serializer);
1110 if ((sc->sc_flags & ACX_FLAG_FW_LOADED) == 0 ||
1111 (ifp->if_flags & IFF_RUNNING) == 0 ||
1112 (ifp->if_flags & IFF_OACTIVE))
1117 * We can't start from a random position that TX descriptor
1118 * is free, since hardware will be confused by that.
1119 * We have to follow the order of the TX ring.
1121 idx = bd->tx_free_start;
1123 for (buf = &bd->tx_buf[idx]; buf->tb_mbuf == NULL;
1124 buf = &bd->tx_buf[idx]) {
1125 struct ieee80211_frame *f;
1126 struct ieee80211_node *ni = NULL;
1130 if (!IF_QEMPTY(&ic->ic_mgtq)) {
1131 IF_DEQUEUE(&ic->ic_mgtq, m);
1133 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
1134 m->m_pkthdr.rcvif = NULL;
1138 * Since mgmt data are transmitted at fixed rate
1139 * they will not be used to do rate control.
1142 ieee80211_free_node(ni);
1144 rate = 4; /* XXX 2Mb/s for mgmt packet */
1145 } else if (!ifq_is_empty(&ifp->if_snd)) {
1146 struct ether_header *eh;
1147 struct acx_node *node;
1149 if (ic->ic_state != IEEE80211_S_RUN) {
1150 if_printf(ifp, "data packet dropped due to "
1151 "not RUN. Current state %d\n",
1156 m = ifq_dequeue(&ifp->if_snd, NULL);
1160 if (m->m_len < sizeof(struct ether_header)) {
1161 m = m_pullup(m, sizeof(struct ether_header));
1167 eh = mtod(m, struct ether_header *);
1169 ni = ieee80211_find_txnode(ic, eh->ether_dhost);
1176 /* TODO power save */
1178 m = ieee80211_encap(ic, m, ni);
1180 ieee80211_free_node(ni);
1185 node = (struct acx_node *)ni;
1186 if (node->nd_txrate < 0) {
1187 acx_node_init(sc, node);
1189 if (ic->ic_opmode == IEEE80211_M_IBSS) {
1191 * Add extra reference here,
1192 * so that some node (bss_dup)
1193 * will not be freed just after
1194 * they are allocated, which
1195 * make TX rate control impossible
1197 ieee80211_ref_node(ni);
1202 rate = node->nd_rates.rs_rates[node->nd_txrate];
1209 f = mtod(m, struct ieee80211_frame *);
1210 if ((f->i_fc[1] & IEEE80211_FC1_WEP) && sc->sc_softwep) {
1211 KASSERT(ni != NULL, ("TX node is NULL (WEP)\n"));
1212 if (ieee80211_crypto_encap(ic, ni, m) == NULL) {
1213 ieee80211_free_node(ni);
1220 if (ic->ic_rawbpf != NULL)
1221 bpf_mtap(ic->ic_rawbpf, m);
1223 if (acx_encap(sc, buf, m, ni, rate) != 0) {
1225 * NOTE: `m' will be freed in acx_encap()
1229 ieee80211_free_node(ni);
1236 * 1) `m' should not be touched after acx_encap()
1237 * 2) `node' will be used to do TX rate control during
1238 * acx_txeof(), so it is not freed here. acx_txeof()
1239 * will free it for us
1243 bd->tx_used_count++;
1244 idx = (idx + 1) % ACX_TX_DESC_CNT;
1246 bd->tx_free_start = idx;
1248 if (bd->tx_used_count == ACX_TX_DESC_CNT)
1249 ifp->if_flags |= IFF_OACTIVE;
1251 if (trans && ifp->if_timer == 0)
1256 acx_watchdog(struct ifnet *ifp)
1258 if_printf(ifp, "watchdog timeout\n");
1259 acx_txeof(ifp->if_softc);
1266 struct acx_softc *sc = arg;
1267 uint16_t intr_status;
1269 if ((sc->sc_flags & ACX_FLAG_FW_LOADED) == 0)
1272 intr_status = CSR_READ_2(sc, ACXREG_INTR_STATUS_CLR);
1273 if (intr_status == ACXRV_INTR_ALL) {
1274 /* not our interrupt */
1278 intr_status &= sc->chip_intr_enable;
1279 if (intr_status == 0) {
1280 /* not interrupts we care about */
1284 /* Acknowledge all interrupts */
1285 CSR_WRITE_2(sc, ACXREG_INTR_ACK, ACXRV_INTR_ALL);
1287 if (intr_status & ACXRV_INTR_TX_FINI)
1290 if (intr_status & ACXRV_INTR_RX_FINI)
1295 acx_disable_intr(struct acx_softc *sc)
1297 CSR_WRITE_2(sc, ACXREG_INTR_MASK, sc->chip_intr_disable);
1298 CSR_WRITE_2(sc, ACXREG_EVENT_MASK, 0);
1302 acx_enable_intr(struct acx_softc *sc)
1304 /* Mask out interrupts that are not in the enable set */
1305 CSR_WRITE_2(sc, ACXREG_INTR_MASK, ~sc->chip_intr_enable);
1306 CSR_WRITE_2(sc, ACXREG_EVENT_MASK, ACXRV_EVENT_DISABLE);
1310 acx_txeof(struct acx_softc *sc)
1312 struct acx_buf_data *bd;
1313 struct acx_txbuf *buf;
1317 ifp = &sc->sc_ic.ic_if;
1318 ASSERT_SERIALIZED(ifp->if_serializer);
1320 bd = &sc->sc_buf_data;
1321 idx = bd->tx_used_start;
1322 for (buf = &bd->tx_buf[idx]; buf->tb_mbuf != NULL;
1323 buf = &bd->tx_buf[idx]) {
1324 uint8_t ctrl, error;
1326 ctrl = FW_TXDESC_GETFIELD_1(sc, buf, f_tx_ctrl);
1327 if ((ctrl & (DESC_CTRL_HOSTOWN | DESC_CTRL_ACXDONE)) !=
1328 (DESC_CTRL_HOSTOWN | DESC_CTRL_ACXDONE))
1331 bus_dmamap_unload(bd->mbuf_dma_tag, buf->tb_mbuf_dmamap);
1332 m_freem(buf->tb_mbuf);
1333 buf->tb_mbuf = NULL;
1335 error = FW_TXDESC_GETFIELD_1(sc, buf, f_tx_error);
1337 acx_txerr(sc, error);
1343 if (buf->tb_node != NULL) {
1344 struct ieee80211com *ic;
1345 struct ieee80211_node *ni;
1348 ni = (struct ieee80211_node *)buf->tb_node;
1350 acx_node_update(sc, buf->tb_node, buf->tb_rate, error);
1351 ieee80211_free_node(ni);
1352 buf->tb_node = NULL;
1355 FW_TXDESC_SETFIELD_1(sc, buf, f_tx_ctrl, DESC_CTRL_HOSTOWN);
1357 bd->tx_used_count--;
1359 idx = (idx + 1) % ACX_TX_DESC_CNT;
1361 bd->tx_used_start = idx;
1363 ifp->if_timer = bd->tx_used_count == 0 ? 0 : 5;
1365 if (bd->tx_used_count != ACX_TX_DESC_CNT) {
1366 ifp->if_flags &= ~IFF_OACTIVE;
1372 acx_txerr(struct acx_softc *sc, uint8_t err)
1374 struct ifnet *ifp = &sc->sc_ic.ic_if;
1375 struct acx_stats *stats = &sc->sc_stats;
1377 if (err == DESC_ERR_EXCESSIVE_RETRY) {
1379 * This a common error (see comment below),
1380 * so print it using DPRINTF()
1382 DPRINTF((ifp, "TX failed -- excessive retry\n"));
1384 if_printf(ifp, "TX failed -- ");
1388 * Although `err' looks like bitmask, it never
1389 * has multiple bits set.
1393 case DESC_ERR_OTHER_FRAG:
1394 /* XXX what's this */
1395 printf("error in other fragment\n");
1396 stats->err_oth_frag++;
1399 case DESC_ERR_ABORT:
1400 printf("aborted\n");
1403 case DESC_ERR_PARAM:
1404 printf("wrong paramters in descriptor\n");
1407 case DESC_ERR_NO_WEPKEY:
1408 printf("WEP key missing\n");
1409 stats->err_no_wepkey++;
1411 case DESC_ERR_MSDU_TIMEOUT:
1412 printf("MSDU life timeout\n");
1413 stats->err_msdu_timeout++;
1415 case DESC_ERR_EXCESSIVE_RETRY:
1418 * 1) Distance is too long
1419 * 2) Transmit failed (e.g. no MAC level ACK)
1420 * 3) Chip overheated (this should be rare)
1422 stats->err_ex_retry++;
1424 case DESC_ERR_BUF_OVERFLOW:
1425 printf("buffer overflow\n");
1426 stats->err_buf_oflow++;
1429 printf("DMA error\n");
1433 printf("unknown error %d\n", err);
1440 acx_rxeof(struct acx_softc *sc)
1442 struct ieee80211com *ic = &sc->sc_ic;
1443 struct acx_ring_data *rd = &sc->sc_ring_data;
1444 struct acx_buf_data *bd = &sc->sc_buf_data;
1445 struct ifnet *ifp = &ic->ic_if;
1448 ASSERT_SERIALIZED(ic->ic_if.if_serializer);
1450 bus_dmamap_sync(rd->rx_ring_dma_tag, rd->rx_ring_dmamap,
1451 BUS_DMASYNC_POSTREAD);
1454 * Locate first "ready" rx buffer,
1455 * start from last stopped position
1457 idx = bd->rx_scan_start;
1460 struct acx_rxbuf *buf;
1462 buf = &bd->rx_buf[idx];
1463 if ((buf->rb_desc->h_ctrl & htole16(DESC_CTRL_HOSTOWN)) &&
1464 (buf->rb_desc->h_status & htole32(DESC_STATUS_FULL))) {
1468 idx = (idx + 1) % ACX_RX_DESC_CNT;
1469 } while (idx != bd->rx_scan_start);
1475 * NOTE: don't mess up `idx' here, it will
1476 * be used in the following code
1480 struct acx_rxbuf_hdr *head;
1481 struct acx_rxbuf *buf;
1483 uint32_t desc_status;
1487 buf = &bd->rx_buf[idx];
1489 desc_ctrl = le16toh(buf->rb_desc->h_ctrl);
1490 desc_status = le32toh(buf->rb_desc->h_status);
1491 if (!(desc_ctrl & DESC_CTRL_HOSTOWN) ||
1492 !(desc_status & DESC_STATUS_FULL))
1495 bus_dmamap_sync(bd->mbuf_dma_tag, buf->rb_mbuf_dmamap,
1496 BUS_DMASYNC_POSTREAD);
1500 error = acx_newbuf(sc, buf, 0);
1506 head = mtod(m, struct acx_rxbuf_hdr *);
1508 len = le16toh(head->rbh_len) & ACX_RXBUF_LEN_MASK;
1509 if (len >= sizeof(struct ieee80211_frame_min) &&
1511 struct ieee80211_frame *f;
1512 struct ieee80211_node *ni;
1514 m_adj(m, sizeof(struct acx_rxbuf_hdr) +
1515 sc->chip_rxbuf_exhdr);
1516 f = mtod(m, struct ieee80211_frame *);
1518 if (f->i_fc[1] & IEEE80211_FC1_WEP) {
1519 /* Short circuit software WEP */
1520 f->i_fc[1] &= ~IEEE80211_FC1_WEP;
1522 /* Do chip specific RX buffer processing */
1523 if (sc->chip_proc_wep_rxbuf != NULL) {
1524 sc->chip_proc_wep_rxbuf(sc, m, &len);
1525 f = mtod(m, struct ieee80211_frame *);
1529 ni = ieee80211_find_rxnode(ic,
1530 (struct ieee80211_frame_min *)f);
1532 m->m_len = m->m_pkthdr.len = len;
1533 m->m_pkthdr.rcvif = &ic->ic_if;
1535 ieee80211_input(ic, m, ni, head->rbh_level,
1536 le32toh(head->rbh_time));
1538 ieee80211_free_node(ni);
1546 buf->rb_desc->h_ctrl = htole16(desc_ctrl & ~DESC_CTRL_HOSTOWN);
1547 buf->rb_desc->h_status = 0;
1548 bus_dmamap_sync(rd->rx_ring_dma_tag, rd->rx_ring_dmamap,
1549 BUS_DMASYNC_PREWRITE);
1551 idx = (idx + 1) % ACX_RX_DESC_CNT;
1552 } while (idx != bd->rx_scan_start);
1555 * Record the position so that next
1556 * time we can start from it
1558 bd->rx_scan_start = idx;
1562 acx_reset(struct acx_softc *sc)
1567 CSR_SETB_2(sc, ACXREG_ECPU_CTRL, ACXRV_ECPU_HALT);
1569 /* Software reset */
1570 reg = CSR_READ_2(sc, ACXREG_SOFT_RESET);
1571 CSR_WRITE_2(sc, ACXREG_SOFT_RESET, reg | ACXRV_SOFT_RESET);
1573 CSR_WRITE_2(sc, ACXREG_SOFT_RESET, reg);
1575 /* Initialize EEPROM */
1576 CSR_SETB_2(sc, ACXREG_EEPROM_INIT, ACXRV_EEPROM_INIT);
1579 /* Test whether ECPU is stopped */
1580 reg = CSR_READ_2(sc, ACXREG_ECPU_CTRL);
1581 if (!(reg & ACXRV_ECPU_HALT)) {
1582 if_printf(&sc->sc_ic.ic_if, "can't halt ECPU\n");
1589 acx_read_eeprom(struct acx_softc *sc, uint32_t offset, uint8_t *val)
1593 CSR_WRITE_4(sc, ACXREG_EEPROM_CONF, 0);
1594 CSR_WRITE_4(sc, ACXREG_EEPROM_ADDR, offset);
1595 CSR_WRITE_4(sc, ACXREG_EEPROM_CTRL, ACXRV_EEPROM_READ);
1597 #define EE_READ_RETRY_MAX 100
1598 for (i = 0; i < EE_READ_RETRY_MAX; ++i) {
1599 if (CSR_READ_2(sc, ACXREG_EEPROM_CTRL) == 0)
1603 if (i == EE_READ_RETRY_MAX) {
1604 if_printf(&sc->sc_ic.ic_if, "can't read EEPROM offset %x "
1605 "(timeout)\n", offset);
1608 #undef EE_READ_RETRY_MAX
1610 *val = CSR_READ_1(sc, ACXREG_EEPROM_DATA);
1615 acx_read_phyreg(struct acx_softc *sc, uint32_t reg, uint8_t *val)
1619 CSR_WRITE_4(sc, ACXREG_PHY_ADDR, reg);
1620 CSR_WRITE_4(sc, ACXREG_PHY_CTRL, ACXRV_PHY_READ);
1622 #define PHY_READ_RETRY_MAX 100
1623 for (i = 0; i < PHY_READ_RETRY_MAX; ++i) {
1624 if (CSR_READ_4(sc, ACXREG_PHY_CTRL) == 0)
1628 if (i == PHY_READ_RETRY_MAX) {
1629 if_printf(&sc->sc_ic.ic_if, "can't read phy reg %x (timeout)\n",
1633 #undef PHY_READ_RETRY_MAX
1635 *val = CSR_READ_1(sc, ACXREG_PHY_DATA);
1640 acx_write_phyreg(struct acx_softc *sc, uint32_t reg, uint8_t val)
1642 CSR_WRITE_4(sc, ACXREG_PHY_DATA, val);
1643 CSR_WRITE_4(sc, ACXREG_PHY_ADDR, reg);
1644 CSR_WRITE_4(sc, ACXREG_PHY_CTRL, ACXRV_PHY_WRITE);
1648 acx_copyin_firmware(struct acx_softc *sc, struct ifreq *req)
1650 struct acx_firmware ufw, *kfw;
1651 uint8_t *base_fw, *radio_fw;
1654 kfw = &sc->sc_firmware;
1658 error = copyin(req->ifr_data, &ufw, sizeof(ufw));
1663 * For combined base firmware, there is no radio firmware.
1664 * But base firmware must exist.
1666 if (ufw.base_fw_len <= 0 || ufw.radio_fw_len < 0)
1669 base_fw = malloc(ufw.base_fw_len, M_DEVBUF, M_INTWAIT);
1670 error = copyin(ufw.base_fw, base_fw, ufw.base_fw_len);
1674 if (ufw.radio_fw_len > 0) {
1675 radio_fw = malloc(ufw.radio_fw_len, M_DEVBUF, M_INTWAIT);
1676 error = copyin(ufw.radio_fw, radio_fw, ufw.radio_fw_len);
1681 kfw->base_fw_len = ufw.base_fw_len;
1682 if (kfw->base_fw != NULL)
1683 free(kfw->base_fw, M_DEVBUF);
1684 kfw->base_fw = base_fw;
1686 kfw->radio_fw_len = ufw.radio_fw_len;
1687 if (kfw->radio_fw != NULL)
1688 free(kfw->radio_fw, M_DEVBUF);
1689 kfw->radio_fw = radio_fw;
1693 if (base_fw != NULL)
1694 free(base_fw, M_DEVBUF);
1695 if (radio_fw != NULL)
1696 free(radio_fw, M_DEVBUF);
1701 acx_free_firmware(struct acx_softc *sc)
1703 struct acx_firmware *fw = &sc->sc_firmware;
1705 if (fw->base_fw != NULL) {
1706 free(fw->base_fw, M_DEVBUF);
1708 fw->base_fw_len = 0;
1710 if (fw->radio_fw != NULL) {
1711 free(fw->radio_fw, M_DEVBUF);
1712 fw->radio_fw = NULL;
1713 fw->radio_fw_len = 0;
1718 acx_load_base_firmware(struct acx_softc *sc, const uint8_t *base_fw,
1719 uint32_t base_fw_len)
1723 /* Load base firmware */
1724 error = acx_load_firmware(sc, 0, base_fw, base_fw_len);
1726 if_printf(&sc->sc_ic.ic_if, "can't load base firmware\n");
1729 DPRINTF((&sc->sc_ic.ic_if, "base firmware loaded\n"));
1732 CSR_WRITE_2(sc, ACXREG_ECPU_CTRL, ACXRV_ECPU_START);
1734 /* Wait for ECPU to be up */
1735 for (i = 0; i < 500; ++i) {
1738 reg = CSR_READ_2(sc, ACXREG_INTR_STATUS);
1739 if (reg & ACXRV_INTR_FCS_THRESH) {
1740 CSR_WRITE_2(sc, ACXREG_INTR_ACK, ACXRV_INTR_FCS_THRESH);
1746 if_printf(&sc->sc_ic.ic_if, "can't initialize ECPU (timeout)\n");
1751 acx_load_radio_firmware(struct acx_softc *sc, const uint8_t *radio_fw,
1752 uint32_t radio_fw_len)
1754 struct acx_conf_mmap mem_map;
1755 uint32_t radio_fw_ofs;
1759 * Get the position, where base firmware is loaded, so that
1760 * radio firmware can be loaded after it.
1762 if (acx_get_mmap_conf(sc, &mem_map) != 0)
1764 radio_fw_ofs = le32toh(mem_map.code_end);
1766 /* Put ECPU into sleeping state, before loading radio firmware */
1767 if (acx_sleep(sc) != 0)
1770 /* Load radio firmware */
1771 error = acx_load_firmware(sc, radio_fw_ofs, radio_fw, radio_fw_len);
1773 if_printf(&sc->sc_ic.ic_if, "can't load radio firmware\n");
1776 DPRINTF((&sc->sc_ic.ic_if, "radio firmware loaded\n"));
1778 /* Wake up sleeping ECPU, after radio firmware is loaded */
1779 if (acx_wakeup(sc) != 0)
1782 /* Initialize radio */
1783 if (acx_init_radio(sc, radio_fw_ofs, radio_fw_len) != 0)
1786 /* Verify radio firmware's loading position */
1787 if (acx_get_mmap_conf(sc, &mem_map) != 0)
1789 if (le32toh(mem_map.code_end) != radio_fw_ofs + radio_fw_len) {
1790 if_printf(&sc->sc_ic.ic_if, "loaded radio firmware position "
1795 DPRINTF((&sc->sc_ic.ic_if, "radio firmware initialized\n"));
1800 acx_load_firmware(struct acx_softc *sc, uint32_t offset, const uint8_t *data,
1806 fw = (const uint32_t *)data;
1807 fw_len = data_len / sizeof(uint32_t);
1810 * LOADFW_AUTO_INC only works with some older firmware:
1811 * 1) acx100's firmware
1812 * 2) acx111's firmware whose rev is 0x00010011
1816 CSR_WRITE_4(sc, ACXREG_FWMEM_START, ACXRV_FWMEM_START_OP);
1817 #ifndef LOADFW_AUTO_INC
1818 CSR_WRITE_4(sc, ACXREG_FWMEM_CTRL, 0);
1820 CSR_WRITE_4(sc, ACXREG_FWMEM_CTRL, ACXRV_FWMEM_ADDR_AUTOINC);
1821 CSR_WRITE_4(sc, ACXREG_FWMEM_ADDR, offset);
1824 for (i = 0; i < fw_len; ++i) {
1825 #ifndef LOADFW_AUTO_INC
1826 CSR_WRITE_4(sc, ACXREG_FWMEM_ADDR, offset + (i * 4));
1828 CSR_WRITE_4(sc, ACXREG_FWMEM_DATA, be32toh(fw[i]));
1831 /* Verify firmware */
1832 CSR_WRITE_4(sc, ACXREG_FWMEM_START, ACXRV_FWMEM_START_OP);
1833 #ifndef LOADFW_AUTO_INC
1834 CSR_WRITE_4(sc, ACXREG_FWMEM_CTRL, 0);
1836 CSR_WRITE_4(sc, ACXREG_FWMEM_CTRL, ACXRV_FWMEM_ADDR_AUTOINC);
1837 CSR_WRITE_4(sc, ACXREG_FWMEM_ADDR, offset);
1840 for (i = 0; i < fw_len; ++i) {
1843 #ifndef LOADFW_AUTO_INC
1844 CSR_WRITE_4(sc, ACXREG_FWMEM_ADDR, offset + (i * 4));
1846 val = CSR_READ_4(sc, ACXREG_FWMEM_DATA);
1847 if (be32toh(fw[i]) != val) {
1848 if_printf(&sc->sc_ic.ic_if, "fireware mismatch "
1849 "fw %08x loaded %08x\n", fw[i], val);
1856 static struct ieee80211_node *
1857 acx_node_alloc(struct ieee80211_node_table *nt __unused)
1859 struct acx_node *node;
1861 node = malloc(sizeof(struct acx_node), M_80211_NODE, M_NOWAIT | M_ZERO);
1862 node->nd_txrate = -1;
1863 return (struct ieee80211_node *)node;
1867 acx_node_init(struct acx_softc *sc, struct acx_node *node)
1869 struct ieee80211_rateset *nd_rset, *ic_rset, *cp_rset;
1870 struct ieee80211com *ic;
1875 nd_rset = &node->nd_node.ni_rates;
1876 ic_rset = &ic->ic_sup_rates[sc->chip_phymode];
1877 cp_rset = &node->nd_rates;
1880 #define IEEERATE(rate) ((rate) & IEEE80211_RATE_VAL)
1881 for (i = 0; i < nd_rset->rs_nrates; ++i) {
1882 uint8_t nd_rate = IEEERATE(nd_rset->rs_rates[i]);
1884 for (j = 0; j < ic_rset->rs_nrates; ++j) {
1885 if (nd_rate == IEEERATE(ic_rset->rs_rates[j])) {
1886 cp_rset->rs_rates[c++] = nd_rate;
1887 if (node->nd_txrate < 0) {
1888 /* XXX slow start?? */
1889 node->nd_txrate = 0;
1890 node->nd_node.ni_txrate = i;
1896 KASSERT(node->nd_node.ni_txrate >= 0, ("no compat rates"));
1897 DPRINTF((&ic->ic_if, "node rate %d\n",
1898 IEEERATE(nd_rset->rs_rates[node->nd_node.ni_txrate])));
1901 cp_rset->rs_nrates = c;
1903 node->nd_txrate_upd_intvl = sc->sc_txrate_upd_intvl_min;
1904 node->nd_txrate_upd_time = time_second;
1905 node->nd_txrate_sample = 0;
1909 acx_node_update(struct acx_softc *sc, struct acx_node *node, uint8_t rate,
1912 struct ieee80211_rateset *nd_rset, *cp_rset;
1915 nd_rset = &node->nd_node.ni_rates;
1916 cp_rset = &node->nd_rates;
1918 time_diff = time_second - node->nd_txrate_upd_time;
1920 if (error == DESC_ERR_MSDU_TIMEOUT ||
1921 error == DESC_ERR_EXCESSIVE_RETRY) {
1924 /* Reset packet sample counter */
1925 node->nd_txrate_sample = 0;
1927 if (rate > cp_rset->rs_rates[node->nd_txrate]) {
1929 * This rate has already caused toubles,
1930 * so don't count it in here
1935 /* Double TX rate updating interval */
1936 node->nd_txrate_upd_intvl *= 2;
1937 if (node->nd_txrate_upd_intvl <=
1938 sc->sc_txrate_upd_intvl_min) {
1939 node->nd_txrate_upd_intvl =
1940 sc->sc_txrate_upd_intvl_min;
1941 } else if (node->nd_txrate_upd_intvl >
1942 sc->sc_txrate_upd_intvl_max) {
1943 node->nd_txrate_upd_intvl =
1944 sc->sc_txrate_upd_intvl_max;
1947 if (node->nd_txrate == 0)
1950 node->nd_txrate_upd_time += time_diff;
1954 cur_rate = cp_rset->rs_rates[node->nd_txrate + 1];
1955 while (cp_rset->rs_rates[node->nd_txrate] > cur_rate) {
1956 if (node->nd_txrate - 1 > 0)
1961 DPRINTF((&sc->sc_ic.ic_if, "rate down %6D %d -> %d\n",
1962 node->nd_node.ni_macaddr, ":",
1963 cp_rset->rs_rates[node->nd_txrate + 1],
1964 cp_rset->rs_rates[node->nd_txrate]));
1965 } else if (node->nd_txrate + 1 < node->nd_rates.rs_nrates) {
1968 node->nd_txrate_sample++;
1970 if (node->nd_txrate_sample <= sc->sc_txrate_sample_thresh ||
1971 time_diff <= node->nd_txrate_upd_intvl)
1974 /* Reset packet sample counter */
1975 node->nd_txrate_sample = 0;
1977 /* Half TX rate updating interval */
1978 node->nd_txrate_upd_intvl /= 2;
1979 if (node->nd_txrate_upd_intvl <
1980 sc->sc_txrate_upd_intvl_min) {
1981 node->nd_txrate_upd_intvl =
1982 sc->sc_txrate_upd_intvl_min;
1983 } else if (node->nd_txrate_upd_intvl >
1984 sc->sc_txrate_upd_intvl_max) {
1985 node->nd_txrate_upd_intvl =
1986 sc->sc_txrate_upd_intvl_max;
1989 node->nd_txrate_upd_time += time_diff;
1993 cur_rate = cp_rset->rs_rates[node->nd_txrate - 1];
1994 while (cp_rset->rs_rates[node->nd_txrate] < cur_rate) {
1995 if (node->nd_txrate + 1 < cp_rset->rs_nrates)
2000 DPRINTF((&sc->sc_ic.ic_if, "rate up %6D %d -> %d\n",
2001 node->nd_node.ni_macaddr, ":",
2002 cur_rate, cp_rset->rs_rates[node->nd_txrate]));
2007 #define IEEERATE(rate) ((rate) & IEEE80211_RATE_VAL)
2008 /* XXX Update ieee80211_node's TX rate index */
2009 for (i = 0; i < nd_rset->rs_nrates; ++i) {
2010 if (IEEERATE(nd_rset->rs_rates[i]) ==
2011 cp_rset->rs_rates[node->nd_txrate]) {
2012 node->nd_node.ni_txrate = i;
2020 acx_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
2022 struct acx_softc *sc = ic->ic_if.if_softc;
2025 ASSERT_SERIALIZED(ic->ic_if.if_serializer);
2028 case IEEE80211_S_SCAN:
2029 if (ic->ic_state != IEEE80211_S_INIT) {
2032 chan = ieee80211_chan2ieee(ic, ic->ic_curchan);
2033 ACX_ENABLE_TXCHAN(sc, chan);
2034 ACX_ENABLE_RXCHAN(sc, chan);
2036 callout_reset(&sc->sc_chanscan_timer,
2037 hz / acx_chanscan_rate,
2041 case IEEE80211_S_AUTH:
2042 if (ic->ic_opmode == IEEE80211_M_STA) {
2043 struct ieee80211_node *ni;
2050 if (acx_join_bss(sc, ACX_MODE_STA, ni) != 0) {
2051 if_printf(&ic->ic_if, "join BSS failed\n");
2056 DPRINTF((&ic->ic_if, "join BSS\n"));
2057 if (ic->ic_state == IEEE80211_S_ASSOC) {
2058 DPRINTF((&ic->ic_if,
2059 "change from assoc to run\n"));
2060 ic->ic_state = IEEE80211_S_RUN;
2064 if_printf(&ic->ic_if, "AP rates: ");
2065 for (i = 0; i < ni->ni_rates.rs_nrates; ++i)
2066 printf("%d ", ni->ni_rates.rs_rates[i]);
2067 ieee80211_print_essid(ni->ni_essid, ni->ni_esslen);
2068 printf(" %6D\n", ni->ni_bssid, ":");
2072 case IEEE80211_S_RUN:
2073 if (ic->ic_opmode == IEEE80211_M_IBSS) {
2074 struct ieee80211_node *ni;
2078 chan = ieee80211_chan2ieee(ic, ni->ni_chan);
2082 if (acx_enable_txchan(sc, chan) != 0) {
2083 if_printf(&ic->ic_if,
2084 "enable TX on channel %d failed\n",
2089 if (acx_enable_rxchan(sc, chan) != 0) {
2090 if_printf(&ic->ic_if,
2091 "enable RX on channel %d failed\n",
2096 if (acx_set_beacon_tmplt(sc, ni->ni_essid,
2097 ni->ni_esslen, chan) != 0) {
2098 if_printf(&ic->ic_if,
2099 "set bescon template failed\n");
2103 if (acx_set_probe_resp_tmplt(sc, ni->ni_essid,
2106 if_printf(&ic->ic_if, "set probe response "
2107 "template failed\n");
2111 if (acx_join_bss(sc, ACX_MODE_ADHOC, ni) != 0) {
2112 if_printf(&ic->ic_if, "join IBSS failed\n");
2116 DPRINTF((&ic->ic_if, "join IBSS\n"));
2127 nstate = IEEE80211_S_INIT;
2130 return sc->sc_newstate(ic, nstate, arg);
2134 acx_init_tmplt_ordered(struct acx_softc *sc)
2136 #define INIT_TMPLT(name) \
2138 if (acx_init_##name##_tmplt(sc) != 0) \
2144 * Order of templates initialization:
2150 * Above order is critical to get a correct memory map.
2152 INIT_TMPLT(probe_req);
2153 INIT_TMPLT(null_data);
2156 INIT_TMPLT(probe_resp);
2158 #undef CALL_SET_TMPLT
2163 acx_ring_dma_addr(void *arg, bus_dma_segment_t *seg, int nseg, int error)
2165 *((uint32_t *)arg) = seg->ds_addr;
2169 acx_dma_alloc(struct acx_softc *sc)
2171 struct acx_ring_data *rd = &sc->sc_ring_data;
2172 struct acx_buf_data *bd = &sc->sc_buf_data;
2175 /* Allocate DMA stuffs for RX descriptors */
2176 error = bus_dma_tag_create(NULL, PAGE_SIZE, 0,
2177 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
2179 ACX_RX_RING_SIZE, 1, ACX_RX_RING_SIZE,
2180 0, &rd->rx_ring_dma_tag);
2182 if_printf(&sc->sc_ic.ic_if, "can't create rx ring dma tag\n");
2186 error = bus_dmamem_alloc(rd->rx_ring_dma_tag, (void **)&rd->rx_ring,
2187 BUS_DMA_WAITOK | BUS_DMA_ZERO,
2188 &rd->rx_ring_dmamap);
2190 if_printf(&sc->sc_ic.ic_if,
2191 "can't allocate rx ring dma memory\n");
2192 bus_dma_tag_destroy(rd->rx_ring_dma_tag);
2193 rd->rx_ring_dma_tag = NULL;
2197 error = bus_dmamap_load(rd->rx_ring_dma_tag, rd->rx_ring_dmamap,
2198 rd->rx_ring, ACX_RX_RING_SIZE,
2199 acx_ring_dma_addr, &rd->rx_ring_paddr,
2202 if_printf(&sc->sc_ic.ic_if, "can't get rx ring dma address\n");
2203 bus_dmamem_free(rd->rx_ring_dma_tag, rd->rx_ring,
2204 rd->rx_ring_dmamap);
2205 bus_dma_tag_destroy(rd->rx_ring_dma_tag);
2206 rd->rx_ring_dma_tag = NULL;
2210 /* Allocate DMA stuffs for TX descriptors */
2211 error = bus_dma_tag_create(NULL, PAGE_SIZE, 0,
2212 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
2214 ACX_TX_RING_SIZE, 1, ACX_TX_RING_SIZE,
2215 0, &rd->tx_ring_dma_tag);
2217 if_printf(&sc->sc_ic.ic_if, "can't create tx ring dma tag\n");
2221 error = bus_dmamem_alloc(rd->tx_ring_dma_tag, (void **)&rd->tx_ring,
2222 BUS_DMA_WAITOK | BUS_DMA_ZERO,
2223 &rd->tx_ring_dmamap);
2225 if_printf(&sc->sc_ic.ic_if,
2226 "can't allocate tx ring dma memory\n");
2227 bus_dma_tag_destroy(rd->tx_ring_dma_tag);
2228 rd->tx_ring_dma_tag = NULL;
2232 error = bus_dmamap_load(rd->tx_ring_dma_tag, rd->tx_ring_dmamap,
2233 rd->tx_ring, ACX_TX_RING_SIZE,
2234 acx_ring_dma_addr, &rd->tx_ring_paddr,
2237 if_printf(&sc->sc_ic.ic_if, "can't get tx ring dma address\n");
2238 bus_dmamem_free(rd->tx_ring_dma_tag, rd->tx_ring,
2239 rd->tx_ring_dmamap);
2240 bus_dma_tag_destroy(rd->tx_ring_dma_tag);
2241 rd->tx_ring_dma_tag = NULL;
2245 /* Create DMA tag for RX/TX mbuf map */
2246 error = bus_dma_tag_create(NULL, 1, 0,
2247 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
2249 MCLBYTES, 1, MCLBYTES,
2250 0, &bd->mbuf_dma_tag);
2252 if_printf(&sc->sc_ic.ic_if, "can't create mbuf dma tag\n");
2256 /* Create a spare RX DMA map */
2257 error = bus_dmamap_create(bd->mbuf_dma_tag, 0, &bd->mbuf_tmp_dmamap);
2259 if_printf(&sc->sc_ic.ic_if, "can't create tmp mbuf dma map\n");
2260 bus_dma_tag_destroy(bd->mbuf_dma_tag);
2261 bd->mbuf_dma_tag = NULL;
2265 /* Create DMA map for RX mbufs */
2266 for (i = 0; i < ACX_RX_DESC_CNT; ++i) {
2267 error = bus_dmamap_create(bd->mbuf_dma_tag, 0,
2268 &bd->rx_buf[i].rb_mbuf_dmamap);
2270 if_printf(&sc->sc_ic.ic_if, "can't create rx mbuf "
2271 "dma map (%d)\n", i);
2274 bd->rx_buf[i].rb_desc = &rd->rx_ring[i];
2277 /* Create DMA map for TX mbufs */
2278 for (i = 0; i < ACX_TX_DESC_CNT; ++i) {
2279 error = bus_dmamap_create(bd->mbuf_dma_tag, 0,
2280 &bd->tx_buf[i].tb_mbuf_dmamap);
2282 if_printf(&sc->sc_ic.ic_if, "can't create tx mbuf "
2283 "dma map (%d)\n", i);
2286 bd->tx_buf[i].tb_desc1 = &rd->tx_ring[i * 2];
2287 bd->tx_buf[i].tb_desc2 = &rd->tx_ring[(i * 2) + 1];
2294 acx_dma_free(struct acx_softc *sc)
2296 struct acx_ring_data *rd = &sc->sc_ring_data;
2297 struct acx_buf_data *bd = &sc->sc_buf_data;
2300 if (rd->rx_ring_dma_tag != NULL) {
2301 bus_dmamap_unload(rd->rx_ring_dma_tag, rd->rx_ring_dmamap);
2302 bus_dmamem_free(rd->rx_ring_dma_tag, rd->rx_ring,
2303 rd->rx_ring_dmamap);
2304 bus_dma_tag_destroy(rd->rx_ring_dma_tag);
2307 if (rd->tx_ring_dma_tag != NULL) {
2308 bus_dmamap_unload(rd->tx_ring_dma_tag, rd->tx_ring_dmamap);
2309 bus_dmamem_free(rd->tx_ring_dma_tag, rd->tx_ring,
2310 rd->tx_ring_dmamap);
2311 bus_dma_tag_destroy(rd->tx_ring_dma_tag);
2314 for (i = 0; i < ACX_RX_DESC_CNT; ++i) {
2315 if (bd->rx_buf[i].rb_desc != NULL) {
2316 if (bd->rx_buf[i].rb_mbuf != NULL) {
2317 bus_dmamap_unload(bd->mbuf_dma_tag,
2318 bd->rx_buf[i].rb_mbuf_dmamap);
2319 m_freem(bd->rx_buf[i].rb_mbuf);
2321 bus_dmamap_destroy(bd->mbuf_dma_tag,
2322 bd->rx_buf[i].rb_mbuf_dmamap);
2326 for (i = 0; i < ACX_TX_DESC_CNT; ++i) {
2327 if (bd->tx_buf[i].tb_desc1 != NULL) {
2328 if (bd->tx_buf[i].tb_mbuf != NULL) {
2329 bus_dmamap_unload(bd->mbuf_dma_tag,
2330 bd->tx_buf[i].tb_mbuf_dmamap);
2331 m_freem(bd->tx_buf[i].tb_mbuf);
2333 bus_dmamap_destroy(bd->mbuf_dma_tag,
2334 bd->tx_buf[i].tb_mbuf_dmamap);
2338 if (bd->mbuf_dma_tag != NULL) {
2339 bus_dmamap_destroy(bd->mbuf_dma_tag, bd->mbuf_tmp_dmamap);
2340 bus_dma_tag_destroy(bd->mbuf_dma_tag);
2345 acx_init_tx_ring(struct acx_softc *sc)
2347 struct acx_ring_data *rd;
2348 struct acx_buf_data *bd;
2352 rd = &sc->sc_ring_data;
2353 paddr = rd->tx_ring_paddr;
2354 for (i = 0; i < (ACX_TX_DESC_CNT * 2) - 1; ++i) {
2355 paddr += sizeof(struct acx_host_desc);
2357 rd->tx_ring[i].h_ctrl = htole16(DESC_CTRL_HOSTOWN);
2359 if (i == (ACX_TX_DESC_CNT * 2) - 1)
2360 rd->tx_ring[i].h_next_desc = htole32(rd->tx_ring_paddr);
2362 rd->tx_ring[i].h_next_desc = htole32(paddr);
2365 bus_dmamap_sync(rd->tx_ring_dma_tag, rd->tx_ring_dmamap,
2366 BUS_DMASYNC_PREWRITE);
2368 bd = &sc->sc_buf_data;
2369 bd->tx_free_start = 0;
2370 bd->tx_used_start = 0;
2371 bd->tx_used_count = 0;
2377 acx_init_rx_ring(struct acx_softc *sc)
2379 struct acx_ring_data *rd;
2380 struct acx_buf_data *bd;
2384 bd = &sc->sc_buf_data;
2385 rd = &sc->sc_ring_data;
2386 paddr = rd->rx_ring_paddr;
2388 for (i = 0; i < ACX_RX_DESC_CNT; ++i) {
2391 paddr += sizeof(struct acx_host_desc);
2393 error = acx_newbuf(sc, &bd->rx_buf[i], 1);
2397 if (i == ACX_RX_DESC_CNT - 1)
2398 rd->rx_ring[i].h_next_desc = htole32(rd->rx_ring_paddr);
2400 rd->rx_ring[i].h_next_desc = htole32(paddr);
2403 bus_dmamap_sync(rd->rx_ring_dma_tag, rd->rx_ring_dmamap,
2404 BUS_DMASYNC_PREWRITE);
2406 bd->rx_scan_start = 0;
2411 acx_buf_dma_addr(void *arg, bus_dma_segment_t *seg, int nseg,
2412 bus_size_t mapsz, int error)
2418 KASSERT(nseg == 1, ("too many RX dma segments\n"));
2419 *((uint32_t *)arg) = seg->ds_addr;
2423 acx_newbuf(struct acx_softc *sc, struct acx_rxbuf *rb, int wait)
2425 struct acx_buf_data *bd;
2431 bd = &sc->sc_buf_data;
2433 m = m_getcl(wait ? MB_WAIT : MB_DONTWAIT, MT_DATA, M_PKTHDR);
2437 m->m_len = m->m_pkthdr.len = MCLBYTES;
2439 error = bus_dmamap_load_mbuf(bd->mbuf_dma_tag, bd->mbuf_tmp_dmamap,
2440 m, acx_buf_dma_addr, &paddr,
2441 wait ? BUS_DMA_WAITOK : BUS_DMA_NOWAIT);
2444 if_printf(&sc->sc_ic.ic_if, "can't map rx mbuf %d\n", error);
2448 /* Unload originally mapped mbuf */
2449 bus_dmamap_unload(bd->mbuf_dma_tag, rb->rb_mbuf_dmamap);
2451 /* Swap this dmamap with tmp dmamap */
2452 map = rb->rb_mbuf_dmamap;
2453 rb->rb_mbuf_dmamap = bd->mbuf_tmp_dmamap;
2454 bd->mbuf_tmp_dmamap = map;
2457 rb->rb_desc->h_data_paddr = htole32(paddr);
2458 rb->rb_desc->h_data_len = htole16(m->m_len);
2460 bus_dmamap_sync(bd->mbuf_dma_tag, rb->rb_mbuf_dmamap,
2461 BUS_DMASYNC_PREREAD);
2466 acx_encap(struct acx_softc *sc, struct acx_txbuf *txbuf, struct mbuf *m,
2467 struct ieee80211_node *ni, int rate)
2469 struct acx_buf_data *bd = &sc->sc_buf_data;
2470 struct acx_ring_data *rd = &sc->sc_ring_data;
2471 struct acx_node *node = (struct acx_node *)ni;
2476 KASSERT(txbuf->tb_mbuf == NULL, ("free TX buf has mbuf installed\n"));
2479 if (m->m_pkthdr.len > MCLBYTES) {
2480 if_printf(&sc->sc_ic.ic_if, "mbuf too big\n");
2483 } else if (m->m_pkthdr.len < ACX_FRAME_HDRLEN) {
2484 if_printf(&sc->sc_ic.ic_if, "mbuf too small\n");
2489 error = bus_dmamap_load_mbuf(bd->mbuf_dma_tag, txbuf->tb_mbuf_dmamap,
2490 m, acx_buf_dma_addr, &paddr,
2492 if (error && error != EFBIG) {
2493 if_printf(&sc->sc_ic.ic_if, "can't map tx mbuf1 %d\n", error);
2497 if (error) { /* error == EFBIG */
2500 m_new = m_defrag(m, MB_DONTWAIT);
2501 if (m_new == NULL) {
2502 if_printf(&sc->sc_ic.ic_if, "can't defrag tx mbuf\n");
2509 error = bus_dmamap_load_mbuf(bd->mbuf_dma_tag,
2510 txbuf->tb_mbuf_dmamap, m,
2511 acx_buf_dma_addr, &paddr,
2514 if_printf(&sc->sc_ic.ic_if, "can't map tx mbuf2 %d\n",
2522 bus_dmamap_sync(bd->mbuf_dma_tag, txbuf->tb_mbuf_dmamap,
2523 BUS_DMASYNC_PREWRITE);
2526 txbuf->tb_node = node;
2527 txbuf->tb_rate = rate;
2530 * TX buffers are accessed in following way:
2531 * acx_fw_txdesc -> acx_host_desc -> buffer
2533 * It is quite strange that acx also querys acx_host_desc next to
2534 * the one we have assigned to acx_fw_txdesc even if first one's
2535 * acx_host_desc.h_data_len == acx_fw_txdesc.f_tx_len
2537 * So we allocate two acx_host_desc for one acx_fw_txdesc and
2538 * assign the first acx_host_desc to acx_fw_txdesc
2541 * host_desc1.h_data_len = buffer_len
2542 * host_desc2.h_data_len = buffer_len - mac_header_len
2545 * host_desc1.h_data_len = mac_header_len
2546 * host_desc2.h_data_len = buffer_len - mac_header_len
2549 txbuf->tb_desc1->h_data_paddr = htole32(paddr);
2550 txbuf->tb_desc2->h_data_paddr = htole32(paddr + ACX_FRAME_HDRLEN);
2552 txbuf->tb_desc1->h_data_len =
2553 htole16(sc->chip_txdesc1_len ? sc->chip_txdesc1_len
2555 txbuf->tb_desc2->h_data_len =
2556 htole16(m->m_pkthdr.len - ACX_FRAME_HDRLEN);
2560 * We can't simply assign f_tx_ctrl, we will first read it back
2561 * and change it bit by bit
2563 ctrl = FW_TXDESC_GETFIELD_1(sc, txbuf, f_tx_ctrl);
2564 ctrl |= sc->chip_fw_txdesc_ctrl; /* extra chip specific flags */
2565 ctrl &= ~(DESC_CTRL_HOSTOWN | DESC_CTRL_ACXDONE);
2567 FW_TXDESC_SETFIELD_4(sc, txbuf, f_tx_len, m->m_pkthdr.len);
2568 FW_TXDESC_SETFIELD_1(sc, txbuf, f_tx_error, 0);
2569 FW_TXDESC_SETFIELD_1(sc, txbuf, f_tx_ack_fail, 0);
2570 FW_TXDESC_SETFIELD_1(sc, txbuf, f_tx_rts_fail, 0);
2571 FW_TXDESC_SETFIELD_1(sc, txbuf, f_tx_rts_ok, 0);
2572 sc->chip_set_fw_txdesc_rate(sc, txbuf, rate);
2574 txbuf->tb_desc1->h_ctrl = 0;
2575 txbuf->tb_desc2->h_ctrl = 0;
2576 bus_dmamap_sync(rd->tx_ring_dma_tag, rd->tx_ring_dmamap,
2577 BUS_DMASYNC_PREWRITE);
2579 FW_TXDESC_SETFIELD_1(sc, txbuf, f_tx_ctrl2, 0);
2580 FW_TXDESC_SETFIELD_1(sc, txbuf, f_tx_ctrl, ctrl);
2582 /* Tell chip to inform us about TX completion */
2583 CSR_WRITE_2(sc, ACXREG_INTR_TRIG, ACXRV_TRIG_TX_FINI);
2591 acx_set_null_tmplt(struct acx_softc *sc)
2593 struct acx_tmplt_null_data n;
2594 struct ieee80211_frame *f;
2596 bzero(&n, sizeof(n));
2599 f->i_fc[0] = IEEE80211_FC0_SUBTYPE_NODATA | IEEE80211_FC0_TYPE_DATA;
2600 IEEE80211_ADDR_COPY(f->i_addr1, etherbroadcastaddr);
2601 IEEE80211_ADDR_COPY(f->i_addr2, IF_LLADDR(&sc->sc_ic.ic_if));
2602 IEEE80211_ADDR_COPY(f->i_addr3, etherbroadcastaddr);
2604 return _acx_set_null_data_tmplt(sc, &n, sizeof(n));
2608 acx_set_probe_req_tmplt(struct acx_softc *sc, const char *ssid, int ssid_len)
2610 struct acx_tmplt_probe_req req;
2611 struct ieee80211_frame *f;
2615 bzero(&req, sizeof(req));
2617 f = &req.data.u_data.f;
2618 f->i_fc[0] = IEEE80211_FC0_SUBTYPE_PROBE_REQ | IEEE80211_FC0_TYPE_MGT;
2619 IEEE80211_ADDR_COPY(f->i_addr1, etherbroadcastaddr);
2620 IEEE80211_ADDR_COPY(f->i_addr2, IF_LLADDR(&sc->sc_ic.ic_if));
2621 IEEE80211_ADDR_COPY(f->i_addr3, etherbroadcastaddr);
2623 v = req.data.u_data.var;
2624 v = ieee80211_add_ssid(v, ssid, ssid_len);
2625 v = ieee80211_add_rates(v, &sc->sc_ic.ic_sup_rates[sc->chip_phymode]);
2626 v = ieee80211_add_xrates(v, &sc->sc_ic.ic_sup_rates[sc->chip_phymode]);
2627 vlen = v - req.data.u_data.var;
2629 return _acx_set_probe_req_tmplt(sc, &req,
2630 ACX_TMPLT_PROBE_REQ_SIZ(vlen));
2634 acx_set_probe_resp_tmplt(struct acx_softc *sc, const char *ssid, int ssid_len,
2637 struct acx_tmplt_probe_resp resp;
2638 struct ieee80211_frame *f;
2639 struct ieee80211com *ic;
2645 bzero(&resp, sizeof(resp));
2647 f = &resp.data.u_data.f;
2648 f->i_fc[0] = IEEE80211_FC0_SUBTYPE_PROBE_RESP | IEEE80211_FC0_TYPE_MGT;
2649 IEEE80211_ADDR_COPY(f->i_addr1, etherbroadcastaddr);
2650 IEEE80211_ADDR_COPY(f->i_addr2, IF_LLADDR(&ic->ic_if));
2651 IEEE80211_ADDR_COPY(f->i_addr3, IF_LLADDR(&ic->ic_if));
2653 resp.data.u_data.beacon_intvl = htole16(acx_beacon_intvl);
2654 resp.data.u_data.cap = htole16(IEEE80211_CAPINFO_IBSS);
2656 v = resp.data.u_data.var;
2657 v = ieee80211_add_ssid(v, ssid, ssid_len);
2658 v = ieee80211_add_rates(v, &ic->ic_sup_rates[sc->chip_phymode]);
2660 *v++ = IEEE80211_ELEMID_DSPARMS;
2664 /* This should after IBSS or TIM, but acx always keeps them last */
2665 v = ieee80211_add_xrates(v, &ic->ic_sup_rates[sc->chip_phymode]);
2667 if (ic->ic_opmode == IEEE80211_M_IBSS) {
2668 *v++ = IEEE80211_ELEMID_IBSSPARMS;
2672 vlen = v - resp.data.u_data.var;
2674 return _acx_set_probe_resp_tmplt(sc, &resp,
2675 ACX_TMPLT_PROBE_RESP_SIZ(vlen));
2678 /* XXX C&P of acx_set_probe_resp_tmplt() */
2680 acx_set_beacon_tmplt(struct acx_softc *sc, const char *ssid, int ssid_len,
2683 struct acx_tmplt_beacon beacon;
2684 struct ieee80211_frame *f;
2685 struct ieee80211com *ic;
2691 bzero(&beacon, sizeof(beacon));
2693 f = &beacon.data.u_data.f;
2694 f->i_fc[0] = IEEE80211_FC0_SUBTYPE_BEACON | IEEE80211_FC0_TYPE_MGT;
2695 IEEE80211_ADDR_COPY(f->i_addr1, etherbroadcastaddr);
2696 IEEE80211_ADDR_COPY(f->i_addr2, IF_LLADDR(&ic->ic_if));
2697 IEEE80211_ADDR_COPY(f->i_addr3, IF_LLADDR(&ic->ic_if));
2699 beacon.data.u_data.beacon_intvl = htole16(acx_beacon_intvl);
2700 beacon.data.u_data.cap = htole16(IEEE80211_CAPINFO_IBSS);
2702 v = beacon.data.u_data.var;
2703 v = ieee80211_add_ssid(v, ssid, ssid_len);
2704 v = ieee80211_add_rates(v, &ic->ic_sup_rates[sc->chip_phymode]);
2706 *v++ = IEEE80211_ELEMID_DSPARMS;
2710 /* This should after IBSS or TIM, but acx always keeps them last */
2711 v = ieee80211_add_xrates(v, &ic->ic_sup_rates[sc->chip_phymode]);
2713 if (ic->ic_opmode == IEEE80211_M_IBSS) {
2714 *v++ = IEEE80211_ELEMID_IBSSPARMS;
2718 vlen = v - beacon.data.u_data.var;
2720 return _acx_set_beacon_tmplt(sc, &beacon, ACX_TMPLT_BEACON_SIZ(vlen));
2724 acx_sysctl_txrate_upd_intvl_min(SYSCTL_HANDLER_ARGS)
2726 struct acx_softc *sc = arg1;
2727 struct ifnet *ifp = &sc->sc_ic.ic_if;
2730 lwkt_serialize_enter(ifp->if_serializer);
2732 v = sc->sc_txrate_upd_intvl_min;
2733 error = sysctl_handle_int(oidp, &v, 0, req);
2734 if (error || req->newptr == NULL)
2736 if (v <= 0 || v > sc->sc_txrate_upd_intvl_max) {
2741 sc->sc_txrate_upd_intvl_min = v;
2743 lwkt_serialize_exit(ifp->if_serializer);
2748 acx_sysctl_txrate_upd_intvl_max(SYSCTL_HANDLER_ARGS)
2750 struct acx_softc *sc = arg1;
2751 struct ifnet *ifp = &sc->sc_ic.ic_if;
2754 lwkt_serialize_enter(ifp->if_serializer);
2756 v = sc->sc_txrate_upd_intvl_max;
2757 error = sysctl_handle_int(oidp, &v, 0, req);
2758 if (error || req->newptr == NULL)
2760 if (v <= 0 || v < sc->sc_txrate_upd_intvl_min) {
2765 sc->sc_txrate_upd_intvl_max = v;
2767 lwkt_serialize_exit(ifp->if_serializer);
2772 acx_sysctl_txrate_sample_thresh(SYSCTL_HANDLER_ARGS)
2774 struct acx_softc *sc = arg1;
2775 struct ifnet *ifp = &sc->sc_ic.ic_if;
2778 lwkt_serialize_enter(ifp->if_serializer);
2780 v = sc->sc_txrate_sample_thresh;
2781 error = sysctl_handle_int(oidp, &v, 0, req);
2782 if (error || req->newptr == NULL)
2789 sc->sc_txrate_sample_thresh = v;
2791 lwkt_serialize_exit(ifp->if_serializer);
2796 acx_sysctl_long_retry_limit(SYSCTL_HANDLER_ARGS)
2798 struct acx_softc *sc = arg1;
2799 struct ifnet *ifp = &sc->sc_ic.ic_if;
2802 lwkt_serialize_enter(ifp->if_serializer);
2804 v = sc->sc_long_retry_limit;
2805 error = sysctl_handle_int(oidp, &v, 0, req);
2806 if (error || req->newptr == NULL)
2813 if (sc->sc_flags & ACX_FLAG_FW_LOADED) {
2814 struct acx_conf_nretry_long lretry;
2817 if (acx_set_nretry_long_conf(sc, &lretry) != 0) {
2818 if_printf(ifp, "can't set long retry limit\n");
2823 sc->sc_long_retry_limit = v;
2825 lwkt_serialize_exit(ifp->if_serializer);
2830 acx_sysctl_short_retry_limit(SYSCTL_HANDLER_ARGS)
2832 struct acx_softc *sc = arg1;
2833 struct ifnet *ifp = &sc->sc_ic.ic_if;
2836 lwkt_serialize_enter(ifp->if_serializer);
2838 v = sc->sc_short_retry_limit;
2839 error = sysctl_handle_int(oidp, &v, 0, req);
2840 if (error || req->newptr == NULL)
2847 if (sc->sc_flags & ACX_FLAG_FW_LOADED) {
2848 struct acx_conf_nretry_short sretry;
2851 if (acx_set_nretry_short_conf(sc, &sretry) != 0) {
2852 if_printf(ifp, "can't set short retry limit\n");
2857 sc->sc_short_retry_limit = v;
2859 lwkt_serialize_exit(ifp->if_serializer);
2864 acx_sysctl_msdu_lifetime(SYSCTL_HANDLER_ARGS)
2866 struct acx_softc *sc = arg1;
2867 struct ifnet *ifp = &sc->sc_ic.ic_if;
2870 lwkt_serialize_enter(ifp->if_serializer);
2872 v = sc->sc_msdu_lifetime;
2873 error = sysctl_handle_int(oidp, &v, 0, req);
2874 if (error || req->newptr == NULL)
2881 if (sc->sc_flags & ACX_FLAG_FW_LOADED) {
2882 struct acx_conf_msdu_lifetime msdu_lifetime;
2884 msdu_lifetime.lifetime = htole32(v);
2885 if (acx_set_msdu_lifetime_conf(sc, &msdu_lifetime) != 0) {
2886 if_printf(&sc->sc_ic.ic_if,
2887 "can't set MSDU lifetime\n");
2892 sc->sc_msdu_lifetime = v;
2894 lwkt_serialize_exit(ifp->if_serializer);