1 /* $NetBSD: _setjmp.S,v 1.2 1996/10/17 03:08:03 cgd Exp $ */
2 /* $FreeBSD: src/lib/libstand/alpha/_setjmp.S,v 1.2.2.1 2000/05/18 08:01:16 ps Exp $ */
5 * Copyright (c) 1994, 1995 Carnegie-Mellon University.
8 * Author: Chris G. Demetriou
10 * Permission to use, copy, modify and distribute this software and
11 * its documentation is hereby granted, provided that both the copyright
12 * notice and this permission notice appear in all copies of the
13 * software, derivative works or modified versions, and any portions
14 * thereof, and that both notices appear in supporting documentation.
16 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
17 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
18 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
20 * Carnegie Mellon requests users of this software to return to
22 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
23 * School of Computer Science
24 * Carnegie Mellon University
25 * Pittsburgh PA 15213-3890
27 * any improvements or extensions that they make and grant Carnegie the
28 * rights to redistribute these changes.
31 #include <machine/asm.h>
34 * C library -- _setjmp, _longjmp
37 * will generate a "return(v)" from
40 * by restoring registers from the stack,
41 * The previous signal state is NOT restored.
48 stq ra, (2 * 8)(a0) /* sc_pc = return address */
49 stq s0, (( 9 + 4) * 8)(a0) /* saved bits of sc_regs */
50 stq s1, ((10 + 4) * 8)(a0)
51 stq s2, ((11 + 4) * 8)(a0)
52 stq s3, ((12 + 4) * 8)(a0)
53 stq s4, ((13 + 4) * 8)(a0)
54 stq s5, ((14 + 4) * 8)(a0)
55 stq s6, ((15 + 4) * 8)(a0)
56 stq ra, ((26 + 4) * 8)(a0)
57 stq sp, ((30 + 4) * 8)(a0)
58 ldiq t0, 0xacedbadd /* sigcontext magic number */
59 stq t0, ((31 + 4) * 8)(a0) /* magic in sc_regs[31] */
60 /* Too bad we can't check if we actually used FP */
62 stq t0, (36 * 8)(a0) /* say we've used FP. */
64 stt fs0, ((2 + 37) * 8)(a0) /* saved bits of sc_fpregs */
65 stt fs1, ((3 + 37) * 8)(a0)
66 stt fs2, ((4 + 37) * 8)(a0)
67 stt fs3, ((5 + 37) * 8)(a0)
68 stt fs4, ((6 + 37) * 8)(a0)
69 stt fs5, ((7 + 37) * 8)(a0)
70 stt fs6, ((8 + 37) * 8)(a0)
71 stt fs7, ((9 + 37) * 8)(a0)
72 mf_fpcr ft0 /* get FP control reg */
73 stt ft0, (69 * 8)(a0) /* and store it in sc_fpcr */
74 stq zero, (70 * 8)(a0) /* FP software control XXX */
76 stq zero, (71 * 8)(a0) /* sc_reserved[0] */
77 stq zero, (72 * 8)(a0) /* sc_reserved[1] */
78 stq zero, (73 * 8)(a0) /* sc_xxx[0] */
79 stq zero, (74 * 8)(a0) /* sc_xxx[1] */
80 stq zero, (75 * 8)(a0) /* sc_xxx[2] */
81 stq zero, (76 * 8)(a0) /* sc_xxx[3] */
82 stq zero, (77 * 8)(a0) /* sc_xxx[4] */
83 stq zero, (78 * 8)(a0) /* sc_xxx[5] */
84 stq zero, (79 * 8)(a0) /* sc_xxx[6] */
85 stq zero, (80 * 8)(a0) /* sc_xxx[7] */
87 mov zero, v0 /* return zero */
94 ldq ra, (2 * 8)(a0) /* sc_pc = return address */
95 ldq s0, (( 9 + 4) * 8)(a0) /* saved bits of sc_regs */
96 ldq s1, ((10 + 4) * 8)(a0)
97 ldq s2, ((11 + 4) * 8)(a0)
98 ldq s3, ((12 + 4) * 8)(a0)
99 ldq s4, ((13 + 4) * 8)(a0)
100 ldq s5, ((14 + 4) * 8)(a0)
101 ldq s6, ((15 + 4) * 8)(a0)
102 /* ldq ra, ((26 + 4) * 8)(a0) set above */
103 ldq sp, ((30 + 4) * 8)(a0)
105 ldt fs0, ((2 + 37) * 8)(a0) /* saved bits of sc_fpregs */
106 ldt fs1, ((3 + 37) * 8)(a0)
107 ldt fs2, ((4 + 37) * 8)(a0)
108 ldt fs3, ((5 + 37) * 8)(a0)
109 ldt fs4, ((6 + 37) * 8)(a0)
110 ldt fs5, ((7 + 37) * 8)(a0)
111 ldt fs6, ((8 + 37) * 8)(a0)
112 ldt fs7, ((9 + 37) * 8)(a0)
113 ldt ft0, (69 * 8)(a0) /* get sc_fpcr */
114 mt_fpcr ft0 /* and restore it. */
117 mov a1, v0 /* return second arg */