1 /* drm.h -- Header for Direct Rendering Manager -*- linux-c -*-
2 * Created: Mon Jan 4 10:05:05 1999 by faith@precisioninsight.com
4 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25 * OTHER DEALINGS IN THE SOFTWARE.
28 * Rickard E. (Rik) Faith <faith@valinux.com>
31 * Dec 1999, Richard Henderson <rth@twiddle.net>, move to generic cmpxchg.
33 * $FreeBSD: src/sys/dev/drm/drm.h,v 1.3.2.1 2003/04/26 07:05:27 anholt Exp $
39 #if defined(__linux__)
40 #include <linux/config.h>
41 #include <asm/ioctl.h> /* For _IO* macros */
42 #define DRM_IOCTL_NR(n) _IOC_NR(n)
43 #define DRM_IOC_VOID _IOC_NONE
44 #define DRM_IOC_READ _IOC_READ
45 #define DRM_IOC_WRITE _IOC_WRITE
46 #define DRM_IOC_READWRITE _IOC_READ|_IOC_WRITE
47 #define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)
48 #elif defined(__FreeBSD__) || defined(__NetBSD__)
49 #if defined(__FreeBSD__) && defined(XFree86Server)
50 /* Prevent name collision when including sys/ioccom.h */
52 #include <sys/ioccom.h>
53 #define ioctl(a,b,c) xf86ioctl(a,b,c)
55 #include <sys/ioccom.h>
56 #endif /* __FreeBSD__ && xf86ioctl */
57 #define DRM_IOCTL_NR(n) ((n) & 0xff)
58 #define DRM_IOC_VOID IOC_VOID
59 #define DRM_IOC_READ IOC_OUT
60 #define DRM_IOC_WRITE IOC_IN
61 #define DRM_IOC_READWRITE IOC_INOUT
62 #define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)
65 #define XFREE86_VERSION(major,minor,patch,snap) \
66 ((major << 16) | (minor << 8) | patch)
68 #ifndef CONFIG_XFREE86_VERSION
69 #define CONFIG_XFREE86_VERSION XFREE86_VERSION(4,1,0,0)
72 #if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0)
73 #define DRM_PROC_DEVICES "/proc/devices"
74 #define DRM_PROC_MISC "/proc/misc"
75 #define DRM_PROC_DRM "/proc/drm"
76 #define DRM_DEV_DRM "/dev/drm"
77 #define DRM_DEV_MODE (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP)
82 #if CONFIG_XFREE86_VERSION >= XFREE86_VERSION(4,1,0,0)
84 #define DRM_MAX_MINOR 15
86 #define DRM_NAME "drm" /* Name in kernel, /dev, and /proc */
87 #define DRM_MIN_ORDER 5 /* At least 2^5 bytes = 32 bytes */
88 #define DRM_MAX_ORDER 22 /* Up to 2^22 bytes = 4MB */
89 #define DRM_RAM_PERCENT 10 /* How much system ram can we lock? */
91 #define _DRM_LOCK_HELD 0x80000000 /* Hardware lock is held */
92 #define _DRM_LOCK_CONT 0x40000000 /* Hardware lock is contended */
93 #define _DRM_LOCK_IS_HELD(lock) ((lock) & _DRM_LOCK_HELD)
94 #define _DRM_LOCK_IS_CONT(lock) ((lock) & _DRM_LOCK_CONT)
95 #define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT))
97 typedef unsigned long drm_handle_t;
98 typedef unsigned int drm_context_t;
99 typedef unsigned int drm_drawable_t;
100 typedef unsigned int drm_magic_t;
102 /* Warning: If you change this structure, make sure you change
103 * XF86DRIClipRectRec in the server as well */
105 /* KW: Actually it's illegal to change either for
106 * backwards-compatibility reasons.
109 typedef struct drm_clip_rect {
116 typedef struct drm_tex_region {
119 unsigned char in_use;
120 unsigned char padding;
124 typedef struct drm_version {
125 int version_major; /* Major version */
126 int version_minor; /* Minor version */
127 int version_patchlevel;/* Patch level */
128 size_t name_len; /* Length of name buffer */
129 char *name; /* Name of driver */
130 size_t date_len; /* Length of date buffer */
131 char *date; /* User-space buffer to hold date */
132 size_t desc_len; /* Length of desc buffer */
133 char *desc; /* User-space buffer to hold desc */
136 typedef struct drm_unique {
137 size_t unique_len; /* Length of unique */
138 char *unique; /* Unique name for driver instantiation */
141 typedef struct drm_list {
142 int count; /* Length of user-space structures */
143 drm_version_t *version;
146 typedef struct drm_block {
150 typedef struct drm_control {
160 typedef enum drm_map_type {
161 _DRM_FRAME_BUFFER = 0, /* WC (no caching), no core dump */
162 _DRM_REGISTERS = 1, /* no caching, no core dump */
163 _DRM_SHM = 2, /* shared, cached */
164 _DRM_AGP = 3, /* AGP/GART */
165 _DRM_SCATTER_GATHER = 4 /* Scatter/gather memory for PCI DMA */
168 typedef enum drm_map_flags {
169 _DRM_RESTRICTED = 0x01, /* Cannot be mapped to user-virtual */
170 _DRM_READ_ONLY = 0x02,
171 _DRM_LOCKED = 0x04, /* shared, cached, locked */
172 _DRM_KERNEL = 0x08, /* kernel requires access */
173 _DRM_WRITE_COMBINING = 0x10, /* use write-combining if available */
174 _DRM_CONTAINS_LOCK = 0x20, /* SHM page that contains lock */
175 _DRM_REMOVABLE = 0x40 /* Removable mapping */
178 typedef struct drm_ctx_priv_map {
179 unsigned int ctx_id; /* Context requesting private mapping */
180 void *handle; /* Handle of map */
181 } drm_ctx_priv_map_t;
183 typedef struct drm_map {
184 unsigned long offset; /* Requested physical address (0 for SAREA)*/
185 unsigned long size; /* Requested physical size (bytes) */
186 drm_map_type_t type; /* Type of memory to map */
187 drm_map_flags_t flags; /* Flags */
188 void *handle; /* User-space: "Handle" to pass to mmap */
189 /* Kernel-space: kernel-virtual address */
190 int mtrr; /* MTRR slot used */
194 typedef struct drm_client {
195 int idx; /* Which client desired? */
196 int auth; /* Is client authenticated? */
197 unsigned long pid; /* Process id */
198 unsigned long uid; /* User id */
199 unsigned long magic; /* Magic */
200 unsigned long iocs; /* Ioctl count */
210 _DRM_STAT_VALUE, /* Generic value */
211 _DRM_STAT_BYTE, /* Generic byte counter (1024bytes/K) */
212 _DRM_STAT_COUNT, /* Generic non-byte counter (1000/k) */
214 _DRM_STAT_IRQ, /* IRQ */
215 _DRM_STAT_PRIMARY, /* Primary DMA bytes */
216 _DRM_STAT_SECONDARY, /* Secondary DMA bytes */
217 _DRM_STAT_DMA, /* DMA */
218 _DRM_STAT_SPECIAL, /* Special DMA (e.g., priority or polled) */
219 _DRM_STAT_MISSED /* Missed DMA opportunity */
221 /* Add to the *END* of the list */
224 typedef struct drm_stats {
228 drm_stat_type_t type;
232 typedef enum drm_lock_flags {
233 _DRM_LOCK_READY = 0x01, /* Wait until hardware is ready for DMA */
234 _DRM_LOCK_QUIESCENT = 0x02, /* Wait until hardware quiescent */
235 _DRM_LOCK_FLUSH = 0x04, /* Flush this context's DMA queue first */
236 _DRM_LOCK_FLUSH_ALL = 0x08, /* Flush all DMA queues first */
237 /* These *HALT* flags aren't supported yet
238 -- they will be used to support the
239 full-screen DGA-like mode. */
240 _DRM_HALT_ALL_QUEUES = 0x10, /* Halt all current and future queues */
241 _DRM_HALT_CUR_QUEUES = 0x20 /* Halt all current queues */
244 typedef struct drm_lock {
246 drm_lock_flags_t flags;
249 typedef enum drm_dma_flags { /* These values *MUST* match xf86drm.h */
250 /* Flags for DMA buffer dispatch */
251 _DRM_DMA_BLOCK = 0x01, /* Block until buffer dispatched.
252 Note, the buffer may not yet have
253 been processed by the hardware --
254 getting a hardware lock with the
255 hardware quiescent will ensure
256 that the buffer has been
258 _DRM_DMA_WHILE_LOCKED = 0x02, /* Dispatch while lock held */
259 _DRM_DMA_PRIORITY = 0x04, /* High priority dispatch */
261 /* Flags for DMA buffer request */
262 _DRM_DMA_WAIT = 0x10, /* Wait for free buffers */
263 _DRM_DMA_SMALLER_OK = 0x20, /* Smaller-than-requested buffers ok */
264 _DRM_DMA_LARGER_OK = 0x40 /* Larger-than-requested buffers ok */
267 typedef struct drm_buf_desc {
268 int count; /* Number of buffers of this size */
269 int size; /* Size in bytes */
270 int low_mark; /* Low water mark */
271 int high_mark; /* High water mark */
273 _DRM_PAGE_ALIGN = 0x01, /* Align on page boundaries for DMA */
274 _DRM_AGP_BUFFER = 0x02, /* Buffer is in agp space */
275 _DRM_SG_BUFFER = 0x04 /* Scatter/gather memory buffer */
277 unsigned long agp_start; /* Start address of where the agp buffers
278 * are in the agp aperture */
281 typedef struct drm_buf_info {
282 int count; /* Entries in list */
283 drm_buf_desc_t *list;
286 typedef struct drm_buf_free {
291 typedef struct drm_buf_pub {
292 int idx; /* Index into master buflist */
293 int total; /* Buffer size */
294 int used; /* Amount of buffer in use (for DMA) */
295 void *address; /* Address of buffer */
298 typedef struct drm_buf_map {
299 int count; /* Length of buflist */
300 void *virtual; /* Mmaped area in user-virtual */
301 drm_buf_pub_t *list; /* Buffer information */
304 typedef struct drm_dma {
305 /* Indices here refer to the offset into
306 buflist in drm_buf_get_t. */
307 int context; /* Context handle */
308 int send_count; /* Number of buffers to send */
309 int *send_indices; /* List of handles to buffers */
310 int *send_sizes; /* Lengths of data to send */
311 drm_dma_flags_t flags; /* Flags */
312 int request_count; /* Number of buffers requested */
313 int request_size; /* Desired size for buffers */
314 int *request_indices; /* Buffer information */
316 int granted_count; /* Number of buffers granted */
320 _DRM_CONTEXT_PRESERVED = 0x01,
321 _DRM_CONTEXT_2DONLY = 0x02
324 typedef struct drm_ctx {
325 drm_context_t handle;
326 drm_ctx_flags_t flags;
329 typedef struct drm_ctx_res {
334 typedef struct drm_draw {
335 drm_drawable_t handle;
338 typedef struct drm_auth {
342 typedef struct drm_irq_busid {
350 _DRM_VBLANK_ABSOLUTE = 0x0, /* Wait for specific vblank sequence number */
351 _DRM_VBLANK_RELATIVE = 0x1, /* Wait for given number of vblanks */
352 _DRM_VBLANK_SIGNAL = 0x40000000 /* Send signal instead of blocking */
353 } drm_vblank_seq_type_t;
355 #define _DRM_VBLANK_FLAGS_MASK _DRM_VBLANK_SIGNAL
357 struct drm_wait_vblank_request {
358 drm_vblank_seq_type_t type;
359 unsigned int sequence;
360 unsigned long signal;
363 struct drm_wait_vblank_reply {
364 drm_vblank_seq_type_t type;
365 unsigned int sequence;
370 typedef union drm_wait_vblank {
371 struct drm_wait_vblank_request request;
372 struct drm_wait_vblank_reply reply;
375 typedef struct drm_agp_mode {
379 /* For drm_agp_alloc -- allocated a buffer */
380 typedef struct drm_agp_buffer {
381 unsigned long size; /* In bytes -- will round to page boundary */
382 unsigned long handle; /* Used for BIND/UNBIND ioctls */
383 unsigned long type; /* Type of memory to allocate */
384 unsigned long physical; /* Physical used by i810 */
387 /* For drm_agp_bind */
388 typedef struct drm_agp_binding {
389 unsigned long handle; /* From drm_agp_buffer */
390 unsigned long offset; /* In bytes -- will round to page boundary */
393 typedef struct drm_agp_info {
394 int agp_version_major;
395 int agp_version_minor;
397 unsigned long aperture_base; /* physical address */
398 unsigned long aperture_size; /* bytes */
399 unsigned long memory_allowed; /* bytes */
400 unsigned long memory_used;
402 /* PCI information */
403 unsigned short id_vendor;
404 unsigned short id_device;
407 typedef struct drm_scatter_gather {
408 unsigned long size; /* In bytes -- will round to page boundary */
409 unsigned long handle; /* Used for mapping / unmapping */
410 } drm_scatter_gather_t;
412 #define DRM_IOCTL_BASE 'd'
413 #define DRM_IO(nr) _IO(DRM_IOCTL_BASE,nr)
414 #define DRM_IOR(nr,type) _IOR(DRM_IOCTL_BASE,nr,type)
415 #define DRM_IOW(nr,type) _IOW(DRM_IOCTL_BASE,nr,type)
416 #define DRM_IOWR(nr,type) _IOWR(DRM_IOCTL_BASE,nr,type)
418 #define DRM_IOCTL_VERSION DRM_IOWR(0x00, drm_version_t)
419 #define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, drm_unique_t)
420 #define DRM_IOCTL_GET_MAGIC DRM_IOR( 0x02, drm_auth_t)
421 #define DRM_IOCTL_IRQ_BUSID DRM_IOWR(0x03, drm_irq_busid_t)
422 #define DRM_IOCTL_GET_MAP DRM_IOWR(0x04, drm_map_t)
423 #define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, drm_client_t)
424 #define DRM_IOCTL_GET_STATS DRM_IOR( 0x06, drm_stats_t)
426 #define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, drm_unique_t)
427 #define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, drm_auth_t)
428 #define DRM_IOCTL_BLOCK DRM_IOWR(0x12, drm_block_t)
429 #define DRM_IOCTL_UNBLOCK DRM_IOWR(0x13, drm_block_t)
430 #define DRM_IOCTL_CONTROL DRM_IOW( 0x14, drm_control_t)
431 #define DRM_IOCTL_ADD_MAP DRM_IOWR(0x15, drm_map_t)
432 #define DRM_IOCTL_ADD_BUFS DRM_IOWR(0x16, drm_buf_desc_t)
433 #define DRM_IOCTL_MARK_BUFS DRM_IOW( 0x17, drm_buf_desc_t)
434 #define DRM_IOCTL_INFO_BUFS DRM_IOWR(0x18, drm_buf_info_t)
435 #define DRM_IOCTL_MAP_BUFS DRM_IOWR(0x19, drm_buf_map_t)
436 #define DRM_IOCTL_FREE_BUFS DRM_IOW( 0x1a, drm_buf_free_t)
438 #define DRM_IOCTL_RM_MAP DRM_IOW( 0x1b, drm_map_t)
440 #define DRM_IOCTL_SET_SAREA_CTX DRM_IOW( 0x1c, drm_ctx_priv_map_t)
441 #define DRM_IOCTL_GET_SAREA_CTX DRM_IOWR(0x1d, drm_ctx_priv_map_t)
443 #define DRM_IOCTL_ADD_CTX DRM_IOWR(0x20, drm_ctx_t)
444 #define DRM_IOCTL_RM_CTX DRM_IOWR(0x21, drm_ctx_t)
445 #define DRM_IOCTL_MOD_CTX DRM_IOW( 0x22, drm_ctx_t)
446 #define DRM_IOCTL_GET_CTX DRM_IOWR(0x23, drm_ctx_t)
447 #define DRM_IOCTL_SWITCH_CTX DRM_IOW( 0x24, drm_ctx_t)
448 #define DRM_IOCTL_NEW_CTX DRM_IOW( 0x25, drm_ctx_t)
449 #define DRM_IOCTL_RES_CTX DRM_IOWR(0x26, drm_ctx_res_t)
450 #define DRM_IOCTL_ADD_DRAW DRM_IOWR(0x27, drm_draw_t)
451 #define DRM_IOCTL_RM_DRAW DRM_IOWR(0x28, drm_draw_t)
452 #define DRM_IOCTL_DMA DRM_IOWR(0x29, drm_dma_t)
453 #define DRM_IOCTL_LOCK DRM_IOW( 0x2a, drm_lock_t)
454 #define DRM_IOCTL_UNLOCK DRM_IOW( 0x2b, drm_lock_t)
455 #define DRM_IOCTL_FINISH DRM_IOW( 0x2c, drm_lock_t)
457 #define DRM_IOCTL_AGP_ACQUIRE DRM_IO( 0x30)
458 #define DRM_IOCTL_AGP_RELEASE DRM_IO( 0x31)
459 #define DRM_IOCTL_AGP_ENABLE DRM_IOW( 0x32, drm_agp_mode_t)
460 #define DRM_IOCTL_AGP_INFO DRM_IOR( 0x33, drm_agp_info_t)
461 #define DRM_IOCTL_AGP_ALLOC DRM_IOWR(0x34, drm_agp_buffer_t)
462 #define DRM_IOCTL_AGP_FREE DRM_IOW( 0x35, drm_agp_buffer_t)
463 #define DRM_IOCTL_AGP_BIND DRM_IOW( 0x36, drm_agp_binding_t)
464 #define DRM_IOCTL_AGP_UNBIND DRM_IOW( 0x37, drm_agp_binding_t)
466 #define DRM_IOCTL_SG_ALLOC DRM_IOW( 0x38, drm_scatter_gather_t)
467 #define DRM_IOCTL_SG_FREE DRM_IOW( 0x39, drm_scatter_gather_t)
469 #define DRM_IOCTL_WAIT_VBLANK DRM_IOWR(0x3a, drm_wait_vblank_t)
471 /* Device specfic ioctls should only be in their respective headers
472 * The device specific ioctl range is 0x40 to 0x79. */
473 #define DRM_COMMAND_BASE 0x40