sys/dev/agp/agp_i810.c

   1 /*
   2  * Copyright (c) 2000 Doug Rabson
   3  * Copyright (c) 2000 Ruslan Ermilov
   4  * Copyright (c) 2011 The FreeBSD Foundation
   5  * All rights reserved.
   6  *
   7  * Portions of this software were developed by Konstantin Belousov
   8  * under sponsorship from the FreeBSD Foundation.
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions
  12  * are met:
  13  * 1. Redistributions of source code must retain the above copyright
  14  *    notice, this list of conditions and the following disclaimer.
  15  * 2. Redistributions in binary form must reproduce the above copyright
  16  *    notice, this list of conditions and the following disclaimer in the
  17  *    documentation and/or other materials provided with the distribution.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  20  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  22  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  23  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  24  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  25  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  27  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  28  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  29  * SUCH DAMAGE.
  30  */
  31
  32 /*
  33  * Fixes for 830/845G support: David Dawes <dawes@xfree86.org>
  34  * 852GM/855GM/865G support added by David Dawes <dawes@xfree86.org>
  35  *
  36  * This is generic Intel GTT handling code, morphed from the AGP
  37  * bridge code.
  38  */
  39
  40 #if 0
  41 #define KTR_AGP_I810    KTR_DEV
  42 #else
  43 #define KTR_AGP_I810    0
  44 #endif
  45
  46 #include <sys/param.h>
  47 #include <sys/systm.h>
  48 #include <sys/malloc.h>
  49 #include <sys/kernel.h>
  50 #include <sys/bus.h>
  51 #include <sys/lock.h>
  52 #include <sys/rman.h>
  53
  54 #include "pcidevs.h"
  55 #include <bus/pci/pcivar.h>
  56 #include <bus/pci/pcireg.h>
  57 #include "agppriv.h"
  58 #include "agpreg.h"
  59 #include <drm/intel-gtt.h>
  60
  61 #include <vm/vm.h>
  62 #include <vm/vm_object.h>
  63 #include <vm/vm_page.h>
  64 #include <vm/vm_pageout.h>
  65 #include <vm/pmap.h>
  66
  67 #include <machine/md_var.h>
  68
  69 #define bus_read_1(r, o) \
  70                    bus_space_read_1((r)->r_bustag, (r)->r_bushandle, (o))
  71 #define bus_read_4(r, o) \
  72                    bus_space_read_4((r)->r_bustag, (r)->r_bushandle, (o))
  73 #define bus_write_4(r, o, v) \
  74                     bus_space_write_4((r)->r_bustag, (r)->r_bushandle, (o), (v))
  75
  76 MALLOC_DECLARE(M_AGP);
  77
  78 struct agp_i810_match;
  79
  80 static int agp_i915_check_active(device_t bridge_dev);
  81 static int agp_sb_check_active(device_t bridge_dev);
  82
  83 static void agp_i810_set_desc(device_t dev, const struct agp_i810_match *match);
  84
  85 static void agp_i915_dump_regs(device_t dev);
  86 static void agp_i965_dump_regs(device_t dev);
  87 static void agp_sb_dump_regs(device_t dev);
  88
  89 static int agp_i915_get_stolen_size(device_t dev);
  90 static int agp_sb_get_stolen_size(device_t dev);
  91 static int agp_gen8_get_stolen_size(device_t dev);
  92
  93 static int agp_i915_get_gtt_mappable_entries(device_t dev);
  94
  95 static int agp_i810_get_gtt_total_entries(device_t dev);
  96 static int agp_i965_get_gtt_total_entries(device_t dev);
  97 static int agp_gen5_get_gtt_total_entries(device_t dev);
  98 static int agp_sb_get_gtt_total_entries(device_t dev);
  99 static int agp_gen8_get_gtt_total_entries(device_t dev);
 100
 101 static int agp_i830_install_gatt(device_t dev);
 102
 103 static void agp_i830_deinstall_gatt(device_t dev);
 104
 105 static void agp_i915_install_gtt_pte(device_t dev, u_int index,
 106     vm_offset_t physical, int flags);
 107 static void agp_i965_install_gtt_pte(device_t dev, u_int index,
 108     vm_offset_t physical, int flags);
 109 static void agp_g4x_install_gtt_pte(device_t dev, u_int index,
 110     vm_offset_t physical, int flags);
 111 static void agp_sb_install_gtt_pte(device_t dev, u_int index,
 112     vm_offset_t physical, int flags);
 113 static void agp_gen8_install_gtt_pte(device_t dev, u_int index,
 114     vm_offset_t physical, int flags);
 115
 116 static void agp_i915_write_gtt(device_t dev, u_int index, uint32_t pte);
 117 static void agp_i965_write_gtt(device_t dev, u_int index, uint32_t pte);
 118 static void agp_g4x_write_gtt(device_t dev, u_int index, uint32_t pte);
 119 static void agp_sb_write_gtt(device_t dev, u_int index, uint32_t pte);
 120
 121 static void agp_i915_sync_gtt_pte(device_t dev, u_int index);
 122 static void agp_i965_sync_gtt_pte(device_t dev, u_int index);
 123 static void agp_g4x_sync_gtt_pte(device_t dev, u_int index);
 124
 125 static int agp_i915_set_aperture(device_t dev, u_int32_t aperture);
 126
 127 static int agp_i810_chipset_flush_setup(device_t dev);
 128 static int agp_i915_chipset_flush_setup(device_t dev);
 129 static int agp_i965_chipset_flush_setup(device_t dev);
 130
 131 static void agp_i810_chipset_flush_teardown(device_t dev);
 132 static void agp_i915_chipset_flush_teardown(device_t dev);
 133 static void agp_i965_chipset_flush_teardown(device_t dev);
 134
 135 static void agp_i810_chipset_flush(device_t dev);
 136 static void agp_i915_chipset_flush(device_t dev);
 137
 138 enum {
 139         CHIP_I810,      /* i810/i815 */
 140         CHIP_I830,      /* 830M/845G */
 141         CHIP_I855,      /* 852GM/855GM/865G */
 142         CHIP_I915,      /* 915G/915GM */
 143         CHIP_I965,      /* G965 */
 144         CHIP_G33,       /* G33/Q33/Q35 */
 145         CHIP_IGD,       /* Pineview */
 146         CHIP_G4X,       /* G45/Q45 */
 147         CHIP_SB,        /* SandyBridge */
 148 };
 149
 150 /* The i810 through i855 have the registers at BAR 1, and the GATT gets
 151  * allocated by us.  The i915 has registers in BAR 0 and the GATT is at the
 152  * start of the stolen memory, and should only be accessed by the OS through
 153  * BAR 3.  The G965 has registers and GATT in the same BAR (0) -- first 512KB
 154  * is registers, second 512KB is GATT.
 155  */
 156 static struct resource_spec agp_i915_res_spec[] = {
 157         { SYS_RES_MEMORY, AGP_I915_MMADR, RF_ACTIVE | RF_SHAREABLE },
 158         { SYS_RES_MEMORY, AGP_I915_GTTADR, RF_ACTIVE | RF_SHAREABLE },
 159         { -1, 0 }
 160 };
 161
 162 static struct resource_spec agp_i965_res_spec[] = {
 163         { SYS_RES_MEMORY, AGP_I965_GTTMMADR, RF_ACTIVE | RF_SHAREABLE },
 164         { -1, 0 }
 165 };
 166
 167 static struct resource_spec agp_g4x_res_spec[] = {
 168         { SYS_RES_MEMORY, AGP_G4X_MMADR, RF_ACTIVE | RF_SHAREABLE },
 169         { SYS_RES_MEMORY, AGP_G4X_GTTADR, RF_ACTIVE | RF_SHAREABLE },
 170         { -1, 0 }
 171 };
 172
 173 struct agp_i810_softc {
 174         struct agp_softc agp;
 175         u_int32_t initial_aperture;     /* aperture size at startup */
 176         struct agp_gatt *gatt;
 177         u_int32_t dcache_size;          /* i810 only */
 178         u_int32_t stolen;               /* number of i830/845 gtt
 179                                            entries for stolen memory */
 180         u_int stolen_size;              /* BIOS-reserved graphics memory */
 181         u_int gtt_total_entries;        /* Total number of gtt ptes */
 182         u_int gtt_mappable_entries;     /* Number of gtt ptes mappable by CPU */
 183         device_t bdev;                  /* bridge device */
 184         void *argb_cursor;              /* contigmalloc area for ARGB cursor */
 185         struct resource *sc_res[2];
 186         const struct agp_i810_match *match;
 187         int sc_flush_page_rid;
 188         struct resource *sc_flush_page_res;
 189         void *sc_flush_page_vaddr;
 190         int sc_bios_allocated_flush_page;
 191 };
 192
 193 static device_t intel_agp;
 194
 195 struct agp_i810_driver {
 196         int chiptype;
 197         int gen;
 198         int busdma_addr_mask_sz;
 199         struct resource_spec *res_spec;
 200         int (*check_active)(device_t);
 201         void (*set_desc)(device_t, const struct agp_i810_match *);
 202         void (*dump_regs)(device_t);
 203         int (*get_stolen_size)(device_t);
 204         int (*get_gtt_total_entries)(device_t);
 205         int (*get_gtt_mappable_entries)(device_t);
 206         int (*install_gatt)(device_t);
 207         void (*deinstall_gatt)(device_t);
 208         void (*write_gtt)(device_t, u_int, uint32_t);
 209         void (*install_gtt_pte)(device_t, u_int, vm_offset_t, int);
 210         void (*sync_gtt_pte)(device_t, u_int);
 211         int (*set_aperture)(device_t, u_int32_t);
 212         int (*chipset_flush_setup)(device_t);
 213         void (*chipset_flush_teardown)(device_t);
 214         void (*chipset_flush)(device_t);
 215 };
 216
 217 static struct {
 218         struct intel_gtt base;
 219 } intel_private;
 220
 221 static const struct agp_i810_driver agp_i810_i915_driver = {
 222         .chiptype = CHIP_I915,
 223         .gen = 3,
 224         .busdma_addr_mask_sz = 32,
 225         .res_spec = agp_i915_res_spec,
 226         .check_active = agp_i915_check_active,
 227         .set_desc = agp_i810_set_desc,
 228         .dump_regs = agp_i915_dump_regs,
 229         .get_stolen_size = agp_i915_get_stolen_size,
 230         .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
 231         .get_gtt_total_entries = agp_i810_get_gtt_total_entries,
 232         .install_gatt = agp_i830_install_gatt,
 233         .deinstall_gatt = agp_i830_deinstall_gatt,
 234         .write_gtt = agp_i915_write_gtt,
 235         .install_gtt_pte = agp_i915_install_gtt_pte,
 236         .sync_gtt_pte = agp_i915_sync_gtt_pte,
 237         .set_aperture = agp_i915_set_aperture,
 238         .chipset_flush_setup = agp_i915_chipset_flush_setup,
 239         .chipset_flush_teardown = agp_i915_chipset_flush_teardown,
 240         .chipset_flush = agp_i915_chipset_flush,
 241 };
 242
 243 static const struct agp_i810_driver agp_i810_g965_driver = {
 244         .chiptype = CHIP_I965,
 245         .gen = 4,
 246         .busdma_addr_mask_sz = 36,
 247         .res_spec = agp_i965_res_spec,
 248         .check_active = agp_i915_check_active,
 249         .set_desc = agp_i810_set_desc,
 250         .dump_regs = agp_i965_dump_regs,
 251         .get_stolen_size = agp_i915_get_stolen_size,
 252         .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
 253         .get_gtt_total_entries = agp_i965_get_gtt_total_entries,
 254         .install_gatt = agp_i830_install_gatt,
 255         .deinstall_gatt = agp_i830_deinstall_gatt,
 256         .write_gtt = agp_i965_write_gtt,
 257         .install_gtt_pte = agp_i965_install_gtt_pte,
 258         .sync_gtt_pte = agp_i965_sync_gtt_pte,
 259         .set_aperture = agp_i915_set_aperture,
 260         .chipset_flush_setup = agp_i965_chipset_flush_setup,
 261         .chipset_flush_teardown = agp_i965_chipset_flush_teardown,
 262         .chipset_flush = agp_i915_chipset_flush,
 263 };
 264
 265 static const struct agp_i810_driver agp_i810_g33_driver = {
 266         .chiptype = CHIP_G33,
 267         .gen = 3,
 268         .busdma_addr_mask_sz = 36,
 269         .res_spec = agp_i915_res_spec,
 270         .check_active = agp_i915_check_active,
 271         .set_desc = agp_i810_set_desc,
 272         .dump_regs = agp_i965_dump_regs,
 273         .get_stolen_size = agp_i915_get_stolen_size,
 274         .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
 275         .get_gtt_total_entries = agp_i965_get_gtt_total_entries,
 276         .install_gatt = agp_i830_install_gatt,
 277         .deinstall_gatt = agp_i830_deinstall_gatt,
 278         .write_gtt = agp_i915_write_gtt,
 279         .install_gtt_pte = agp_i965_install_gtt_pte,
 280         .sync_gtt_pte = agp_i915_sync_gtt_pte,
 281         .set_aperture = agp_i915_set_aperture,
 282         .chipset_flush_setup = agp_i965_chipset_flush_setup,
 283         .chipset_flush_teardown = agp_i965_chipset_flush_teardown,
 284         .chipset_flush = agp_i915_chipset_flush,
 285 };
 286
 287 static const struct agp_i810_driver pineview_gtt_driver = {
 288         .chiptype = CHIP_IGD,
 289         .gen = 3,
 290         .busdma_addr_mask_sz = 36,
 291         .res_spec = agp_i915_res_spec,
 292         .check_active = agp_i915_check_active,
 293         .set_desc = agp_i810_set_desc,
 294         .dump_regs = agp_i915_dump_regs,
 295         .get_stolen_size = agp_i915_get_stolen_size,
 296         .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
 297         .get_gtt_total_entries = agp_i965_get_gtt_total_entries,
 298         .install_gatt = agp_i830_install_gatt,
 299         .deinstall_gatt = agp_i830_deinstall_gatt,
 300         .write_gtt = agp_i915_write_gtt,
 301         .install_gtt_pte = agp_i965_install_gtt_pte,
 302         .sync_gtt_pte = agp_i915_sync_gtt_pte,
 303         .set_aperture = agp_i915_set_aperture,
 304         .chipset_flush_setup = agp_i965_chipset_flush_setup,
 305         .chipset_flush_teardown = agp_i965_chipset_flush_teardown,
 306         .chipset_flush = agp_i915_chipset_flush,
 307 };
 308
 309 static const struct agp_i810_driver agp_i810_g4x_driver = {
 310         .chiptype = CHIP_G4X,
 311         .gen = 5,
 312         .busdma_addr_mask_sz = 36,
 313         .res_spec = agp_i965_res_spec,
 314         .check_active = agp_i915_check_active,
 315         .set_desc = agp_i810_set_desc,
 316         .dump_regs = agp_i965_dump_regs,
 317         .get_stolen_size = agp_i915_get_stolen_size,
 318         .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
 319         .get_gtt_total_entries = agp_gen5_get_gtt_total_entries,
 320         .install_gatt = agp_i830_install_gatt,
 321         .deinstall_gatt = agp_i830_deinstall_gatt,
 322         .write_gtt = agp_g4x_write_gtt,
 323         .install_gtt_pte = agp_g4x_install_gtt_pte,
 324         .sync_gtt_pte = agp_g4x_sync_gtt_pte,
 325         .set_aperture = agp_i915_set_aperture,
 326         .chipset_flush_setup = agp_i965_chipset_flush_setup,
 327         .chipset_flush_teardown = agp_i965_chipset_flush_teardown,
 328         .chipset_flush = agp_i915_chipset_flush,
 329 };
 330
 331 static const struct agp_i810_driver agp_i810_sb_driver = {
 332         .chiptype = CHIP_SB,
 333         .gen = 6,
 334         .busdma_addr_mask_sz = 40,
 335         .res_spec = agp_g4x_res_spec,
 336         .check_active = agp_sb_check_active,
 337         .set_desc = agp_i810_set_desc,
 338         .dump_regs = agp_sb_dump_regs,
 339         .get_stolen_size = agp_sb_get_stolen_size,
 340         .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
 341         .get_gtt_total_entries = agp_sb_get_gtt_total_entries,
 342         .install_gatt = agp_i830_install_gatt,
 343         .deinstall_gatt = agp_i830_deinstall_gatt,
 344         .write_gtt = agp_sb_write_gtt,
 345         .install_gtt_pte = agp_sb_install_gtt_pte,
 346         .sync_gtt_pte = agp_g4x_sync_gtt_pte,
 347         .set_aperture = agp_i915_set_aperture,
 348         .chipset_flush_setup = agp_i810_chipset_flush_setup,
 349         .chipset_flush_teardown = agp_i810_chipset_flush_teardown,
 350         .chipset_flush = agp_i810_chipset_flush,
 351 };
 352
 353 static const struct agp_i810_driver valleyview_gtt_driver = {
 354         .chiptype = CHIP_SB,
 355         .gen = 7,
 356         .busdma_addr_mask_sz = 40,
 357         .res_spec = agp_g4x_res_spec,
 358         .check_active = agp_sb_check_active,
 359         .set_desc = agp_i810_set_desc,
 360         .dump_regs = agp_sb_dump_regs,
 361         .get_stolen_size = agp_sb_get_stolen_size,
 362         .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
 363         .get_gtt_total_entries = agp_sb_get_gtt_total_entries,
 364         .install_gatt = agp_i830_install_gatt,
 365         .deinstall_gatt = agp_i830_deinstall_gatt,
 366         .write_gtt = agp_sb_write_gtt,
 367         .install_gtt_pte = agp_sb_install_gtt_pte,
 368         .sync_gtt_pte = agp_g4x_sync_gtt_pte,
 369         .set_aperture = agp_i915_set_aperture,
 370         .chipset_flush_setup = agp_i810_chipset_flush_setup,
 371         .chipset_flush_teardown = agp_i810_chipset_flush_teardown,
 372         .chipset_flush = agp_i810_chipset_flush,
 373 };
 374
 375 static const struct agp_i810_driver broadwell_gtt_driver = {
 376         .chiptype = CHIP_SB,
 377         .gen = 8,
 378         .busdma_addr_mask_sz = 40,
 379         .res_spec = agp_g4x_res_spec,
 380         .check_active = agp_sb_check_active,
 381         .set_desc = agp_i810_set_desc,
 382         .dump_regs = agp_sb_dump_regs,
 383         .get_stolen_size = agp_gen8_get_stolen_size,
 384         .get_gtt_mappable_entries = agp_i915_get_gtt_mappable_entries,
 385         .get_gtt_total_entries = agp_gen8_get_gtt_total_entries,
 386         .install_gatt = agp_i830_install_gatt,
 387         .deinstall_gatt = agp_i830_deinstall_gatt,
 388         .write_gtt = NULL,
 389         .install_gtt_pte = agp_gen8_install_gtt_pte,
 390         .sync_gtt_pte = agp_g4x_sync_gtt_pte,
 391         .set_aperture = agp_i915_set_aperture,
 392         .chipset_flush_setup = agp_i810_chipset_flush_setup,
 393         .chipset_flush_teardown = agp_i810_chipset_flush_teardown,
 394         .chipset_flush = agp_i810_chipset_flush,
 395 };
 396
 397 /* For adding new devices, devid is the id of the graphics controller
 398  * (pci:0:2:0, for example).  The placeholder (usually at pci:0:2:1) for the
 399  * second head should never be added.  The bridge_offset is the offset to
 400  * subtract from devid to get the id of the hostb that the device is on.
 401  */
 402 static const struct agp_i810_match {
 403         uint16_t devid;
 404         char *name;
 405         const struct agp_i810_driver *driver;
 406 } agp_i810_matches[] = {
 407         {
 408                 .devid = 0x2582,
 409                 .name = "Intel 82915G (915G GMCH) SVGA controller",
 410                 .driver = &agp_i810_i915_driver
 411         },
 412         {
 413                 .devid = 0x258A,
 414                 .name = "Intel E7221 SVGA controller",
 415                 .driver = &agp_i810_i915_driver
 416         },
 417         {
 418                 .devid = 0x2592,
 419                 .name = "Intel 82915GM (915GM GMCH) SVGA controller",
 420                 .driver = &agp_i810_i915_driver
 421         },
 422         {
 423                 .devid = 0x2772,
 424                 .name = "Intel 82945G (945G GMCH) SVGA controller",
 425                 .driver = &agp_i810_i915_driver
 426         },
 427         {
 428                 .devid = 0x27A2,
 429                 .name = "Intel 82945GM (945GM GMCH) SVGA controller",
 430                 .driver = &agp_i810_i915_driver
 431         },
 432         {
 433                 .devid = 0x27AE,
 434                 .name = "Intel 945GME SVGA controller",
 435                 .driver = &agp_i810_i915_driver
 436         },
 437         {
 438                 .devid = 0x2972,
 439                 .name = "Intel 946GZ SVGA controller",
 440                 .driver = &agp_i810_g965_driver
 441         },
 442         {
 443                 .devid = 0x2982,
 444                 .name = "Intel G965 SVGA controller",
 445                 .driver = &agp_i810_g965_driver
 446         },
 447         {
 448                 .devid = 0x2992,
 449                 .name = "Intel Q965 SVGA controller",
 450                 .driver = &agp_i810_g965_driver
 451         },
 452         {
 453                 .devid = 0x29A2,
 454                 .name = "Intel G965 SVGA controller",
 455                 .driver = &agp_i810_g965_driver
 456         },
 457         {
 458                 .devid = 0x29B2,
 459                 .name = "Intel Q35 SVGA controller",
 460                 .driver = &agp_i810_g33_driver
 461         },
 462         {
 463                 .devid = 0x29C2,
 464                 .name = "Intel G33 SVGA controller",
 465                 .driver = &agp_i810_g33_driver
 466         },
 467         {
 468                 .devid = 0x29D2,
 469                 .name = "Intel Q33 SVGA controller",
 470                 .driver = &agp_i810_g33_driver
 471         },
 472         {
 473                 .devid = 0xA001,
 474                 .name = "Intel Pineview SVGA controller",
 475                 .driver = &pineview_gtt_driver
 476         },
 477         {
 478                 .devid = 0xA011,
 479                 .name = "Intel Pineview (M) SVGA controller",
 480                 .driver = &pineview_gtt_driver
 481         },
 482         {
 483                 .devid = 0x2A02,
 484                 .name = "Intel GM965 SVGA controller",
 485                 .driver = &agp_i810_g965_driver
 486         },
 487         {
 488                 .devid = 0x2A12,
 489                 .name = "Intel GME965 SVGA controller",
 490                 .driver = &agp_i810_g965_driver
 491         },
 492         {
 493                 .devid = 0x2A42,
 494                 .name = "Intel GM45 SVGA controller",
 495                 .driver = &agp_i810_g4x_driver
 496         },
 497         {
 498                 .devid = 0x2E02,
 499                 .name = "Intel Eaglelake SVGA controller",
 500                 .driver = &agp_i810_g4x_driver
 501         },
 502         {
 503                 .devid = 0x2E12,
 504                 .name = "Intel Q45 SVGA controller",
 505                 .driver = &agp_i810_g4x_driver
 506         },
 507         {
 508                 .devid = 0x2E22,
 509                 .name = "Intel G45 SVGA controller",
 510                 .driver = &agp_i810_g4x_driver
 511         },
 512         {
 513                 .devid = 0x2E32,
 514                 .name = "Intel G41 SVGA controller",
 515                 .driver = &agp_i810_g4x_driver
 516         },
 517         {
 518                 .devid = 0x0042,
 519                 .name = "Intel Ironlake (D) SVGA controller",
 520                 .driver = &agp_i810_g4x_driver
 521         },
 522         {
 523                 .devid = 0x0046,
 524                 .name = "Intel Ironlake (M) SVGA controller",
 525                 .driver = &agp_i810_g4x_driver
 526         },
 527         {
 528                 .devid = 0x0102,
 529                 .name = "SandyBridge desktop GT1 IG",
 530                 .driver = &agp_i810_sb_driver
 531         },
 532         {
 533                 .devid = 0x0112,
 534                 .name = "SandyBridge desktop GT2 IG",
 535                 .driver = &agp_i810_sb_driver
 536         },
 537         {
 538                 .devid = 0x0122,
 539                 .name = "SandyBridge desktop GT2+ IG",
 540                 .driver = &agp_i810_sb_driver
 541         },
 542         {
 543                 .devid = 0x0106,
 544                 .name = "SandyBridge mobile GT1 IG",
 545                 .driver = &agp_i810_sb_driver
 546         },
 547         {
 548                 .devid = 0x0116,
 549                 .name = "SandyBridge mobile GT2 IG",
 550                 .driver = &agp_i810_sb_driver
 551         },
 552         {
 553                 .devid = 0x0126,
 554                 .name = "SandyBridge mobile GT2+ IG",
 555                 .driver = &agp_i810_sb_driver
 556         },
 557         {
 558                 .devid = 0x010a,
 559                 .name = "SandyBridge server IG",
 560                 .driver = &agp_i810_sb_driver
 561         },
 562         {
 563                 .devid = 0x0152,
 564                 .name = "IvyBridge desktop GT1 IG",
 565                 .driver = &agp_i810_sb_driver
 566         },
 567         {
 568                 .devid = 0x0162,
 569                 .name = "IvyBridge desktop GT2 IG",
 570                 .driver = &agp_i810_sb_driver
 571         },
 572         {
 573                 .devid = 0x0156,
 574                 .name = "IvyBridge mobile GT1 IG",
 575                 .driver = &agp_i810_sb_driver
 576         },
 577         {
 578                 .devid = 0x0166,
 579                 .name = "IvyBridge mobile GT2 IG",
 580                 .driver = &agp_i810_sb_driver
 581         },
 582         {
 583                 .devid = 0x015a,
 584                 .name = "IvyBridge server GT1 IG",
 585                 .driver = &agp_i810_sb_driver
 586         },
 587         {
 588                 .devid = 0x016a,
 589                 .name = "IvyBridge server GT2 IG",
 590                 .driver = &agp_i810_sb_driver
 591         },
 592         {
 593                 .devid = 0x0f30,
 594                 .name = "ValleyView",
 595                 .driver = &valleyview_gtt_driver
 596         },
 597         {
 598                 .devid = 0x0402,
 599                 .name = "Haswell desktop GT1 IG",
 600                 .driver = &agp_i810_sb_driver
 601         },
 602         {
 603                 .devid = 0x0412,
 604                 .name = "Haswell desktop GT2 IG",
 605                 .driver = &agp_i810_sb_driver
 606         },
 607         {       0x041e, "Haswell", &agp_i810_sb_driver },
 608         {       0x0422, "Haswell", &agp_i810_sb_driver },
 609         {
 610                 .devid = 0x0406,
 611                 .name = "Haswell mobile GT1 IG",
 612                 .driver = &agp_i810_sb_driver
 613         },
 614         {
 615                 .devid = 0x0416,
 616                 .name = "Haswell mobile GT2 IG",
 617                 .driver = &agp_i810_sb_driver
 618         },
 619         {       0x0426, "Haswell", &agp_i810_sb_driver },
 620         {
 621                 .devid = 0x040a,
 622                 .name = "Haswell server GT1 IG",
 623                 .driver = &agp_i810_sb_driver
 624         },
 625         {
 626                 .devid = 0x041a,
 627                 .name = "Haswell server GT2 IG",
 628                 .driver = &agp_i810_sb_driver
 629         },
 630         {       0x042a, "Haswell", &agp_i810_sb_driver },
 631         {       0x0c02, "Haswell", &agp_i810_sb_driver },
 632         {       0x0c12, "Haswell", &agp_i810_sb_driver },
 633         {       0x0c22, "Haswell", &agp_i810_sb_driver },
 634         {       0x0c06, "Haswell", &agp_i810_sb_driver },
 635         {
 636                 .devid = 0x0c16,
 637                 .name = "Haswell SDV",
 638                 .driver = &agp_i810_sb_driver
 639         },
 640         {       0x0c26, "Haswell", &agp_i810_sb_driver },
 641         {       0x0c0a, "Haswell", &agp_i810_sb_driver },
 642         {       0x0c1a, "Haswell", &agp_i810_sb_driver },
 643         {       0x0c2a, "Haswell", &agp_i810_sb_driver },
 644         {       0x0a02, "Haswell", &agp_i810_sb_driver },
 645         {       0x0a12, "Haswell", &agp_i810_sb_driver },
 646         {       0x0a22, "Haswell", &agp_i810_sb_driver },
 647         {       0x0a06, "Haswell", &agp_i810_sb_driver },
 648         {       0x0a16, "Haswell", &agp_i810_sb_driver },
 649         {       0x0a26, "Haswell", &agp_i810_sb_driver },
 650         {       0x0a0a, "Haswell", &agp_i810_sb_driver },
 651         {       0x0a1a, "Haswell", &agp_i810_sb_driver },
 652         {       0x0a2a, "Haswell", &agp_i810_sb_driver },
 653         {       0x0d12, "Haswell", &agp_i810_sb_driver },
 654         {       0x0d22, "Haswell", &agp_i810_sb_driver },
 655         {       0x0d32, "Haswell", &agp_i810_sb_driver },
 656         {       0x0d16, "Haswell", &agp_i810_sb_driver },
 657         {       0x0d26, "Haswell", &agp_i810_sb_driver },
 658         {       0x0d36, "Haswell", &agp_i810_sb_driver },
 659         {       0x0d1a, "Haswell", &agp_i810_sb_driver },
 660         {       0x0d2a, "Haswell", &agp_i810_sb_driver },
 661         {       0x0d3a, "Haswell", &agp_i810_sb_driver },
 662
 663         {       0x1602, "Broadwell", &broadwell_gtt_driver }, /* m */
 664         {       0x1606, "Broadwell", &broadwell_gtt_driver },
 665         {       0x160B, "Broadwell", &broadwell_gtt_driver },
 666         {       0x160E, "Broadwell", &broadwell_gtt_driver },
 667         {       0x1616, "Broadwell", &broadwell_gtt_driver },
 668
 669         {       0x160A, "Broadwell", &broadwell_gtt_driver }, /* d */
 670         {       0x160D, "Broadwell", &broadwell_gtt_driver },
 671         {
 672                 .devid = 0,
 673         }
 674 };
 675
 676 static const struct agp_i810_match*
 677 agp_i810_match(device_t dev)
 678 {
 679         int i, devid;
 680
 681         if (pci_get_vendor(dev) != PCI_VENDOR_INTEL)
 682                 return (NULL);
 683
 684         devid = pci_get_device(dev);
 685         for (i = 0; agp_i810_matches[i].devid != 0; i++) {
 686                 if (agp_i810_matches[i].devid == devid)
 687                         break;
 688         }
 689         if (agp_i810_matches[i].devid == 0)
 690                 return (NULL);
 691         else
 692                 return (&agp_i810_matches[i]);
 693 }
 694
 695 /*
 696  * Find bridge device.
 697  */
 698 static device_t
 699 agp_i810_find_bridge(device_t dev)
 700 {
 701
 702         return (pci_find_dbsf(0, 0, 0, 0));
 703 }
 704
 705 static void
 706 agp_i810_identify(driver_t *driver, device_t parent)
 707 {
 708
 709         if (device_find_child(parent, "agp", -1) == NULL &&
 710             agp_i810_match(parent))
 711                 device_add_child(parent, "agp", -1);
 712 }
 713
 714 static int
 715 agp_i915_check_active(device_t bridge_dev)
 716 {
 717         int deven;
 718
 719         deven = pci_read_config(bridge_dev, AGP_I915_DEVEN, 4);
 720         if ((deven & AGP_I915_DEVEN_D2F0) == AGP_I915_DEVEN_D2F0_DISABLED)
 721                 return (ENXIO);
 722         return (0);
 723 }
 724
 725 static int
 726 agp_sb_check_active(device_t bridge_dev)
 727 {
 728         int deven;
 729
 730         deven = pci_read_config(bridge_dev, AGP_I915_DEVEN, 4);
 731         if ((deven & AGP_SB_DEVEN_D2EN) == AGP_SB_DEVEN_D2EN_DISABLED)
 732                 return (ENXIO);
 733         return (0);
 734 }
 735
 736 static void
 737 agp_i810_set_desc(device_t dev, const struct agp_i810_match *match)
 738 {
 739
 740         device_set_desc(dev, match->name);
 741 }
 742
 743 static int
 744 agp_i810_probe(device_t dev)
 745 {
 746         device_t bdev;
 747         const struct agp_i810_match *match;
 748         int err;
 749
 750         if (resource_disabled("agp", device_get_unit(dev)))
 751                 return (ENXIO);
 752         match = agp_i810_match(dev);
 753         if (match == NULL)
 754                 return (ENXIO);
 755
 756         bdev = agp_i810_find_bridge(dev);
 757         if (bdev == NULL) {
 758                 if (bootverbose)
 759                         kprintf("I810: can't find bridge device\n");
 760                 return (ENXIO);
 761         }
 762
 763         /*
 764          * checking whether internal graphics device has been activated.
 765          */
 766         err = match->driver->check_active(bdev);
 767         if (err != 0) {
 768                 if (bootverbose)
 769                         kprintf("i810: disabled, not probing\n");
 770                 return (err);
 771         }
 772
 773         match->driver->set_desc(dev, match);
 774         return (BUS_PROBE_DEFAULT);
 775 }
 776
 777 static void
 778 agp_i915_dump_regs(device_t dev)
 779 {
 780         struct agp_i810_softc *sc = device_get_softc(dev);
 781
 782         device_printf(dev, "AGP_I810_PGTBL_CTL: %08x\n",
 783             bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL));
 784         device_printf(dev, "AGP_I855_GCC1: 0x%02x\n",
 785             pci_read_config(sc->bdev, AGP_I855_GCC1, 1));
 786         device_printf(dev, "AGP_I915_MSAC: 0x%02x\n",
 787             pci_read_config(sc->bdev, AGP_I915_MSAC, 1));
 788 }
 789
 790 static void
 791 agp_i965_dump_regs(device_t dev)
 792 {
 793         struct agp_i810_softc *sc = device_get_softc(dev);
 794
 795         device_printf(dev, "AGP_I965_PGTBL_CTL2: %08x\n",
 796             bus_read_4(sc->sc_res[0], AGP_I965_PGTBL_CTL2));
 797         device_printf(dev, "AGP_I855_GCC1: 0x%02x\n",
 798             pci_read_config(sc->bdev, AGP_I855_GCC1, 1));
 799         device_printf(dev, "AGP_I965_MSAC: 0x%02x\n",
 800             pci_read_config(sc->bdev, AGP_I965_MSAC, 1));
 801 }
 802
 803 static void
 804 agp_sb_dump_regs(device_t dev)
 805 {
 806         struct agp_i810_softc *sc = device_get_softc(dev);
 807
 808         device_printf(dev, "AGP_SNB_GFX_MODE: %08x\n",
 809             bus_read_4(sc->sc_res[0], AGP_SNB_GFX_MODE));
 810         device_printf(dev, "AGP_SNB_GCC1: 0x%04x\n",
 811             pci_read_config(sc->bdev, AGP_SNB_GCC1, 2));
 812 }
 813
 814 static int
 815 agp_i915_get_stolen_size(device_t dev)
 816 {
 817         struct agp_i810_softc *sc;
 818         unsigned int gcc1, stolen, gtt_size;
 819
 820         sc = device_get_softc(dev);
 821
 822         /*
 823          * Stolen memory is set up at the beginning of the aperture by
 824          * the BIOS, consisting of the GATT followed by 4kb for the
 825          * BIOS display.
 826          */
 827         switch (sc->match->driver->chiptype) {
 828         case CHIP_I855:
 829                 gtt_size = 128;
 830                 break;
 831         case CHIP_I915:
 832                 gtt_size = 256;
 833                 break;
 834         case CHIP_I965:
 835                 switch (bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL) &
 836                         AGP_I810_PGTBL_SIZE_MASK) {
 837                 case AGP_I810_PGTBL_SIZE_128KB:
 838                         gtt_size = 128;
 839                         break;
 840                 case AGP_I810_PGTBL_SIZE_256KB:
 841                         gtt_size = 256;
 842                         break;
 843                 case AGP_I810_PGTBL_SIZE_512KB:
 844                         gtt_size = 512;
 845                         break;
 846                 case AGP_I965_PGTBL_SIZE_1MB:
 847                         gtt_size = 1024;
 848                         break;
 849                 case AGP_I965_PGTBL_SIZE_2MB:
 850                         gtt_size = 2048;
 851                         break;
 852                 case AGP_I965_PGTBL_SIZE_1_5MB:
 853                         gtt_size = 1024 + 512;
 854                         break;
 855                 default:
 856                         device_printf(dev, "Bad PGTBL size\n");
 857                         return (EINVAL);
 858                 }
 859                 break;
 860         case CHIP_G33:
 861                 gcc1 = pci_read_config(sc->bdev, AGP_I855_GCC1, 2);
 862                 switch (gcc1 & AGP_G33_MGGC_GGMS_MASK) {
 863                 case AGP_G33_MGGC_GGMS_SIZE_1M:
 864                         gtt_size = 1024;
 865                         break;
 866                 case AGP_G33_MGGC_GGMS_SIZE_2M:
 867                         gtt_size = 2048;
 868                         break;
 869                 default:
 870                         device_printf(dev, "Bad PGTBL size\n");
 871                         return (EINVAL);
 872                 }
 873                 break;
 874         case CHIP_IGD:
 875         case CHIP_G4X:
 876                 gtt_size = 0;
 877                 break;
 878         default:
 879                 device_printf(dev, "Bad chiptype\n");
 880                 return (EINVAL);
 881         }
 882
 883         /* GCC1 is called MGGC on i915+ */
 884         gcc1 = pci_read_config(sc->bdev, AGP_I855_GCC1, 1);
 885         switch (gcc1 & AGP_I855_GCC1_GMS) {
 886         case AGP_I855_GCC1_GMS_STOLEN_1M:
 887                 stolen = 1024;
 888                 break;
 889         case AGP_I855_GCC1_GMS_STOLEN_4M:
 890                 stolen = 4 * 1024;
 891                 break;
 892         case AGP_I855_GCC1_GMS_STOLEN_8M:
 893                 stolen = 8 * 1024;
 894                 break;
 895         case AGP_I855_GCC1_GMS_STOLEN_16M:
 896                 stolen = 16 * 1024;
 897                 break;
 898         case AGP_I855_GCC1_GMS_STOLEN_32M:
 899                 stolen = 32 * 1024;
 900                 break;
 901         case AGP_I915_GCC1_GMS_STOLEN_48M:
 902                 stolen = sc->match->driver->gen > 2 ? 48 * 1024 : 0;
 903                 break;
 904         case AGP_I915_GCC1_GMS_STOLEN_64M:
 905                 stolen = sc->match->driver->gen > 2 ? 64 * 1024 : 0;
 906                 break;
 907         case AGP_G33_GCC1_GMS_STOLEN_128M:
 908                 stolen = sc->match->driver->gen > 2 ? 128 * 1024 : 0;
 909                 break;
 910         case AGP_G33_GCC1_GMS_STOLEN_256M:
 911                 stolen = sc->match->driver->gen > 2 ? 256 * 1024 : 0;
 912                 break;
 913         case AGP_G4X_GCC1_GMS_STOLEN_96M:
 914                 if (sc->match->driver->chiptype == CHIP_I965 ||
 915                     sc->match->driver->chiptype == CHIP_G4X)
 916                         stolen = 96 * 1024;
 917                 else
 918                         stolen = 0;
 919                 break;
 920         case AGP_G4X_GCC1_GMS_STOLEN_160M:
 921                 if (sc->match->driver->chiptype == CHIP_I965 ||
 922                     sc->match->driver->chiptype == CHIP_G4X)
 923                         stolen = 160 * 1024;
 924                 else
 925                         stolen = 0;
 926                 break;
 927         case AGP_G4X_GCC1_GMS_STOLEN_224M:
 928                 if (sc->match->driver->chiptype == CHIP_I965 ||
 929                     sc->match->driver->chiptype == CHIP_G4X)
 930                         stolen = 224 * 1024;
 931                 else
 932                         stolen = 0;
 933                 break;
 934         case AGP_G4X_GCC1_GMS_STOLEN_352M:
 935                 if (sc->match->driver->chiptype == CHIP_I965 ||
 936                     sc->match->driver->chiptype == CHIP_G4X)
 937                         stolen = 352 * 1024;
 938                 else
 939                         stolen = 0;
 940                 break;
 941         default:
 942                 device_printf(dev,
 943                     "unknown memory configuration, disabling (GCC1 %x)\n",
 944                     gcc1);
 945                 return (EINVAL);
 946         }
 947
 948         gtt_size += 4;
 949         sc->stolen_size = stolen * 1024;
 950         sc->stolen = (stolen - gtt_size) * 1024 / 4096;
 951
 952         return (0);
 953 }
 954
 955 static int
 956 agp_sb_get_stolen_size(device_t dev)
 957 {
 958         struct agp_i810_softc *sc;
 959         uint16_t gmch_ctl;
 960
 961         sc = device_get_softc(dev);
 962         gmch_ctl = pci_read_config(sc->bdev, AGP_SNB_GCC1, 2);
 963         switch (gmch_ctl & AGP_SNB_GMCH_GMS_STOLEN_MASK) {
 964         case AGP_SNB_GMCH_GMS_STOLEN_32M:
 965                 sc->stolen_size = 32 * 1024 * 1024;
 966                 break;
 967         case AGP_SNB_GMCH_GMS_STOLEN_64M:
 968                 sc->stolen_size = 64 * 1024 * 1024;
 969                 break;
 970         case AGP_SNB_GMCH_GMS_STOLEN_96M:
 971                 sc->stolen_size = 96 * 1024 * 1024;
 972                 break;
 973         case AGP_SNB_GMCH_GMS_STOLEN_128M:
 974                 sc->stolen_size = 128 * 1024 * 1024;
 975                 break;
 976         case AGP_SNB_GMCH_GMS_STOLEN_160M:
 977                 sc->stolen_size = 160 * 1024 * 1024;
 978                 break;
 979         case AGP_SNB_GMCH_GMS_STOLEN_192M:
 980                 sc->stolen_size = 192 * 1024 * 1024;
 981                 break;
 982         case AGP_SNB_GMCH_GMS_STOLEN_224M:
 983                 sc->stolen_size = 224 * 1024 * 1024;
 984                 break;
 985         case AGP_SNB_GMCH_GMS_STOLEN_256M:
 986                 sc->stolen_size = 256 * 1024 * 1024;
 987                 break;
 988         case AGP_SNB_GMCH_GMS_STOLEN_288M:
 989                 sc->stolen_size = 288 * 1024 * 1024;
 990                 break;
 991         case AGP_SNB_GMCH_GMS_STOLEN_320M:
 992                 sc->stolen_size = 320 * 1024 * 1024;
 993                 break;
 994         case AGP_SNB_GMCH_GMS_STOLEN_352M:
 995                 sc->stolen_size = 352 * 1024 * 1024;
 996                 break;
 997         case AGP_SNB_GMCH_GMS_STOLEN_384M:
 998                 sc->stolen_size = 384 * 1024 * 1024;
 999                 break;
1000         case AGP_SNB_GMCH_GMS_STOLEN_416M:
1001                 sc->stolen_size = 416 * 1024 * 1024;
1002                 break;
1003         case AGP_SNB_GMCH_GMS_STOLEN_448M:
1004                 sc->stolen_size = 448 * 1024 * 1024;
1005                 break;
1006         case AGP_SNB_GMCH_GMS_STOLEN_480M:
1007                 sc->stolen_size = 480 * 1024 * 1024;
1008                 break;
1009         case AGP_SNB_GMCH_GMS_STOLEN_512M:
1010                 sc->stolen_size = 512 * 1024 * 1024;
1011                 break;
1012         }
1013         sc->stolen = (sc->stolen_size - 4) / 4096;
1014         return (0);
1015 }
1016
1017 static int
1018 agp_gen8_get_stolen_size(device_t dev)
1019 {
1020         struct agp_i810_softc *sc;
1021         uint16_t gcc1;
1022         int v;
1023
1024         sc = device_get_softc(dev);
1025         gcc1 = pci_read_config(sc->bdev, AGP_SNB_GCC1, 2);
1026         v = (gcc1 >> 8) & 0xFF;
1027         sc->stolen_size = v * (32L * 1024 * 1024);      /* 32MB increments */
1028         kprintf("GTT STOLEN %ld\n", (long)sc->stolen_size);
1029
1030         return 0;
1031 }
1032
1033 static int
1034 agp_i915_get_gtt_mappable_entries(device_t dev)
1035 {
1036         struct agp_i810_softc *sc;
1037         uint32_t ap;
1038
1039         sc = device_get_softc(dev);
1040         ap = AGP_GET_APERTURE(dev);
1041         sc->gtt_mappable_entries = ap >> AGP_PAGE_SHIFT;
1042         return (0);
1043 }
1044
1045 static int
1046 agp_i810_get_gtt_total_entries(device_t dev)
1047 {
1048         struct agp_i810_softc *sc;
1049
1050         sc = device_get_softc(dev);
1051         sc->gtt_total_entries = sc->gtt_mappable_entries;
1052         return (0);
1053 }
1054
1055 static int
1056 agp_i965_get_gtt_total_entries(device_t dev)
1057 {
1058         struct agp_i810_softc *sc;
1059         uint32_t pgetbl_ctl;
1060         int error;
1061
1062         sc = device_get_softc(dev);
1063         error = 0;
1064         pgetbl_ctl = bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL);
1065         switch (pgetbl_ctl & AGP_I810_PGTBL_SIZE_MASK) {
1066         case AGP_I810_PGTBL_SIZE_128KB:
1067                 sc->gtt_total_entries = 128 * 1024 / 4;
1068                 break;
1069         case AGP_I810_PGTBL_SIZE_256KB:
1070                 sc->gtt_total_entries = 256 * 1024 / 4;
1071                 break;
1072         case AGP_I810_PGTBL_SIZE_512KB:
1073                 sc->gtt_total_entries = 512 * 1024 / 4;
1074                 break;
1075         /* GTT pagetable sizes bigger than 512KB are not possible on G33! */
1076         case AGP_I810_PGTBL_SIZE_1MB:
1077                 sc->gtt_total_entries = 1024 * 1024 / 4;
1078                 break;
1079         case AGP_I810_PGTBL_SIZE_2MB:
1080                 sc->gtt_total_entries = 2 * 1024 * 1024 / 4;
1081                 break;
1082         case AGP_I810_PGTBL_SIZE_1_5MB:
1083                 sc->gtt_total_entries = (1024 + 512) * 1024 / 4;
1084                 break;
1085         default:
1086                 device_printf(dev, "Unknown page table size\n");
1087                 error = ENXIO;
1088         }
1089         return (error);
1090 }
1091
1092 static void
1093 agp_gen5_adjust_pgtbl_size(device_t dev, uint32_t sz)
1094 {
1095         struct agp_i810_softc *sc;
1096         uint32_t pgetbl_ctl, pgetbl_ctl2;
1097
1098         sc = device_get_softc(dev);
1099
1100         /* Disable per-process page table. */
1101         pgetbl_ctl2 = bus_read_4(sc->sc_res[0], AGP_I965_PGTBL_CTL2);
1102         pgetbl_ctl2 &= ~AGP_I810_PGTBL_ENABLED;
1103         bus_write_4(sc->sc_res[0], AGP_I965_PGTBL_CTL2, pgetbl_ctl2);
1104
1105         /* Write the new ggtt size. */
1106         pgetbl_ctl = bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL);
1107         pgetbl_ctl &= ~AGP_I810_PGTBL_SIZE_MASK;
1108         pgetbl_ctl |= sz;
1109         bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL, pgetbl_ctl);
1110 }
1111
1112 static int
1113 agp_gen5_get_gtt_total_entries(device_t dev)
1114 {
1115         struct agp_i810_softc *sc;
1116         uint16_t gcc1;
1117
1118         sc = device_get_softc(dev);
1119
1120         gcc1 = pci_read_config(sc->bdev, AGP_I830_GCC1, 2);
1121         switch (gcc1 & AGP_G4x_GCC1_SIZE_MASK) {
1122         case AGP_G4x_GCC1_SIZE_1M:
1123         case AGP_G4x_GCC1_SIZE_VT_1M:
1124                 agp_gen5_adjust_pgtbl_size(dev, AGP_I810_PGTBL_SIZE_1MB);
1125                 break;
1126         case AGP_G4x_GCC1_SIZE_VT_1_5M:
1127                 agp_gen5_adjust_pgtbl_size(dev, AGP_I810_PGTBL_SIZE_1_5MB);
1128                 break;
1129         case AGP_G4x_GCC1_SIZE_2M:
1130         case AGP_G4x_GCC1_SIZE_VT_2M:
1131                 agp_gen5_adjust_pgtbl_size(dev, AGP_I810_PGTBL_SIZE_2MB);
1132                 break;
1133         default:
1134                 device_printf(dev, "Unknown page table size\n");
1135                 return (ENXIO);
1136         }
1137
1138         return (agp_i965_get_gtt_total_entries(dev));
1139 }
1140
1141 static int
1142 agp_sb_get_gtt_total_entries(device_t dev)
1143 {
1144         struct agp_i810_softc *sc;
1145         uint16_t gcc1;
1146
1147         sc = device_get_softc(dev);
1148
1149         gcc1 = pci_read_config(sc->bdev, AGP_SNB_GCC1, 2);
1150         switch (gcc1 & AGP_SNB_GTT_SIZE_MASK) {
1151         default:
1152         case AGP_SNB_GTT_SIZE_0M:
1153                 kprintf("Bad GTT size mask: 0x%04x\n", gcc1);
1154                 return (ENXIO);
1155         case AGP_SNB_GTT_SIZE_1M:
1156                 sc->gtt_total_entries = 1024 * 1024 / 4;
1157                 break;
1158         case AGP_SNB_GTT_SIZE_2M:
1159                 sc->gtt_total_entries = 2 * 1024 * 1024 / 4;
1160                 break;
1161         }
1162         return (0);
1163 }
1164
1165 static int
1166 agp_gen8_get_gtt_total_entries(device_t dev)
1167 {
1168         struct agp_i810_softc *sc;
1169         uint16_t gcc1;
1170         int v;
1171
1172         sc = device_get_softc(dev);
1173
1174         gcc1 = pci_read_config(sc->bdev, AGP_SNB_GCC1, 2);
1175         v = (gcc1 >> 6) & 3;
1176         if (v)
1177                 v = 1 << v;
1178         sc->gtt_total_entries = (v << 20) / 8;
1179
1180         /*
1181          * XXX limit to 2GB due to misc integer overflows calculated on
1182          * this field.
1183          */
1184         while ((long)sc->gtt_total_entries * PAGE_SIZE >= 4LL*1024*1024*1024)
1185                 sc->gtt_total_entries >>= 1;
1186
1187         kprintf("GTT SIZE %ld representing %ldM vmap\n",
1188                 (long)sc->gtt_total_entries * 8,
1189                 (long)sc->gtt_total_entries * PAGE_SIZE);
1190
1191         return 0;
1192 }
1193
1194 static int
1195 agp_i830_install_gatt(device_t dev)
1196 {
1197         struct agp_i810_softc *sc;
1198         uint32_t pgtblctl;
1199
1200         sc = device_get_softc(dev);
1201
1202         /*
1203          * The i830 automatically initializes the 128k gatt on boot.
1204          * GATT address is already in there, make sure it's enabled.
1205          */
1206         pgtblctl = bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL);
1207         pgtblctl |= 1;
1208         bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL, pgtblctl);
1209
1210         sc->gatt->ag_physical = pgtblctl & ~1;
1211         return (0);
1212 }
1213
1214 static int
1215 agp_i810_attach(device_t dev)
1216 {
1217         struct agp_i810_softc *sc;
1218         int error;
1219
1220         sc = device_get_softc(dev);
1221         sc->bdev = agp_i810_find_bridge(dev);
1222         if (sc->bdev == NULL)
1223                 return (ENOENT);
1224
1225         sc->match = agp_i810_match(dev);
1226
1227         agp_set_aperture_resource(dev, sc->match->driver->gen <= 2 ?
1228             AGP_APBASE : AGP_I915_GMADR);
1229         error = agp_generic_attach(dev);
1230         if (error)
1231                 return (error);
1232
1233         if (ptoa((vm_paddr_t)Maxmem) >
1234             (1ULL << sc->match->driver->busdma_addr_mask_sz) - 1) {
1235                 device_printf(dev, "agp_i810 does not support physical "
1236                     "memory above %ju.\n", (uintmax_t)(1ULL <<
1237                     sc->match->driver->busdma_addr_mask_sz) - 1);
1238                 return (ENOENT);
1239         }
1240
1241         if (bus_alloc_resources(dev, sc->match->driver->res_spec, sc->sc_res)) {
1242                 agp_generic_detach(dev);
1243                 return (ENODEV);
1244         }
1245
1246         sc->initial_aperture = AGP_GET_APERTURE(dev);
1247         sc->gatt = kmalloc(sizeof(struct agp_gatt), M_AGP, M_WAITOK);
1248         sc->gatt->ag_entries = AGP_GET_APERTURE(dev) >> AGP_PAGE_SHIFT;
1249
1250         if ((error = sc->match->driver->get_stolen_size(dev)) != 0 ||
1251             (error = sc->match->driver->install_gatt(dev)) != 0 ||
1252             (error = sc->match->driver->get_gtt_mappable_entries(dev)) != 0 ||
1253             (error = sc->match->driver->get_gtt_total_entries(dev)) != 0 ||
1254             (error = sc->match->driver->chipset_flush_setup(dev)) != 0) {
1255                 bus_release_resources(dev, sc->match->driver->res_spec,
1256                     sc->sc_res);
1257                 kfree(sc->gatt, M_AGP);
1258                 agp_generic_detach(dev);
1259                 return (error);
1260         }
1261
1262         intel_agp = dev;
1263         device_printf(dev, "aperture size is %dM",
1264             sc->initial_aperture / 1024 / 1024);
1265         if (sc->stolen > 0)
1266                 kprintf(", detected %dk stolen memory\n", sc->stolen * 4);
1267         else
1268                 kprintf("\n");
1269         if (bootverbose) {
1270                 sc->match->driver->dump_regs(dev);
1271                 device_printf(dev, "Mappable GTT entries: %d\n",
1272                     sc->gtt_mappable_entries);
1273                 device_printf(dev, "Total GTT entries: %d\n",
1274                     sc->gtt_total_entries);
1275         }
1276         return (0);
1277 }
1278
1279 static void
1280 agp_i830_deinstall_gatt(device_t dev)
1281 {
1282         struct agp_i810_softc *sc;
1283         unsigned int pgtblctl;
1284
1285         sc = device_get_softc(dev);
1286         pgtblctl = bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL);
1287         pgtblctl &= ~1;
1288         bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL, pgtblctl);
1289 }
1290
1291 static int
1292 agp_i810_detach(device_t dev)
1293 {
1294         struct agp_i810_softc *sc;
1295
1296         sc = device_get_softc(dev);
1297         agp_free_cdev(dev);
1298
1299         /* Clear the GATT base. */
1300         sc->match->driver->deinstall_gatt(dev);
1301
1302         sc->match->driver->chipset_flush_teardown(dev);
1303
1304         /* Put the aperture back the way it started. */
1305         AGP_SET_APERTURE(dev, sc->initial_aperture);
1306
1307         kfree(sc->gatt, M_AGP);
1308         bus_release_resources(dev, sc->match->driver->res_spec, sc->sc_res);
1309         agp_free_res(dev);
1310
1311         return (0);
1312 }
1313
1314 static int
1315 agp_i810_resume(device_t dev)
1316 {
1317         struct agp_i810_softc *sc;
1318         sc = device_get_softc(dev);
1319
1320         AGP_SET_APERTURE(dev, sc->initial_aperture);
1321
1322         /* Install the GATT. */
1323         bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL,
1324         sc->gatt->ag_physical | 1);
1325
1326         return (bus_generic_resume(dev));
1327 }
1328
1329 /**
1330  * Sets the PCI resource size of the aperture on i830-class and below chipsets,
1331  * while returning failure on later chipsets when an actual change is
1332  * requested.
1333  *
1334  * This whole function is likely bogus, as the kernel would probably need to
1335  * reconfigure the placement of the AGP aperture if a larger size is requested,
1336  * which doesn't happen currently.
1337  */
1338
1339 static int
1340 agp_i915_set_aperture(device_t dev, u_int32_t aperture)
1341 {
1342
1343         return (agp_generic_set_aperture(dev, aperture));
1344 }
1345
1346 static int
1347 agp_i810_method_set_aperture(device_t dev, u_int32_t aperture)
1348 {
1349         struct agp_i810_softc *sc;
1350
1351         sc = device_get_softc(dev);
1352         return (sc->match->driver->set_aperture(dev, aperture));
1353 }
1354
1355 /**
1356  * Writes a GTT entry mapping the page at the given offset from the
1357  * beginning of the aperture to the given physical address.  Setup the
1358  * caching mode according to flags.
1359  *
1360  * For gen 1, 2 and 3, GTT start is located at AGP_I810_GTT offset
1361  * from corresponding BAR start. For gen 4, offset is 512KB +
1362  * AGP_I810_GTT, for gen 5 and 6 it is 2MB + AGP_I810_GTT.
1363  *
1364  * Also, the bits of the physical page address above 4GB needs to be
1365  * placed into bits 40-32 of PTE.
1366  */
1367 static void
1368 agp_i915_install_gtt_pte(device_t dev, u_int index, vm_offset_t physical,
1369     int flags)
1370 {
1371         uint32_t pte;
1372
1373         pte = (u_int32_t)physical | I810_PTE_VALID;
1374         if (flags == AGP_USER_CACHED_MEMORY)
1375                 pte |= I830_PTE_SYSTEM_CACHED;
1376
1377         agp_i915_write_gtt(dev, index, pte);
1378 }
1379
1380 static void
1381 agp_i915_write_gtt(device_t dev, u_int index, uint32_t pte)
1382 {
1383         struct agp_i810_softc *sc;
1384
1385         sc = device_get_softc(dev);
1386         bus_write_4(sc->sc_res[1], index * 4, pte);
1387 }
1388
1389 static void
1390 agp_i965_install_gtt_pte(device_t dev, u_int index, vm_offset_t physical,
1391     int flags)
1392 {
1393         uint32_t pte;
1394
1395         pte = (u_int32_t)physical | I810_PTE_VALID;
1396         if (flags == AGP_USER_CACHED_MEMORY)
1397                 pte |= I830_PTE_SYSTEM_CACHED;
1398
1399         pte |= (physical >> 28) & 0xf0;
1400         agp_i965_write_gtt(dev, index, pte);
1401 }
1402
1403 static void
1404 agp_i965_write_gtt(device_t dev, u_int index, uint32_t pte)
1405 {
1406         struct agp_i810_softc *sc;
1407
1408         sc = device_get_softc(dev);
1409         bus_write_4(sc->sc_res[0], index * 4 + (512 * 1024), pte);
1410 }
1411
1412 static void
1413 agp_g4x_install_gtt_pte(device_t dev, u_int index, vm_offset_t physical,
1414     int flags)
1415 {
1416         uint32_t pte;
1417
1418         pte = (u_int32_t)physical | I810_PTE_VALID;
1419         if (flags == AGP_USER_CACHED_MEMORY)
1420                 pte |= I830_PTE_SYSTEM_CACHED;
1421
1422         pte |= (physical >> 28) & 0xf0;
1423         agp_g4x_write_gtt(dev, index, pte);
1424 }
1425
1426 static void
1427 agp_g4x_write_gtt(device_t dev, u_int index, uint32_t pte)
1428 {
1429         struct agp_i810_softc *sc;
1430
1431         sc = device_get_softc(dev);
1432         bus_write_4(sc->sc_res[0], index * 4 + (2 * 1024 * 1024), pte);
1433 }
1434
1435 static void
1436 agp_sb_install_gtt_pte(device_t dev, u_int index,
1437                        vm_offset_t physical, int flags)
1438 {
1439         int type_mask, gfdt;
1440         uint32_t pte;
1441
1442         pte = (u_int32_t)physical | I810_PTE_VALID;
1443         type_mask = flags & ~AGP_USER_CACHED_MEMORY_GFDT;
1444         gfdt = (flags & AGP_USER_CACHED_MEMORY_GFDT) != 0 ? GEN6_PTE_GFDT : 0;
1445
1446         if (type_mask == AGP_USER_MEMORY)
1447                 pte |= GEN6_PTE_UNCACHED;
1448         else if (type_mask == AGP_USER_CACHED_MEMORY_LLC_MLC)
1449                 pte |= GEN6_PTE_LLC_MLC | gfdt;
1450         else
1451                 pte |= GEN6_PTE_LLC | gfdt;
1452
1453         pte |= (physical & 0x000000ff00000000ull) >> 28;
1454         agp_sb_write_gtt(dev, index, pte);
1455 }
1456
1457 static void
1458 agp_gen8_install_gtt_pte(device_t dev, u_int index,
1459                        vm_offset_t physical, int flags)
1460 {
1461         struct agp_i810_softc *sc;
1462         int type_mask;
1463         uint64_t pte;
1464
1465         pte = (u_int64_t)physical | GEN8_PTE_PRESENT | GEN8_PTE_RW;
1466         type_mask = flags & ~AGP_USER_CACHED_MEMORY_GFDT;
1467
1468         if (type_mask == AGP_USER_MEMORY)
1469                 pte |= GEN8_PTE_PWT;    /* XXX */
1470         else if (type_mask == AGP_USER_CACHED_MEMORY_LLC_MLC)
1471                 pte |= GEN8_PTE_PWT;    /* XXX */
1472         else
1473                 pte |= GEN8_PTE_PWT;    /* XXX */
1474
1475         sc = device_get_softc(dev);
1476         bus_write_4(sc->sc_res[0], index * 8 + (2 * 1024 * 1024),
1477                     (uint32_t)pte);
1478         bus_write_4(sc->sc_res[0], index * 8 + (2 * 1024 * 1024) + 4,
1479                     (uint32_t)(pte >> 32));
1480 }
1481
1482 static void
1483 agp_sb_write_gtt(device_t dev, u_int index, uint32_t pte)
1484 {
1485         struct agp_i810_softc *sc;
1486
1487         sc = device_get_softc(dev);
1488         bus_write_4(sc->sc_res[0], index * 4 + (2 * 1024 * 1024), pte);
1489 }
1490
1491 static int
1492 agp_i810_bind_page(device_t dev, vm_offset_t offset, vm_offset_t physical)
1493 {
1494         struct agp_i810_softc *sc = device_get_softc(dev);
1495         u_int index;
1496
1497         if (offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) {
1498                 device_printf(dev, "failed: offset is 0x%08jx, "
1499                     "shift is %d, entries is %d\n", (intmax_t)offset,
1500                     AGP_PAGE_SHIFT, sc->gatt->ag_entries);
1501                 return (EINVAL);
1502         }
1503         index = offset >> AGP_PAGE_SHIFT;
1504         if (sc->stolen != 0 && index < sc->stolen) {
1505                 device_printf(dev, "trying to bind into stolen memory\n");
1506                 return (EINVAL);
1507         }
1508         sc->match->driver->install_gtt_pte(dev, index, physical, 0);
1509         return (0);
1510 }
1511
1512 static int
1513 agp_i810_unbind_page(device_t dev, vm_offset_t offset)
1514 {
1515         struct agp_i810_softc *sc;
1516         u_int index;
1517
1518         sc = device_get_softc(dev);
1519         if (offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT))
1520                 return (EINVAL);
1521         index = offset >> AGP_PAGE_SHIFT;
1522         if (sc->stolen != 0 && index < sc->stolen) {
1523                 device_printf(dev, "trying to unbind from stolen memory\n");
1524                 return (EINVAL);
1525         }
1526         sc->match->driver->install_gtt_pte(dev, index, 0, 0);
1527         return (0);
1528 }
1529
1530 static void
1531 agp_i915_sync_gtt_pte(device_t dev, u_int index)
1532 {
1533         struct agp_i810_softc *sc;
1534
1535         sc = device_get_softc(dev);
1536         bus_read_4(sc->sc_res[1], index * 4);
1537 }
1538
1539 static void
1540 agp_i965_sync_gtt_pte(device_t dev, u_int index)
1541 {
1542         struct agp_i810_softc *sc;
1543
1544         sc = device_get_softc(dev);
1545         bus_read_4(sc->sc_res[0], index * 4 + (512 * 1024));
1546 }
1547
1548 static void
1549 agp_g4x_sync_gtt_pte(device_t dev, u_int index)
1550 {
1551         struct agp_i810_softc *sc;
1552
1553         sc = device_get_softc(dev);
1554         bus_read_4(sc->sc_res[0], index * 4 + (2 * 1024 * 1024));
1555 }
1556
1557 /*
1558  * Writing via memory mapped registers already flushes all TLBs.
1559  */
1560 static void
1561 agp_i810_flush_tlb(device_t dev)
1562 {
1563 }
1564
1565 static int
1566 agp_i810_enable(device_t dev, u_int32_t mode)
1567 {
1568
1569         return (0);
1570 }
1571
1572 static struct agp_memory *
1573 agp_i810_alloc_memory(device_t dev, int type, vm_size_t size)
1574 {
1575         struct agp_i810_softc *sc;
1576         struct agp_memory *mem;
1577         vm_page_t m;
1578
1579         sc = device_get_softc(dev);
1580
1581         if ((size & (AGP_PAGE_SIZE - 1)) != 0 ||
1582             sc->agp.as_allocated + size > sc->agp.as_maxmem)
1583                 return (0);
1584
1585         if (type == 1) {
1586                 /*
1587                  * Mapping local DRAM into GATT.
1588                  */
1589                 if (sc->match->driver->chiptype != CHIP_I810)
1590                         return (0);
1591                 if (size != sc->dcache_size)
1592                         return (0);
1593         } else if (type == 2) {
1594                 /*
1595                  * Type 2 is the contiguous physical memory type, that hands
1596                  * back a physical address.  This is used for cursors on i810.
1597                  * Hand back as many single pages with physical as the user
1598                  * wants, but only allow one larger allocation (ARGB cursor)
1599                  * for simplicity.
1600                  */
1601                 if (size != AGP_PAGE_SIZE) {
1602                         if (sc->argb_cursor != NULL)
1603                                 return (0);
1604
1605                         /* Allocate memory for ARGB cursor, if we can. */
1606                         sc->argb_cursor = contigmalloc(size, M_AGP,
1607                            0, 0, ~0, PAGE_SIZE, 0);
1608                         if (sc->argb_cursor == NULL)
1609                                 return (0);
1610                 }
1611         }
1612
1613         mem = kmalloc(sizeof *mem, M_AGP, M_INTWAIT);
1614         mem->am_id = sc->agp.as_nextid++;
1615         mem->am_size = size;
1616         mem->am_type = type;
1617         if (type != 1 && (type != 2 || size == AGP_PAGE_SIZE))
1618                 mem->am_obj = vm_object_allocate(OBJT_DEFAULT,
1619                     atop(round_page(size)));
1620         else
1621                 mem->am_obj = 0;
1622
1623         if (type == 2) {
1624                 if (size == AGP_PAGE_SIZE) {
1625                         /*
1626                          * Allocate and wire down the page now so that we can
1627                          * get its physical address.
1628                          */
1629                         VM_OBJECT_LOCK(mem->am_obj);
1630                         m = vm_page_grab(mem->am_obj, 0, VM_ALLOC_NORMAL |
1631                                                          VM_ALLOC_ZERO |
1632                                                          VM_ALLOC_RETRY);
1633                         vm_page_wire(m);
1634                         VM_OBJECT_UNLOCK(mem->am_obj);
1635                         mem->am_physical = VM_PAGE_TO_PHYS(m);
1636                         vm_page_wakeup(m);
1637                 } else {
1638                         /* Our allocation is already nicely wired down for us.
1639                          * Just grab the physical address.
1640                          */
1641                         mem->am_physical = vtophys(sc->argb_cursor);
1642                 }
1643         } else
1644                 mem->am_physical = 0;
1645
1646         mem->am_offset = 0;
1647         mem->am_is_bound = 0;
1648         TAILQ_INSERT_TAIL(&sc->agp.as_memory, mem, am_link);
1649         sc->agp.as_allocated += size;
1650
1651         return (mem);
1652 }
1653
1654 static int
1655 agp_i810_free_memory(device_t dev, struct agp_memory *mem)
1656 {
1657         struct agp_i810_softc *sc;
1658
1659         if (mem->am_is_bound)
1660                 return (EBUSY);
1661
1662         sc = device_get_softc(dev);
1663
1664         if (mem->am_type == 2) {
1665                 if (mem->am_size == AGP_PAGE_SIZE) {
1666                         /*
1667                          * Unwire the page which we wired in alloc_memory.
1668                          */
1669                         vm_page_t m;
1670
1671                         vm_object_hold(mem->am_obj);
1672                         m = vm_page_lookup_busy_wait(mem->am_obj, 0,
1673                                                      FALSE, "agppg");
1674                         vm_object_drop(mem->am_obj);
1675                         vm_page_unwire(m, 0);
1676                         vm_page_wakeup(m);
1677                 } else {
1678                         contigfree(sc->argb_cursor, mem->am_size, M_AGP);
1679                         sc->argb_cursor = NULL;
1680                 }
1681         }
1682
1683         sc->agp.as_allocated -= mem->am_size;
1684         TAILQ_REMOVE(&sc->agp.as_memory, mem, am_link);
1685         if (mem->am_obj)
1686                 vm_object_deallocate(mem->am_obj);
1687         kfree(mem, M_AGP);
1688         return (0);
1689 }
1690
1691 static int
1692 agp_i810_bind_memory(device_t dev, struct agp_memory *mem, vm_offset_t offset)
1693 {
1694         struct agp_i810_softc *sc;
1695         vm_offset_t i;
1696
1697         /* Do some sanity checks first. */
1698         if ((offset & (AGP_PAGE_SIZE - 1)) != 0 ||
1699             offset + mem->am_size > AGP_GET_APERTURE(dev)) {
1700                 device_printf(dev, "binding memory at bad offset %#x\n",
1701                     (int)offset);
1702                 return (EINVAL);
1703         }
1704
1705         sc = device_get_softc(dev);
1706         if (mem->am_type == 2 && mem->am_size != AGP_PAGE_SIZE) {
1707                 lockmgr(&sc->agp.as_lock, LK_EXCLUSIVE);
1708                 if (mem->am_is_bound) {
1709                         lockmgr(&sc->agp.as_lock, LK_RELEASE);
1710                         return EINVAL;
1711                 }
1712                 /* The memory's already wired down, just stick it in the GTT. */
1713                 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) {
1714                         sc->match->driver->install_gtt_pte(dev, (offset + i) >>
1715                             AGP_PAGE_SHIFT, mem->am_physical + i, 0);
1716                 }
1717                 agp_flush_cache();
1718                 mem->am_offset = offset;
1719                 mem->am_is_bound = 1;
1720                 lockmgr(&sc->agp.as_lock, LK_RELEASE);
1721                 return (0);
1722         }
1723
1724         if (mem->am_type != 1)
1725                 return (agp_generic_bind_memory(dev, mem, offset));
1726
1727         /*
1728          * Mapping local DRAM into GATT.
1729          */
1730         if (sc->match->driver->chiptype != CHIP_I810)
1731                 return (EINVAL);
1732         for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE)
1733                 bus_write_4(sc->sc_res[0],
1734                     AGP_I810_GTT + (i >> AGP_PAGE_SHIFT) * 4, i | 3);
1735
1736         return (0);
1737 }
1738
1739 static int
1740 agp_i810_unbind_memory(device_t dev, struct agp_memory *mem)
1741 {
1742         struct agp_i810_softc *sc;
1743         vm_offset_t i;
1744
1745         sc = device_get_softc(dev);
1746
1747         if (mem->am_type == 2 && mem->am_size != AGP_PAGE_SIZE) {
1748                 lockmgr(&sc->agp.as_lock, LK_EXCLUSIVE);
1749                 if (!mem->am_is_bound) {
1750                         lockmgr(&sc->agp.as_lock, LK_RELEASE);
1751                         return (EINVAL);
1752                 }
1753
1754                 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) {
1755                         sc->match->driver->install_gtt_pte(dev,
1756                             (mem->am_offset + i) >> AGP_PAGE_SHIFT, 0, 0);
1757                 }
1758                 agp_flush_cache();
1759                 mem->am_is_bound = 0;
1760                 lockmgr(&sc->agp.as_lock, LK_RELEASE);
1761                 return (0);
1762         }
1763
1764         if (mem->am_type != 1)
1765                 return (agp_generic_unbind_memory(dev, mem));
1766
1767         if (sc->match->driver->chiptype != CHIP_I810)
1768                 return (EINVAL);
1769         for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) {
1770                 sc->match->driver->install_gtt_pte(dev, i >> AGP_PAGE_SHIFT,
1771                     0, 0);
1772         }
1773         return (0);
1774 }
1775
1776 static device_method_t agp_i810_methods[] = {
1777         /* Device interface */
1778         DEVMETHOD(device_identify,      agp_i810_identify),
1779         DEVMETHOD(device_probe,         agp_i810_probe),
1780         DEVMETHOD(device_attach,        agp_i810_attach),
1781         DEVMETHOD(device_detach,        agp_i810_detach),
1782         DEVMETHOD(device_suspend,       bus_generic_suspend),
1783         DEVMETHOD(device_resume,        agp_i810_resume),
1784
1785         /* AGP interface */
1786         DEVMETHOD(agp_get_aperture,     agp_generic_get_aperture),
1787         DEVMETHOD(agp_set_aperture,     agp_i810_method_set_aperture),
1788         DEVMETHOD(agp_bind_page,        agp_i810_bind_page),
1789         DEVMETHOD(agp_unbind_page,      agp_i810_unbind_page),
1790         DEVMETHOD(agp_flush_tlb,        agp_i810_flush_tlb),
1791         DEVMETHOD(agp_enable,           agp_i810_enable),
1792         DEVMETHOD(agp_alloc_memory,     agp_i810_alloc_memory),
1793         DEVMETHOD(agp_free_memory,      agp_i810_free_memory),
1794         DEVMETHOD(agp_bind_memory,      agp_i810_bind_memory),
1795         DEVMETHOD(agp_unbind_memory,    agp_i810_unbind_memory),
1796         DEVMETHOD(agp_chipset_flush,    agp_intel_gtt_chipset_flush),
1797
1798         DEVMETHOD_END
1799 };
1800
1801 static driver_t agp_i810_driver = {
1802         "agp",
1803         agp_i810_methods,
1804         sizeof(struct agp_i810_softc),
1805 };
1806
1807 static devclass_t agp_devclass;
1808
1809 DRIVER_MODULE(agp_i810, vgapci, agp_i810_driver, agp_devclass, NULL, NULL);
1810 MODULE_DEPEND(agp_i810, agp, 1, 1, 1);
1811 MODULE_DEPEND(agp_i810, pci, 1, 1, 1);
1812
1813 extern vm_page_t bogus_page;
1814
1815 void
1816 agp_intel_gtt_clear_range(device_t dev, u_int first_entry, u_int num_entries)
1817 {
1818         struct agp_i810_softc *sc;
1819         u_int i;
1820
1821         sc = device_get_softc(dev);
1822         for (i = 0; i < num_entries; i++)
1823                 sc->match->driver->install_gtt_pte(dev, first_entry + i,
1824                     VM_PAGE_TO_PHYS(bogus_page), 0);
1825         sc->match->driver->sync_gtt_pte(dev, first_entry + num_entries - 1);
1826 }
1827
1828 void
1829 agp_intel_gtt_insert_pages(device_t dev, u_int first_entry, u_int num_entries,
1830     vm_page_t *pages, u_int flags)
1831 {
1832         struct agp_i810_softc *sc;
1833         u_int i;
1834
1835         sc = device_get_softc(dev);
1836         for (i = 0; i < num_entries; i++) {
1837                 KKASSERT(pages[i]->valid == VM_PAGE_BITS_ALL);
1838                 KKASSERT(pages[i]->wire_count > 0);
1839                 sc->match->driver->install_gtt_pte(dev, first_entry + i,
1840                     VM_PAGE_TO_PHYS(pages[i]), flags);
1841         }
1842         sc->match->driver->sync_gtt_pte(dev, first_entry + num_entries - 1);
1843 }
1844
1845 struct intel_gtt
1846 agp_intel_gtt_get(device_t dev)
1847 {
1848         struct agp_i810_softc *sc;
1849         struct intel_gtt res;
1850
1851         sc = device_get_softc(dev);
1852         res.stolen_size = sc->stolen_size;
1853         res.gtt_total_entries = sc->gtt_total_entries;
1854         res.gtt_mappable_entries = sc->gtt_mappable_entries;
1855         res.do_idle_maps = 0;
1856         res.scratch_page_dma = VM_PAGE_TO_PHYS(bogus_page);
1857         return (res);
1858 }
1859
1860 static int
1861 agp_i810_chipset_flush_setup(device_t dev)
1862 {
1863
1864         return (0);
1865 }
1866
1867 static void
1868 agp_i810_chipset_flush_teardown(device_t dev)
1869 {
1870
1871         /* Nothing to do. */
1872 }
1873
1874 static void
1875 agp_i810_chipset_flush(device_t dev)
1876 {
1877
1878         /* Nothing to do. */
1879 }
1880
1881 static int
1882 agp_i915_chipset_flush_alloc_page(device_t dev, uint64_t start, uint64_t end)
1883 {
1884         struct agp_i810_softc *sc;
1885         device_t vga;
1886
1887         sc = device_get_softc(dev);
1888         vga = device_get_parent(dev);
1889         sc->sc_flush_page_rid = 100;
1890         sc->sc_flush_page_res = BUS_ALLOC_RESOURCE(device_get_parent(vga), dev,
1891             SYS_RES_MEMORY, &sc->sc_flush_page_rid, start, end, PAGE_SIZE,
1892             RF_ACTIVE, -1);
1893         if (sc->sc_flush_page_res == NULL) {
1894                 device_printf(dev, "Failed to allocate flush page at 0x%jx\n",
1895                     (uintmax_t)start);
1896                 return (EINVAL);
1897         }
1898         sc->sc_flush_page_vaddr = rman_get_virtual(sc->sc_flush_page_res);
1899         if (bootverbose) {
1900                 device_printf(dev, "Allocated flush page phys 0x%jx virt %p\n",
1901                     (uintmax_t)rman_get_start(sc->sc_flush_page_res),
1902                     sc->sc_flush_page_vaddr);
1903         }
1904         return (0);
1905 }
1906
1907 static void
1908 agp_i915_chipset_flush_free_page(device_t dev)
1909 {
1910         struct agp_i810_softc *sc;
1911         device_t vga;
1912
1913         sc = device_get_softc(dev);
1914         vga = device_get_parent(dev);
1915         if (sc->sc_flush_page_res == NULL)
1916                 return;
1917         BUS_DEACTIVATE_RESOURCE(device_get_parent(vga), dev, SYS_RES_MEMORY,
1918             sc->sc_flush_page_rid, sc->sc_flush_page_res);
1919         BUS_RELEASE_RESOURCE(device_get_parent(vga), dev, SYS_RES_MEMORY,
1920             sc->sc_flush_page_rid, sc->sc_flush_page_res);
1921 }
1922
1923 static int
1924 agp_i915_chipset_flush_setup(device_t dev)
1925 {
1926         struct agp_i810_softc *sc;
1927         uint32_t temp;
1928         int error;
1929
1930         sc = device_get_softc(dev);
1931         temp = pci_read_config(sc->bdev, AGP_I915_IFPADDR, 4);
1932         if ((temp & 1) != 0) {
1933                 temp &= ~1;
1934                 if (bootverbose)
1935                         device_printf(dev,
1936                             "Found already configured flush page at 0x%jx\n",
1937                             (uintmax_t)temp);
1938                 sc->sc_bios_allocated_flush_page = 1;
1939                 /*
1940                  * In the case BIOS initialized the flush pointer (?)
1941                  * register, expect that BIOS also set up the resource
1942                  * for the page.
1943                  */
1944                 error = agp_i915_chipset_flush_alloc_page(dev, temp,
1945                     temp + PAGE_SIZE - 1);
1946                 if (error != 0)
1947                         return (error);
1948         } else {
1949                 sc->sc_bios_allocated_flush_page = 0;
1950                 error = agp_i915_chipset_flush_alloc_page(dev, 0, 0xffffffff);
1951                 if (error != 0)
1952                         return (error);
1953                 temp = rman_get_start(sc->sc_flush_page_res);
1954                 pci_write_config(sc->bdev, AGP_I915_IFPADDR, temp | 1, 4);
1955         }
1956         return (0);
1957 }
1958
1959 static void
1960 agp_i915_chipset_flush_teardown(device_t dev)
1961 {
1962         struct agp_i810_softc *sc;
1963         uint32_t temp;
1964
1965         sc = device_get_softc(dev);
1966         if (sc->sc_flush_page_res == NULL)
1967                 return;
1968         if (!sc->sc_bios_allocated_flush_page) {
1969                 temp = pci_read_config(sc->bdev, AGP_I915_IFPADDR, 4);
1970                 temp &= ~1;
1971                 pci_write_config(sc->bdev, AGP_I915_IFPADDR, temp, 4);
1972         }
1973         agp_i915_chipset_flush_free_page(dev);
1974 }
1975
1976 static int
1977 agp_i965_chipset_flush_setup(device_t dev)
1978 {
1979         struct agp_i810_softc *sc;
1980         uint64_t temp;
1981         uint32_t temp_hi, temp_lo;
1982         int error;
1983
1984         sc = device_get_softc(dev);
1985
1986         temp_hi = pci_read_config(sc->bdev, AGP_I965_IFPADDR + 4, 4);
1987         temp_lo = pci_read_config(sc->bdev, AGP_I965_IFPADDR, 4);
1988
1989         if ((temp_lo & 1) != 0) {
1990                 temp = ((uint64_t)temp_hi << 32) | (temp_lo & ~1);
1991                 if (bootverbose)
1992                         device_printf(dev,
1993                             "Found already configured flush page at 0x%jx\n",
1994                             (uintmax_t)temp);
1995                 sc->sc_bios_allocated_flush_page = 1;
1996                 /*
1997                  * In the case BIOS initialized the flush pointer (?)
1998                  * register, expect that BIOS also set up the resource
1999                  * for the page.
2000                  */
2001                 error = agp_i915_chipset_flush_alloc_page(dev, temp,
2002                     temp + PAGE_SIZE - 1);
2003                 if (error != 0)
2004                         return (error);
2005         } else {
2006                 sc->sc_bios_allocated_flush_page = 0;
2007                 error = agp_i915_chipset_flush_alloc_page(dev, 0, ~0);
2008                 if (error != 0)
2009                         return (error);
2010                 temp = rman_get_start(sc->sc_flush_page_res);
2011                 pci_write_config(sc->bdev, AGP_I965_IFPADDR + 4,
2012                     (temp >> 32) & UINT32_MAX, 4);
2013                 pci_write_config(sc->bdev, AGP_I965_IFPADDR,
2014                     (temp & UINT32_MAX) | 1, 4);
2015         }
2016         return (0);
2017 }
2018
2019 static void
2020 agp_i965_chipset_flush_teardown(device_t dev)
2021 {
2022         struct agp_i810_softc *sc;
2023         uint32_t temp_lo;
2024
2025         sc = device_get_softc(dev);
2026         if (sc->sc_flush_page_res == NULL)
2027                 return;
2028         if (!sc->sc_bios_allocated_flush_page) {
2029                 temp_lo = pci_read_config(sc->bdev, AGP_I965_IFPADDR, 4);
2030                 temp_lo &= ~1;
2031                 pci_write_config(sc->bdev, AGP_I965_IFPADDR, temp_lo, 4);
2032         }
2033         agp_i915_chipset_flush_free_page(dev);
2034 }
2035
2036 static void
2037 agp_i915_chipset_flush(device_t dev)
2038 {
2039         struct agp_i810_softc *sc;
2040
2041         sc = device_get_softc(dev);
2042         *(uint32_t *)sc->sc_flush_page_vaddr = 1;
2043 }
2044
2045 int
2046 agp_intel_gtt_chipset_flush(device_t dev)
2047 {
2048         struct agp_i810_softc *sc;
2049
2050         sc = device_get_softc(dev);
2051         sc->match->driver->chipset_flush(dev);
2052         return (0);
2053 }
2054
2055 void
2056 agp_intel_gtt_unmap_memory(device_t dev, struct sglist *sg_list)
2057 {
2058 }
2059
2060 int
2061 agp_intel_gtt_map_memory(device_t dev, vm_page_t *pages, u_int num_entries,
2062     struct sglist **sg_list)
2063 {
2064 #if 0
2065         struct agp_i810_softc *sc;
2066 #endif
2067         struct sglist *sg;
2068         int i;
2069 #if 0
2070         int error;
2071         bus_dma_tag_t dmat;
2072 #endif
2073
2074         if (*sg_list != NULL)
2075                 return (0);
2076 #if 0
2077         sc = device_get_softc(dev);
2078 #endif
2079         sg = sglist_alloc(num_entries, M_WAITOK /* XXXKIB */);
2080         for (i = 0; i < num_entries; i++) {
2081                 sg->sg_segs[i].ss_paddr = VM_PAGE_TO_PHYS(pages[i]);
2082                 sg->sg_segs[i].ss_len = PAGE_SIZE;
2083         }
2084
2085 #if 0
2086         error = bus_dma_tag_create(bus_get_dma_tag(dev),
2087             1 /* alignment */, 0 /* boundary */,
2088             1ULL << sc->match->busdma_addr_mask_sz /* lowaddr */,
2089             BUS_SPACE_MAXADDR /* highaddr */,
2090             NULL /* filtfunc */, NULL /* filtfuncarg */,
2091             BUS_SPACE_MAXADDR /* maxsize */,
2092             BUS_SPACE_UNRESTRICTED /* nsegments */,
2093             BUS_SPACE_MAXADDR /* maxsegsz */,
2094             0 /* flags */, NULL /* lockfunc */, NULL /* lockfuncarg */,
2095             &dmat);
2096         if (error != 0) {
2097                 sglist_free(sg);
2098                 return (error);
2099         }
2100         /* XXXKIB */
2101 #endif
2102         *sg_list = sg;
2103         return (0);
2104 }
2105
2106 void
2107 agp_intel_gtt_insert_sg_entries(device_t dev, struct sglist *sg_list,
2108     u_int first_entry, u_int flags)
2109 {
2110         struct agp_i810_softc *sc;
2111         vm_paddr_t spaddr;
2112         size_t slen;
2113         u_int i, j;
2114
2115         sc = device_get_softc(dev);
2116         for (i = j = 0; j < sg_list->sg_nseg; j++) {
2117                 spaddr = sg_list->sg_segs[i].ss_paddr;
2118                 slen = sg_list->sg_segs[i].ss_len;
2119                 for (; slen > 0; i++) {
2120                         sc->match->driver->install_gtt_pte(dev, first_entry + i,
2121                             spaddr, flags);
2122                         spaddr += AGP_PAGE_SIZE;
2123                         slen -= AGP_PAGE_SIZE;
2124                 }
2125         }
2126         sc->match->driver->sync_gtt_pte(dev, first_entry + i - 1);
2127 }
2128
2129 void
2130 intel_gtt_clear_range(u_int first_entry, u_int num_entries)
2131 {
2132
2133         agp_intel_gtt_clear_range(intel_agp, first_entry, num_entries);
2134 }
2135
2136 void
2137 intel_gtt_insert_pages(u_int first_entry, u_int num_entries, vm_page_t *pages,
2138     u_int flags)
2139 {
2140
2141         agp_intel_gtt_insert_pages(intel_agp, first_entry, num_entries,
2142             pages, flags);
2143 }
2144
2145 struct intel_gtt *intel_gtt_get(void)
2146 {
2147         intel_private.base = agp_intel_gtt_get(intel_agp);
2148         return &intel_private.base;
2149 }
2150
2151 int
2152 intel_gtt_chipset_flush(void)
2153 {
2154
2155         return (agp_intel_gtt_chipset_flush(intel_agp));
2156 }
2157
2158 void
2159 intel_gtt_unmap_memory(struct sglist *sg_list)
2160 {
2161
2162         agp_intel_gtt_unmap_memory(intel_agp, sg_list);
2163 }
2164
2165 int
2166 intel_gtt_map_memory(vm_page_t *pages, u_int num_entries,
2167     struct sglist **sg_list)
2168 {
2169
2170         return (agp_intel_gtt_map_memory(intel_agp, pages, num_entries,
2171             sg_list));
2172 }
2173
2174 void
2175 intel_gtt_insert_sg_entries(struct sglist *sg_list, u_int first_entry,
2176     u_int flags)
2177 {
2178
2179         agp_intel_gtt_insert_sg_entries(intel_agp, sg_list, first_entry, flags);
2180 }
2181
2182 /*
2183  * Only used by gen6
2184  */
2185 void
2186 intel_gtt_sync_pte(u_int entry)
2187 {
2188         struct agp_i810_softc *sc;
2189
2190         sc = device_get_softc(intel_agp);
2191         sc->match->driver->sync_gtt_pte(intel_agp, entry);
2192 }
2193
2194 /*
2195  * Only used by gen6
2196  */
2197 void
2198 intel_gtt_write(u_int entry, uint32_t val)
2199 {
2200         struct agp_i810_softc *sc;
2201
2202         sc = device_get_softc(intel_agp);
2203         sc->match->driver->write_gtt(intel_agp, entry, val);
2204 }