1 /* If-conversion support.
2 Copyright (C) 2000-2015 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
31 #include "hard-reg-set.h"
35 #include "insn-config.h"
39 #include "dominance.h"
43 #include "cfgcleanup.h"
44 #include "basic-block.h"
46 #include "statistics.h"
47 #include "double-int.h"
49 #include "fixed-value.h"
63 #include "insn-codes.h"
65 #include "diagnostic-core.h"
69 #include "tree-pass.h"
72 #include "shrink-wrap.h"
75 #ifndef HAVE_conditional_move
76 #define HAVE_conditional_move 0
88 #ifndef MAX_CONDITIONAL_EXECUTE
89 #define MAX_CONDITIONAL_EXECUTE \
90 (BRANCH_COST (optimize_function_for_speed_p (cfun), false) \
94 #ifndef HAVE_cbranchcc4
95 #define HAVE_cbranchcc4 0
98 #define IFCVT_MULTIPLE_DUMPS 1
100 #define NULL_BLOCK ((basic_block) NULL)
102 /* True if after combine pass. */
103 static bool ifcvt_after_combine;
105 /* # of IF-THEN or IF-THEN-ELSE blocks we looked at */
106 static int num_possible_if_blocks;
108 /* # of IF-THEN or IF-THEN-ELSE blocks were converted to conditional
110 static int num_updated_if_blocks;
112 /* # of changes made. */
113 static int num_true_changes;
115 /* Whether conditional execution changes were made. */
116 static int cond_exec_changed_p;
118 /* Forward references. */
119 static int count_bb_insns (const_basic_block);
120 static bool cheap_bb_rtx_cost_p (const_basic_block, int, int);
121 static rtx_insn *first_active_insn (basic_block);
122 static rtx_insn *last_active_insn (basic_block, int);
123 static rtx_insn *find_active_insn_before (basic_block, rtx_insn *);
124 static rtx_insn *find_active_insn_after (basic_block, rtx_insn *);
125 static basic_block block_fallthru (basic_block);
126 static int cond_exec_process_insns (ce_if_block *, rtx_insn *, rtx, rtx, int,
128 static rtx cond_exec_get_condition (rtx_insn *);
129 static rtx noce_get_condition (rtx_insn *, rtx_insn **, bool);
130 static int noce_operand_ok (const_rtx);
131 static void merge_if_block (ce_if_block *);
132 static int find_cond_trap (basic_block, edge, edge);
133 static basic_block find_if_header (basic_block, int);
134 static int block_jumps_and_fallthru_p (basic_block, basic_block);
135 static int noce_find_if_block (basic_block, edge, edge, int);
136 static int cond_exec_find_if_block (ce_if_block *);
137 static int find_if_case_1 (basic_block, edge, edge);
138 static int find_if_case_2 (basic_block, edge, edge);
139 static int dead_or_predicable (basic_block, basic_block, basic_block,
141 static void noce_emit_move_insn (rtx, rtx);
142 static rtx_insn *block_has_only_trap (basic_block);
144 /* Count the number of non-jump active insns in BB. */
147 count_bb_insns (const_basic_block bb)
150 rtx_insn *insn = BB_HEAD (bb);
154 if (active_insn_p (insn) && !JUMP_P (insn))
157 if (insn == BB_END (bb))
159 insn = NEXT_INSN (insn);
165 /* Determine whether the total insn_rtx_cost on non-jump insns in
166 basic block BB is less than MAX_COST. This function returns
167 false if the cost of any instruction could not be estimated.
169 The cost of the non-jump insns in BB is scaled by REG_BR_PROB_BASE
170 as those insns are being speculated. MAX_COST is scaled with SCALE
171 plus a small fudge factor. */
174 cheap_bb_rtx_cost_p (const_basic_block bb, int scale, int max_cost)
177 rtx_insn *insn = BB_HEAD (bb);
178 bool speed = optimize_bb_for_speed_p (bb);
180 /* Set scale to REG_BR_PROB_BASE to void the identical scaling
181 applied to insn_rtx_cost when optimizing for size. Only do
182 this after combine because if-conversion might interfere with
183 passes before combine.
185 Use optimize_function_for_speed_p instead of the pre-defined
186 variable speed to make sure it is set to same value for all
187 basic blocks in one if-conversion transformation. */
188 if (!optimize_function_for_speed_p (cfun) && ifcvt_after_combine)
189 scale = REG_BR_PROB_BASE;
190 /* Our branch probability/scaling factors are just estimates and don't
191 account for cases where we can get speculation for free and other
192 secondary benefits. So we fudge the scale factor to make speculating
193 appear a little more profitable when optimizing for performance. */
195 scale += REG_BR_PROB_BASE / 8;
202 if (NONJUMP_INSN_P (insn))
204 int cost = insn_rtx_cost (PATTERN (insn), speed) * REG_BR_PROB_BASE;
208 /* If this instruction is the load or set of a "stack" register,
209 such as a floating point register on x87, then the cost of
210 speculatively executing this insn may need to include
211 the additional cost of popping its result off of the
212 register stack. Unfortunately, correctly recognizing and
213 accounting for this additional overhead is tricky, so for
214 now we simply prohibit such speculative execution. */
217 rtx set = single_set (insn);
218 if (set && STACK_REG_P (SET_DEST (set)))
224 if (count >= max_cost)
227 else if (CALL_P (insn))
230 if (insn == BB_END (bb))
232 insn = NEXT_INSN (insn);
238 /* Return the first non-jump active insn in the basic block. */
241 first_active_insn (basic_block bb)
243 rtx_insn *insn = BB_HEAD (bb);
247 if (insn == BB_END (bb))
249 insn = NEXT_INSN (insn);
252 while (NOTE_P (insn) || DEBUG_INSN_P (insn))
254 if (insn == BB_END (bb))
256 insn = NEXT_INSN (insn);
265 /* Return the last non-jump active (non-jump) insn in the basic block. */
268 last_active_insn (basic_block bb, int skip_use_p)
270 rtx_insn *insn = BB_END (bb);
271 rtx_insn *head = BB_HEAD (bb);
275 || DEBUG_INSN_P (insn)
277 && NONJUMP_INSN_P (insn)
278 && GET_CODE (PATTERN (insn)) == USE))
282 insn = PREV_INSN (insn);
291 /* Return the active insn before INSN inside basic block CURR_BB. */
294 find_active_insn_before (basic_block curr_bb, rtx_insn *insn)
296 if (!insn || insn == BB_HEAD (curr_bb))
299 while ((insn = PREV_INSN (insn)) != NULL_RTX)
301 if (NONJUMP_INSN_P (insn) || JUMP_P (insn) || CALL_P (insn))
304 /* No other active insn all the way to the start of the basic block. */
305 if (insn == BB_HEAD (curr_bb))
312 /* Return the active insn after INSN inside basic block CURR_BB. */
315 find_active_insn_after (basic_block curr_bb, rtx_insn *insn)
317 if (!insn || insn == BB_END (curr_bb))
320 while ((insn = NEXT_INSN (insn)) != NULL_RTX)
322 if (NONJUMP_INSN_P (insn) || JUMP_P (insn) || CALL_P (insn))
325 /* No other active insn all the way to the end of the basic block. */
326 if (insn == BB_END (curr_bb))
333 /* Return the basic block reached by falling though the basic block BB. */
336 block_fallthru (basic_block bb)
338 edge e = find_fallthru_edge (bb->succs);
340 return (e) ? e->dest : NULL_BLOCK;
343 /* Return true if RTXs A and B can be safely interchanged. */
346 rtx_interchangeable_p (const_rtx a, const_rtx b)
348 if (!rtx_equal_p (a, b))
351 if (GET_CODE (a) != MEM)
354 /* A dead type-unsafe memory reference is legal, but a live type-unsafe memory
355 reference is not. Interchanging a dead type-unsafe memory reference with
356 a live type-safe one creates a live type-unsafe memory reference, in other
357 words, it makes the program illegal.
358 We check here conservatively whether the two memory references have equal
359 memory attributes. */
361 return mem_attrs_eq_p (get_mem_attrs (a), get_mem_attrs (b));
365 /* Go through a bunch of insns, converting them to conditional
366 execution format if possible. Return TRUE if all of the non-note
367 insns were processed. */
370 cond_exec_process_insns (ce_if_block *ce_info ATTRIBUTE_UNUSED,
371 /* if block information */rtx_insn *start,
372 /* first insn to look at */rtx end,
373 /* last insn to look at */rtx test,
374 /* conditional execution test */int prob_val,
375 /* probability of branch taken. */int mod_ok)
377 int must_be_last = FALSE;
385 for (insn = start; ; insn = NEXT_INSN (insn))
387 /* dwarf2out can't cope with conditional prologues. */
388 if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_PROLOGUE_END)
391 if (NOTE_P (insn) || DEBUG_INSN_P (insn))
394 gcc_assert (NONJUMP_INSN_P (insn) || CALL_P (insn));
396 /* dwarf2out can't cope with conditional unwind info. */
397 if (RTX_FRAME_RELATED_P (insn))
400 /* Remove USE insns that get in the way. */
401 if (reload_completed && GET_CODE (PATTERN (insn)) == USE)
403 /* ??? Ug. Actually unlinking the thing is problematic,
404 given what we'd have to coordinate with our callers. */
405 SET_INSN_DELETED (insn);
409 /* Last insn wasn't last? */
413 if (modified_in_p (test, insn))
420 /* Now build the conditional form of the instruction. */
421 pattern = PATTERN (insn);
422 xtest = copy_rtx (test);
424 /* If this is already a COND_EXEC, rewrite the test to be an AND of the
426 if (GET_CODE (pattern) == COND_EXEC)
428 if (GET_MODE (xtest) != GET_MODE (COND_EXEC_TEST (pattern)))
431 xtest = gen_rtx_AND (GET_MODE (xtest), xtest,
432 COND_EXEC_TEST (pattern));
433 pattern = COND_EXEC_CODE (pattern);
436 pattern = gen_rtx_COND_EXEC (VOIDmode, xtest, pattern);
438 /* If the machine needs to modify the insn being conditionally executed,
439 say for example to force a constant integer operand into a temp
440 register, do so here. */
441 #ifdef IFCVT_MODIFY_INSN
442 IFCVT_MODIFY_INSN (ce_info, pattern, insn);
447 validate_change (insn, &PATTERN (insn), pattern, 1);
449 if (CALL_P (insn) && prob_val >= 0)
450 validate_change (insn, ®_NOTES (insn),
451 gen_rtx_INT_LIST ((machine_mode) REG_BR_PROB,
452 prob_val, REG_NOTES (insn)), 1);
462 /* Return the condition for a jump. Do not do any special processing. */
465 cond_exec_get_condition (rtx_insn *jump)
469 if (any_condjump_p (jump))
470 test_if = SET_SRC (pc_set (jump));
473 cond = XEXP (test_if, 0);
475 /* If this branches to JUMP_LABEL when the condition is false,
476 reverse the condition. */
477 if (GET_CODE (XEXP (test_if, 2)) == LABEL_REF
478 && LABEL_REF_LABEL (XEXP (test_if, 2)) == JUMP_LABEL (jump))
480 enum rtx_code rev = reversed_comparison_code (cond, jump);
484 cond = gen_rtx_fmt_ee (rev, GET_MODE (cond), XEXP (cond, 0),
491 /* Given a simple IF-THEN or IF-THEN-ELSE block, attempt to convert it
492 to conditional execution. Return TRUE if we were successful at
493 converting the block. */
496 cond_exec_process_if_block (ce_if_block * ce_info,
497 /* if block information */int do_multiple_p)
499 basic_block test_bb = ce_info->test_bb; /* last test block */
500 basic_block then_bb = ce_info->then_bb; /* THEN */
501 basic_block else_bb = ce_info->else_bb; /* ELSE or NULL */
502 rtx test_expr; /* expression in IF_THEN_ELSE that is tested */
503 rtx_insn *then_start; /* first insn in THEN block */
504 rtx_insn *then_end; /* last insn + 1 in THEN block */
505 rtx_insn *else_start = NULL; /* first insn in ELSE block or NULL */
506 rtx_insn *else_end = NULL; /* last insn + 1 in ELSE block */
507 int max; /* max # of insns to convert. */
508 int then_mod_ok; /* whether conditional mods are ok in THEN */
509 rtx true_expr; /* test for else block insns */
510 rtx false_expr; /* test for then block insns */
511 int true_prob_val; /* probability of else block */
512 int false_prob_val; /* probability of then block */
513 rtx_insn *then_last_head = NULL; /* Last match at the head of THEN */
514 rtx_insn *else_last_head = NULL; /* Last match at the head of ELSE */
515 rtx_insn *then_first_tail = NULL; /* First match at the tail of THEN */
516 rtx_insn *else_first_tail = NULL; /* First match at the tail of ELSE */
517 int then_n_insns, else_n_insns, n_insns;
518 enum rtx_code false_code;
521 /* If test is comprised of && or || elements, and we've failed at handling
522 all of them together, just use the last test if it is the special case of
523 && elements without an ELSE block. */
524 if (!do_multiple_p && ce_info->num_multiple_test_blocks)
526 if (else_bb || ! ce_info->and_and_p)
529 ce_info->test_bb = test_bb = ce_info->last_test_bb;
530 ce_info->num_multiple_test_blocks = 0;
531 ce_info->num_and_and_blocks = 0;
532 ce_info->num_or_or_blocks = 0;
535 /* Find the conditional jump to the ELSE or JOIN part, and isolate
537 test_expr = cond_exec_get_condition (BB_END (test_bb));
541 /* If the conditional jump is more than just a conditional jump,
542 then we can not do conditional execution conversion on this block. */
543 if (! onlyjump_p (BB_END (test_bb)))
546 /* Collect the bounds of where we're to search, skipping any labels, jumps
547 and notes at the beginning and end of the block. Then count the total
548 number of insns and see if it is small enough to convert. */
549 then_start = first_active_insn (then_bb);
550 then_end = last_active_insn (then_bb, TRUE);
551 then_n_insns = ce_info->num_then_insns = count_bb_insns (then_bb);
552 n_insns = then_n_insns;
553 max = MAX_CONDITIONAL_EXECUTE;
560 else_start = first_active_insn (else_bb);
561 else_end = last_active_insn (else_bb, TRUE);
562 else_n_insns = ce_info->num_else_insns = count_bb_insns (else_bb);
563 n_insns += else_n_insns;
565 /* Look for matching sequences at the head and tail of the two blocks,
566 and limit the range of insns to be converted if possible. */
567 n_matching = flow_find_cross_jump (then_bb, else_bb,
568 &then_first_tail, &else_first_tail,
570 if (then_first_tail == BB_HEAD (then_bb))
571 then_start = then_end = NULL;
572 if (else_first_tail == BB_HEAD (else_bb))
573 else_start = else_end = NULL;
578 then_end = find_active_insn_before (then_bb, then_first_tail);
580 else_end = find_active_insn_before (else_bb, else_first_tail);
581 n_insns -= 2 * n_matching;
586 && then_n_insns > n_matching
587 && else_n_insns > n_matching)
589 int longest_match = MIN (then_n_insns - n_matching,
590 else_n_insns - n_matching);
592 = flow_find_head_matching_sequence (then_bb, else_bb,
601 /* We won't pass the insns in the head sequence to
602 cond_exec_process_insns, so we need to test them here
603 to make sure that they don't clobber the condition. */
604 for (insn = BB_HEAD (then_bb);
605 insn != NEXT_INSN (then_last_head);
606 insn = NEXT_INSN (insn))
607 if (!LABEL_P (insn) && !NOTE_P (insn)
608 && !DEBUG_INSN_P (insn)
609 && modified_in_p (test_expr, insn))
613 if (then_last_head == then_end)
614 then_start = then_end = NULL;
615 if (else_last_head == else_end)
616 else_start = else_end = NULL;
621 then_start = find_active_insn_after (then_bb, then_last_head);
623 else_start = find_active_insn_after (else_bb, else_last_head);
624 n_insns -= 2 * n_matching;
632 /* Map test_expr/test_jump into the appropriate MD tests to use on
633 the conditionally executed code. */
635 true_expr = test_expr;
637 false_code = reversed_comparison_code (true_expr, BB_END (test_bb));
638 if (false_code != UNKNOWN)
639 false_expr = gen_rtx_fmt_ee (false_code, GET_MODE (true_expr),
640 XEXP (true_expr, 0), XEXP (true_expr, 1));
642 false_expr = NULL_RTX;
644 #ifdef IFCVT_MODIFY_TESTS
645 /* If the machine description needs to modify the tests, such as setting a
646 conditional execution register from a comparison, it can do so here. */
647 IFCVT_MODIFY_TESTS (ce_info, true_expr, false_expr);
649 /* See if the conversion failed. */
650 if (!true_expr || !false_expr)
654 note = find_reg_note (BB_END (test_bb), REG_BR_PROB, NULL_RTX);
657 true_prob_val = XINT (note, 0);
658 false_prob_val = REG_BR_PROB_BASE - true_prob_val;
666 /* If we have && or || tests, do them here. These tests are in the adjacent
667 blocks after the first block containing the test. */
668 if (ce_info->num_multiple_test_blocks > 0)
670 basic_block bb = test_bb;
671 basic_block last_test_bb = ce_info->last_test_bb;
678 rtx_insn *start, *end;
680 enum rtx_code f_code;
682 bb = block_fallthru (bb);
683 start = first_active_insn (bb);
684 end = last_active_insn (bb, TRUE);
686 && ! cond_exec_process_insns (ce_info, start, end, false_expr,
687 false_prob_val, FALSE))
690 /* If the conditional jump is more than just a conditional jump, then
691 we can not do conditional execution conversion on this block. */
692 if (! onlyjump_p (BB_END (bb)))
695 /* Find the conditional jump and isolate the test. */
696 t = cond_exec_get_condition (BB_END (bb));
700 f_code = reversed_comparison_code (t, BB_END (bb));
701 if (f_code == UNKNOWN)
704 f = gen_rtx_fmt_ee (f_code, GET_MODE (t), XEXP (t, 0), XEXP (t, 1));
705 if (ce_info->and_and_p)
707 t = gen_rtx_AND (GET_MODE (t), true_expr, t);
708 f = gen_rtx_IOR (GET_MODE (t), false_expr, f);
712 t = gen_rtx_IOR (GET_MODE (t), true_expr, t);
713 f = gen_rtx_AND (GET_MODE (t), false_expr, f);
716 /* If the machine description needs to modify the tests, such as
717 setting a conditional execution register from a comparison, it can
719 #ifdef IFCVT_MODIFY_MULTIPLE_TESTS
720 IFCVT_MODIFY_MULTIPLE_TESTS (ce_info, bb, t, f);
722 /* See if the conversion failed. */
730 while (bb != last_test_bb);
733 /* For IF-THEN-ELSE blocks, we don't allow modifications of the test
734 on then THEN block. */
735 then_mod_ok = (else_bb == NULL_BLOCK);
737 /* Go through the THEN and ELSE blocks converting the insns if possible
738 to conditional execution. */
742 || ! cond_exec_process_insns (ce_info, then_start, then_end,
743 false_expr, false_prob_val,
747 if (else_bb && else_end
748 && ! cond_exec_process_insns (ce_info, else_start, else_end,
749 true_expr, true_prob_val, TRUE))
752 /* If we cannot apply the changes, fail. Do not go through the normal fail
753 processing, since apply_change_group will call cancel_changes. */
754 if (! apply_change_group ())
756 #ifdef IFCVT_MODIFY_CANCEL
757 /* Cancel any machine dependent changes. */
758 IFCVT_MODIFY_CANCEL (ce_info);
763 #ifdef IFCVT_MODIFY_FINAL
764 /* Do any machine dependent final modifications. */
765 IFCVT_MODIFY_FINAL (ce_info);
768 /* Conversion succeeded. */
770 fprintf (dump_file, "%d insn%s converted to conditional execution.\n",
771 n_insns, (n_insns == 1) ? " was" : "s were");
773 /* Merge the blocks! If we had matching sequences, make sure to delete one
774 copy at the appropriate location first: delete the copy in the THEN branch
775 for a tail sequence so that the remaining one is executed last for both
776 branches, and delete the copy in the ELSE branch for a head sequence so
777 that the remaining one is executed first for both branches. */
780 rtx_insn *from = then_first_tail;
782 from = find_active_insn_after (then_bb, from);
783 delete_insn_chain (from, BB_END (then_bb), false);
786 delete_insn_chain (first_active_insn (else_bb), else_last_head, false);
788 merge_if_block (ce_info);
789 cond_exec_changed_p = TRUE;
793 #ifdef IFCVT_MODIFY_CANCEL
794 /* Cancel any machine dependent changes. */
795 IFCVT_MODIFY_CANCEL (ce_info);
802 /* Used by noce_process_if_block to communicate with its subroutines.
804 The subroutines know that A and B may be evaluated freely. They
805 know that X is a register. They should insert new instructions
806 before cond_earliest. */
810 /* The basic blocks that make up the IF-THEN-{ELSE-,}JOIN block. */
811 basic_block test_bb, then_bb, else_bb, join_bb;
813 /* The jump that ends TEST_BB. */
816 /* The jump condition. */
819 /* New insns should be inserted before this one. */
820 rtx_insn *cond_earliest;
822 /* Insns in the THEN and ELSE block. There is always just this
823 one insns in those blocks. The insns are single_set insns.
824 If there was no ELSE block, INSN_B is the last insn before
825 COND_EARLIEST, or NULL_RTX. In the former case, the insn
826 operands are still valid, as if INSN_B was moved down below
828 rtx_insn *insn_a, *insn_b;
830 /* The SET_SRC of INSN_A and INSN_B. */
833 /* The SET_DEST of INSN_A. */
836 /* True if this if block is not canonical. In the canonical form of
837 if blocks, the THEN_BB is the block reached via the fallthru edge
838 from TEST_BB. For the noce transformations, we allow the symmetric
840 bool then_else_reversed;
842 /* Estimated cost of the particular branch instruction. */
846 static rtx noce_emit_store_flag (struct noce_if_info *, rtx, int, int);
847 static int noce_try_move (struct noce_if_info *);
848 static int noce_try_store_flag (struct noce_if_info *);
849 static int noce_try_addcc (struct noce_if_info *);
850 static int noce_try_store_flag_constants (struct noce_if_info *);
851 static int noce_try_store_flag_mask (struct noce_if_info *);
852 static rtx noce_emit_cmove (struct noce_if_info *, rtx, enum rtx_code, rtx,
854 static int noce_try_cmove (struct noce_if_info *);
855 static int noce_try_cmove_arith (struct noce_if_info *);
856 static rtx noce_get_alt_condition (struct noce_if_info *, rtx, rtx_insn **);
857 static int noce_try_minmax (struct noce_if_info *);
858 static int noce_try_abs (struct noce_if_info *);
859 static int noce_try_sign_mask (struct noce_if_info *);
861 /* Helper function for noce_try_store_flag*. */
864 noce_emit_store_flag (struct noce_if_info *if_info, rtx x, int reversep,
867 rtx cond = if_info->cond;
871 cond_complex = (! general_operand (XEXP (cond, 0), VOIDmode)
872 || ! general_operand (XEXP (cond, 1), VOIDmode));
874 /* If earliest == jump, or when the condition is complex, try to
875 build the store_flag insn directly. */
879 rtx set = pc_set (if_info->jump);
880 cond = XEXP (SET_SRC (set), 0);
881 if (GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF
882 && LABEL_REF_LABEL (XEXP (SET_SRC (set), 2)) == JUMP_LABEL (if_info->jump))
883 reversep = !reversep;
884 if (if_info->then_else_reversed)
885 reversep = !reversep;
889 code = reversed_comparison_code (cond, if_info->jump);
891 code = GET_CODE (cond);
893 if ((if_info->cond_earliest == if_info->jump || cond_complex)
894 && (normalize == 0 || STORE_FLAG_VALUE == normalize))
896 rtx src = gen_rtx_fmt_ee (code, GET_MODE (x), XEXP (cond, 0),
898 rtx set = gen_rtx_SET (VOIDmode, x, src);
901 rtx_insn *insn = emit_insn (set);
903 if (recog_memoized (insn) >= 0)
905 rtx_insn *seq = get_insns ();
909 if_info->cond_earliest = if_info->jump;
917 /* Don't even try if the comparison operands or the mode of X are weird. */
918 if (cond_complex || !SCALAR_INT_MODE_P (GET_MODE (x)))
921 return emit_store_flag (x, code, XEXP (cond, 0),
922 XEXP (cond, 1), VOIDmode,
923 (code == LTU || code == LEU
924 || code == GEU || code == GTU), normalize);
927 /* Emit instruction to move an rtx, possibly into STRICT_LOW_PART.
928 X is the destination/target and Y is the value to copy. */
931 noce_emit_move_insn (rtx x, rtx y)
933 machine_mode outmode;
937 if (GET_CODE (x) != STRICT_LOW_PART)
939 rtx_insn *seq, *insn;
944 /* Check that the SET_SRC is reasonable before calling emit_move_insn,
945 otherwise construct a suitable SET pattern ourselves. */
946 insn = (OBJECT_P (y) || CONSTANT_P (y) || GET_CODE (y) == SUBREG)
947 ? emit_move_insn (x, y)
948 : emit_insn (gen_rtx_SET (VOIDmode, x, y));
952 if (recog_memoized (insn) <= 0)
954 if (GET_CODE (x) == ZERO_EXTRACT)
956 rtx op = XEXP (x, 0);
957 unsigned HOST_WIDE_INT size = INTVAL (XEXP (x, 1));
958 unsigned HOST_WIDE_INT start = INTVAL (XEXP (x, 2));
960 /* store_bit_field expects START to be relative to
961 BYTES_BIG_ENDIAN and adjusts this value for machines with
962 BITS_BIG_ENDIAN != BYTES_BIG_ENDIAN. In order to be able to
963 invoke store_bit_field again it is necessary to have the START
964 value from the first call. */
965 if (BITS_BIG_ENDIAN != BYTES_BIG_ENDIAN)
968 start = BITS_PER_UNIT - start - size;
971 gcc_assert (REG_P (op));
972 start = BITS_PER_WORD - start - size;
976 gcc_assert (start < (MEM_P (op) ? BITS_PER_UNIT : BITS_PER_WORD));
977 store_bit_field (op, size, start, 0, 0, GET_MODE (x), y);
981 switch (GET_RTX_CLASS (GET_CODE (y)))
984 ot = code_to_optab (GET_CODE (y));
988 target = expand_unop (GET_MODE (y), ot, XEXP (y, 0), x, 0);
989 if (target != NULL_RTX)
992 emit_move_insn (x, target);
1000 case RTX_COMM_ARITH:
1001 ot = code_to_optab (GET_CODE (y));
1005 target = expand_binop (GET_MODE (y), ot,
1006 XEXP (y, 0), XEXP (y, 1),
1007 x, 0, OPTAB_DIRECT);
1008 if (target != NULL_RTX)
1011 emit_move_insn (x, target);
1027 outer = XEXP (x, 0);
1028 inner = XEXP (outer, 0);
1029 outmode = GET_MODE (outer);
1030 bitpos = SUBREG_BYTE (outer) * BITS_PER_UNIT;
1031 store_bit_field (inner, GET_MODE_BITSIZE (outmode), bitpos,
1035 /* Return the CC reg if it is used in COND. */
1038 cc_in_cond (rtx cond)
1040 if (HAVE_cbranchcc4 && cond
1041 && GET_MODE_CLASS (GET_MODE (XEXP (cond, 0))) == MODE_CC)
1042 return XEXP (cond, 0);
1047 /* Return sequence of instructions generated by if conversion. This
1048 function calls end_sequence() to end the current stream, ensures
1049 that are instructions are unshared, recognizable non-jump insns.
1050 On failure, this function returns a NULL_RTX. */
1053 end_ifcvt_sequence (struct noce_if_info *if_info)
1056 rtx_insn *seq = get_insns ();
1057 rtx cc = cc_in_cond (if_info->cond);
1059 set_used_flags (if_info->x);
1060 set_used_flags (if_info->cond);
1061 set_used_flags (if_info->a);
1062 set_used_flags (if_info->b);
1063 unshare_all_rtl_in_chain (seq);
1066 /* Make sure that all of the instructions emitted are recognizable,
1067 and that we haven't introduced a new jump instruction.
1068 As an exercise for the reader, build a general mechanism that
1069 allows proper placement of required clobbers. */
1070 for (insn = seq; insn; insn = NEXT_INSN (insn))
1072 || recog_memoized (insn) == -1
1073 /* Make sure new generated code does not clobber CC. */
1074 || (cc && set_of (cc, insn)))
1080 /* Convert "if (a != b) x = a; else x = b" into "x = a" and
1081 "if (a == b) x = a; else x = b" into "x = b". */
1084 noce_try_move (struct noce_if_info *if_info)
1086 rtx cond = if_info->cond;
1087 enum rtx_code code = GET_CODE (cond);
1091 if (code != NE && code != EQ)
1094 /* This optimization isn't valid if either A or B could be a NaN
1095 or a signed zero. */
1096 if (HONOR_NANS (if_info->x)
1097 || HONOR_SIGNED_ZEROS (if_info->x))
1100 /* Check whether the operands of the comparison are A and in
1102 if ((rtx_equal_p (if_info->a, XEXP (cond, 0))
1103 && rtx_equal_p (if_info->b, XEXP (cond, 1)))
1104 || (rtx_equal_p (if_info->a, XEXP (cond, 1))
1105 && rtx_equal_p (if_info->b, XEXP (cond, 0))))
1107 if (!rtx_interchangeable_p (if_info->a, if_info->b))
1110 y = (code == EQ) ? if_info->a : if_info->b;
1112 /* Avoid generating the move if the source is the destination. */
1113 if (! rtx_equal_p (if_info->x, y))
1116 noce_emit_move_insn (if_info->x, y);
1117 seq = end_ifcvt_sequence (if_info);
1121 emit_insn_before_setloc (seq, if_info->jump,
1122 INSN_LOCATION (if_info->insn_a));
1129 /* Convert "if (test) x = 1; else x = 0".
1131 Only try 0 and STORE_FLAG_VALUE here. Other combinations will be
1132 tried in noce_try_store_flag_constants after noce_try_cmove has had
1133 a go at the conversion. */
1136 noce_try_store_flag (struct noce_if_info *if_info)
1142 if (CONST_INT_P (if_info->b)
1143 && INTVAL (if_info->b) == STORE_FLAG_VALUE
1144 && if_info->a == const0_rtx)
1146 else if (if_info->b == const0_rtx
1147 && CONST_INT_P (if_info->a)
1148 && INTVAL (if_info->a) == STORE_FLAG_VALUE
1149 && (reversed_comparison_code (if_info->cond, if_info->jump)
1157 target = noce_emit_store_flag (if_info, if_info->x, reversep, 0);
1160 if (target != if_info->x)
1161 noce_emit_move_insn (if_info->x, target);
1163 seq = end_ifcvt_sequence (if_info);
1167 emit_insn_before_setloc (seq, if_info->jump,
1168 INSN_LOCATION (if_info->insn_a));
1178 /* Convert "if (test) x = a; else x = b", for A and B constant. */
1181 noce_try_store_flag_constants (struct noce_if_info *if_info)
1186 HOST_WIDE_INT itrue, ifalse, diff, tmp;
1187 int normalize, can_reverse;
1190 if (CONST_INT_P (if_info->a)
1191 && CONST_INT_P (if_info->b))
1193 mode = GET_MODE (if_info->x);
1194 ifalse = INTVAL (if_info->a);
1195 itrue = INTVAL (if_info->b);
1197 diff = (unsigned HOST_WIDE_INT) itrue - ifalse;
1198 /* Make sure we can represent the difference between the two values. */
1200 != ((ifalse < 0) != (itrue < 0) ? ifalse < 0 : ifalse < itrue))
1203 diff = trunc_int_for_mode (diff, mode);
1205 can_reverse = (reversed_comparison_code (if_info->cond, if_info->jump)
1209 if (diff == STORE_FLAG_VALUE || diff == -STORE_FLAG_VALUE)
1211 else if (ifalse == 0 && exact_log2 (itrue) >= 0
1212 && (STORE_FLAG_VALUE == 1
1213 || if_info->branch_cost >= 2))
1215 else if (itrue == 0 && exact_log2 (ifalse) >= 0 && can_reverse
1216 && (STORE_FLAG_VALUE == 1 || if_info->branch_cost >= 2))
1217 normalize = 1, reversep = 1;
1218 else if (itrue == -1
1219 && (STORE_FLAG_VALUE == -1
1220 || if_info->branch_cost >= 2))
1222 else if (ifalse == -1 && can_reverse
1223 && (STORE_FLAG_VALUE == -1 || if_info->branch_cost >= 2))
1224 normalize = -1, reversep = 1;
1225 else if ((if_info->branch_cost >= 2 && STORE_FLAG_VALUE == -1)
1226 || if_info->branch_cost >= 3)
1233 tmp = itrue; itrue = ifalse; ifalse = tmp;
1234 diff = trunc_int_for_mode (-(unsigned HOST_WIDE_INT) diff, mode);
1238 target = noce_emit_store_flag (if_info, if_info->x, reversep, normalize);
1245 /* if (test) x = 3; else x = 4;
1246 => x = 3 + (test == 0); */
1247 if (diff == STORE_FLAG_VALUE || diff == -STORE_FLAG_VALUE)
1249 target = expand_simple_binop (mode,
1250 (diff == STORE_FLAG_VALUE
1252 gen_int_mode (ifalse, mode), target,
1253 if_info->x, 0, OPTAB_WIDEN);
1256 /* if (test) x = 8; else x = 0;
1257 => x = (test != 0) << 3; */
1258 else if (ifalse == 0 && (tmp = exact_log2 (itrue)) >= 0)
1260 target = expand_simple_binop (mode, ASHIFT,
1261 target, GEN_INT (tmp), if_info->x, 0,
1265 /* if (test) x = -1; else x = b;
1266 => x = -(test != 0) | b; */
1267 else if (itrue == -1)
1269 target = expand_simple_binop (mode, IOR,
1270 target, gen_int_mode (ifalse, mode),
1271 if_info->x, 0, OPTAB_WIDEN);
1274 /* if (test) x = a; else x = b;
1275 => x = (-(test != 0) & (b - a)) + a; */
1278 target = expand_simple_binop (mode, AND,
1279 target, gen_int_mode (diff, mode),
1280 if_info->x, 0, OPTAB_WIDEN);
1282 target = expand_simple_binop (mode, PLUS,
1283 target, gen_int_mode (ifalse, mode),
1284 if_info->x, 0, OPTAB_WIDEN);
1293 if (target != if_info->x)
1294 noce_emit_move_insn (if_info->x, target);
1296 seq = end_ifcvt_sequence (if_info);
1300 emit_insn_before_setloc (seq, if_info->jump,
1301 INSN_LOCATION (if_info->insn_a));
1308 /* Convert "if (test) foo++" into "foo += (test != 0)", and
1309 similarly for "foo--". */
1312 noce_try_addcc (struct noce_if_info *if_info)
1316 int subtract, normalize;
1318 if (GET_CODE (if_info->a) == PLUS
1319 && rtx_equal_p (XEXP (if_info->a, 0), if_info->b)
1320 && (reversed_comparison_code (if_info->cond, if_info->jump)
1323 rtx cond = if_info->cond;
1324 enum rtx_code code = reversed_comparison_code (cond, if_info->jump);
1326 /* First try to use addcc pattern. */
1327 if (general_operand (XEXP (cond, 0), VOIDmode)
1328 && general_operand (XEXP (cond, 1), VOIDmode))
1331 target = emit_conditional_add (if_info->x, code,
1336 XEXP (if_info->a, 1),
1337 GET_MODE (if_info->x),
1338 (code == LTU || code == GEU
1339 || code == LEU || code == GTU));
1342 if (target != if_info->x)
1343 noce_emit_move_insn (if_info->x, target);
1345 seq = end_ifcvt_sequence (if_info);
1349 emit_insn_before_setloc (seq, if_info->jump,
1350 INSN_LOCATION (if_info->insn_a));
1356 /* If that fails, construct conditional increment or decrement using
1358 if (if_info->branch_cost >= 2
1359 && (XEXP (if_info->a, 1) == const1_rtx
1360 || XEXP (if_info->a, 1) == constm1_rtx))
1363 if (STORE_FLAG_VALUE == INTVAL (XEXP (if_info->a, 1)))
1364 subtract = 0, normalize = 0;
1365 else if (-STORE_FLAG_VALUE == INTVAL (XEXP (if_info->a, 1)))
1366 subtract = 1, normalize = 0;
1368 subtract = 0, normalize = INTVAL (XEXP (if_info->a, 1));
1371 target = noce_emit_store_flag (if_info,
1372 gen_reg_rtx (GET_MODE (if_info->x)),
1376 target = expand_simple_binop (GET_MODE (if_info->x),
1377 subtract ? MINUS : PLUS,
1378 if_info->b, target, if_info->x,
1382 if (target != if_info->x)
1383 noce_emit_move_insn (if_info->x, target);
1385 seq = end_ifcvt_sequence (if_info);
1389 emit_insn_before_setloc (seq, if_info->jump,
1390 INSN_LOCATION (if_info->insn_a));
1400 /* Convert "if (test) x = 0;" to "x &= -(test == 0);" */
1403 noce_try_store_flag_mask (struct noce_if_info *if_info)
1410 if ((if_info->branch_cost >= 2
1411 || STORE_FLAG_VALUE == -1)
1412 && ((if_info->a == const0_rtx
1413 && rtx_equal_p (if_info->b, if_info->x))
1414 || ((reversep = (reversed_comparison_code (if_info->cond,
1417 && if_info->b == const0_rtx
1418 && rtx_equal_p (if_info->a, if_info->x))))
1421 target = noce_emit_store_flag (if_info,
1422 gen_reg_rtx (GET_MODE (if_info->x)),
1425 target = expand_simple_binop (GET_MODE (if_info->x), AND,
1427 target, if_info->x, 0,
1432 int old_cost, new_cost, insn_cost;
1435 if (target != if_info->x)
1436 noce_emit_move_insn (if_info->x, target);
1438 seq = end_ifcvt_sequence (if_info);
1442 speed_p = optimize_bb_for_speed_p (BLOCK_FOR_INSN (if_info->insn_a));
1443 insn_cost = insn_rtx_cost (PATTERN (if_info->insn_a), speed_p);
1444 old_cost = COSTS_N_INSNS (if_info->branch_cost) + insn_cost;
1445 new_cost = seq_cost (seq, speed_p);
1447 if (new_cost > old_cost)
1450 emit_insn_before_setloc (seq, if_info->jump,
1451 INSN_LOCATION (if_info->insn_a));
1461 /* Helper function for noce_try_cmove and noce_try_cmove_arith. */
1464 noce_emit_cmove (struct noce_if_info *if_info, rtx x, enum rtx_code code,
1465 rtx cmp_a, rtx cmp_b, rtx vfalse, rtx vtrue)
1467 rtx target ATTRIBUTE_UNUSED;
1468 int unsignedp ATTRIBUTE_UNUSED;
1470 /* If earliest == jump, try to build the cmove insn directly.
1471 This is helpful when combine has created some complex condition
1472 (like for alpha's cmovlbs) that we can't hope to regenerate
1473 through the normal interface. */
1475 if (if_info->cond_earliest == if_info->jump)
1477 rtx cond = gen_rtx_fmt_ee (code, GET_MODE (if_info->cond), cmp_a, cmp_b);
1478 rtx if_then_else = gen_rtx_IF_THEN_ELSE (GET_MODE (x),
1479 cond, vtrue, vfalse);
1480 rtx set = gen_rtx_SET (VOIDmode, x, if_then_else);
1483 rtx_insn *insn = emit_insn (set);
1485 if (recog_memoized (insn) >= 0)
1487 rtx_insn *seq = get_insns ();
1497 /* Don't even try if the comparison operands are weird
1498 except that the target supports cbranchcc4. */
1499 if (! general_operand (cmp_a, GET_MODE (cmp_a))
1500 || ! general_operand (cmp_b, GET_MODE (cmp_b)))
1502 if (!(HAVE_cbranchcc4)
1503 || GET_MODE_CLASS (GET_MODE (cmp_a)) != MODE_CC
1504 || cmp_b != const0_rtx)
1508 #if HAVE_conditional_move
1509 unsignedp = (code == LTU || code == GEU
1510 || code == LEU || code == GTU);
1512 target = emit_conditional_move (x, code, cmp_a, cmp_b, VOIDmode,
1513 vtrue, vfalse, GET_MODE (x),
1518 /* We might be faced with a situation like:
1521 vtrue = (subreg:M (reg:N VTRUE) BYTE)
1522 vfalse = (subreg:M (reg:N VFALSE) BYTE)
1524 We can't do a conditional move in mode M, but it's possible that we
1525 could do a conditional move in mode N instead and take a subreg of
1528 If we can't create new pseudos, though, don't bother. */
1529 if (reload_completed)
1532 if (GET_CODE (vtrue) == SUBREG && GET_CODE (vfalse) == SUBREG)
1534 rtx reg_vtrue = SUBREG_REG (vtrue);
1535 rtx reg_vfalse = SUBREG_REG (vfalse);
1536 unsigned int byte_vtrue = SUBREG_BYTE (vtrue);
1537 unsigned int byte_vfalse = SUBREG_BYTE (vfalse);
1538 rtx promoted_target;
1540 if (GET_MODE (reg_vtrue) != GET_MODE (reg_vfalse)
1541 || byte_vtrue != byte_vfalse
1542 || (SUBREG_PROMOTED_VAR_P (vtrue)
1543 != SUBREG_PROMOTED_VAR_P (vfalse))
1544 || (SUBREG_PROMOTED_GET (vtrue)
1545 != SUBREG_PROMOTED_GET (vfalse)))
1548 promoted_target = gen_reg_rtx (GET_MODE (reg_vtrue));
1550 target = emit_conditional_move (promoted_target, code, cmp_a, cmp_b,
1551 VOIDmode, reg_vtrue, reg_vfalse,
1552 GET_MODE (reg_vtrue), unsignedp);
1553 /* Nope, couldn't do it in that mode either. */
1557 target = gen_rtx_SUBREG (GET_MODE (vtrue), promoted_target, byte_vtrue);
1558 SUBREG_PROMOTED_VAR_P (target) = SUBREG_PROMOTED_VAR_P (vtrue);
1559 SUBREG_PROMOTED_SET (target, SUBREG_PROMOTED_GET (vtrue));
1560 emit_move_insn (x, target);
1566 /* We'll never get here, as noce_process_if_block doesn't call the
1567 functions involved. Ifdef code, however, should be discouraged
1568 because it leads to typos in the code not selected. However,
1569 emit_conditional_move won't exist either. */
1574 /* Try only simple constants and registers here. More complex cases
1575 are handled in noce_try_cmove_arith after noce_try_store_flag_arith
1576 has had a go at it. */
1579 noce_try_cmove (struct noce_if_info *if_info)
1585 if ((CONSTANT_P (if_info->a) || register_operand (if_info->a, VOIDmode))
1586 && (CONSTANT_P (if_info->b) || register_operand (if_info->b, VOIDmode)))
1590 code = GET_CODE (if_info->cond);
1591 target = noce_emit_cmove (if_info, if_info->x, code,
1592 XEXP (if_info->cond, 0),
1593 XEXP (if_info->cond, 1),
1594 if_info->a, if_info->b);
1598 if (target != if_info->x)
1599 noce_emit_move_insn (if_info->x, target);
1601 seq = end_ifcvt_sequence (if_info);
1605 emit_insn_before_setloc (seq, if_info->jump,
1606 INSN_LOCATION (if_info->insn_a));
1619 /* Try more complex cases involving conditional_move. */
1622 noce_try_cmove_arith (struct noce_if_info *if_info)
1628 rtx_insn *insn_a, *insn_b;
1633 rtx_insn *ifcvt_seq;
1635 /* A conditional move from two memory sources is equivalent to a
1636 conditional on their addresses followed by a load. Don't do this
1637 early because it'll screw alias analysis. Note that we've
1638 already checked for no side effects. */
1639 /* ??? FIXME: Magic number 5. */
1640 if (cse_not_expected
1641 && MEM_P (a) && MEM_P (b)
1642 && MEM_ADDR_SPACE (a) == MEM_ADDR_SPACE (b)
1643 && if_info->branch_cost >= 5)
1645 machine_mode address_mode = get_address_mode (a);
1649 x = gen_reg_rtx (address_mode);
1653 /* ??? We could handle this if we knew that a load from A or B could
1654 not trap or fault. This is also true if we've already loaded
1655 from the address along the path from ENTRY. */
1656 else if (may_trap_or_fault_p (a) || may_trap_or_fault_p (b))
1659 /* if (test) x = a + b; else x = c - d;
1666 code = GET_CODE (if_info->cond);
1667 insn_a = if_info->insn_a;
1668 insn_b = if_info->insn_b;
1670 /* Total insn_rtx_cost should be smaller than branch cost. Exit
1671 if insn_rtx_cost can't be estimated. */
1675 = insn_rtx_cost (PATTERN (insn_a),
1676 optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn_a)));
1677 if (insn_cost == 0 || insn_cost > COSTS_N_INSNS (if_info->branch_cost))
1686 += insn_rtx_cost (PATTERN (insn_b),
1687 optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn_b)));
1688 if (insn_cost == 0 || insn_cost > COSTS_N_INSNS (if_info->branch_cost))
1692 /* Possibly rearrange operands to make things come out more natural. */
1693 if (reversed_comparison_code (if_info->cond, if_info->jump) != UNKNOWN)
1696 if (rtx_equal_p (b, x))
1698 else if (general_operand (b, GET_MODE (b)))
1705 code = reversed_comparison_code (if_info->cond, if_info->jump);
1706 tmp = a, a = b, b = tmp;
1707 tmp_insn = insn_a, insn_a = insn_b, insn_b = tmp_insn;
1716 /* If either operand is complex, load it into a register first.
1717 The best way to do this is to copy the original insn. In this
1718 way we preserve any clobbers etc that the insn may have had.
1719 This is of course not possible in the IS_MEM case. */
1720 if (! general_operand (a, GET_MODE (a)))
1726 rtx reg = gen_reg_rtx (GET_MODE (a));
1727 insn = emit_insn (gen_rtx_SET (VOIDmode, reg, a));
1730 goto end_seq_and_fail;
1733 a = gen_reg_rtx (GET_MODE (a));
1734 rtx_insn *copy_of_a = as_a <rtx_insn *> (copy_rtx (insn_a));
1735 rtx set = single_set (copy_of_a);
1737 insn = emit_insn (PATTERN (copy_of_a));
1739 if (recog_memoized (insn) < 0)
1740 goto end_seq_and_fail;
1742 if (! general_operand (b, GET_MODE (b)))
1750 rtx reg = gen_reg_rtx (GET_MODE (b));
1751 pat = gen_rtx_SET (VOIDmode, reg, b);
1754 goto end_seq_and_fail;
1757 b = gen_reg_rtx (GET_MODE (b));
1758 rtx_insn *copy_of_insn_b = as_a <rtx_insn *> (copy_rtx (insn_b));
1759 rtx set = single_set (copy_of_insn_b);
1761 pat = PATTERN (copy_of_insn_b);
1764 /* If insn to set up A clobbers any registers B depends on, try to
1765 swap insn that sets up A with the one that sets up B. If even
1766 that doesn't help, punt. */
1767 last = get_last_insn ();
1768 if (last && modified_in_p (orig_b, last))
1770 new_insn = emit_insn_before (pat, get_insns ());
1771 if (modified_in_p (orig_a, new_insn))
1772 goto end_seq_and_fail;
1775 new_insn = emit_insn (pat);
1777 if (recog_memoized (new_insn) < 0)
1778 goto end_seq_and_fail;
1781 target = noce_emit_cmove (if_info, x, code, XEXP (if_info->cond, 0),
1782 XEXP (if_info->cond, 1), a, b);
1785 goto end_seq_and_fail;
1787 /* If we're handling a memory for above, emit the load now. */
1790 rtx mem = gen_rtx_MEM (GET_MODE (if_info->x), target);
1792 /* Copy over flags as appropriate. */
1793 if (MEM_VOLATILE_P (if_info->a) || MEM_VOLATILE_P (if_info->b))
1794 MEM_VOLATILE_P (mem) = 1;
1795 if (MEM_ALIAS_SET (if_info->a) == MEM_ALIAS_SET (if_info->b))
1796 set_mem_alias_set (mem, MEM_ALIAS_SET (if_info->a));
1798 MIN (MEM_ALIGN (if_info->a), MEM_ALIGN (if_info->b)));
1800 gcc_assert (MEM_ADDR_SPACE (if_info->a) == MEM_ADDR_SPACE (if_info->b));
1801 set_mem_addr_space (mem, MEM_ADDR_SPACE (if_info->a));
1803 noce_emit_move_insn (if_info->x, mem);
1805 else if (target != x)
1806 noce_emit_move_insn (x, target);
1808 ifcvt_seq = end_ifcvt_sequence (if_info);
1812 emit_insn_before_setloc (ifcvt_seq, if_info->jump,
1813 INSN_LOCATION (if_info->insn_a));
1821 /* For most cases, the simplified condition we found is the best
1822 choice, but this is not the case for the min/max/abs transforms.
1823 For these we wish to know that it is A or B in the condition. */
1826 noce_get_alt_condition (struct noce_if_info *if_info, rtx target,
1827 rtx_insn **earliest)
1833 /* If target is already mentioned in the known condition, return it. */
1834 if (reg_mentioned_p (target, if_info->cond))
1836 *earliest = if_info->cond_earliest;
1837 return if_info->cond;
1840 set = pc_set (if_info->jump);
1841 cond = XEXP (SET_SRC (set), 0);
1843 = GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF
1844 && LABEL_REF_LABEL (XEXP (SET_SRC (set), 2)) == JUMP_LABEL (if_info->jump);
1845 if (if_info->then_else_reversed)
1848 /* If we're looking for a constant, try to make the conditional
1849 have that constant in it. There are two reasons why it may
1850 not have the constant we want:
1852 1. GCC may have needed to put the constant in a register, because
1853 the target can't compare directly against that constant. For
1854 this case, we look for a SET immediately before the comparison
1855 that puts a constant in that register.
1857 2. GCC may have canonicalized the conditional, for example
1858 replacing "if x < 4" with "if x <= 3". We can undo that (or
1859 make equivalent types of changes) to get the constants we need
1860 if they're off by one in the right direction. */
1862 if (CONST_INT_P (target))
1864 enum rtx_code code = GET_CODE (if_info->cond);
1865 rtx op_a = XEXP (if_info->cond, 0);
1866 rtx op_b = XEXP (if_info->cond, 1);
1869 /* First, look to see if we put a constant in a register. */
1870 prev_insn = prev_nonnote_insn (if_info->cond_earliest);
1872 && BLOCK_FOR_INSN (prev_insn)
1873 == BLOCK_FOR_INSN (if_info->cond_earliest)
1874 && INSN_P (prev_insn)
1875 && GET_CODE (PATTERN (prev_insn)) == SET)
1877 rtx src = find_reg_equal_equiv_note (prev_insn);
1879 src = SET_SRC (PATTERN (prev_insn));
1880 if (CONST_INT_P (src))
1882 if (rtx_equal_p (op_a, SET_DEST (PATTERN (prev_insn))))
1884 else if (rtx_equal_p (op_b, SET_DEST (PATTERN (prev_insn))))
1887 if (CONST_INT_P (op_a))
1892 code = swap_condition (code);
1897 /* Now, look to see if we can get the right constant by
1898 adjusting the conditional. */
1899 if (CONST_INT_P (op_b))
1901 HOST_WIDE_INT desired_val = INTVAL (target);
1902 HOST_WIDE_INT actual_val = INTVAL (op_b);
1907 if (actual_val == desired_val + 1)
1910 op_b = GEN_INT (desired_val);
1914 if (actual_val == desired_val - 1)
1917 op_b = GEN_INT (desired_val);
1921 if (actual_val == desired_val - 1)
1924 op_b = GEN_INT (desired_val);
1928 if (actual_val == desired_val + 1)
1931 op_b = GEN_INT (desired_val);
1939 /* If we made any changes, generate a new conditional that is
1940 equivalent to what we started with, but has the right
1942 if (code != GET_CODE (if_info->cond)
1943 || op_a != XEXP (if_info->cond, 0)
1944 || op_b != XEXP (if_info->cond, 1))
1946 cond = gen_rtx_fmt_ee (code, GET_MODE (cond), op_a, op_b);
1947 *earliest = if_info->cond_earliest;
1952 cond = canonicalize_condition (if_info->jump, cond, reverse,
1953 earliest, target, HAVE_cbranchcc4, true);
1954 if (! cond || ! reg_mentioned_p (target, cond))
1957 /* We almost certainly searched back to a different place.
1958 Need to re-verify correct lifetimes. */
1960 /* X may not be mentioned in the range (cond_earliest, jump]. */
1961 for (insn = if_info->jump; insn != *earliest; insn = PREV_INSN (insn))
1962 if (INSN_P (insn) && reg_overlap_mentioned_p (if_info->x, PATTERN (insn)))
1965 /* A and B may not be modified in the range [cond_earliest, jump). */
1966 for (insn = *earliest; insn != if_info->jump; insn = NEXT_INSN (insn))
1968 && (modified_in_p (if_info->a, insn)
1969 || modified_in_p (if_info->b, insn)))
1975 /* Convert "if (a < b) x = a; else x = b;" to "x = min(a, b);", etc. */
1978 noce_try_minmax (struct noce_if_info *if_info)
1981 rtx_insn *earliest, *seq;
1982 enum rtx_code code, op;
1985 /* ??? Reject modes with NaNs or signed zeros since we don't know how
1986 they will be resolved with an SMIN/SMAX. It wouldn't be too hard
1987 to get the target to tell us... */
1988 if (HONOR_SIGNED_ZEROS (if_info->x)
1989 || HONOR_NANS (if_info->x))
1992 cond = noce_get_alt_condition (if_info, if_info->a, &earliest);
1996 /* Verify the condition is of the form we expect, and canonicalize
1997 the comparison code. */
1998 code = GET_CODE (cond);
1999 if (rtx_equal_p (XEXP (cond, 0), if_info->a))
2001 if (! rtx_equal_p (XEXP (cond, 1), if_info->b))
2004 else if (rtx_equal_p (XEXP (cond, 1), if_info->a))
2006 if (! rtx_equal_p (XEXP (cond, 0), if_info->b))
2008 code = swap_condition (code);
2013 /* Determine what sort of operation this is. Note that the code is for
2014 a taken branch, so the code->operation mapping appears backwards. */
2047 target = expand_simple_binop (GET_MODE (if_info->x), op,
2048 if_info->a, if_info->b,
2049 if_info->x, unsignedp, OPTAB_WIDEN);
2055 if (target != if_info->x)
2056 noce_emit_move_insn (if_info->x, target);
2058 seq = end_ifcvt_sequence (if_info);
2062 emit_insn_before_setloc (seq, if_info->jump, INSN_LOCATION (if_info->insn_a));
2063 if_info->cond = cond;
2064 if_info->cond_earliest = earliest;
2069 /* Convert "if (a < 0) x = -a; else x = a;" to "x = abs(a);",
2070 "if (a < 0) x = ~a; else x = a;" to "x = one_cmpl_abs(a);",
2074 noce_try_abs (struct noce_if_info *if_info)
2076 rtx cond, target, a, b, c;
2077 rtx_insn *earliest, *seq;
2079 bool one_cmpl = false;
2081 /* Reject modes with signed zeros. */
2082 if (HONOR_SIGNED_ZEROS (if_info->x))
2085 /* Recognize A and B as constituting an ABS or NABS. The canonical
2086 form is a branch around the negation, taken when the object is the
2087 first operand of a comparison against 0 that evaluates to true. */
2090 if (GET_CODE (a) == NEG && rtx_equal_p (XEXP (a, 0), b))
2092 else if (GET_CODE (b) == NEG && rtx_equal_p (XEXP (b, 0), a))
2094 c = a; a = b; b = c;
2097 else if (GET_CODE (a) == NOT && rtx_equal_p (XEXP (a, 0), b))
2102 else if (GET_CODE (b) == NOT && rtx_equal_p (XEXP (b, 0), a))
2104 c = a; a = b; b = c;
2111 cond = noce_get_alt_condition (if_info, b, &earliest);
2115 /* Verify the condition is of the form we expect. */
2116 if (rtx_equal_p (XEXP (cond, 0), b))
2118 else if (rtx_equal_p (XEXP (cond, 1), b))
2126 /* Verify that C is zero. Search one step backward for a
2127 REG_EQUAL note or a simple source if necessary. */
2131 rtx_insn *insn = prev_nonnote_insn (earliest);
2133 && BLOCK_FOR_INSN (insn) == BLOCK_FOR_INSN (earliest)
2134 && (set = single_set (insn))
2135 && rtx_equal_p (SET_DEST (set), c))
2137 rtx note = find_reg_equal_equiv_note (insn);
2147 && GET_CODE (XEXP (c, 0)) == SYMBOL_REF
2148 && CONSTANT_POOL_ADDRESS_P (XEXP (c, 0)))
2149 c = get_pool_constant (XEXP (c, 0));
2151 /* Work around funny ideas get_condition has wrt canonicalization.
2152 Note that these rtx constants are known to be CONST_INT, and
2153 therefore imply integer comparisons.
2154 The one_cmpl case is more complicated, as we want to handle
2155 only x < 0 ? ~x : x or x >= 0 ? ~x : x but not
2156 x <= 0 ? ~x : x or x > 0 ? ~x : x, as the latter two
2157 have different result for x == 0. */
2158 if (c == constm1_rtx && GET_CODE (cond) == GT)
2160 if (one_cmpl && negate)
2163 else if (c == const1_rtx && GET_CODE (cond) == LT)
2165 if (one_cmpl && !negate)
2168 else if (c == CONST0_RTX (GET_MODE (b)))
2171 switch (GET_CODE (cond))
2178 /* >= 0 is the same case as above > -1. */
2187 /* <= 0 is the same case as above < 1. */
2198 /* Determine what sort of operation this is. */
2199 switch (GET_CODE (cond))
2218 target = expand_one_cmpl_abs_nojump (GET_MODE (if_info->x), b,
2221 target = expand_abs_nojump (GET_MODE (if_info->x), b, if_info->x, 1);
2223 /* ??? It's a quandary whether cmove would be better here, especially
2224 for integers. Perhaps combine will clean things up. */
2225 if (target && negate)
2228 target = expand_simple_unop (GET_MODE (target), NOT, target,
2231 target = expand_simple_unop (GET_MODE (target), NEG, target,
2241 if (target != if_info->x)
2242 noce_emit_move_insn (if_info->x, target);
2244 seq = end_ifcvt_sequence (if_info);
2248 emit_insn_before_setloc (seq, if_info->jump, INSN_LOCATION (if_info->insn_a));
2249 if_info->cond = cond;
2250 if_info->cond_earliest = earliest;
2255 /* Convert "if (m < 0) x = b; else x = 0;" to "x = (m >> C) & b;". */
2258 noce_try_sign_mask (struct noce_if_info *if_info)
2264 bool t_unconditional;
2266 cond = if_info->cond;
2267 code = GET_CODE (cond);
2272 if (if_info->a == const0_rtx)
2274 if ((code == LT && c == const0_rtx)
2275 || (code == LE && c == constm1_rtx))
2278 else if (if_info->b == const0_rtx)
2280 if ((code == GE && c == const0_rtx)
2281 || (code == GT && c == constm1_rtx))
2285 if (! t || side_effects_p (t))
2288 /* We currently don't handle different modes. */
2289 mode = GET_MODE (t);
2290 if (GET_MODE (m) != mode)
2293 /* This is only profitable if T is unconditionally executed/evaluated in the
2294 original insn sequence or T is cheap. The former happens if B is the
2295 non-zero (T) value and if INSN_B was taken from TEST_BB, or there was no
2296 INSN_B which can happen for e.g. conditional stores to memory. For the
2297 cost computation use the block TEST_BB where the evaluation will end up
2298 after the transformation. */
2301 && (if_info->insn_b == NULL_RTX
2302 || BLOCK_FOR_INSN (if_info->insn_b) == if_info->test_bb));
2303 if (!(t_unconditional
2304 || (set_src_cost (t, optimize_bb_for_speed_p (if_info->test_bb))
2305 < COSTS_N_INSNS (2))))
2309 /* Use emit_store_flag to generate "m < 0 ? -1 : 0" instead of expanding
2310 "(signed) m >> 31" directly. This benefits targets with specialized
2311 insns to obtain the signmask, but still uses ashr_optab otherwise. */
2312 m = emit_store_flag (gen_reg_rtx (mode), LT, m, const0_rtx, mode, 0, -1);
2313 t = m ? expand_binop (mode, and_optab, m, t, NULL_RTX, 0, OPTAB_DIRECT)
2322 noce_emit_move_insn (if_info->x, t);
2324 seq = end_ifcvt_sequence (if_info);
2328 emit_insn_before_setloc (seq, if_info->jump, INSN_LOCATION (if_info->insn_a));
2333 /* Optimize away "if (x & C) x |= C" and similar bit manipulation
2337 noce_try_bitop (struct noce_if_info *if_info)
2339 rtx cond, x, a, result;
2346 cond = if_info->cond;
2347 code = GET_CODE (cond);
2349 /* Check for no else condition. */
2350 if (! rtx_equal_p (x, if_info->b))
2353 /* Check for a suitable condition. */
2354 if (code != NE && code != EQ)
2356 if (XEXP (cond, 1) != const0_rtx)
2358 cond = XEXP (cond, 0);
2360 /* ??? We could also handle AND here. */
2361 if (GET_CODE (cond) == ZERO_EXTRACT)
2363 if (XEXP (cond, 1) != const1_rtx
2364 || !CONST_INT_P (XEXP (cond, 2))
2365 || ! rtx_equal_p (x, XEXP (cond, 0)))
2367 bitnum = INTVAL (XEXP (cond, 2));
2368 mode = GET_MODE (x);
2369 if (BITS_BIG_ENDIAN)
2370 bitnum = GET_MODE_BITSIZE (mode) - 1 - bitnum;
2371 if (bitnum < 0 || bitnum >= HOST_BITS_PER_WIDE_INT)
2378 if (GET_CODE (a) == IOR || GET_CODE (a) == XOR)
2380 /* Check for "if (X & C) x = x op C". */
2381 if (! rtx_equal_p (x, XEXP (a, 0))
2382 || !CONST_INT_P (XEXP (a, 1))
2383 || (INTVAL (XEXP (a, 1)) & GET_MODE_MASK (mode))
2384 != (unsigned HOST_WIDE_INT) 1 << bitnum)
2387 /* if ((x & C) == 0) x |= C; is transformed to x |= C. */
2388 /* if ((x & C) != 0) x |= C; is transformed to nothing. */
2389 if (GET_CODE (a) == IOR)
2390 result = (code == NE) ? a : NULL_RTX;
2391 else if (code == NE)
2393 /* if ((x & C) == 0) x ^= C; is transformed to x |= C. */
2394 result = gen_int_mode ((HOST_WIDE_INT) 1 << bitnum, mode);
2395 result = simplify_gen_binary (IOR, mode, x, result);
2399 /* if ((x & C) != 0) x ^= C; is transformed to x &= ~C. */
2400 result = gen_int_mode (~((HOST_WIDE_INT) 1 << bitnum), mode);
2401 result = simplify_gen_binary (AND, mode, x, result);
2404 else if (GET_CODE (a) == AND)
2406 /* Check for "if (X & C) x &= ~C". */
2407 if (! rtx_equal_p (x, XEXP (a, 0))
2408 || !CONST_INT_P (XEXP (a, 1))
2409 || (INTVAL (XEXP (a, 1)) & GET_MODE_MASK (mode))
2410 != (~((HOST_WIDE_INT) 1 << bitnum) & GET_MODE_MASK (mode)))
2413 /* if ((x & C) == 0) x &= ~C; is transformed to nothing. */
2414 /* if ((x & C) != 0) x &= ~C; is transformed to x &= ~C. */
2415 result = (code == EQ) ? a : NULL_RTX;
2423 noce_emit_move_insn (x, result);
2424 seq = end_ifcvt_sequence (if_info);
2428 emit_insn_before_setloc (seq, if_info->jump,
2429 INSN_LOCATION (if_info->insn_a));
2435 /* Similar to get_condition, only the resulting condition must be
2436 valid at JUMP, instead of at EARLIEST.
2438 If THEN_ELSE_REVERSED is true, the fallthrough does not go to the
2439 THEN block of the caller, and we have to reverse the condition. */
2442 noce_get_condition (rtx_insn *jump, rtx_insn **earliest, bool then_else_reversed)
2447 if (! any_condjump_p (jump))
2450 set = pc_set (jump);
2452 /* If this branches to JUMP_LABEL when the condition is false,
2453 reverse the condition. */
2454 reverse = (GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF
2455 && LABEL_REF_LABEL (XEXP (SET_SRC (set), 2)) == JUMP_LABEL (jump));
2457 /* We may have to reverse because the caller's if block is not canonical,
2458 i.e. the THEN block isn't the fallthrough block for the TEST block
2459 (see find_if_header). */
2460 if (then_else_reversed)
2463 /* If the condition variable is a register and is MODE_INT, accept it. */
2465 cond = XEXP (SET_SRC (set), 0);
2466 tmp = XEXP (cond, 0);
2467 if (REG_P (tmp) && GET_MODE_CLASS (GET_MODE (tmp)) == MODE_INT
2468 && (GET_MODE (tmp) != BImode
2469 || !targetm.small_register_classes_for_mode_p (BImode)))
2474 cond = gen_rtx_fmt_ee (reverse_condition (GET_CODE (cond)),
2475 GET_MODE (cond), tmp, XEXP (cond, 1));
2479 /* Otherwise, fall back on canonicalize_condition to do the dirty
2480 work of manipulating MODE_CC values and COMPARE rtx codes. */
2481 tmp = canonicalize_condition (jump, cond, reverse, earliest,
2482 NULL_RTX, HAVE_cbranchcc4, true);
2484 /* We don't handle side-effects in the condition, like handling
2485 REG_INC notes and making sure no duplicate conditions are emitted. */
2486 if (tmp != NULL_RTX && side_effects_p (tmp))
2492 /* Return true if OP is ok for if-then-else processing. */
2495 noce_operand_ok (const_rtx op)
2497 if (side_effects_p (op))
2500 /* We special-case memories, so handle any of them with
2501 no address side effects. */
2503 return ! side_effects_p (XEXP (op, 0));
2505 return ! may_trap_p (op);
2508 /* Return true if a write into MEM may trap or fault. */
2511 noce_mem_write_may_trap_or_fault_p (const_rtx mem)
2515 if (MEM_READONLY_P (mem))
2518 if (may_trap_or_fault_p (mem))
2521 addr = XEXP (mem, 0);
2523 /* Call target hook to avoid the effects of -fpic etc.... */
2524 addr = targetm.delegitimize_address (addr);
2527 switch (GET_CODE (addr))
2535 addr = XEXP (addr, 0);
2539 addr = XEXP (addr, 1);
2542 if (CONST_INT_P (XEXP (addr, 1)))
2543 addr = XEXP (addr, 0);
2550 if (SYMBOL_REF_DECL (addr)
2551 && decl_readonly_section (SYMBOL_REF_DECL (addr), 0))
2561 /* Return whether we can use store speculation for MEM. TOP_BB is the
2562 basic block above the conditional block where we are considering
2563 doing the speculative store. We look for whether MEM is set
2564 unconditionally later in the function. */
2567 noce_can_store_speculate_p (basic_block top_bb, const_rtx mem)
2569 basic_block dominator;
2571 for (dominator = get_immediate_dominator (CDI_POST_DOMINATORS, top_bb);
2573 dominator = get_immediate_dominator (CDI_POST_DOMINATORS, dominator))
2577 FOR_BB_INSNS (dominator, insn)
2579 /* If we see something that might be a memory barrier, we
2580 have to stop looking. Even if the MEM is set later in
2581 the function, we still don't want to set it
2582 unconditionally before the barrier. */
2584 && (volatile_insn_p (PATTERN (insn))
2585 || (CALL_P (insn) && (!RTL_CONST_CALL_P (insn)))))
2588 if (memory_must_be_modified_in_insn_p (mem, insn))
2590 if (modified_in_p (XEXP (mem, 0), insn))
2599 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
2600 it without using conditional execution. Return TRUE if we were successful
2601 at converting the block. */
2604 noce_process_if_block (struct noce_if_info *if_info)
2606 basic_block test_bb = if_info->test_bb; /* test block */
2607 basic_block then_bb = if_info->then_bb; /* THEN */
2608 basic_block else_bb = if_info->else_bb; /* ELSE or NULL */
2609 basic_block join_bb = if_info->join_bb; /* JOIN */
2610 rtx_insn *jump = if_info->jump;
2611 rtx cond = if_info->cond;
2612 rtx_insn *insn_a, *insn_b;
2614 rtx orig_x, x, a, b;
2617 /* We're looking for patterns of the form
2619 (1) if (...) x = a; else x = b;
2620 (2) x = b; if (...) x = a;
2621 (3) if (...) x = a; // as if with an initial x = x.
2623 The later patterns require jumps to be more expensive.
2625 ??? For future expansion, look for multiple X in such patterns. */
2627 /* Look for one of the potential sets. */
2628 insn_a = first_active_insn (then_bb);
2630 || insn_a != last_active_insn (then_bb, FALSE)
2631 || (set_a = single_set (insn_a)) == NULL_RTX)
2634 x = SET_DEST (set_a);
2635 a = SET_SRC (set_a);
2637 /* Look for the other potential set. Make sure we've got equivalent
2639 /* ??? This is overconservative. Storing to two different mems is
2640 as easy as conditionally computing the address. Storing to a
2641 single mem merely requires a scratch memory to use as one of the
2642 destination addresses; often the memory immediately below the
2643 stack pointer is available for this. */
2647 insn_b = first_active_insn (else_bb);
2649 || insn_b != last_active_insn (else_bb, FALSE)
2650 || (set_b = single_set (insn_b)) == NULL_RTX
2651 || ! rtx_interchangeable_p (x, SET_DEST (set_b)))
2656 insn_b = prev_nonnote_nondebug_insn (if_info->cond_earliest);
2657 /* We're going to be moving the evaluation of B down from above
2658 COND_EARLIEST to JUMP. Make sure the relevant data is still
2661 || BLOCK_FOR_INSN (insn_b) != BLOCK_FOR_INSN (if_info->cond_earliest)
2662 || !NONJUMP_INSN_P (insn_b)
2663 || (set_b = single_set (insn_b)) == NULL_RTX
2664 || ! rtx_interchangeable_p (x, SET_DEST (set_b))
2665 || ! noce_operand_ok (SET_SRC (set_b))
2666 || reg_overlap_mentioned_p (x, SET_SRC (set_b))
2667 || modified_between_p (SET_SRC (set_b), insn_b, jump)
2668 /* Avoid extending the lifetime of hard registers on small
2669 register class machines. */
2670 || (REG_P (SET_SRC (set_b))
2671 && HARD_REGISTER_P (SET_SRC (set_b))
2672 && targetm.small_register_classes_for_mode_p
2673 (GET_MODE (SET_SRC (set_b))))
2674 /* Likewise with X. In particular this can happen when
2675 noce_get_condition looks farther back in the instruction
2676 stream than one might expect. */
2677 || reg_overlap_mentioned_p (x, cond)
2678 || reg_overlap_mentioned_p (x, a)
2679 || modified_between_p (x, insn_b, jump))
2686 /* If x has side effects then only the if-then-else form is safe to
2687 convert. But even in that case we would need to restore any notes
2688 (such as REG_INC) at then end. That can be tricky if
2689 noce_emit_move_insn expands to more than one insn, so disable the
2690 optimization entirely for now if there are side effects. */
2691 if (side_effects_p (x))
2694 b = (set_b ? SET_SRC (set_b) : x);
2696 /* Only operate on register destinations, and even then avoid extending
2697 the lifetime of hard registers on small register class machines. */
2700 || (HARD_REGISTER_P (x)
2701 && targetm.small_register_classes_for_mode_p (GET_MODE (x))))
2703 if (GET_MODE (x) == BLKmode)
2706 if (GET_CODE (x) == ZERO_EXTRACT
2707 && (!CONST_INT_P (XEXP (x, 1))
2708 || !CONST_INT_P (XEXP (x, 2))))
2711 x = gen_reg_rtx (GET_MODE (GET_CODE (x) == STRICT_LOW_PART
2712 ? XEXP (x, 0) : x));
2715 /* Don't operate on sources that may trap or are volatile. */
2716 if (! noce_operand_ok (a) || ! noce_operand_ok (b))
2720 /* Set up the info block for our subroutines. */
2721 if_info->insn_a = insn_a;
2722 if_info->insn_b = insn_b;
2727 /* Skip it if the instruction to be moved might clobber CC. */
2728 cc = cc_in_cond (cond);
2730 && (set_of (cc, insn_a)
2731 || (insn_b && set_of (cc, insn_b))))
2734 /* Try optimizations in some approximation of a useful order. */
2735 /* ??? Should first look to see if X is live incoming at all. If it
2736 isn't, we don't need anything but an unconditional set. */
2738 /* Look and see if A and B are really the same. Avoid creating silly
2739 cmove constructs that no one will fix up later. */
2740 if (rtx_interchangeable_p (a, b))
2742 /* If we have an INSN_B, we don't have to create any new rtl. Just
2743 move the instruction that we already have. If we don't have an
2744 INSN_B, that means that A == X, and we've got a noop move. In
2745 that case don't do anything and let the code below delete INSN_A. */
2746 if (insn_b && else_bb)
2750 if (else_bb && insn_b == BB_END (else_bb))
2751 BB_END (else_bb) = PREV_INSN (insn_b);
2752 reorder_insns (insn_b, insn_b, PREV_INSN (jump));
2754 /* If there was a REG_EQUAL note, delete it since it may have been
2755 true due to this insn being after a jump. */
2756 if ((note = find_reg_note (insn_b, REG_EQUAL, NULL_RTX)) != 0)
2757 remove_note (insn_b, note);
2761 /* If we have "x = b; if (...) x = a;", and x has side-effects, then
2762 x must be executed twice. */
2763 else if (insn_b && side_effects_p (orig_x))
2770 if (!set_b && MEM_P (orig_x))
2772 /* Disallow the "if (...) x = a;" form (implicit "else x = x;")
2773 for optimizations if writing to x may trap or fault,
2774 i.e. it's a memory other than a static var or a stack slot,
2775 is misaligned on strict aligned machines or is read-only. If
2776 x is a read-only memory, then the program is valid only if we
2777 avoid the store into it. If there are stores on both the
2778 THEN and ELSE arms, then we can go ahead with the conversion;
2779 either the program is broken, or the condition is always
2780 false such that the other memory is selected. */
2781 if (noce_mem_write_may_trap_or_fault_p (orig_x))
2784 /* Avoid store speculation: given "if (...) x = a" where x is a
2785 MEM, we only want to do the store if x is always set
2786 somewhere in the function. This avoids cases like
2787 if (pthread_mutex_trylock(mutex))
2789 where we only want global_variable to be changed if the mutex
2790 is held. FIXME: This should ideally be expressed directly in
2792 if (!noce_can_store_speculate_p (test_bb, orig_x))
2796 if (noce_try_move (if_info))
2798 if (noce_try_store_flag (if_info))
2800 if (noce_try_bitop (if_info))
2802 if (noce_try_minmax (if_info))
2804 if (noce_try_abs (if_info))
2806 if (HAVE_conditional_move
2807 && noce_try_cmove (if_info))
2809 if (! targetm.have_conditional_execution ())
2811 if (noce_try_store_flag_constants (if_info))
2813 if (noce_try_addcc (if_info))
2815 if (noce_try_store_flag_mask (if_info))
2817 if (HAVE_conditional_move
2818 && noce_try_cmove_arith (if_info))
2820 if (noce_try_sign_mask (if_info))
2824 if (!else_bb && set_b)
2836 /* If we used a temporary, fix it up now. */
2842 noce_emit_move_insn (orig_x, x);
2844 set_used_flags (orig_x);
2845 unshare_all_rtl_in_chain (seq);
2848 emit_insn_before_setloc (seq, BB_END (test_bb), INSN_LOCATION (insn_a));
2851 /* The original THEN and ELSE blocks may now be removed. The test block
2852 must now jump to the join block. If the test block and the join block
2853 can be merged, do so. */
2856 delete_basic_block (else_bb);
2860 remove_edge (find_edge (test_bb, join_bb));
2862 remove_edge (find_edge (then_bb, join_bb));
2863 redirect_edge_and_branch_force (single_succ_edge (test_bb), join_bb);
2864 delete_basic_block (then_bb);
2867 if (can_merge_blocks_p (test_bb, join_bb))
2869 merge_blocks (test_bb, join_bb);
2873 num_updated_if_blocks++;
2877 /* Check whether a block is suitable for conditional move conversion.
2878 Every insn must be a simple set of a register to a constant or a
2879 register. For each assignment, store the value in the pointer map
2880 VALS, keyed indexed by register pointer, then store the register
2881 pointer in REGS. COND is the condition we will test. */
2884 check_cond_move_block (basic_block bb,
2885 hash_map<rtx, rtx> *vals,
2890 rtx cc = cc_in_cond (cond);
2892 /* We can only handle simple jumps at the end of the basic block.
2893 It is almost impossible to update the CFG otherwise. */
2895 if (JUMP_P (insn) && !onlyjump_p (insn))
2898 FOR_BB_INSNS (bb, insn)
2902 if (!NONDEBUG_INSN_P (insn) || JUMP_P (insn))
2904 set = single_set (insn);
2908 dest = SET_DEST (set);
2909 src = SET_SRC (set);
2911 || (HARD_REGISTER_P (dest)
2912 && targetm.small_register_classes_for_mode_p (GET_MODE (dest))))
2915 if (!CONSTANT_P (src) && !register_operand (src, VOIDmode))
2918 if (side_effects_p (src) || side_effects_p (dest))
2921 if (may_trap_p (src) || may_trap_p (dest))
2924 /* Don't try to handle this if the source register was
2925 modified earlier in the block. */
2928 || (GET_CODE (src) == SUBREG && REG_P (SUBREG_REG (src))
2929 && vals->get (SUBREG_REG (src))))
2932 /* Don't try to handle this if the destination register was
2933 modified earlier in the block. */
2934 if (vals->get (dest))
2937 /* Don't try to handle this if the condition uses the
2938 destination register. */
2939 if (reg_overlap_mentioned_p (dest, cond))
2942 /* Don't try to handle this if the source register is modified
2943 later in the block. */
2944 if (!CONSTANT_P (src)
2945 && modified_between_p (src, insn, NEXT_INSN (BB_END (bb))))
2948 /* Skip it if the instruction to be moved might clobber CC. */
2949 if (cc && set_of (cc, insn))
2952 vals->put (dest, src);
2954 regs->safe_push (dest);
2960 /* Given a basic block BB suitable for conditional move conversion,
2961 a condition COND, and pointer maps THEN_VALS and ELSE_VALS containing
2962 the register values depending on COND, emit the insns in the block as
2963 conditional moves. If ELSE_BLOCK is true, THEN_BB was already
2964 processed. The caller has started a sequence for the conversion.
2965 Return true if successful, false if something goes wrong. */
2968 cond_move_convert_if_block (struct noce_if_info *if_infop,
2969 basic_block bb, rtx cond,
2970 hash_map<rtx, rtx> *then_vals,
2971 hash_map<rtx, rtx> *else_vals,
2976 rtx cond_arg0, cond_arg1;
2978 code = GET_CODE (cond);
2979 cond_arg0 = XEXP (cond, 0);
2980 cond_arg1 = XEXP (cond, 1);
2982 FOR_BB_INSNS (bb, insn)
2984 rtx set, target, dest, t, e;
2986 /* ??? Maybe emit conditional debug insn? */
2987 if (!NONDEBUG_INSN_P (insn) || JUMP_P (insn))
2989 set = single_set (insn);
2990 gcc_assert (set && REG_P (SET_DEST (set)));
2992 dest = SET_DEST (set);
2994 rtx *then_slot = then_vals->get (dest);
2995 rtx *else_slot = else_vals->get (dest);
2996 t = then_slot ? *then_slot : NULL_RTX;
2997 e = else_slot ? *else_slot : NULL_RTX;
3001 /* If this register was set in the then block, we already
3002 handled this case there. */
3015 target = noce_emit_cmove (if_infop, dest, code, cond_arg0, cond_arg1,
3021 noce_emit_move_insn (dest, target);
3027 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
3028 it using only conditional moves. Return TRUE if we were successful at
3029 converting the block. */
3032 cond_move_process_if_block (struct noce_if_info *if_info)
3034 basic_block test_bb = if_info->test_bb;
3035 basic_block then_bb = if_info->then_bb;
3036 basic_block else_bb = if_info->else_bb;
3037 basic_block join_bb = if_info->join_bb;
3038 rtx_insn *jump = if_info->jump;
3039 rtx cond = if_info->cond;
3040 rtx_insn *seq, *loc_insn;
3043 vec<rtx> then_regs = vNULL;
3044 vec<rtx> else_regs = vNULL;
3046 int success_p = FALSE;
3048 /* Build a mapping for each block to the value used for each
3050 hash_map<rtx, rtx> then_vals;
3051 hash_map<rtx, rtx> else_vals;
3053 /* Make sure the blocks are suitable. */
3054 if (!check_cond_move_block (then_bb, &then_vals, &then_regs, cond)
3056 && !check_cond_move_block (else_bb, &else_vals, &else_regs, cond)))
3059 /* Make sure the blocks can be used together. If the same register
3060 is set in both blocks, and is not set to a constant in both
3061 cases, then both blocks must set it to the same register. We
3062 have already verified that if it is set to a register, that the
3063 source register does not change after the assignment. Also count
3064 the number of registers set in only one of the blocks. */
3066 FOR_EACH_VEC_ELT (then_regs, i, reg)
3068 rtx *then_slot = then_vals.get (reg);
3069 rtx *else_slot = else_vals.get (reg);
3071 gcc_checking_assert (then_slot);
3076 rtx then_val = *then_slot;
3077 rtx else_val = *else_slot;
3078 if (!CONSTANT_P (then_val) && !CONSTANT_P (else_val)
3079 && !rtx_equal_p (then_val, else_val))
3084 /* Finish off c for MAX_CONDITIONAL_EXECUTE. */
3085 FOR_EACH_VEC_ELT (else_regs, i, reg)
3087 gcc_checking_assert (else_vals.get (reg));
3088 if (!then_vals.get (reg))
3092 /* Make sure it is reasonable to convert this block. What matters
3093 is the number of assignments currently made in only one of the
3094 branches, since if we convert we are going to always execute
3096 if (c > MAX_CONDITIONAL_EXECUTE)
3099 /* Try to emit the conditional moves. First do the then block,
3100 then do anything left in the else blocks. */
3102 if (!cond_move_convert_if_block (if_info, then_bb, cond,
3103 &then_vals, &else_vals, false)
3105 && !cond_move_convert_if_block (if_info, else_bb, cond,
3106 &then_vals, &else_vals, true)))
3111 seq = end_ifcvt_sequence (if_info);
3115 loc_insn = first_active_insn (then_bb);
3118 loc_insn = first_active_insn (else_bb);
3119 gcc_assert (loc_insn);
3121 emit_insn_before_setloc (seq, jump, INSN_LOCATION (loc_insn));
3125 delete_basic_block (else_bb);
3129 remove_edge (find_edge (test_bb, join_bb));
3131 remove_edge (find_edge (then_bb, join_bb));
3132 redirect_edge_and_branch_force (single_succ_edge (test_bb), join_bb);
3133 delete_basic_block (then_bb);
3136 if (can_merge_blocks_p (test_bb, join_bb))
3138 merge_blocks (test_bb, join_bb);
3142 num_updated_if_blocks++;
3147 then_regs.release ();
3148 else_regs.release ();
3153 /* Determine if a given basic block heads a simple IF-THEN-JOIN or an
3154 IF-THEN-ELSE-JOIN block.
3156 If so, we'll try to convert the insns to not require the branch,
3157 using only transformations that do not require conditional execution.
3159 Return TRUE if we were successful at converting the block. */
3162 noce_find_if_block (basic_block test_bb, edge then_edge, edge else_edge,
3165 basic_block then_bb, else_bb, join_bb;
3166 bool then_else_reversed = false;
3169 rtx_insn *cond_earliest;
3170 struct noce_if_info if_info;
3172 /* We only ever should get here before reload. */
3173 gcc_assert (!reload_completed);
3175 /* Recognize an IF-THEN-ELSE-JOIN block. */
3176 if (single_pred_p (then_edge->dest)
3177 && single_succ_p (then_edge->dest)
3178 && single_pred_p (else_edge->dest)
3179 && single_succ_p (else_edge->dest)
3180 && single_succ (then_edge->dest) == single_succ (else_edge->dest))
3182 then_bb = then_edge->dest;
3183 else_bb = else_edge->dest;
3184 join_bb = single_succ (then_bb);
3186 /* Recognize an IF-THEN-JOIN block. */
3187 else if (single_pred_p (then_edge->dest)
3188 && single_succ_p (then_edge->dest)
3189 && single_succ (then_edge->dest) == else_edge->dest)
3191 then_bb = then_edge->dest;
3192 else_bb = NULL_BLOCK;
3193 join_bb = else_edge->dest;
3195 /* Recognize an IF-ELSE-JOIN block. We can have those because the order
3196 of basic blocks in cfglayout mode does not matter, so the fallthrough
3197 edge can go to any basic block (and not just to bb->next_bb, like in
3199 else if (single_pred_p (else_edge->dest)
3200 && single_succ_p (else_edge->dest)
3201 && single_succ (else_edge->dest) == then_edge->dest)
3203 /* The noce transformations do not apply to IF-ELSE-JOIN blocks.
3204 To make this work, we have to invert the THEN and ELSE blocks
3205 and reverse the jump condition. */
3206 then_bb = else_edge->dest;
3207 else_bb = NULL_BLOCK;
3208 join_bb = single_succ (then_bb);
3209 then_else_reversed = true;
3212 /* Not a form we can handle. */
3215 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
3216 if (single_succ_edge (then_bb)->flags & EDGE_COMPLEX)
3219 && single_succ_edge (else_bb)->flags & EDGE_COMPLEX)
3222 num_possible_if_blocks++;
3227 "\nIF-THEN%s-JOIN block found, pass %d, test %d, then %d",
3228 (else_bb) ? "-ELSE" : "",
3229 pass, test_bb->index, then_bb->index);
3232 fprintf (dump_file, ", else %d", else_bb->index);
3234 fprintf (dump_file, ", join %d\n", join_bb->index);
3237 /* If the conditional jump is more than just a conditional
3238 jump, then we can not do if-conversion on this block. */
3239 jump = BB_END (test_bb);
3240 if (! onlyjump_p (jump))
3243 /* If this is not a standard conditional jump, we can't parse it. */
3244 cond = noce_get_condition (jump, &cond_earliest, then_else_reversed);
3248 /* We must be comparing objects whose modes imply the size. */
3249 if (GET_MODE (XEXP (cond, 0)) == BLKmode)
3252 /* Initialize an IF_INFO struct to pass around. */
3253 memset (&if_info, 0, sizeof if_info);
3254 if_info.test_bb = test_bb;
3255 if_info.then_bb = then_bb;
3256 if_info.else_bb = else_bb;
3257 if_info.join_bb = join_bb;
3258 if_info.cond = cond;
3259 if_info.cond_earliest = cond_earliest;
3260 if_info.jump = jump;
3261 if_info.then_else_reversed = then_else_reversed;
3262 if_info.branch_cost = BRANCH_COST (optimize_bb_for_speed_p (test_bb),
3263 predictable_edge_p (then_edge));
3265 /* Do the real work. */
3267 if (noce_process_if_block (&if_info))
3270 if (HAVE_conditional_move
3271 && cond_move_process_if_block (&if_info))
3278 /* Merge the blocks and mark for local life update. */
3281 merge_if_block (struct ce_if_block * ce_info)
3283 basic_block test_bb = ce_info->test_bb; /* last test block */
3284 basic_block then_bb = ce_info->then_bb; /* THEN */
3285 basic_block else_bb = ce_info->else_bb; /* ELSE or NULL */
3286 basic_block join_bb = ce_info->join_bb; /* join block */
3287 basic_block combo_bb;
3289 /* All block merging is done into the lower block numbers. */
3292 df_set_bb_dirty (test_bb);
3294 /* Merge any basic blocks to handle && and || subtests. Each of
3295 the blocks are on the fallthru path from the predecessor block. */
3296 if (ce_info->num_multiple_test_blocks > 0)
3298 basic_block bb = test_bb;
3299 basic_block last_test_bb = ce_info->last_test_bb;
3300 basic_block fallthru = block_fallthru (bb);
3305 fallthru = block_fallthru (bb);
3306 merge_blocks (combo_bb, bb);
3309 while (bb != last_test_bb);
3312 /* Merge TEST block into THEN block. Normally the THEN block won't have a
3313 label, but it might if there were || tests. That label's count should be
3314 zero, and it normally should be removed. */
3318 /* If THEN_BB has no successors, then there's a BARRIER after it.
3319 If COMBO_BB has more than one successor (THEN_BB), then that BARRIER
3320 is no longer needed, and in fact it is incorrect to leave it in
3322 if (EDGE_COUNT (then_bb->succs) == 0
3323 && EDGE_COUNT (combo_bb->succs) > 1)
3325 rtx_insn *end = NEXT_INSN (BB_END (then_bb));
3326 while (end && NOTE_P (end) && !NOTE_INSN_BASIC_BLOCK_P (end))
3327 end = NEXT_INSN (end);
3329 if (end && BARRIER_P (end))
3332 merge_blocks (combo_bb, then_bb);
3336 /* The ELSE block, if it existed, had a label. That label count
3337 will almost always be zero, but odd things can happen when labels
3338 get their addresses taken. */
3341 /* If ELSE_BB has no successors, then there's a BARRIER after it.
3342 If COMBO_BB has more than one successor (ELSE_BB), then that BARRIER
3343 is no longer needed, and in fact it is incorrect to leave it in
3345 if (EDGE_COUNT (else_bb->succs) == 0
3346 && EDGE_COUNT (combo_bb->succs) > 1)
3348 rtx_insn *end = NEXT_INSN (BB_END (else_bb));
3349 while (end && NOTE_P (end) && !NOTE_INSN_BASIC_BLOCK_P (end))
3350 end = NEXT_INSN (end);
3352 if (end && BARRIER_P (end))
3355 merge_blocks (combo_bb, else_bb);
3359 /* If there was no join block reported, that means it was not adjacent
3360 to the others, and so we cannot merge them. */
3364 rtx_insn *last = BB_END (combo_bb);
3366 /* The outgoing edge for the current COMBO block should already
3367 be correct. Verify this. */
3368 if (EDGE_COUNT (combo_bb->succs) == 0)
3369 gcc_assert (find_reg_note (last, REG_NORETURN, NULL)
3370 || (NONJUMP_INSN_P (last)
3371 && GET_CODE (PATTERN (last)) == TRAP_IF
3372 && (TRAP_CONDITION (PATTERN (last))
3373 == const_true_rtx)));
3376 /* There should still be something at the end of the THEN or ELSE
3377 blocks taking us to our final destination. */
3378 gcc_assert (JUMP_P (last)
3379 || (EDGE_SUCC (combo_bb, 0)->dest
3380 == EXIT_BLOCK_PTR_FOR_FN (cfun)
3382 && SIBLING_CALL_P (last))
3383 || ((EDGE_SUCC (combo_bb, 0)->flags & EDGE_EH)
3384 && can_throw_internal (last)));
3387 /* The JOIN block may have had quite a number of other predecessors too.
3388 Since we've already merged the TEST, THEN and ELSE blocks, we should
3389 have only one remaining edge from our if-then-else diamond. If there
3390 is more than one remaining edge, it must come from elsewhere. There
3391 may be zero incoming edges if the THEN block didn't actually join
3392 back up (as with a call to a non-return function). */
3393 else if (EDGE_COUNT (join_bb->preds) < 2
3394 && join_bb != EXIT_BLOCK_PTR_FOR_FN (cfun))
3396 /* We can merge the JOIN cleanly and update the dataflow try
3397 again on this pass.*/
3398 merge_blocks (combo_bb, join_bb);
3403 /* We cannot merge the JOIN. */
3405 /* The outgoing edge for the current COMBO block should already
3406 be correct. Verify this. */
3407 gcc_assert (single_succ_p (combo_bb)
3408 && single_succ (combo_bb) == join_bb);
3410 /* Remove the jump and cruft from the end of the COMBO block. */
3411 if (join_bb != EXIT_BLOCK_PTR_FOR_FN (cfun))
3412 tidy_fallthru_edge (single_succ_edge (combo_bb));
3415 num_updated_if_blocks++;
3418 /* Find a block ending in a simple IF condition and try to transform it
3419 in some way. When converting a multi-block condition, put the new code
3420 in the first such block and delete the rest. Return a pointer to this
3421 first block if some transformation was done. Return NULL otherwise. */
3424 find_if_header (basic_block test_bb, int pass)
3426 ce_if_block ce_info;
3430 /* The kind of block we're looking for has exactly two successors. */
3431 if (EDGE_COUNT (test_bb->succs) != 2)
3434 then_edge = EDGE_SUCC (test_bb, 0);
3435 else_edge = EDGE_SUCC (test_bb, 1);
3437 if (df_get_bb_dirty (then_edge->dest))
3439 if (df_get_bb_dirty (else_edge->dest))
3442 /* Neither edge should be abnormal. */
3443 if ((then_edge->flags & EDGE_COMPLEX)
3444 || (else_edge->flags & EDGE_COMPLEX))
3447 /* Nor exit the loop. */
3448 if ((then_edge->flags & EDGE_LOOP_EXIT)
3449 || (else_edge->flags & EDGE_LOOP_EXIT))
3452 /* The THEN edge is canonically the one that falls through. */
3453 if (then_edge->flags & EDGE_FALLTHRU)
3455 else if (else_edge->flags & EDGE_FALLTHRU)
3458 else_edge = then_edge;
3462 /* Otherwise this must be a multiway branch of some sort. */
3465 memset (&ce_info, 0, sizeof (ce_info));
3466 ce_info.test_bb = test_bb;
3467 ce_info.then_bb = then_edge->dest;
3468 ce_info.else_bb = else_edge->dest;
3469 ce_info.pass = pass;
3471 #ifdef IFCVT_MACHDEP_INIT
3472 IFCVT_MACHDEP_INIT (&ce_info);
3475 if (!reload_completed
3476 && noce_find_if_block (test_bb, then_edge, else_edge, pass))
3479 if (reload_completed
3480 && targetm.have_conditional_execution ()
3481 && cond_exec_find_if_block (&ce_info))
3485 && optab_handler (ctrap_optab, word_mode) != CODE_FOR_nothing
3486 && find_cond_trap (test_bb, then_edge, else_edge))
3489 if (dom_info_state (CDI_POST_DOMINATORS) >= DOM_NO_FAST_QUERY
3490 && (reload_completed || !targetm.have_conditional_execution ()))
3492 if (find_if_case_1 (test_bb, then_edge, else_edge))
3494 if (find_if_case_2 (test_bb, then_edge, else_edge))
3502 fprintf (dump_file, "Conversion succeeded on pass %d.\n", pass);
3503 /* Set this so we continue looking. */
3504 cond_exec_changed_p = TRUE;
3505 return ce_info.test_bb;
3508 /* Return true if a block has two edges, one of which falls through to the next
3509 block, and the other jumps to a specific block, so that we can tell if the
3510 block is part of an && test or an || test. Returns either -1 or the number
3511 of non-note, non-jump, non-USE/CLOBBER insns in the block. */
3514 block_jumps_and_fallthru_p (basic_block cur_bb, basic_block target_bb)
3517 int fallthru_p = FALSE;
3524 if (!cur_bb || !target_bb)
3527 /* If no edges, obviously it doesn't jump or fallthru. */
3528 if (EDGE_COUNT (cur_bb->succs) == 0)
3531 FOR_EACH_EDGE (cur_edge, ei, cur_bb->succs)
3533 if (cur_edge->flags & EDGE_COMPLEX)
3534 /* Anything complex isn't what we want. */
3537 else if (cur_edge->flags & EDGE_FALLTHRU)
3540 else if (cur_edge->dest == target_bb)
3547 if ((jump_p & fallthru_p) == 0)
3550 /* Don't allow calls in the block, since this is used to group && and ||
3551 together for conditional execution support. ??? we should support
3552 conditional execution support across calls for IA-64 some day, but
3553 for now it makes the code simpler. */
3554 end = BB_END (cur_bb);
3555 insn = BB_HEAD (cur_bb);
3557 while (insn != NULL_RTX)
3564 && !DEBUG_INSN_P (insn)
3565 && GET_CODE (PATTERN (insn)) != USE
3566 && GET_CODE (PATTERN (insn)) != CLOBBER)
3572 insn = NEXT_INSN (insn);
3578 /* Determine if a given basic block heads a simple IF-THEN or IF-THEN-ELSE
3579 block. If so, we'll try to convert the insns to not require the branch.
3580 Return TRUE if we were successful at converting the block. */
3583 cond_exec_find_if_block (struct ce_if_block * ce_info)
3585 basic_block test_bb = ce_info->test_bb;
3586 basic_block then_bb = ce_info->then_bb;
3587 basic_block else_bb = ce_info->else_bb;
3588 basic_block join_bb = NULL_BLOCK;
3593 ce_info->last_test_bb = test_bb;
3595 /* We only ever should get here after reload,
3596 and if we have conditional execution. */
3597 gcc_assert (reload_completed && targetm.have_conditional_execution ());
3599 /* Discover if any fall through predecessors of the current test basic block
3600 were && tests (which jump to the else block) or || tests (which jump to
3602 if (single_pred_p (test_bb)
3603 && single_pred_edge (test_bb)->flags == EDGE_FALLTHRU)
3605 basic_block bb = single_pred (test_bb);
3606 basic_block target_bb;
3607 int max_insns = MAX_CONDITIONAL_EXECUTE;
3610 /* Determine if the preceding block is an && or || block. */
3611 if ((n_insns = block_jumps_and_fallthru_p (bb, else_bb)) >= 0)
3613 ce_info->and_and_p = TRUE;
3614 target_bb = else_bb;
3616 else if ((n_insns = block_jumps_and_fallthru_p (bb, then_bb)) >= 0)
3618 ce_info->and_and_p = FALSE;
3619 target_bb = then_bb;
3622 target_bb = NULL_BLOCK;
3624 if (target_bb && n_insns <= max_insns)
3626 int total_insns = 0;
3629 ce_info->last_test_bb = test_bb;
3631 /* Found at least one && or || block, look for more. */
3634 ce_info->test_bb = test_bb = bb;
3635 total_insns += n_insns;
3638 if (!single_pred_p (bb))
3641 bb = single_pred (bb);
3642 n_insns = block_jumps_and_fallthru_p (bb, target_bb);
3644 while (n_insns >= 0 && (total_insns + n_insns) <= max_insns);
3646 ce_info->num_multiple_test_blocks = blocks;
3647 ce_info->num_multiple_test_insns = total_insns;
3649 if (ce_info->and_and_p)
3650 ce_info->num_and_and_blocks = blocks;
3652 ce_info->num_or_or_blocks = blocks;
3656 /* The THEN block of an IF-THEN combo must have exactly one predecessor,
3657 other than any || blocks which jump to the THEN block. */
3658 if ((EDGE_COUNT (then_bb->preds) - ce_info->num_or_or_blocks) != 1)
3661 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
3662 FOR_EACH_EDGE (cur_edge, ei, then_bb->preds)
3664 if (cur_edge->flags & EDGE_COMPLEX)
3668 FOR_EACH_EDGE (cur_edge, ei, else_bb->preds)
3670 if (cur_edge->flags & EDGE_COMPLEX)
3674 /* The THEN block of an IF-THEN combo must have zero or one successors. */
3675 if (EDGE_COUNT (then_bb->succs) > 0
3676 && (!single_succ_p (then_bb)
3677 || (single_succ_edge (then_bb)->flags & EDGE_COMPLEX)
3678 || (epilogue_completed
3679 && tablejump_p (BB_END (then_bb), NULL, NULL))))
3682 /* If the THEN block has no successors, conditional execution can still
3683 make a conditional call. Don't do this unless the ELSE block has
3684 only one incoming edge -- the CFG manipulation is too ugly otherwise.
3685 Check for the last insn of the THEN block being an indirect jump, which
3686 is listed as not having any successors, but confuses the rest of the CE
3687 code processing. ??? we should fix this in the future. */
3688 if (EDGE_COUNT (then_bb->succs) == 0)
3690 if (single_pred_p (else_bb) && else_bb != EXIT_BLOCK_PTR_FOR_FN (cfun))
3692 rtx_insn *last_insn = BB_END (then_bb);
3695 && NOTE_P (last_insn)
3696 && last_insn != BB_HEAD (then_bb))
3697 last_insn = PREV_INSN (last_insn);
3700 && JUMP_P (last_insn)
3701 && ! simplejump_p (last_insn))
3705 else_bb = NULL_BLOCK;
3711 /* If the THEN block's successor is the other edge out of the TEST block,
3712 then we have an IF-THEN combo without an ELSE. */
3713 else if (single_succ (then_bb) == else_bb)
3716 else_bb = NULL_BLOCK;
3719 /* If the THEN and ELSE block meet in a subsequent block, and the ELSE
3720 has exactly one predecessor and one successor, and the outgoing edge
3721 is not complex, then we have an IF-THEN-ELSE combo. */
3722 else if (single_succ_p (else_bb)
3723 && single_succ (then_bb) == single_succ (else_bb)
3724 && single_pred_p (else_bb)
3725 && !(single_succ_edge (else_bb)->flags & EDGE_COMPLEX)
3726 && !(epilogue_completed
3727 && tablejump_p (BB_END (else_bb), NULL, NULL)))
3728 join_bb = single_succ (else_bb);
3730 /* Otherwise it is not an IF-THEN or IF-THEN-ELSE combination. */
3734 num_possible_if_blocks++;
3739 "\nIF-THEN%s block found, pass %d, start block %d "
3740 "[insn %d], then %d [%d]",
3741 (else_bb) ? "-ELSE" : "",
3744 BB_HEAD (test_bb) ? (int)INSN_UID (BB_HEAD (test_bb)) : -1,
3746 BB_HEAD (then_bb) ? (int)INSN_UID (BB_HEAD (then_bb)) : -1);
3749 fprintf (dump_file, ", else %d [%d]",
3751 BB_HEAD (else_bb) ? (int)INSN_UID (BB_HEAD (else_bb)) : -1);
3753 fprintf (dump_file, ", join %d [%d]",
3755 BB_HEAD (join_bb) ? (int)INSN_UID (BB_HEAD (join_bb)) : -1);
3757 if (ce_info->num_multiple_test_blocks > 0)
3758 fprintf (dump_file, ", %d %s block%s last test %d [%d]",
3759 ce_info->num_multiple_test_blocks,
3760 (ce_info->and_and_p) ? "&&" : "||",
3761 (ce_info->num_multiple_test_blocks == 1) ? "" : "s",
3762 ce_info->last_test_bb->index,
3763 ((BB_HEAD (ce_info->last_test_bb))
3764 ? (int)INSN_UID (BB_HEAD (ce_info->last_test_bb))
3767 fputc ('\n', dump_file);
3770 /* Make sure IF, THEN, and ELSE, blocks are adjacent. Actually, we get the
3771 first condition for free, since we've already asserted that there's a
3772 fallthru edge from IF to THEN. Likewise for the && and || blocks, since
3773 we checked the FALLTHRU flag, those are already adjacent to the last IF
3775 /* ??? As an enhancement, move the ELSE block. Have to deal with
3776 BLOCK notes, if by no other means than backing out the merge if they
3777 exist. Sticky enough I don't want to think about it now. */
3779 if (else_bb && (next = next->next_bb) != else_bb)
3781 if ((next = next->next_bb) != join_bb
3782 && join_bb != EXIT_BLOCK_PTR_FOR_FN (cfun))
3790 /* Do the real work. */
3792 ce_info->else_bb = else_bb;
3793 ce_info->join_bb = join_bb;
3795 /* If we have && and || tests, try to first handle combining the && and ||
3796 tests into the conditional code, and if that fails, go back and handle
3797 it without the && and ||, which at present handles the && case if there
3798 was no ELSE block. */
3799 if (cond_exec_process_if_block (ce_info, TRUE))
3802 if (ce_info->num_multiple_test_blocks)
3806 if (cond_exec_process_if_block (ce_info, FALSE))
3813 /* Convert a branch over a trap, or a branch
3814 to a trap, into a conditional trap. */
3817 find_cond_trap (basic_block test_bb, edge then_edge, edge else_edge)
3819 basic_block then_bb = then_edge->dest;
3820 basic_block else_bb = else_edge->dest;
3821 basic_block other_bb, trap_bb;
3822 rtx_insn *trap, *jump;
3824 rtx_insn *cond_earliest;
3827 /* Locate the block with the trap instruction. */
3828 /* ??? While we look for no successors, we really ought to allow
3829 EH successors. Need to fix merge_if_block for that to work. */
3830 if ((trap = block_has_only_trap (then_bb)) != NULL)
3831 trap_bb = then_bb, other_bb = else_bb;
3832 else if ((trap = block_has_only_trap (else_bb)) != NULL)
3833 trap_bb = else_bb, other_bb = then_bb;
3839 fprintf (dump_file, "\nTRAP-IF block found, start %d, trap %d\n",
3840 test_bb->index, trap_bb->index);
3843 /* If this is not a standard conditional jump, we can't parse it. */
3844 jump = BB_END (test_bb);
3845 cond = noce_get_condition (jump, &cond_earliest, false);
3849 /* If the conditional jump is more than just a conditional jump, then
3850 we can not do if-conversion on this block. */
3851 if (! onlyjump_p (jump))
3854 /* We must be comparing objects whose modes imply the size. */
3855 if (GET_MODE (XEXP (cond, 0)) == BLKmode)
3858 /* Reverse the comparison code, if necessary. */
3859 code = GET_CODE (cond);
3860 if (then_bb == trap_bb)
3862 code = reversed_comparison_code (cond, jump);
3863 if (code == UNKNOWN)
3867 /* Attempt to generate the conditional trap. */
3868 seq = gen_cond_trap (code, copy_rtx (XEXP (cond, 0)),
3869 copy_rtx (XEXP (cond, 1)),
3870 TRAP_CODE (PATTERN (trap)));
3874 /* Emit the new insns before cond_earliest. */
3875 emit_insn_before_setloc (seq, cond_earliest, INSN_LOCATION (trap));
3877 /* Delete the trap block if possible. */
3878 remove_edge (trap_bb == then_bb ? then_edge : else_edge);
3879 df_set_bb_dirty (test_bb);
3880 df_set_bb_dirty (then_bb);
3881 df_set_bb_dirty (else_bb);
3883 if (EDGE_COUNT (trap_bb->preds) == 0)
3885 delete_basic_block (trap_bb);
3889 /* Wire together the blocks again. */
3890 if (current_ir_type () == IR_RTL_CFGLAYOUT)
3891 single_succ_edge (test_bb)->flags |= EDGE_FALLTHRU;
3892 else if (trap_bb == then_bb)
3897 lab = JUMP_LABEL (jump);
3898 newjump = emit_jump_insn_after (gen_jump (lab), jump);
3899 LABEL_NUSES (lab) += 1;
3900 JUMP_LABEL (newjump) = lab;
3901 emit_barrier_after (newjump);
3905 if (can_merge_blocks_p (test_bb, other_bb))
3907 merge_blocks (test_bb, other_bb);
3911 num_updated_if_blocks++;
3915 /* Subroutine of find_cond_trap: if BB contains only a trap insn,
3919 block_has_only_trap (basic_block bb)
3923 /* We're not the exit block. */
3924 if (bb == EXIT_BLOCK_PTR_FOR_FN (cfun))
3927 /* The block must have no successors. */
3928 if (EDGE_COUNT (bb->succs) > 0)
3931 /* The only instruction in the THEN block must be the trap. */
3932 trap = first_active_insn (bb);
3933 if (! (trap == BB_END (bb)
3934 && GET_CODE (PATTERN (trap)) == TRAP_IF
3935 && TRAP_CONDITION (PATTERN (trap)) == const_true_rtx))
3941 /* Look for IF-THEN-ELSE cases in which one of THEN or ELSE is
3942 transformable, but not necessarily the other. There need be no
3945 Return TRUE if we were successful at converting the block.
3947 Cases we'd like to look at:
3950 if (test) goto over; // x not live
3958 if (! test) goto label;
3961 if (test) goto E; // x not live
3975 (3) // This one's really only interesting for targets that can do
3976 // multiway branching, e.g. IA-64 BBB bundles. For other targets
3977 // it results in multiple branches on a cache line, which often
3978 // does not sit well with predictors.
3980 if (test1) goto E; // predicted not taken
3996 (A) Don't do (2) if the branch is predicted against the block we're
3997 eliminating. Do it anyway if we can eliminate a branch; this requires
3998 that the sole successor of the eliminated block postdominate the other
4001 (B) With CE, on (3) we can steal from both sides of the if, creating
4010 Again, this is most useful if J postdominates.
4012 (C) CE substitutes for helpful life information.
4014 (D) These heuristics need a lot of work. */
4016 /* Tests for case 1 above. */
4019 find_if_case_1 (basic_block test_bb, edge then_edge, edge else_edge)
4021 basic_block then_bb = then_edge->dest;
4022 basic_block else_bb = else_edge->dest;
4024 int then_bb_index, then_prob;
4025 rtx else_target = NULL_RTX;
4027 /* If we are partitioning hot/cold basic blocks, we don't want to
4028 mess up unconditional or indirect jumps that cross between hot
4031 Basic block partitioning may result in some jumps that appear to
4032 be optimizable (or blocks that appear to be mergeable), but which really
4033 must be left untouched (they are required to make it safely across
4034 partition boundaries). See the comments at the top of
4035 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
4037 if ((BB_END (then_bb)
4038 && JUMP_P (BB_END (then_bb))
4039 && CROSSING_JUMP_P (BB_END (then_bb)))
4040 || (BB_END (test_bb)
4041 && JUMP_P (BB_END (test_bb))
4042 && CROSSING_JUMP_P (BB_END (test_bb)))
4043 || (BB_END (else_bb)
4044 && JUMP_P (BB_END (else_bb))
4045 && CROSSING_JUMP_P (BB_END (else_bb))))
4048 /* THEN has one successor. */
4049 if (!single_succ_p (then_bb))
4052 /* THEN does not fall through, but is not strange either. */
4053 if (single_succ_edge (then_bb)->flags & (EDGE_COMPLEX | EDGE_FALLTHRU))
4056 /* THEN has one predecessor. */
4057 if (!single_pred_p (then_bb))
4060 /* THEN must do something. */
4061 if (forwarder_block_p (then_bb))
4064 num_possible_if_blocks++;
4067 "\nIF-CASE-1 found, start %d, then %d\n",
4068 test_bb->index, then_bb->index);
4070 if (then_edge->probability)
4071 then_prob = REG_BR_PROB_BASE - then_edge->probability;
4073 then_prob = REG_BR_PROB_BASE / 2;
4075 /* We're speculating from the THEN path, we want to make sure the cost
4076 of speculation is within reason. */
4077 if (! cheap_bb_rtx_cost_p (then_bb, then_prob,
4078 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (then_edge->src),
4079 predictable_edge_p (then_edge)))))
4082 if (else_bb == EXIT_BLOCK_PTR_FOR_FN (cfun))
4084 rtx_insn *jump = BB_END (else_edge->src);
4085 gcc_assert (JUMP_P (jump));
4086 else_target = JUMP_LABEL (jump);
4089 /* Registers set are dead, or are predicable. */
4090 if (! dead_or_predicable (test_bb, then_bb, else_bb,
4091 single_succ_edge (then_bb), 1))
4094 /* Conversion went ok, including moving the insns and fixing up the
4095 jump. Adjust the CFG to match. */
4097 /* We can avoid creating a new basic block if then_bb is immediately
4098 followed by else_bb, i.e. deleting then_bb allows test_bb to fall
4099 through to else_bb. */
4101 if (then_bb->next_bb == else_bb
4102 && then_bb->prev_bb == test_bb
4103 && else_bb != EXIT_BLOCK_PTR_FOR_FN (cfun))
4105 redirect_edge_succ (FALLTHRU_EDGE (test_bb), else_bb);
4108 else if (else_bb == EXIT_BLOCK_PTR_FOR_FN (cfun))
4109 new_bb = force_nonfallthru_and_redirect (FALLTHRU_EDGE (test_bb),
4110 else_bb, else_target);
4112 new_bb = redirect_edge_and_branch_force (FALLTHRU_EDGE (test_bb),
4115 df_set_bb_dirty (test_bb);
4116 df_set_bb_dirty (else_bb);
4118 then_bb_index = then_bb->index;
4119 delete_basic_block (then_bb);
4121 /* Make rest of code believe that the newly created block is the THEN_BB
4122 block we removed. */
4125 df_bb_replace (then_bb_index, new_bb);
4126 /* This should have been done above via force_nonfallthru_and_redirect
4127 (possibly called from redirect_edge_and_branch_force). */
4128 gcc_checking_assert (BB_PARTITION (new_bb) == BB_PARTITION (test_bb));
4132 num_updated_if_blocks++;
4137 /* Test for case 2 above. */
4140 find_if_case_2 (basic_block test_bb, edge then_edge, edge else_edge)
4142 basic_block then_bb = then_edge->dest;
4143 basic_block else_bb = else_edge->dest;
4145 int then_prob, else_prob;
4147 /* We do not want to speculate (empty) loop latches. */
4149 && else_bb->loop_father->latch == else_bb)
4152 /* If we are partitioning hot/cold basic blocks, we don't want to
4153 mess up unconditional or indirect jumps that cross between hot
4156 Basic block partitioning may result in some jumps that appear to
4157 be optimizable (or blocks that appear to be mergeable), but which really
4158 must be left untouched (they are required to make it safely across
4159 partition boundaries). See the comments at the top of
4160 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
4162 if ((BB_END (then_bb)
4163 && JUMP_P (BB_END (then_bb))
4164 && CROSSING_JUMP_P (BB_END (then_bb)))
4165 || (BB_END (test_bb)
4166 && JUMP_P (BB_END (test_bb))
4167 && CROSSING_JUMP_P (BB_END (test_bb)))
4168 || (BB_END (else_bb)
4169 && JUMP_P (BB_END (else_bb))
4170 && CROSSING_JUMP_P (BB_END (else_bb))))
4173 /* ELSE has one successor. */
4174 if (!single_succ_p (else_bb))
4177 else_succ = single_succ_edge (else_bb);
4179 /* ELSE outgoing edge is not complex. */
4180 if (else_succ->flags & EDGE_COMPLEX)
4183 /* ELSE has one predecessor. */
4184 if (!single_pred_p (else_bb))
4187 /* THEN is not EXIT. */
4188 if (then_bb->index < NUM_FIXED_BLOCKS)
4191 if (else_edge->probability)
4193 else_prob = else_edge->probability;
4194 then_prob = REG_BR_PROB_BASE - else_prob;
4198 else_prob = REG_BR_PROB_BASE / 2;
4199 then_prob = REG_BR_PROB_BASE / 2;
4202 /* ELSE is predicted or SUCC(ELSE) postdominates THEN. */
4203 if (else_prob > then_prob)
4205 else if (else_succ->dest->index < NUM_FIXED_BLOCKS
4206 || dominated_by_p (CDI_POST_DOMINATORS, then_bb,
4212 num_possible_if_blocks++;
4215 "\nIF-CASE-2 found, start %d, else %d\n",
4216 test_bb->index, else_bb->index);
4218 /* We're speculating from the ELSE path, we want to make sure the cost
4219 of speculation is within reason. */
4220 if (! cheap_bb_rtx_cost_p (else_bb, else_prob,
4221 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (else_edge->src),
4222 predictable_edge_p (else_edge)))))
4225 /* Registers set are dead, or are predicable. */
4226 if (! dead_or_predicable (test_bb, else_bb, then_bb, else_succ, 0))
4229 /* Conversion went ok, including moving the insns and fixing up the
4230 jump. Adjust the CFG to match. */
4232 df_set_bb_dirty (test_bb);
4233 df_set_bb_dirty (then_bb);
4234 delete_basic_block (else_bb);
4237 num_updated_if_blocks++;
4239 /* ??? We may now fallthru from one of THEN's successors into a join
4240 block. Rerun cleanup_cfg? Examine things manually? Wait? */
4245 /* Used by the code above to perform the actual rtl transformations.
4246 Return TRUE if successful.
4248 TEST_BB is the block containing the conditional branch. MERGE_BB
4249 is the block containing the code to manipulate. DEST_EDGE is an
4250 edge representing a jump to the join block; after the conversion,
4251 TEST_BB should be branching to its destination.
4252 REVERSEP is true if the sense of the branch should be reversed. */
4255 dead_or_predicable (basic_block test_bb, basic_block merge_bb,
4256 basic_block other_bb, edge dest_edge, int reversep)
4258 basic_block new_dest = dest_edge->dest;
4259 rtx_insn *head, *end, *jump;
4260 rtx_insn *earliest = NULL;
4262 bitmap merge_set = NULL;
4263 /* Number of pending changes. */
4264 int n_validated_changes = 0;
4265 rtx new_dest_label = NULL_RTX;
4267 jump = BB_END (test_bb);
4269 /* Find the extent of the real code in the merge block. */
4270 head = BB_HEAD (merge_bb);
4271 end = BB_END (merge_bb);
4273 while (DEBUG_INSN_P (end) && end != head)
4274 end = PREV_INSN (end);
4276 /* If merge_bb ends with a tablejump, predicating/moving insn's
4277 into test_bb and then deleting merge_bb will result in the jumptable
4278 that follows merge_bb being removed along with merge_bb and then we
4279 get an unresolved reference to the jumptable. */
4280 if (tablejump_p (end, NULL, NULL))
4284 head = NEXT_INSN (head);
4285 while (DEBUG_INSN_P (head) && head != end)
4286 head = NEXT_INSN (head);
4294 head = NEXT_INSN (head);
4295 while (DEBUG_INSN_P (head) && head != end)
4296 head = NEXT_INSN (head);
4301 if (!onlyjump_p (end))
4308 end = PREV_INSN (end);
4309 while (DEBUG_INSN_P (end) && end != head)
4310 end = PREV_INSN (end);
4313 /* Don't move frame-related insn across the conditional branch. This
4314 can lead to one of the paths of the branch having wrong unwind info. */
4315 if (epilogue_completed)
4317 rtx_insn *insn = head;
4320 if (INSN_P (insn) && RTX_FRAME_RELATED_P (insn))
4324 insn = NEXT_INSN (insn);
4328 /* Disable handling dead code by conditional execution if the machine needs
4329 to do anything funny with the tests, etc. */
4330 #ifndef IFCVT_MODIFY_TESTS
4331 if (targetm.have_conditional_execution ())
4333 /* In the conditional execution case, we have things easy. We know
4334 the condition is reversible. We don't have to check life info
4335 because we're going to conditionally execute the code anyway.
4336 All that's left is making sure the insns involved can actually
4341 cond = cond_exec_get_condition (jump);
4345 rtx note = find_reg_note (jump, REG_BR_PROB, NULL_RTX);
4346 int prob_val = (note ? XINT (note, 0) : -1);
4350 enum rtx_code rev = reversed_comparison_code (cond, jump);
4353 cond = gen_rtx_fmt_ee (rev, GET_MODE (cond), XEXP (cond, 0),
4356 prob_val = REG_BR_PROB_BASE - prob_val;
4359 if (cond_exec_process_insns (NULL, head, end, cond, prob_val, 0)
4360 && verify_changes (0))
4361 n_validated_changes = num_validated_changes ();
4369 /* If we allocated new pseudos (e.g. in the conditional move
4370 expander called from noce_emit_cmove), we must resize the
4372 if (max_regno < max_reg_num ())
4373 max_regno = max_reg_num ();
4375 /* Try the NCE path if the CE path did not result in any changes. */
4376 if (n_validated_changes == 0)
4383 /* In the non-conditional execution case, we have to verify that there
4384 are no trapping operations, no calls, no references to memory, and
4385 that any registers modified are dead at the branch site. */
4387 if (!any_condjump_p (jump))
4390 /* Find the extent of the conditional. */
4391 cond = noce_get_condition (jump, &earliest, false);
4395 live = BITMAP_ALLOC (®_obstack);
4396 simulate_backwards_to_point (merge_bb, live, end);
4397 success = can_move_insns_across (head, end, earliest, jump,
4399 df_get_live_in (other_bb), NULL);
4404 /* Collect the set of registers set in MERGE_BB. */
4405 merge_set = BITMAP_ALLOC (®_obstack);
4407 FOR_BB_INSNS (merge_bb, insn)
4408 if (NONDEBUG_INSN_P (insn))
4409 df_simulate_find_defs (insn, merge_set);
4411 /* If shrink-wrapping, disable this optimization when test_bb is
4412 the first basic block and merge_bb exits. The idea is to not
4413 move code setting up a return register as that may clobber a
4414 register used to pass function parameters, which then must be
4415 saved in caller-saved regs. A caller-saved reg requires the
4416 prologue, killing a shrink-wrap opportunity. */
4417 if ((SHRINK_WRAPPING_ENABLED && !epilogue_completed)
4418 && ENTRY_BLOCK_PTR_FOR_FN (cfun)->next_bb == test_bb
4419 && single_succ_p (new_dest)
4420 && single_succ (new_dest) == EXIT_BLOCK_PTR_FOR_FN (cfun)
4421 && bitmap_intersect_p (df_get_live_in (new_dest), merge_set))
4426 return_regs = BITMAP_ALLOC (®_obstack);
4428 /* Start off with the intersection of regs used to pass
4429 params and regs used to return values. */
4430 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
4431 if (FUNCTION_ARG_REGNO_P (i)
4432 && targetm.calls.function_value_regno_p (i))
4433 bitmap_set_bit (return_regs, INCOMING_REGNO (i));
4435 bitmap_and_into (return_regs,
4436 df_get_live_out (ENTRY_BLOCK_PTR_FOR_FN (cfun)));
4437 bitmap_and_into (return_regs,
4438 df_get_live_in (EXIT_BLOCK_PTR_FOR_FN (cfun)));
4439 if (!bitmap_empty_p (return_regs))
4441 FOR_BB_INSNS_REVERSE (new_dest, insn)
4442 if (NONDEBUG_INSN_P (insn))
4446 /* If this insn sets any reg in return_regs, add all
4447 reg uses to the set of regs we're interested in. */
4448 FOR_EACH_INSN_DEF (def, insn)
4449 if (bitmap_bit_p (return_regs, DF_REF_REGNO (def)))
4451 df_simulate_uses (insn, return_regs);
4455 if (bitmap_intersect_p (merge_set, return_regs))
4457 BITMAP_FREE (return_regs);
4458 BITMAP_FREE (merge_set);
4462 BITMAP_FREE (return_regs);
4467 /* We don't want to use normal invert_jump or redirect_jump because
4468 we don't want to delete_insn called. Also, we want to do our own
4469 change group management. */
4471 old_dest = JUMP_LABEL (jump);
4472 if (other_bb != new_dest)
4474 if (!any_condjump_p (jump))
4477 if (JUMP_P (BB_END (dest_edge->src)))
4478 new_dest_label = JUMP_LABEL (BB_END (dest_edge->src));
4479 else if (new_dest == EXIT_BLOCK_PTR_FOR_FN (cfun))
4480 new_dest_label = ret_rtx;
4482 new_dest_label = block_label (new_dest);
4485 ? ! invert_jump_1 (jump, new_dest_label)
4486 : ! redirect_jump_1 (jump, new_dest_label))
4490 if (verify_changes (n_validated_changes))
4491 confirm_change_group ();
4495 if (other_bb != new_dest)
4497 redirect_jump_2 (jump, old_dest, new_dest_label, 0, reversep);
4499 redirect_edge_succ (BRANCH_EDGE (test_bb), new_dest);
4502 gcov_type count, probability;
4503 count = BRANCH_EDGE (test_bb)->count;
4504 BRANCH_EDGE (test_bb)->count = FALLTHRU_EDGE (test_bb)->count;
4505 FALLTHRU_EDGE (test_bb)->count = count;
4506 probability = BRANCH_EDGE (test_bb)->probability;
4507 BRANCH_EDGE (test_bb)->probability
4508 = FALLTHRU_EDGE (test_bb)->probability;
4509 FALLTHRU_EDGE (test_bb)->probability = probability;
4510 update_br_prob_note (test_bb);
4514 /* Move the insns out of MERGE_BB to before the branch. */
4519 if (end == BB_END (merge_bb))
4520 BB_END (merge_bb) = PREV_INSN (head);
4522 /* PR 21767: when moving insns above a conditional branch, the REG_EQUAL
4523 notes being moved might become invalid. */
4529 if (! INSN_P (insn))
4531 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
4534 remove_note (insn, note);
4535 } while (insn != end && (insn = NEXT_INSN (insn)));
4537 /* PR46315: when moving insns above a conditional branch, the REG_EQUAL
4538 notes referring to the registers being set might become invalid. */
4544 EXECUTE_IF_SET_IN_BITMAP (merge_set, 0, i, bi)
4545 remove_reg_equal_equiv_notes_for_regno (i);
4547 BITMAP_FREE (merge_set);
4550 reorder_insns (head, end, PREV_INSN (earliest));
4553 /* Remove the jump and edge if we can. */
4554 if (other_bb == new_dest)
4557 remove_edge (BRANCH_EDGE (test_bb));
4558 /* ??? Can't merge blocks here, as then_bb is still in use.
4559 At minimum, the merge will get done just before bb-reorder. */
4568 BITMAP_FREE (merge_set);
4573 /* Main entry point for all if-conversion. AFTER_COMBINE is true if
4574 we are after combine pass. */
4577 if_convert (bool after_combine)
4584 df_live_add_problem ();
4585 df_live_set_all_dirty ();
4588 /* Record whether we are after combine pass. */
4589 ifcvt_after_combine = after_combine;
4590 num_possible_if_blocks = 0;
4591 num_updated_if_blocks = 0;
4592 num_true_changes = 0;
4594 loop_optimizer_init (AVOID_CFG_MODIFICATIONS);
4595 mark_loop_exit_edges ();
4596 loop_optimizer_finalize ();
4597 free_dominance_info (CDI_DOMINATORS);
4599 /* Compute postdominators. */
4600 calculate_dominance_info (CDI_POST_DOMINATORS);
4602 df_set_flags (DF_LR_RUN_DCE);
4604 /* Go through each of the basic blocks looking for things to convert. If we
4605 have conditional execution, we make multiple passes to allow us to handle
4606 IF-THEN{-ELSE} blocks within other IF-THEN{-ELSE} blocks. */
4611 /* Only need to do dce on the first pass. */
4612 df_clear_flags (DF_LR_RUN_DCE);
4613 cond_exec_changed_p = FALSE;
4616 #ifdef IFCVT_MULTIPLE_DUMPS
4617 if (dump_file && pass > 1)
4618 fprintf (dump_file, "\n\n========== Pass %d ==========\n", pass);
4621 FOR_EACH_BB_FN (bb, cfun)
4624 while (!df_get_bb_dirty (bb)
4625 && (new_bb = find_if_header (bb, pass)) != NULL)
4629 #ifdef IFCVT_MULTIPLE_DUMPS
4630 if (dump_file && cond_exec_changed_p)
4631 print_rtl_with_bb (dump_file, get_insns (), dump_flags);
4634 while (cond_exec_changed_p);
4636 #ifdef IFCVT_MULTIPLE_DUMPS
4638 fprintf (dump_file, "\n\n========== no more changes\n");
4641 free_dominance_info (CDI_POST_DOMINATORS);
4646 clear_aux_for_blocks ();
4648 /* If we allocated new pseudos, we must resize the array for sched1. */
4649 if (max_regno < max_reg_num ())
4650 max_regno = max_reg_num ();
4652 /* Write the final stats. */
4653 if (dump_file && num_possible_if_blocks > 0)
4656 "\n%d possible IF blocks searched.\n",
4657 num_possible_if_blocks);
4659 "%d IF blocks converted.\n",
4660 num_updated_if_blocks);
4662 "%d true changes made.\n\n\n",
4667 df_remove_problem (df_live);
4669 #ifdef ENABLE_CHECKING
4670 verify_flow_info ();
4674 /* If-conversion and CFG cleanup. */
4676 rest_of_handle_if_conversion (void)
4678 if (flag_if_conversion)
4682 dump_reg_info (dump_file);
4683 dump_flow_info (dump_file, dump_flags);
4685 cleanup_cfg (CLEANUP_EXPENSIVE);
4695 const pass_data pass_data_rtl_ifcvt =
4697 RTL_PASS, /* type */
4699 OPTGROUP_NONE, /* optinfo_flags */
4700 TV_IFCVT, /* tv_id */
4701 0, /* properties_required */
4702 0, /* properties_provided */
4703 0, /* properties_destroyed */
4704 0, /* todo_flags_start */
4705 TODO_df_finish, /* todo_flags_finish */
4708 class pass_rtl_ifcvt : public rtl_opt_pass
4711 pass_rtl_ifcvt (gcc::context *ctxt)
4712 : rtl_opt_pass (pass_data_rtl_ifcvt, ctxt)
4715 /* opt_pass methods: */
4716 virtual bool gate (function *)
4718 return (optimize > 0) && dbg_cnt (if_conversion);
4721 virtual unsigned int execute (function *)
4723 return rest_of_handle_if_conversion ();
4726 }; // class pass_rtl_ifcvt
4731 make_pass_rtl_ifcvt (gcc::context *ctxt)
4733 return new pass_rtl_ifcvt (ctxt);
4737 /* Rerun if-conversion, as combine may have simplified things enough
4738 to now meet sequence length restrictions. */
4742 const pass_data pass_data_if_after_combine =
4744 RTL_PASS, /* type */
4746 OPTGROUP_NONE, /* optinfo_flags */
4747 TV_IFCVT, /* tv_id */
4748 0, /* properties_required */
4749 0, /* properties_provided */
4750 0, /* properties_destroyed */
4751 0, /* todo_flags_start */
4752 TODO_df_finish, /* todo_flags_finish */
4755 class pass_if_after_combine : public rtl_opt_pass
4758 pass_if_after_combine (gcc::context *ctxt)
4759 : rtl_opt_pass (pass_data_if_after_combine, ctxt)
4762 /* opt_pass methods: */
4763 virtual bool gate (function *)
4765 return optimize > 0 && flag_if_conversion
4766 && dbg_cnt (if_after_combine);
4769 virtual unsigned int execute (function *)
4775 }; // class pass_if_after_combine
4780 make_pass_if_after_combine (gcc::context *ctxt)
4782 return new pass_if_after_combine (ctxt);
4788 const pass_data pass_data_if_after_reload =
4790 RTL_PASS, /* type */
4792 OPTGROUP_NONE, /* optinfo_flags */
4793 TV_IFCVT2, /* tv_id */
4794 0, /* properties_required */
4795 0, /* properties_provided */
4796 0, /* properties_destroyed */
4797 0, /* todo_flags_start */
4798 TODO_df_finish, /* todo_flags_finish */
4801 class pass_if_after_reload : public rtl_opt_pass
4804 pass_if_after_reload (gcc::context *ctxt)
4805 : rtl_opt_pass (pass_data_if_after_reload, ctxt)
4808 /* opt_pass methods: */
4809 virtual bool gate (function *)
4811 return optimize > 0 && flag_if_conversion2
4812 && dbg_cnt (if_after_reload);
4815 virtual unsigned int execute (function *)
4821 }; // class pass_if_after_reload
4826 make_pass_if_after_reload (gcc::context *ctxt)
4828 return new pass_if_after_reload (ctxt);