2 * Copyright (c) 2007-2009 Damien Bergamini <damien.bergamini@free.fr>
3 * Copyright (c) 2008 Benjamin Close <benjsc@FreeBSD.org>
4 * Copyright (c) 2008 Sam Leffler, Errno Consulting
5 * Copyright (c) 2011 Intel Corporation
6 * Copyright (c) 2013 Cedric GROSS <c.gross@kreiz-it.fr>
7 * Copyright (c) 2013 Adrian Chadd <adrian@FreeBSD.org>
9 * Permission to use, copy, modify, and distribute this software for any
10 * purpose with or without fee is hereby granted, provided that the above
11 * copyright notice and this permission notice appear in all copies.
13 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
14 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
16 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
17 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
18 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
19 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
23 * Driver for Intel WiFi Link 4965 and 1000/5000/6000 Series 802.11 network
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
33 #include <sys/param.h>
34 #include <sys/sockio.h>
35 #include <sys/sysctl.h>
37 #include <sys/kernel.h>
38 #include <sys/socket.h>
39 #include <sys/systm.h>
40 #include <sys/malloc.h>
43 #include <sys/endian.h>
44 #include <sys/firmware.h>
45 #include <sys/limits.h>
46 #include <sys/module.h>
47 #include <sys/queue.h>
48 #include <sys/taskqueue.h>
49 #include <sys/stdbool.h>
51 #include <machine/clock.h>
53 #include <bus/pci/pcireg.h>
54 #include <bus/pci/pcivar.h>
58 #include <net/if_var.h>
59 #include <net/if_arp.h>
60 #include <net/ethernet.h>
61 #include <net/if_dl.h>
62 #include <net/if_media.h>
63 #include <net/if_types.h>
64 #include <net/ifq_var.h>
66 #include <netinet/in.h>
67 #include <netinet/in_systm.h>
68 #include <netinet/in_var.h>
69 #include <netinet/if_ether.h>
70 #include <netinet/ip.h>
72 #include <netproto/802_11/ieee80211_var.h>
73 #include <netproto/802_11/ieee80211_radiotap.h>
74 #include <netproto/802_11/ieee80211_regdomain.h>
75 #include <netproto/802_11/ieee80211_ratectl.h>
77 #include <dev/netif/iwn/if_iwnreg.h>
78 #include <dev/netif/iwn/if_iwnvar.h>
79 #include <dev/netif/iwn/if_iwn_devid.h>
80 #include <dev/netif/iwn/if_iwn_chip_cfg.h>
81 #include <dev/netif/iwn/if_iwn_debug.h>
82 #include <dev/netif/iwn/if_iwn_ioctl.h>
90 static const struct iwn_ident iwn_ident_table[] = {
91 { 0x8086, IWN_DID_6x05_1, "Intel Centrino Advanced-N 6205" },
92 { 0x8086, IWN_DID_1000_1, "Intel Centrino Wireless-N 1000" },
93 { 0x8086, IWN_DID_1000_2, "Intel Centrino Wireless-N 1000" },
94 { 0x8086, IWN_DID_6x05_2, "Intel Centrino Advanced-N 6205" },
95 { 0x8086, IWN_DID_6050_1, "Intel Centrino Advanced-N + WiMAX 6250" },
96 { 0x8086, IWN_DID_6050_2, "Intel Centrino Advanced-N + WiMAX 6250" },
97 { 0x8086, IWN_DID_x030_1, "Intel Centrino Wireless-N 1030" },
98 { 0x8086, IWN_DID_x030_2, "Intel Centrino Wireless-N 1030" },
99 { 0x8086, IWN_DID_x030_3, "Intel Centrino Advanced-N 6230" },
100 { 0x8086, IWN_DID_x030_4, "Intel Centrino Advanced-N 6230" },
101 { 0x8086, IWN_DID_6150_1, "Intel Centrino Wireless-N + WiMAX 6150" },
102 { 0x8086, IWN_DID_6150_2, "Intel Centrino Wireless-N + WiMAX 6150" },
103 { 0x8086, IWN_DID_2x00_1, "Intel(R) Centrino(R) Wireless-N 2200 BGN" },
104 { 0x8086, IWN_DID_2x00_2, "Intel(R) Centrino(R) Wireless-N 2200 BGN" },
105 /* XXX 2200D is IWN_SDID_2x00_4; there's no way to express this here! */
106 { 0x8086, IWN_DID_2x30_1, "Intel Centrino Wireless-N 2230" },
107 { 0x8086, IWN_DID_2x30_2, "Intel Centrino Wireless-N 2230" },
108 { 0x8086, IWN_DID_130_1, "Intel Centrino Wireless-N 130" },
109 { 0x8086, IWN_DID_130_2, "Intel Centrino Wireless-N 130" },
110 { 0x8086, IWN_DID_100_1, "Intel Centrino Wireless-N 100" },
111 { 0x8086, IWN_DID_100_2, "Intel Centrino Wireless-N 100" },
112 { 0x8086, IWN_DID_105_1, "Intel Centrino Wireless-N 105" },
113 { 0x8086, IWN_DID_105_2, "Intel Centrino Wireless-N 105" },
114 { 0x8086, IWN_DID_135_1, "Intel Centrino Wireless-N 135" },
115 { 0x8086, IWN_DID_135_2, "Intel Centrino Wireless-N 135" },
116 { 0x8086, IWN_DID_4965_1, "Intel Wireless WiFi Link 4965" },
117 { 0x8086, IWN_DID_6x00_1, "Intel Centrino Ultimate-N 6300" },
118 { 0x8086, IWN_DID_6x00_2, "Intel Centrino Advanced-N 6200" },
119 { 0x8086, IWN_DID_4965_2, "Intel Wireless WiFi Link 4965" },
120 { 0x8086, IWN_DID_4965_3, "Intel Wireless WiFi Link 4965" },
121 { 0x8086, IWN_DID_5x00_1, "Intel WiFi Link 5100" },
122 { 0x8086, IWN_DID_4965_4, "Intel Wireless WiFi Link 4965" },
123 { 0x8086, IWN_DID_5x00_3, "Intel Ultimate N WiFi Link 5300" },
124 { 0x8086, IWN_DID_5x00_4, "Intel Ultimate N WiFi Link 5300" },
125 { 0x8086, IWN_DID_5x00_2, "Intel WiFi Link 5100" },
126 { 0x8086, IWN_DID_6x00_3, "Intel Centrino Ultimate-N 6300" },
127 { 0x8086, IWN_DID_6x00_4, "Intel Centrino Advanced-N 6200" },
128 { 0x8086, IWN_DID_5x50_1, "Intel WiMAX/WiFi Link 5350" },
129 { 0x8086, IWN_DID_5x50_2, "Intel WiMAX/WiFi Link 5350" },
130 { 0x8086, IWN_DID_5x50_3, "Intel WiMAX/WiFi Link 5150" },
131 { 0x8086, IWN_DID_5x50_4, "Intel WiMAX/WiFi Link 5150" },
132 { 0x8086, IWN_DID_6035_1, "Intel Centrino Advanced 6235" },
133 { 0x8086, IWN_DID_6035_2, "Intel Centrino Advanced 6235" },
137 static int iwn_probe(device_t);
138 static int iwn_attach(device_t);
139 static int iwn4965_attach(struct iwn_softc *, uint16_t);
140 static int iwn5000_attach(struct iwn_softc *, uint16_t);
141 static int iwn_config_specific(struct iwn_softc *, uint16_t);
142 static void iwn_radiotap_attach(struct iwn_softc *);
143 static void iwn_sysctlattach(struct iwn_softc *);
144 static struct ieee80211vap *iwn_vap_create(struct ieee80211com *,
145 const char [IFNAMSIZ], int, enum ieee80211_opmode, int,
146 const uint8_t [IEEE80211_ADDR_LEN],
147 const uint8_t [IEEE80211_ADDR_LEN]);
148 static void iwn_vap_delete(struct ieee80211vap *);
149 static int iwn_detach(device_t);
150 static int iwn_shutdown(device_t);
151 static int iwn_suspend(device_t);
152 static int iwn_resume(device_t);
153 static int iwn_nic_lock(struct iwn_softc *);
154 static int iwn_eeprom_lock(struct iwn_softc *);
155 static int iwn_init_otprom(struct iwn_softc *);
156 static int iwn_read_prom_data(struct iwn_softc *, uint32_t, void *, int);
157 static void iwn_dma_map_addr(void *, bus_dma_segment_t *, int, int);
158 static int iwn_dma_contig_alloc(struct iwn_softc *, struct iwn_dma_info *,
159 void **, bus_size_t, bus_size_t);
160 static void iwn_dma_contig_free(struct iwn_dma_info *);
161 static int iwn_alloc_sched(struct iwn_softc *);
162 static void iwn_free_sched(struct iwn_softc *);
163 static int iwn_alloc_kw(struct iwn_softc *);
164 static void iwn_free_kw(struct iwn_softc *);
165 static int iwn_alloc_ict(struct iwn_softc *);
166 static void iwn_free_ict(struct iwn_softc *);
167 static int iwn_alloc_fwmem(struct iwn_softc *);
168 static void iwn_free_fwmem(struct iwn_softc *);
169 static int iwn_alloc_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
170 static void iwn_reset_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
171 static void iwn_free_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
172 static int iwn_alloc_tx_ring(struct iwn_softc *, struct iwn_tx_ring *,
174 static void iwn_reset_tx_ring(struct iwn_softc *, struct iwn_tx_ring *);
175 static void iwn_free_tx_ring(struct iwn_softc *, struct iwn_tx_ring *);
176 static void iwn5000_ict_reset(struct iwn_softc *);
177 static int iwn_read_eeprom(struct iwn_softc *,
178 uint8_t macaddr[IEEE80211_ADDR_LEN]);
179 static void iwn4965_read_eeprom(struct iwn_softc *);
181 static void iwn4965_print_power_group(struct iwn_softc *, int);
183 static void iwn5000_read_eeprom(struct iwn_softc *);
184 static uint32_t iwn_eeprom_channel_flags(struct iwn_eeprom_chan *);
185 static void iwn_read_eeprom_band(struct iwn_softc *, int);
186 static void iwn_read_eeprom_ht40(struct iwn_softc *, int);
187 static void iwn_read_eeprom_channels(struct iwn_softc *, int, uint32_t);
188 static struct iwn_eeprom_chan *iwn_find_eeprom_channel(struct iwn_softc *,
189 struct ieee80211_channel *);
190 static int iwn_setregdomain(struct ieee80211com *,
191 struct ieee80211_regdomain *, int,
192 struct ieee80211_channel[]);
193 static void iwn_read_eeprom_enhinfo(struct iwn_softc *);
194 static struct ieee80211_node *iwn_node_alloc(struct ieee80211vap *,
195 const uint8_t mac[IEEE80211_ADDR_LEN]);
196 static void iwn_newassoc(struct ieee80211_node *, int);
197 static int iwn_media_change(struct ifnet *);
198 static int iwn_newstate(struct ieee80211vap *, enum ieee80211_state, int);
199 static void iwn_calib_timeout(void *);
200 static void iwn_rx_phy(struct iwn_softc *, struct iwn_rx_desc *,
201 struct iwn_rx_data *);
202 static void iwn_rx_done(struct iwn_softc *, struct iwn_rx_desc *,
203 struct iwn_rx_data *);
204 static void iwn_rx_compressed_ba(struct iwn_softc *, struct iwn_rx_desc *,
205 struct iwn_rx_data *);
206 static void iwn5000_rx_calib_results(struct iwn_softc *,
207 struct iwn_rx_desc *, struct iwn_rx_data *);
208 static void iwn_rx_statistics(struct iwn_softc *, struct iwn_rx_desc *,
209 struct iwn_rx_data *);
210 static void iwn4965_tx_done(struct iwn_softc *, struct iwn_rx_desc *,
211 struct iwn_rx_data *);
212 static void iwn5000_tx_done(struct iwn_softc *, struct iwn_rx_desc *,
213 struct iwn_rx_data *);
214 static void iwn_tx_done(struct iwn_softc *, struct iwn_rx_desc *, int,
216 static void iwn_ampdu_tx_done(struct iwn_softc *, int, int, int, int, void *);
217 static void iwn_cmd_done(struct iwn_softc *, struct iwn_rx_desc *);
218 static void iwn_notif_intr(struct iwn_softc *);
219 static void iwn_wakeup_intr(struct iwn_softc *);
220 static void iwn_rftoggle_intr(struct iwn_softc *);
221 static void iwn_fatal_intr(struct iwn_softc *);
222 static void iwn_intr(void *);
223 static void iwn4965_update_sched(struct iwn_softc *, int, int, uint8_t,
225 static void iwn5000_update_sched(struct iwn_softc *, int, int, uint8_t,
228 static void iwn5000_reset_sched(struct iwn_softc *, int, int);
230 static int iwn_tx_data(struct iwn_softc *, struct mbuf *,
231 struct ieee80211_node *);
232 static int iwn_tx_data_raw(struct iwn_softc *, struct mbuf *,
233 struct ieee80211_node *,
234 const struct ieee80211_bpf_params *params);
235 static int iwn_raw_xmit(struct ieee80211_node *, struct mbuf *,
236 const struct ieee80211_bpf_params *);
237 #if defined(__DragonFly__)
238 static void iwn_start(struct ifnet *, struct ifaltq_subque *);
240 static void iwn_start(struct ifnet *);
242 static void iwn_start_locked(struct ifnet *);
243 static void iwn_watchdog(void *);
244 #if defined(__DragonFly__)
245 static int iwn_ioctl(struct ifnet *, u_long, caddr_t, struct ucred *);
247 static int iwn_ioctl(struct ifnet *, u_long, caddr_t);
249 static int iwn_cmd(struct iwn_softc *, int, const void *, int, int);
250 static int iwn4965_add_node(struct iwn_softc *, struct iwn_node_info *,
252 static int iwn5000_add_node(struct iwn_softc *, struct iwn_node_info *,
254 static int iwn_set_link_quality(struct iwn_softc *,
255 struct ieee80211_node *);
256 static int iwn_add_broadcast_node(struct iwn_softc *, int);
257 static int iwn_updateedca(struct ieee80211com *);
258 static void iwn_update_mcast(struct ifnet *);
259 static void iwn_set_led(struct iwn_softc *, uint8_t, uint8_t, uint8_t);
260 static int iwn_set_critical_temp(struct iwn_softc *);
261 static int iwn_set_timing(struct iwn_softc *, struct ieee80211_node *);
262 static void iwn4965_power_calibration(struct iwn_softc *, int);
263 static int iwn4965_set_txpower(struct iwn_softc *,
264 struct ieee80211_channel *, int);
265 static int iwn5000_set_txpower(struct iwn_softc *,
266 struct ieee80211_channel *, int);
267 static int iwn4965_get_rssi(struct iwn_softc *, struct iwn_rx_stat *);
268 static int iwn5000_get_rssi(struct iwn_softc *, struct iwn_rx_stat *);
269 static int iwn_get_noise(const struct iwn_rx_general_stats *);
270 static int iwn4965_get_temperature(struct iwn_softc *);
271 static int iwn5000_get_temperature(struct iwn_softc *);
272 static int iwn_init_sensitivity(struct iwn_softc *);
273 static void iwn_collect_noise(struct iwn_softc *,
274 const struct iwn_rx_general_stats *);
275 static int iwn4965_init_gains(struct iwn_softc *);
276 static int iwn5000_init_gains(struct iwn_softc *);
277 static int iwn4965_set_gains(struct iwn_softc *);
278 static int iwn5000_set_gains(struct iwn_softc *);
279 static void iwn_tune_sensitivity(struct iwn_softc *,
280 const struct iwn_rx_stats *);
281 static void iwn_save_stats_counters(struct iwn_softc *,
282 const struct iwn_stats *);
283 static int iwn_send_sensitivity(struct iwn_softc *);
284 static void iwn_check_rx_recovery(struct iwn_softc *, struct iwn_stats *);
285 static int iwn_set_pslevel(struct iwn_softc *, int, int, int);
286 static int iwn_send_btcoex(struct iwn_softc *);
287 static int iwn_send_advanced_btcoex(struct iwn_softc *);
288 static int iwn5000_runtime_calib(struct iwn_softc *);
289 static int iwn_config(struct iwn_softc *);
290 static int iwn_scan(struct iwn_softc *, struct ieee80211vap *,
291 struct ieee80211_scan_state *, struct ieee80211_channel *);
292 static int iwn_auth(struct iwn_softc *, struct ieee80211vap *vap);
293 static int iwn_run(struct iwn_softc *, struct ieee80211vap *vap);
294 static int iwn_ampdu_rx_start(struct ieee80211_node *,
295 struct ieee80211_rx_ampdu *, int, int, int);
296 static void iwn_ampdu_rx_stop(struct ieee80211_node *,
297 struct ieee80211_rx_ampdu *);
298 static int iwn_addba_request(struct ieee80211_node *,
299 struct ieee80211_tx_ampdu *, int, int, int);
300 static int iwn_addba_response(struct ieee80211_node *,
301 struct ieee80211_tx_ampdu *, int, int, int);
302 static int iwn_ampdu_tx_start(struct ieee80211com *,
303 struct ieee80211_node *, uint8_t);
304 static void iwn_ampdu_tx_stop(struct ieee80211_node *,
305 struct ieee80211_tx_ampdu *);
306 static void iwn4965_ampdu_tx_start(struct iwn_softc *,
307 struct ieee80211_node *, int, uint8_t, uint16_t);
308 static void iwn4965_ampdu_tx_stop(struct iwn_softc *, int,
310 static void iwn5000_ampdu_tx_start(struct iwn_softc *,
311 struct ieee80211_node *, int, uint8_t, uint16_t);
312 static void iwn5000_ampdu_tx_stop(struct iwn_softc *, int,
314 static int iwn5000_query_calibration(struct iwn_softc *);
315 static int iwn5000_send_calibration(struct iwn_softc *);
316 static int iwn5000_send_wimax_coex(struct iwn_softc *);
317 static int iwn5000_crystal_calib(struct iwn_softc *);
318 static int iwn5000_temp_offset_calib(struct iwn_softc *);
319 static int iwn5000_temp_offset_calibv2(struct iwn_softc *);
320 static int iwn4965_post_alive(struct iwn_softc *);
321 static int iwn5000_post_alive(struct iwn_softc *);
322 static int iwn4965_load_bootcode(struct iwn_softc *, const uint8_t *,
324 static int iwn4965_load_firmware(struct iwn_softc *);
325 static int iwn5000_load_firmware_section(struct iwn_softc *, uint32_t,
326 const uint8_t *, int);
327 static int iwn5000_load_firmware(struct iwn_softc *);
328 static int iwn_read_firmware_leg(struct iwn_softc *,
329 struct iwn_fw_info *);
330 static int iwn_read_firmware_tlv(struct iwn_softc *,
331 struct iwn_fw_info *, uint16_t);
332 static int iwn_read_firmware(struct iwn_softc *);
333 static int iwn_clock_wait(struct iwn_softc *);
334 static int iwn_apm_init(struct iwn_softc *);
335 static void iwn_apm_stop_master(struct iwn_softc *);
336 static void iwn_apm_stop(struct iwn_softc *);
337 static int iwn4965_nic_config(struct iwn_softc *);
338 static int iwn5000_nic_config(struct iwn_softc *);
339 static int iwn_hw_prepare(struct iwn_softc *);
340 static int iwn_hw_init(struct iwn_softc *);
341 static void iwn_hw_stop(struct iwn_softc *);
342 static void iwn_radio_on(void *, int);
343 static void iwn_radio_off(void *, int);
344 static void iwn_panicked(void *, int);
345 static void iwn_init_locked(struct iwn_softc *);
346 static void iwn_init(void *);
347 static void iwn_stop_locked(struct iwn_softc *);
348 static void iwn_stop(struct iwn_softc *);
349 static void iwn_scan_start(struct ieee80211com *);
350 static void iwn_scan_end(struct ieee80211com *);
351 static void iwn_set_channel(struct ieee80211com *);
352 static void iwn_scan_curchan(struct ieee80211_scan_state *, unsigned long);
353 static void iwn_scan_mindwell(struct ieee80211_scan_state *);
354 static void iwn_hw_reset(void *, int);
356 static char *iwn_get_csr_string(int);
357 static void iwn_debug_register(struct iwn_softc *);
359 static int iwn_sleep(struct iwn_softc *sc, void *wchan,
360 int flags, const char *wmsg, int timo);
362 static device_method_t iwn_methods[] = {
363 /* Device interface */
364 DEVMETHOD(device_probe, iwn_probe),
365 DEVMETHOD(device_attach, iwn_attach),
366 DEVMETHOD(device_detach, iwn_detach),
367 DEVMETHOD(device_shutdown, iwn_shutdown),
368 DEVMETHOD(device_suspend, iwn_suspend),
369 DEVMETHOD(device_resume, iwn_resume),
374 static driver_t iwn_driver = {
377 sizeof(struct iwn_softc)
379 static devclass_t iwn_devclass;
381 DRIVER_MODULE(iwn, pci, iwn_driver, iwn_devclass, NULL, NULL);
383 MODULE_VERSION(iwn, 1);
385 MODULE_DEPEND(iwn, firmware, 1, 1, 1);
386 MODULE_DEPEND(iwn, pci, 1, 1, 1);
387 MODULE_DEPEND(iwn, wlan, 1, 1, 1);
390 iwn_probe(device_t dev)
392 const struct iwn_ident *ident;
394 for (ident = iwn_ident_table; ident->name != NULL; ident++) {
395 if (pci_get_vendor(dev) == ident->vendor &&
396 pci_get_device(dev) == ident->device) {
397 device_set_desc(dev, ident->name);
398 return (BUS_PROBE_DEFAULT);
405 iwn_is_3stream_device(struct iwn_softc *sc)
407 /* XXX for now only 5300, until the 5350 can be tested */
408 if (sc->hw_type == IWN_HW_REV_TYPE_5300)
414 iwn_attach(device_t dev)
416 struct iwn_softc *sc = (struct iwn_softc *)device_get_softc(dev);
417 struct ieee80211com *ic;
420 uint8_t macaddr[IEEE80211_ADDR_LEN];
421 char ethstr[ETHER_ADDRSTRLEN + 1];
423 wlan_serialize_enter();
428 error = resource_int_value(device_get_name(sc->sc_dev),
429 device_get_unit(sc->sc_dev), "debug", &(sc->sc_debug));
436 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: begin\n",__func__);
439 * Get the offset of the PCI Express Capability Structure in PCI
440 * Configuration Space.
442 #if defined(__DragonFly__)
443 error = pci_find_extcap(dev, PCIY_EXPRESS, &sc->sc_cap_off);
445 error = pci_find_cap(dev, PCIY_EXPRESS, &sc->sc_cap_off);
448 device_printf(dev, "PCIe capability structure not found!\n");
449 wlan_serialize_exit();
453 /* Clear device-specific "PCI retry timeout" register (41h). */
454 pci_write_config(dev, 0x41, 0, 1);
456 /* Enable bus-mastering. */
457 pci_enable_busmaster(dev);
460 sc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
462 if (sc->mem == NULL) {
463 device_printf(dev, "can't map mem space\n");
465 wlan_serialize_exit();
468 sc->sc_st = rman_get_bustag(sc->mem);
469 sc->sc_sh = rman_get_bushandle(sc->mem);
474 if (pci_alloc_msi(dev, &i) == 0)
477 /* Install interrupt handler. */
478 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE |
479 (rid != 0 ? 0 : RF_SHAREABLE));
480 if (sc->irq == NULL) {
481 device_printf(dev, "can't map interrupt\n");
488 /* Read hardware revision and attach. */
489 sc->hw_type = (IWN_READ(sc, IWN_HW_REV) >> IWN_HW_REV_TYPE_SHIFT)
490 & IWN_HW_REV_TYPE_MASK;
491 sc->subdevice_id = pci_get_subdevice(dev);
494 * 4965 versus 5000 and later have different methods.
495 * Let's set those up first.
497 if (sc->hw_type == IWN_HW_REV_TYPE_4965)
498 error = iwn4965_attach(sc, pci_get_device(dev));
500 error = iwn5000_attach(sc, pci_get_device(dev));
502 device_printf(dev, "could not attach device, error %d\n",
508 * Next, let's setup the various parameters of each NIC.
510 error = iwn_config_specific(sc, pci_get_device(dev));
512 device_printf(dev, "could not attach device, error %d\n",
517 if ((error = iwn_hw_prepare(sc)) != 0) {
518 device_printf(dev, "hardware not ready, error %d\n", error);
522 /* Allocate DMA memory for firmware transfers. */
523 if ((error = iwn_alloc_fwmem(sc)) != 0) {
525 "could not allocate memory for firmware, error %d\n",
530 /* Allocate "Keep Warm" page. */
531 if ((error = iwn_alloc_kw(sc)) != 0) {
533 "could not allocate keep warm page, error %d\n", error);
537 /* Allocate ICT table for 5000 Series. */
538 if (sc->hw_type != IWN_HW_REV_TYPE_4965 &&
539 (error = iwn_alloc_ict(sc)) != 0) {
540 device_printf(dev, "could not allocate ICT table, error %d\n",
545 /* Allocate TX scheduler "rings". */
546 if ((error = iwn_alloc_sched(sc)) != 0) {
548 "could not allocate TX scheduler rings, error %d\n", error);
552 /* Allocate TX rings (16 on 4965AGN, 20 on >=5000). */
553 for (i = 0; i < sc->ntxqs; i++) {
554 if ((error = iwn_alloc_tx_ring(sc, &sc->txq[i], i)) != 0) {
556 "could not allocate TX ring %d, error %d\n", i,
562 /* Allocate RX ring. */
563 if ((error = iwn_alloc_rx_ring(sc, &sc->rxq)) != 0) {
564 device_printf(dev, "could not allocate RX ring, error %d\n",
569 /* Clear pending interrupts. */
570 IWN_WRITE(sc, IWN_INT, 0xffffffff);
572 ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211);
574 device_printf(dev, "can not allocate ifnet structure\n");
580 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
581 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
583 /* Set device capabilities. */
585 IEEE80211_C_STA /* station mode supported */
586 | IEEE80211_C_MONITOR /* monitor mode supported */
587 | IEEE80211_C_BGSCAN /* background scanning */
588 | IEEE80211_C_TXPMGT /* tx power management */
589 | IEEE80211_C_SHSLOT /* short slot time supported */
591 | IEEE80211_C_SHPREAMBLE /* short preamble supported */
593 | IEEE80211_C_IBSS /* ibss/adhoc mode */
595 | IEEE80211_C_WME /* WME */
596 | IEEE80211_C_PMGT /* Station-side power mgmt */
599 /* Read MAC address, channels, etc from EEPROM. */
600 if ((error = iwn_read_eeprom(sc, macaddr)) != 0) {
601 device_printf(dev, "could not read EEPROM, error %d\n",
606 /* Count the number of available chains. */
608 ((sc->txchainmask >> 2) & 1) +
609 ((sc->txchainmask >> 1) & 1) +
610 ((sc->txchainmask >> 0) & 1);
612 ((sc->rxchainmask >> 2) & 1) +
613 ((sc->rxchainmask >> 1) & 1) +
614 ((sc->rxchainmask >> 0) & 1);
616 device_printf(dev, "MIMO %dT%dR, %.4s, address %s\n",
617 sc->ntxchains, sc->nrxchains, sc->eeprom_domain,
618 kether_ntoa(macaddr, ethstr));
621 if (sc->sc_flags & IWN_FLAG_HAS_11N) {
622 ic->ic_rxstream = sc->nrxchains;
623 ic->ic_txstream = sc->ntxchains;
626 * Some of the 3 antenna devices (ie, the 4965) only supports
627 * 2x2 operation. So correct the number of streams if
628 * it's not a 3-stream device.
630 if (! iwn_is_3stream_device(sc)) {
631 if (ic->ic_rxstream > 2)
633 if (ic->ic_txstream > 2)
638 IEEE80211_HTCAP_SMPS_OFF /* SMPS mode disabled */
639 | IEEE80211_HTCAP_SHORTGI20 /* short GI in 20MHz */
640 | IEEE80211_HTCAP_CHWIDTH40 /* 40MHz channel width*/
641 | IEEE80211_HTCAP_SHORTGI40 /* short GI in 40MHz */
643 | IEEE80211_HTCAP_GREENFIELD
644 #if IWN_RBUF_SIZE == 8192
645 | IEEE80211_HTCAP_MAXAMSDU_7935 /* max A-MSDU length */
647 | IEEE80211_HTCAP_MAXAMSDU_3839 /* max A-MSDU length */
650 /* s/w capabilities */
651 | IEEE80211_HTC_HT /* HT operation */
652 | IEEE80211_HTC_AMPDU /* tx A-MPDU */
654 | IEEE80211_HTC_AMSDU /* tx A-MSDU */
659 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
661 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
662 ifp->if_init = iwn_init;
663 ifp->if_ioctl = iwn_ioctl;
664 ifp->if_start = iwn_start;
665 #if defined(__DragonFly__)
666 ifp->if_nmbjclusters = IWN_RX_RING_COUNT;
667 ifq_set_maxlen(&ifp->if_snd, ifqmaxlen);
669 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
670 ifp->if_snd.ifq_drv_maxlen = ifqmaxlen;
671 IFQ_SET_READY(&ifp->if_snd);
674 ieee80211_ifattach(ic, macaddr);
675 ic->ic_vap_create = iwn_vap_create;
676 ic->ic_vap_delete = iwn_vap_delete;
677 ic->ic_raw_xmit = iwn_raw_xmit;
678 ic->ic_node_alloc = iwn_node_alloc;
679 sc->sc_ampdu_rx_start = ic->ic_ampdu_rx_start;
680 ic->ic_ampdu_rx_start = iwn_ampdu_rx_start;
681 sc->sc_ampdu_rx_stop = ic->ic_ampdu_rx_stop;
682 ic->ic_ampdu_rx_stop = iwn_ampdu_rx_stop;
683 sc->sc_addba_request = ic->ic_addba_request;
684 ic->ic_addba_request = iwn_addba_request;
685 sc->sc_addba_response = ic->ic_addba_response;
686 ic->ic_addba_response = iwn_addba_response;
687 sc->sc_addba_stop = ic->ic_addba_stop;
688 ic->ic_addba_stop = iwn_ampdu_tx_stop;
689 ic->ic_newassoc = iwn_newassoc;
690 ic->ic_wme.wme_update = iwn_updateedca;
691 ic->ic_update_mcast = iwn_update_mcast;
692 ic->ic_scan_start = iwn_scan_start;
693 ic->ic_scan_end = iwn_scan_end;
694 ic->ic_set_channel = iwn_set_channel;
695 ic->ic_scan_curchan = iwn_scan_curchan;
696 ic->ic_scan_mindwell = iwn_scan_mindwell;
697 ic->ic_setregdomain = iwn_setregdomain;
699 iwn_radiotap_attach(sc);
701 callout_init_mtx(&sc->calib_to, &sc->sc_mtx, 0);
702 callout_init_mtx(&sc->watchdog_to, &sc->sc_mtx, 0);
703 TASK_INIT(&sc->sc_reinit_task, 0, iwn_hw_reset, sc);
704 TASK_INIT(&sc->sc_radioon_task, 0, iwn_radio_on, sc);
705 TASK_INIT(&sc->sc_radiooff_task, 0, iwn_radio_off, sc);
706 TASK_INIT(&sc->sc_panic_task, 0, iwn_panicked, sc);
708 sc->sc_tq = taskqueue_create("iwn_taskq", M_WAITOK,
709 taskqueue_thread_enqueue, &sc->sc_tq);
710 #if defined(__DragonFly__)
711 error = taskqueue_start_threads(&sc->sc_tq, 1, TDPRI_KERN_DAEMON,
714 error = taskqueue_start_threads(&sc->sc_tq, 1, 0, "iwn_taskq");
717 device_printf(dev, "can't start threads, error %d\n", error);
721 iwn_sysctlattach(sc);
724 * Hook our interrupt after all initialization is complete.
726 #if defined(__DragonFly__)
727 error = bus_setup_intr(dev, sc->irq, INTR_MPSAFE,
728 iwn_intr, sc, &sc->sc_ih,
729 &wlan_global_serializer);
731 error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET | INTR_MPSAFE,
732 NULL, iwn_intr, sc, &sc->sc_ih);
735 device_printf(dev, "can't establish interrupt, error %d\n",
741 device_printf(sc->sc_dev, "%s: rx_stats=%d, rx_stats_bt=%d\n",
743 sizeof(struct iwn_stats),
744 sizeof(struct iwn_stats_bt));
748 ieee80211_announce(ic);
749 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
750 wlan_serialize_exit();
753 wlan_serialize_exit();
755 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__);
760 * Define specific configuration based on device id and subdevice id
761 * pid : PCI device id
764 iwn_config_specific(struct iwn_softc *sc, uint16_t pid)
773 sc->base_params = &iwn4965_base_params;
774 sc->limits = &iwn4965_sensitivity_limits;
775 sc->fwname = "iwn4965fw";
776 /* Override chains masks, ROM is known to be broken. */
777 sc->txchainmask = IWN_ANT_AB;
778 sc->rxchainmask = IWN_ANT_ABC;
779 /* Enable normal btcoex */
780 sc->sc_flags |= IWN_FLAG_BTCOEX;
785 switch(sc->subdevice_id) {
786 case IWN_SDID_1000_1:
787 case IWN_SDID_1000_2:
788 case IWN_SDID_1000_3:
789 case IWN_SDID_1000_4:
790 case IWN_SDID_1000_5:
791 case IWN_SDID_1000_6:
792 case IWN_SDID_1000_7:
793 case IWN_SDID_1000_8:
794 case IWN_SDID_1000_9:
795 case IWN_SDID_1000_10:
796 case IWN_SDID_1000_11:
797 case IWN_SDID_1000_12:
798 sc->limits = &iwn1000_sensitivity_limits;
799 sc->base_params = &iwn1000_base_params;
800 sc->fwname = "iwn1000fw";
803 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
804 "0x%04x rev %d not supported (subdevice)\n", pid,
805 sc->subdevice_id,sc->hw_type);
814 sc->fwname = "iwn6000fw";
815 sc->limits = &iwn6000_sensitivity_limits;
816 switch(sc->subdevice_id) {
817 case IWN_SDID_6x00_1:
818 case IWN_SDID_6x00_2:
819 case IWN_SDID_6x00_8:
821 sc->base_params = &iwn_6000_base_params;
823 case IWN_SDID_6x00_3:
824 case IWN_SDID_6x00_6:
825 case IWN_SDID_6x00_9:
827 case IWN_SDID_6x00_4:
828 case IWN_SDID_6x00_7:
829 case IWN_SDID_6x00_10:
831 case IWN_SDID_6x00_5:
833 sc->base_params = &iwn_6000i_base_params;
834 sc->sc_flags |= IWN_FLAG_INTERNAL_PA;
835 sc->txchainmask = IWN_ANT_BC;
836 sc->rxchainmask = IWN_ANT_BC;
839 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
840 "0x%04x rev %d not supported (subdevice)\n", pid,
841 sc->subdevice_id,sc->hw_type);
848 switch(sc->subdevice_id) {
849 case IWN_SDID_6x05_1:
850 case IWN_SDID_6x05_4:
851 case IWN_SDID_6x05_6:
853 case IWN_SDID_6x05_2:
854 case IWN_SDID_6x05_5:
855 case IWN_SDID_6x05_7:
857 case IWN_SDID_6x05_3:
859 case IWN_SDID_6x05_8:
860 case IWN_SDID_6x05_9:
861 //iwl6005_2agn_sff_cfg
862 case IWN_SDID_6x05_10:
864 case IWN_SDID_6x05_11:
865 //iwl6005_2agn_mow1_cfg
866 case IWN_SDID_6x05_12:
867 //iwl6005_2agn_mow2_cfg
868 sc->fwname = "iwn6000g2afw";
869 sc->limits = &iwn6000_sensitivity_limits;
870 sc->base_params = &iwn_6000g2_base_params;
873 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
874 "0x%04x rev %d not supported (subdevice)\n", pid,
875 sc->subdevice_id,sc->hw_type);
882 switch(sc->subdevice_id) {
883 case IWN_SDID_6035_1:
884 case IWN_SDID_6035_2:
885 case IWN_SDID_6035_3:
886 case IWN_SDID_6035_4:
887 sc->fwname = "iwn6000g2bfw";
888 sc->limits = &iwn6235_sensitivity_limits;
889 sc->base_params = &iwn_6235_base_params;
892 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
893 "0x%04x rev %d not supported (subdevice)\n", pid,
894 sc->subdevice_id,sc->hw_type);
898 /* 6x50 WiFi/WiMax Series */
901 switch(sc->subdevice_id) {
902 case IWN_SDID_6050_1:
903 case IWN_SDID_6050_3:
904 case IWN_SDID_6050_5:
906 case IWN_SDID_6050_2:
907 case IWN_SDID_6050_4:
908 case IWN_SDID_6050_6:
910 sc->fwname = "iwn6050fw";
911 sc->txchainmask = IWN_ANT_AB;
912 sc->rxchainmask = IWN_ANT_AB;
913 sc->limits = &iwn6000_sensitivity_limits;
914 sc->base_params = &iwn_6050_base_params;
917 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
918 "0x%04x rev %d not supported (subdevice)\n", pid,
919 sc->subdevice_id,sc->hw_type);
923 /* 6150 WiFi/WiMax Series */
926 switch(sc->subdevice_id) {
927 case IWN_SDID_6150_1:
928 case IWN_SDID_6150_3:
929 case IWN_SDID_6150_5:
931 case IWN_SDID_6150_2:
932 case IWN_SDID_6150_4:
933 case IWN_SDID_6150_6:
935 sc->fwname = "iwn6050fw";
936 sc->limits = &iwn6000_sensitivity_limits;
937 sc->base_params = &iwn_6150_base_params;
940 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
941 "0x%04x rev %d not supported (subdevice)\n", pid,
942 sc->subdevice_id,sc->hw_type);
946 /* 6030 Series and 1030 Series */
951 switch(sc->subdevice_id) {
952 case IWN_SDID_x030_1:
953 case IWN_SDID_x030_3:
954 case IWN_SDID_x030_5:
956 case IWN_SDID_x030_2:
957 case IWN_SDID_x030_4:
958 case IWN_SDID_x030_6:
960 case IWN_SDID_x030_7:
961 case IWN_SDID_x030_10:
962 case IWN_SDID_x030_14:
964 case IWN_SDID_x030_8:
965 case IWN_SDID_x030_11:
966 case IWN_SDID_x030_15:
968 case IWN_SDID_x030_9:
969 case IWN_SDID_x030_12:
970 case IWN_SDID_x030_16:
972 case IWN_SDID_x030_13:
974 sc->fwname = "iwn6000g2bfw";
975 sc->limits = &iwn6000_sensitivity_limits;
976 sc->base_params = &iwn_6000g2b_base_params;
979 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
980 "0x%04x rev %d not supported (subdevice)\n", pid,
981 sc->subdevice_id,sc->hw_type);
985 /* 130 Series WiFi */
986 /* XXX: This series will need adjustment for rate.
987 * see rx_with_siso_diversity in linux kernel
991 switch(sc->subdevice_id) {
1000 sc->fwname = "iwn6000g2bfw";
1001 sc->limits = &iwn6000_sensitivity_limits;
1002 sc->base_params = &iwn_6000g2b_base_params;
1005 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1006 "0x%04x rev %d not supported (subdevice)\n", pid,
1007 sc->subdevice_id,sc->hw_type);
1011 /* 100 Series WiFi */
1014 switch(sc->subdevice_id) {
1015 case IWN_SDID_100_1:
1016 case IWN_SDID_100_2:
1017 case IWN_SDID_100_3:
1018 case IWN_SDID_100_4:
1019 case IWN_SDID_100_5:
1020 case IWN_SDID_100_6:
1021 sc->limits = &iwn1000_sensitivity_limits;
1022 sc->base_params = &iwn1000_base_params;
1023 sc->fwname = "iwn100fw";
1026 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1027 "0x%04x rev %d not supported (subdevice)\n", pid,
1028 sc->subdevice_id,sc->hw_type);
1034 /* XXX: This series will need adjustment for rate.
1035 * see rx_with_siso_diversity in linux kernel
1039 switch(sc->subdevice_id) {
1040 case IWN_SDID_105_1:
1041 case IWN_SDID_105_2:
1042 case IWN_SDID_105_3:
1044 case IWN_SDID_105_4:
1046 sc->limits = &iwn2030_sensitivity_limits;
1047 sc->base_params = &iwn2000_base_params;
1048 sc->fwname = "iwn105fw";
1051 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1052 "0x%04x rev %d not supported (subdevice)\n", pid,
1053 sc->subdevice_id,sc->hw_type);
1059 /* XXX: This series will need adjustment for rate.
1060 * see rx_with_siso_diversity in linux kernel
1064 switch(sc->subdevice_id) {
1065 case IWN_SDID_135_1:
1066 case IWN_SDID_135_2:
1067 case IWN_SDID_135_3:
1068 sc->limits = &iwn2030_sensitivity_limits;
1069 sc->base_params = &iwn2030_base_params;
1070 sc->fwname = "iwn135fw";
1073 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1074 "0x%04x rev %d not supported (subdevice)\n", pid,
1075 sc->subdevice_id,sc->hw_type);
1081 case IWN_DID_2x00_1:
1082 case IWN_DID_2x00_2:
1083 switch(sc->subdevice_id) {
1084 case IWN_SDID_2x00_1:
1085 case IWN_SDID_2x00_2:
1086 case IWN_SDID_2x00_3:
1088 case IWN_SDID_2x00_4:
1089 //iwl2000_2bgn_d_cfg
1090 sc->limits = &iwn2030_sensitivity_limits;
1091 sc->base_params = &iwn2000_base_params;
1092 sc->fwname = "iwn2000fw";
1095 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1096 "0x%04x rev %d not supported (subdevice) \n",
1097 pid, sc->subdevice_id, sc->hw_type);
1102 case IWN_DID_2x30_1:
1103 case IWN_DID_2x30_2:
1104 switch(sc->subdevice_id) {
1105 case IWN_SDID_2x30_1:
1106 case IWN_SDID_2x30_3:
1107 case IWN_SDID_2x30_5:
1109 case IWN_SDID_2x30_2:
1110 case IWN_SDID_2x30_4:
1111 case IWN_SDID_2x30_6:
1113 sc->limits = &iwn2030_sensitivity_limits;
1114 sc->base_params = &iwn2030_base_params;
1115 sc->fwname = "iwn2030fw";
1118 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1119 "0x%04x rev %d not supported (subdevice)\n", pid,
1120 sc->subdevice_id,sc->hw_type);
1125 case IWN_DID_5x00_1:
1126 case IWN_DID_5x00_2:
1127 case IWN_DID_5x00_3:
1128 case IWN_DID_5x00_4:
1129 sc->limits = &iwn5000_sensitivity_limits;
1130 sc->base_params = &iwn5000_base_params;
1131 sc->fwname = "iwn5000fw";
1132 switch(sc->subdevice_id) {
1133 case IWN_SDID_5x00_1:
1134 case IWN_SDID_5x00_2:
1135 case IWN_SDID_5x00_3:
1136 case IWN_SDID_5x00_4:
1137 case IWN_SDID_5x00_9:
1138 case IWN_SDID_5x00_10:
1139 case IWN_SDID_5x00_11:
1140 case IWN_SDID_5x00_12:
1141 case IWN_SDID_5x00_17:
1142 case IWN_SDID_5x00_18:
1143 case IWN_SDID_5x00_19:
1144 case IWN_SDID_5x00_20:
1146 sc->txchainmask = IWN_ANT_B;
1147 sc->rxchainmask = IWN_ANT_AB;
1149 case IWN_SDID_5x00_5:
1150 case IWN_SDID_5x00_6:
1151 case IWN_SDID_5x00_13:
1152 case IWN_SDID_5x00_14:
1153 case IWN_SDID_5x00_21:
1154 case IWN_SDID_5x00_22:
1156 sc->txchainmask = IWN_ANT_B;
1157 sc->rxchainmask = IWN_ANT_AB;
1159 case IWN_SDID_5x00_7:
1160 case IWN_SDID_5x00_8:
1161 case IWN_SDID_5x00_15:
1162 case IWN_SDID_5x00_16:
1163 case IWN_SDID_5x00_23:
1164 case IWN_SDID_5x00_24:
1166 sc->txchainmask = IWN_ANT_B;
1167 sc->rxchainmask = IWN_ANT_AB;
1169 case IWN_SDID_5x00_25:
1170 case IWN_SDID_5x00_26:
1171 case IWN_SDID_5x00_27:
1172 case IWN_SDID_5x00_28:
1173 case IWN_SDID_5x00_29:
1174 case IWN_SDID_5x00_30:
1175 case IWN_SDID_5x00_31:
1176 case IWN_SDID_5x00_32:
1177 case IWN_SDID_5x00_33:
1178 case IWN_SDID_5x00_34:
1179 case IWN_SDID_5x00_35:
1180 case IWN_SDID_5x00_36:
1182 sc->txchainmask = IWN_ANT_ABC;
1183 sc->rxchainmask = IWN_ANT_ABC;
1186 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1187 "0x%04x rev %d not supported (subdevice)\n", pid,
1188 sc->subdevice_id,sc->hw_type);
1193 case IWN_DID_5x50_1:
1194 case IWN_DID_5x50_2:
1195 case IWN_DID_5x50_3:
1196 case IWN_DID_5x50_4:
1197 sc->limits = &iwn5000_sensitivity_limits;
1198 sc->base_params = &iwn5000_base_params;
1199 sc->fwname = "iwn5000fw";
1200 switch(sc->subdevice_id) {
1201 case IWN_SDID_5x50_1:
1202 case IWN_SDID_5x50_2:
1203 case IWN_SDID_5x50_3:
1205 sc->limits = &iwn5000_sensitivity_limits;
1206 sc->base_params = &iwn5000_base_params;
1207 sc->fwname = "iwn5000fw";
1209 case IWN_SDID_5x50_4:
1210 case IWN_SDID_5x50_5:
1211 case IWN_SDID_5x50_8:
1212 case IWN_SDID_5x50_9:
1213 case IWN_SDID_5x50_10:
1214 case IWN_SDID_5x50_11:
1216 case IWN_SDID_5x50_6:
1217 case IWN_SDID_5x50_7:
1218 case IWN_SDID_5x50_12:
1219 case IWN_SDID_5x50_13:
1221 sc->limits = &iwn5000_sensitivity_limits;
1222 sc->fwname = "iwn5150fw";
1223 sc->base_params = &iwn_5x50_base_params;
1226 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id :"
1227 "0x%04x rev %d not supported (subdevice)\n", pid,
1228 sc->subdevice_id,sc->hw_type);
1233 device_printf(sc->sc_dev, "adapter type id : 0x%04x sub id : 0x%04x"
1234 "rev 0x%08x not supported (device)\n", pid, sc->subdevice_id,
1242 iwn4965_attach(struct iwn_softc *sc, uint16_t pid)
1244 struct iwn_ops *ops = &sc->ops;
1246 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1247 ops->load_firmware = iwn4965_load_firmware;
1248 ops->read_eeprom = iwn4965_read_eeprom;
1249 ops->post_alive = iwn4965_post_alive;
1250 ops->nic_config = iwn4965_nic_config;
1251 ops->update_sched = iwn4965_update_sched;
1252 ops->get_temperature = iwn4965_get_temperature;
1253 ops->get_rssi = iwn4965_get_rssi;
1254 ops->set_txpower = iwn4965_set_txpower;
1255 ops->init_gains = iwn4965_init_gains;
1256 ops->set_gains = iwn4965_set_gains;
1257 ops->add_node = iwn4965_add_node;
1258 ops->tx_done = iwn4965_tx_done;
1259 ops->ampdu_tx_start = iwn4965_ampdu_tx_start;
1260 ops->ampdu_tx_stop = iwn4965_ampdu_tx_stop;
1261 sc->ntxqs = IWN4965_NTXQUEUES;
1262 sc->firstaggqueue = IWN4965_FIRSTAGGQUEUE;
1263 sc->ndmachnls = IWN4965_NDMACHNLS;
1264 sc->broadcast_id = IWN4965_ID_BROADCAST;
1265 sc->rxonsz = IWN4965_RXONSZ;
1266 sc->schedsz = IWN4965_SCHEDSZ;
1267 sc->fw_text_maxsz = IWN4965_FW_TEXT_MAXSZ;
1268 sc->fw_data_maxsz = IWN4965_FW_DATA_MAXSZ;
1269 sc->fwsz = IWN4965_FWSZ;
1270 sc->sched_txfact_addr = IWN4965_SCHED_TXFACT;
1271 sc->limits = &iwn4965_sensitivity_limits;
1272 sc->fwname = "iwn4965fw";
1273 /* Override chains masks, ROM is known to be broken. */
1274 sc->txchainmask = IWN_ANT_AB;
1275 sc->rxchainmask = IWN_ANT_ABC;
1276 /* Enable normal btcoex */
1277 sc->sc_flags |= IWN_FLAG_BTCOEX;
1279 DPRINTF(sc, IWN_DEBUG_TRACE, "%s: end\n",__func__);
1285 iwn5000_attach(struct iwn_softc *sc, uint16_t pid)
1287 struct iwn_ops *ops = &sc->ops;
1289 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1291 ops->load_firmware = iwn5000_load_firmware;
1292 ops->read_eeprom = iwn5000_read_eeprom;
1293 ops->post_alive = iwn5000_post_alive;
1294 ops->nic_config = iwn5000_nic_config;
1295 ops->update_sched = iwn5000_update_sched;
1296 ops->get_temperature = iwn5000_get_temperature;
1297 ops->get_rssi = iwn5000_get_rssi;
1298 ops->set_txpower = iwn5000_set_txpower;
1299 ops->init_gains = iwn5000_init_gains;
1300 ops->set_gains = iwn5000_set_gains;
1301 ops->add_node = iwn5000_add_node;
1302 ops->tx_done = iwn5000_tx_done;
1303 ops->ampdu_tx_start = iwn5000_ampdu_tx_start;
1304 ops->ampdu_tx_stop = iwn5000_ampdu_tx_stop;
1305 sc->ntxqs = IWN5000_NTXQUEUES;
1306 sc->firstaggqueue = IWN5000_FIRSTAGGQUEUE;
1307 sc->ndmachnls = IWN5000_NDMACHNLS;
1308 sc->broadcast_id = IWN5000_ID_BROADCAST;
1309 sc->rxonsz = IWN5000_RXONSZ;
1310 sc->schedsz = IWN5000_SCHEDSZ;
1311 sc->fw_text_maxsz = IWN5000_FW_TEXT_MAXSZ;
1312 sc->fw_data_maxsz = IWN5000_FW_DATA_MAXSZ;
1313 sc->fwsz = IWN5000_FWSZ;
1314 sc->sched_txfact_addr = IWN5000_SCHED_TXFACT;
1315 sc->reset_noise_gain = IWN5000_PHY_CALIB_RESET_NOISE_GAIN;
1316 sc->noise_gain = IWN5000_PHY_CALIB_NOISE_GAIN;
1322 * Attach the interface to 802.11 radiotap.
1325 iwn_radiotap_attach(struct iwn_softc *sc)
1327 struct ifnet *ifp = sc->sc_ifp;
1328 struct ieee80211com *ic = ifp->if_l2com;
1329 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1330 ieee80211_radiotap_attach(ic,
1331 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
1332 IWN_TX_RADIOTAP_PRESENT,
1333 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
1334 IWN_RX_RADIOTAP_PRESENT);
1335 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
1339 iwn_sysctlattach(struct iwn_softc *sc)
1342 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev);
1343 struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev);
1345 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
1346 "debug", CTLFLAG_RW, &sc->sc_debug, sc->sc_debug,
1347 "control debugging printfs");
1351 static struct ieee80211vap *
1352 iwn_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
1353 enum ieee80211_opmode opmode, int flags,
1354 const uint8_t bssid[IEEE80211_ADDR_LEN],
1355 const uint8_t mac[IEEE80211_ADDR_LEN])
1357 struct iwn_vap *ivp;
1358 struct ieee80211vap *vap;
1359 uint8_t mac1[IEEE80211_ADDR_LEN];
1360 struct iwn_softc *sc = ic->ic_ifp->if_softc;
1362 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */
1365 IEEE80211_ADDR_COPY(mac1, mac);
1367 ivp = kmalloc(sizeof(struct iwn_vap), M_80211_VAP, M_INTWAIT | M_ZERO);
1371 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac1);
1372 ivp->ctx = IWN_RXON_BSS_CTX;
1373 IEEE80211_ADDR_COPY(ivp->macaddr, mac1);
1374 vap->iv_bmissthreshold = 10; /* override default */
1375 /* Override with driver methods. */
1376 ivp->iv_newstate = vap->iv_newstate;
1377 vap->iv_newstate = iwn_newstate;
1378 sc->ivap[IWN_RXON_BSS_CTX] = vap;
1380 ieee80211_ratectl_init(vap);
1381 /* Complete setup. */
1382 ieee80211_vap_attach(vap, iwn_media_change, ieee80211_media_status);
1383 ic->ic_opmode = opmode;
1388 iwn_vap_delete(struct ieee80211vap *vap)
1390 struct iwn_vap *ivp = IWN_VAP(vap);
1392 ieee80211_ratectl_deinit(vap);
1393 ieee80211_vap_detach(vap);
1394 kfree(ivp, M_80211_VAP);
1398 iwn_detach(device_t dev)
1400 struct iwn_softc *sc = device_get_softc(dev);
1401 struct ifnet *ifp = sc->sc_ifp;
1402 struct ieee80211com *ic;
1405 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1410 ieee80211_draintask(ic, &sc->sc_reinit_task);
1411 ieee80211_draintask(ic, &sc->sc_radioon_task);
1412 ieee80211_draintask(ic, &sc->sc_radiooff_task);
1416 #if defined(__DragonFly__)
1417 /* doesn't exist for DFly, DFly drains tasks on free */
1419 taskqueue_drain_all(sc->sc_tq);
1421 taskqueue_free(sc->sc_tq);
1423 callout_drain(&sc->watchdog_to);
1424 callout_drain(&sc->calib_to);
1425 wlan_serialize_enter();
1426 ieee80211_ifdetach(ic);
1427 wlan_serialize_exit();
1430 /* Uninstall interrupt handler. */
1431 if (sc->irq != NULL) {
1432 bus_teardown_intr(dev, sc->irq, sc->sc_ih);
1433 bus_release_resource(dev, SYS_RES_IRQ, rman_get_rid(sc->irq),
1435 pci_release_msi(dev);
1438 /* Free DMA resources. */
1439 iwn_free_rx_ring(sc, &sc->rxq);
1440 for (qid = 0; qid < sc->ntxqs; qid++)
1441 iwn_free_tx_ring(sc, &sc->txq[qid]);
1444 if (sc->ict != NULL)
1448 if (sc->mem != NULL)
1449 bus_release_resource(dev, SYS_RES_MEMORY,
1450 rman_get_rid(sc->mem), sc->mem);
1455 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n", __func__);
1456 IWN_LOCK_DESTROY(sc);
1461 iwn_shutdown(device_t dev)
1463 struct iwn_softc *sc = device_get_softc(dev);
1470 iwn_suspend(device_t dev)
1472 struct iwn_softc *sc = device_get_softc(dev);
1473 struct ieee80211com *ic = sc->sc_ifp->if_l2com;
1475 ieee80211_suspend_all(ic);
1480 iwn_resume(device_t dev)
1482 struct iwn_softc *sc = device_get_softc(dev);
1483 struct ieee80211com *ic = sc->sc_ifp->if_l2com;
1485 /* Clear device-specific "PCI retry timeout" register (41h). */
1486 pci_write_config(dev, 0x41, 0, 1);
1488 ieee80211_resume_all(ic);
1493 iwn_nic_lock(struct iwn_softc *sc)
1497 /* Request exclusive access to NIC. */
1498 IWN_SETBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_MAC_ACCESS_REQ);
1500 /* Spin until we actually get the lock. */
1501 for (ntries = 0; ntries < 1000; ntries++) {
1502 if ((IWN_READ(sc, IWN_GP_CNTRL) &
1503 (IWN_GP_CNTRL_MAC_ACCESS_ENA | IWN_GP_CNTRL_SLEEP)) ==
1504 IWN_GP_CNTRL_MAC_ACCESS_ENA)
1511 static __inline void
1512 iwn_nic_unlock(struct iwn_softc *sc)
1514 IWN_CLRBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_MAC_ACCESS_REQ);
1517 static __inline uint32_t
1518 iwn_prph_read(struct iwn_softc *sc, uint32_t addr)
1520 IWN_WRITE(sc, IWN_PRPH_RADDR, IWN_PRPH_DWORD | addr);
1521 IWN_BARRIER_READ_WRITE(sc);
1522 return IWN_READ(sc, IWN_PRPH_RDATA);
1525 static __inline void
1526 iwn_prph_write(struct iwn_softc *sc, uint32_t addr, uint32_t data)
1528 IWN_WRITE(sc, IWN_PRPH_WADDR, IWN_PRPH_DWORD | addr);
1529 IWN_BARRIER_WRITE(sc);
1530 IWN_WRITE(sc, IWN_PRPH_WDATA, data);
1533 static __inline void
1534 iwn_prph_setbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask)
1536 iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) | mask);
1539 static __inline void
1540 iwn_prph_clrbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask)
1542 iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) & ~mask);
1545 static __inline void
1546 iwn_prph_write_region_4(struct iwn_softc *sc, uint32_t addr,
1547 const uint32_t *data, int count)
1549 for (; count > 0; count--, data++, addr += 4)
1550 iwn_prph_write(sc, addr, *data);
1553 static __inline uint32_t
1554 iwn_mem_read(struct iwn_softc *sc, uint32_t addr)
1556 IWN_WRITE(sc, IWN_MEM_RADDR, addr);
1557 IWN_BARRIER_READ_WRITE(sc);
1558 return IWN_READ(sc, IWN_MEM_RDATA);
1561 static __inline void
1562 iwn_mem_write(struct iwn_softc *sc, uint32_t addr, uint32_t data)
1564 IWN_WRITE(sc, IWN_MEM_WADDR, addr);
1565 IWN_BARRIER_WRITE(sc);
1566 IWN_WRITE(sc, IWN_MEM_WDATA, data);
1569 static __inline void
1570 iwn_mem_write_2(struct iwn_softc *sc, uint32_t addr, uint16_t data)
1574 tmp = iwn_mem_read(sc, addr & ~3);
1576 tmp = (tmp & 0x0000ffff) | data << 16;
1578 tmp = (tmp & 0xffff0000) | data;
1579 iwn_mem_write(sc, addr & ~3, tmp);
1582 static __inline void
1583 iwn_mem_read_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t *data,
1586 for (; count > 0; count--, addr += 4)
1587 *data++ = iwn_mem_read(sc, addr);
1590 static __inline void
1591 iwn_mem_set_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t val,
1594 for (; count > 0; count--, addr += 4)
1595 iwn_mem_write(sc, addr, val);
1599 iwn_eeprom_lock(struct iwn_softc *sc)
1603 for (i = 0; i < 100; i++) {
1604 /* Request exclusive access to EEPROM. */
1605 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
1606 IWN_HW_IF_CONFIG_EEPROM_LOCKED);
1608 /* Spin until we actually get the lock. */
1609 for (ntries = 0; ntries < 100; ntries++) {
1610 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
1611 IWN_HW_IF_CONFIG_EEPROM_LOCKED)
1616 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end timeout\n", __func__);
1620 static __inline void
1621 iwn_eeprom_unlock(struct iwn_softc *sc)
1623 IWN_CLRBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_EEPROM_LOCKED);
1627 * Initialize access by host to One Time Programmable ROM.
1628 * NB: This kind of ROM can be found on 1000 or 6000 Series only.
1631 iwn_init_otprom(struct iwn_softc *sc)
1633 uint16_t prev, base, next;
1636 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1638 /* Wait for clock stabilization before accessing prph. */
1639 if ((error = iwn_clock_wait(sc)) != 0)
1642 if ((error = iwn_nic_lock(sc)) != 0)
1644 iwn_prph_setbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ);
1646 iwn_prph_clrbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ);
1649 /* Set auto clock gate disable bit for HW with OTP shadow RAM. */
1650 if (sc->base_params->shadow_ram_support) {
1651 IWN_SETBITS(sc, IWN_DBG_LINK_PWR_MGMT,
1652 IWN_RESET_LINK_PWR_MGMT_DIS);
1654 IWN_CLRBITS(sc, IWN_EEPROM_GP, IWN_EEPROM_GP_IF_OWNER);
1655 /* Clear ECC status. */
1656 IWN_SETBITS(sc, IWN_OTP_GP,
1657 IWN_OTP_GP_ECC_CORR_STTS | IWN_OTP_GP_ECC_UNCORR_STTS);
1660 * Find the block before last block (contains the EEPROM image)
1661 * for HW without OTP shadow RAM.
1663 if (! sc->base_params->shadow_ram_support) {
1664 /* Switch to absolute addressing mode. */
1665 IWN_CLRBITS(sc, IWN_OTP_GP, IWN_OTP_GP_RELATIVE_ACCESS);
1667 for (count = 0; count < sc->base_params->max_ll_items;
1669 error = iwn_read_prom_data(sc, base, &next, 2);
1672 if (next == 0) /* End of linked-list. */
1675 base = le16toh(next);
1677 if (count == 0 || count == sc->base_params->max_ll_items)
1679 /* Skip "next" word. */
1680 sc->prom_base = prev + 1;
1683 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
1689 iwn_read_prom_data(struct iwn_softc *sc, uint32_t addr, void *data, int count)
1691 uint8_t *out = data;
1695 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1697 addr += sc->prom_base;
1698 for (; count > 0; count -= 2, addr++) {
1699 IWN_WRITE(sc, IWN_EEPROM, addr << 2);
1700 for (ntries = 0; ntries < 10; ntries++) {
1701 val = IWN_READ(sc, IWN_EEPROM);
1702 if (val & IWN_EEPROM_READ_VALID)
1707 device_printf(sc->sc_dev,
1708 "timeout reading ROM at 0x%x\n", addr);
1711 if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) {
1712 /* OTPROM, check for ECC errors. */
1713 tmp = IWN_READ(sc, IWN_OTP_GP);
1714 if (tmp & IWN_OTP_GP_ECC_UNCORR_STTS) {
1715 device_printf(sc->sc_dev,
1716 "OTPROM ECC error at 0x%x\n", addr);
1719 if (tmp & IWN_OTP_GP_ECC_CORR_STTS) {
1720 /* Correctable ECC error, clear bit. */
1721 IWN_SETBITS(sc, IWN_OTP_GP,
1722 IWN_OTP_GP_ECC_CORR_STTS);
1730 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
1736 iwn_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
1740 KASSERT(nsegs == 1, ("too many DMA segments, %d should be 1", nsegs));
1741 *(bus_addr_t *)arg = segs[0].ds_addr;
1745 iwn_dma_contig_alloc(struct iwn_softc *sc, struct iwn_dma_info *dma,
1746 void **kvap, bus_size_t size, bus_size_t alignment)
1753 #if defined(__DragonFly__)
1754 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), alignment,
1756 BUS_SPACE_MAXADDR_32BIT,
1760 BUS_DMA_NOWAIT, &dma->tag);
1762 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), alignment,
1763 0, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, size,
1764 1, size, BUS_DMA_NOWAIT, NULL, NULL, &dma->tag);
1769 error = bus_dmamem_alloc(dma->tag, (void **)&dma->vaddr,
1770 BUS_DMA_NOWAIT | BUS_DMA_ZERO | BUS_DMA_COHERENT, &dma->map);
1774 error = bus_dmamap_load(dma->tag, dma->map, dma->vaddr, size,
1775 iwn_dma_map_addr, &dma->paddr, BUS_DMA_NOWAIT);
1779 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
1786 fail: iwn_dma_contig_free(dma);
1791 iwn_dma_contig_free(struct iwn_dma_info *dma)
1793 if (dma->vaddr != NULL) {
1794 bus_dmamap_sync(dma->tag, dma->map,
1795 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1796 bus_dmamap_unload(dma->tag, dma->map);
1797 bus_dmamem_free(dma->tag, dma->vaddr, dma->map);
1800 if (dma->tag != NULL) {
1801 bus_dma_tag_destroy(dma->tag);
1807 iwn_alloc_sched(struct iwn_softc *sc)
1809 /* TX scheduler rings must be aligned on a 1KB boundary. */
1810 return iwn_dma_contig_alloc(sc, &sc->sched_dma, (void **)&sc->sched,
1815 iwn_free_sched(struct iwn_softc *sc)
1817 iwn_dma_contig_free(&sc->sched_dma);
1821 iwn_alloc_kw(struct iwn_softc *sc)
1823 /* "Keep Warm" page must be aligned on a 4KB boundary. */
1824 return iwn_dma_contig_alloc(sc, &sc->kw_dma, NULL, 4096, 4096);
1828 iwn_free_kw(struct iwn_softc *sc)
1830 iwn_dma_contig_free(&sc->kw_dma);
1834 iwn_alloc_ict(struct iwn_softc *sc)
1836 /* ICT table must be aligned on a 4KB boundary. */
1837 return iwn_dma_contig_alloc(sc, &sc->ict_dma, (void **)&sc->ict,
1838 IWN_ICT_SIZE, 4096);
1842 iwn_free_ict(struct iwn_softc *sc)
1844 iwn_dma_contig_free(&sc->ict_dma);
1848 iwn_alloc_fwmem(struct iwn_softc *sc)
1850 /* Must be aligned on a 16-byte boundary. */
1851 return iwn_dma_contig_alloc(sc, &sc->fw_dma, NULL, sc->fwsz, 16);
1855 iwn_free_fwmem(struct iwn_softc *sc)
1857 iwn_dma_contig_free(&sc->fw_dma);
1861 iwn_alloc_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1868 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
1870 /* Allocate RX descriptors (256-byte aligned). */
1871 size = IWN_RX_RING_COUNT * sizeof (uint32_t);
1872 error = iwn_dma_contig_alloc(sc, &ring->desc_dma, (void **)&ring->desc,
1875 device_printf(sc->sc_dev,
1876 "%s: could not allocate RX ring DMA memory, error %d\n",
1881 /* Allocate RX status area (16-byte aligned). */
1882 error = iwn_dma_contig_alloc(sc, &ring->stat_dma, (void **)&ring->stat,
1883 sizeof (struct iwn_rx_status), 16);
1885 device_printf(sc->sc_dev,
1886 "%s: could not allocate RX status DMA memory, error %d\n",
1891 /* Create RX buffer DMA tag. */
1892 #if defined(__DragonFly__)
1893 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1,
1895 BUS_SPACE_MAXADDR_32BIT,
1898 IWN_RBUF_SIZE, 1, IWN_RBUF_SIZE,
1899 BUS_DMA_NOWAIT, &ring->data_dmat);
1901 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
1902 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
1903 IWN_RBUF_SIZE, 1, IWN_RBUF_SIZE, BUS_DMA_NOWAIT, NULL, NULL,
1907 device_printf(sc->sc_dev,
1908 "%s: could not create RX buf DMA tag, error %d\n",
1914 * Allocate and map RX buffers.
1916 for (i = 0; i < IWN_RX_RING_COUNT; i++) {
1917 struct iwn_rx_data *data = &ring->data[i];
1920 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
1922 device_printf(sc->sc_dev,
1923 "%s: could not create RX buf DMA map, error %d\n",
1928 data->m = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR,
1930 if (data->m == NULL) {
1931 device_printf(sc->sc_dev,
1932 "%s: could not allocate RX mbuf\n", __func__);
1937 error = bus_dmamap_load(ring->data_dmat, data->map,
1938 mtod(data->m, void *), IWN_RBUF_SIZE, iwn_dma_map_addr,
1939 &paddr, BUS_DMA_NOWAIT);
1940 if (error != 0 && error != EFBIG) {
1941 device_printf(sc->sc_dev,
1942 "%s: can't not map mbuf, error %d\n", __func__,
1947 /* Set physical address of RX buffer (256-byte aligned). */
1948 ring->desc[i] = htole32(paddr >> 8);
1951 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
1952 BUS_DMASYNC_PREWRITE);
1954 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
1958 fail: iwn_free_rx_ring(sc, ring);
1960 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__);
1966 iwn_reset_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1970 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
1972 if (iwn_nic_lock(sc) == 0) {
1973 IWN_WRITE(sc, IWN_FH_RX_CONFIG, 0);
1974 for (ntries = 0; ntries < 1000; ntries++) {
1975 if (IWN_READ(sc, IWN_FH_RX_STATUS) &
1976 IWN_FH_RX_STATUS_IDLE)
1983 sc->last_rx_valid = 0;
1987 iwn_free_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1991 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s \n", __func__);
1993 iwn_dma_contig_free(&ring->desc_dma);
1994 iwn_dma_contig_free(&ring->stat_dma);
1996 for (i = 0; i < IWN_RX_RING_COUNT; i++) {
1997 struct iwn_rx_data *data = &ring->data[i];
1999 if (data->m != NULL) {
2000 bus_dmamap_sync(ring->data_dmat, data->map,
2001 BUS_DMASYNC_POSTREAD);
2002 bus_dmamap_unload(ring->data_dmat, data->map);
2006 if (data->map != NULL)
2007 bus_dmamap_destroy(ring->data_dmat, data->map);
2009 if (ring->data_dmat != NULL) {
2010 bus_dma_tag_destroy(ring->data_dmat);
2011 ring->data_dmat = NULL;
2016 iwn_alloc_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring, int qid)
2026 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2028 /* Allocate TX descriptors (256-byte aligned). */
2029 size = IWN_TX_RING_COUNT * sizeof (struct iwn_tx_desc);
2030 error = iwn_dma_contig_alloc(sc, &ring->desc_dma, (void **)&ring->desc,
2033 device_printf(sc->sc_dev,
2034 "%s: could not allocate TX ring DMA memory, error %d\n",
2039 size = IWN_TX_RING_COUNT * sizeof (struct iwn_tx_cmd);
2040 error = iwn_dma_contig_alloc(sc, &ring->cmd_dma, (void **)&ring->cmd,
2043 device_printf(sc->sc_dev,
2044 "%s: could not allocate TX cmd DMA memory, error %d\n",
2049 #if defined(__DragonFly__)
2050 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1,
2052 BUS_SPACE_MAXADDR_32BIT,
2055 MCLBYTES, IWN_MAX_SCATTER - 1, MCLBYTES,
2056 BUS_DMA_NOWAIT, &ring->data_dmat);
2058 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
2059 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES,
2060 IWN_MAX_SCATTER - 1, MCLBYTES, BUS_DMA_NOWAIT, NULL, NULL,
2064 device_printf(sc->sc_dev,
2065 "%s: could not create TX buf DMA tag, error %d\n",
2070 paddr = ring->cmd_dma.paddr;
2071 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
2072 struct iwn_tx_data *data = &ring->data[i];
2074 data->cmd_paddr = paddr;
2075 data->scratch_paddr = paddr + 12;
2076 paddr += sizeof (struct iwn_tx_cmd);
2078 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
2080 device_printf(sc->sc_dev,
2081 "%s: could not create TX buf DMA map, error %d\n",
2087 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2091 fail: iwn_free_tx_ring(sc, ring);
2092 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__);
2097 iwn_reset_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
2101 DPRINTF(sc, IWN_DEBUG_TRACE, "->doing %s \n", __func__);
2103 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
2104 struct iwn_tx_data *data = &ring->data[i];
2106 if (data->m != NULL) {
2107 bus_dmamap_sync(ring->data_dmat, data->map,
2108 BUS_DMASYNC_POSTWRITE);
2109 bus_dmamap_unload(ring->data_dmat, data->map);
2114 /* Clear TX descriptors. */
2115 memset(ring->desc, 0, ring->desc_dma.size);
2116 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
2117 BUS_DMASYNC_PREWRITE);
2118 sc->qfullmsk &= ~(1 << ring->qid);
2124 iwn_free_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
2128 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s \n", __func__);
2130 iwn_dma_contig_free(&ring->desc_dma);
2131 iwn_dma_contig_free(&ring->cmd_dma);
2133 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
2134 struct iwn_tx_data *data = &ring->data[i];
2136 if (data->m != NULL) {
2137 bus_dmamap_sync(ring->data_dmat, data->map,
2138 BUS_DMASYNC_POSTWRITE);
2139 bus_dmamap_unload(ring->data_dmat, data->map);
2142 if (data->map != NULL)
2143 bus_dmamap_destroy(ring->data_dmat, data->map);
2145 if (ring->data_dmat != NULL) {
2146 bus_dma_tag_destroy(ring->data_dmat);
2147 ring->data_dmat = NULL;
2152 iwn5000_ict_reset(struct iwn_softc *sc)
2154 /* Disable interrupts. */
2155 IWN_WRITE(sc, IWN_INT_MASK, 0);
2157 /* Reset ICT table. */
2158 memset(sc->ict, 0, IWN_ICT_SIZE);
2161 /* Set physical address of ICT table (4KB aligned). */
2162 DPRINTF(sc, IWN_DEBUG_RESET, "%s: enabling ICT\n", __func__);
2163 IWN_WRITE(sc, IWN_DRAM_INT_TBL, IWN_DRAM_INT_TBL_ENABLE |
2164 IWN_DRAM_INT_TBL_WRAP_CHECK | sc->ict_dma.paddr >> 12);
2166 /* Enable periodic RX interrupt. */
2167 sc->int_mask |= IWN_INT_RX_PERIODIC;
2168 /* Switch to ICT interrupt mode in driver. */
2169 sc->sc_flags |= IWN_FLAG_USE_ICT;
2171 /* Re-enable interrupts. */
2172 IWN_WRITE(sc, IWN_INT, 0xffffffff);
2173 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
2177 iwn_read_eeprom(struct iwn_softc *sc, uint8_t macaddr[IEEE80211_ADDR_LEN])
2179 struct iwn_ops *ops = &sc->ops;
2183 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2185 /* Check whether adapter has an EEPROM or an OTPROM. */
2186 if (sc->hw_type >= IWN_HW_REV_TYPE_1000 &&
2187 (IWN_READ(sc, IWN_OTP_GP) & IWN_OTP_GP_DEV_SEL_OTP))
2188 sc->sc_flags |= IWN_FLAG_HAS_OTPROM;
2189 DPRINTF(sc, IWN_DEBUG_RESET, "%s found\n",
2190 (sc->sc_flags & IWN_FLAG_HAS_OTPROM) ? "OTPROM" : "EEPROM");
2192 /* Adapter has to be powered on for EEPROM access to work. */
2193 if ((error = iwn_apm_init(sc)) != 0) {
2194 device_printf(sc->sc_dev,
2195 "%s: could not power ON adapter, error %d\n", __func__,
2200 if ((IWN_READ(sc, IWN_EEPROM_GP) & 0x7) == 0) {
2201 device_printf(sc->sc_dev, "%s: bad ROM signature\n", __func__);
2204 if ((error = iwn_eeprom_lock(sc)) != 0) {
2205 device_printf(sc->sc_dev, "%s: could not lock ROM, error %d\n",
2209 if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) {
2210 if ((error = iwn_init_otprom(sc)) != 0) {
2211 device_printf(sc->sc_dev,
2212 "%s: could not initialize OTPROM, error %d\n",
2218 iwn_read_prom_data(sc, IWN_EEPROM_SKU_CAP, &val, 2);
2219 DPRINTF(sc, IWN_DEBUG_RESET, "SKU capabilities=0x%04x\n", le16toh(val));
2220 /* Check if HT support is bonded out. */
2221 if (val & htole16(IWN_EEPROM_SKU_CAP_11N))
2222 sc->sc_flags |= IWN_FLAG_HAS_11N;
2224 iwn_read_prom_data(sc, IWN_EEPROM_RFCFG, &val, 2);
2225 sc->rfcfg = le16toh(val);
2226 DPRINTF(sc, IWN_DEBUG_RESET, "radio config=0x%04x\n", sc->rfcfg);
2227 /* Read Tx/Rx chains from ROM unless it's known to be broken. */
2228 if (sc->txchainmask == 0)
2229 sc->txchainmask = IWN_RFCFG_TXANTMSK(sc->rfcfg);
2230 if (sc->rxchainmask == 0)
2231 sc->rxchainmask = IWN_RFCFG_RXANTMSK(sc->rfcfg);
2233 /* Read MAC address. */
2234 iwn_read_prom_data(sc, IWN_EEPROM_MAC, macaddr, 6);
2236 /* Read adapter-specific information from EEPROM. */
2237 ops->read_eeprom(sc);
2239 iwn_apm_stop(sc); /* Power OFF adapter. */
2241 iwn_eeprom_unlock(sc);
2243 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2249 iwn4965_read_eeprom(struct iwn_softc *sc)
2255 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2257 /* Read regulatory domain (4 ASCII characters). */
2258 iwn_read_prom_data(sc, IWN4965_EEPROM_DOMAIN, sc->eeprom_domain, 4);
2260 /* Read the list of authorized channels (20MHz ones only). */
2261 for (i = 0; i < IWN_NBANDS - 1; i++) {
2262 addr = iwn4965_regulatory_bands[i];
2263 iwn_read_eeprom_channels(sc, i, addr);
2266 /* Read maximum allowed TX power for 2GHz and 5GHz bands. */
2267 iwn_read_prom_data(sc, IWN4965_EEPROM_MAXPOW, &val, 2);
2268 sc->maxpwr2GHz = val & 0xff;
2269 sc->maxpwr5GHz = val >> 8;
2270 /* Check that EEPROM values are within valid range. */
2271 if (sc->maxpwr5GHz < 20 || sc->maxpwr5GHz > 50)
2272 sc->maxpwr5GHz = 38;
2273 if (sc->maxpwr2GHz < 20 || sc->maxpwr2GHz > 50)
2274 sc->maxpwr2GHz = 38;
2275 DPRINTF(sc, IWN_DEBUG_RESET, "maxpwr 2GHz=%d 5GHz=%d\n",
2276 sc->maxpwr2GHz, sc->maxpwr5GHz);
2278 /* Read samples for each TX power group. */
2279 iwn_read_prom_data(sc, IWN4965_EEPROM_BANDS, sc->bands,
2282 /* Read voltage at which samples were taken. */
2283 iwn_read_prom_data(sc, IWN4965_EEPROM_VOLTAGE, &val, 2);
2284 sc->eeprom_voltage = (int16_t)le16toh(val);
2285 DPRINTF(sc, IWN_DEBUG_RESET, "voltage=%d (in 0.3V)\n",
2286 sc->eeprom_voltage);
2289 /* Print samples. */
2290 if (sc->sc_debug & IWN_DEBUG_ANY) {
2291 for (i = 0; i < IWN_NBANDS - 1; i++)
2292 iwn4965_print_power_group(sc, i);
2296 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2301 iwn4965_print_power_group(struct iwn_softc *sc, int i)
2303 struct iwn4965_eeprom_band *band = &sc->bands[i];
2304 struct iwn4965_eeprom_chan_samples *chans = band->chans;
2307 kprintf("===band %d===\n", i);
2308 kprintf("chan lo=%d, chan hi=%d\n", band->lo, band->hi);
2309 kprintf("chan1 num=%d\n", chans[0].num);
2310 for (c = 0; c < 2; c++) {
2311 for (j = 0; j < IWN_NSAMPLES; j++) {
2312 kprintf("chain %d, sample %d: temp=%d gain=%d "
2313 "power=%d pa_det=%d\n", c, j,
2314 chans[0].samples[c][j].temp,
2315 chans[0].samples[c][j].gain,
2316 chans[0].samples[c][j].power,
2317 chans[0].samples[c][j].pa_det);
2320 kprintf("chan2 num=%d\n", chans[1].num);
2321 for (c = 0; c < 2; c++) {
2322 for (j = 0; j < IWN_NSAMPLES; j++) {
2323 kprintf("chain %d, sample %d: temp=%d gain=%d "
2324 "power=%d pa_det=%d\n", c, j,
2325 chans[1].samples[c][j].temp,
2326 chans[1].samples[c][j].gain,
2327 chans[1].samples[c][j].power,
2328 chans[1].samples[c][j].pa_det);
2335 iwn5000_read_eeprom(struct iwn_softc *sc)
2337 struct iwn5000_eeprom_calib_hdr hdr;
2339 uint32_t base, addr;
2343 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2345 /* Read regulatory domain (4 ASCII characters). */
2346 iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);
2347 base = le16toh(val);
2348 iwn_read_prom_data(sc, base + IWN5000_EEPROM_DOMAIN,
2349 sc->eeprom_domain, 4);
2351 /* Read the list of authorized channels (20MHz ones only). */
2352 for (i = 0; i < IWN_NBANDS - 1; i++) {
2353 addr = base + sc->base_params->regulatory_bands[i];
2354 iwn_read_eeprom_channels(sc, i, addr);
2357 /* Read enhanced TX power information for 6000 Series. */
2358 if (sc->base_params->enhanced_TX_power)
2359 iwn_read_eeprom_enhinfo(sc);
2361 iwn_read_prom_data(sc, IWN5000_EEPROM_CAL, &val, 2);
2362 base = le16toh(val);
2363 iwn_read_prom_data(sc, base, &hdr, sizeof hdr);
2364 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
2365 "%s: calib version=%u pa type=%u voltage=%u\n", __func__,
2366 hdr.version, hdr.pa_type, le16toh(hdr.volt));
2367 sc->calib_ver = hdr.version;
2369 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2) {
2370 sc->eeprom_voltage = le16toh(hdr.volt);
2371 iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);
2372 sc->eeprom_temp_high=le16toh(val);
2373 iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2);
2374 sc->eeprom_temp = le16toh(val);
2377 if (sc->hw_type == IWN_HW_REV_TYPE_5150) {
2378 /* Compute temperature offset. */
2379 iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);
2380 sc->eeprom_temp = le16toh(val);
2381 iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2);
2382 volt = le16toh(val);
2383 sc->temp_off = sc->eeprom_temp - (volt / -5);
2384 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "temp=%d volt=%d offset=%dK\n",
2385 sc->eeprom_temp, volt, sc->temp_off);
2387 /* Read crystal calibration. */
2388 iwn_read_prom_data(sc, base + IWN5000_EEPROM_CRYSTAL,
2389 &sc->eeprom_crystal, sizeof (uint32_t));
2390 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "crystal calibration 0x%08x\n",
2391 le32toh(sc->eeprom_crystal));
2394 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2399 * Translate EEPROM flags to net80211.
2402 iwn_eeprom_channel_flags(struct iwn_eeprom_chan *channel)
2407 if ((channel->flags & IWN_EEPROM_CHAN_ACTIVE) == 0)
2408 nflags |= IEEE80211_CHAN_PASSIVE;
2409 if ((channel->flags & IWN_EEPROM_CHAN_IBSS) == 0)
2410 nflags |= IEEE80211_CHAN_NOADHOC;
2411 if (channel->flags & IWN_EEPROM_CHAN_RADAR) {
2412 nflags |= IEEE80211_CHAN_DFS;
2413 /* XXX apparently IBSS may still be marked */
2414 nflags |= IEEE80211_CHAN_NOADHOC;
2421 iwn_read_eeprom_band(struct iwn_softc *sc, int n)
2423 struct ifnet *ifp = sc->sc_ifp;
2424 struct ieee80211com *ic = ifp->if_l2com;
2425 struct iwn_eeprom_chan *channels = sc->eeprom_channels[n];
2426 const struct iwn_chan_band *band = &iwn_bands[n];
2427 struct ieee80211_channel *c;
2431 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2433 for (i = 0; i < band->nchan; i++) {
2434 if (!(channels[i].flags & IWN_EEPROM_CHAN_VALID)) {
2435 DPRINTF(sc, IWN_DEBUG_RESET,
2436 "skip chan %d flags 0x%x maxpwr %d\n",
2437 band->chan[i], channels[i].flags,
2438 channels[i].maxpwr);
2441 chan = band->chan[i];
2442 nflags = iwn_eeprom_channel_flags(&channels[i]);
2444 c = &ic->ic_channels[ic->ic_nchans++];
2446 c->ic_maxregpower = channels[i].maxpwr;
2447 c->ic_maxpower = 2*c->ic_maxregpower;
2449 if (n == 0) { /* 2GHz band */
2450 c->ic_freq = ieee80211_ieee2mhz(chan, IEEE80211_CHAN_G);
2451 /* G =>'s B is supported */
2452 c->ic_flags = IEEE80211_CHAN_B | nflags;
2453 c = &ic->ic_channels[ic->ic_nchans++];
2455 c->ic_flags = IEEE80211_CHAN_G | nflags;
2456 } else { /* 5GHz band */
2457 c->ic_freq = ieee80211_ieee2mhz(chan, IEEE80211_CHAN_A);
2458 c->ic_flags = IEEE80211_CHAN_A | nflags;
2461 /* Save maximum allowed TX power for this channel. */
2462 sc->maxpwr[chan] = channels[i].maxpwr;
2464 DPRINTF(sc, IWN_DEBUG_RESET,
2465 "add chan %d flags 0x%x maxpwr %d\n", chan,
2466 channels[i].flags, channels[i].maxpwr);
2468 if (sc->sc_flags & IWN_FLAG_HAS_11N) {
2469 /* add HT20, HT40 added separately */
2470 c = &ic->ic_channels[ic->ic_nchans++];
2472 c->ic_flags |= IEEE80211_CHAN_HT20;
2476 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2481 iwn_read_eeprom_ht40(struct iwn_softc *sc, int n)
2483 struct ifnet *ifp = sc->sc_ifp;
2484 struct ieee80211com *ic = ifp->if_l2com;
2485 struct iwn_eeprom_chan *channels = sc->eeprom_channels[n];
2486 const struct iwn_chan_band *band = &iwn_bands[n];
2487 struct ieee80211_channel *c, *cent, *extc;
2491 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s start\n", __func__);
2493 if (!(sc->sc_flags & IWN_FLAG_HAS_11N)) {
2494 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end no 11n\n", __func__);
2498 for (i = 0; i < band->nchan; i++) {
2499 if (!(channels[i].flags & IWN_EEPROM_CHAN_VALID)) {
2500 DPRINTF(sc, IWN_DEBUG_RESET,
2501 "skip chan %d flags 0x%x maxpwr %d\n",
2502 band->chan[i], channels[i].flags,
2503 channels[i].maxpwr);
2506 chan = band->chan[i];
2507 nflags = iwn_eeprom_channel_flags(&channels[i]);
2510 * Each entry defines an HT40 channel pair; find the
2511 * center channel, then the extension channel above.
2513 cent = ieee80211_find_channel_byieee(ic, chan,
2514 (n == 5 ? IEEE80211_CHAN_G : IEEE80211_CHAN_A));
2515 if (cent == NULL) { /* XXX shouldn't happen */
2516 device_printf(sc->sc_dev,
2517 "%s: no entry for channel %d\n", __func__, chan);
2520 extc = ieee80211_find_channel(ic, cent->ic_freq+20,
2521 (n == 5 ? IEEE80211_CHAN_G : IEEE80211_CHAN_A));
2523 DPRINTF(sc, IWN_DEBUG_RESET,
2524 "%s: skip chan %d, extension channel not found\n",
2529 DPRINTF(sc, IWN_DEBUG_RESET,
2530 "add ht40 chan %d flags 0x%x maxpwr %d\n",
2531 chan, channels[i].flags, channels[i].maxpwr);
2533 c = &ic->ic_channels[ic->ic_nchans++];
2535 c->ic_extieee = extc->ic_ieee;
2536 c->ic_flags &= ~IEEE80211_CHAN_HT;
2537 c->ic_flags |= IEEE80211_CHAN_HT40U | nflags;
2538 c = &ic->ic_channels[ic->ic_nchans++];
2540 c->ic_extieee = cent->ic_ieee;
2541 c->ic_flags &= ~IEEE80211_CHAN_HT;
2542 c->ic_flags |= IEEE80211_CHAN_HT40D | nflags;
2545 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2550 iwn_read_eeprom_channels(struct iwn_softc *sc, int n, uint32_t addr)
2552 struct ifnet *ifp = sc->sc_ifp;
2553 struct ieee80211com *ic = ifp->if_l2com;
2555 iwn_read_prom_data(sc, addr, &sc->eeprom_channels[n],
2556 iwn_bands[n].nchan * sizeof (struct iwn_eeprom_chan));
2559 iwn_read_eeprom_band(sc, n);
2561 iwn_read_eeprom_ht40(sc, n);
2562 ieee80211_sort_channels(ic->ic_channels, ic->ic_nchans);
2565 static struct iwn_eeprom_chan *
2566 iwn_find_eeprom_channel(struct iwn_softc *sc, struct ieee80211_channel *c)
2568 int band, chan, i, j;
2570 if (IEEE80211_IS_CHAN_HT40(c)) {
2571 band = IEEE80211_IS_CHAN_5GHZ(c) ? 6 : 5;
2572 if (IEEE80211_IS_CHAN_HT40D(c))
2573 chan = c->ic_extieee;
2576 for (i = 0; i < iwn_bands[band].nchan; i++) {
2577 if (iwn_bands[band].chan[i] == chan)
2578 return &sc->eeprom_channels[band][i];
2581 for (j = 0; j < 5; j++) {
2582 for (i = 0; i < iwn_bands[j].nchan; i++) {
2583 if (iwn_bands[j].chan[i] == c->ic_ieee)
2584 return &sc->eeprom_channels[j][i];
2592 * Enforce flags read from EEPROM.
2595 iwn_setregdomain(struct ieee80211com *ic, struct ieee80211_regdomain *rd,
2596 int nchan, struct ieee80211_channel chans[])
2598 struct iwn_softc *sc = ic->ic_ifp->if_softc;
2601 for (i = 0; i < nchan; i++) {
2602 struct ieee80211_channel *c = &chans[i];
2603 struct iwn_eeprom_chan *channel;
2605 channel = iwn_find_eeprom_channel(sc, c);
2606 if (channel == NULL) {
2607 if_printf(ic->ic_ifp,
2608 "%s: invalid channel %u freq %u/0x%x\n",
2609 __func__, c->ic_ieee, c->ic_freq, c->ic_flags);
2612 c->ic_flags |= iwn_eeprom_channel_flags(channel);
2619 iwn_read_eeprom_enhinfo(struct iwn_softc *sc)
2621 struct iwn_eeprom_enhinfo enhinfo[35];
2622 struct ifnet *ifp = sc->sc_ifp;
2623 struct ieee80211com *ic = ifp->if_l2com;
2624 struct ieee80211_channel *c;
2630 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2632 iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);
2633 base = le16toh(val);
2634 iwn_read_prom_data(sc, base + IWN6000_EEPROM_ENHINFO,
2635 enhinfo, sizeof enhinfo);
2637 for (i = 0; i < nitems(enhinfo); i++) {
2638 flags = enhinfo[i].flags;
2639 if (!(flags & IWN_ENHINFO_VALID))
2640 continue; /* Skip invalid entries. */
2643 if (sc->txchainmask & IWN_ANT_A)
2644 maxpwr = MAX(maxpwr, enhinfo[i].chain[0]);
2645 if (sc->txchainmask & IWN_ANT_B)
2646 maxpwr = MAX(maxpwr, enhinfo[i].chain[1]);
2647 if (sc->txchainmask & IWN_ANT_C)
2648 maxpwr = MAX(maxpwr, enhinfo[i].chain[2]);
2649 if (sc->ntxchains == 2)
2650 maxpwr = MAX(maxpwr, enhinfo[i].mimo2);
2651 else if (sc->ntxchains == 3)
2652 maxpwr = MAX(maxpwr, enhinfo[i].mimo3);
2654 for (j = 0; j < ic->ic_nchans; j++) {
2655 c = &ic->ic_channels[j];
2656 if ((flags & IWN_ENHINFO_5GHZ)) {
2657 if (!IEEE80211_IS_CHAN_A(c))
2659 } else if ((flags & IWN_ENHINFO_OFDM)) {
2660 if (!IEEE80211_IS_CHAN_G(c))
2662 } else if (!IEEE80211_IS_CHAN_B(c))
2664 if ((flags & IWN_ENHINFO_HT40)) {
2665 if (!IEEE80211_IS_CHAN_HT40(c))
2668 if (IEEE80211_IS_CHAN_HT40(c))
2671 if (enhinfo[i].chan != 0 &&
2672 enhinfo[i].chan != c->ic_ieee)
2675 DPRINTF(sc, IWN_DEBUG_RESET,
2676 "channel %d(%x), maxpwr %d\n", c->ic_ieee,
2677 c->ic_flags, maxpwr / 2);
2678 c->ic_maxregpower = maxpwr / 2;
2679 c->ic_maxpower = maxpwr;
2683 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end\n", __func__);
2687 static struct ieee80211_node *
2688 iwn_node_alloc(struct ieee80211vap *vap, const uint8_t mac[IEEE80211_ADDR_LEN])
2690 return (kmalloc(sizeof (struct iwn_node),
2691 M_80211_NODE, M_INTWAIT | M_ZERO));
2697 switch (rate & 0xff) {
2698 case 12: return 0xd;
2699 case 18: return 0xf;
2700 case 24: return 0x5;
2701 case 36: return 0x7;
2702 case 48: return 0x9;
2703 case 72: return 0xb;
2704 case 96: return 0x1;
2705 case 108: return 0x3;
2709 case 22: return 110;
2715 iwn_get_1stream_tx_antmask(struct iwn_softc *sc)
2718 return IWN_LSB(sc->txchainmask);
2722 iwn_get_2stream_tx_antmask(struct iwn_softc *sc)
2727 * The '2 stream' setup is a bit .. odd.
2729 * For NICs that support only 1 antenna, default to IWN_ANT_AB or
2730 * the firmware panics (eg Intel 5100.)
2732 * For NICs that support two antennas, we use ANT_AB.
2734 * For NICs that support three antennas, we use the two that
2735 * wasn't the default one.
2737 * XXX TODO: if bluetooth (full concurrent) is enabled, restrict
2738 * this to only one antenna.
2741 /* Default - transmit on the other antennas */
2742 tx = (sc->txchainmask & ~IWN_LSB(sc->txchainmask));
2744 /* Now, if it's zero, set it to IWN_ANT_AB, so to not panic firmware */
2749 * If the NIC is a two-stream TX NIC, configure the TX mask to
2750 * the default chainmask
2752 else if (sc->ntxchains == 2)
2753 tx = sc->txchainmask;
2761 * Calculate the required PLCP value from the given rate,
2762 * to the given node.
2764 * This will take the node configuration (eg 11n, rate table
2765 * setup, etc) into consideration.
2768 iwn_rate_to_plcp(struct iwn_softc *sc, struct ieee80211_node *ni,
2771 #define RV(v) ((v) & IEEE80211_RATE_VAL)
2772 struct ieee80211com *ic = ni->ni_ic;
2777 * If it's an MCS rate, let's set the plcp correctly
2778 * and set the relevant flags based on the node config.
2780 if (rate & IEEE80211_RATE_MCS) {
2782 * Set the initial PLCP value to be between 0->31 for
2783 * MCS 0 -> MCS 31, then set the "I'm an MCS rate!"
2786 plcp = RV(rate) | IWN_RFLAG_MCS;
2789 * XXX the following should only occur if both
2790 * the local configuration _and_ the remote node
2791 * advertise these capabilities. Thus this code
2796 * Set the channel width and guard interval.
2798 if (IEEE80211_IS_CHAN_HT40(ni->ni_chan)) {
2799 plcp |= IWN_RFLAG_HT40;
2800 if (ni->ni_htcap & IEEE80211_HTCAP_SHORTGI40)
2801 plcp |= IWN_RFLAG_SGI;
2802 } else if (ni->ni_htcap & IEEE80211_HTCAP_SHORTGI20) {
2803 plcp |= IWN_RFLAG_SGI;
2807 * Ensure the selected rate matches the link quality
2808 * table entries being used.
2811 plcp |= IWN_RFLAG_ANT(sc->txchainmask);
2812 else if (rate > 0x87)
2813 plcp |= IWN_RFLAG_ANT(iwn_get_2stream_tx_antmask(sc));
2815 plcp |= IWN_RFLAG_ANT(iwn_get_1stream_tx_antmask(sc));
2818 * Set the initial PLCP - fine for both
2819 * OFDM and CCK rates.
2821 plcp = rate2plcp(rate);
2823 /* Set CCK flag if it's CCK */
2825 /* XXX It would be nice to have a method
2826 * to map the ridx -> phy table entry
2827 * so we could just query that, rather than
2828 * this hack to check against IWN_RIDX_OFDM6.
2830 ridx = ieee80211_legacy_rate_lookup(ic->ic_rt,
2831 rate & IEEE80211_RATE_VAL);
2832 if (ridx < IWN_RIDX_OFDM6 &&
2833 IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
2834 plcp |= IWN_RFLAG_CCK;
2836 /* Set antenna configuration */
2837 /* XXX TODO: is this the right antenna to use for legacy? */
2838 plcp |= IWN_RFLAG_ANT(iwn_get_1stream_tx_antmask(sc));
2841 DPRINTF(sc, IWN_DEBUG_TXRATE, "%s: rate=0x%02x, plcp=0x%08x\n",
2846 return (htole32(plcp));
2851 iwn_newassoc(struct ieee80211_node *ni, int isnew)
2853 /* Doesn't do anything at the moment */
2857 iwn_media_change(struct ifnet *ifp)
2861 error = ieee80211_media_change(ifp);
2862 /* NB: only the fixed rate can change and that doesn't need a reset */
2863 return (error == ENETRESET ? 0 : error);
2867 iwn_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
2869 struct iwn_vap *ivp = IWN_VAP(vap);
2870 struct ieee80211com *ic = vap->iv_ic;
2871 struct iwn_softc *sc = ic->ic_ifp->if_softc;
2874 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
2876 DPRINTF(sc, IWN_DEBUG_STATE, "%s: %s -> %s\n", __func__,
2877 ieee80211_state_name[vap->iv_state], ieee80211_state_name[nstate]);
2879 IEEE80211_UNLOCK(ic);
2881 #if defined(__DragonFly__)
2882 callout_stop_sync(&sc->calib_to);
2884 callout_stop(&sc->calib_to);
2887 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
2890 case IEEE80211_S_ASSOC:
2891 if (vap->iv_state != IEEE80211_S_RUN)
2894 case IEEE80211_S_AUTH:
2895 if (vap->iv_state == IEEE80211_S_AUTH)
2899 * !AUTH -> AUTH transition requires state reset to handle
2900 * reassociations correctly.
2902 sc->rxon->associd = 0;
2903 sc->rxon->filter &= ~htole32(IWN_FILTER_BSS);
2904 sc->calib.state = IWN_CALIB_STATE_INIT;
2906 if ((error = iwn_auth(sc, vap)) != 0) {
2907 device_printf(sc->sc_dev,
2908 "%s: could not move to auth state\n", __func__);
2912 case IEEE80211_S_RUN:
2914 * RUN -> RUN transition; Just restart the timers.
2916 if (vap->iv_state == IEEE80211_S_RUN) {
2922 * !RUN -> RUN requires setting the association id
2923 * which is done with a firmware cmd. We also defer
2924 * starting the timers until that work is done.
2926 if ((error = iwn_run(sc, vap)) != 0) {
2927 device_printf(sc->sc_dev,
2928 "%s: could not move to run state\n", __func__);
2932 case IEEE80211_S_INIT:
2933 sc->calib.state = IWN_CALIB_STATE_INIT;
2942 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__);
2946 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
2948 return ivp->iv_newstate(vap, nstate, arg);
2952 iwn_calib_timeout(void *arg)
2954 struct iwn_softc *sc = arg;
2956 IWN_LOCK_ASSERT(sc);
2958 /* Force automatic TX power calibration every 60 secs. */
2959 if (++sc->calib_cnt >= 120) {
2962 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s\n",
2963 "sending request for statistics");
2964 (void)iwn_cmd(sc, IWN_CMD_GET_STATISTICS, &flags,
2968 callout_reset(&sc->calib_to, msecs_to_ticks(500), iwn_calib_timeout,
2973 * Process an RX_PHY firmware notification. This is usually immediately
2974 * followed by an MPDU_RX_DONE notification.
2977 iwn_rx_phy(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2978 struct iwn_rx_data *data)
2980 struct iwn_rx_stat *stat = (struct iwn_rx_stat *)(desc + 1);
2982 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: received PHY stats\n", __func__);
2983 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
2985 /* Save RX statistics, they will be used on MPDU_RX_DONE. */
2986 memcpy(&sc->last_rx_stat, stat, sizeof (*stat));
2987 sc->last_rx_valid = 1;
2991 * Process an RX_DONE (4965AGN only) or MPDU_RX_DONE firmware notification.
2992 * Each MPDU_RX_DONE notification must be preceded by an RX_PHY one.
2995 iwn_rx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2996 struct iwn_rx_data *data)
2998 struct iwn_ops *ops = &sc->ops;
2999 struct ifnet *ifp = sc->sc_ifp;
3000 struct ieee80211com *ic = ifp->if_l2com;
3001 struct iwn_rx_ring *ring = &sc->rxq;
3002 struct ieee80211_frame *wh;
3003 struct ieee80211_node *ni;
3004 struct mbuf *m, *m1;
3005 struct iwn_rx_stat *stat;
3009 int error, len, rssi, nf;
3011 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3013 if (desc->type == IWN_MPDU_RX_DONE) {
3014 /* Check for prior RX_PHY notification. */
3015 if (!sc->last_rx_valid) {
3016 DPRINTF(sc, IWN_DEBUG_ANY,
3017 "%s: missing RX_PHY\n", __func__);
3020 stat = &sc->last_rx_stat;
3022 stat = (struct iwn_rx_stat *)(desc + 1);
3024 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3026 if (stat->cfg_phy_len > IWN_STAT_MAXLEN) {
3027 device_printf(sc->sc_dev,
3028 "%s: invalid RX statistic header, len %d\n", __func__,
3032 if (desc->type == IWN_MPDU_RX_DONE) {
3033 struct iwn_rx_mpdu *mpdu = (struct iwn_rx_mpdu *)(desc + 1);
3034 head = (caddr_t)(mpdu + 1);
3035 len = le16toh(mpdu->len);
3037 head = (caddr_t)(stat + 1) + stat->cfg_phy_len;
3038 len = le16toh(stat->len);
3041 flags = le32toh(*(uint32_t *)(head + len));
3043 /* Discard frames with a bad FCS early. */
3044 if ((flags & IWN_RX_NOERROR) != IWN_RX_NOERROR) {
3045 DPRINTF(sc, IWN_DEBUG_RECV, "%s: RX flags error %x\n",
3047 #if defined(__DragonFly__)
3050 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
3054 /* Discard frames that are too short. */
3055 if (len < sizeof (*wh)) {
3056 DPRINTF(sc, IWN_DEBUG_RECV, "%s: frame too short: %d\n",
3058 #if defined(__DragonFly__)
3061 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
3066 m1 = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, IWN_RBUF_SIZE);
3068 DPRINTF(sc, IWN_DEBUG_ANY, "%s: no mbuf to restock ring\n",
3070 #if defined(__DragonFly__)
3073 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
3077 bus_dmamap_unload(ring->data_dmat, data->map);
3079 error = bus_dmamap_load(ring->data_dmat, data->map, mtod(m1, void *),
3080 IWN_RBUF_SIZE, iwn_dma_map_addr, &paddr, BUS_DMA_NOWAIT);
3081 if (error != 0 && error != EFBIG) {
3082 device_printf(sc->sc_dev,
3083 "%s: bus_dmamap_load failed, error %d\n", __func__, error);
3086 /* Try to reload the old mbuf. */
3087 error = bus_dmamap_load(ring->data_dmat, data->map,
3088 mtod(data->m, void *), IWN_RBUF_SIZE, iwn_dma_map_addr,
3089 &paddr, BUS_DMA_NOWAIT);
3090 if (error != 0 && error != EFBIG) {
3091 panic("%s: could not load old RX mbuf", __func__);
3093 /* Physical address may have changed. */
3094 ring->desc[ring->cur] = htole32(paddr >> 8);
3095 bus_dmamap_sync(ring->data_dmat, ring->desc_dma.map,
3096 BUS_DMASYNC_PREWRITE);
3097 #if defined(__DragonFly__)
3100 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
3107 /* Update RX descriptor. */
3108 ring->desc[ring->cur] = htole32(paddr >> 8);
3109 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
3110 BUS_DMASYNC_PREWRITE);
3112 /* Finalize mbuf. */
3113 m->m_pkthdr.rcvif = ifp;
3115 m->m_pkthdr.len = m->m_len = len;
3117 /* Grab a reference to the source node. */
3118 wh = mtod(m, struct ieee80211_frame *);
3119 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh);
3120 nf = (ni != NULL && ni->ni_vap->iv_state == IEEE80211_S_RUN &&
3121 (ic->ic_flags & IEEE80211_F_SCAN) == 0) ? sc->noise : -95;
3123 rssi = ops->get_rssi(sc, stat);
3125 if (ieee80211_radiotap_active(ic)) {
3126 struct iwn_rx_radiotap_header *tap = &sc->sc_rxtap;
3129 if (stat->flags & htole16(IWN_STAT_FLAG_SHPREAMBLE))
3130 tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
3131 tap->wr_dbm_antsignal = (int8_t)rssi;
3132 tap->wr_dbm_antnoise = (int8_t)nf;
3133 tap->wr_tsft = stat->tstamp;
3134 switch (stat->rate) {
3136 case 10: tap->wr_rate = 2; break;
3137 case 20: tap->wr_rate = 4; break;
3138 case 55: tap->wr_rate = 11; break;
3139 case 110: tap->wr_rate = 22; break;
3141 case 0xd: tap->wr_rate = 12; break;
3142 case 0xf: tap->wr_rate = 18; break;
3143 case 0x5: tap->wr_rate = 24; break;
3144 case 0x7: tap->wr_rate = 36; break;
3145 case 0x9: tap->wr_rate = 48; break;
3146 case 0xb: tap->wr_rate = 72; break;
3147 case 0x1: tap->wr_rate = 96; break;
3148 case 0x3: tap->wr_rate = 108; break;
3149 /* Unknown rate: should not happen. */
3150 default: tap->wr_rate = 0;
3156 /* Send the frame to the 802.11 layer. */
3158 if (ni->ni_flags & IEEE80211_NODE_HT)
3159 m->m_flags |= M_AMPDU;
3160 (void)ieee80211_input(ni, m, rssi - nf, nf);
3161 /* Node is no longer needed. */
3162 ieee80211_free_node(ni);
3164 (void)ieee80211_input_all(ic, m, rssi - nf, nf);
3168 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3172 /* Process an incoming Compressed BlockAck. */
3174 iwn_rx_compressed_ba(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3175 struct iwn_rx_data *data)
3177 struct iwn_ops *ops = &sc->ops;
3178 struct ifnet *ifp = sc->sc_ifp;
3179 struct iwn_node *wn;
3180 struct ieee80211_node *ni;
3181 struct iwn_compressed_ba *ba = (struct iwn_compressed_ba *)(desc + 1);
3182 struct iwn_tx_ring *txq;
3183 struct iwn_tx_data *txdata;
3184 struct ieee80211_tx_ampdu *tap;
3189 int ackfailcnt = 0, i, lastidx, qid, *res, shift;
3190 int tx_ok = 0, tx_err = 0;
3192 DPRINTF(sc, IWN_DEBUG_TRACE | IWN_DEBUG_XMIT, "->%s begin\n", __func__);
3194 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3196 qid = le16toh(ba->qid);
3197 txq = &sc->txq[ba->qid];
3198 tap = sc->qid2tap[ba->qid];
3200 wn = (void *)tap->txa_ni;
3204 if (!IEEE80211_AMPDU_RUNNING(tap)) {
3205 res = tap->txa_private;
3206 ssn = tap->txa_start & 0xfff;
3209 for (lastidx = le16toh(ba->ssn) & 0xff; txq->read != lastidx;) {
3210 txdata = &txq->data[txq->read];
3212 /* Unmap and free mbuf. */
3213 bus_dmamap_sync(txq->data_dmat, txdata->map,
3214 BUS_DMASYNC_POSTWRITE);
3215 bus_dmamap_unload(txq->data_dmat, txdata->map);
3216 m = txdata->m, txdata->m = NULL;
3217 ni = txdata->ni, txdata->ni = NULL;
3219 KASSERT(ni != NULL, ("no node"));
3220 KASSERT(m != NULL, ("no mbuf"));
3222 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: freeing m=%p\n", __func__, m);
3223 ieee80211_tx_complete(ni, m, 1);
3226 txq->read = (txq->read + 1) % IWN_TX_RING_COUNT;
3229 if (txq->queued == 0 && res != NULL) {
3231 ops->ampdu_tx_stop(sc, qid, tid, ssn);
3233 sc->qid2tap[qid] = NULL;
3234 kfree(res, M_DEVBUF);
3238 if (wn->agg[tid].bitmap == 0)
3241 shift = wn->agg[tid].startidx - ((le16toh(ba->seq) >> 4) & 0xff);
3245 if (wn->agg[tid].nframes > (64 - shift))
3249 * Walk the bitmap and calculate how many successful and failed
3250 * attempts are made.
3252 * Yes, the rate control code doesn't know these are A-MPDU
3253 * subframes and that it's okay to fail some of these.
3256 bitmap = (le64toh(ba->bitmap) >> shift) & wn->agg[tid].bitmap;
3257 for (i = 0; bitmap; i++) {
3258 if ((bitmap & 1) == 0) {
3259 #if defined(__DragonFly__)
3262 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
3265 ieee80211_ratectl_tx_complete(ni->ni_vap, ni,
3266 IEEE80211_RATECTL_TX_FAILURE, &ackfailcnt, NULL);
3268 #if defined(__DragonFly__)
3271 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1);
3274 ieee80211_ratectl_tx_complete(ni->ni_vap, ni,
3275 IEEE80211_RATECTL_TX_SUCCESS, &ackfailcnt, NULL);
3280 DPRINTF(sc, IWN_DEBUG_TRACE | IWN_DEBUG_XMIT,
3281 "->%s: end; %d ok; %d err\n",__func__, tx_ok, tx_err);
3286 * Process a CALIBRATION_RESULT notification sent by the initialization
3287 * firmware on response to a CMD_CALIB_CONFIG command (5000 only).
3290 iwn5000_rx_calib_results(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3291 struct iwn_rx_data *data)
3293 struct iwn_phy_calib *calib = (struct iwn_phy_calib *)(desc + 1);
3296 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3298 /* Runtime firmware should not send such a notification. */
3299 if (sc->sc_flags & IWN_FLAG_CALIB_DONE){
3300 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s received after clib done\n",
3304 len = (le32toh(desc->len) & 0x3fff) - 4;
3305 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3307 switch (calib->code) {
3308 case IWN5000_PHY_CALIB_DC:
3309 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_DC)
3312 case IWN5000_PHY_CALIB_LO:
3313 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_LO)
3316 case IWN5000_PHY_CALIB_TX_IQ:
3317 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TX_IQ)
3320 case IWN5000_PHY_CALIB_TX_IQ_PERIODIC:
3321 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TX_IQ_PERIODIC)
3324 case IWN5000_PHY_CALIB_BASE_BAND:
3325 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_BASE_BAND)
3329 if (idx == -1) /* Ignore other results. */
3332 /* Save calibration result. */
3333 if (sc->calibcmd[idx].buf != NULL)
3334 kfree(sc->calibcmd[idx].buf, M_DEVBUF);
3335 sc->calibcmd[idx].buf = kmalloc(len, M_DEVBUF, M_INTWAIT);
3336 if (sc->calibcmd[idx].buf == NULL) {
3337 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
3338 "not enough memory for calibration result %d\n",
3342 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
3343 "saving calibration result idx=%d, code=%d len=%d\n", idx, calib->code, len);
3344 sc->calibcmd[idx].len = len;
3345 memcpy(sc->calibcmd[idx].buf, calib, len);
3349 iwn_stats_update(struct iwn_softc *sc, struct iwn_calib_state *calib,
3350 struct iwn_stats *stats, int len)
3352 struct iwn_stats_bt *stats_bt;
3353 struct iwn_stats *lstats;
3356 * First - check whether the length is the bluetooth or normal.
3358 * If it's normal - just copy it and bump out.
3359 * Otherwise we have to convert things.
3362 if (len == sizeof(struct iwn_stats) + 4) {
3363 memcpy(&sc->last_stat, stats, sizeof(struct iwn_stats));
3364 sc->last_stat_valid = 1;
3369 * If it's not the bluetooth size - log, then just copy.
3371 if (len != sizeof(struct iwn_stats_bt) + 4) {
3372 DPRINTF(sc, IWN_DEBUG_STATS,
3373 "%s: size of rx statistics (%d) not an expected size!\n",
3376 memcpy(&sc->last_stat, stats, sizeof(struct iwn_stats));
3377 sc->last_stat_valid = 1;
3384 stats_bt = (struct iwn_stats_bt *) stats;
3385 lstats = &sc->last_stat;
3388 lstats->flags = stats_bt->flags;
3390 memcpy(&lstats->rx.ofdm, &stats_bt->rx_bt.ofdm,
3391 sizeof(struct iwn_rx_phy_stats));
3392 memcpy(&lstats->rx.cck, &stats_bt->rx_bt.cck,
3393 sizeof(struct iwn_rx_phy_stats));
3394 memcpy(&lstats->rx.general, &stats_bt->rx_bt.general_bt.common,
3395 sizeof(struct iwn_rx_general_stats));
3396 memcpy(&lstats->rx.ht, &stats_bt->rx_bt.ht,
3397 sizeof(struct iwn_rx_ht_phy_stats));
3399 memcpy(&lstats->tx, &stats_bt->tx,
3400 sizeof(struct iwn_tx_stats));
3402 memcpy(&lstats->general, &stats_bt->general,
3403 sizeof(struct iwn_general_stats));
3405 /* XXX TODO: Squirrel away the extra bluetooth stats somewhere */
3406 sc->last_stat_valid = 1;
3410 * Process an RX_STATISTICS or BEACON_STATISTICS firmware notification.
3411 * The latter is sent by the firmware after each received beacon.
3414 iwn_rx_statistics(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3415 struct iwn_rx_data *data)
3417 struct iwn_ops *ops = &sc->ops;
3418 struct ifnet *ifp = sc->sc_ifp;
3419 struct ieee80211com *ic = ifp->if_l2com;
3420 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
3421 struct iwn_calib_state *calib = &sc->calib;
3422 struct iwn_stats *stats = (struct iwn_stats *)(desc + 1);
3423 struct iwn_stats *lstats;
3426 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3428 /* Ignore statistics received during a scan. */
3429 if (vap->iv_state != IEEE80211_S_RUN ||
3430 (ic->ic_flags & IEEE80211_F_SCAN)){
3431 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s received during calib\n",
3436 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3438 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_STATS,
3439 "%s: received statistics, cmd %d, len %d\n",
3440 __func__, desc->type, le16toh(desc->len));
3441 sc->calib_cnt = 0; /* Reset TX power calibration timeout. */
3444 * Collect/track general statistics for reporting.
3446 * This takes care of ensuring that the bluetooth sized message
3447 * will be correctly converted to the legacy sized message.
3449 iwn_stats_update(sc, calib, stats, le16toh(desc->len));
3452 * And now, let's take a reference of it to use!
3454 lstats = &sc->last_stat;
3456 /* Test if temperature has changed. */
3457 if (lstats->general.temp != sc->rawtemp) {
3458 /* Convert "raw" temperature to degC. */
3459 sc->rawtemp = stats->general.temp;
3460 temp = ops->get_temperature(sc);
3461 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: temperature %d\n",
3464 /* Update TX power if need be (4965AGN only). */
3465 if (sc->hw_type == IWN_HW_REV_TYPE_4965)
3466 iwn4965_power_calibration(sc, temp);
3469 if (desc->type != IWN_BEACON_STATISTICS)
3470 return; /* Reply to a statistics request. */
3472 sc->noise = iwn_get_noise(&lstats->rx.general);
3473 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: noise %d\n", __func__, sc->noise);
3475 /* Test that RSSI and noise are present in stats report. */
3476 if (le32toh(lstats->rx.general.flags) != 1) {
3477 DPRINTF(sc, IWN_DEBUG_ANY, "%s\n",
3478 "received statistics without RSSI");
3482 if (calib->state == IWN_CALIB_STATE_ASSOC)
3483 iwn_collect_noise(sc, &lstats->rx.general);
3484 else if (calib->state == IWN_CALIB_STATE_RUN) {
3485 iwn_tune_sensitivity(sc, &lstats->rx);
3487 * XXX TODO: Only run the RX recovery if we're associated!
3489 iwn_check_rx_recovery(sc, lstats);
3490 iwn_save_stats_counters(sc, lstats);
3493 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3497 * Save the relevant statistic counters for the next calibration
3501 iwn_save_stats_counters(struct iwn_softc *sc, const struct iwn_stats *rs)
3503 struct iwn_calib_state *calib = &sc->calib;
3505 /* Save counters values for next call. */
3506 calib->bad_plcp_cck = le32toh(rs->rx.cck.bad_plcp);
3507 calib->fa_cck = le32toh(rs->rx.cck.fa);
3508 calib->bad_plcp_ht = le32toh(rs->rx.ht.bad_plcp);
3509 calib->bad_plcp_ofdm = le32toh(rs->rx.ofdm.bad_plcp);
3510 calib->fa_ofdm = le32toh(rs->rx.ofdm.fa);
3512 /* Last time we received these tick values */
3513 sc->last_calib_ticks = ticks;
3517 * Process a TX_DONE firmware notification. Unfortunately, the 4965AGN
3518 * and 5000 adapters have different incompatible TX status formats.
3521 iwn4965_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3522 struct iwn_rx_data *data)
3524 struct iwn4965_tx_stat *stat = (struct iwn4965_tx_stat *)(desc + 1);
3525 struct iwn_tx_ring *ring;
3528 qid = desc->qid & 0xf;
3529 ring = &sc->txq[qid];
3531 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: "
3532 "qid %d idx %d RTS retries %d ACK retries %d nkill %d rate %x duration %d status %x\n",
3533 __func__, desc->qid, desc->idx,
3537 stat->rate, le16toh(stat->duration),
3538 le32toh(stat->status));
3540 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3541 if (qid >= sc->firstaggqueue) {
3542 iwn_ampdu_tx_done(sc, qid, desc->idx, stat->nframes,
3543 stat->ackfailcnt, &stat->status);
3545 iwn_tx_done(sc, desc, stat->ackfailcnt,
3546 le32toh(stat->status) & 0xff);
3551 iwn5000_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
3552 struct iwn_rx_data *data)
3554 struct iwn5000_tx_stat *stat = (struct iwn5000_tx_stat *)(desc + 1);
3555 struct iwn_tx_ring *ring;
3558 qid = desc->qid & 0xf;
3559 ring = &sc->txq[qid];
3561 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: "
3562 "qid %d idx %d RTS retries %d ACK retries %d nkill %d rate %x duration %d status %x\n",
3563 __func__, desc->qid, desc->idx,
3567 stat->rate, le16toh(stat->duration),
3568 le32toh(stat->status));
3571 /* Reset TX scheduler slot. */
3572 iwn5000_reset_sched(sc, desc->qid & 0xf, desc->idx);
3575 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);
3576 if (qid >= sc->firstaggqueue) {
3577 iwn_ampdu_tx_done(sc, qid, desc->idx, stat->nframes,
3578 stat->ackfailcnt, &stat->status);
3580 iwn_tx_done(sc, desc, stat->ackfailcnt,
3581 le16toh(stat->status) & 0xff);
3586 * Adapter-independent backend for TX_DONE firmware notifications.
3589 iwn_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc, int ackfailcnt,
3592 struct ifnet *ifp = sc->sc_ifp;
3593 struct iwn_tx_ring *ring = &sc->txq[desc->qid & 0xf];
3594 struct iwn_tx_data *data = &ring->data[desc->idx];
3596 struct ieee80211_node *ni;
3597 struct ieee80211vap *vap;
3599 KASSERT(data->ni != NULL, ("no node"));
3601 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3603 /* Unmap and free mbuf. */
3604 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTWRITE);
3605 bus_dmamap_unload(ring->data_dmat, data->map);
3606 m = data->m, data->m = NULL;
3607 ni = data->ni, data->ni = NULL;
3611 * Update rate control statistics for the node.
3613 if (status & IWN_TX_FAIL) {
3614 #if defined(__DragonFly__)
3617 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
3619 ieee80211_ratectl_tx_complete(vap, ni,
3620 IEEE80211_RATECTL_TX_FAILURE, &ackfailcnt, NULL);
3622 #if defined(__DragonFly__)
3625 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1);
3627 ieee80211_ratectl_tx_complete(vap, ni,
3628 IEEE80211_RATECTL_TX_SUCCESS, &ackfailcnt, NULL);
3632 * Channels marked for "radar" require traffic to be received
3633 * to unlock before we can transmit. Until traffic is seen
3634 * any attempt to transmit is returned immediately with status
3635 * set to IWN_TX_FAIL_TX_LOCKED. Unfortunately this can easily
3636 * happen on first authenticate after scanning. To workaround
3637 * this we ignore a failure of this sort in AUTH state so the
3638 * 802.11 layer will fall back to using a timeout to wait for
3639 * the AUTH reply. This allows the firmware time to see
3640 * traffic so a subsequent retry of AUTH succeeds. It's
3641 * unclear why the firmware does not maintain state for
3642 * channels recently visited as this would allow immediate
3643 * use of the channel after a scan (where we see traffic).
3645 if (status == IWN_TX_FAIL_TX_LOCKED &&
3646 ni->ni_vap->iv_state == IEEE80211_S_AUTH)
3647 ieee80211_tx_complete(ni, m, 0);
3649 ieee80211_tx_complete(ni, m,
3650 (status & IWN_TX_FAIL) != 0);
3652 sc->sc_tx_timer = 0;
3653 if (--ring->queued < IWN_TX_RING_LOMARK) {
3654 sc->qfullmsk &= ~(1 << ring->qid);
3655 #if defined(__DragonFly__)
3656 if (sc->qfullmsk == 0 && ifq_is_oactive(&ifp->if_snd)) {
3657 ifq_clr_oactive(&ifp->if_snd);
3658 iwn_start_locked(ifp);
3661 if (sc->qfullmsk == 0 &&
3662 (ifp->if_drv_flags & IFF_DRV_OACTIVE)) {
3663 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
3664 iwn_start_locked(ifp);
3669 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3674 * Process a "command done" firmware notification. This is where we wakeup
3675 * processes waiting for a synchronous command completion.
3678 iwn_cmd_done(struct iwn_softc *sc, struct iwn_rx_desc *desc)
3680 struct iwn_tx_ring *ring;
3681 struct iwn_tx_data *data;
3684 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT)
3685 cmd_queue_num = IWN_PAN_CMD_QUEUE;
3687 cmd_queue_num = IWN_CMD_QUEUE_NUM;
3689 if ((desc->qid & IWN_RX_DESC_QID_MSK) != cmd_queue_num)
3690 return; /* Not a command ack. */
3692 ring = &sc->txq[cmd_queue_num];
3693 data = &ring->data[desc->idx];
3695 /* If the command was mapped in an mbuf, free it. */
3696 if (data->m != NULL) {
3697 bus_dmamap_sync(ring->data_dmat, data->map,
3698 BUS_DMASYNC_POSTWRITE);
3699 bus_dmamap_unload(ring->data_dmat, data->map);
3703 wakeup(&ring->desc[desc->idx]);
3707 iwn_ampdu_tx_done(struct iwn_softc *sc, int qid, int idx, int nframes,
3708 int ackfailcnt, void *stat)
3710 struct iwn_ops *ops = &sc->ops;
3711 struct ifnet *ifp = sc->sc_ifp;
3712 struct iwn_tx_ring *ring = &sc->txq[qid];
3713 struct iwn_tx_data *data;
3715 struct iwn_node *wn;
3716 struct ieee80211_node *ni;
3717 struct ieee80211_tx_ampdu *tap;
3719 uint32_t *status = stat;
3720 uint16_t *aggstatus = stat;
3723 int bit, i, lastidx, *res, seqno, shift, start;
3725 /* XXX TODO: status is le16 field! Grr */
3727 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
3728 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: nframes=%d, status=0x%08x\n",
3733 tap = sc->qid2tap[qid];
3735 wn = (void *)tap->txa_ni;
3739 * XXX TODO: ACK and RTS failures would be nice here!
3743 * A-MPDU single frame status - if we failed to transmit it
3744 * in A-MPDU, then it may be a permanent failure.
3746 * XXX TODO: check what the Linux iwlwifi driver does here;
3747 * there's some permanent and temporary failures that may be
3748 * handled differently.
3751 if ((*status & 0xff) != 1 && (*status & 0xff) != 2) {
3753 kprintf("ieee80211_send_bar()\n");
3756 * If we completely fail a transmit, make sure a
3757 * notification is pushed up to the rate control
3760 ieee80211_ratectl_tx_complete(ni->ni_vap,
3762 IEEE80211_RATECTL_TX_FAILURE,
3767 * If nframes=1, then we won't be getting a BA for
3768 * this frame. Ensure that we correctly update the
3769 * rate control code with how many retries were
3770 * needed to send it.
3772 ieee80211_ratectl_tx_complete(ni->ni_vap,
3774 IEEE80211_RATECTL_TX_SUCCESS,
3782 for (i = 0; i < nframes; i++) {
3783 if (le16toh(aggstatus[i * 2]) & 0xc)
3786 idx = le16toh(aggstatus[2*i + 1]) & 0xff;
3790 shift = 0x100 - idx + start;
3793 } else if (bit <= -64)
3794 bit = 0x100 - start + idx;
3796 shift = start - idx;
3800 bitmap = bitmap << shift;
3801 bitmap |= 1ULL << bit;
3803 tap = sc->qid2tap[qid];
3805 wn = (void *)tap->txa_ni;
3806 wn->agg[tid].bitmap = bitmap;
3807 wn->agg[tid].startidx = start;
3808 wn->agg[tid].nframes = nframes;
3812 if (!IEEE80211_AMPDU_RUNNING(tap)) {
3813 res = tap->txa_private;
3814 ssn = tap->txa_start & 0xfff;
3817 /* This is going nframes DWORDS into the descriptor? */
3818 seqno = le32toh(*(status + nframes)) & 0xfff;
3819 for (lastidx = (seqno & 0xff); ring->read != lastidx;) {
3820 data = &ring->data[ring->read];
3822 /* Unmap and free mbuf. */
3823 bus_dmamap_sync(ring->data_dmat, data->map,
3824 BUS_DMASYNC_POSTWRITE);
3825 bus_dmamap_unload(ring->data_dmat, data->map);
3826 m = data->m, data->m = NULL;
3827 ni = data->ni, data->ni = NULL;
3829 KASSERT(ni != NULL, ("no node"));
3830 KASSERT(m != NULL, ("no mbuf"));
3831 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: freeing m=%p\n", __func__, m);
3832 ieee80211_tx_complete(ni, m, 1);
3835 ring->read = (ring->read + 1) % IWN_TX_RING_COUNT;
3838 if (ring->queued == 0 && res != NULL) {
3840 ops->ampdu_tx_stop(sc, qid, tid, ssn);
3842 sc->qid2tap[qid] = NULL;
3843 kfree(res, M_DEVBUF);
3847 sc->sc_tx_timer = 0;
3848 if (ring->queued < IWN_TX_RING_LOMARK) {
3849 sc->qfullmsk &= ~(1 << ring->qid);
3850 #if defined(__DragonFly__)
3851 if (sc->qfullmsk == 0 && ifq_is_oactive(&ifp->if_snd)) {
3852 ifq_clr_oactive(&ifp->if_snd);
3853 iwn_start_locked(ifp);
3856 if (sc->qfullmsk == 0 &&
3857 (ifp->if_drv_flags & IFF_DRV_OACTIVE)) {
3858 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
3859 iwn_start_locked(ifp);
3864 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
3869 * Process an INT_FH_RX or INT_SW_RX interrupt.
3872 iwn_notif_intr(struct iwn_softc *sc)
3874 struct iwn_ops *ops = &sc->ops;
3875 struct ifnet *ifp = sc->sc_ifp;
3876 struct ieee80211com *ic = ifp->if_l2com;
3877 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
3880 bus_dmamap_sync(sc->rxq.stat_dma.tag, sc->rxq.stat_dma.map,
3881 BUS_DMASYNC_POSTREAD);
3883 hw = le16toh(sc->rxq.stat->closed_count) & 0xfff;
3884 while (sc->rxq.cur != hw) {
3885 struct iwn_rx_data *data = &sc->rxq.data[sc->rxq.cur];
3886 struct iwn_rx_desc *desc;
3888 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3889 BUS_DMASYNC_POSTREAD);
3890 desc = mtod(data->m, struct iwn_rx_desc *);
3892 DPRINTF(sc, IWN_DEBUG_RECV,
3893 "%s: cur=%d; qid %x idx %d flags %x type %d(%s) len %d\n",
3894 __func__, sc->rxq.cur, desc->qid & 0xf, desc->idx, desc->flags,
3895 desc->type, iwn_intr_str(desc->type),
3896 le16toh(desc->len));
3898 if (!(desc->qid & IWN_UNSOLICITED_RX_NOTIF)) /* Reply to a command. */
3899 iwn_cmd_done(sc, desc);
3901 switch (desc->type) {
3903 iwn_rx_phy(sc, desc, data);
3906 case IWN_RX_DONE: /* 4965AGN only. */
3907 case IWN_MPDU_RX_DONE:
3908 /* An 802.11 frame has been received. */
3909 iwn_rx_done(sc, desc, data);
3912 case IWN_RX_COMPRESSED_BA:
3913 /* A Compressed BlockAck has been received. */
3914 iwn_rx_compressed_ba(sc, desc, data);
3918 /* An 802.11 frame has been transmitted. */
3919 ops->tx_done(sc, desc, data);
3922 case IWN_RX_STATISTICS:
3923 case IWN_BEACON_STATISTICS:
3924 iwn_rx_statistics(sc, desc, data);
3927 case IWN_BEACON_MISSED:
3929 struct iwn_beacon_missed *miss =
3930 (struct iwn_beacon_missed *)(desc + 1);
3933 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3934 BUS_DMASYNC_POSTREAD);
3935 misses = le32toh(miss->consecutive);
3937 DPRINTF(sc, IWN_DEBUG_STATE,
3938 "%s: beacons missed %d/%d\n", __func__,
3939 misses, le32toh(miss->total));
3941 * If more than 5 consecutive beacons are missed,
3942 * reinitialize the sensitivity state machine.
3944 if (vap->iv_state == IEEE80211_S_RUN &&
3945 (ic->ic_flags & IEEE80211_F_SCAN) == 0) {
3947 (void)iwn_init_sensitivity(sc);
3948 if (misses >= vap->iv_bmissthreshold) {
3950 ieee80211_beacon_miss(ic);
3958 struct iwn_ucode_info *uc =
3959 (struct iwn_ucode_info *)(desc + 1);
3961 /* The microcontroller is ready. */
3962 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3963 BUS_DMASYNC_POSTREAD);
3964 DPRINTF(sc, IWN_DEBUG_RESET,
3965 "microcode alive notification version=%d.%d "
3966 "subtype=%x alive=%x\n", uc->major, uc->minor,
3967 uc->subtype, le32toh(uc->valid));
3969 if (le32toh(uc->valid) != 1) {
3970 device_printf(sc->sc_dev,
3971 "microcontroller initialization failed");
3974 if (uc->subtype == IWN_UCODE_INIT) {
3975 /* Save microcontroller report. */
3976 memcpy(&sc->ucode_info, uc, sizeof (*uc));
3978 /* Save the address of the error log in SRAM. */
3979 sc->errptr = le32toh(uc->errptr);
3982 case IWN_STATE_CHANGED:
3985 * State change allows hardware switch change to be
3986 * noted. However, we handle this in iwn_intr as we
3987 * get both the enable/disble intr.
3989 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
3990 BUS_DMASYNC_POSTREAD);
3992 uint32_t *status = (uint32_t *)(desc + 1);
3993 DPRINTF(sc, IWN_DEBUG_INTR | IWN_DEBUG_STATE,
3994 "state changed to %x\n",
3999 case IWN_START_SCAN:
4001 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
4002 BUS_DMASYNC_POSTREAD);
4004 struct iwn_start_scan *scan =
4005 (struct iwn_start_scan *)(desc + 1);
4006 DPRINTF(sc, IWN_DEBUG_ANY,
4007 "%s: scanning channel %d status %x\n",
4008 __func__, scan->chan, le32toh(scan->status));
4014 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
4015 BUS_DMASYNC_POSTREAD);
4017 struct iwn_stop_scan *scan =
4018 (struct iwn_stop_scan *)(desc + 1);
4019 DPRINTF(sc, IWN_DEBUG_STATE | IWN_DEBUG_SCAN,
4020 "scan finished nchan=%d status=%d chan=%d\n",
4021 scan->nchan, scan->status, scan->chan);
4023 sc->sc_is_scanning = 0;
4025 ieee80211_scan_next(vap);
4029 case IWN5000_CALIBRATION_RESULT:
4030 iwn5000_rx_calib_results(sc, desc, data);
4033 case IWN5000_CALIBRATION_DONE:
4034 sc->sc_flags |= IWN_FLAG_CALIB_DONE;
4039 sc->rxq.cur = (sc->rxq.cur + 1) % IWN_RX_RING_COUNT;
4042 /* Tell the firmware what we have processed. */
4043 hw = (hw == 0) ? IWN_RX_RING_COUNT - 1 : hw - 1;
4044 IWN_WRITE(sc, IWN_FH_RX_WPTR, hw & ~7);
4048 * Process an INT_WAKEUP interrupt raised when the microcontroller wakes up
4049 * from power-down sleep mode.
4052 iwn_wakeup_intr(struct iwn_softc *sc)
4056 DPRINTF(sc, IWN_DEBUG_RESET, "%s: ucode wakeup from power-down sleep\n",
4059 /* Wakeup RX and TX rings. */
4060 IWN_WRITE(sc, IWN_FH_RX_WPTR, sc->rxq.cur & ~7);
4061 for (qid = 0; qid < sc->ntxqs; qid++) {
4062 struct iwn_tx_ring *ring = &sc->txq[qid];
4063 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | ring->cur);
4068 iwn_rftoggle_intr(struct iwn_softc *sc)
4070 struct ifnet *ifp = sc->sc_ifp;
4071 struct ieee80211com *ic = ifp->if_l2com;
4072 uint32_t tmp = IWN_READ(sc, IWN_GP_CNTRL);
4074 IWN_LOCK_ASSERT(sc);
4076 device_printf(sc->sc_dev, "RF switch: radio %s\n",
4077 (tmp & IWN_GP_CNTRL_RFKILL) ? "enabled" : "disabled");
4078 if (tmp & IWN_GP_CNTRL_RFKILL)
4079 ieee80211_runtask(ic, &sc->sc_radioon_task);
4081 ieee80211_runtask(ic, &sc->sc_radiooff_task);
4085 * Dump the error log of the firmware when a firmware panic occurs. Although
4086 * we can't debug the firmware because it is neither open source nor free, it
4087 * can help us to identify certain classes of problems.
4090 iwn_fatal_intr(struct iwn_softc *sc)
4092 struct iwn_fw_dump dump;
4095 IWN_LOCK_ASSERT(sc);
4097 /* Force a complete recalibration on next init. */
4098 sc->sc_flags &= ~IWN_FLAG_CALIB_DONE;
4100 /* Check that the error log address is valid. */
4101 if (sc->errptr < IWN_FW_DATA_BASE ||
4102 sc->errptr + sizeof (dump) >
4103 IWN_FW_DATA_BASE + sc->fw_data_maxsz) {
4104 kprintf("%s: bad firmware error log address 0x%08x\n", __func__,
4108 if (iwn_nic_lock(sc) != 0) {
4109 kprintf("%s: could not read firmware error log\n", __func__);
4112 /* Read firmware error log from SRAM. */
4113 iwn_mem_read_region_4(sc, sc->errptr, (uint32_t *)&dump,
4114 sizeof (dump) / sizeof (uint32_t));
4117 if (dump.valid == 0) {
4118 kprintf("%s: firmware error log is empty\n", __func__);
4121 kprintf("firmware error log:\n");
4122 kprintf(" error type = \"%s\" (0x%08X)\n",
4123 (dump.id < nitems(iwn_fw_errmsg)) ?
4124 iwn_fw_errmsg[dump.id] : "UNKNOWN",
4126 kprintf(" program counter = 0x%08X\n", dump.pc);
4127 kprintf(" source line = 0x%08X\n", dump.src_line);
4128 kprintf(" error data = 0x%08X%08X\n",
4129 dump.error_data[0], dump.error_data[1]);
4130 kprintf(" branch link = 0x%08X%08X\n",
4131 dump.branch_link[0], dump.branch_link[1]);
4132 kprintf(" interrupt link = 0x%08X%08X\n",
4133 dump.interrupt_link[0], dump.interrupt_link[1]);
4134 kprintf(" time = %u\n", dump.time[0]);
4136 /* Dump driver status (TX and RX rings) while we're here. */
4137 kprintf("driver status:\n");
4138 for (i = 0; i < sc->ntxqs; i++) {
4139 struct iwn_tx_ring *ring = &sc->txq[i];
4140 kprintf(" tx ring %2d: qid=%-2d cur=%-3d queued=%-3d\n",
4141 i, ring->qid, ring->cur, ring->queued);
4143 kprintf(" rx ring: cur=%d\n", sc->rxq.cur);
4149 struct iwn_softc *sc = arg;
4150 struct ifnet *ifp = sc->sc_ifp;
4151 uint32_t r1, r2, tmp;
4155 /* Disable interrupts. */
4156 IWN_WRITE(sc, IWN_INT_MASK, 0);
4158 /* Read interrupts from ICT (fast) or from registers (slow). */
4159 if (sc->sc_flags & IWN_FLAG_USE_ICT) {
4161 while (sc->ict[sc->ict_cur] != 0) {
4162 tmp |= sc->ict[sc->ict_cur];
4163 sc->ict[sc->ict_cur] = 0; /* Acknowledge. */
4164 sc->ict_cur = (sc->ict_cur + 1) % IWN_ICT_COUNT;
4167 if (tmp == 0xffffffff) /* Shouldn't happen. */
4169 else if (tmp & 0xc0000) /* Workaround a HW bug. */
4171 r1 = (tmp & 0xff00) << 16 | (tmp & 0xff);
4172 r2 = 0; /* Unused. */
4174 r1 = IWN_READ(sc, IWN_INT);
4175 if (r1 == 0xffffffff || (r1 & 0xfffffff0) == 0xa5a5a5a0)
4176 return; /* Hardware gone! */
4177 r2 = IWN_READ(sc, IWN_FH_INT);
4180 DPRINTF(sc, IWN_DEBUG_INTR, "interrupt reg1=0x%08x reg2=0x%08x\n"
4183 if (r1 == 0 && r2 == 0)
4184 goto done; /* Interrupt not for us. */
4186 /* Acknowledge interrupts. */
4187 IWN_WRITE(sc, IWN_INT, r1);
4188 if (!(sc->sc_flags & IWN_FLAG_USE_ICT))
4189 IWN_WRITE(sc, IWN_FH_INT, r2);
4191 if (r1 & IWN_INT_RF_TOGGLED) {
4192 iwn_rftoggle_intr(sc);
4195 if (r1 & IWN_INT_CT_REACHED) {
4196 device_printf(sc->sc_dev, "%s: critical temperature reached!\n",
4199 if (r1 & (IWN_INT_SW_ERR | IWN_INT_HW_ERR)) {
4200 device_printf(sc->sc_dev, "%s: fatal firmware error\n",
4203 iwn_debug_register(sc);
4205 /* Dump firmware error log and stop. */
4208 taskqueue_enqueue(sc->sc_tq, &sc->sc_panic_task);
4211 if ((r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX | IWN_INT_RX_PERIODIC)) ||
4212 (r2 & IWN_FH_INT_RX)) {
4213 if (sc->sc_flags & IWN_FLAG_USE_ICT) {
4214 if (r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX))
4215 IWN_WRITE(sc, IWN_FH_INT, IWN_FH_INT_RX);
4216 IWN_WRITE_1(sc, IWN_INT_PERIODIC,
4217 IWN_INT_PERIODIC_DIS);
4219 if (r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX)) {
4220 IWN_WRITE_1(sc, IWN_INT_PERIODIC,
4221 IWN_INT_PERIODIC_ENA);
4227 if ((r1 & IWN_INT_FH_TX) || (r2 & IWN_FH_INT_TX)) {
4228 if (sc->sc_flags & IWN_FLAG_USE_ICT)
4229 IWN_WRITE(sc, IWN_FH_INT, IWN_FH_INT_TX);
4230 wakeup(sc); /* FH DMA transfer completed. */
4233 if (r1 & IWN_INT_ALIVE)
4234 wakeup(sc); /* Firmware is alive. */
4236 if (r1 & IWN_INT_WAKEUP)
4237 iwn_wakeup_intr(sc);
4240 /* Re-enable interrupts. */
4241 if (ifp->if_flags & IFF_UP)
4242 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
4248 * Update TX scheduler ring when transmitting an 802.11 frame (4965AGN and
4249 * 5000 adapters use a slightly different format).
4252 iwn4965_update_sched(struct iwn_softc *sc, int qid, int idx, uint8_t id,
4255 uint16_t *w = &sc->sched[qid * IWN4965_SCHED_COUNT + idx];
4257 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
4259 *w = htole16(len + 8);
4260 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4261 BUS_DMASYNC_PREWRITE);
4262 if (idx < IWN_SCHED_WINSZ) {
4263 *(w + IWN_TX_RING_COUNT) = *w;
4264 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4265 BUS_DMASYNC_PREWRITE);
4270 iwn5000_update_sched(struct iwn_softc *sc, int qid, int idx, uint8_t id,
4273 uint16_t *w = &sc->sched[qid * IWN5000_SCHED_COUNT + idx];
4275 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
4277 *w = htole16(id << 12 | (len + 8));
4278 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4279 BUS_DMASYNC_PREWRITE);
4280 if (idx < IWN_SCHED_WINSZ) {
4281 *(w + IWN_TX_RING_COUNT) = *w;
4282 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4283 BUS_DMASYNC_PREWRITE);
4289 iwn5000_reset_sched(struct iwn_softc *sc, int qid, int idx)
4291 uint16_t *w = &sc->sched[qid * IWN5000_SCHED_COUNT + idx];
4293 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
4295 *w = (*w & htole16(0xf000)) | htole16(1);
4296 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4297 BUS_DMASYNC_PREWRITE);
4298 if (idx < IWN_SCHED_WINSZ) {
4299 *(w + IWN_TX_RING_COUNT) = *w;
4300 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
4301 BUS_DMASYNC_PREWRITE);
4307 * Check whether OFDM 11g protection will be enabled for the given rate.
4309 * The original driver code only enabled protection for OFDM rates.
4310 * It didn't check to see whether it was operating in 11a or 11bg mode.
4313 iwn_check_rate_needs_protection(struct iwn_softc *sc,
4314 struct ieee80211vap *vap, uint8_t rate)
4316 struct ieee80211com *ic = vap->iv_ic;
4319 * Not in 2GHz mode? Then there's no need to enable OFDM
4322 if (! IEEE80211_IS_CHAN_2GHZ(ic->ic_curchan)) {
4327 * 11bg protection not enabled? Then don't use it.
4329 if ((ic->ic_flags & IEEE80211_F_USEPROT) == 0)
4333 * If it's an 11n rate - no protection.
4334 * We'll do it via a specific 11n check.
4336 if (rate & IEEE80211_RATE_MCS) {
4341 * Do a rate table lookup. If the PHY is CCK,
4342 * don't do protection.
4344 if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_CCK)
4348 * Yup, enable protection.
4354 * return a value between 0 and IWN_MAX_TX_RETRIES-1 as an index into
4355 * the link quality table that reflects this particular entry.
4358 iwn_tx_rate_to_linkq_offset(struct iwn_softc *sc, struct ieee80211_node *ni,
4361 struct ieee80211_rateset *rs;
4368 * Figure out if we're using 11n or not here.
4370 if (IEEE80211_IS_CHAN_HT(ni->ni_chan) && ni->ni_htrates.rs_nrates > 0)
4376 * Use the correct rate table.
4379 rs = (struct ieee80211_rateset *) &ni->ni_htrates;
4380 nr = ni->ni_htrates.rs_nrates;
4387 * Find the relevant link quality entry in the table.
4389 for (i = 0; i < nr && i < IWN_MAX_TX_RETRIES - 1 ; i++) {
4391 * The link quality table index starts at 0 == highest
4392 * rate, so we walk the rate table backwards.
4394 cmp_rate = rs->rs_rates[(nr - 1) - i];
4395 if (rate & IEEE80211_RATE_MCS)
4396 cmp_rate |= IEEE80211_RATE_MCS;
4399 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: idx %d: nr=%d, rate=0x%02x, rateentry=0x%02x\n",
4407 if (cmp_rate == rate)
4411 /* Failed? Start at the end */
4412 return (IWN_MAX_TX_RETRIES - 1);
4416 iwn_tx_data(struct iwn_softc *sc, struct mbuf *m, struct ieee80211_node *ni)
4418 struct iwn_ops *ops = &sc->ops;
4419 const struct ieee80211_txparam *tp;
4420 struct ieee80211vap *vap = ni->ni_vap;
4421 struct ieee80211com *ic = ni->ni_ic;
4422 struct iwn_node *wn = (void *)ni;
4423 struct iwn_tx_ring *ring;
4424 struct iwn_tx_desc *desc;
4425 struct iwn_tx_data *data;
4426 struct iwn_tx_cmd *cmd;
4427 struct iwn_cmd_data *tx;
4428 struct ieee80211_frame *wh;
4429 struct ieee80211_key *k = NULL;
4434 bus_dma_segment_t *seg, segs[IWN_MAX_SCATTER];
4436 int ac, i, totlen, error, pad, nsegs = 0, rate;
4438 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
4440 IWN_LOCK_ASSERT(sc);
4442 wh = mtod(m, struct ieee80211_frame *);
4443 hdrlen = ieee80211_anyhdrsize(wh);
4444 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
4446 /* Select EDCA Access Category and TX ring for this frame. */
4447 if (IEEE80211_QOS_HAS_SEQ(wh)) {
4448 qos = ((const struct ieee80211_qosframe *)wh)->i_qos[0];
4449 tid = qos & IEEE80211_QOS_TID;
4454 ac = M_WME_GETAC(m);
4455 if (m->m_flags & M_AMPDU_MPDU) {
4457 struct ieee80211_tx_ampdu *tap = &ni->ni_tx_ampdu[ac];
4459 if (!IEEE80211_AMPDU_RUNNING(tap)) {
4465 * Queue this frame to the hardware ring that we've
4466 * negotiated AMPDU TX on.
4468 * Note that the sequence number must match the TX slot
4471 ac = *(int *)tap->txa_private;
4472 seqno = ni->ni_txseqs[tid];
4473 *(uint16_t *)wh->i_seq =
4474 htole16(seqno << IEEE80211_SEQ_SEQ_SHIFT);
4475 ring = &sc->txq[ac];
4476 if ((seqno % 256) != ring->cur) {
4477 device_printf(sc->sc_dev,
4478 "%s: m=%p: seqno (%d) (%d) != ring index (%d) !\n",
4485 ni->ni_txseqs[tid]++;
4487 ring = &sc->txq[ac];
4488 desc = &ring->desc[ring->cur];
4489 data = &ring->data[ring->cur];
4491 /* Choose a TX rate index. */
4492 tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)];
4493 if (type == IEEE80211_FC0_TYPE_MGT)
4494 rate = tp->mgmtrate;
4495 else if (IEEE80211_IS_MULTICAST(wh->i_addr1))
4496 rate = tp->mcastrate;
4497 else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE)
4498 rate = tp->ucastrate;
4499 else if (m->m_flags & M_EAPOL)
4500 rate = tp->mgmtrate;
4502 /* XXX pass pktlen */
4503 (void) ieee80211_ratectl_rate(ni, NULL, 0);
4504 rate = ni->ni_txrate;
4507 /* Encrypt the frame if need be. */
4508 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) {
4509 /* Retrieve key for TX. */
4510 k = ieee80211_crypto_encap(ni, m);
4515 /* 802.11 header may have moved. */
4516 wh = mtod(m, struct ieee80211_frame *);
4518 totlen = m->m_pkthdr.len;
4520 if (ieee80211_radiotap_active_vap(vap)) {
4521 struct iwn_tx_radiotap_header *tap = &sc->sc_txtap;
4524 tap->wt_rate = rate;
4526 tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP;
4528 ieee80211_radiotap_tx(vap, m);
4531 /* Prepare TX firmware command. */
4532 cmd = &ring->cmd[ring->cur];
4533 cmd->code = IWN_CMD_TX_DATA;
4535 cmd->qid = ring->qid;
4536 cmd->idx = ring->cur;
4538 tx = (struct iwn_cmd_data *)cmd->data;
4539 /* NB: No need to clear tx, all fields are reinitialized here. */
4540 tx->scratch = 0; /* clear "scratch" area */
4543 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
4544 /* Unicast frame, check if an ACK is expected. */
4545 if (!qos || (qos & IEEE80211_QOS_ACKPOLICY) !=
4546 IEEE80211_QOS_ACKPOLICY_NOACK)
4547 flags |= IWN_TX_NEED_ACK;
4550 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
4551 (IEEE80211_FC0_TYPE_CTL | IEEE80211_FC0_SUBTYPE_BAR))
4552 flags |= IWN_TX_IMM_BA; /* Cannot happen yet. */
4554 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG)
4555 flags |= IWN_TX_MORE_FRAG; /* Cannot happen yet. */
4557 /* Check if frame must be protected using RTS/CTS or CTS-to-self. */
4558 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
4559 /* NB: Group frames are sent using CCK in 802.11b/g. */
4560 if (totlen + IEEE80211_CRC_LEN > vap->iv_rtsthreshold) {
4561 flags |= IWN_TX_NEED_RTS;
4562 } else if (iwn_check_rate_needs_protection(sc, vap, rate)) {
4563 if (ic->ic_protmode == IEEE80211_PROT_CTSONLY)
4564 flags |= IWN_TX_NEED_CTS;
4565 else if (ic->ic_protmode == IEEE80211_PROT_RTSCTS)
4566 flags |= IWN_TX_NEED_RTS;
4567 } else if ((rate & IEEE80211_RATE_MCS) &&
4568 (ic->ic_htprotmode == IEEE80211_PROT_RTSCTS)) {
4569 flags |= IWN_TX_NEED_RTS;
4572 /* XXX HT protection? */
4574 if (flags & (IWN_TX_NEED_RTS | IWN_TX_NEED_CTS)) {
4575 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
4576 /* 5000 autoselects RTS/CTS or CTS-to-self. */
4577 flags &= ~(IWN_TX_NEED_RTS | IWN_TX_NEED_CTS);
4578 flags |= IWN_TX_NEED_PROTECTION;
4580 flags |= IWN_TX_FULL_TXOP;
4584 if (IEEE80211_IS_MULTICAST(wh->i_addr1) ||
4585 type != IEEE80211_FC0_TYPE_DATA)
4586 tx->id = sc->broadcast_id;
4590 if (type == IEEE80211_FC0_TYPE_MGT) {
4591 uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
4593 /* Tell HW to set timestamp in probe responses. */
4594 if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
4595 flags |= IWN_TX_INSERT_TSTAMP;
4596 if (subtype == IEEE80211_FC0_SUBTYPE_ASSOC_REQ ||
4597 subtype == IEEE80211_FC0_SUBTYPE_REASSOC_REQ)
4598 tx->timeout = htole16(3);
4600 tx->timeout = htole16(2);
4602 tx->timeout = htole16(0);
4605 /* First segment length must be a multiple of 4. */
4606 flags |= IWN_TX_NEED_PADDING;
4607 pad = 4 - (hdrlen & 3);
4611 tx->len = htole16(totlen);
4613 tx->rts_ntries = 60;
4614 tx->data_ntries = 15;
4615 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
4616 tx->rate = iwn_rate_to_plcp(sc, ni, rate);
4617 if (tx->id == sc->broadcast_id) {
4618 /* Group or management frame. */
4621 tx->linkq = iwn_tx_rate_to_linkq_offset(sc, ni, rate);
4622 flags |= IWN_TX_LINKQ; /* enable MRR */
4625 /* Set physical address of "scratch area". */
4626 tx->loaddr = htole32(IWN_LOADDR(data->scratch_paddr));
4627 tx->hiaddr = IWN_HIADDR(data->scratch_paddr);
4629 /* Copy 802.11 header in TX command. */
4630 memcpy((uint8_t *)(tx + 1), wh, hdrlen);
4632 /* Trim 802.11 header. */
4635 tx->flags = htole32(flags);
4637 #if defined(__DragonFly__)
4638 error = bus_dmamap_load_mbuf_segment(ring->data_dmat,
4640 segs, IWN_MAX_SCATTER - 1,
4641 &nsegs, BUS_DMA_NOWAIT);
4643 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m, segs,
4644 &nsegs, BUS_DMA_NOWAIT);
4647 if (error != EFBIG) {
4648 device_printf(sc->sc_dev,
4649 "%s: can't map mbuf (error %d)\n", __func__, error);
4653 /* Too many DMA segments, linearize mbuf. */
4654 #if defined(__DragonFly__)
4655 m1 = m_defrag(m, M_NOWAIT);
4657 m1 = m_collapse(m, M_NOWAIT, IWN_MAX_SCATTER);
4660 device_printf(sc->sc_dev,
4661 "%s: could not defrag mbuf\n", __func__);
4667 #if defined(__DragonFly__)
4668 error = bus_dmamap_load_mbuf_segment(ring->data_dmat,
4670 segs, IWN_MAX_SCATTER - 1,
4671 &nsegs, BUS_DMA_NOWAIT);
4673 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m,
4674 segs, &nsegs, BUS_DMA_NOWAIT);
4677 device_printf(sc->sc_dev,
4678 "%s: can't map mbuf (error %d)\n", __func__, error);
4687 DPRINTF(sc, IWN_DEBUG_XMIT,
4688 "%s: qid %d idx %d len %d nsegs %d flags 0x%08x rate 0x%04x plcp 0x%08x\n",
4698 /* Fill TX descriptor. */
4701 desc->nsegs += nsegs;
4702 /* First DMA segment is used by the TX command. */
4703 desc->segs[0].addr = htole32(IWN_LOADDR(data->cmd_paddr));
4704 desc->segs[0].len = htole16(IWN_HIADDR(data->cmd_paddr) |
4705 (4 + sizeof (*tx) + hdrlen + pad) << 4);
4706 /* Other DMA segments are for data payload. */
4708 for (i = 1; i <= nsegs; i++) {
4709 desc->segs[i].addr = htole32(IWN_LOADDR(seg->ds_addr));
4710 desc->segs[i].len = htole16(IWN_HIADDR(seg->ds_addr) |
4715 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
4716 bus_dmamap_sync(ring->data_dmat, ring->cmd_dma.map,
4717 BUS_DMASYNC_PREWRITE);
4718 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
4719 BUS_DMASYNC_PREWRITE);
4721 /* Update TX scheduler. */
4722 if (ring->qid >= sc->firstaggqueue)
4723 ops->update_sched(sc, ring->qid, ring->cur, tx->id, totlen);
4726 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
4727 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
4729 /* Mark TX ring as full if we reach a certain threshold. */
4730 if (++ring->queued > IWN_TX_RING_HIMARK)
4731 sc->qfullmsk |= 1 << ring->qid;
4733 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
4739 iwn_tx_data_raw(struct iwn_softc *sc, struct mbuf *m,
4740 struct ieee80211_node *ni, const struct ieee80211_bpf_params *params)
4742 struct iwn_ops *ops = &sc->ops;
4743 // struct ifnet *ifp = sc->sc_ifp;
4744 struct ieee80211vap *vap = ni->ni_vap;
4745 // struct ieee80211com *ic = ifp->if_l2com;
4746 struct iwn_tx_cmd *cmd;
4747 struct iwn_cmd_data *tx;
4748 struct ieee80211_frame *wh;
4749 struct iwn_tx_ring *ring;
4750 struct iwn_tx_desc *desc;
4751 struct iwn_tx_data *data;
4753 bus_dma_segment_t *seg, segs[IWN_MAX_SCATTER];
4756 int ac, totlen, error, pad, nsegs = 0, i, rate;
4759 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
4761 IWN_LOCK_ASSERT(sc);
4763 wh = mtod(m, struct ieee80211_frame *);
4764 hdrlen = ieee80211_anyhdrsize(wh);
4765 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
4767 ac = params->ibp_pri & 3;
4769 ring = &sc->txq[ac];
4770 desc = &ring->desc[ring->cur];
4771 data = &ring->data[ring->cur];
4773 /* Choose a TX rate. */
4774 rate = params->ibp_rate0;
4775 totlen = m->m_pkthdr.len;
4777 /* Prepare TX firmware command. */
4778 cmd = &ring->cmd[ring->cur];
4779 cmd->code = IWN_CMD_TX_DATA;
4781 cmd->qid = ring->qid;
4782 cmd->idx = ring->cur;
4784 tx = (struct iwn_cmd_data *)cmd->data;
4785 /* NB: No need to clear tx, all fields are reinitialized here. */
4786 tx->scratch = 0; /* clear "scratch" area */
4789 if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0)
4790 flags |= IWN_TX_NEED_ACK;
4791 if (params->ibp_flags & IEEE80211_BPF_RTS) {
4792 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
4793 /* 5000 autoselects RTS/CTS or CTS-to-self. */
4794 flags &= ~IWN_TX_NEED_RTS;
4795 flags |= IWN_TX_NEED_PROTECTION;
4797 flags |= IWN_TX_NEED_RTS | IWN_TX_FULL_TXOP;
4799 if (params->ibp_flags & IEEE80211_BPF_CTS) {
4800 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
4801 /* 5000 autoselects RTS/CTS or CTS-to-self. */
4802 flags &= ~IWN_TX_NEED_CTS;
4803 flags |= IWN_TX_NEED_PROTECTION;
4805 flags |= IWN_TX_NEED_CTS | IWN_TX_FULL_TXOP;
4807 if (type == IEEE80211_FC0_TYPE_MGT) {
4808 uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
4810 /* Tell HW to set timestamp in probe responses. */
4811 if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
4812 flags |= IWN_TX_INSERT_TSTAMP;
4814 if (subtype == IEEE80211_FC0_SUBTYPE_ASSOC_REQ ||
4815 subtype == IEEE80211_FC0_SUBTYPE_REASSOC_REQ)
4816 tx->timeout = htole16(3);
4818 tx->timeout = htole16(2);
4820 tx->timeout = htole16(0);
4823 /* First segment length must be a multiple of 4. */
4824 flags |= IWN_TX_NEED_PADDING;
4825 pad = 4 - (hdrlen & 3);
4829 if (ieee80211_radiotap_active_vap(vap)) {
4830 struct iwn_tx_radiotap_header *tap = &sc->sc_txtap;
4833 tap->wt_rate = rate;
4835 ieee80211_radiotap_tx(vap, m);
4838 tx->len = htole16(totlen);
4840 tx->id = sc->broadcast_id;
4841 tx->rts_ntries = params->ibp_try1;
4842 tx->data_ntries = params->ibp_try0;
4843 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
4844 tx->rate = iwn_rate_to_plcp(sc, ni, rate);
4846 /* Group or management frame. */
4849 /* Set physical address of "scratch area". */
4850 tx->loaddr = htole32(IWN_LOADDR(data->scratch_paddr));
4851 tx->hiaddr = IWN_HIADDR(data->scratch_paddr);
4853 /* Copy 802.11 header in TX command. */
4854 memcpy((uint8_t *)(tx + 1), wh, hdrlen);
4856 /* Trim 802.11 header. */
4859 tx->flags = htole32(flags);
4861 #if defined(__DragonFly__)
4862 error = bus_dmamap_load_mbuf_segment(ring->data_dmat, data->map,
4863 m, segs, IWN_MAX_SCATTER - 1,
4864 &nsegs, BUS_DMA_NOWAIT);
4866 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m, segs,
4867 &nsegs, BUS_DMA_NOWAIT);
4870 if (error != EFBIG) {
4871 device_printf(sc->sc_dev,
4872 "%s: can't map mbuf (error %d)\n", __func__, error);
4876 /* Too many DMA segments, linearize mbuf. */
4877 #if defined(__DragonFly__)
4878 m1 = m_defrag(m, M_NOWAIT);
4880 m1 = m_collapse(m, M_NOWAIT, IWN_MAX_SCATTER);
4883 device_printf(sc->sc_dev,
4884 "%s: could not defrag mbuf\n", __func__);
4890 #if defined(__DragonFly__)
4891 error = bus_dmamap_load_mbuf_segment(ring->data_dmat,
4893 segs, IWN_MAX_SCATTER - 1,
4894 &nsegs, BUS_DMA_NOWAIT);
4896 error = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m,
4897 segs, &nsegs, BUS_DMA_NOWAIT);
4900 device_printf(sc->sc_dev,
4901 "%s: can't map mbuf (error %d)\n", __func__, error);
4910 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: qid %d idx %d len %d nsegs %d\n",
4911 __func__, ring->qid, ring->cur, m->m_pkthdr.len, nsegs);
4913 /* Fill TX descriptor. */
4916 desc->nsegs += nsegs;
4917 /* First DMA segment is used by the TX command. */
4918 desc->segs[0].addr = htole32(IWN_LOADDR(data->cmd_paddr));
4919 desc->segs[0].len = htole16(IWN_HIADDR(data->cmd_paddr) |
4920 (4 + sizeof (*tx) + hdrlen + pad) << 4);
4921 /* Other DMA segments are for data payload. */
4923 for (i = 1; i <= nsegs; i++) {
4924 desc->segs[i].addr = htole32(IWN_LOADDR(seg->ds_addr));
4925 desc->segs[i].len = htole16(IWN_HIADDR(seg->ds_addr) |
4930 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
4931 bus_dmamap_sync(ring->data_dmat, ring->cmd_dma.map,
4932 BUS_DMASYNC_PREWRITE);
4933 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
4934 BUS_DMASYNC_PREWRITE);
4936 /* Update TX scheduler. */
4937 if (ring->qid >= sc->firstaggqueue)
4938 ops->update_sched(sc, ring->qid, ring->cur, tx->id, totlen);
4941 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
4942 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
4944 /* Mark TX ring as full if we reach a certain threshold. */
4945 if (++ring->queued > IWN_TX_RING_HIMARK)
4946 sc->qfullmsk |= 1 << ring->qid;
4948 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
4954 iwn_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
4955 const struct ieee80211_bpf_params *params)
4957 struct ieee80211com *ic = ni->ni_ic;
4958 struct ifnet *ifp = ic->ic_ifp;
4959 struct iwn_softc *sc = ifp->if_softc;
4962 DPRINTF(sc, IWN_DEBUG_XMIT | IWN_DEBUG_TRACE, "->%s begin\n", __func__);
4964 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
4965 ieee80211_free_node(ni);
4971 if (params == NULL) {
4973 * Legacy path; interpret frame contents to decide
4974 * precisely how to send the frame.
4976 error = iwn_tx_data(sc, m, ni);
4979 * Caller supplied explicit parameters to use in
4980 * sending the frame.
4982 error = iwn_tx_data_raw(sc, m, ni, params);
4985 /* NB: m is reclaimed on tx failure */
4986 ieee80211_free_node(ni);
4987 #if defined(__DragonFly__)
4990 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
4993 sc->sc_tx_timer = 5;
4997 DPRINTF(sc, IWN_DEBUG_TRACE | IWN_DEBUG_XMIT, "->%s: end\n",__func__);
5002 #if defined(__DragonFly__)
5004 iwn_start(struct ifnet *ifp, struct ifaltq_subque *ifsq)
5007 iwn_start(struct ifnet *ifp)
5010 struct iwn_softc *sc = ifp->if_softc;
5013 iwn_start_locked(ifp);
5017 #if defined(__DragonFly__)
5020 iwn_start_locked(struct ifnet *ifp)
5022 struct iwn_softc *sc = ifp->if_softc;
5023 struct ieee80211_node *ni;
5026 IWN_LOCK_ASSERT(sc);
5028 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: called\n", __func__);
5030 if ((ifp->if_flags & IFF_RUNNING) == 0 ||
5031 ifq_is_oactive(&ifp->if_snd))
5035 if (sc->qfullmsk != 0) {
5036 ifq_set_oactive(&ifp->if_snd);
5039 m = ifq_dequeue(&ifp->if_snd);
5042 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
5043 if (iwn_tx_data(sc, m, ni) != 0) {
5044 ieee80211_free_node(ni);
5048 sc->sc_tx_timer = 5;
5051 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: done\n", __func__);
5057 iwn_start_locked(struct ifnet *ifp)
5059 struct iwn_softc *sc = ifp->if_softc;
5060 struct ieee80211_node *ni;
5063 IWN_LOCK_ASSERT(sc);
5065 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: called\n", __func__);
5067 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 ||
5068 (ifp->if_drv_flags & IFF_DRV_OACTIVE))
5072 if (sc->qfullmsk != 0) {
5073 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
5076 IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
5079 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
5080 if (iwn_tx_data(sc, m, ni) != 0) {
5081 ieee80211_free_node(ni);
5082 #if defined(__DragonFly__)
5085 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
5089 sc->sc_tx_timer = 5;
5092 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: done\n", __func__);
5098 iwn_watchdog(void *arg)
5100 struct iwn_softc *sc = arg;
5101 struct ifnet *ifp = sc->sc_ifp;
5102 struct ieee80211com *ic = ifp->if_l2com;
5104 IWN_LOCK_ASSERT(sc);
5106 KASSERT(ifp->if_drv_flags & IFF_DRV_RUNNING, ("not running"));
5108 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5110 if (sc->sc_tx_timer > 0) {
5111 if (--sc->sc_tx_timer == 0) {
5112 if_printf(ifp, "device timeout\n");
5113 ieee80211_runtask(ic, &sc->sc_reinit_task);
5117 callout_reset(&sc->watchdog_to, hz, iwn_watchdog, sc);
5120 #if defined(__DragonFly__)
5122 iwn_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data,
5123 struct ucred *cred __unused)
5126 iwn_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
5129 struct iwn_softc *sc = ifp->if_softc;
5130 struct ieee80211com *ic = ifp->if_l2com;
5131 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
5132 struct ifreq *ifr = (struct ifreq *) data;
5133 int error = 0, startall = 0, stop = 0;
5137 error = ether_ioctl(ifp, cmd, data);
5141 if (ifp->if_flags & IFF_UP) {
5142 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
5143 iwn_init_locked(sc);
5144 if (IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_RFKILL)
5150 if (ifp->if_drv_flags & IFF_DRV_RUNNING)
5151 iwn_stop_locked(sc);
5155 ieee80211_start_all(ic);
5156 else if (vap != NULL && stop)
5157 ieee80211_stop(vap);
5160 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd);
5164 /* XXX validate permissions/memory/etc? */
5165 error = copyout(&sc->last_stat, ifr->ifr_data,
5166 sizeof(struct iwn_stats));
5171 memset(&sc->last_stat, 0, sizeof(struct iwn_stats));
5183 * Send a command to the firmware.
5186 iwn_cmd(struct iwn_softc *sc, int code, const void *buf, int size, int async)
5188 struct iwn_tx_ring *ring;
5189 struct iwn_tx_desc *desc;
5190 struct iwn_tx_data *data;
5191 struct iwn_tx_cmd *cmd;
5197 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5200 IWN_LOCK_ASSERT(sc);
5202 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT)
5203 cmd_queue_num = IWN_PAN_CMD_QUEUE;
5205 cmd_queue_num = IWN_CMD_QUEUE_NUM;
5207 ring = &sc->txq[cmd_queue_num];
5208 desc = &ring->desc[ring->cur];
5209 data = &ring->data[ring->cur];
5212 if (size > sizeof cmd->data) {
5213 /* Command is too large to fit in a descriptor. */
5214 if (totlen > MCLBYTES)
5216 m = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, MJUMPAGESIZE);
5219 cmd = mtod(m, struct iwn_tx_cmd *);
5220 error = bus_dmamap_load(ring->data_dmat, data->map, cmd,
5221 totlen, iwn_dma_map_addr, &paddr, BUS_DMA_NOWAIT);
5228 cmd = &ring->cmd[ring->cur];
5229 paddr = data->cmd_paddr;
5234 cmd->qid = ring->qid;
5235 cmd->idx = ring->cur;
5236 memcpy(cmd->data, buf, size);
5239 desc->segs[0].addr = htole32(IWN_LOADDR(paddr));
5240 desc->segs[0].len = htole16(IWN_HIADDR(paddr) | totlen << 4);
5242 DPRINTF(sc, IWN_DEBUG_CMD, "%s: %s (0x%x) flags %d qid %d idx %d\n",
5243 __func__, iwn_intr_str(cmd->code), cmd->code,
5244 cmd->flags, cmd->qid, cmd->idx);
5246 if (size > sizeof cmd->data) {
5247 bus_dmamap_sync(ring->data_dmat, data->map,
5248 BUS_DMASYNC_PREWRITE);
5250 bus_dmamap_sync(ring->data_dmat, ring->cmd_dma.map,
5251 BUS_DMASYNC_PREWRITE);
5253 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
5254 BUS_DMASYNC_PREWRITE);
5256 /* Kick command ring. */
5257 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
5258 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
5260 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5262 return async ? 0 : iwn_sleep(sc, desc, PCATCH, "iwncmd", hz);
5266 iwn4965_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async)
5268 struct iwn4965_node_info hnode;
5271 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5274 * We use the node structure for 5000 Series internally (it is
5275 * a superset of the one for 4965AGN). We thus copy the common
5276 * fields before sending the command.
5278 src = (caddr_t)node;
5279 dst = (caddr_t)&hnode;
5280 memcpy(dst, src, 48);
5281 /* Skip TSC, RX MIC and TX MIC fields from ``src''. */
5282 memcpy(dst + 48, src + 72, 20);
5283 return iwn_cmd(sc, IWN_CMD_ADD_NODE, &hnode, sizeof hnode, async);
5287 iwn5000_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async)
5290 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5292 /* Direct mapping. */
5293 return iwn_cmd(sc, IWN_CMD_ADD_NODE, node, sizeof (*node), async);
5297 iwn_set_link_quality(struct iwn_softc *sc, struct ieee80211_node *ni)
5299 #define RV(v) ((v) & IEEE80211_RATE_VAL)
5300 struct iwn_node *wn = (void *)ni;
5301 struct ieee80211_rateset *rs;
5302 struct iwn_cmd_link_quality linkq;
5303 int i, rate, txrate;
5306 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5308 memset(&linkq, 0, sizeof linkq);
5310 linkq.antmsk_1stream = iwn_get_1stream_tx_antmask(sc);
5311 linkq.antmsk_2stream = iwn_get_2stream_tx_antmask(sc);
5313 linkq.ampdu_max = 32; /* XXX negotiated? */
5314 linkq.ampdu_threshold = 3;
5315 linkq.ampdu_limit = htole16(4000); /* 4ms */
5317 DPRINTF(sc, IWN_DEBUG_XMIT,
5318 "%s: 1stream antenna=0x%02x, 2stream antenna=0x%02x, ntxstreams=%d\n",
5320 linkq.antmsk_1stream,
5321 linkq.antmsk_2stream,
5325 * Are we using 11n rates? Ensure the channel is
5326 * 11n _and_ we have some 11n rates, or don't
5329 if (IEEE80211_IS_CHAN_HT(ni->ni_chan) && ni->ni_htrates.rs_nrates > 0) {
5330 rs = (struct ieee80211_rateset *) &ni->ni_htrates;
5337 /* Start at highest available bit-rate. */
5339 * XXX this is all very dirty!
5342 txrate = ni->ni_htrates.rs_nrates - 1;
5344 txrate = rs->rs_nrates - 1;
5345 for (i = 0; i < IWN_MAX_TX_RETRIES; i++) {
5349 * XXX TODO: ensure the last two slots are the two lowest
5350 * rate entries, just for now.
5352 if (i == 14 || i == 15)
5356 rate = IEEE80211_RATE_MCS | rs->rs_rates[txrate];
5358 rate = RV(rs->rs_rates[txrate]);
5360 /* Do rate -> PLCP config mapping */
5361 plcp = iwn_rate_to_plcp(sc, ni, rate);
5362 linkq.retry[i] = plcp;
5363 DPRINTF(sc, IWN_DEBUG_XMIT,
5364 "%s: i=%d, txrate=%d, rate=0x%02x, plcp=0x%08x\n",
5372 * The mimo field is an index into the table which
5373 * indicates the first index where it and subsequent entries
5374 * will not be using MIMO.
5376 * Since we're filling linkq from 0..15 and we're filling
5377 * from the higest MCS rates to the lowest rates, if we
5378 * _are_ doing a dual-stream rate, set mimo to idx+1 (ie,
5379 * the next entry.) That way if the next entry is a non-MIMO
5380 * entry, we're already pointing at it.
5382 if ((le32toh(plcp) & IWN_RFLAG_MCS) &&
5383 RV(le32toh(plcp)) > 7)
5386 /* Next retry at immediate lower bit-rate. */
5391 * If we reached the end of the list and indeed we hit
5392 * all MIMO rates (eg 5300 doing MCS23-15) then yes,
5393 * set mimo to 15. Setting it to 16 panics the firmware.
5395 if (linkq.mimo > 15)
5398 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: mimo = %d\n", __func__, linkq.mimo);
5400 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5402 return iwn_cmd(sc, IWN_CMD_LINK_QUALITY, &linkq, sizeof linkq, 1);
5407 * Broadcast node is used to send group-addressed and management frames.
5410 iwn_add_broadcast_node(struct iwn_softc *sc, int async)
5412 struct iwn_ops *ops = &sc->ops;
5413 struct ifnet *ifp = sc->sc_ifp;
5414 struct ieee80211com *ic = ifp->if_l2com;
5415 struct iwn_node_info node;
5416 struct iwn_cmd_link_quality linkq;
5420 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5422 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
5424 memset(&node, 0, sizeof node);
5425 IEEE80211_ADDR_COPY(node.macaddr, ifp->if_broadcastaddr);
5426 node.id = sc->broadcast_id;
5427 DPRINTF(sc, IWN_DEBUG_RESET, "%s: adding broadcast node\n", __func__);
5428 if ((error = ops->add_node(sc, &node, async)) != 0)
5431 /* Use the first valid TX antenna. */
5432 txant = IWN_LSB(sc->txchainmask);
5434 memset(&linkq, 0, sizeof linkq);
5435 linkq.id = sc->broadcast_id;
5436 linkq.antmsk_1stream = iwn_get_1stream_tx_antmask(sc);
5437 linkq.antmsk_2stream = iwn_get_2stream_tx_antmask(sc);
5438 linkq.ampdu_max = 64;
5439 linkq.ampdu_threshold = 3;
5440 linkq.ampdu_limit = htole16(4000); /* 4ms */
5442 /* Use lowest mandatory bit-rate. */
5443 /* XXX rate table lookup? */
5444 if (IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan))
5445 linkq.retry[0] = htole32(0xd);
5447 linkq.retry[0] = htole32(10 | IWN_RFLAG_CCK);
5448 linkq.retry[0] |= htole32(IWN_RFLAG_ANT(txant));
5449 /* Use same bit-rate for all TX retries. */
5450 for (i = 1; i < IWN_MAX_TX_RETRIES; i++) {
5451 linkq.retry[i] = linkq.retry[0];
5454 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5456 return iwn_cmd(sc, IWN_CMD_LINK_QUALITY, &linkq, sizeof linkq, async);
5460 iwn_updateedca(struct ieee80211com *ic)
5462 #define IWN_EXP2(x) ((1 << (x)) - 1) /* CWmin = 2^ECWmin - 1 */
5463 struct iwn_softc *sc = ic->ic_ifp->if_softc;
5464 struct iwn_edca_params cmd;
5467 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5469 memset(&cmd, 0, sizeof cmd);
5470 cmd.flags = htole32(IWN_EDCA_UPDATE);
5471 for (aci = 0; aci < WME_NUM_AC; aci++) {
5472 const struct wmeParams *ac =
5473 &ic->ic_wme.wme_chanParams.cap_wmeParams[aci];
5474 cmd.ac[aci].aifsn = ac->wmep_aifsn;
5475 cmd.ac[aci].cwmin = htole16(IWN_EXP2(ac->wmep_logcwmin));
5476 cmd.ac[aci].cwmax = htole16(IWN_EXP2(ac->wmep_logcwmax));
5477 cmd.ac[aci].txoplimit =
5478 htole16(IEEE80211_TXOP_TO_US(ac->wmep_txopLimit));
5480 IEEE80211_UNLOCK(ic);
5482 (void)iwn_cmd(sc, IWN_CMD_EDCA_PARAMS, &cmd, sizeof cmd, 1);
5486 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
5493 iwn_update_mcast(struct ifnet *ifp)
5499 iwn_set_led(struct iwn_softc *sc, uint8_t which, uint8_t off, uint8_t on)
5501 struct iwn_cmd_led led;
5503 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5506 /* XXX don't set LEDs during scan? */
5507 if (sc->sc_is_scanning)
5511 /* Clear microcode LED ownership. */
5512 IWN_CLRBITS(sc, IWN_LED, IWN_LED_BSM_CTRL);
5515 led.unit = htole32(10000); /* on/off in unit of 100ms */
5518 (void)iwn_cmd(sc, IWN_CMD_SET_LED, &led, sizeof led, 1);
5522 * Set the critical temperature at which the firmware will stop the radio
5526 iwn_set_critical_temp(struct iwn_softc *sc)
5528 struct iwn_critical_temp crit;
5531 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5533 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_CTEMP_STOP_RF);
5535 if (sc->hw_type == IWN_HW_REV_TYPE_5150)
5536 temp = (IWN_CTOK(110) - sc->temp_off) * -5;
5537 else if (sc->hw_type == IWN_HW_REV_TYPE_4965)
5538 temp = IWN_CTOK(110);
5541 memset(&crit, 0, sizeof crit);
5542 crit.tempR = htole32(temp);
5543 DPRINTF(sc, IWN_DEBUG_RESET, "setting critical temp to %d\n", temp);
5544 return iwn_cmd(sc, IWN_CMD_SET_CRITICAL_TEMP, &crit, sizeof crit, 0);
5548 iwn_set_timing(struct iwn_softc *sc, struct ieee80211_node *ni)
5550 struct iwn_cmd_timing cmd;
5553 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5555 memset(&cmd, 0, sizeof cmd);
5556 memcpy(&cmd.tstamp, ni->ni_tstamp.data, sizeof (uint64_t));
5557 cmd.bintval = htole16(ni->ni_intval);
5558 cmd.lintval = htole16(10);
5560 /* Compute remaining time until next beacon. */
5561 val = (uint64_t)ni->ni_intval * IEEE80211_DUR_TU;
5562 mod = le64toh(cmd.tstamp) % val;
5563 cmd.binitval = htole32((uint32_t)(val - mod));
5565 DPRINTF(sc, IWN_DEBUG_RESET, "timing bintval=%u tstamp=%ju, init=%u\n",
5566 ni->ni_intval, le64toh(cmd.tstamp), (uint32_t)(val - mod));
5568 return iwn_cmd(sc, IWN_CMD_TIMING, &cmd, sizeof cmd, 1);
5572 iwn4965_power_calibration(struct iwn_softc *sc, int temp)
5574 struct ifnet *ifp = sc->sc_ifp;
5575 struct ieee80211com *ic = ifp->if_l2com;
5577 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5579 /* Adjust TX power if need be (delta >= 3 degC). */
5580 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: temperature %d->%d\n",
5581 __func__, sc->temp, temp);
5582 if (abs(temp - sc->temp) >= 3) {
5583 /* Record temperature of last calibration. */
5585 (void)iwn4965_set_txpower(sc, ic->ic_bsschan, 1);
5590 * Set TX power for current channel (each rate has its own power settings).
5591 * This function takes into account the regulatory information from EEPROM,
5592 * the current temperature and the current voltage.
5595 iwn4965_set_txpower(struct iwn_softc *sc, struct ieee80211_channel *ch,
5598 /* Fixed-point arithmetic division using a n-bit fractional part. */
5599 #define fdivround(a, b, n) \
5600 ((((1 << n) * (a)) / (b) + (1 << n) / 2) / (1 << n))
5601 /* Linear interpolation. */
5602 #define interpolate(x, x1, y1, x2, y2, n) \
5603 ((y1) + fdivround(((int)(x) - (x1)) * ((y2) - (y1)), (x2) - (x1), n))
5605 static const int tdiv[IWN_NATTEN_GROUPS] = { 9, 8, 8, 8, 6 };
5606 struct iwn_ucode_info *uc = &sc->ucode_info;
5607 struct iwn4965_cmd_txpower cmd;
5608 struct iwn4965_eeprom_chan_samples *chans;
5609 const uint8_t *rf_gain, *dsp_gain;
5610 int32_t vdiff, tdiff;
5611 int i, c, grp, maxpwr;
5614 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
5615 /* Retrieve current channel from last RXON. */
5616 chan = sc->rxon->chan;
5617 DPRINTF(sc, IWN_DEBUG_RESET, "setting TX power for channel %d\n",
5620 memset(&cmd, 0, sizeof cmd);
5621 cmd.band = IEEE80211_IS_CHAN_5GHZ(ch) ? 0 : 1;
5624 if (IEEE80211_IS_CHAN_5GHZ(ch)) {
5625 maxpwr = sc->maxpwr5GHz;
5626 rf_gain = iwn4965_rf_gain_5ghz;
5627 dsp_gain = iwn4965_dsp_gain_5ghz;
5629 maxpwr = sc->maxpwr2GHz;
5630 rf_gain = iwn4965_rf_gain_2ghz;
5631 dsp_gain = iwn4965_dsp_gain_2ghz;
5634 /* Compute voltage compensation. */
5635 vdiff = ((int32_t)le32toh(uc->volt) - sc->eeprom_voltage) / 7;
5640 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5641 "%s: voltage compensation=%d (UCODE=%d, EEPROM=%d)\n",
5642 __func__, vdiff, le32toh(uc->volt), sc->eeprom_voltage);
5644 /* Get channel attenuation group. */
5645 if (chan <= 20) /* 1-20 */
5647 else if (chan <= 43) /* 34-43 */
5649 else if (chan <= 70) /* 44-70 */
5651 else if (chan <= 124) /* 71-124 */
5655 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5656 "%s: chan %d, attenuation group=%d\n", __func__, chan, grp);
5658 /* Get channel sub-band. */
5659 for (i = 0; i < IWN_NBANDS; i++)
5660 if (sc->bands[i].lo != 0 &&
5661 sc->bands[i].lo <= chan && chan <= sc->bands[i].hi)
5663 if (i == IWN_NBANDS) /* Can't happen in real-life. */
5665 chans = sc->bands[i].chans;
5666 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5667 "%s: chan %d sub-band=%d\n", __func__, chan, i);
5669 for (c = 0; c < 2; c++) {
5670 uint8_t power, gain, temp;
5671 int maxchpwr, pwr, ridx, idx;
5673 power = interpolate(chan,
5674 chans[0].num, chans[0].samples[c][1].power,
5675 chans[1].num, chans[1].samples[c][1].power, 1);
5676 gain = interpolate(chan,
5677 chans[0].num, chans[0].samples[c][1].gain,
5678 chans[1].num, chans[1].samples[c][1].gain, 1);
5679 temp = interpolate(chan,
5680 chans[0].num, chans[0].samples[c][1].temp,
5681 chans[1].num, chans[1].samples[c][1].temp, 1);
5682 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5683 "%s: Tx chain %d: power=%d gain=%d temp=%d\n",
5684 __func__, c, power, gain, temp);
5686 /* Compute temperature compensation. */
5687 tdiff = ((sc->temp - temp) * 2) / tdiv[grp];
5688 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5689 "%s: temperature compensation=%d (current=%d, EEPROM=%d)\n",
5690 __func__, tdiff, sc->temp, temp);
5692 for (ridx = 0; ridx <= IWN_RIDX_MAX; ridx++) {
5693 /* Convert dBm to half-dBm. */
5694 maxchpwr = sc->maxpwr[chan] * 2;
5696 maxchpwr -= 6; /* MIMO 2T: -3dB */
5700 /* Adjust TX power based on rate. */
5701 if ((ridx % 8) == 5)
5702 pwr -= 15; /* OFDM48: -7.5dB */
5703 else if ((ridx % 8) == 6)
5704 pwr -= 17; /* OFDM54: -8.5dB */
5705 else if ((ridx % 8) == 7)
5706 pwr -= 20; /* OFDM60: -10dB */
5708 pwr -= 10; /* Others: -5dB */
5710 /* Do not exceed channel max TX power. */
5714 idx = gain - (pwr - power) - tdiff - vdiff;
5715 if ((ridx / 8) & 1) /* MIMO */
5716 idx += (int32_t)le32toh(uc->atten[grp][c]);
5719 idx += 9; /* 5GHz */
5720 if (ridx == IWN_RIDX_MAX)
5723 /* Make sure idx stays in a valid range. */
5726 else if (idx > IWN4965_MAX_PWR_INDEX)
5727 idx = IWN4965_MAX_PWR_INDEX;
5729 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5730 "%s: Tx chain %d, rate idx %d: power=%d\n",
5731 __func__, c, ridx, idx);
5732 cmd.power[ridx].rf_gain[c] = rf_gain[idx];
5733 cmd.power[ridx].dsp_gain[c] = dsp_gain[idx];
5737 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
5738 "%s: set tx power for chan %d\n", __func__, chan);
5739 return iwn_cmd(sc, IWN_CMD_TXPOWER, &cmd, sizeof cmd, async);
5746 iwn5000_set_txpower(struct iwn_softc *sc, struct ieee80211_channel *ch,
5749 struct iwn5000_cmd_txpower cmd;
5752 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5755 * TX power calibration is handled automatically by the firmware
5758 memset(&cmd, 0, sizeof cmd);
5759 cmd.global_limit = 2 * IWN5000_TXPOWER_MAX_DBM; /* 16 dBm */
5760 cmd.flags = IWN5000_TXPOWER_NO_CLOSED;
5761 cmd.srv_limit = IWN5000_TXPOWER_AUTO;
5762 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_XMIT,
5763 "%s: setting TX power; rev=%d\n",
5765 IWN_UCODE_API(sc->ucode_rev));
5766 if (IWN_UCODE_API(sc->ucode_rev) == 1)
5767 cmdid = IWN_CMD_TXPOWER_DBM_V1;
5769 cmdid = IWN_CMD_TXPOWER_DBM;
5770 return iwn_cmd(sc, cmdid, &cmd, sizeof cmd, async);
5774 * Retrieve the maximum RSSI (in dBm) among receivers.
5777 iwn4965_get_rssi(struct iwn_softc *sc, struct iwn_rx_stat *stat)
5779 struct iwn4965_rx_phystat *phy = (void *)stat->phybuf;
5783 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5785 mask = (le16toh(phy->antenna) >> 4) & IWN_ANT_ABC;
5786 agc = (le16toh(phy->agc) >> 7) & 0x7f;
5789 if (mask & IWN_ANT_A)
5790 rssi = MAX(rssi, phy->rssi[0]);
5791 if (mask & IWN_ANT_B)
5792 rssi = MAX(rssi, phy->rssi[2]);
5793 if (mask & IWN_ANT_C)
5794 rssi = MAX(rssi, phy->rssi[4]);
5796 DPRINTF(sc, IWN_DEBUG_RECV,
5797 "%s: agc %d mask 0x%x rssi %d %d %d result %d\n", __func__, agc,
5798 mask, phy->rssi[0], phy->rssi[2], phy->rssi[4],
5799 rssi - agc - IWN_RSSI_TO_DBM);
5800 return rssi - agc - IWN_RSSI_TO_DBM;
5804 iwn5000_get_rssi(struct iwn_softc *sc, struct iwn_rx_stat *stat)
5806 struct iwn5000_rx_phystat *phy = (void *)stat->phybuf;
5810 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5812 agc = (le32toh(phy->agc) >> 9) & 0x7f;
5814 rssi = MAX(le16toh(phy->rssi[0]) & 0xff,
5815 le16toh(phy->rssi[1]) & 0xff);
5816 rssi = MAX(le16toh(phy->rssi[2]) & 0xff, rssi);
5818 DPRINTF(sc, IWN_DEBUG_RECV,
5819 "%s: agc %d rssi %d %d %d result %d\n", __func__, agc,
5820 phy->rssi[0], phy->rssi[1], phy->rssi[2],
5821 rssi - agc - IWN_RSSI_TO_DBM);
5822 return rssi - agc - IWN_RSSI_TO_DBM;
5826 * Retrieve the average noise (in dBm) among receivers.
5829 iwn_get_noise(const struct iwn_rx_general_stats *stats)
5831 int i, total, nbant, noise;
5834 for (i = 0; i < 3; i++) {
5835 if ((noise = le32toh(stats->noise[i]) & 0xff) == 0)
5840 /* There should be at least one antenna but check anyway. */
5841 return (nbant == 0) ? -127 : (total / nbant) - 107;
5845 * Compute temperature (in degC) from last received statistics.
5848 iwn4965_get_temperature(struct iwn_softc *sc)
5850 struct iwn_ucode_info *uc = &sc->ucode_info;
5851 int32_t r1, r2, r3, r4, temp;
5853 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5855 r1 = le32toh(uc->temp[0].chan20MHz);
5856 r2 = le32toh(uc->temp[1].chan20MHz);
5857 r3 = le32toh(uc->temp[2].chan20MHz);
5858 r4 = le32toh(sc->rawtemp);
5860 if (r1 == r3) /* Prevents division by 0 (should not happen). */
5863 /* Sign-extend 23-bit R4 value to 32-bit. */
5864 r4 = ((r4 & 0xffffff) ^ 0x800000) - 0x800000;
5865 /* Compute temperature in Kelvin. */
5866 temp = (259 * (r4 - r2)) / (r3 - r1);
5867 temp = (temp * 97) / 100 + 8;
5869 DPRINTF(sc, IWN_DEBUG_ANY, "temperature %dK/%dC\n", temp,
5871 return IWN_KTOC(temp);
5875 iwn5000_get_temperature(struct iwn_softc *sc)
5879 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5882 * Temperature is not used by the driver for 5000 Series because
5883 * TX power calibration is handled by firmware.
5885 temp = le32toh(sc->rawtemp);
5886 if (sc->hw_type == IWN_HW_REV_TYPE_5150) {
5887 temp = (temp / -5) + sc->temp_off;
5888 temp = IWN_KTOC(temp);
5894 * Initialize sensitivity calibration state machine.
5897 iwn_init_sensitivity(struct iwn_softc *sc)
5899 struct iwn_ops *ops = &sc->ops;
5900 struct iwn_calib_state *calib = &sc->calib;
5904 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
5906 /* Reset calibration state machine. */
5907 memset(calib, 0, sizeof (*calib));
5908 calib->state = IWN_CALIB_STATE_INIT;
5909 calib->cck_state = IWN_CCK_STATE_HIFA;
5910 /* Set initial correlation values. */
5911 calib->ofdm_x1 = sc->limits->min_ofdm_x1;
5912 calib->ofdm_mrc_x1 = sc->limits->min_ofdm_mrc_x1;
5913 calib->ofdm_x4 = sc->limits->min_ofdm_x4;
5914 calib->ofdm_mrc_x4 = sc->limits->min_ofdm_mrc_x4;
5915 calib->cck_x4 = 125;
5916 calib->cck_mrc_x4 = sc->limits->min_cck_mrc_x4;
5917 calib->energy_cck = sc->limits->energy_cck;
5919 /* Write initial sensitivity. */
5920 if ((error = iwn_send_sensitivity(sc)) != 0)
5923 /* Write initial gains. */
5924 if ((error = ops->init_gains(sc)) != 0)
5927 /* Request statistics at each beacon interval. */
5929 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: sending request for statistics\n",
5931 return iwn_cmd(sc, IWN_CMD_GET_STATISTICS, &flags, sizeof flags, 1);
5935 * Collect noise and RSSI statistics for the first 20 beacons received
5936 * after association and use them to determine connected antennas and
5937 * to set differential gains.
5940 iwn_collect_noise(struct iwn_softc *sc,
5941 const struct iwn_rx_general_stats *stats)
5943 struct iwn_ops *ops = &sc->ops;
5944 struct iwn_calib_state *calib = &sc->calib;
5945 struct ifnet *ifp = sc->sc_ifp;
5946 struct ieee80211com *ic = ifp->if_l2com;
5950 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
5952 /* Accumulate RSSI and noise for all 3 antennas. */
5953 for (i = 0; i < 3; i++) {
5954 calib->rssi[i] += le32toh(stats->rssi[i]) & 0xff;
5955 calib->noise[i] += le32toh(stats->noise[i]) & 0xff;
5957 /* NB: We update differential gains only once after 20 beacons. */
5958 if (++calib->nbeacons < 20)
5961 /* Determine highest average RSSI. */
5962 val = MAX(calib->rssi[0], calib->rssi[1]);
5963 val = MAX(calib->rssi[2], val);
5965 /* Determine which antennas are connected. */
5966 sc->chainmask = sc->rxchainmask;
5967 for (i = 0; i < 3; i++)
5968 if (val - calib->rssi[i] > 15 * 20)
5969 sc->chainmask &= ~(1 << i);
5970 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_XMIT,
5971 "%s: RX chains mask: theoretical=0x%x, actual=0x%x\n",
5972 __func__, sc->rxchainmask, sc->chainmask);
5974 /* If none of the TX antennas are connected, keep at least one. */
5975 if ((sc->chainmask & sc->txchainmask) == 0)
5976 sc->chainmask |= IWN_LSB(sc->txchainmask);
5978 (void)ops->set_gains(sc);
5979 calib->state = IWN_CALIB_STATE_RUN;
5982 /* XXX Disable RX chains with no antennas connected. */
5983 sc->rxon->rxchain = htole16(IWN_RXCHAIN_SEL(sc->chainmask));
5984 if (sc->sc_is_scanning)
5985 device_printf(sc->sc_dev,
5986 "%s: is_scanning set, before RXON\n",
5988 (void)iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, 1);
5991 /* Enable power-saving mode if requested by user. */
5992 if (ic->ic_flags & IEEE80211_F_PMGTON)
5993 (void)iwn_set_pslevel(sc, 0, 3, 1);
5995 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
6000 iwn4965_init_gains(struct iwn_softc *sc)
6002 struct iwn_phy_calib_gain cmd;
6004 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
6006 memset(&cmd, 0, sizeof cmd);
6007 cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN;
6008 /* Differential gains initially set to 0 for all 3 antennas. */
6009 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6010 "%s: setting initial differential gains\n", __func__);
6011 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
6015 iwn5000_init_gains(struct iwn_softc *sc)
6017 struct iwn_phy_calib cmd;
6019 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
6021 memset(&cmd, 0, sizeof cmd);
6022 cmd.code = sc->reset_noise_gain;
6025 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6026 "%s: setting initial differential gains\n", __func__);
6027 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
6031 iwn4965_set_gains(struct iwn_softc *sc)
6033 struct iwn_calib_state *calib = &sc->calib;
6034 struct iwn_phy_calib_gain cmd;
6035 int i, delta, noise;
6037 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
6039 /* Get minimal noise among connected antennas. */
6040 noise = INT_MAX; /* NB: There's at least one antenna. */
6041 for (i = 0; i < 3; i++)
6042 if (sc->chainmask & (1 << i))
6043 noise = MIN(calib->noise[i], noise);
6045 memset(&cmd, 0, sizeof cmd);
6046 cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN;
6047 /* Set differential gains for connected antennas. */
6048 for (i = 0; i < 3; i++) {
6049 if (sc->chainmask & (1 << i)) {
6050 /* Compute attenuation (in unit of 1.5dB). */
6051 delta = (noise - (int32_t)calib->noise[i]) / 30;
6052 /* NB: delta <= 0 */
6053 /* Limit to [-4.5dB,0]. */
6054 cmd.gain[i] = MIN(abs(delta), 3);
6056 cmd.gain[i] |= 1 << 2; /* sign bit */
6059 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6060 "setting differential gains Ant A/B/C: %x/%x/%x (%x)\n",
6061 cmd.gain[0], cmd.gain[1], cmd.gain[2], sc->chainmask);
6062 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
6066 iwn5000_set_gains(struct iwn_softc *sc)
6068 struct iwn_calib_state *calib = &sc->calib;
6069 struct iwn_phy_calib_gain cmd;
6070 int i, ant, div, delta;
6072 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
6074 /* We collected 20 beacons and !=6050 need a 1.5 factor. */
6075 div = (sc->hw_type == IWN_HW_REV_TYPE_6050) ? 20 : 30;
6077 memset(&cmd, 0, sizeof cmd);
6078 cmd.code = sc->noise_gain;
6081 /* Get first available RX antenna as referential. */
6082 ant = IWN_LSB(sc->rxchainmask);
6083 /* Set differential gains for other antennas. */
6084 for (i = ant + 1; i < 3; i++) {
6085 if (sc->chainmask & (1 << i)) {
6086 /* The delta is relative to antenna "ant". */
6087 delta = ((int32_t)calib->noise[ant] -
6088 (int32_t)calib->noise[i]) / div;
6089 /* Limit to [-4.5dB,+4.5dB]. */
6090 cmd.gain[i - 1] = MIN(abs(delta), 3);
6092 cmd.gain[i - 1] |= 1 << 2; /* sign bit */
6095 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_XMIT,
6096 "setting differential gains Ant B/C: %x/%x (%x)\n",
6097 cmd.gain[0], cmd.gain[1], sc->chainmask);
6098 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
6102 * Tune RF RX sensitivity based on the number of false alarms detected
6103 * during the last beacon period.
6106 iwn_tune_sensitivity(struct iwn_softc *sc, const struct iwn_rx_stats *stats)
6108 #define inc(val, inc, max) \
6109 if ((val) < (max)) { \
6110 if ((val) < (max) - (inc)) \
6116 #define dec(val, dec, min) \
6117 if ((val) > (min)) { \
6118 if ((val) > (min) + (dec)) \
6125 const struct iwn_sensitivity_limits *limits = sc->limits;
6126 struct iwn_calib_state *calib = &sc->calib;
6127 uint32_t val, rxena, fa;
6128 uint32_t energy[3], energy_min;
6129 uint8_t noise[3], noise_ref;
6130 int i, needs_update = 0;
6132 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
6134 /* Check that we've been enabled long enough. */
6135 if ((rxena = le32toh(stats->general.load)) == 0){
6136 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end not so long\n", __func__);
6140 /* Compute number of false alarms since last call for OFDM. */
6141 fa = le32toh(stats->ofdm.bad_plcp) - calib->bad_plcp_ofdm;
6142 fa += le32toh(stats->ofdm.fa) - calib->fa_ofdm;
6143 fa *= 200 * IEEE80211_DUR_TU; /* 200TU */
6145 if (fa > 50 * rxena) {
6146 /* High false alarm count, decrease sensitivity. */
6147 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6148 "%s: OFDM high false alarm count: %u\n", __func__, fa);
6149 inc(calib->ofdm_x1, 1, limits->max_ofdm_x1);
6150 inc(calib->ofdm_mrc_x1, 1, limits->max_ofdm_mrc_x1);
6151 inc(calib->ofdm_x4, 1, limits->max_ofdm_x4);
6152 inc(calib->ofdm_mrc_x4, 1, limits->max_ofdm_mrc_x4);
6154 } else if (fa < 5 * rxena) {
6155 /* Low false alarm count, increase sensitivity. */
6156 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6157 "%s: OFDM low false alarm count: %u\n", __func__, fa);
6158 dec(calib->ofdm_x1, 1, limits->min_ofdm_x1);
6159 dec(calib->ofdm_mrc_x1, 1, limits->min_ofdm_mrc_x1);
6160 dec(calib->ofdm_x4, 1, limits->min_ofdm_x4);
6161 dec(calib->ofdm_mrc_x4, 1, limits->min_ofdm_mrc_x4);
6164 /* Compute maximum noise among 3 receivers. */
6165 for (i = 0; i < 3; i++)
6166 noise[i] = (le32toh(stats->general.noise[i]) >> 8) & 0xff;
6167 val = MAX(noise[0], noise[1]);
6168 val = MAX(noise[2], val);
6169 /* Insert it into our samples table. */
6170 calib->noise_samples[calib->cur_noise_sample] = val;
6171 calib->cur_noise_sample = (calib->cur_noise_sample + 1) % 20;
6173 /* Compute maximum noise among last 20 samples. */
6174 noise_ref = calib->noise_samples[0];
6175 for (i = 1; i < 20; i++)
6176 noise_ref = MAX(noise_ref, calib->noise_samples[i]);
6178 /* Compute maximum energy among 3 receivers. */
6179 for (i = 0; i < 3; i++)
6180 energy[i] = le32toh(stats->general.energy[i]);
6181 val = MIN(energy[0], energy[1]);
6182 val = MIN(energy[2], val);
6183 /* Insert it into our samples table. */
6184 calib->energy_samples[calib->cur_energy_sample] = val;
6185 calib->cur_energy_sample = (calib->cur_energy_sample + 1) % 10;
6187 /* Compute minimum energy among last 10 samples. */
6188 energy_min = calib->energy_samples[0];
6189 for (i = 1; i < 10; i++)
6190 energy_min = MAX(energy_min, calib->energy_samples[i]);
6193 /* Compute number of false alarms since last call for CCK. */
6194 fa = le32toh(stats->cck.bad_plcp) - calib->bad_plcp_cck;
6195 fa += le32toh(stats->cck.fa) - calib->fa_cck;
6196 fa *= 200 * IEEE80211_DUR_TU; /* 200TU */
6198 if (fa > 50 * rxena) {
6199 /* High false alarm count, decrease sensitivity. */
6200 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6201 "%s: CCK high false alarm count: %u\n", __func__, fa);
6202 calib->cck_state = IWN_CCK_STATE_HIFA;
6205 if (calib->cck_x4 > 160) {
6206 calib->noise_ref = noise_ref;
6207 if (calib->energy_cck > 2)
6208 dec(calib->energy_cck, 2, energy_min);
6210 if (calib->cck_x4 < 160) {
6211 calib->cck_x4 = 161;
6214 inc(calib->cck_x4, 3, limits->max_cck_x4);
6216 inc(calib->cck_mrc_x4, 3, limits->max_cck_mrc_x4);
6218 } else if (fa < 5 * rxena) {
6219 /* Low false alarm count, increase sensitivity. */
6220 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6221 "%s: CCK low false alarm count: %u\n", __func__, fa);
6222 calib->cck_state = IWN_CCK_STATE_LOFA;
6225 if (calib->cck_state != IWN_CCK_STATE_INIT &&
6226 (((int32_t)calib->noise_ref - (int32_t)noise_ref) > 2 ||
6227 calib->low_fa > 100)) {
6228 inc(calib->energy_cck, 2, limits->min_energy_cck);
6229 dec(calib->cck_x4, 3, limits->min_cck_x4);
6230 dec(calib->cck_mrc_x4, 3, limits->min_cck_mrc_x4);
6233 /* Not worth to increase or decrease sensitivity. */
6234 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6235 "%s: CCK normal false alarm count: %u\n", __func__, fa);
6237 calib->noise_ref = noise_ref;
6239 if (calib->cck_state == IWN_CCK_STATE_HIFA) {
6240 /* Previous interval had many false alarms. */
6241 dec(calib->energy_cck, 8, energy_min);
6243 calib->cck_state = IWN_CCK_STATE_INIT;
6247 (void)iwn_send_sensitivity(sc);
6249 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
6256 iwn_send_sensitivity(struct iwn_softc *sc)
6258 struct iwn_calib_state *calib = &sc->calib;
6259 struct iwn_enhanced_sensitivity_cmd cmd;
6262 memset(&cmd, 0, sizeof cmd);
6263 len = sizeof (struct iwn_sensitivity_cmd);
6264 cmd.which = IWN_SENSITIVITY_WORKTBL;
6265 /* OFDM modulation. */
6266 cmd.corr_ofdm_x1 = htole16(calib->ofdm_x1);
6267 cmd.corr_ofdm_mrc_x1 = htole16(calib->ofdm_mrc_x1);
6268 cmd.corr_ofdm_x4 = htole16(calib->ofdm_x4);
6269 cmd.corr_ofdm_mrc_x4 = htole16(calib->ofdm_mrc_x4);
6270 cmd.energy_ofdm = htole16(sc->limits->energy_ofdm);
6271 cmd.energy_ofdm_th = htole16(62);
6272 /* CCK modulation. */
6273 cmd.corr_cck_x4 = htole16(calib->cck_x4);
6274 cmd.corr_cck_mrc_x4 = htole16(calib->cck_mrc_x4);
6275 cmd.energy_cck = htole16(calib->energy_cck);
6276 /* Barker modulation: use default values. */
6277 cmd.corr_barker = htole16(190);
6278 cmd.corr_barker_mrc = htole16(sc->limits->barker_mrc);
6280 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6281 "%s: set sensitivity %d/%d/%d/%d/%d/%d/%d\n", __func__,
6282 calib->ofdm_x1, calib->ofdm_mrc_x1, calib->ofdm_x4,
6283 calib->ofdm_mrc_x4, calib->cck_x4,
6284 calib->cck_mrc_x4, calib->energy_cck);
6286 if (!(sc->sc_flags & IWN_FLAG_ENH_SENS))
6288 /* Enhanced sensitivity settings. */
6289 len = sizeof (struct iwn_enhanced_sensitivity_cmd);
6290 cmd.ofdm_det_slope_mrc = htole16(668);
6291 cmd.ofdm_det_icept_mrc = htole16(4);
6292 cmd.ofdm_det_slope = htole16(486);
6293 cmd.ofdm_det_icept = htole16(37);
6294 cmd.cck_det_slope_mrc = htole16(853);
6295 cmd.cck_det_icept_mrc = htole16(4);
6296 cmd.cck_det_slope = htole16(476);
6297 cmd.cck_det_icept = htole16(99);
6299 return iwn_cmd(sc, IWN_CMD_SET_SENSITIVITY, &cmd, len, 1);
6303 * Look at the increase of PLCP errors over time; if it exceeds
6304 * a programmed threshold then trigger an RF retune.
6307 iwn_check_rx_recovery(struct iwn_softc *sc, struct iwn_stats *rs)
6309 int32_t delta_ofdm, delta_ht, delta_cck;
6310 struct iwn_calib_state *calib = &sc->calib;
6311 int delta_ticks, cur_ticks;
6316 * Calculate the difference between the current and
6317 * previous statistics.
6319 delta_cck = le32toh(rs->rx.cck.bad_plcp) - calib->bad_plcp_cck;
6320 delta_ofdm = le32toh(rs->rx.ofdm.bad_plcp) - calib->bad_plcp_ofdm;
6321 delta_ht = le32toh(rs->rx.ht.bad_plcp) - calib->bad_plcp_ht;
6324 * Calculate the delta in time between successive statistics
6325 * messages. Yes, it can roll over; so we make sure that
6326 * this doesn't happen.
6328 * XXX go figure out what to do about rollover
6329 * XXX go figure out what to do if ticks rolls over to -ve instead!
6330 * XXX go stab signed integer overflow undefined-ness in the face.
6333 delta_ticks = cur_ticks - sc->last_calib_ticks;
6336 * If any are negative, then the firmware likely reset; so just
6337 * bail. We'll pick this up next time.
6339 if (delta_cck < 0 || delta_ofdm < 0 || delta_ht < 0 || delta_ticks < 0)
6343 * delta_ticks is in ticks; we need to convert it up to milliseconds
6344 * so we can do some useful math with it.
6346 delta_msec = ticks_to_msecs(delta_ticks);
6349 * Calculate what our threshold is given the current delta_msec.
6351 thresh = sc->base_params->plcp_err_threshold * delta_msec;
6353 DPRINTF(sc, IWN_DEBUG_STATE,
6354 "%s: time delta: %d; cck=%d, ofdm=%d, ht=%d, total=%d, thresh=%d\n",
6360 (delta_msec + delta_cck + delta_ofdm + delta_ht),
6364 * If we need a retune, then schedule a single channel scan
6365 * to a channel that isn't the currently active one!
6367 * The math from linux iwlwifi:
6369 * if ((delta * 100 / msecs) > threshold)
6371 if (thresh > 0 && (delta_cck + delta_ofdm + delta_ht) * 100 > thresh) {
6372 DPRINTF(sc, IWN_DEBUG_ANY,
6373 "%s: PLCP error threshold raw (%d) comparison (%d) "
6374 "over limit (%d); retune!\n",
6376 (delta_cck + delta_ofdm + delta_ht),
6377 (delta_cck + delta_ofdm + delta_ht) * 100,
6383 * Set STA mode power saving level (between 0 and 5).
6384 * Level 0 is CAM (Continuously Aware Mode), 5 is for maximum power saving.
6387 iwn_set_pslevel(struct iwn_softc *sc, int dtim, int level, int async)
6389 struct iwn_pmgt_cmd cmd;
6390 const struct iwn_pmgt *pmgt;
6391 uint32_t max, skip_dtim;
6395 DPRINTF(sc, IWN_DEBUG_PWRSAVE,
6396 "%s: dtim=%d, level=%d, async=%d\n",
6402 /* Select which PS parameters to use. */
6404 pmgt = &iwn_pmgt[0][level];
6405 else if (dtim <= 10)
6406 pmgt = &iwn_pmgt[1][level];
6408 pmgt = &iwn_pmgt[2][level];
6410 memset(&cmd, 0, sizeof cmd);
6411 if (level != 0) /* not CAM */
6412 cmd.flags |= htole16(IWN_PS_ALLOW_SLEEP);
6414 cmd.flags |= htole16(IWN_PS_FAST_PD);
6415 /* Retrieve PCIe Active State Power Management (ASPM). */
6416 reg = pci_read_config(sc->sc_dev, sc->sc_cap_off + 0x10, 1);
6417 if (!(reg & 0x1)) /* L0s Entry disabled. */
6418 cmd.flags |= htole16(IWN_PS_PCI_PMGT);
6419 cmd.rxtimeout = htole32(pmgt->rxtimeout * 1024);
6420 cmd.txtimeout = htole32(pmgt->txtimeout * 1024);
6426 skip_dtim = pmgt->skip_dtim;
6427 if (skip_dtim != 0) {
6428 cmd.flags |= htole16(IWN_PS_SLEEP_OVER_DTIM);
6429 max = pmgt->intval[4];
6430 if (max == (uint32_t)-1)
6431 max = dtim * (skip_dtim + 1);
6432 else if (max > dtim)
6433 max = (max / dtim) * dtim;
6436 for (i = 0; i < 5; i++)
6437 cmd.intval[i] = htole32(MIN(max, pmgt->intval[i]));
6439 DPRINTF(sc, IWN_DEBUG_RESET, "setting power saving level to %d\n",
6441 return iwn_cmd(sc, IWN_CMD_SET_POWER_MODE, &cmd, sizeof cmd, async);
6445 iwn_send_btcoex(struct iwn_softc *sc)
6447 struct iwn_bluetooth cmd;
6449 memset(&cmd, 0, sizeof cmd);
6450 cmd.flags = IWN_BT_COEX_CHAN_ANN | IWN_BT_COEX_BT_PRIO;
6451 cmd.lead_time = IWN_BT_LEAD_TIME_DEF;
6452 cmd.max_kill = IWN_BT_MAX_KILL_DEF;
6453 DPRINTF(sc, IWN_DEBUG_RESET, "%s: configuring bluetooth coexistence\n",
6455 return iwn_cmd(sc, IWN_CMD_BT_COEX, &cmd, sizeof(cmd), 0);
6459 iwn_send_advanced_btcoex(struct iwn_softc *sc)
6461 static const uint32_t btcoex_3wire[12] = {
6462 0xaaaaaaaa, 0xaaaaaaaa, 0xaeaaaaaa, 0xaaaaaaaa,
6463 0xcc00ff28, 0x0000aaaa, 0xcc00aaaa, 0x0000aaaa,
6464 0xc0004000, 0x00004000, 0xf0005000, 0xf0005000,
6466 struct iwn6000_btcoex_config btconfig;
6467 struct iwn2000_btcoex_config btconfig2k;
6468 struct iwn_btcoex_priotable btprio;
6469 struct iwn_btcoex_prot btprot;
6473 memset(&btconfig, 0, sizeof btconfig);
6474 memset(&btconfig2k, 0, sizeof btconfig2k);
6476 flags = IWN_BT_FLAG_COEX6000_MODE_3W <<
6477 IWN_BT_FLAG_COEX6000_MODE_SHIFT; // Done as is in linux kernel 3.2
6479 if (sc->base_params->bt_sco_disable)
6480 flags &= ~IWN_BT_FLAG_SYNC_2_BT_DISABLE;
6482 flags |= IWN_BT_FLAG_SYNC_2_BT_DISABLE;
6484 flags |= IWN_BT_FLAG_COEX6000_CHAN_INHIBITION;
6486 /* Default flags result is 145 as old value */
6489 * Flags value has to be review. Values must change if we
6490 * which to disable it
6492 if (sc->base_params->bt_session_2) {
6493 btconfig2k.flags = flags;
6494 btconfig2k.max_kill = 5;
6495 btconfig2k.bt3_t7_timer = 1;
6496 btconfig2k.kill_ack = htole32(0xffff0000);
6497 btconfig2k.kill_cts = htole32(0xffff0000);
6498 btconfig2k.sample_time = 2;
6499 btconfig2k.bt3_t2_timer = 0xc;
6501 for (i = 0; i < 12; i++)
6502 btconfig2k.lookup_table[i] = htole32(btcoex_3wire[i]);
6503 btconfig2k.valid = htole16(0xff);
6504 btconfig2k.prio_boost = htole32(0xf0);
6505 DPRINTF(sc, IWN_DEBUG_RESET,
6506 "%s: configuring advanced bluetooth coexistence"
6507 " session 2, flags : 0x%x\n",
6510 error = iwn_cmd(sc, IWN_CMD_BT_COEX, &btconfig2k,
6511 sizeof(btconfig2k), 1);
6513 btconfig.flags = flags;
6514 btconfig.max_kill = 5;
6515 btconfig.bt3_t7_timer = 1;
6516 btconfig.kill_ack = htole32(0xffff0000);
6517 btconfig.kill_cts = htole32(0xffff0000);
6518 btconfig.sample_time = 2;
6519 btconfig.bt3_t2_timer = 0xc;
6521 for (i = 0; i < 12; i++)
6522 btconfig.lookup_table[i] = htole32(btcoex_3wire[i]);
6523 btconfig.valid = htole16(0xff);
6524 btconfig.prio_boost = 0xf0;
6525 DPRINTF(sc, IWN_DEBUG_RESET,
6526 "%s: configuring advanced bluetooth coexistence,"
6530 error = iwn_cmd(sc, IWN_CMD_BT_COEX, &btconfig,
6531 sizeof(btconfig), 1);
6537 memset(&btprio, 0, sizeof btprio);
6538 btprio.calib_init1 = 0x6;
6539 btprio.calib_init2 = 0x7;
6540 btprio.calib_periodic_low1 = 0x2;
6541 btprio.calib_periodic_low2 = 0x3;
6542 btprio.calib_periodic_high1 = 0x4;
6543 btprio.calib_periodic_high2 = 0x5;
6545 btprio.scan52 = 0x8;
6546 btprio.scan24 = 0xa;
6547 error = iwn_cmd(sc, IWN_CMD_BT_COEX_PRIOTABLE, &btprio, sizeof(btprio),
6552 /* Force BT state machine change. */
6553 memset(&btprot, 0, sizeof btprot);
6556 error = iwn_cmd(sc, IWN_CMD_BT_COEX_PROT, &btprot, sizeof(btprot), 1);
6560 return iwn_cmd(sc, IWN_CMD_BT_COEX_PROT, &btprot, sizeof(btprot), 1);
6564 iwn5000_runtime_calib(struct iwn_softc *sc)
6566 struct iwn5000_calib_config cmd;
6568 memset(&cmd, 0, sizeof cmd);
6569 cmd.ucode.once.enable = 0xffffffff;
6570 cmd.ucode.once.start = IWN5000_CALIB_DC;
6571 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
6572 "%s: configuring runtime calibration\n", __func__);
6573 return iwn_cmd(sc, IWN5000_CMD_CALIB_CONFIG, &cmd, sizeof(cmd), 0);
6577 iwn_config(struct iwn_softc *sc)
6579 struct iwn_ops *ops = &sc->ops;
6580 struct ifnet *ifp = sc->sc_ifp;
6581 struct ieee80211com *ic = ifp->if_l2com;
6586 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
6588 if ((sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET)
6589 && (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2)) {
6590 device_printf(sc->sc_dev,"%s: temp_offset and temp_offsetv2 are"
6591 " exclusive each together. Review NIC config file. Conf"
6592 " : 0x%08x Flags : 0x%08x \n", __func__,
6593 sc->base_params->calib_need,
6594 (IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET |
6595 IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2));
6599 /* Compute temperature calib if needed. Will be send by send calib */
6600 if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSET) {
6601 error = iwn5000_temp_offset_calib(sc);
6603 device_printf(sc->sc_dev,
6604 "%s: could not set temperature offset\n", __func__);
6607 } else if (sc->base_params->calib_need & IWN_FLG_NEED_PHY_CALIB_TEMP_OFFSETv2) {
6608 error = iwn5000_temp_offset_calibv2(sc);
6610 device_printf(sc->sc_dev,
6611 "%s: could not compute temperature offset v2\n",
6617 if (sc->hw_type == IWN_HW_REV_TYPE_6050) {
6618 /* Configure runtime DC calibration. */
6619 error = iwn5000_runtime_calib(sc);
6621 device_printf(sc->sc_dev,
6622 "%s: could not configure runtime calibration\n",
6628 /* Configure valid TX chains for >=5000 Series. */
6629 if (sc->hw_type != IWN_HW_REV_TYPE_4965 &&
6630 IWN_UCODE_API(sc->ucode_rev) > 1) {
6631 txmask = htole32(sc->txchainmask);
6632 DPRINTF(sc, IWN_DEBUG_RESET | IWN_DEBUG_XMIT,
6633 "%s: configuring valid TX chains 0x%x\n", __func__, txmask);
6634 error = iwn_cmd(sc, IWN5000_CMD_TX_ANT_CONFIG, &txmask,
6637 device_printf(sc->sc_dev,
6638 "%s: could not configure valid TX chains, "
6639 "error %d\n", __func__, error);
6644 /* Configure bluetooth coexistence. */
6647 /* Configure bluetooth coexistence if needed. */
6648 if (sc->base_params->bt_mode == IWN_BT_ADVANCED)
6649 error = iwn_send_advanced_btcoex(sc);
6650 if (sc->base_params->bt_mode == IWN_BT_SIMPLE)
6651 error = iwn_send_btcoex(sc);
6654 device_printf(sc->sc_dev,
6655 "%s: could not configure bluetooth coexistence, error %d\n",
6660 /* Set mode, channel, RX filter and enable RX. */
6661 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
6662 memset(sc->rxon, 0, sizeof (struct iwn_rxon));
6663 IEEE80211_ADDR_COPY(sc->rxon->myaddr, IF_LLADDR(ifp));
6664 IEEE80211_ADDR_COPY(sc->rxon->wlap, IF_LLADDR(ifp));
6665 sc->rxon->chan = ieee80211_chan2ieee(ic, ic->ic_curchan);
6666 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
6667 if (IEEE80211_IS_CHAN_2GHZ(ic->ic_curchan))
6668 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
6669 switch (ic->ic_opmode) {
6670 case IEEE80211_M_STA:
6671 sc->rxon->mode = IWN_MODE_STA;
6672 sc->rxon->filter = htole32(IWN_FILTER_MULTICAST);
6674 case IEEE80211_M_MONITOR:
6675 sc->rxon->mode = IWN_MODE_MONITOR;
6676 sc->rxon->filter = htole32(IWN_FILTER_MULTICAST |
6677 IWN_FILTER_CTL | IWN_FILTER_PROMISC);
6680 /* Should not get there. */
6683 sc->rxon->cck_mask = 0x0f; /* not yet negotiated */
6684 sc->rxon->ofdm_mask = 0xff; /* not yet negotiated */
6685 sc->rxon->ht_single_mask = 0xff;
6686 sc->rxon->ht_dual_mask = 0xff;
6687 sc->rxon->ht_triple_mask = 0xff;
6689 * In active association mode, ensure that
6690 * all the receive chains are enabled.
6692 * Since we're not yet doing SMPS, don't allow the
6693 * number of idle RX chains to be less than the active
6697 IWN_RXCHAIN_VALID(sc->rxchainmask) |
6698 IWN_RXCHAIN_MIMO_COUNT(sc->nrxchains) |
6699 IWN_RXCHAIN_IDLE_COUNT(sc->nrxchains);
6700 sc->rxon->rxchain = htole16(rxchain);
6701 DPRINTF(sc, IWN_DEBUG_RESET | IWN_DEBUG_XMIT,
6702 "%s: rxchainmask=0x%x, nrxchains=%d\n",
6706 DPRINTF(sc, IWN_DEBUG_RESET, "%s: setting configuration\n", __func__);
6707 if (sc->sc_is_scanning)
6708 device_printf(sc->sc_dev,
6709 "%s: is_scanning set, before RXON\n",
6711 error = iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, 0);
6713 device_printf(sc->sc_dev, "%s: RXON command failed\n",
6718 if ((error = iwn_add_broadcast_node(sc, 0)) != 0) {
6719 device_printf(sc->sc_dev, "%s: could not add broadcast node\n",
6724 /* Configuration has changed, set TX power accordingly. */
6725 if ((error = ops->set_txpower(sc, ic->ic_curchan, 0)) != 0) {
6726 device_printf(sc->sc_dev, "%s: could not set TX power\n",
6731 if ((error = iwn_set_critical_temp(sc)) != 0) {
6732 device_printf(sc->sc_dev,
6733 "%s: could not set critical temperature\n", __func__);
6737 /* Set power saving level to CAM during initialization. */
6738 if ((error = iwn_set_pslevel(sc, 0, 0, 0)) != 0) {
6739 device_printf(sc->sc_dev,
6740 "%s: could not set power saving level\n", __func__);
6744 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
6750 iwn_get_active_dwell_time(struct iwn_softc *sc,
6751 struct ieee80211_channel *c, uint8_t n_probes)
6753 /* No channel? Default to 2GHz settings */
6754 if (c == NULL || IEEE80211_IS_CHAN_2GHZ(c)) {
6755 return (IWN_ACTIVE_DWELL_TIME_2GHZ +
6756 IWN_ACTIVE_DWELL_FACTOR_2GHZ * (n_probes + 1));
6759 /* 5GHz dwell time */
6760 return (IWN_ACTIVE_DWELL_TIME_5GHZ +
6761 IWN_ACTIVE_DWELL_FACTOR_5GHZ * (n_probes + 1));
6765 * Limit the total dwell time to 85% of the beacon interval.
6767 * Returns the dwell time in milliseconds.
6770 iwn_limit_dwell(struct iwn_softc *sc, uint16_t dwell_time)
6772 struct ieee80211com *ic = sc->sc_ifp->if_l2com;
6773 struct ieee80211vap *vap = NULL;
6776 /* bintval is in TU (1.024mS) */
6777 if (! TAILQ_EMPTY(&ic->ic_vaps)) {
6778 vap = TAILQ_FIRST(&ic->ic_vaps);
6779 bintval = vap->iv_bss->ni_intval;
6783 * If it's non-zero, we should calculate the minimum of
6784 * it and the DWELL_BASE.
6786 * XXX Yes, the math should take into account that bintval
6787 * is 1.024mS, not 1mS..
6790 DPRINTF(sc, IWN_DEBUG_SCAN,
6794 return (MIN(IWN_PASSIVE_DWELL_BASE, ((bintval * 85) / 100)));
6797 /* No association context? Default */
6798 return (IWN_PASSIVE_DWELL_BASE);
6802 iwn_get_passive_dwell_time(struct iwn_softc *sc, struct ieee80211_channel *c)
6806 if (c == NULL || IEEE80211_IS_CHAN_2GHZ(c)) {
6807 passive = IWN_PASSIVE_DWELL_BASE + IWN_PASSIVE_DWELL_TIME_2GHZ;
6809 passive = IWN_PASSIVE_DWELL_BASE + IWN_PASSIVE_DWELL_TIME_5GHZ;
6812 /* Clamp to the beacon interval if we're associated */
6813 return (iwn_limit_dwell(sc, passive));
6817 iwn_scan(struct iwn_softc *sc, struct ieee80211vap *vap,
6818 struct ieee80211_scan_state *ss, struct ieee80211_channel *c)
6820 struct ifnet *ifp = sc->sc_ifp;
6821 struct ieee80211com *ic = ifp->if_l2com;
6822 struct ieee80211_node *ni = vap->iv_bss;
6823 struct iwn_scan_hdr *hdr;
6824 struct iwn_cmd_data *tx;
6825 struct iwn_scan_essid *essid;
6826 struct iwn_scan_chan *chan;
6827 struct ieee80211_frame *wh;
6828 struct ieee80211_rateset *rs;
6834 uint16_t dwell_active, dwell_passive;
6835 uint32_t extra, scan_service_time;
6837 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
6840 * We are absolutely not allowed to send a scan command when another
6841 * scan command is pending.
6843 if (sc->sc_is_scanning) {
6844 device_printf(sc->sc_dev, "%s: called whilst scanning!\n",
6849 /* Assign the scan channel */
6852 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
6853 buf = kmalloc(IWN_SCAN_MAXSZ, M_DEVBUF, M_INTWAIT | M_ZERO);
6855 device_printf(sc->sc_dev,
6856 "%s: could not allocate buffer for scan command\n",
6860 hdr = (struct iwn_scan_hdr *)buf;
6862 * Move to the next channel if no frames are received within 10ms
6863 * after sending the probe request.
6865 hdr->quiet_time = htole16(10); /* timeout in milliseconds */
6866 hdr->quiet_threshold = htole16(1); /* min # of packets */
6868 * Max needs to be greater than active and passive and quiet!
6869 * It's also in microseconds!
6871 hdr->max_svc = htole32(250 * 1024);
6874 * Reset scan: interval=100
6875 * Normal scan: interval=becaon interval
6876 * suspend_time: 100 (TU)
6879 extra = (100 /* suspend_time */ / 100 /* beacon interval */) << 22;
6880 //scan_service_time = extra | ((100 /* susp */ % 100 /* int */) * 1024);
6881 scan_service_time = (4 << 22) | (100 * 1024); /* Hardcode for now! */
6882 hdr->pause_svc = htole32(scan_service_time);
6884 /* Select antennas for scanning. */
6886 IWN_RXCHAIN_VALID(sc->rxchainmask) |
6887 IWN_RXCHAIN_FORCE_MIMO_SEL(sc->rxchainmask) |
6888 IWN_RXCHAIN_DRIVER_FORCE;
6889 if (IEEE80211_IS_CHAN_A(c) &&
6890 sc->hw_type == IWN_HW_REV_TYPE_4965) {
6891 /* Ant A must be avoided in 5GHz because of an HW bug. */
6892 rxchain |= IWN_RXCHAIN_FORCE_SEL(IWN_ANT_B);
6893 } else /* Use all available RX antennas. */
6894 rxchain |= IWN_RXCHAIN_FORCE_SEL(sc->rxchainmask);
6895 hdr->rxchain = htole16(rxchain);
6896 hdr->filter = htole32(IWN_FILTER_MULTICAST | IWN_FILTER_BEACON);
6898 tx = (struct iwn_cmd_data *)(hdr + 1);
6899 tx->flags = htole32(IWN_TX_AUTO_SEQ);
6900 tx->id = sc->broadcast_id;
6901 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
6903 if (IEEE80211_IS_CHAN_5GHZ(c)) {
6904 /* Send probe requests at 6Mbps. */
6905 tx->rate = htole32(0xd);
6906 rs = &ic->ic_sup_rates[IEEE80211_MODE_11A];
6908 hdr->flags = htole32(IWN_RXON_24GHZ | IWN_RXON_AUTO);
6909 if (sc->hw_type == IWN_HW_REV_TYPE_4965 &&
6910 sc->rxon->associd && sc->rxon->chan > 14)
6911 tx->rate = htole32(0xd);
6913 /* Send probe requests at 1Mbps. */
6914 tx->rate = htole32(10 | IWN_RFLAG_CCK);
6916 rs = &ic->ic_sup_rates[IEEE80211_MODE_11G];
6918 /* Use the first valid TX antenna. */
6919 txant = IWN_LSB(sc->txchainmask);
6920 tx->rate |= htole32(IWN_RFLAG_ANT(txant));
6923 * Only do active scanning if we're announcing a probe request
6924 * for a given SSID (or more, if we ever add it to the driver.)
6929 * If we're scanning for a specific SSID, add it to the command.
6931 * XXX maybe look at adding support for scanning multiple SSIDs?
6933 essid = (struct iwn_scan_essid *)(tx + 1);
6935 if (ss->ss_ssid[0].len != 0) {
6936 essid[0].id = IEEE80211_ELEMID_SSID;
6937 essid[0].len = ss->ss_ssid[0].len;
6938 memcpy(essid[0].data, ss->ss_ssid[0].ssid, ss->ss_ssid[0].len);
6941 DPRINTF(sc, IWN_DEBUG_SCAN, "%s: ssid_len=%d, ssid=%*s\n",
6945 ss->ss_ssid[0].ssid);
6947 if (ss->ss_nssid > 0)
6952 * Build a probe request frame. Most of the following code is a
6953 * copy & paste of what is done in net80211.
6955 wh = (struct ieee80211_frame *)(essid + 20);
6956 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT |
6957 IEEE80211_FC0_SUBTYPE_PROBE_REQ;
6958 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS;
6959 IEEE80211_ADDR_COPY(wh->i_addr1, ifp->if_broadcastaddr);
6960 IEEE80211_ADDR_COPY(wh->i_addr2, IF_LLADDR(ifp));
6961 IEEE80211_ADDR_COPY(wh->i_addr3, ifp->if_broadcastaddr);
6962 *(uint16_t *)&wh->i_dur[0] = 0; /* filled by HW */
6963 *(uint16_t *)&wh->i_seq[0] = 0; /* filled by HW */
6965 frm = (uint8_t *)(wh + 1);
6966 frm = ieee80211_add_ssid(frm, NULL, 0);
6967 frm = ieee80211_add_rates(frm, rs);
6968 if (rs->rs_nrates > IEEE80211_RATE_SIZE)
6969 frm = ieee80211_add_xrates(frm, rs);
6970 if (ic->ic_htcaps & IEEE80211_HTC_HT)
6971 frm = ieee80211_add_htcap(frm, ni);
6973 /* Set length of probe request. */
6974 tx->len = htole16(frm - (uint8_t *)wh);
6977 * If active scanning is requested but a certain channel is
6978 * marked passive, we can do active scanning if we detect
6981 * There is an issue with some firmware versions that triggers
6982 * a sysassert on a "good CRC threshold" of zero (== disabled),
6983 * on a radar channel even though this means that we should NOT
6986 * The "good CRC threshold" is the number of frames that we
6987 * need to receive during our dwell time on a channel before
6988 * sending out probes -- setting this to a huge value will
6989 * mean we never reach it, but at the same time work around
6990 * the aforementioned issue. Thus use IWL_GOOD_CRC_TH_NEVER
6991 * here instead of IWL_GOOD_CRC_TH_DISABLED.
6993 * This was fixed in later versions along with some other
6994 * scan changes, and the threshold behaves as a flag in those
6999 * If we're doing active scanning, set the crc_threshold
7000 * to a suitable value. This is different to active veruss
7001 * passive scanning depending upon the channel flags; the
7002 * firmware will obey that particular check for us.
7004 if (sc->tlv_feature_flags & IWN_UCODE_TLV_FLAGS_NEWSCAN)
7005 hdr->crc_threshold = is_active ?
7006 IWN_GOOD_CRC_TH_DEFAULT : IWN_GOOD_CRC_TH_DISABLED;
7008 hdr->crc_threshold = is_active ?
7009 IWN_GOOD_CRC_TH_DEFAULT : IWN_GOOD_CRC_TH_NEVER;
7011 chan = (struct iwn_scan_chan *)frm;
7012 chan->chan = htole16(ieee80211_chan2ieee(ic, c));
7014 if (ss->ss_nssid > 0)
7015 chan->flags |= htole32(IWN_CHAN_NPBREQS(1));
7016 chan->dsp_gain = 0x6e;
7019 * Set the passive/active flag depending upon the channel mode.
7020 * XXX TODO: take the is_active flag into account as well?
7022 if (c->ic_flags & IEEE80211_CHAN_PASSIVE)
7023 chan->flags |= htole32(IWN_CHAN_PASSIVE);
7025 chan->flags |= htole32(IWN_CHAN_ACTIVE);
7028 * Calculate the active/passive dwell times.
7031 dwell_active = iwn_get_active_dwell_time(sc, c, ss->ss_nssid);
7032 dwell_passive = iwn_get_passive_dwell_time(sc, c);
7034 /* Make sure they're valid */
7035 if (dwell_passive <= dwell_active)
7036 dwell_passive = dwell_active + 1;
7038 chan->active = htole16(dwell_active);
7039 chan->passive = htole16(dwell_passive);
7041 if (IEEE80211_IS_CHAN_5GHZ(c) &&
7042 !(c->ic_flags & IEEE80211_CHAN_PASSIVE)) {
7043 chan->rf_gain = 0x3b;
7044 } else if (IEEE80211_IS_CHAN_5GHZ(c)) {
7045 chan->rf_gain = 0x3b;
7046 } else if (!(c->ic_flags & IEEE80211_CHAN_PASSIVE)) {
7047 chan->rf_gain = 0x28;
7049 chan->rf_gain = 0x28;
7052 DPRINTF(sc, IWN_DEBUG_STATE,
7053 "%s: chan %u flags 0x%x rf_gain 0x%x "
7054 "dsp_gain 0x%x active %d passive %d scan_svc_time %d crc 0x%x "
7055 "isactive=%d numssid=%d\n", __func__,
7056 chan->chan, chan->flags, chan->rf_gain, chan->dsp_gain,
7057 dwell_active, dwell_passive, scan_service_time,
7058 hdr->crc_threshold, is_active, ss->ss_nssid);
7062 buflen = (uint8_t *)chan - buf;
7063 hdr->len = htole16(buflen);
7065 if (sc->sc_is_scanning) {
7066 device_printf(sc->sc_dev,
7067 "%s: called with is_scanning set!\n",
7070 sc->sc_is_scanning = 1;
7072 DPRINTF(sc, IWN_DEBUG_STATE, "sending scan command nchan=%d\n",
7074 error = iwn_cmd(sc, IWN_CMD_SCAN, buf, buflen, 1);
7075 kfree(buf, M_DEVBUF);
7077 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
7083 iwn_auth(struct iwn_softc *sc, struct ieee80211vap *vap)
7085 struct iwn_ops *ops = &sc->ops;
7086 struct ifnet *ifp = sc->sc_ifp;
7087 struct ieee80211com *ic = ifp->if_l2com;
7088 struct ieee80211_node *ni = vap->iv_bss;
7091 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
7093 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
7094 /* Update adapter configuration. */
7095 IEEE80211_ADDR_COPY(sc->rxon->bssid, ni->ni_bssid);
7096 sc->rxon->chan = ieee80211_chan2ieee(ic, ni->ni_chan);
7097 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
7098 if (IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
7099 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
7100 if (ic->ic_flags & IEEE80211_F_SHSLOT)
7101 sc->rxon->flags |= htole32(IWN_RXON_SHSLOT);
7102 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
7103 sc->rxon->flags |= htole32(IWN_RXON_SHPREAMBLE);
7104 if (IEEE80211_IS_CHAN_A(ni->ni_chan)) {
7105 sc->rxon->cck_mask = 0;
7106 sc->rxon->ofdm_mask = 0x15;
7107 } else if (IEEE80211_IS_CHAN_B(ni->ni_chan)) {
7108 sc->rxon->cck_mask = 0x03;
7109 sc->rxon->ofdm_mask = 0;
7111 /* Assume 802.11b/g. */
7112 sc->rxon->cck_mask = 0x03;
7113 sc->rxon->ofdm_mask = 0x15;
7115 DPRINTF(sc, IWN_DEBUG_STATE, "rxon chan %d flags %x cck %x ofdm %x\n",
7116 sc->rxon->chan, sc->rxon->flags, sc->rxon->cck_mask,
7117 sc->rxon->ofdm_mask);
7118 if (sc->sc_is_scanning)
7119 device_printf(sc->sc_dev,
7120 "%s: is_scanning set, before RXON\n",
7122 error = iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, 1);
7124 device_printf(sc->sc_dev, "%s: RXON command failed, error %d\n",
7129 /* Configuration has changed, set TX power accordingly. */
7130 if ((error = ops->set_txpower(sc, ni->ni_chan, 1)) != 0) {
7131 device_printf(sc->sc_dev,
7132 "%s: could not set TX power, error %d\n", __func__, error);
7136 * Reconfiguring RXON clears the firmware nodes table so we must
7137 * add the broadcast node again.
7139 if ((error = iwn_add_broadcast_node(sc, 1)) != 0) {
7140 device_printf(sc->sc_dev,
7141 "%s: could not add broadcast node, error %d\n", __func__,
7146 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
7152 iwn_run(struct iwn_softc *sc, struct ieee80211vap *vap)
7154 struct iwn_ops *ops = &sc->ops;
7155 struct ifnet *ifp = sc->sc_ifp;
7156 struct ieee80211com *ic = ifp->if_l2com;
7157 struct ieee80211_node *ni = vap->iv_bss;
7158 struct iwn_node_info node;
7159 uint32_t htflags = 0;
7162 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
7164 sc->rxon = &sc->rx_on[IWN_RXON_BSS_CTX];
7165 if (ic->ic_opmode == IEEE80211_M_MONITOR) {
7166 /* Link LED blinks while monitoring. */
7167 iwn_set_led(sc, IWN_LED_LINK, 5, 5);
7170 if ((error = iwn_set_timing(sc, ni)) != 0) {
7171 device_printf(sc->sc_dev,
7172 "%s: could not set timing, error %d\n", __func__, error);
7176 /* Update adapter configuration. */
7177 IEEE80211_ADDR_COPY(sc->rxon->bssid, ni->ni_bssid);
7178 sc->rxon->associd = htole16(IEEE80211_AID(ni->ni_associd));
7179 sc->rxon->chan = ieee80211_chan2ieee(ic, ni->ni_chan);
7180 sc->rxon->flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
7181 if (IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
7182 sc->rxon->flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
7183 if (ic->ic_flags & IEEE80211_F_SHSLOT)
7184 sc->rxon->flags |= htole32(IWN_RXON_SHSLOT);
7185 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
7186 sc->rxon->flags |= htole32(IWN_RXON_SHPREAMBLE);
7187 if (IEEE80211_IS_CHAN_A(ni->ni_chan)) {
7188 sc->rxon->cck_mask = 0;
7189 sc->rxon->ofdm_mask = 0x15;
7190 } else if (IEEE80211_IS_CHAN_B(ni->ni_chan)) {
7191 sc->rxon->cck_mask = 0x03;
7192 sc->rxon->ofdm_mask = 0;
7194 /* Assume 802.11b/g. */
7195 sc->rxon->cck_mask = 0x0f;
7196 sc->rxon->ofdm_mask = 0x15;
7198 if (IEEE80211_IS_CHAN_HT(ni->ni_chan)) {
7199 htflags |= IWN_RXON_HT_PROTMODE(ic->ic_curhtprotmode);
7200 if (IEEE80211_IS_CHAN_HT40(ni->ni_chan)) {
7201 switch (ic->ic_curhtprotmode) {
7202 case IEEE80211_HTINFO_OPMODE_HT20PR:
7203 htflags |= IWN_RXON_HT_MODEPURE40;
7206 htflags |= IWN_RXON_HT_MODEMIXED;
7210 if (IEEE80211_IS_CHAN_HT40D(ni->ni_chan))
7211 htflags |= IWN_RXON_HT_HT40MINUS;
7213 sc->rxon->flags |= htole32(htflags);
7214 sc->rxon->filter |= htole32(IWN_FILTER_BSS);
7215 DPRINTF(sc, IWN_DEBUG_STATE, "rxon chan %d flags %x\n",
7216 sc->rxon->chan, sc->rxon->flags);
7217 if (sc->sc_is_scanning)
7218 device_printf(sc->sc_dev,
7219 "%s: is_scanning set, before RXON\n",
7221 error = iwn_cmd(sc, IWN_CMD_RXON, sc->rxon, sc->rxonsz, 1);
7223 device_printf(sc->sc_dev,
7224 "%s: could not update configuration, error %d\n", __func__,
7229 /* Configuration has changed, set TX power accordingly. */
7230 if ((error = ops->set_txpower(sc, ni->ni_chan, 1)) != 0) {
7231 device_printf(sc->sc_dev,
7232 "%s: could not set TX power, error %d\n", __func__, error);
7236 /* Fake a join to initialize the TX rate. */
7237 ((struct iwn_node *)ni)->id = IWN_ID_BSS;
7238 iwn_newassoc(ni, 1);
7241 memset(&node, 0, sizeof node);
7242 IEEE80211_ADDR_COPY(node.macaddr, ni->ni_macaddr);
7243 node.id = IWN_ID_BSS;
7244 if (IEEE80211_IS_CHAN_HT(ni->ni_chan)) {
7245 switch (ni->ni_htcap & IEEE80211_HTCAP_SMPS) {
7246 case IEEE80211_HTCAP_SMPS_ENA:
7247 node.htflags |= htole32(IWN_SMPS_MIMO_DIS);
7249 case IEEE80211_HTCAP_SMPS_DYNAMIC:
7250 node.htflags |= htole32(IWN_SMPS_MIMO_PROT);
7253 node.htflags |= htole32(IWN_AMDPU_SIZE_FACTOR(3) |
7254 IWN_AMDPU_DENSITY(5)); /* 4us */
7255 if (IEEE80211_IS_CHAN_HT40(ni->ni_chan))
7256 node.htflags |= htole32(IWN_NODE_HT40);
7258 DPRINTF(sc, IWN_DEBUG_STATE, "%s: adding BSS node\n", __func__);
7259 error = ops->add_node(sc, &node, 1);
7261 device_printf(sc->sc_dev,
7262 "%s: could not add BSS node, error %d\n", __func__, error);
7265 DPRINTF(sc, IWN_DEBUG_STATE, "%s: setting link quality for node %d\n",
7267 if ((error = iwn_set_link_quality(sc, ni)) != 0) {
7268 device_printf(sc->sc_dev,
7269 "%s: could not setup link quality for node %d, error %d\n",
7270 __func__, node.id, error);
7274 if ((error = iwn_init_sensitivity(sc)) != 0) {
7275 device_printf(sc->sc_dev,
7276 "%s: could not set sensitivity, error %d\n", __func__,
7280 /* Start periodic calibration timer. */
7281 sc->calib.state = IWN_CALIB_STATE_ASSOC;
7283 callout_reset(&sc->calib_to, msecs_to_ticks(500), iwn_calib_timeout,
7286 /* Link LED always on while associated. */
7287 iwn_set_led(sc, IWN_LED_LINK, 0, 1);
7289 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
7295 * This function is called by upper layer when an ADDBA request is received
7296 * from another STA and before the ADDBA response is sent.
7299 iwn_ampdu_rx_start(struct ieee80211_node *ni, struct ieee80211_rx_ampdu *rap,
7300 int baparamset, int batimeout, int baseqctl)
7302 #define MS(_v, _f) (((_v) & _f) >> _f##_S)
7303 struct iwn_softc *sc = ni->ni_ic->ic_ifp->if_softc;
7304 struct iwn_ops *ops = &sc->ops;
7305 struct iwn_node *wn = (void *)ni;
7306 struct iwn_node_info node;
7311 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7313 tid = MS(le16toh(baparamset), IEEE80211_BAPS_TID);
7314 ssn = MS(le16toh(baseqctl), IEEE80211_BASEQ_START);
7316 memset(&node, 0, sizeof node);
7318 node.control = IWN_NODE_UPDATE;
7319 node.flags = IWN_FLAG_SET_ADDBA;
7320 node.addba_tid = tid;
7321 node.addba_ssn = htole16(ssn);
7322 DPRINTF(sc, IWN_DEBUG_RECV, "ADDBA RA=%d TID=%d SSN=%d\n",
7324 error = ops->add_node(sc, &node, 1);
7327 return sc->sc_ampdu_rx_start(ni, rap, baparamset, batimeout, baseqctl);
7332 * This function is called by upper layer on teardown of an HT-immediate
7333 * Block Ack agreement (eg. uppon receipt of a DELBA frame).
7336 iwn_ampdu_rx_stop(struct ieee80211_node *ni, struct ieee80211_rx_ampdu *rap)
7338 struct ieee80211com *ic = ni->ni_ic;
7339 struct iwn_softc *sc = ic->ic_ifp->if_softc;
7340 struct iwn_ops *ops = &sc->ops;
7341 struct iwn_node *wn = (void *)ni;
7342 struct iwn_node_info node;
7345 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7347 /* XXX: tid as an argument */
7348 for (tid = 0; tid < WME_NUM_TID; tid++) {
7349 if (&ni->ni_rx_ampdu[tid] == rap)
7353 memset(&node, 0, sizeof node);
7355 node.control = IWN_NODE_UPDATE;
7356 node.flags = IWN_FLAG_SET_DELBA;
7357 node.delba_tid = tid;
7358 DPRINTF(sc, IWN_DEBUG_RECV, "DELBA RA=%d TID=%d\n", wn->id, tid);
7359 (void)ops->add_node(sc, &node, 1);
7360 sc->sc_ampdu_rx_stop(ni, rap);
7364 iwn_addba_request(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
7365 int dialogtoken, int baparamset, int batimeout)
7367 struct iwn_softc *sc = ni->ni_ic->ic_ifp->if_softc;
7370 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7372 for (qid = sc->firstaggqueue; qid < sc->ntxqs; qid++) {
7373 if (sc->qid2tap[qid] == NULL)
7376 if (qid == sc->ntxqs) {
7377 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: not free aggregation queue\n",
7381 tap->txa_private = kmalloc(sizeof(int), M_DEVBUF, M_INTWAIT);
7382 if (tap->txa_private == NULL) {
7383 device_printf(sc->sc_dev,
7384 "%s: failed to alloc TX aggregation structure\n", __func__);
7387 sc->qid2tap[qid] = tap;
7388 *(int *)tap->txa_private = qid;
7389 return sc->sc_addba_request(ni, tap, dialogtoken, baparamset,
7394 iwn_addba_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
7395 int code, int baparamset, int batimeout)
7397 struct iwn_softc *sc = ni->ni_ic->ic_ifp->if_softc;
7398 int qid = *(int *)tap->txa_private;
7399 uint8_t tid = tap->txa_tid;
7402 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7404 if (code == IEEE80211_STATUS_SUCCESS) {
7405 ni->ni_txseqs[tid] = tap->txa_start & 0xfff;
7406 ret = iwn_ampdu_tx_start(ni->ni_ic, ni, tid);
7410 sc->qid2tap[qid] = NULL;
7411 kfree(tap->txa_private, M_DEVBUF);
7412 tap->txa_private = NULL;
7414 return sc->sc_addba_response(ni, tap, code, baparamset, batimeout);
7418 * This function is called by upper layer when an ADDBA response is received
7422 iwn_ampdu_tx_start(struct ieee80211com *ic, struct ieee80211_node *ni,
7425 struct ieee80211_tx_ampdu *tap = &ni->ni_tx_ampdu[tid];
7426 struct iwn_softc *sc = ni->ni_ic->ic_ifp->if_softc;
7427 struct iwn_ops *ops = &sc->ops;
7428 struct iwn_node *wn = (void *)ni;
7429 struct iwn_node_info node;
7432 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7434 /* Enable TX for the specified RA/TID. */
7435 wn->disable_tid &= ~(1 << tid);
7436 memset(&node, 0, sizeof node);
7438 node.control = IWN_NODE_UPDATE;
7439 node.flags = IWN_FLAG_SET_DISABLE_TID;
7440 node.disable_tid = htole16(wn->disable_tid);
7441 error = ops->add_node(sc, &node, 1);
7445 if ((error = iwn_nic_lock(sc)) != 0)
7447 qid = *(int *)tap->txa_private;
7448 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: ra=%d tid=%d ssn=%d qid=%d\n",
7449 __func__, wn->id, tid, tap->txa_start, qid);
7450 ops->ampdu_tx_start(sc, ni, qid, tid, tap->txa_start & 0xfff);
7453 iwn_set_link_quality(sc, ni);
7458 iwn_ampdu_tx_stop(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap)
7460 struct iwn_softc *sc = ni->ni_ic->ic_ifp->if_softc;
7461 struct iwn_ops *ops = &sc->ops;
7462 uint8_t tid = tap->txa_tid;
7465 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7467 sc->sc_addba_stop(ni, tap);
7469 if (tap->txa_private == NULL)
7472 qid = *(int *)tap->txa_private;
7473 if (sc->txq[qid].queued != 0)
7475 if (iwn_nic_lock(sc) != 0)
7477 ops->ampdu_tx_stop(sc, qid, tid, tap->txa_start & 0xfff);
7479 sc->qid2tap[qid] = NULL;
7480 kfree(tap->txa_private, M_DEVBUF);
7481 tap->txa_private = NULL;
7485 iwn4965_ampdu_tx_start(struct iwn_softc *sc, struct ieee80211_node *ni,
7486 int qid, uint8_t tid, uint16_t ssn)
7488 struct iwn_node *wn = (void *)ni;
7490 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7492 /* Stop TX scheduler while we're changing its configuration. */
7493 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7494 IWN4965_TXQ_STATUS_CHGACT);
7496 /* Assign RA/TID translation to the queue. */
7497 iwn_mem_write_2(sc, sc->sched_base + IWN4965_SCHED_TRANS_TBL(qid),
7500 /* Enable chain-building mode for the queue. */
7501 iwn_prph_setbits(sc, IWN4965_SCHED_QCHAIN_SEL, 1 << qid);
7503 /* Set starting sequence number from the ADDBA request. */
7504 sc->txq[qid].cur = sc->txq[qid].read = (ssn & 0xff);
7505 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7506 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), ssn);
7508 /* Set scheduler window size. */
7509 iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid),
7511 /* Set scheduler frame limit. */
7512 iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid) + 4,
7513 IWN_SCHED_LIMIT << 16);
7515 /* Enable interrupts for the queue. */
7516 iwn_prph_setbits(sc, IWN4965_SCHED_INTR_MASK, 1 << qid);
7518 /* Mark the queue as active. */
7519 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7520 IWN4965_TXQ_STATUS_ACTIVE | IWN4965_TXQ_STATUS_AGGR_ENA |
7521 iwn_tid2fifo[tid] << 1);
7525 iwn4965_ampdu_tx_stop(struct iwn_softc *sc, int qid, uint8_t tid, uint16_t ssn)
7527 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7529 /* Stop TX scheduler while we're changing its configuration. */
7530 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7531 IWN4965_TXQ_STATUS_CHGACT);
7533 /* Set starting sequence number from the ADDBA request. */
7534 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7535 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), ssn);
7537 /* Disable interrupts for the queue. */
7538 iwn_prph_clrbits(sc, IWN4965_SCHED_INTR_MASK, 1 << qid);
7540 /* Mark the queue as inactive. */
7541 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7542 IWN4965_TXQ_STATUS_INACTIVE | iwn_tid2fifo[tid] << 1);
7546 iwn5000_ampdu_tx_start(struct iwn_softc *sc, struct ieee80211_node *ni,
7547 int qid, uint8_t tid, uint16_t ssn)
7549 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7551 struct iwn_node *wn = (void *)ni;
7553 /* Stop TX scheduler while we're changing its configuration. */
7554 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7555 IWN5000_TXQ_STATUS_CHGACT);
7557 /* Assign RA/TID translation to the queue. */
7558 iwn_mem_write_2(sc, sc->sched_base + IWN5000_SCHED_TRANS_TBL(qid),
7561 /* Enable chain-building mode for the queue. */
7562 iwn_prph_setbits(sc, IWN5000_SCHED_QCHAIN_SEL, 1 << qid);
7564 /* Enable aggregation for the queue. */
7565 iwn_prph_setbits(sc, IWN5000_SCHED_AGGR_SEL, 1 << qid);
7567 /* Set starting sequence number from the ADDBA request. */
7568 sc->txq[qid].cur = sc->txq[qid].read = (ssn & 0xff);
7569 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7570 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), ssn);
7572 /* Set scheduler window size and frame limit. */
7573 iwn_mem_write(sc, sc->sched_base + IWN5000_SCHED_QUEUE_OFFSET(qid) + 4,
7574 IWN_SCHED_LIMIT << 16 | IWN_SCHED_WINSZ);
7576 /* Enable interrupts for the queue. */
7577 iwn_prph_setbits(sc, IWN5000_SCHED_INTR_MASK, 1 << qid);
7579 /* Mark the queue as active. */
7580 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7581 IWN5000_TXQ_STATUS_ACTIVE | iwn_tid2fifo[tid]);
7585 iwn5000_ampdu_tx_stop(struct iwn_softc *sc, int qid, uint8_t tid, uint16_t ssn)
7587 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7589 /* Stop TX scheduler while we're changing its configuration. */
7590 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7591 IWN5000_TXQ_STATUS_CHGACT);
7593 /* Disable aggregation for the queue. */
7594 iwn_prph_clrbits(sc, IWN5000_SCHED_AGGR_SEL, 1 << qid);
7596 /* Set starting sequence number from the ADDBA request. */
7597 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
7598 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), ssn);
7600 /* Disable interrupts for the queue. */
7601 iwn_prph_clrbits(sc, IWN5000_SCHED_INTR_MASK, 1 << qid);
7603 /* Mark the queue as inactive. */
7604 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7605 IWN5000_TXQ_STATUS_INACTIVE | iwn_tid2fifo[tid]);
7609 * Query calibration tables from the initialization firmware. We do this
7610 * only once at first boot. Called from a process context.
7613 iwn5000_query_calibration(struct iwn_softc *sc)
7615 struct iwn5000_calib_config cmd;
7618 memset(&cmd, 0, sizeof cmd);
7619 cmd.ucode.once.enable = htole32(0xffffffff);
7620 cmd.ucode.once.start = htole32(0xffffffff);
7621 cmd.ucode.once.send = htole32(0xffffffff);
7622 cmd.ucode.flags = htole32(0xffffffff);
7623 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: sending calibration query\n",
7625 error = iwn_cmd(sc, IWN5000_CMD_CALIB_CONFIG, &cmd, sizeof cmd, 0);
7629 /* Wait at most two seconds for calibration to complete. */
7630 if (!(sc->sc_flags & IWN_FLAG_CALIB_DONE))
7631 error = iwn_sleep(sc, sc, PCATCH, "iwncal", 2 * hz);
7636 * Send calibration results to the runtime firmware. These results were
7637 * obtained on first boot from the initialization firmware.
7640 iwn5000_send_calibration(struct iwn_softc *sc)
7644 for (idx = 0; idx < IWN5000_PHY_CALIB_MAX_RESULT; idx++) {
7645 if (!(sc->base_params->calib_need & (1<<idx))) {
7646 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7647 "No need of calib %d\n",
7649 continue; /* no need for this calib */
7651 if (sc->calibcmd[idx].buf == NULL) {
7652 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7653 "Need calib idx : %d but no available data\n",
7658 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7659 "send calibration result idx=%d len=%d\n", idx,
7660 sc->calibcmd[idx].len);
7661 error = iwn_cmd(sc, IWN_CMD_PHY_CALIB, sc->calibcmd[idx].buf,
7662 sc->calibcmd[idx].len, 0);
7664 device_printf(sc->sc_dev,
7665 "%s: could not send calibration result, error %d\n",
7674 iwn5000_send_wimax_coex(struct iwn_softc *sc)
7676 struct iwn5000_wimax_coex wimax;
7679 if (sc->hw_type == IWN_HW_REV_TYPE_6050) {
7680 /* Enable WiMAX coexistence for combo adapters. */
7682 IWN_WIMAX_COEX_ASSOC_WA_UNMASK |
7683 IWN_WIMAX_COEX_UNASSOC_WA_UNMASK |
7684 IWN_WIMAX_COEX_STA_TABLE_VALID |
7685 IWN_WIMAX_COEX_ENABLE;
7686 memcpy(wimax.events, iwn6050_wimax_events,
7687 sizeof iwn6050_wimax_events);
7691 /* Disable WiMAX coexistence. */
7693 memset(wimax.events, 0, sizeof wimax.events);
7695 DPRINTF(sc, IWN_DEBUG_RESET, "%s: Configuring WiMAX coexistence\n",
7697 return iwn_cmd(sc, IWN5000_CMD_WIMAX_COEX, &wimax, sizeof wimax, 0);
7701 iwn5000_crystal_calib(struct iwn_softc *sc)
7703 struct iwn5000_phy_calib_crystal cmd;
7705 memset(&cmd, 0, sizeof cmd);
7706 cmd.code = IWN5000_PHY_CALIB_CRYSTAL;
7709 cmd.cap_pin[0] = le32toh(sc->eeprom_crystal) & 0xff;
7710 cmd.cap_pin[1] = (le32toh(sc->eeprom_crystal) >> 16) & 0xff;
7711 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "sending crystal calibration %d, %d\n",
7712 cmd.cap_pin[0], cmd.cap_pin[1]);
7713 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
7717 iwn5000_temp_offset_calib(struct iwn_softc *sc)
7719 struct iwn5000_phy_calib_temp_offset cmd;
7721 memset(&cmd, 0, sizeof cmd);
7722 cmd.code = IWN5000_PHY_CALIB_TEMP_OFFSET;
7725 if (sc->eeprom_temp != 0)
7726 cmd.offset = htole16(sc->eeprom_temp);
7728 cmd.offset = htole16(IWN_DEFAULT_TEMP_OFFSET);
7729 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "setting radio sensor offset to %d\n",
7730 le16toh(cmd.offset));
7731 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
7735 iwn5000_temp_offset_calibv2(struct iwn_softc *sc)
7737 struct iwn5000_phy_calib_temp_offsetv2 cmd;
7739 memset(&cmd, 0, sizeof cmd);
7740 cmd.code = IWN5000_PHY_CALIB_TEMP_OFFSET;
7743 if (sc->eeprom_temp != 0) {
7744 cmd.offset_low = htole16(sc->eeprom_temp);
7745 cmd.offset_high = htole16(sc->eeprom_temp_high);
7747 cmd.offset_low = htole16(IWN_DEFAULT_TEMP_OFFSET);
7748 cmd.offset_high = htole16(IWN_DEFAULT_TEMP_OFFSET);
7750 cmd.burnt_voltage_ref = htole16(sc->eeprom_voltage);
7752 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
7753 "setting radio sensor low offset to %d, high offset to %d, voltage to %d\n",
7754 le16toh(cmd.offset_low),
7755 le16toh(cmd.offset_high),
7756 le16toh(cmd.burnt_voltage_ref));
7758 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
7762 * This function is called after the runtime firmware notifies us of its
7763 * readiness (called in a process context).
7766 iwn4965_post_alive(struct iwn_softc *sc)
7770 if ((error = iwn_nic_lock(sc)) != 0)
7773 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
7775 /* Clear TX scheduler state in SRAM. */
7776 sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR);
7777 iwn_mem_set_region_4(sc, sc->sched_base + IWN4965_SCHED_CTX_OFF, 0,
7778 IWN4965_SCHED_CTX_LEN / sizeof (uint32_t));
7780 /* Set physical address of TX scheduler rings (1KB aligned). */
7781 iwn_prph_write(sc, IWN4965_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10);
7783 IWN_SETBITS(sc, IWN_FH_TX_CHICKEN, IWN_FH_TX_CHICKEN_SCHED_RETRY);
7785 /* Disable chain mode for all our 16 queues. */
7786 iwn_prph_write(sc, IWN4965_SCHED_QCHAIN_SEL, 0);
7788 for (qid = 0; qid < IWN4965_NTXQUEUES; qid++) {
7789 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), 0);
7790 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | 0);
7792 /* Set scheduler window size. */
7793 iwn_mem_write(sc, sc->sched_base +
7794 IWN4965_SCHED_QUEUE_OFFSET(qid), IWN_SCHED_WINSZ);
7795 /* Set scheduler frame limit. */
7796 iwn_mem_write(sc, sc->sched_base +
7797 IWN4965_SCHED_QUEUE_OFFSET(qid) + 4,
7798 IWN_SCHED_LIMIT << 16);
7801 /* Enable interrupts for all our 16 queues. */
7802 iwn_prph_write(sc, IWN4965_SCHED_INTR_MASK, 0xffff);
7803 /* Identify TX FIFO rings (0-7). */
7804 iwn_prph_write(sc, IWN4965_SCHED_TXFACT, 0xff);
7806 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
7807 for (qid = 0; qid < 7; qid++) {
7808 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 4, 5, 6 };
7809 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
7810 IWN4965_TXQ_STATUS_ACTIVE | qid2fifo[qid] << 1);
7817 * This function is called after the initialization or runtime firmware
7818 * notifies us of its readiness (called in a process context).
7821 iwn5000_post_alive(struct iwn_softc *sc)
7825 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
7827 /* Switch to using ICT interrupt mode. */
7828 iwn5000_ict_reset(sc);
7830 if ((error = iwn_nic_lock(sc)) != 0){
7831 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s end in error\n", __func__);
7835 /* Clear TX scheduler state in SRAM. */
7836 sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR);
7837 iwn_mem_set_region_4(sc, sc->sched_base + IWN5000_SCHED_CTX_OFF, 0,
7838 IWN5000_SCHED_CTX_LEN / sizeof (uint32_t));
7840 /* Set physical address of TX scheduler rings (1KB aligned). */
7841 iwn_prph_write(sc, IWN5000_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10);
7843 IWN_SETBITS(sc, IWN_FH_TX_CHICKEN, IWN_FH_TX_CHICKEN_SCHED_RETRY);
7845 /* Enable chain mode for all queues, except command queue. */
7846 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT)
7847 iwn_prph_write(sc, IWN5000_SCHED_QCHAIN_SEL, 0xfffdf);
7849 iwn_prph_write(sc, IWN5000_SCHED_QCHAIN_SEL, 0xfffef);
7850 iwn_prph_write(sc, IWN5000_SCHED_AGGR_SEL, 0);
7852 for (qid = 0; qid < IWN5000_NTXQUEUES; qid++) {
7853 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), 0);
7854 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | 0);
7856 iwn_mem_write(sc, sc->sched_base +
7857 IWN5000_SCHED_QUEUE_OFFSET(qid), 0);
7858 /* Set scheduler window size and frame limit. */
7859 iwn_mem_write(sc, sc->sched_base +
7860 IWN5000_SCHED_QUEUE_OFFSET(qid) + 4,
7861 IWN_SCHED_LIMIT << 16 | IWN_SCHED_WINSZ);
7864 /* Enable interrupts for all our 20 queues. */
7865 iwn_prph_write(sc, IWN5000_SCHED_INTR_MASK, 0xfffff);
7866 /* Identify TX FIFO rings (0-7). */
7867 iwn_prph_write(sc, IWN5000_SCHED_TXFACT, 0xff);
7869 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
7870 if (sc->sc_flags & IWN_FLAG_PAN_SUPPORT) {
7871 /* Mark TX rings as active. */
7872 for (qid = 0; qid < 11; qid++) {
7873 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 0, 4, 2, 5, 4, 7, 5 };
7874 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7875 IWN5000_TXQ_STATUS_ACTIVE | qid2fifo[qid]);
7878 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
7879 for (qid = 0; qid < 7; qid++) {
7880 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 7, 5, 6 };
7881 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
7882 IWN5000_TXQ_STATUS_ACTIVE | qid2fifo[qid]);
7887 /* Configure WiMAX coexistence for combo adapters. */
7888 error = iwn5000_send_wimax_coex(sc);
7890 device_printf(sc->sc_dev,
7891 "%s: could not configure WiMAX coexistence, error %d\n",
7895 if (sc->hw_type != IWN_HW_REV_TYPE_5150) {
7896 /* Perform crystal calibration. */
7897 error = iwn5000_crystal_calib(sc);
7899 device_printf(sc->sc_dev,
7900 "%s: crystal calibration failed, error %d\n",
7905 if (!(sc->sc_flags & IWN_FLAG_CALIB_DONE)) {
7906 /* Query calibration from the initialization firmware. */
7907 if ((error = iwn5000_query_calibration(sc)) != 0) {
7908 device_printf(sc->sc_dev,
7909 "%s: could not query calibration, error %d\n",
7914 * We have the calibration results now, reboot with the
7915 * runtime firmware (call ourselves recursively!)
7918 error = iwn_hw_init(sc);
7920 /* Send calibration results to runtime firmware. */
7921 error = iwn5000_send_calibration(sc);
7924 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
7930 * The firmware boot code is small and is intended to be copied directly into
7931 * the NIC internal memory (no DMA transfer).
7934 iwn4965_load_bootcode(struct iwn_softc *sc, const uint8_t *ucode, int size)
7938 size /= sizeof (uint32_t);
7940 if ((error = iwn_nic_lock(sc)) != 0)
7943 /* Copy microcode image into NIC memory. */
7944 iwn_prph_write_region_4(sc, IWN_BSM_SRAM_BASE,
7945 (const uint32_t *)ucode, size);
7947 iwn_prph_write(sc, IWN_BSM_WR_MEM_SRC, 0);
7948 iwn_prph_write(sc, IWN_BSM_WR_MEM_DST, IWN_FW_TEXT_BASE);
7949 iwn_prph_write(sc, IWN_BSM_WR_DWCOUNT, size);
7951 /* Start boot load now. */
7952 iwn_prph_write(sc, IWN_BSM_WR_CTRL, IWN_BSM_WR_CTRL_START);
7954 /* Wait for transfer to complete. */
7955 for (ntries = 0; ntries < 1000; ntries++) {
7956 if (!(iwn_prph_read(sc, IWN_BSM_WR_CTRL) &
7957 IWN_BSM_WR_CTRL_START))
7961 if (ntries == 1000) {
7962 device_printf(sc->sc_dev, "%s: could not load boot firmware\n",
7968 /* Enable boot after power up. */
7969 iwn_prph_write(sc, IWN_BSM_WR_CTRL, IWN_BSM_WR_CTRL_START_EN);
7976 iwn4965_load_firmware(struct iwn_softc *sc)
7978 struct iwn_fw_info *fw = &sc->fw;
7979 struct iwn_dma_info *dma = &sc->fw_dma;
7982 /* Copy initialization sections into pre-allocated DMA-safe memory. */
7983 memcpy(dma->vaddr, fw->init.data, fw->init.datasz);
7984 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
7985 memcpy(dma->vaddr + IWN4965_FW_DATA_MAXSZ,
7986 fw->init.text, fw->init.textsz);
7987 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
7989 /* Tell adapter where to find initialization sections. */
7990 if ((error = iwn_nic_lock(sc)) != 0)
7992 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4);
7993 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->init.datasz);
7994 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR,
7995 (dma->paddr + IWN4965_FW_DATA_MAXSZ) >> 4);
7996 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE, fw->init.textsz);
7999 /* Load firmware boot code. */
8000 error = iwn4965_load_bootcode(sc, fw->boot.text, fw->boot.textsz);
8002 device_printf(sc->sc_dev, "%s: could not load boot firmware\n",
8006 /* Now press "execute". */
8007 IWN_WRITE(sc, IWN_RESET, 0);
8009 /* Wait at most one second for first alive notification. */
8010 if ((error = iwn_sleep(sc, sc, PCATCH, "iwninit", hz)) != 0) {
8011 device_printf(sc->sc_dev,
8012 "%s: timeout waiting for adapter to initialize, error %d\n",
8017 /* Retrieve current temperature for initial TX power calibration. */
8018 sc->rawtemp = sc->ucode_info.temp[3].chan20MHz;
8019 sc->temp = iwn4965_get_temperature(sc);
8021 /* Copy runtime sections into pre-allocated DMA-safe memory. */
8022 memcpy(dma->vaddr, fw->main.data, fw->main.datasz);
8023 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
8024 memcpy(dma->vaddr + IWN4965_FW_DATA_MAXSZ,
8025 fw->main.text, fw->main.textsz);
8026 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
8028 /* Tell adapter where to find runtime sections. */
8029 if ((error = iwn_nic_lock(sc)) != 0)
8031 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4);
8032 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->main.datasz);
8033 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR,
8034 (dma->paddr + IWN4965_FW_DATA_MAXSZ) >> 4);
8035 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE,
8036 IWN_FW_UPDATED | fw->main.textsz);
8043 iwn5000_load_firmware_section(struct iwn_softc *sc, uint32_t dst,
8044 const uint8_t *section, int size)
8046 struct iwn_dma_info *dma = &sc->fw_dma;
8049 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8051 /* Copy firmware section into pre-allocated DMA-safe memory. */
8052 memcpy(dma->vaddr, section, size);
8053 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE);
8055 if ((error = iwn_nic_lock(sc)) != 0)
8058 IWN_WRITE(sc, IWN_FH_TX_CONFIG(IWN_SRVC_DMACHNL),
8059 IWN_FH_TX_CONFIG_DMA_PAUSE);
8061 IWN_WRITE(sc, IWN_FH_SRAM_ADDR(IWN_SRVC_DMACHNL), dst);
8062 IWN_WRITE(sc, IWN_FH_TFBD_CTRL0(IWN_SRVC_DMACHNL),
8063 IWN_LOADDR(dma->paddr));
8064 IWN_WRITE(sc, IWN_FH_TFBD_CTRL1(IWN_SRVC_DMACHNL),
8065 IWN_HIADDR(dma->paddr) << 28 | size);
8066 IWN_WRITE(sc, IWN_FH_TXBUF_STATUS(IWN_SRVC_DMACHNL),
8067 IWN_FH_TXBUF_STATUS_TBNUM(1) |
8068 IWN_FH_TXBUF_STATUS_TBIDX(1) |
8069 IWN_FH_TXBUF_STATUS_TFBD_VALID);
8071 /* Kick Flow Handler to start DMA transfer. */
8072 IWN_WRITE(sc, IWN_FH_TX_CONFIG(IWN_SRVC_DMACHNL),
8073 IWN_FH_TX_CONFIG_DMA_ENA | IWN_FH_TX_CONFIG_CIRQ_HOST_ENDTFD);
8077 /* Wait at most five seconds for FH DMA transfer to complete. */
8078 return iwn_sleep(sc, sc, PCATCH, "iwninit", 5 * hz);
8082 iwn5000_load_firmware(struct iwn_softc *sc)
8084 struct iwn_fw_part *fw;
8087 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8089 /* Load the initialization firmware on first boot only. */
8090 fw = (sc->sc_flags & IWN_FLAG_CALIB_DONE) ?
8091 &sc->fw.main : &sc->fw.init;
8093 error = iwn5000_load_firmware_section(sc, IWN_FW_TEXT_BASE,
8094 fw->text, fw->textsz);
8096 device_printf(sc->sc_dev,
8097 "%s: could not load firmware %s section, error %d\n",
8098 __func__, ".text", error);
8101 error = iwn5000_load_firmware_section(sc, IWN_FW_DATA_BASE,
8102 fw->data, fw->datasz);
8104 device_printf(sc->sc_dev,
8105 "%s: could not load firmware %s section, error %d\n",
8106 __func__, ".data", error);
8110 /* Now press "execute". */
8111 IWN_WRITE(sc, IWN_RESET, 0);
8116 * Extract text and data sections from a legacy firmware image.
8119 iwn_read_firmware_leg(struct iwn_softc *sc, struct iwn_fw_info *fw)
8121 const uint32_t *ptr;
8125 ptr = (const uint32_t *)fw->data;
8126 rev = le32toh(*ptr++);
8128 sc->ucode_rev = rev;
8130 /* Check firmware API version. */
8131 if (IWN_FW_API(rev) <= 1) {
8132 device_printf(sc->sc_dev,
8133 "%s: bad firmware, need API version >=2\n", __func__);
8136 if (IWN_FW_API(rev) >= 3) {
8137 /* Skip build number (version 2 header). */
8141 if (fw->size < hdrlen) {
8142 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
8143 __func__, fw->size);
8146 fw->main.textsz = le32toh(*ptr++);
8147 fw->main.datasz = le32toh(*ptr++);
8148 fw->init.textsz = le32toh(*ptr++);
8149 fw->init.datasz = le32toh(*ptr++);
8150 fw->boot.textsz = le32toh(*ptr++);
8152 /* Check that all firmware sections fit. */
8153 if (fw->size < hdrlen + fw->main.textsz + fw->main.datasz +
8154 fw->init.textsz + fw->init.datasz + fw->boot.textsz) {
8155 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
8156 __func__, fw->size);
8160 /* Get pointers to firmware sections. */
8161 fw->main.text = (const uint8_t *)ptr;
8162 fw->main.data = fw->main.text + fw->main.textsz;
8163 fw->init.text = fw->main.data + fw->main.datasz;
8164 fw->init.data = fw->init.text + fw->init.textsz;
8165 fw->boot.text = fw->init.data + fw->init.datasz;
8170 * Extract text and data sections from a TLV firmware image.
8173 iwn_read_firmware_tlv(struct iwn_softc *sc, struct iwn_fw_info *fw,
8176 const struct iwn_fw_tlv_hdr *hdr;
8177 const struct iwn_fw_tlv *tlv;
8178 const uint8_t *ptr, *end;
8182 if (fw->size < sizeof (*hdr)) {
8183 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
8184 __func__, fw->size);
8187 hdr = (const struct iwn_fw_tlv_hdr *)fw->data;
8188 if (hdr->signature != htole32(IWN_FW_SIGNATURE)) {
8189 device_printf(sc->sc_dev, "%s: bad firmware signature 0x%08x\n",
8190 __func__, le32toh(hdr->signature));
8193 DPRINTF(sc, IWN_DEBUG_RESET, "FW: \"%.64s\", build 0x%x\n", hdr->descr,
8194 le32toh(hdr->build));
8195 sc->ucode_rev = le32toh(hdr->rev);
8198 * Select the closest supported alternative that is less than
8199 * or equal to the specified one.
8201 altmask = le64toh(hdr->altmask);
8202 while (alt > 0 && !(altmask & (1ULL << alt)))
8203 alt--; /* Downgrade. */
8204 DPRINTF(sc, IWN_DEBUG_RESET, "using alternative %d\n", alt);
8206 ptr = (const uint8_t *)(hdr + 1);
8207 end = (const uint8_t *)(fw->data + fw->size);
8209 /* Parse type-length-value fields. */
8210 while (ptr + sizeof (*tlv) <= end) {
8211 tlv = (const struct iwn_fw_tlv *)ptr;
8212 len = le32toh(tlv->len);
8214 ptr += sizeof (*tlv);
8215 if (ptr + len > end) {
8216 device_printf(sc->sc_dev,
8217 "%s: firmware too short: %zu bytes\n", __func__,
8221 /* Skip other alternatives. */
8222 if (tlv->alt != 0 && tlv->alt != htole16(alt))
8225 switch (le16toh(tlv->type)) {
8226 case IWN_FW_TLV_MAIN_TEXT:
8227 fw->main.text = ptr;
8228 fw->main.textsz = len;
8230 case IWN_FW_TLV_MAIN_DATA:
8231 fw->main.data = ptr;
8232 fw->main.datasz = len;
8234 case IWN_FW_TLV_INIT_TEXT:
8235 fw->init.text = ptr;
8236 fw->init.textsz = len;
8238 case IWN_FW_TLV_INIT_DATA:
8239 fw->init.data = ptr;
8240 fw->init.datasz = len;
8242 case IWN_FW_TLV_BOOT_TEXT:
8243 fw->boot.text = ptr;
8244 fw->boot.textsz = len;
8246 case IWN_FW_TLV_ENH_SENS:
8248 sc->sc_flags |= IWN_FLAG_ENH_SENS;
8250 case IWN_FW_TLV_PHY_CALIB:
8251 tmp = le32toh(*ptr);
8253 sc->reset_noise_gain = tmp;
8254 sc->noise_gain = tmp + 1;
8257 case IWN_FW_TLV_PAN:
8258 sc->sc_flags |= IWN_FLAG_PAN_SUPPORT;
8259 DPRINTF(sc, IWN_DEBUG_RESET,
8260 "PAN Support found: %d\n", 1);
8262 case IWN_FW_TLV_FLAGS:
8263 if (len < sizeof(uint32_t))
8265 if (len % sizeof(uint32_t))
8267 sc->tlv_feature_flags = le32toh(*ptr);
8268 DPRINTF(sc, IWN_DEBUG_RESET,
8269 "%s: feature: 0x%08x\n",
8271 sc->tlv_feature_flags);
8273 case IWN_FW_TLV_PBREQ_MAXLEN:
8274 case IWN_FW_TLV_RUNT_EVTLOG_PTR:
8275 case IWN_FW_TLV_RUNT_EVTLOG_SIZE:
8276 case IWN_FW_TLV_RUNT_ERRLOG_PTR:
8277 case IWN_FW_TLV_INIT_EVTLOG_PTR:
8278 case IWN_FW_TLV_INIT_EVTLOG_SIZE:
8279 case IWN_FW_TLV_INIT_ERRLOG_PTR:
8280 case IWN_FW_TLV_WOWLAN_INST:
8281 case IWN_FW_TLV_WOWLAN_DATA:
8282 DPRINTF(sc, IWN_DEBUG_RESET,
8283 "TLV type %d recognized but not handled\n",
8284 le16toh(tlv->type));
8287 DPRINTF(sc, IWN_DEBUG_RESET,
8288 "TLV type %d not handled\n", le16toh(tlv->type));
8291 next: /* TLV fields are 32-bit aligned. */
8292 ptr += (len + 3) & ~3;
8298 iwn_read_firmware(struct iwn_softc *sc)
8300 struct iwn_fw_info *fw = &sc->fw;
8303 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8307 memset(fw, 0, sizeof (*fw));
8309 /* Read firmware image from filesystem. */
8310 sc->fw_fp = firmware_get(sc->fwname);
8311 if (sc->fw_fp == NULL) {
8312 device_printf(sc->sc_dev, "%s: could not read firmware %s\n",
8313 __func__, sc->fwname);
8320 fw->size = sc->fw_fp->datasize;
8321 fw->data = (const uint8_t *)sc->fw_fp->data;
8322 if (fw->size < sizeof (uint32_t)) {
8323 device_printf(sc->sc_dev, "%s: firmware too short: %zu bytes\n",
8324 __func__, fw->size);
8325 firmware_put(sc->fw_fp, FIRMWARE_UNLOAD);
8331 /* Retrieve text and data sections. */
8332 if (*(const uint32_t *)fw->data != 0) /* Legacy image. */
8333 error = iwn_read_firmware_leg(sc, fw);
8335 error = iwn_read_firmware_tlv(sc, fw, 1);
8337 device_printf(sc->sc_dev,
8338 "%s: could not read firmware sections, error %d\n",
8340 firmware_put(sc->fw_fp, FIRMWARE_UNLOAD);
8345 device_printf(sc->sc_dev, "%s: ucode rev=0x%08x\n", __func__, sc->ucode_rev);
8347 /* Make sure text and data sections fit in hardware memory. */
8348 if (fw->main.textsz > sc->fw_text_maxsz ||
8349 fw->main.datasz > sc->fw_data_maxsz ||
8350 fw->init.textsz > sc->fw_text_maxsz ||
8351 fw->init.datasz > sc->fw_data_maxsz ||
8352 fw->boot.textsz > IWN_FW_BOOT_TEXT_MAXSZ ||
8353 (fw->boot.textsz & 3) != 0) {
8354 device_printf(sc->sc_dev, "%s: firmware sections too large\n",
8356 firmware_put(sc->fw_fp, FIRMWARE_UNLOAD);
8362 /* We can proceed with loading the firmware. */
8367 iwn_clock_wait(struct iwn_softc *sc)
8371 /* Set "initialization complete" bit. */
8372 IWN_SETBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_INIT_DONE);
8374 /* Wait for clock stabilization. */
8375 for (ntries = 0; ntries < 2500; ntries++) {
8376 if (IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_MAC_CLOCK_READY)
8380 device_printf(sc->sc_dev,
8381 "%s: timeout waiting for clock stabilization\n", __func__);
8386 iwn_apm_init(struct iwn_softc *sc)
8391 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8393 /* Disable L0s exit timer (NMI bug workaround). */
8394 IWN_SETBITS(sc, IWN_GIO_CHICKEN, IWN_GIO_CHICKEN_DIS_L0S_TIMER);
8395 /* Don't wait for ICH L0s (ICH bug workaround). */
8396 IWN_SETBITS(sc, IWN_GIO_CHICKEN, IWN_GIO_CHICKEN_L1A_NO_L0S_RX);
8398 /* Set FH wait threshold to max (HW bug under stress workaround). */
8399 IWN_SETBITS(sc, IWN_DBG_HPET_MEM, 0xffff0000);
8401 /* Enable HAP INTA to move adapter from L1a to L0s. */
8402 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_HAP_WAKE_L1A);
8404 /* Retrieve PCIe Active State Power Management (ASPM). */
8405 reg = pci_read_config(sc->sc_dev, sc->sc_cap_off + 0x10, 1);
8406 /* Workaround for HW instability in PCIe L0->L0s->L1 transition. */
8407 if (reg & 0x02) /* L1 Entry enabled. */
8408 IWN_SETBITS(sc, IWN_GIO, IWN_GIO_L0S_ENA);
8410 IWN_CLRBITS(sc, IWN_GIO, IWN_GIO_L0S_ENA);
8412 if (sc->base_params->pll_cfg_val)
8413 IWN_SETBITS(sc, IWN_ANA_PLL, sc->base_params->pll_cfg_val);
8415 /* Wait for clock stabilization before accessing prph. */
8416 if ((error = iwn_clock_wait(sc)) != 0)
8419 if ((error = iwn_nic_lock(sc)) != 0)
8421 if (sc->hw_type == IWN_HW_REV_TYPE_4965) {
8422 /* Enable DMA and BSM (Bootstrap State Machine). */
8423 iwn_prph_write(sc, IWN_APMG_CLK_EN,
8424 IWN_APMG_CLK_CTRL_DMA_CLK_RQT |
8425 IWN_APMG_CLK_CTRL_BSM_CLK_RQT);
8428 iwn_prph_write(sc, IWN_APMG_CLK_EN,
8429 IWN_APMG_CLK_CTRL_DMA_CLK_RQT);
8432 /* Disable L1-Active. */
8433 iwn_prph_setbits(sc, IWN_APMG_PCI_STT, IWN_APMG_PCI_STT_L1A_DIS);
8440 iwn_apm_stop_master(struct iwn_softc *sc)
8444 /* Stop busmaster DMA activity. */
8445 IWN_SETBITS(sc, IWN_RESET, IWN_RESET_STOP_MASTER);
8446 for (ntries = 0; ntries < 100; ntries++) {
8447 if (IWN_READ(sc, IWN_RESET) & IWN_RESET_MASTER_DISABLED)
8451 device_printf(sc->sc_dev, "%s: timeout waiting for master\n", __func__);
8455 iwn_apm_stop(struct iwn_softc *sc)
8457 iwn_apm_stop_master(sc);
8459 /* Reset the entire device. */
8460 IWN_SETBITS(sc, IWN_RESET, IWN_RESET_SW);
8462 /* Clear "initialization complete" bit. */
8463 IWN_CLRBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_INIT_DONE);
8467 iwn4965_nic_config(struct iwn_softc *sc)
8469 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8471 if (IWN_RFCFG_TYPE(sc->rfcfg) == 1) {
8473 * I don't believe this to be correct but this is what the
8474 * vendor driver is doing. Probably the bits should not be
8475 * shifted in IWN_RFCFG_*.
8477 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8478 IWN_RFCFG_TYPE(sc->rfcfg) |
8479 IWN_RFCFG_STEP(sc->rfcfg) |
8480 IWN_RFCFG_DASH(sc->rfcfg));
8482 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8483 IWN_HW_IF_CONFIG_RADIO_SI | IWN_HW_IF_CONFIG_MAC_SI);
8488 iwn5000_nic_config(struct iwn_softc *sc)
8493 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8495 if (IWN_RFCFG_TYPE(sc->rfcfg) < 3) {
8496 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8497 IWN_RFCFG_TYPE(sc->rfcfg) |
8498 IWN_RFCFG_STEP(sc->rfcfg) |
8499 IWN_RFCFG_DASH(sc->rfcfg));
8501 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
8502 IWN_HW_IF_CONFIG_RADIO_SI | IWN_HW_IF_CONFIG_MAC_SI);
8504 if ((error = iwn_nic_lock(sc)) != 0)
8506 iwn_prph_setbits(sc, IWN_APMG_PS, IWN_APMG_PS_EARLY_PWROFF_DIS);
8508 if (sc->hw_type == IWN_HW_REV_TYPE_1000) {
8510 * Select first Switching Voltage Regulator (1.32V) to
8511 * solve a stability issue related to noisy DC2DC line
8512 * in the silicon of 1000 Series.
8514 tmp = iwn_prph_read(sc, IWN_APMG_DIGITAL_SVR);
8515 tmp &= ~IWN_APMG_DIGITAL_SVR_VOLTAGE_MASK;
8516 tmp |= IWN_APMG_DIGITAL_SVR_VOLTAGE_1_32;
8517 iwn_prph_write(sc, IWN_APMG_DIGITAL_SVR, tmp);
8521 if (sc->sc_flags & IWN_FLAG_INTERNAL_PA) {
8522 /* Use internal power amplifier only. */
8523 IWN_WRITE(sc, IWN_GP_DRIVER, IWN_GP_DRIVER_RADIO_2X2_IPA);
8525 if (sc->base_params->additional_nic_config && sc->calib_ver >= 6) {
8526 /* Indicate that ROM calibration version is >=6. */
8527 IWN_SETBITS(sc, IWN_GP_DRIVER, IWN_GP_DRIVER_CALIB_VER6);
8529 if (sc->base_params->additional_gp_drv_bit)
8530 IWN_SETBITS(sc, IWN_GP_DRIVER,
8531 sc->base_params->additional_gp_drv_bit);
8536 * Take NIC ownership over Intel Active Management Technology (AMT).
8539 iwn_hw_prepare(struct iwn_softc *sc)
8543 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8545 /* Check if hardware is ready. */
8546 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_NIC_READY);
8547 for (ntries = 0; ntries < 5; ntries++) {
8548 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
8549 IWN_HW_IF_CONFIG_NIC_READY)
8554 /* Hardware not ready, force into ready state. */
8555 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_PREPARE);
8556 for (ntries = 0; ntries < 15000; ntries++) {
8557 if (!(IWN_READ(sc, IWN_HW_IF_CONFIG) &
8558 IWN_HW_IF_CONFIG_PREPARE_DONE))
8562 if (ntries == 15000)
8565 /* Hardware should be ready now. */
8566 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_NIC_READY);
8567 for (ntries = 0; ntries < 5; ntries++) {
8568 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
8569 IWN_HW_IF_CONFIG_NIC_READY)
8577 iwn_hw_init(struct iwn_softc *sc)
8579 struct iwn_ops *ops = &sc->ops;
8580 int error, chnl, qid;
8582 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
8584 /* Clear pending interrupts. */
8585 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8587 if ((error = iwn_apm_init(sc)) != 0) {
8588 device_printf(sc->sc_dev,
8589 "%s: could not power ON adapter, error %d\n", __func__,
8594 /* Select VMAIN power source. */
8595 if ((error = iwn_nic_lock(sc)) != 0)
8597 iwn_prph_clrbits(sc, IWN_APMG_PS, IWN_APMG_PS_PWR_SRC_MASK);
8600 /* Perform adapter-specific initialization. */
8601 if ((error = ops->nic_config(sc)) != 0)
8604 /* Initialize RX ring. */
8605 if ((error = iwn_nic_lock(sc)) != 0)
8607 IWN_WRITE(sc, IWN_FH_RX_CONFIG, 0);
8608 IWN_WRITE(sc, IWN_FH_RX_WPTR, 0);
8609 /* Set physical address of RX ring (256-byte aligned). */
8610 IWN_WRITE(sc, IWN_FH_RX_BASE, sc->rxq.desc_dma.paddr >> 8);
8611 /* Set physical address of RX status (16-byte aligned). */
8612 IWN_WRITE(sc, IWN_FH_STATUS_WPTR, sc->rxq.stat_dma.paddr >> 4);
8614 IWN_WRITE(sc, IWN_FH_RX_CONFIG,
8615 IWN_FH_RX_CONFIG_ENA |
8616 IWN_FH_RX_CONFIG_IGN_RXF_EMPTY | /* HW bug workaround */
8617 IWN_FH_RX_CONFIG_IRQ_DST_HOST |
8618 IWN_FH_RX_CONFIG_SINGLE_FRAME |
8619 IWN_FH_RX_CONFIG_RB_TIMEOUT(0) |
8620 IWN_FH_RX_CONFIG_NRBD(IWN_RX_RING_COUNT_LOG));
8622 IWN_WRITE(sc, IWN_FH_RX_WPTR, (IWN_RX_RING_COUNT - 1) & ~7);
8624 if ((error = iwn_nic_lock(sc)) != 0)
8627 /* Initialize TX scheduler. */
8628 iwn_prph_write(sc, sc->sched_txfact_addr, 0);
8630 /* Set physical address of "keep warm" page (16-byte aligned). */
8631 IWN_WRITE(sc, IWN_FH_KW_ADDR, sc->kw_dma.paddr >> 4);
8633 /* Initialize TX rings. */
8634 for (qid = 0; qid < sc->ntxqs; qid++) {
8635 struct iwn_tx_ring *txq = &sc->txq[qid];
8637 /* Set physical address of TX ring (256-byte aligned). */
8638 IWN_WRITE(sc, IWN_FH_CBBC_QUEUE(qid),
8639 txq->desc_dma.paddr >> 8);
8643 /* Enable DMA channels. */
8644 for (chnl = 0; chnl < sc->ndmachnls; chnl++) {
8645 IWN_WRITE(sc, IWN_FH_TX_CONFIG(chnl),
8646 IWN_FH_TX_CONFIG_DMA_ENA |
8647 IWN_FH_TX_CONFIG_DMA_CREDIT_ENA);
8650 /* Clear "radio off" and "commands blocked" bits. */
8651 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
8652 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_CMD_BLOCKED);
8654 /* Clear pending interrupts. */
8655 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8656 /* Enable interrupt coalescing. */
8657 IWN_WRITE(sc, IWN_INT_COALESCING, 512 / 8);
8658 /* Enable interrupts. */
8659 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
8661 /* _Really_ make sure "radio off" bit is cleared! */
8662 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
8663 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
8665 /* Enable shadow registers. */
8666 if (sc->base_params->shadow_reg_enable)
8667 IWN_SETBITS(sc, IWN_SHADOW_REG_CTRL, 0x800fffff);
8669 if ((error = ops->load_firmware(sc)) != 0) {
8670 device_printf(sc->sc_dev,
8671 "%s: could not load firmware, error %d\n", __func__,
8675 /* Wait at most one second for firmware alive notification. */
8676 if ((error = iwn_sleep(sc, sc, PCATCH, "iwninit", hz)) != 0) {
8677 device_printf(sc->sc_dev,
8678 "%s: timeout waiting for adapter to initialize, error %d\n",
8682 /* Do post-firmware initialization. */
8684 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
8686 return ops->post_alive(sc);
8690 iwn_hw_stop(struct iwn_softc *sc)
8692 int chnl, qid, ntries;
8694 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8696 IWN_WRITE(sc, IWN_RESET, IWN_RESET_NEVO);
8698 /* Disable interrupts. */
8699 IWN_WRITE(sc, IWN_INT_MASK, 0);
8700 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8701 IWN_WRITE(sc, IWN_FH_INT, 0xffffffff);
8702 sc->sc_flags &= ~IWN_FLAG_USE_ICT;
8704 /* Make sure we no longer hold the NIC lock. */
8707 /* Stop TX scheduler. */
8708 iwn_prph_write(sc, sc->sched_txfact_addr, 0);
8710 /* Stop all DMA channels. */
8711 if (iwn_nic_lock(sc) == 0) {
8712 for (chnl = 0; chnl < sc->ndmachnls; chnl++) {
8713 IWN_WRITE(sc, IWN_FH_TX_CONFIG(chnl), 0);
8714 for (ntries = 0; ntries < 200; ntries++) {
8715 if (IWN_READ(sc, IWN_FH_TX_STATUS) &
8716 IWN_FH_TX_STATUS_IDLE(chnl))
8725 iwn_reset_rx_ring(sc, &sc->rxq);
8727 /* Reset all TX rings. */
8728 for (qid = 0; qid < sc->ntxqs; qid++)
8729 iwn_reset_tx_ring(sc, &sc->txq[qid]);
8731 if (iwn_nic_lock(sc) == 0) {
8732 iwn_prph_write(sc, IWN_APMG_CLK_DIS,
8733 IWN_APMG_CLK_CTRL_DMA_CLK_RQT);
8737 /* Power OFF adapter. */
8742 iwn_radio_on(void *arg0, int pending)
8744 struct iwn_softc *sc = arg0;
8745 struct ifnet *ifp = sc->sc_ifp;
8746 struct ieee80211com *ic = ifp->if_l2com;
8747 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
8749 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8753 ieee80211_init(vap);
8758 iwn_radio_off(void *arg0, int pending)
8760 struct iwn_softc *sc = arg0;
8761 struct ifnet *ifp = sc->sc_ifp;
8762 struct ieee80211com *ic = ifp->if_l2com;
8763 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
8765 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8769 ieee80211_stop(vap);
8771 /* Enable interrupts to get RF toggle notification. */
8773 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8774 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
8779 iwn_panicked(void *arg0, int pending)
8781 struct iwn_softc *sc = arg0;
8782 struct ifnet *ifp = sc->sc_ifp;
8783 struct ieee80211com *ic = ifp->if_l2com;
8784 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
8788 kprintf("%s: null vap\n", __func__);
8792 device_printf(sc->sc_dev, "%s: controller panicked, iv_state = %d; "
8793 "resetting...\n", __func__, vap->iv_state);
8797 iwn_stop_locked(sc);
8798 iwn_init_locked(sc);
8799 if (vap->iv_state >= IEEE80211_S_AUTH &&
8800 (error = iwn_auth(sc, vap)) != 0) {
8801 device_printf(sc->sc_dev,
8802 "%s: could not move to auth state\n", __func__);
8804 if (vap->iv_state >= IEEE80211_S_RUN &&
8805 (error = iwn_run(sc, vap)) != 0) {
8806 device_printf(sc->sc_dev,
8807 "%s: could not move to run state\n", __func__);
8810 /* Only run start once the NIC is in a useful state, like associated */
8811 iwn_start_locked(sc->sc_ifp);
8817 iwn_init_locked(struct iwn_softc *sc)
8819 struct ifnet *ifp = sc->sc_ifp;
8822 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
8824 IWN_LOCK_ASSERT(sc);
8826 if ((error = iwn_hw_prepare(sc)) != 0) {
8827 device_printf(sc->sc_dev, "%s: hardware not ready, error %d\n",
8832 /* Initialize interrupt mask to default value. */
8833 sc->int_mask = IWN_INT_MASK_DEF;
8834 sc->sc_flags &= ~IWN_FLAG_USE_ICT;
8836 /* Check that the radio is not disabled by hardware switch. */
8837 if (!(IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_RFKILL)) {
8838 device_printf(sc->sc_dev,
8839 "radio is disabled by hardware switch\n");
8840 /* Enable interrupts to get RF toggle notifications. */
8841 IWN_WRITE(sc, IWN_INT, 0xffffffff);
8842 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
8846 /* Read firmware images from the filesystem. */
8847 if ((error = iwn_read_firmware(sc)) != 0) {
8848 device_printf(sc->sc_dev,
8849 "%s: could not read firmware, error %d\n", __func__,
8854 /* Initialize hardware and upload firmware. */
8855 error = iwn_hw_init(sc);
8856 firmware_put(sc->fw_fp, FIRMWARE_UNLOAD);
8859 device_printf(sc->sc_dev,
8860 "%s: could not initialize hardware, error %d\n", __func__,
8865 /* Configure adapter now that it is ready. */
8866 if ((error = iwn_config(sc)) != 0) {
8867 device_printf(sc->sc_dev,
8868 "%s: could not configure device, error %d\n", __func__,
8873 #if defined(__DragonFly__)
8874 ifq_clr_oactive(&ifp->if_snd);
8875 ifp->if_flags |= IFF_RUNNING;
8877 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
8878 ifp->if_drv_flags |= IFF_DRV_RUNNING;
8881 callout_reset(&sc->watchdog_to, hz, iwn_watchdog, sc);
8883 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
8887 fail: iwn_stop_locked(sc);
8888 DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end in error\n",__func__);
8894 struct iwn_softc *sc = arg;
8895 struct ifnet *ifp = sc->sc_ifp;
8896 struct ieee80211com *ic = ifp->if_l2com;
8899 iwn_init_locked(sc);
8902 if (ifp->if_drv_flags & IFF_DRV_RUNNING)
8903 ieee80211_start_all(ic);
8907 iwn_stop_locked(struct iwn_softc *sc)
8909 struct ifnet *ifp = sc->sc_ifp;
8911 IWN_LOCK_ASSERT(sc);
8913 sc->sc_is_scanning = 0;
8914 sc->sc_tx_timer = 0;
8915 #if defined(__DragonFly__)
8916 callout_stop_sync(&sc->watchdog_to);
8917 callout_stop_sync(&sc->calib_to);
8918 ifq_clr_oactive(&ifp->if_snd);
8919 ifp->if_flags &= ~IFF_RUNNING;
8921 callout_stop(&sc->watchdog_to);
8922 callout_stop(&sc->calib_to);
8923 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
8926 /* Power OFF hardware. */
8931 iwn_stop(struct iwn_softc *sc)
8934 iwn_stop_locked(sc);
8939 * Callback from net80211 to start a scan.
8942 iwn_scan_start(struct ieee80211com *ic)
8944 struct ifnet *ifp = ic->ic_ifp;
8945 struct iwn_softc *sc = ifp->if_softc;
8948 /* make the link LED blink while we're scanning */
8949 iwn_set_led(sc, IWN_LED_LINK, 20, 2);
8954 * Callback from net80211 to terminate a scan.
8957 iwn_scan_end(struct ieee80211com *ic)
8959 struct ifnet *ifp = ic->ic_ifp;
8960 struct iwn_softc *sc = ifp->if_softc;
8961 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
8964 if (vap->iv_state == IEEE80211_S_RUN) {
8965 /* Set link LED to ON status if we are associated */
8966 iwn_set_led(sc, IWN_LED_LINK, 0, 1);
8972 * Callback from net80211 to force a channel change.
8975 iwn_set_channel(struct ieee80211com *ic)
8977 const struct ieee80211_channel *c = ic->ic_curchan;
8978 struct ifnet *ifp = ic->ic_ifp;
8979 struct iwn_softc *sc = ifp->if_softc;
8982 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
8985 sc->sc_rxtap.wr_chan_freq = htole16(c->ic_freq);
8986 sc->sc_rxtap.wr_chan_flags = htole16(c->ic_flags);
8987 sc->sc_txtap.wt_chan_freq = htole16(c->ic_freq);
8988 sc->sc_txtap.wt_chan_flags = htole16(c->ic_flags);
8991 * Only need to set the channel in Monitor mode. AP scanning and auth
8992 * are already taken care of by their respective firmware commands.
8994 if (ic->ic_opmode == IEEE80211_M_MONITOR) {
8995 error = iwn_config(sc);
8997 device_printf(sc->sc_dev,
8998 "%s: error %d settting channel\n", __func__, error);
9004 * Callback from net80211 to start scanning of the current channel.
9007 iwn_scan_curchan(struct ieee80211_scan_state *ss, unsigned long maxdwell)
9009 struct ieee80211vap *vap = ss->ss_vap;
9010 struct iwn_softc *sc = vap->iv_ic->ic_ifp->if_softc;
9011 struct ieee80211com *ic = vap->iv_ic;
9015 error = iwn_scan(sc, vap, ss, ic->ic_curchan);
9018 ieee80211_cancel_scan(vap);
9022 * Callback from net80211 to handle the minimum dwell time being met.
9023 * The intent is to terminate the scan but we just let the firmware
9024 * notify us when it's finished as we have no safe way to abort it.
9027 iwn_scan_mindwell(struct ieee80211_scan_state *ss)
9029 /* NB: don't try to abort scan; wait for firmware to finish */
9033 iwn_hw_reset(void *arg0, int pending)
9035 struct iwn_softc *sc = arg0;
9036 struct ifnet *ifp = sc->sc_ifp;
9037 struct ieee80211com *ic = ifp->if_l2com;
9039 DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__);
9043 ieee80211_notify_radio(ic, 1);
9046 #define IWN_DESC(x) case x: return #x
9047 #define COUNTOF(array) (sizeof(array) / sizeof(array[0]))
9050 * Translate CSR code to string
9052 static char *iwn_get_csr_string(int csr)
9055 IWN_DESC(IWN_HW_IF_CONFIG);
9056 IWN_DESC(IWN_INT_COALESCING);
9058 IWN_DESC(IWN_INT_MASK);
9059 IWN_DESC(IWN_FH_INT);
9060 IWN_DESC(IWN_GPIO_IN);
9061 IWN_DESC(IWN_RESET);
9062 IWN_DESC(IWN_GP_CNTRL);
9063 IWN_DESC(IWN_HW_REV);
9064 IWN_DESC(IWN_EEPROM);
9065 IWN_DESC(IWN_EEPROM_GP);
9066 IWN_DESC(IWN_OTP_GP);
9068 IWN_DESC(IWN_GP_UCODE);
9069 IWN_DESC(IWN_GP_DRIVER);
9070 IWN_DESC(IWN_UCODE_GP1);
9071 IWN_DESC(IWN_UCODE_GP2);
9073 IWN_DESC(IWN_DRAM_INT_TBL);
9074 IWN_DESC(IWN_GIO_CHICKEN);
9075 IWN_DESC(IWN_ANA_PLL);
9076 IWN_DESC(IWN_HW_REV_WA);
9077 IWN_DESC(IWN_DBG_HPET_MEM);
9079 return "UNKNOWN CSR";
9084 * This function print firmware register
9087 iwn_debug_register(struct iwn_softc *sc)
9090 static const uint32_t csr_tbl[] = {
9115 DPRINTF(sc, IWN_DEBUG_REGISTER,
9116 "CSR values: (2nd byte of IWN_INT_COALESCING is IWN_INT_PERIODIC)%s",
9118 for (i = 0; i < COUNTOF(csr_tbl); i++){
9119 DPRINTF(sc, IWN_DEBUG_REGISTER," %10s: 0x%08x ",
9120 iwn_get_csr_string(csr_tbl[i]), IWN_READ(sc, csr_tbl[i]));
9122 DPRINTF(sc, IWN_DEBUG_REGISTER,"%s","\n");
9124 DPRINTF(sc, IWN_DEBUG_REGISTER,"%s","\n");
9128 #if defined(__DragonFly__)
9131 iwn_sleep(struct iwn_softc *sc, void *wchan,
9132 int flags, const char *wmsg, int timo)
9137 iws = wlan_is_serialized();
9139 wlan_serialize_exit();
9140 error = lksleep(wchan, &sc->sc_mtx, flags, wmsg, timo);
9142 wlan_serialize_enter();
9150 iwn_sleep(struct iwn_softc *sc, void *wchan,
9151 int flags, const char *wmsg, int timo)
9155 error = lksleep(wchan, &sc->sc_mtx, flags, wmsg, timo);