sys/dev/drm/i915/intel_sdvo.c

   1 /*
   2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright © 2006-2007 Intel Corporation
   4  *   Jesse Barnes <jesse.barnes@intel.com>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23  * DEALINGS IN THE SOFTWARE.
  24  *
  25  * Authors:
  26  *      Eric Anholt <eric@anholt.net>
  27  */
  28
  29 #include <drm/drmP.h>
  30 #include <drm/drm_crtc.h>
  31 #include <drm/drm_edid.h>
  32 #include "intel_drv.h"
  33 #include <drm/i915_drm.h>
  34 #include "i915_drv.h"
  35 #include "intel_sdvo_regs.h"
  36
  37 #include <bus/iicbus/iic.h>
  38 #include <bus/iicbus/iiconf.h>
  39 #include "iicbus_if.h"
  40
  41 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  42 #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  43 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  44 #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
  45
  46 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  47                         SDVO_TV_MASK)
  48
  49 #define IS_TV(c)        (c->output_flag & SDVO_TV_MASK)
  50 #define IS_TMDS(c)      (c->output_flag & SDVO_TMDS_MASK)
  51 #define IS_LVDS(c)      (c->output_flag & SDVO_LVDS_MASK)
  52 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  53 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
  54
  55
  56 static const char *tv_format_names[] = {
  57         "NTSC_M"   , "NTSC_J"  , "NTSC_443",
  58         "PAL_B"    , "PAL_D"   , "PAL_G"   ,
  59         "PAL_H"    , "PAL_I"   , "PAL_M"   ,
  60         "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
  61         "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
  62         "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
  63         "SECAM_60"
  64 };
  65
  66 #define TV_FORMAT_NUM  (sizeof(tv_format_names) / sizeof(*tv_format_names))
  67
  68 struct intel_sdvo {
  69         struct intel_encoder base;
  70
  71         device_t i2c;
  72         u8 slave_addr;
  73
  74         device_t ddc_iic_bus, ddc;
  75
  76         /* Register for the SDVO device: SDVOB or SDVOC */
  77         uint32_t sdvo_reg;
  78
  79         /* Active outputs controlled by this SDVO output */
  80         uint16_t controlled_output;
  81
  82         /*
  83          * Capabilities of the SDVO device returned by
  84          * i830_sdvo_get_capabilities()
  85          */
  86         struct intel_sdvo_caps caps;
  87
  88         /* Pixel clock limitations reported by the SDVO device, in kHz */
  89         int pixel_clock_min, pixel_clock_max;
  90
  91         /*
  92         * For multiple function SDVO device,
  93         * this is for current attached outputs.
  94         */
  95         uint16_t attached_output;
  96
  97         /*
  98          * Hotplug activation bits for this device
  99          */
 100         uint16_t hotplug_active;
 101
 102         /**
 103          * This is used to select the color range of RBG outputs in HDMI mode.
 104          * It is only valid when using TMDS encoding and 8 bit per color mode.
 105          */
 106         uint32_t color_range;
 107         bool color_range_auto;
 108
 109         /**
 110          * This is set if we're going to treat the device as TV-out.
 111          *
 112          * While we have these nice friendly flags for output types that ought
 113          * to decide this for us, the S-Video output on our HDMI+S-Video card
 114          * shows up as RGB1 (VGA).
 115          */
 116         bool is_tv;
 117
 118         /* On different gens SDVOB is at different places. */
 119         bool is_sdvob;
 120
 121         /* This is for current tv format name */
 122         int tv_format_index;
 123
 124         /**
 125          * This is set if we treat the device as HDMI, instead of DVI.
 126          */
 127         bool is_hdmi;
 128         bool has_hdmi_monitor;
 129         bool has_hdmi_audio;
 130         bool rgb_quant_range_selectable;
 131
 132         /**
 133          * This is set if we detect output of sdvo device as LVDS and
 134          * have a valid fixed mode to use with the panel.
 135          */
 136         bool is_lvds;
 137
 138         /**
 139          * This is sdvo fixed pannel mode pointer
 140          */
 141         struct drm_display_mode *sdvo_lvds_fixed_mode;
 142
 143         /* DDC bus used by this SDVO encoder */
 144         uint8_t ddc_bus;
 145
 146         /*
 147          * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
 148          */
 149         uint8_t dtd_sdvo_flags;
 150 };
 151
 152 struct intel_sdvo_connector {
 153         struct intel_connector base;
 154
 155         /* Mark the type of connector */
 156         uint16_t output_flag;
 157
 158         enum hdmi_force_audio force_audio;
 159
 160         /* This contains all current supported TV format */
 161         u8 tv_format_supported[TV_FORMAT_NUM];
 162         int   format_supported_num;
 163         struct drm_property *tv_format;
 164
 165         /* add the property for the SDVO-TV */
 166         struct drm_property *left;
 167         struct drm_property *right;
 168         struct drm_property *top;
 169         struct drm_property *bottom;
 170         struct drm_property *hpos;
 171         struct drm_property *vpos;
 172         struct drm_property *contrast;
 173         struct drm_property *saturation;
 174         struct drm_property *hue;
 175         struct drm_property *sharpness;
 176         struct drm_property *flicker_filter;
 177         struct drm_property *flicker_filter_adaptive;
 178         struct drm_property *flicker_filter_2d;
 179         struct drm_property *tv_chroma_filter;
 180         struct drm_property *tv_luma_filter;
 181         struct drm_property *dot_crawl;
 182
 183         /* add the property for the SDVO-TV/LVDS */
 184         struct drm_property *brightness;
 185
 186         /* Add variable to record current setting for the above property */
 187         u32     left_margin, right_margin, top_margin, bottom_margin;
 188
 189         /* this is to get the range of margin.*/
 190         u32     max_hscan,  max_vscan;
 191         u32     max_hpos, cur_hpos;
 192         u32     max_vpos, cur_vpos;
 193         u32     cur_brightness, max_brightness;
 194         u32     cur_contrast,   max_contrast;
 195         u32     cur_saturation, max_saturation;
 196         u32     cur_hue,        max_hue;
 197         u32     cur_sharpness,  max_sharpness;
 198         u32     cur_flicker_filter,             max_flicker_filter;
 199         u32     cur_flicker_filter_adaptive,    max_flicker_filter_adaptive;
 200         u32     cur_flicker_filter_2d,          max_flicker_filter_2d;
 201         u32     cur_tv_chroma_filter,   max_tv_chroma_filter;
 202         u32     cur_tv_luma_filter,     max_tv_luma_filter;
 203         u32     cur_dot_crawl,  max_dot_crawl;
 204 };
 205
 206 static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
 207 {
 208         return container_of(encoder, struct intel_sdvo, base.base);
 209 }
 210
 211 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
 212 {
 213         return container_of(intel_attached_encoder(connector),
 214                             struct intel_sdvo, base);
 215 }
 216
 217 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
 218 {
 219         return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
 220 }
 221
 222 static bool
 223 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
 224 static bool
 225 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
 226                               struct intel_sdvo_connector *intel_sdvo_connector,
 227                               int type);
 228 static bool
 229 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
 230                                    struct intel_sdvo_connector *intel_sdvo_connector);
 231
 232 /**
 233  * Writes the SDVOB or SDVOC with the given value, but always writes both
 234  * SDVOB and SDVOC to work around apparent hardware issues (according to
 235  * comments in the BIOS).
 236  */
 237 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
 238 {
 239         struct drm_device *dev = intel_sdvo->base.base.dev;
 240         struct drm_i915_private *dev_priv = dev->dev_private;
 241         u32 bval = val, cval = val;
 242         int i;
 243
 244         if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
 245                 I915_WRITE(intel_sdvo->sdvo_reg, val);
 246                 I915_READ(intel_sdvo->sdvo_reg);
 247                 return;
 248         }
 249
 250         if (intel_sdvo->sdvo_reg == SDVOB) {
 251                 cval = I915_READ(SDVOC);
 252         } else {
 253                 bval = I915_READ(SDVOB);
 254         }
 255         /*
 256          * Write the registers twice for luck. Sometimes,
 257          * writing them only once doesn't appear to 'stick'.
 258          * The BIOS does this too. Yay, magic
 259          */
 260         for (i = 0; i < 2; i++)
 261         {
 262                 I915_WRITE(SDVOB, bval);
 263                 I915_READ(SDVOB);
 264                 I915_WRITE(SDVOC, cval);
 265                 I915_READ(SDVOC);
 266         }
 267 }
 268
 269 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
 270 {
 271         struct iic_msg msgs[] = {
 272                 {
 273                         .slave = intel_sdvo->slave_addr << 1,
 274                         .flags = 0,
 275                         .len = 1,
 276                         .buf = &addr,
 277                 },
 278                 {
 279                         .slave = intel_sdvo->slave_addr << 1,
 280                         .flags = IIC_M_RD,
 281                         .len = 1,
 282                         .buf = ch,
 283                 }
 284         };
 285         int ret;
 286
 287         if ((ret = iicbus_transfer(intel_sdvo->i2c, msgs, 2)) == 0)
 288                 return true;
 289
 290         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
 291         return false;
 292 }
 293
 294 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
 295 /** Mapping of command numbers to names, for debug output */
 296 static const struct _sdvo_cmd_name {
 297         u8 cmd;
 298         const char *name;
 299 } sdvo_cmd_names[] = {
 300         SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
 301         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
 302         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
 303         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
 304         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
 305         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
 306         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
 307         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
 308         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
 309         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
 310         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
 311         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
 312         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
 313         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
 314         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
 315         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
 316         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
 317         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 318         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
 319         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 320         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
 321         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
 322         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
 323         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
 324         SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
 325         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
 326         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
 327         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
 328         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
 329         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
 330         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
 331         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
 332         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
 333         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
 334         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
 335         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
 336         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
 337         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
 338         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
 339         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
 340         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
 341         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
 342         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
 343
 344         /* Add the op code for SDVO enhancements */
 345         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
 346         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
 347         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
 348         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
 349         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
 350         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
 351         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
 352         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
 353         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
 354         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
 355         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
 356         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
 357         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
 358         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
 359         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
 360         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
 361         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
 362         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
 363         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
 364         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
 365         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
 366         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
 367         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
 368         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
 369         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
 370         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
 371         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
 372         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
 373         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
 374         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
 375         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
 376         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
 377         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
 378         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
 379         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
 380         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
 381         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
 382         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
 383         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
 384         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
 385         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
 386         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
 387         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
 388         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
 389
 390         /* HDMI op code */
 391         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
 392         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
 393         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
 394         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
 395         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
 396         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
 397         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
 398         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
 399         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
 400         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
 401         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
 402         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
 403         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
 404         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
 405         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
 406         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
 407         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
 408         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
 409         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
 410         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
 411 };
 412
 413 #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
 414
 415 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
 416                                    const void *args, int args_len)
 417 {
 418         int i;
 419
 420         DRM_DEBUG_KMS("%s: W: %02X ",
 421                                 SDVO_NAME(intel_sdvo), cmd);
 422         for (i = 0; i < args_len; i++)
 423                 kprintf("%02X ", ((const u8 *)args)[i]);
 424         for (; i < 8; i++)
 425                 DRM_LOG_KMS("   ");
 426         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
 427                 if (cmd == sdvo_cmd_names[i].cmd) {
 428                         DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
 429                         break;
 430                 }
 431         }
 432         if (i == ARRAY_SIZE(sdvo_cmd_names))
 433                 DRM_LOG_KMS("(%02X)", cmd);
 434         DRM_LOG_KMS("\n");
 435 }
 436
 437 static const char *cmd_status_names[] = {
 438         "Power on",
 439         "Success",
 440         "Not supported",
 441         "Invalid arg",
 442         "Pending",
 443         "Target not specified",
 444         "Scaling not supported"
 445 };
 446
 447 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 448                                  const void *args, int args_len)
 449 {
 450         u8 buf[args_len*2 + 2], status;
 451         struct iic_msg msgs[args_len + 3];
 452         int i, ret;
 453
 454         intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
 455
 456         for (i = 0; i < args_len; i++) {
 457                 msgs[i].slave = intel_sdvo->slave_addr << 1;
 458                 msgs[i].flags = 0;
 459                 msgs[i].len = 2;
 460                 msgs[i].buf = buf + 2 *i;
 461                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
 462                 buf[2*i + 1] = ((const u8*)args)[i];
 463         }
 464         msgs[i].slave = intel_sdvo->slave_addr << 1;
 465         msgs[i].flags = 0;
 466         msgs[i].len = 2;
 467         msgs[i].buf = buf + 2*i;
 468         buf[2*i + 0] = SDVO_I2C_OPCODE;
 469         buf[2*i + 1] = cmd;
 470
 471         /* the following two are to read the response */
 472         status = SDVO_I2C_CMD_STATUS;
 473         msgs[i+1].slave = intel_sdvo->slave_addr << 1;
 474         msgs[i+1].flags = 0;
 475         msgs[i+1].len = 1;
 476         msgs[i+1].buf = &status;
 477
 478         msgs[i+2].slave = intel_sdvo->slave_addr << 1;
 479         msgs[i+2].flags = IIC_M_RD;
 480         msgs[i+2].len = 1;
 481         msgs[i+2].buf = &status;
 482
 483         ret = iicbus_transfer(intel_sdvo->i2c, msgs, i+3);
 484         if (ret != 0) {
 485                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
 486                 return (false);
 487         }
 488 #if 0
 489         if (ret != i+3) {
 490                 /* failure in I2C transfer */
 491                 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
 492                 return false;
 493         }
 494 #endif
 495
 496         return true;
 497 }
 498
 499 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
 500                                      void *response, int response_len)
 501 {
 502         u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
 503         u8 status;
 504         int i;
 505
 506         DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
 507
 508         /*
 509          * The documentation states that all commands will be
 510          * processed within 15µs, and that we need only poll
 511          * the status byte a maximum of 3 times in order for the
 512          * command to be complete.
 513          *
 514          * Check 5 times in case the hardware failed to read the docs.
 515          *
 516          * Also beware that the first response by many devices is to
 517          * reply PENDING and stall for time. TVs are notorious for
 518          * requiring longer than specified to complete their replies.
 519          * Originally (in the DDX long ago), the delay was only ever 15ms
 520          * with an additional delay of 30ms applied for TVs added later after
 521          * many experiments. To accommodate both sets of delays, we do a
 522          * sequence of slow checks if the device is falling behind and fails
 523          * to reply within 5*15µs.
 524          */
 525         if (!intel_sdvo_read_byte(intel_sdvo,
 526                                   SDVO_I2C_CMD_STATUS,
 527                                   &status))
 528                 goto log_fail;
 529
 530         while (status == SDVO_CMD_STATUS_PENDING && --retry) {
 531                 if (retry < 10)
 532                         msleep(15);
 533                 else
 534                         udelay(15);
 535
 536                 if (!intel_sdvo_read_byte(intel_sdvo,
 537                                           SDVO_I2C_CMD_STATUS,
 538                                           &status))
 539                         goto log_fail;
 540         }
 541
 542         if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
 543                 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
 544         else
 545                 DRM_LOG_KMS("(??? %d)", status);
 546
 547         if (status != SDVO_CMD_STATUS_SUCCESS)
 548                 goto log_fail;
 549
 550         /* Read the command response */
 551         for (i = 0; i < response_len; i++) {
 552                 if (!intel_sdvo_read_byte(intel_sdvo,
 553                                           SDVO_I2C_RETURN_0 + i,
 554                                           &((u8 *)response)[i]))
 555                         goto log_fail;
 556                 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
 557         }
 558         DRM_LOG_KMS("\n");
 559         return true;
 560
 561 log_fail:
 562         DRM_LOG_KMS("... failed\n");
 563         return false;
 564 }
 565
 566 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
 567 {
 568         if (mode->clock >= 100000)
 569                 return 1;
 570         else if (mode->clock >= 50000)
 571                 return 2;
 572         else
 573                 return 4;
 574 }
 575
 576 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
 577                                               u8 ddc_bus)
 578 {
 579         /* This must be the immediately preceding write before the i2c xfer */
 580         return intel_sdvo_write_cmd(intel_sdvo,
 581                                     SDVO_CMD_SET_CONTROL_BUS_SWITCH,
 582                                     &ddc_bus, 1);
 583 }
 584
 585 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
 586 {
 587         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
 588                 return false;
 589
 590         return intel_sdvo_read_response(intel_sdvo, NULL, 0);
 591 }
 592
 593 static bool
 594 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
 595 {
 596         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
 597                 return false;
 598
 599         return intel_sdvo_read_response(intel_sdvo, value, len);
 600 }
 601
 602 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
 603 {
 604         struct intel_sdvo_set_target_input_args targets = {0};
 605         return intel_sdvo_set_value(intel_sdvo,
 606                                     SDVO_CMD_SET_TARGET_INPUT,
 607                                     &targets, sizeof(targets));
 608 }
 609
 610 /**
 611  * Return whether each input is trained.
 612  *
 613  * This function is making an assumption about the layout of the response,
 614  * which should be checked against the docs.
 615  */
 616 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
 617 {
 618         struct intel_sdvo_get_trained_inputs_response response;
 619
 620         BUILD_BUG_ON(sizeof(response) != 1);
 621         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
 622                                   &response, sizeof(response)))
 623                 return false;
 624
 625         *input_1 = response.input0_trained;
 626         *input_2 = response.input1_trained;
 627         return true;
 628 }
 629
 630 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
 631                                           u16 outputs)
 632 {
 633         return intel_sdvo_set_value(intel_sdvo,
 634                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
 635                                     &outputs, sizeof(outputs));
 636 }
 637
 638 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
 639                                           u16 *outputs)
 640 {
 641         return intel_sdvo_get_value(intel_sdvo,
 642                                     SDVO_CMD_GET_ACTIVE_OUTPUTS,
 643                                     outputs, sizeof(*outputs));
 644 }
 645
 646 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
 647                                                int mode)
 648 {
 649         u8 state = SDVO_ENCODER_STATE_ON;
 650
 651         switch (mode) {
 652         case DRM_MODE_DPMS_ON:
 653                 state = SDVO_ENCODER_STATE_ON;
 654                 break;
 655         case DRM_MODE_DPMS_STANDBY:
 656                 state = SDVO_ENCODER_STATE_STANDBY;
 657                 break;
 658         case DRM_MODE_DPMS_SUSPEND:
 659                 state = SDVO_ENCODER_STATE_SUSPEND;
 660                 break;
 661         case DRM_MODE_DPMS_OFF:
 662                 state = SDVO_ENCODER_STATE_OFF;
 663                 break;
 664         }
 665
 666         return intel_sdvo_set_value(intel_sdvo,
 667                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
 668 }
 669
 670 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
 671                                                    int *clock_min,
 672                                                    int *clock_max)
 673 {
 674         struct intel_sdvo_pixel_clock_range clocks;
 675
 676         BUILD_BUG_ON(sizeof(clocks) != 4);
 677         if (!intel_sdvo_get_value(intel_sdvo,
 678                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
 679                                   &clocks, sizeof(clocks)))
 680                 return false;
 681
 682         /* Convert the values from units of 10 kHz to kHz. */
 683         *clock_min = clocks.min * 10;
 684         *clock_max = clocks.max * 10;
 685         return true;
 686 }
 687
 688 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
 689                                          u16 outputs)
 690 {
 691         return intel_sdvo_set_value(intel_sdvo,
 692                                     SDVO_CMD_SET_TARGET_OUTPUT,
 693                                     &outputs, sizeof(outputs));
 694 }
 695
 696 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 697                                   struct intel_sdvo_dtd *dtd)
 698 {
 699         return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 700                 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 701 }
 702
 703 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
 704                                          struct intel_sdvo_dtd *dtd)
 705 {
 706         return intel_sdvo_set_timing(intel_sdvo,
 707                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
 708 }
 709
 710 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
 711                                          struct intel_sdvo_dtd *dtd)
 712 {
 713         return intel_sdvo_set_timing(intel_sdvo,
 714                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
 715 }
 716
 717 static bool
 718 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 719                                          uint16_t clock,
 720                                          uint16_t width,
 721                                          uint16_t height)
 722 {
 723         struct intel_sdvo_preferred_input_timing_args args;
 724
 725         memset(&args, 0, sizeof(args));
 726         args.clock = clock;
 727         args.width = width;
 728         args.height = height;
 729         args.interlace = 0;
 730
 731         if (intel_sdvo->is_lvds &&
 732            (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
 733             intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
 734                 args.scaled = 1;
 735
 736         return intel_sdvo_set_value(intel_sdvo,
 737                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
 738                                     &args, sizeof(args));
 739 }
 740
 741 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 742                                                   struct intel_sdvo_dtd *dtd)
 743 {
 744         BUILD_BUG_ON(sizeof(dtd->part1) != 8);
 745         BUILD_BUG_ON(sizeof(dtd->part2) != 8);
 746         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
 747                                     &dtd->part1, sizeof(dtd->part1)) &&
 748                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
 749                                      &dtd->part2, sizeof(dtd->part2));
 750 }
 751
 752 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
 753 {
 754         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
 755 }
 756
 757 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
 758                                          const struct drm_display_mode *mode)
 759 {
 760         uint16_t width, height;
 761         uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
 762         uint16_t h_sync_offset, v_sync_offset;
 763         int mode_clock;
 764
 765         width = mode->hdisplay;
 766         height = mode->vdisplay;
 767
 768         /* do some mode translations */
 769         h_blank_len = mode->htotal - mode->hdisplay;
 770         h_sync_len = mode->hsync_end - mode->hsync_start;
 771
 772         v_blank_len = mode->vtotal - mode->vdisplay;
 773         v_sync_len = mode->vsync_end - mode->vsync_start;
 774
 775         h_sync_offset = mode->hsync_start - mode->hdisplay;
 776         v_sync_offset = mode->vsync_start - mode->vdisplay;
 777
 778         mode_clock = mode->clock;
 779         mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1;
 780         mode_clock /= 10;
 781         dtd->part1.clock = mode_clock;
 782
 783         dtd->part1.h_active = width & 0xff;
 784         dtd->part1.h_blank = h_blank_len & 0xff;
 785         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
 786                 ((h_blank_len >> 8) & 0xf);
 787         dtd->part1.v_active = height & 0xff;
 788         dtd->part1.v_blank = v_blank_len & 0xff;
 789         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
 790                 ((v_blank_len >> 8) & 0xf);
 791
 792         dtd->part2.h_sync_off = h_sync_offset & 0xff;
 793         dtd->part2.h_sync_width = h_sync_len & 0xff;
 794         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
 795                 (v_sync_len & 0xf);
 796         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
 797                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
 798                 ((v_sync_len & 0x30) >> 4);
 799
 800         dtd->part2.dtd_flags = 0x18;
 801         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
 802                 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
 803         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
 804                 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
 805         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 806                 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
 807
 808         dtd->part2.sdvo_flags = 0;
 809         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
 810         dtd->part2.reserved = 0;
 811 }
 812
 813 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
 814                                          const struct intel_sdvo_dtd *dtd)
 815 {
 816         mode->hdisplay = dtd->part1.h_active;
 817         mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
 818         mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
 819         mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
 820         mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
 821         mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
 822         mode->htotal = mode->hdisplay + dtd->part1.h_blank;
 823         mode->htotal += (dtd->part1.h_high & 0xf) << 8;
 824
 825         mode->vdisplay = dtd->part1.v_active;
 826         mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
 827         mode->vsync_start = mode->vdisplay;
 828         mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
 829         mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
 830         mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
 831         mode->vsync_end = mode->vsync_start +
 832                 (dtd->part2.v_sync_off_width & 0xf);
 833         mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
 834         mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
 835         mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
 836
 837         mode->clock = dtd->part1.clock * 10;
 838
 839         mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
 840         if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
 841                 mode->flags |= DRM_MODE_FLAG_INTERLACE;
 842         if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
 843                 mode->flags |= DRM_MODE_FLAG_PHSYNC;
 844         if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
 845                 mode->flags |= DRM_MODE_FLAG_PVSYNC;
 846 }
 847
 848 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
 849 {
 850         struct intel_sdvo_encode encode;
 851
 852         BUILD_BUG_ON(sizeof(encode) != 2);
 853         return intel_sdvo_get_value(intel_sdvo,
 854                                   SDVO_CMD_GET_SUPP_ENCODE,
 855                                   &encode, sizeof(encode));
 856 }
 857
 858 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
 859                                   uint8_t mode)
 860 {
 861         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
 862 }
 863
 864 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
 865                                        uint8_t mode)
 866 {
 867         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
 868 }
 869
 870 #if 0
 871 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
 872 {
 873         int i, j;
 874         uint8_t set_buf_index[2];
 875         uint8_t av_split;
 876         uint8_t buf_size;
 877         uint8_t buf[48];
 878         uint8_t *pos;
 879
 880         intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
 881
 882         for (i = 0; i <= av_split; i++) {
 883                 set_buf_index[0] = i; set_buf_index[1] = 0;
 884                 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
 885                                      set_buf_index, 2);
 886                 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
 887                 intel_sdvo_read_response(encoder, &buf_size, 1);
 888
 889                 pos = buf;
 890                 for (j = 0; j <= buf_size; j += 8) {
 891                         intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
 892                                              NULL, 0);
 893                         intel_sdvo_read_response(encoder, pos, 8);
 894                         pos += 8;
 895                 }
 896         }
 897 }
 898 #endif
 899
 900 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
 901                                        unsigned if_index, uint8_t tx_rate,
 902                                        uint8_t *data, unsigned length)
 903 {
 904         uint8_t set_buf_index[2] = { if_index, 0 };
 905         uint8_t hbuf_size, tmp[8];
 906         int i;
 907
 908         if (!intel_sdvo_set_value(intel_sdvo,
 909                                   SDVO_CMD_SET_HBUF_INDEX,
 910                                   set_buf_index, 2))
 911                 return false;
 912
 913         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
 914                                   &hbuf_size, 1))
 915                 return false;
 916
 917         /* Buffer size is 0 based, hooray! */
 918         hbuf_size++;
 919
 920         DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
 921                       if_index, length, hbuf_size);
 922
 923         for (i = 0; i < hbuf_size; i += 8) {
 924                 memset(tmp, 0, 8);
 925                 if (i < length)
 926                         memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
 927
 928                 if (!intel_sdvo_set_value(intel_sdvo,
 929                                           SDVO_CMD_SET_HBUF_DATA,
 930                                           tmp, 8))
 931                         return false;
 932         }
 933
 934         return intel_sdvo_set_value(intel_sdvo,
 935                                     SDVO_CMD_SET_HBUF_TXRATE,
 936                                     &tx_rate, 1);
 937 }
 938
 939 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
 940                                          const struct drm_display_mode *adjusted_mode)
 941 {
 942         struct dip_infoframe avi_if = {
 943                 .type = DIP_TYPE_AVI,
 944                 .ver = DIP_VERSION_AVI,
 945                 .len = DIP_LEN_AVI,
 946         };
 947         uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)];
 948
 949         if (intel_sdvo->rgb_quant_range_selectable) {
 950                 if (adjusted_mode->private_flags & INTEL_MODE_LIMITED_COLOR_RANGE)
 951                         avi_if.body.avi.ITC_EC_Q_SC |= DIP_AVI_RGB_QUANT_RANGE_LIMITED;
 952                 else
 953                         avi_if.body.avi.ITC_EC_Q_SC |= DIP_AVI_RGB_QUANT_RANGE_FULL;
 954         }
 955
 956         intel_dip_infoframe_csum(&avi_if);
 957
 958         /* sdvo spec says that the ecc is handled by the hw, and it looks like
 959          * we must not send the ecc field, either. */
 960         memcpy(sdvo_data, &avi_if, 3);
 961         sdvo_data[3] = avi_if.checksum;
 962         memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi));
 963
 964         return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
 965                                           SDVO_HBUF_TX_VSYNC,
 966                                           sdvo_data, sizeof(sdvo_data));
 967 }
 968
 969 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
 970 {
 971         struct intel_sdvo_tv_format format;
 972         uint32_t format_map;
 973
 974         format_map = 1 << intel_sdvo->tv_format_index;
 975         memset(&format, 0, sizeof(format));
 976         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
 977
 978         BUILD_BUG_ON(sizeof(format) != 6);
 979         return intel_sdvo_set_value(intel_sdvo,
 980                                     SDVO_CMD_SET_TV_FORMAT,
 981                                     &format, sizeof(format));
 982 }
 983
 984 static bool
 985 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
 986                                         const struct drm_display_mode *mode)
 987 {
 988         struct intel_sdvo_dtd output_dtd;
 989
 990         if (!intel_sdvo_set_target_output(intel_sdvo,
 991                                           intel_sdvo->attached_output))
 992                 return false;
 993
 994         intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
 995         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
 996                 return false;
 997
 998         return true;
 999 }
1000
1001 /* Asks the sdvo controller for the preferred input mode given the output mode.
1002  * Unfortunately we have to set up the full output mode to do that. */
1003 static bool
1004 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
1005                                     const struct drm_display_mode *mode,
1006                                     struct drm_display_mode *adjusted_mode)
1007 {
1008         struct intel_sdvo_dtd input_dtd;
1009
1010         /* Reset the input timing to the screen. Assume always input 0. */
1011         if (!intel_sdvo_set_target_input(intel_sdvo))
1012                 return false;
1013
1014         if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1015                                                       mode->clock / 10,
1016                                                       mode->hdisplay,
1017                                                       mode->vdisplay))
1018                 return false;
1019
1020         if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1021                                                    &input_dtd))
1022                 return false;
1023
1024         intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1025         intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
1026
1027         return true;
1028 }
1029
1030 static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
1031                                   const struct drm_display_mode *mode,
1032                                   struct drm_display_mode *adjusted_mode)
1033 {
1034         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1035         int multiplier;
1036
1037         /* We need to construct preferred input timings based on our
1038          * output timings.  To do that, we have to set the output
1039          * timings, even though this isn't really the right place in
1040          * the sequence to do it. Oh well.
1041          */
1042         if (intel_sdvo->is_tv) {
1043                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1044                         return false;
1045
1046                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1047                                                            mode,
1048                                                            adjusted_mode);
1049         } else if (intel_sdvo->is_lvds) {
1050                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1051                                                              intel_sdvo->sdvo_lvds_fixed_mode))
1052                         return false;
1053
1054                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1055                                                            mode,
1056                                                            adjusted_mode);
1057         }
1058
1059         /* Make the CRTC code factor in the SDVO pixel multiplier.  The
1060          * SDVO device will factor out the multiplier during mode_set.
1061          */
1062         multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
1063         intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
1064
1065         if (intel_sdvo->color_range_auto) {
1066                 /* See CEA-861-E - 5.1 Default Encoding Parameters */
1067                 if (intel_sdvo->has_hdmi_monitor &&
1068                     drm_match_cea_mode(adjusted_mode) > 1)
1069                         intel_sdvo->color_range = SDVO_COLOR_RANGE_16_235;
1070                 else
1071                         intel_sdvo->color_range = 0;
1072         }
1073
1074         if (intel_sdvo->color_range)
1075                 adjusted_mode->private_flags |= INTEL_MODE_LIMITED_COLOR_RANGE;
1076
1077         return true;
1078 }
1079
1080 static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1081                                 struct drm_display_mode *mode,
1082                                 struct drm_display_mode *adjusted_mode)
1083 {
1084         struct drm_device *dev = encoder->dev;
1085         struct drm_i915_private *dev_priv = dev->dev_private;
1086         struct drm_crtc *crtc = encoder->crtc;
1087         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1088         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1089         u32 sdvox;
1090         struct intel_sdvo_in_out_map in_out;
1091         struct intel_sdvo_dtd input_dtd, output_dtd;
1092         int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
1093         int rate;
1094
1095         if (!mode)
1096                 return;
1097
1098         /* First, set the input mapping for the first input to our controlled
1099          * output. This is only correct if we're a single-input device, in
1100          * which case the first input is the output from the appropriate SDVO
1101          * channel on the motherboard.  In a two-input device, the first input
1102          * will be SDVOB and the second SDVOC.
1103          */
1104         in_out.in0 = intel_sdvo->attached_output;
1105         in_out.in1 = 0;
1106
1107         intel_sdvo_set_value(intel_sdvo,
1108                              SDVO_CMD_SET_IN_OUT_MAP,
1109                              &in_out, sizeof(in_out));
1110
1111         /* Set the output timings to the screen */
1112         if (!intel_sdvo_set_target_output(intel_sdvo,
1113                                           intel_sdvo->attached_output))
1114                 return;
1115
1116         /* lvds has a special fixed output timing. */
1117         if (intel_sdvo->is_lvds)
1118                 intel_sdvo_get_dtd_from_mode(&output_dtd,
1119                                              intel_sdvo->sdvo_lvds_fixed_mode);
1120         else
1121                 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1122         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1123                 DRM_INFO("Setting output timings on %s failed\n",
1124                          SDVO_NAME(intel_sdvo));
1125
1126         /* Set the input timing to the screen. Assume always input 0. */
1127         if (!intel_sdvo_set_target_input(intel_sdvo))
1128                 return;
1129
1130         if (intel_sdvo->has_hdmi_monitor) {
1131                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1132                 intel_sdvo_set_colorimetry(intel_sdvo,
1133                                            SDVO_COLORIMETRY_RGB256);
1134                 intel_sdvo_set_avi_infoframe(intel_sdvo, adjusted_mode);
1135         } else
1136                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1137
1138         if (intel_sdvo->is_tv &&
1139             !intel_sdvo_set_tv_format(intel_sdvo))
1140                 return;
1141
1142         /* We have tried to get input timing in mode_fixup, and filled into
1143          * adjusted_mode.
1144          */
1145         intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1146         if (intel_sdvo->is_tv || intel_sdvo->is_lvds)
1147                 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
1148         if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1149                 DRM_INFO("Setting input timings on %s failed\n",
1150                          SDVO_NAME(intel_sdvo));
1151
1152         switch (pixel_multiplier) {
1153         default:
1154         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1155         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1156         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1157         }
1158         if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1159                 return;
1160
1161         /* Set the SDVO control regs. */
1162         if (INTEL_INFO(dev)->gen >= 4) {
1163                 /* The real mode polarity is set by the SDVO commands, using
1164                  * struct intel_sdvo_dtd. */
1165                 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1166                 if (!HAS_PCH_SPLIT(dev) && intel_sdvo->is_hdmi)
1167                         sdvox |= intel_sdvo->color_range;
1168                 if (INTEL_INFO(dev)->gen < 5)
1169                         sdvox |= SDVO_BORDER_ENABLE;
1170         } else {
1171                 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1172                 switch (intel_sdvo->sdvo_reg) {
1173                 case SDVOB:
1174                         sdvox &= SDVOB_PRESERVE_MASK;
1175                         break;
1176                 case SDVOC:
1177                         sdvox &= SDVOC_PRESERVE_MASK;
1178                         break;
1179                 }
1180                 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1181         }
1182
1183         if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1184                 sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
1185         else
1186                 sdvox |= TRANSCODER(intel_crtc->pipe);
1187
1188         if (intel_sdvo->has_hdmi_audio)
1189                 sdvox |= SDVO_AUDIO_ENABLE;
1190
1191         if (INTEL_INFO(dev)->gen >= 4) {
1192                 /* done in crtc_mode_set as the dpll_md reg must be written early */
1193         } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1194                 /* done in crtc_mode_set as it lives inside the dpll register */
1195         } else {
1196                 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1197         }
1198
1199         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1200             INTEL_INFO(dev)->gen < 5)
1201                 sdvox |= SDVO_STALL_SELECT;
1202         intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1203 }
1204
1205 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
1206 {
1207         struct intel_sdvo_connector *intel_sdvo_connector =
1208                 to_intel_sdvo_connector(&connector->base);
1209         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
1210         u16 active_outputs;
1211
1212         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1213
1214         if (active_outputs & intel_sdvo_connector->output_flag)
1215                 return true;
1216         else
1217                 return false;
1218 }
1219
1220 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1221                                     enum i915_pipe *pipe)
1222 {
1223         struct drm_device *dev = encoder->base.dev;
1224         struct drm_i915_private *dev_priv = dev->dev_private;
1225         struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1226         u16 active_outputs;
1227         u32 tmp;
1228
1229         tmp = I915_READ(intel_sdvo->sdvo_reg);
1230         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1231
1232         if (!(tmp & SDVO_ENABLE) && (active_outputs == 0))
1233                 return false;
1234
1235         if (HAS_PCH_CPT(dev))
1236                 *pipe = PORT_TO_PIPE_CPT(tmp);
1237         else
1238                 *pipe = PORT_TO_PIPE(tmp);
1239
1240         return true;
1241 }
1242
1243 static void intel_disable_sdvo(struct intel_encoder *encoder)
1244 {
1245         struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
1246         struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1247         u32 temp;
1248
1249         intel_sdvo_set_active_outputs(intel_sdvo, 0);
1250         if (0)
1251                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1252                                                    DRM_MODE_DPMS_OFF);
1253
1254         temp = I915_READ(intel_sdvo->sdvo_reg);
1255         if ((temp & SDVO_ENABLE) != 0) {
1256                 /* HW workaround for IBX, we need to move the port to
1257                  * transcoder A before disabling it. */
1258                 if (HAS_PCH_IBX(encoder->base.dev)) {
1259                         struct drm_crtc *crtc = encoder->base.crtc;
1260                         int pipe = crtc ? to_intel_crtc(crtc)->pipe : -1;
1261
1262                         if (temp & SDVO_PIPE_B_SELECT) {
1263                                 temp &= ~SDVO_PIPE_B_SELECT;
1264                                 I915_WRITE(intel_sdvo->sdvo_reg, temp);
1265                                 POSTING_READ(intel_sdvo->sdvo_reg);
1266
1267                                 /* Again we need to write this twice. */
1268                                 I915_WRITE(intel_sdvo->sdvo_reg, temp);
1269                                 POSTING_READ(intel_sdvo->sdvo_reg);
1270
1271                                 /* Transcoder selection bits only update
1272                                  * effectively on vblank. */
1273                                 if (crtc)
1274                                         intel_wait_for_vblank(encoder->base.dev, pipe);
1275                                 else
1276                                         msleep(50);
1277                         }
1278                 }
1279
1280                 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1281         }
1282 }
1283
1284 static void intel_enable_sdvo(struct intel_encoder *encoder)
1285 {
1286         struct drm_device *dev = encoder->base.dev;
1287         struct drm_i915_private *dev_priv = dev->dev_private;
1288         struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1289         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
1290         u32 temp;
1291         bool input1, input2;
1292         int i;
1293         u8 status;
1294
1295         temp = I915_READ(intel_sdvo->sdvo_reg);
1296         if ((temp & SDVO_ENABLE) == 0) {
1297                 /* HW workaround for IBX, we need to move the port
1298                  * to transcoder A before disabling it. */
1299                 if (HAS_PCH_IBX(dev)) {
1300                         struct drm_crtc *crtc = encoder->base.crtc;
1301                         int pipe = crtc ? to_intel_crtc(crtc)->pipe : -1;
1302
1303                         /* Restore the transcoder select bit. */
1304                         if (pipe == PIPE_B)
1305                                 temp |= SDVO_PIPE_B_SELECT;
1306                 }
1307
1308                 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1309         }
1310         for (i = 0; i < 2; i++)
1311                 intel_wait_for_vblank(dev, intel_crtc->pipe);
1312
1313         status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1314         /* Warn if the device reported failure to sync.
1315          * A lot of SDVO devices fail to notify of sync, but it's
1316          * a given it the status is a success, we succeeded.
1317          */
1318         if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1319                 DRM_DEBUG_KMS("First %s output reported failure to "
1320                                 "sync\n", SDVO_NAME(intel_sdvo));
1321         }
1322
1323         if (0)
1324                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1325                                                    DRM_MODE_DPMS_ON);
1326         intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1327 }
1328
1329 static void intel_sdvo_dpms(struct drm_connector *connector, int mode)
1330 {
1331         struct drm_crtc *crtc;
1332         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1333
1334         /* dvo supports only 2 dpms states. */
1335         if (mode != DRM_MODE_DPMS_ON)
1336                 mode = DRM_MODE_DPMS_OFF;
1337
1338         if (mode == connector->dpms)
1339                 return;
1340
1341         connector->dpms = mode;
1342
1343         /* Only need to change hw state when actually enabled */
1344         crtc = intel_sdvo->base.base.crtc;
1345         if (!crtc) {
1346                 intel_sdvo->base.connectors_active = false;
1347                 return;
1348         }
1349
1350         if (mode != DRM_MODE_DPMS_ON) {
1351                 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1352                 if (0)
1353                         intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1354
1355                 intel_sdvo->base.connectors_active = false;
1356
1357                 intel_crtc_update_dpms(crtc);
1358         } else {
1359                 intel_sdvo->base.connectors_active = true;
1360
1361                 intel_crtc_update_dpms(crtc);
1362
1363                 if (0)
1364                         intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1365                 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1366         }
1367
1368         intel_modeset_check_state(connector->dev);
1369 }
1370
1371 static int intel_sdvo_mode_valid(struct drm_connector *connector,
1372                                  struct drm_display_mode *mode)
1373 {
1374         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1375
1376         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1377                 return MODE_NO_DBLESCAN;
1378
1379         if (intel_sdvo->pixel_clock_min > mode->clock)
1380                 return MODE_CLOCK_LOW;
1381
1382         if (intel_sdvo->pixel_clock_max < mode->clock)
1383                 return MODE_CLOCK_HIGH;
1384
1385         if (intel_sdvo->is_lvds) {
1386                 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1387                         return MODE_PANEL;
1388
1389                 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1390                         return MODE_PANEL;
1391         }
1392
1393         return MODE_OK;
1394 }
1395
1396 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1397 {
1398         BUILD_BUG_ON(sizeof(*caps) != 8);
1399         if (!intel_sdvo_get_value(intel_sdvo,
1400                                   SDVO_CMD_GET_DEVICE_CAPS,
1401                                   caps, sizeof(*caps)))
1402                 return false;
1403
1404         DRM_DEBUG_KMS("SDVO capabilities:\n"
1405                       "  vendor_id: %d\n"
1406                       "  device_id: %d\n"
1407                       "  device_rev_id: %d\n"
1408                       "  sdvo_version_major: %d\n"
1409                       "  sdvo_version_minor: %d\n"
1410                       "  sdvo_inputs_mask: %d\n"
1411                       "  smooth_scaling: %d\n"
1412                       "  sharp_scaling: %d\n"
1413                       "  up_scaling: %d\n"
1414                       "  down_scaling: %d\n"
1415                       "  stall_support: %d\n"
1416                       "  output_flags: %d\n",
1417                       caps->vendor_id,
1418                       caps->device_id,
1419                       caps->device_rev_id,
1420                       caps->sdvo_version_major,
1421                       caps->sdvo_version_minor,
1422                       caps->sdvo_inputs_mask,
1423                       caps->smooth_scaling,
1424                       caps->sharp_scaling,
1425                       caps->up_scaling,
1426                       caps->down_scaling,
1427                       caps->stall_support,
1428                       caps->output_flags);
1429
1430         return true;
1431 }
1432
1433 static int intel_sdvo_supports_hotplug(struct intel_sdvo *intel_sdvo)
1434 {
1435         struct drm_device *dev = intel_sdvo->base.base.dev;
1436         u8 response[2];
1437
1438         /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1439          * on the line. */
1440         if (IS_I945G(dev) || IS_I945GM(dev))
1441                 return false;
1442
1443         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1444                                     &response, 2) && response[0];
1445 }
1446
1447 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1448 {
1449         struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1450
1451         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1452                         &intel_sdvo->hotplug_active, 2);
1453 }
1454
1455 static bool
1456 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1457 {
1458         /* Is there more than one type of output? */
1459         return hweight16(intel_sdvo->caps.output_flags) > 1;
1460 }
1461
1462 static struct edid *
1463 intel_sdvo_get_edid(struct drm_connector *connector)
1464 {
1465         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1466         return drm_get_edid(connector, sdvo->ddc);
1467 }
1468
1469 /* Mac mini hack -- use the same DDC as the analog connector */
1470 static struct edid *
1471 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1472 {
1473         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1474
1475         return drm_get_edid(connector,
1476                             intel_gmbus_get_adapter(dev_priv,
1477                                                     dev_priv->crt_ddc_pin));
1478 }
1479
1480 static enum drm_connector_status
1481 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1482 {
1483         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1484         enum drm_connector_status status;
1485         struct edid *edid;
1486
1487         edid = intel_sdvo_get_edid(connector);
1488
1489         if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1490                 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1491
1492                 /*
1493                  * Don't use the 1 as the argument of DDC bus switch to get
1494                  * the EDID. It is used for SDVO SPD ROM.
1495                  */
1496                 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1497                         intel_sdvo->ddc_bus = ddc;
1498                         edid = intel_sdvo_get_edid(connector);
1499                         if (edid)
1500                                 break;
1501                 }
1502                 /*
1503                  * If we found the EDID on the other bus,
1504                  * assume that is the correct DDC bus.
1505                  */
1506                 if (edid == NULL)
1507                         intel_sdvo->ddc_bus = saved_ddc;
1508         }
1509
1510         /*
1511          * When there is no edid and no monitor is connected with VGA
1512          * port, try to use the CRT ddc to read the EDID for DVI-connector.
1513          */
1514         if (edid == NULL)
1515                 edid = intel_sdvo_get_analog_edid(connector);
1516
1517         status = connector_status_unknown;
1518         if (edid != NULL) {
1519                 /* DDC bus is shared, match EDID to connector type */
1520                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1521                         status = connector_status_connected;
1522                         if (intel_sdvo->is_hdmi) {
1523                                 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1524                                 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1525                                 intel_sdvo->rgb_quant_range_selectable =
1526                                         drm_rgb_quant_range_selectable(edid);
1527                         }
1528                 } else
1529                         status = connector_status_disconnected;
1530                 drm_free(edid, M_DRM);
1531         }
1532
1533         if (status == connector_status_connected) {
1534                 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1535                 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1536                         intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
1537         }
1538
1539         return status;
1540 }
1541
1542 static bool
1543 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1544                                   struct edid *edid)
1545 {
1546         bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1547         bool connector_is_digital = !!IS_DIGITAL(sdvo);
1548
1549         DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1550                       connector_is_digital, monitor_is_digital);
1551         return connector_is_digital == monitor_is_digital;
1552 }
1553
1554 static enum drm_connector_status
1555 intel_sdvo_detect(struct drm_connector *connector, bool force)
1556 {
1557         uint16_t response;
1558         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1559         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1560         enum drm_connector_status ret;
1561
1562         if (!intel_sdvo_get_value(intel_sdvo,
1563                                   SDVO_CMD_GET_ATTACHED_DISPLAYS,
1564                                   &response, 2))
1565                 return connector_status_unknown;
1566
1567         DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1568                       response & 0xff, response >> 8,
1569                       intel_sdvo_connector->output_flag);
1570
1571         if (response == 0)
1572                 return connector_status_disconnected;
1573
1574         intel_sdvo->attached_output = response;
1575
1576         intel_sdvo->has_hdmi_monitor = false;
1577         intel_sdvo->has_hdmi_audio = false;
1578         intel_sdvo->rgb_quant_range_selectable = false;
1579
1580         if ((intel_sdvo_connector->output_flag & response) == 0)
1581                 ret = connector_status_disconnected;
1582         else if (IS_TMDS(intel_sdvo_connector))
1583                 ret = intel_sdvo_tmds_sink_detect(connector);
1584         else {
1585                 struct edid *edid;
1586
1587                 /* if we have an edid check it matches the connection */
1588                 edid = intel_sdvo_get_edid(connector);
1589                 if (edid == NULL)
1590                         edid = intel_sdvo_get_analog_edid(connector);
1591                 if (edid != NULL) {
1592                         if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1593                                                               edid))
1594                                 ret = connector_status_connected;
1595                         else
1596                                 ret = connector_status_disconnected;
1597
1598                         kfree(edid, M_DRM);
1599                 } else
1600                         ret = connector_status_connected;
1601         }
1602
1603         /* May update encoder flag for like clock for SDVO TV, etc.*/
1604         if (ret == connector_status_connected) {
1605                 intel_sdvo->is_tv = false;
1606                 intel_sdvo->is_lvds = false;
1607                 intel_sdvo->base.needs_tv_clock = false;
1608
1609                 if (response & SDVO_TV_MASK) {
1610                         intel_sdvo->is_tv = true;
1611                         intel_sdvo->base.needs_tv_clock = true;
1612                 }
1613                 if (response & SDVO_LVDS_MASK)
1614                         intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1615         }
1616
1617         return ret;
1618 }
1619
1620 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1621 {
1622         struct edid *edid;
1623
1624         /* set the bus switch and get the modes */
1625         edid = intel_sdvo_get_edid(connector);
1626
1627         /*
1628          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
1629          * link between analog and digital outputs. So, if the regular SDVO
1630          * DDC fails, check to see if the analog output is disconnected, in
1631          * which case we'll look there for the digital DDC data.
1632          */
1633         if (edid == NULL)
1634                 edid = intel_sdvo_get_analog_edid(connector);
1635
1636         if (edid != NULL) {
1637                 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1638                                                       edid)) {
1639                         drm_mode_connector_update_edid_property(connector, edid);
1640                         drm_add_edid_modes(connector, edid);
1641                 }
1642
1643                 drm_free(edid, M_DRM);
1644         }
1645 }
1646
1647 /*
1648  * Set of SDVO TV modes.
1649  * Note!  This is in reply order (see loop in get_tv_modes).
1650  * XXX: all 60Hz refresh?
1651  */
1652 static const struct drm_display_mode sdvo_tv_modes[] = {
1653         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1654                    416, 0, 200, 201, 232, 233, 0,
1655                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1656         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1657                    416, 0, 240, 241, 272, 273, 0,
1658                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1659         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1660                    496, 0, 300, 301, 332, 333, 0,
1661                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1662         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1663                    736, 0, 350, 351, 382, 383, 0,
1664                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1665         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1666                    736, 0, 400, 401, 432, 433, 0,
1667                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1668         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1669                    736, 0, 480, 481, 512, 513, 0,
1670                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1671         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1672                    800, 0, 480, 481, 512, 513, 0,
1673                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1674         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1675                    800, 0, 576, 577, 608, 609, 0,
1676                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1677         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1678                    816, 0, 350, 351, 382, 383, 0,
1679                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1680         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1681                    816, 0, 400, 401, 432, 433, 0,
1682                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1683         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1684                    816, 0, 480, 481, 512, 513, 0,
1685                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1686         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1687                    816, 0, 540, 541, 572, 573, 0,
1688                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1689         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1690                    816, 0, 576, 577, 608, 609, 0,
1691                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1692         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1693                    864, 0, 576, 577, 608, 609, 0,
1694                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1695         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1696                    896, 0, 600, 601, 632, 633, 0,
1697                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1698         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1699                    928, 0, 624, 625, 656, 657, 0,
1700                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1701         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1702                    1016, 0, 766, 767, 798, 799, 0,
1703                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1704         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1705                    1120, 0, 768, 769, 800, 801, 0,
1706                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1707         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1708                    1376, 0, 1024, 1025, 1056, 1057, 0,
1709                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1710 };
1711
1712 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1713 {
1714         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1715         struct intel_sdvo_sdtv_resolution_request tv_res;
1716         uint32_t reply = 0, format_map = 0;
1717         int i;
1718
1719         /* Read the list of supported input resolutions for the selected TV
1720          * format.
1721          */
1722         format_map = 1 << intel_sdvo->tv_format_index;
1723         memcpy(&tv_res, &format_map,
1724                min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1725
1726         if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1727                 return;
1728
1729         BUILD_BUG_ON(sizeof(tv_res) != 3);
1730         if (!intel_sdvo_write_cmd(intel_sdvo,
1731                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1732                                   &tv_res, sizeof(tv_res)))
1733                 return;
1734         if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1735                 return;
1736
1737         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1738                 if (reply & (1 << i)) {
1739                         struct drm_display_mode *nmode;
1740                         nmode = drm_mode_duplicate(connector->dev,
1741                                                    &sdvo_tv_modes[i]);
1742                         if (nmode)
1743                                 drm_mode_probed_add(connector, nmode);
1744                 }
1745 }
1746
1747 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1748 {
1749         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1750         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1751         struct drm_display_mode *newmode;
1752
1753         /*
1754          * Attempt to get the mode list from DDC.
1755          * Assume that the preferred modes are
1756          * arranged in priority order.
1757          */
1758         intel_ddc_get_modes(connector, intel_sdvo->ddc);
1759
1760         /*
1761          * Fetch modes from VBT. For SDVO prefer the VBT mode since some
1762          * SDVO->LVDS transcoders can't cope with the EDID mode. Since
1763          * drm_mode_probed_add adds the mode at the head of the list we add it
1764          * last.
1765          */
1766         if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1767                 newmode = drm_mode_duplicate(connector->dev,
1768                                              dev_priv->sdvo_lvds_vbt_mode);
1769                 if (newmode != NULL) {
1770                         /* Guarantee the mode is preferred */
1771                         newmode->type = (DRM_MODE_TYPE_PREFERRED |
1772                                          DRM_MODE_TYPE_DRIVER);
1773                         drm_mode_probed_add(connector, newmode);
1774                 }
1775         }
1776
1777         list_for_each_entry(newmode, &connector->probed_modes, head) {
1778                 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1779                         intel_sdvo->sdvo_lvds_fixed_mode =
1780                                 drm_mode_duplicate(connector->dev, newmode);
1781
1782                         intel_sdvo->is_lvds = true;
1783                         break;
1784                 }
1785         }
1786
1787 }
1788
1789 static int intel_sdvo_get_modes(struct drm_connector *connector)
1790 {
1791         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1792
1793         if (IS_TV(intel_sdvo_connector))
1794                 intel_sdvo_get_tv_modes(connector);
1795         else if (IS_LVDS(intel_sdvo_connector))
1796                 intel_sdvo_get_lvds_modes(connector);
1797         else
1798                 intel_sdvo_get_ddc_modes(connector);
1799
1800         return !list_empty(&connector->probed_modes);
1801 }
1802
1803 static void
1804 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1805 {
1806         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1807         struct drm_device *dev = connector->dev;
1808
1809         if (intel_sdvo_connector->left)
1810                 drm_property_destroy(dev, intel_sdvo_connector->left);
1811         if (intel_sdvo_connector->right)
1812                 drm_property_destroy(dev, intel_sdvo_connector->right);
1813         if (intel_sdvo_connector->top)
1814                 drm_property_destroy(dev, intel_sdvo_connector->top);
1815         if (intel_sdvo_connector->bottom)
1816                 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1817         if (intel_sdvo_connector->hpos)
1818                 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1819         if (intel_sdvo_connector->vpos)
1820                 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1821         if (intel_sdvo_connector->saturation)
1822                 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1823         if (intel_sdvo_connector->contrast)
1824                 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1825         if (intel_sdvo_connector->hue)
1826                 drm_property_destroy(dev, intel_sdvo_connector->hue);
1827         if (intel_sdvo_connector->sharpness)
1828                 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1829         if (intel_sdvo_connector->flicker_filter)
1830                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1831         if (intel_sdvo_connector->flicker_filter_2d)
1832                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1833         if (intel_sdvo_connector->flicker_filter_adaptive)
1834                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1835         if (intel_sdvo_connector->tv_luma_filter)
1836                 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1837         if (intel_sdvo_connector->tv_chroma_filter)
1838                 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
1839         if (intel_sdvo_connector->dot_crawl)
1840                 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
1841         if (intel_sdvo_connector->brightness)
1842                 drm_property_destroy(dev, intel_sdvo_connector->brightness);
1843 }
1844
1845 static void intel_sdvo_destroy(struct drm_connector *connector)
1846 {
1847         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1848
1849         if (intel_sdvo_connector->tv_format)
1850                 drm_property_destroy(connector->dev,
1851                                      intel_sdvo_connector->tv_format);
1852
1853         intel_sdvo_destroy_enhance_property(connector);
1854 #if 0
1855         drm_sysfs_connector_remove(connector);
1856 #endif
1857         drm_connector_cleanup(connector);
1858         drm_free(intel_sdvo_connector, M_DRM);
1859 }
1860
1861 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1862 {
1863         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1864         struct edid *edid;
1865         bool has_audio = false;
1866
1867         if (!intel_sdvo->is_hdmi)
1868                 return false;
1869
1870         edid = intel_sdvo_get_edid(connector);
1871         if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1872                 has_audio = drm_detect_monitor_audio(edid);
1873
1874         return has_audio;
1875 }
1876
1877 static int
1878 intel_sdvo_set_property(struct drm_connector *connector,
1879                         struct drm_property *property,
1880                         uint64_t val)
1881 {
1882         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1883         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1884         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1885         uint16_t temp_value;
1886         uint8_t cmd;
1887         int ret;
1888
1889         ret = drm_object_property_set_value(&connector->base, property, val);
1890         if (ret)
1891                 return ret;
1892
1893         if (property == dev_priv->force_audio_property) {
1894                 int i = val;
1895                 bool has_audio;
1896
1897                 if (i == intel_sdvo_connector->force_audio)
1898                         return 0;
1899
1900                 intel_sdvo_connector->force_audio = i;
1901
1902                 if (i == HDMI_AUDIO_AUTO)
1903                         has_audio = intel_sdvo_detect_hdmi_audio(connector);
1904                 else
1905                         has_audio = (i == HDMI_AUDIO_ON);
1906
1907                 if (has_audio == intel_sdvo->has_hdmi_audio)
1908                         return 0;
1909
1910                 intel_sdvo->has_hdmi_audio = has_audio;
1911                 goto done;
1912         }
1913
1914         if (property == dev_priv->broadcast_rgb_property) {
1915                 switch (val) {
1916                 case INTEL_BROADCAST_RGB_AUTO:
1917                         intel_sdvo->color_range_auto = true;
1918                         break;
1919                 case INTEL_BROADCAST_RGB_FULL:
1920                         intel_sdvo->color_range_auto = false;
1921                         intel_sdvo->color_range = 0;
1922                         break;
1923                 case INTEL_BROADCAST_RGB_LIMITED:
1924                         intel_sdvo->color_range_auto = false;
1925                         intel_sdvo->color_range = SDVO_COLOR_RANGE_16_235;
1926                         break;
1927                 default:
1928                         return -EINVAL;
1929                 }
1930                 goto done;
1931         }
1932
1933 #define CHECK_PROPERTY(name, NAME) \
1934         if (intel_sdvo_connector->name == property) { \
1935                 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1936                 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1937                 cmd = SDVO_CMD_SET_##NAME; \
1938                 intel_sdvo_connector->cur_##name = temp_value; \
1939                 goto set_value; \
1940         }
1941
1942         if (property == intel_sdvo_connector->tv_format) {
1943                 if (val >= TV_FORMAT_NUM)
1944                         return -EINVAL;
1945
1946                 if (intel_sdvo->tv_format_index ==
1947                     intel_sdvo_connector->tv_format_supported[val])
1948                         return 0;
1949
1950                 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
1951                 goto done;
1952         } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
1953                 temp_value = val;
1954                 if (intel_sdvo_connector->left == property) {
1955                         drm_object_property_set_value(&connector->base,
1956                                                          intel_sdvo_connector->right, val);
1957                         if (intel_sdvo_connector->left_margin == temp_value)
1958                                 return 0;
1959
1960                         intel_sdvo_connector->left_margin = temp_value;
1961                         intel_sdvo_connector->right_margin = temp_value;
1962                         temp_value = intel_sdvo_connector->max_hscan -
1963                                 intel_sdvo_connector->left_margin;
1964                         cmd = SDVO_CMD_SET_OVERSCAN_H;
1965                         goto set_value;
1966                 } else if (intel_sdvo_connector->right == property) {
1967                         drm_object_property_set_value(&connector->base,
1968                                                          intel_sdvo_connector->left, val);
1969                         if (intel_sdvo_connector->right_margin == temp_value)
1970                                 return 0;
1971
1972                         intel_sdvo_connector->left_margin = temp_value;
1973                         intel_sdvo_connector->right_margin = temp_value;
1974                         temp_value = intel_sdvo_connector->max_hscan -
1975                                 intel_sdvo_connector->left_margin;
1976                         cmd = SDVO_CMD_SET_OVERSCAN_H;
1977                         goto set_value;
1978                 } else if (intel_sdvo_connector->top == property) {
1979                         drm_object_property_set_value(&connector->base,
1980                                                          intel_sdvo_connector->bottom, val);
1981                         if (intel_sdvo_connector->top_margin == temp_value)
1982                                 return 0;
1983
1984                         intel_sdvo_connector->top_margin = temp_value;
1985                         intel_sdvo_connector->bottom_margin = temp_value;
1986                         temp_value = intel_sdvo_connector->max_vscan -
1987                                 intel_sdvo_connector->top_margin;
1988                         cmd = SDVO_CMD_SET_OVERSCAN_V;
1989                         goto set_value;
1990                 } else if (intel_sdvo_connector->bottom == property) {
1991                         drm_object_property_set_value(&connector->base,
1992                                                          intel_sdvo_connector->top, val);
1993                         if (intel_sdvo_connector->bottom_margin == temp_value)
1994                                 return 0;
1995
1996                         intel_sdvo_connector->top_margin = temp_value;
1997                         intel_sdvo_connector->bottom_margin = temp_value;
1998                         temp_value = intel_sdvo_connector->max_vscan -
1999                                 intel_sdvo_connector->top_margin;
2000                         cmd = SDVO_CMD_SET_OVERSCAN_V;
2001                         goto set_value;
2002                 }
2003                 CHECK_PROPERTY(hpos, HPOS)
2004                 CHECK_PROPERTY(vpos, VPOS)
2005                 CHECK_PROPERTY(saturation, SATURATION)
2006                 CHECK_PROPERTY(contrast, CONTRAST)
2007                 CHECK_PROPERTY(hue, HUE)
2008                 CHECK_PROPERTY(brightness, BRIGHTNESS)
2009                 CHECK_PROPERTY(sharpness, SHARPNESS)
2010                 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
2011                 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
2012                 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
2013                 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
2014                 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
2015                 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
2016         }
2017
2018         return -EINVAL; /* unknown property */
2019
2020 set_value:
2021         if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
2022                 return -EIO;
2023
2024
2025 done:
2026         if (intel_sdvo->base.base.crtc)
2027                 intel_crtc_restore_mode(intel_sdvo->base.base.crtc);
2028
2029         return 0;
2030 #undef CHECK_PROPERTY
2031 }
2032
2033 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
2034         .mode_fixup = intel_sdvo_mode_fixup,
2035         .mode_set = intel_sdvo_mode_set,
2036         .disable = intel_encoder_noop,
2037 };
2038
2039 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
2040         .dpms = intel_sdvo_dpms,
2041         .detect = intel_sdvo_detect,
2042         .fill_modes = drm_helper_probe_single_connector_modes,
2043         .set_property = intel_sdvo_set_property,
2044         .destroy = intel_sdvo_destroy,
2045 };
2046
2047 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
2048         .get_modes = intel_sdvo_get_modes,
2049         .mode_valid = intel_sdvo_mode_valid,
2050         .best_encoder = intel_best_encoder,
2051 };
2052
2053 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
2054 {
2055         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
2056
2057         if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
2058                 drm_mode_destroy(encoder->dev,
2059                                  intel_sdvo->sdvo_lvds_fixed_mode);
2060
2061         device_delete_child(intel_sdvo->base.base.dev->dev,
2062             intel_sdvo->ddc_iic_bus);
2063         intel_encoder_destroy(encoder);
2064 }
2065
2066 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2067         .destroy = intel_sdvo_enc_destroy,
2068 };
2069
2070 static void
2071 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
2072 {
2073         uint16_t mask = 0;
2074         unsigned int num_bits;
2075
2076         /* Make a mask of outputs less than or equal to our own priority in the
2077          * list.
2078          */
2079         switch (sdvo->controlled_output) {
2080         case SDVO_OUTPUT_LVDS1:
2081                 mask |= SDVO_OUTPUT_LVDS1;
2082         case SDVO_OUTPUT_LVDS0:
2083                 mask |= SDVO_OUTPUT_LVDS0;
2084         case SDVO_OUTPUT_TMDS1:
2085                 mask |= SDVO_OUTPUT_TMDS1;
2086         case SDVO_OUTPUT_TMDS0:
2087                 mask |= SDVO_OUTPUT_TMDS0;
2088         case SDVO_OUTPUT_RGB1:
2089                 mask |= SDVO_OUTPUT_RGB1;
2090         case SDVO_OUTPUT_RGB0:
2091                 mask |= SDVO_OUTPUT_RGB0;
2092                 break;
2093         }
2094
2095         /* Count bits to find what number we are in the priority list. */
2096         mask &= sdvo->caps.output_flags;
2097         num_bits = hweight16(mask);
2098         /* If more than 3 outputs, default to DDC bus 3 for now. */
2099         if (num_bits > 3)
2100                 num_bits = 3;
2101
2102         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2103         sdvo->ddc_bus = 1 << num_bits;
2104 }
2105
2106 /**
2107  * Choose the appropriate DDC bus for control bus switch command for this
2108  * SDVO output based on the controlled output.
2109  *
2110  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2111  * outputs, then LVDS outputs.
2112  */
2113 static void
2114 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
2115                           struct intel_sdvo *sdvo, u32 reg)
2116 {
2117         struct sdvo_device_mapping *mapping;
2118
2119         if (sdvo->is_sdvob)
2120                 mapping = &(dev_priv->sdvo_mappings[0]);
2121         else
2122                 mapping = &(dev_priv->sdvo_mappings[1]);
2123
2124         if (mapping->initialized)
2125                 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2126         else
2127                 intel_sdvo_guess_ddc_bus(sdvo);
2128 }
2129
2130 static void
2131 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2132                           struct intel_sdvo *sdvo, u32 reg)
2133 {
2134         struct sdvo_device_mapping *mapping;
2135         u8 pin;
2136
2137         if (sdvo->is_sdvob)
2138                 mapping = &dev_priv->sdvo_mappings[0];
2139         else
2140                 mapping = &dev_priv->sdvo_mappings[1];
2141
2142         if (mapping->initialized && intel_gmbus_is_port_valid(mapping->i2c_pin))
2143                 pin = mapping->i2c_pin;
2144         else
2145                 pin = GMBUS_PORT_DPB;
2146
2147         sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2148
2149         /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2150          * our code totally fails once we start using gmbus. Hence fall back to
2151          * bit banging for now. */
2152         intel_gmbus_force_bit(sdvo->i2c, true);
2153 }
2154
2155 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2156 static void
2157 intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
2158 {
2159         intel_gmbus_force_bit(sdvo->i2c, false);
2160 }
2161
2162 static bool
2163 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
2164 {
2165         return intel_sdvo_check_supp_encode(intel_sdvo);
2166 }
2167
2168 static u8
2169 intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
2170 {
2171         struct drm_i915_private *dev_priv = dev->dev_private;
2172         struct sdvo_device_mapping *my_mapping, *other_mapping;
2173
2174         if (sdvo->is_sdvob) {
2175                 my_mapping = &dev_priv->sdvo_mappings[0];
2176                 other_mapping = &dev_priv->sdvo_mappings[1];
2177         } else {
2178                 my_mapping = &dev_priv->sdvo_mappings[1];
2179                 other_mapping = &dev_priv->sdvo_mappings[0];
2180         }
2181
2182         /* If the BIOS described our SDVO device, take advantage of it. */
2183         if (my_mapping->slave_addr)
2184                 return my_mapping->slave_addr;
2185
2186         /* If the BIOS only described a different SDVO device, use the
2187          * address that it isn't using.
2188          */
2189         if (other_mapping->slave_addr) {
2190                 if (other_mapping->slave_addr == 0x70)
2191                         return 0x72;
2192                 else
2193                         return 0x70;
2194         }
2195
2196         /* No SDVO device info is found for another DVO port,
2197          * so use mapping assumption we had before BIOS parsing.
2198          */
2199         if (sdvo->is_sdvob)
2200                 return 0x70;
2201         else
2202                 return 0x72;
2203 }
2204
2205 static void
2206 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2207                           struct intel_sdvo *encoder)
2208 {
2209         drm_connector_init(encoder->base.base.dev,
2210                            &connector->base.base,
2211                            &intel_sdvo_connector_funcs,
2212                            connector->base.base.connector_type);
2213
2214         drm_connector_helper_add(&connector->base.base,
2215                                  &intel_sdvo_connector_helper_funcs);
2216
2217         connector->base.base.interlace_allowed = 1;
2218         connector->base.base.doublescan_allowed = 0;
2219         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2220         connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
2221
2222         intel_connector_attach_encoder(&connector->base, &encoder->base);
2223 #if 0
2224         drm_sysfs_connector_add(&connector->base.base);
2225 #endif
2226 }
2227
2228 static void
2229 intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo,
2230                                struct intel_sdvo_connector *connector)
2231 {
2232         struct drm_device *dev = connector->base.base.dev;
2233
2234         intel_attach_force_audio_property(&connector->base.base);
2235         if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev)) {
2236                 intel_attach_broadcast_rgb_property(&connector->base.base);
2237                 intel_sdvo->color_range_auto = true;
2238         }
2239 }
2240
2241 static bool
2242 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2243 {
2244         struct drm_encoder *encoder = &intel_sdvo->base.base;
2245         struct drm_connector *connector;
2246         struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2247         struct intel_connector *intel_connector;
2248         struct intel_sdvo_connector *intel_sdvo_connector;
2249
2250         intel_sdvo_connector = kmalloc(sizeof(struct intel_sdvo_connector),
2251             M_DRM, M_WAITOK | M_ZERO);
2252         if (!intel_sdvo_connector)
2253                 return false;
2254
2255         if (device == 0) {
2256                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2257                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2258         } else if (device == 1) {
2259                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2260                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2261         }
2262
2263         intel_connector = &intel_sdvo_connector->base;
2264         connector = &intel_connector->base;
2265         if (intel_sdvo_supports_hotplug(intel_sdvo) & (1 << device)) {
2266                 connector->polled = DRM_CONNECTOR_POLL_HPD;
2267                 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
2268                 /* Some SDVO devices have one-shot hotplug interrupts.
2269                  * Ensure that they get re-enabled when an interrupt happens.
2270                  */
2271                 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2272                 intel_sdvo_enable_hotplug(intel_encoder);
2273         } else {
2274                 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2275         }
2276         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2277         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2278
2279         if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2280                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2281                 intel_sdvo->is_hdmi = true;
2282         }
2283
2284         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2285         if (intel_sdvo->is_hdmi)
2286                 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector);
2287
2288         return true;
2289 }
2290
2291 static bool
2292 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2293 {
2294         struct drm_encoder *encoder = &intel_sdvo->base.base;
2295         struct drm_connector *connector;
2296         struct intel_connector *intel_connector;
2297         struct intel_sdvo_connector *intel_sdvo_connector;
2298
2299         intel_sdvo_connector = kmalloc(sizeof(struct intel_sdvo_connector),
2300             M_DRM, M_WAITOK | M_ZERO);
2301         if (!intel_sdvo_connector)
2302                 return false;
2303
2304         intel_connector = &intel_sdvo_connector->base;
2305         connector = &intel_connector->base;
2306         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2307         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2308
2309         intel_sdvo->controlled_output |= type;
2310         intel_sdvo_connector->output_flag = type;
2311
2312         intel_sdvo->is_tv = true;
2313         intel_sdvo->base.needs_tv_clock = true;
2314
2315         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2316
2317         if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2318                 goto err;
2319
2320         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2321                 goto err;
2322
2323         return true;
2324
2325 err:
2326         intel_sdvo_destroy(connector);
2327         return false;
2328 }
2329
2330 static bool
2331 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2332 {
2333         struct drm_encoder *encoder = &intel_sdvo->base.base;
2334         struct drm_connector *connector;
2335         struct intel_connector *intel_connector;
2336         struct intel_sdvo_connector *intel_sdvo_connector;
2337
2338         intel_sdvo_connector = kmalloc(sizeof(struct intel_sdvo_connector),
2339             M_DRM, M_WAITOK | M_ZERO);
2340         if (!intel_sdvo_connector)
2341                 return false;
2342
2343         intel_connector = &intel_sdvo_connector->base;
2344         connector = &intel_connector->base;
2345         connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2346         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2347         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2348
2349         if (device == 0) {
2350                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2351                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2352         } else if (device == 1) {
2353                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2354                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2355         }
2356
2357         intel_sdvo_connector_init(intel_sdvo_connector,
2358                                   intel_sdvo);
2359         return true;
2360 }
2361
2362 static bool
2363 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2364 {
2365         struct drm_encoder *encoder = &intel_sdvo->base.base;
2366         struct drm_connector *connector;
2367         struct intel_connector *intel_connector;
2368         struct intel_sdvo_connector *intel_sdvo_connector;
2369
2370         intel_sdvo_connector = kmalloc(sizeof(struct intel_sdvo_connector),
2371             M_DRM, M_WAITOK | M_ZERO);
2372         if (!intel_sdvo_connector)
2373                 return false;
2374
2375         intel_connector = &intel_sdvo_connector->base;
2376         connector = &intel_connector->base;
2377         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2378         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2379
2380         if (device == 0) {
2381                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2382                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2383         } else if (device == 1) {
2384                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2385                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2386         }
2387
2388         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2389         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2390                 goto err;
2391
2392         return true;
2393
2394 err:
2395         intel_sdvo_destroy(connector);
2396         return false;
2397 }
2398
2399 static bool
2400 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2401 {
2402         intel_sdvo->is_tv = false;
2403         intel_sdvo->base.needs_tv_clock = false;
2404         intel_sdvo->is_lvds = false;
2405
2406         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2407
2408         if (flags & SDVO_OUTPUT_TMDS0)
2409                 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2410                         return false;
2411
2412         if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2413                 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2414                         return false;
2415
2416         /* TV has no XXX1 function block */
2417         if (flags & SDVO_OUTPUT_SVID0)
2418                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2419                         return false;
2420
2421         if (flags & SDVO_OUTPUT_CVBS0)
2422                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2423                         return false;
2424
2425         if (flags & SDVO_OUTPUT_YPRPB0)
2426                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2427                         return false;
2428
2429         if (flags & SDVO_OUTPUT_RGB0)
2430                 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2431                         return false;
2432
2433         if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2434                 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2435                         return false;
2436
2437         if (flags & SDVO_OUTPUT_LVDS0)
2438                 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2439                         return false;
2440
2441         if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2442                 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2443                         return false;
2444
2445         if ((flags & SDVO_OUTPUT_MASK) == 0) {
2446                 unsigned char bytes[2];
2447
2448                 intel_sdvo->controlled_output = 0;
2449                 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2450                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2451                               SDVO_NAME(intel_sdvo),
2452                               bytes[0], bytes[1]);
2453                 return false;
2454         }
2455         intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2456
2457         return true;
2458 }
2459
2460 static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
2461 {
2462         struct drm_device *dev = intel_sdvo->base.base.dev;
2463         struct drm_connector *connector, *tmp;
2464
2465         list_for_each_entry_safe(connector, tmp,
2466                                  &dev->mode_config.connector_list, head) {
2467                 if (intel_attached_encoder(connector) == &intel_sdvo->base)
2468                         intel_sdvo_destroy(connector);
2469         }
2470 }
2471
2472 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2473                                           struct intel_sdvo_connector *intel_sdvo_connector,
2474                                           int type)
2475 {
2476         struct drm_device *dev = intel_sdvo->base.base.dev;
2477         struct intel_sdvo_tv_format format;
2478         uint32_t format_map, i;
2479
2480         if (!intel_sdvo_set_target_output(intel_sdvo, type))
2481                 return false;
2482
2483         BUILD_BUG_ON(sizeof(format) != 6);
2484         if (!intel_sdvo_get_value(intel_sdvo,
2485                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2486                                   &format, sizeof(format)))
2487                 return false;
2488
2489         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2490
2491         if (format_map == 0)
2492                 return false;
2493
2494         intel_sdvo_connector->format_supported_num = 0;
2495         for (i = 0 ; i < TV_FORMAT_NUM; i++)
2496                 if (format_map & (1 << i))
2497                         intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2498
2499
2500         intel_sdvo_connector->tv_format =
2501                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
2502                                             "mode", intel_sdvo_connector->format_supported_num);
2503         if (!intel_sdvo_connector->tv_format)
2504                 return false;
2505
2506         for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2507                 drm_property_add_enum(
2508                                 intel_sdvo_connector->tv_format, i,
2509                                 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2510
2511         intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2512         drm_object_attach_property(&intel_sdvo_connector->base.base.base,
2513                                       intel_sdvo_connector->tv_format, 0);
2514         return true;
2515
2516 }
2517
2518 #define ENHANCEMENT(name, NAME) do { \
2519         if (enhancements.name) { \
2520                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2521                     !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2522                         return false; \
2523                 intel_sdvo_connector->max_##name = data_value[0]; \
2524                 intel_sdvo_connector->cur_##name = response; \
2525                 intel_sdvo_connector->name = \
2526                         drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2527                 if (!intel_sdvo_connector->name) return false; \
2528                 drm_object_attach_property(&connector->base, \
2529                                               intel_sdvo_connector->name, \
2530                                               intel_sdvo_connector->cur_##name); \
2531                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2532                               data_value[0], data_value[1], response); \
2533         } \
2534 } while (0)
2535
2536 static bool
2537 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2538                                       struct intel_sdvo_connector *intel_sdvo_connector,
2539                                       struct intel_sdvo_enhancements_reply enhancements)
2540 {
2541         struct drm_device *dev = intel_sdvo->base.base.dev;
2542         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2543         uint16_t response, data_value[2];
2544
2545         /* when horizontal overscan is supported, Add the left/right  property */
2546         if (enhancements.overscan_h) {
2547                 if (!intel_sdvo_get_value(intel_sdvo,
2548                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
2549                                           &data_value, 4))
2550                         return false;
2551
2552                 if (!intel_sdvo_get_value(intel_sdvo,
2553                                           SDVO_CMD_GET_OVERSCAN_H,
2554                                           &response, 2))
2555                         return false;
2556
2557                 intel_sdvo_connector->max_hscan = data_value[0];
2558                 intel_sdvo_connector->left_margin = data_value[0] - response;
2559                 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2560                 intel_sdvo_connector->left =
2561                         drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2562                 if (!intel_sdvo_connector->left)
2563                         return false;
2564
2565                 drm_object_attach_property(&connector->base,
2566                                               intel_sdvo_connector->left,
2567                                               intel_sdvo_connector->left_margin);
2568
2569                 intel_sdvo_connector->right =
2570                         drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2571                 if (!intel_sdvo_connector->right)
2572                         return false;
2573
2574                 drm_object_attach_property(&connector->base,
2575                                               intel_sdvo_connector->right,
2576                                               intel_sdvo_connector->right_margin);
2577                 DRM_DEBUG_KMS("h_overscan: max %d, "
2578                               "default %d, current %d\n",
2579                               data_value[0], data_value[1], response);
2580         }
2581
2582         if (enhancements.overscan_v) {
2583                 if (!intel_sdvo_get_value(intel_sdvo,
2584                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
2585                                           &data_value, 4))
2586                         return false;
2587
2588                 if (!intel_sdvo_get_value(intel_sdvo,
2589                                           SDVO_CMD_GET_OVERSCAN_V,
2590                                           &response, 2))
2591                         return false;
2592
2593                 intel_sdvo_connector->max_vscan = data_value[0];
2594                 intel_sdvo_connector->top_margin = data_value[0] - response;
2595                 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2596                 intel_sdvo_connector->top =
2597                         drm_property_create_range(dev, 0,
2598                                             "top_margin", 0, data_value[0]);
2599                 if (!intel_sdvo_connector->top)
2600                         return false;
2601
2602                 drm_object_attach_property(&connector->base,
2603                                               intel_sdvo_connector->top,
2604                                               intel_sdvo_connector->top_margin);
2605
2606                 intel_sdvo_connector->bottom =
2607                         drm_property_create_range(dev, 0,
2608                                             "bottom_margin", 0, data_value[0]);
2609                 if (!intel_sdvo_connector->bottom)
2610                         return false;
2611
2612                 drm_object_attach_property(&connector->base,
2613                                               intel_sdvo_connector->bottom,
2614                                               intel_sdvo_connector->bottom_margin);
2615                 DRM_DEBUG_KMS("v_overscan: max %d, "
2616                               "default %d, current %d\n",
2617                               data_value[0], data_value[1], response);
2618         }
2619
2620         ENHANCEMENT(hpos, HPOS);
2621         ENHANCEMENT(vpos, VPOS);
2622         ENHANCEMENT(saturation, SATURATION);
2623         ENHANCEMENT(contrast, CONTRAST);
2624         ENHANCEMENT(hue, HUE);
2625         ENHANCEMENT(sharpness, SHARPNESS);
2626         ENHANCEMENT(brightness, BRIGHTNESS);
2627         ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2628         ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2629         ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2630         ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2631         ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2632
2633         if (enhancements.dot_crawl) {
2634                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2635                         return false;
2636
2637                 intel_sdvo_connector->max_dot_crawl = 1;
2638                 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2639                 intel_sdvo_connector->dot_crawl =
2640                         drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2641                 if (!intel_sdvo_connector->dot_crawl)
2642                         return false;
2643
2644                 drm_object_attach_property(&connector->base,
2645                                               intel_sdvo_connector->dot_crawl,
2646                                               intel_sdvo_connector->cur_dot_crawl);
2647                 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2648         }
2649
2650         return true;
2651 }
2652
2653 static bool
2654 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2655                                         struct intel_sdvo_connector *intel_sdvo_connector,
2656                                         struct intel_sdvo_enhancements_reply enhancements)
2657 {
2658         struct drm_device *dev = intel_sdvo->base.base.dev;
2659         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2660         uint16_t response, data_value[2];
2661
2662         ENHANCEMENT(brightness, BRIGHTNESS);
2663
2664         return true;
2665 }
2666 #undef ENHANCEMENT
2667
2668 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2669                                                struct intel_sdvo_connector *intel_sdvo_connector)
2670 {
2671         union {
2672                 struct intel_sdvo_enhancements_reply reply;
2673                 uint16_t response;
2674         } enhancements;
2675
2676         BUILD_BUG_ON(sizeof(enhancements) != 2);
2677
2678         enhancements.response = 0;
2679         intel_sdvo_get_value(intel_sdvo,
2680                              SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2681                              &enhancements, sizeof(enhancements));
2682         if (enhancements.response == 0) {
2683                 DRM_DEBUG_KMS("No enhancement is supported\n");
2684                 return true;
2685         }
2686
2687         if (IS_TV(intel_sdvo_connector))
2688                 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2689         else if (IS_LVDS(intel_sdvo_connector))
2690                 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2691         else
2692                 return true;
2693 }
2694
2695 struct intel_sdvo_ddc_proxy_sc {
2696         struct intel_sdvo *intel_sdvo;
2697         device_t port;
2698 };
2699
2700 static int
2701 intel_sdvo_ddc_proxy_probe(device_t idev)
2702 {
2703
2704         return (BUS_PROBE_DEFAULT);
2705 }
2706
2707 static int
2708 intel_sdvo_ddc_proxy_attach(device_t idev)
2709 {
2710         struct intel_sdvo_ddc_proxy_sc *sc;
2711
2712         sc = device_get_softc(idev);
2713         sc->port = device_add_child(idev, "iicbus", -1);
2714         if (sc->port == NULL)
2715                 return (ENXIO);
2716         device_quiet(sc->port);
2717         bus_generic_attach(idev);
2718         return (0);
2719 }
2720
2721 static int
2722 intel_sdvo_ddc_proxy_detach(device_t idev)
2723 {
2724         struct intel_sdvo_ddc_proxy_sc *sc;
2725         device_t port;
2726
2727         sc = device_get_softc(idev);
2728         port = sc->port;
2729         bus_generic_detach(idev);
2730         if (port != NULL)
2731                 device_delete_child(idev, port);
2732         return (0);
2733 }
2734
2735 static int
2736 intel_sdvo_ddc_proxy_reset(device_t idev, u_char speed, u_char addr,
2737     u_char *oldaddr)
2738 {
2739         struct intel_sdvo_ddc_proxy_sc *sc;
2740         struct intel_sdvo *sdvo;
2741
2742         sc = device_get_softc(idev);
2743         sdvo = sc->intel_sdvo;
2744
2745         return (IICBUS_RESET(device_get_parent(sdvo->i2c), speed, addr,
2746             oldaddr));
2747 }
2748
2749 static int
2750 intel_sdvo_ddc_proxy_transfer(device_t idev, struct iic_msg *msgs, uint32_t num)
2751 {
2752         struct intel_sdvo_ddc_proxy_sc *sc;
2753         struct intel_sdvo *sdvo;
2754
2755         sc = device_get_softc(idev);
2756         sdvo = sc->intel_sdvo;
2757
2758         if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2759                 return (EIO);
2760
2761         return (iicbus_transfer(sdvo->i2c, msgs, num));
2762 }
2763
2764 static bool
2765 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo, struct drm_device *dev,
2766     int sdvo_reg)
2767 {
2768         struct intel_sdvo_ddc_proxy_sc *sc;
2769         int ret;
2770
2771         sdvo->ddc_iic_bus = device_add_child(dev->dev,
2772             "intel_sdvo_ddc_proxy", sdvo_reg);
2773         if (sdvo->ddc_iic_bus == NULL) {
2774                 DRM_ERROR("cannot create ddc proxy bus %d\n", sdvo_reg);
2775                 return (false);
2776         }
2777         device_quiet(sdvo->ddc_iic_bus);
2778         ret = device_probe_and_attach(sdvo->ddc_iic_bus);
2779         if (ret != 0) {
2780                 DRM_ERROR("cannot attach proxy bus %d error %d\n",
2781                     sdvo_reg, ret);
2782                 device_delete_child(dev->dev, sdvo->ddc_iic_bus);
2783                 return (false);
2784         }
2785         sc = device_get_softc(sdvo->ddc_iic_bus);
2786         sc->intel_sdvo = sdvo;
2787
2788         sdvo->ddc = sc->port;
2789         return (true);
2790 }
2791
2792 static device_method_t intel_sdvo_ddc_proxy_methods[] = {
2793         DEVMETHOD(device_probe,         intel_sdvo_ddc_proxy_probe),
2794         DEVMETHOD(device_attach,        intel_sdvo_ddc_proxy_attach),
2795         DEVMETHOD(device_detach,        intel_sdvo_ddc_proxy_detach),
2796         DEVMETHOD(iicbus_reset,         intel_sdvo_ddc_proxy_reset),
2797         DEVMETHOD(iicbus_transfer,      intel_sdvo_ddc_proxy_transfer),
2798         DEVMETHOD_END
2799 };
2800 static driver_t intel_sdvo_ddc_proxy_driver = {
2801         "intel_sdvo_ddc_proxy",
2802         intel_sdvo_ddc_proxy_methods,
2803         sizeof(struct intel_sdvo_ddc_proxy_sc)
2804 };
2805 static devclass_t intel_sdvo_devclass;
2806 DRIVER_MODULE_ORDERED(intel_sdvo_ddc_proxy, drm, intel_sdvo_ddc_proxy_driver,
2807     intel_sdvo_devclass, 0, 0, SI_ORDER_FIRST);
2808
2809 bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
2810 {
2811         struct drm_i915_private *dev_priv = dev->dev_private;
2812         struct intel_encoder *intel_encoder;
2813         struct intel_sdvo *intel_sdvo;
2814         u32 hotplug_mask;
2815         int i;
2816
2817         intel_sdvo = kmalloc(sizeof(struct intel_sdvo), M_DRM,
2818             M_WAITOK | M_ZERO);
2819         if (!intel_sdvo)
2820                 return false;
2821
2822         intel_sdvo->sdvo_reg = sdvo_reg;
2823         intel_sdvo->is_sdvob = is_sdvob;
2824         intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
2825         intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2826         if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev, sdvo_reg)) {
2827                 kfree(intel_sdvo, M_DRM);
2828                 return false;
2829         }
2830
2831         /* encoder type will be decided later */
2832         intel_encoder = &intel_sdvo->base;
2833         intel_encoder->type = INTEL_OUTPUT_SDVO;
2834         drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2835
2836         /* Read the regs to test if we can talk to the device */
2837         for (i = 0; i < 0x40; i++) {
2838                 u8 byte;
2839
2840                 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2841                         DRM_DEBUG_KMS("No SDVO device found on %s\n",
2842                                       SDVO_NAME(intel_sdvo));
2843                         goto err;
2844                 }
2845         }
2846
2847         hotplug_mask = 0;
2848         if (IS_G4X(dev)) {
2849                 hotplug_mask = intel_sdvo->is_sdvob ?
2850                         SDVOB_HOTPLUG_INT_STATUS_G4X : SDVOC_HOTPLUG_INT_STATUS_G4X;
2851         } else if (IS_GEN4(dev)) {
2852                 hotplug_mask = intel_sdvo->is_sdvob ?
2853                         SDVOB_HOTPLUG_INT_STATUS_I965 : SDVOC_HOTPLUG_INT_STATUS_I965;
2854         } else {
2855                 hotplug_mask = intel_sdvo->is_sdvob ?
2856                         SDVOB_HOTPLUG_INT_STATUS_I915 : SDVOC_HOTPLUG_INT_STATUS_I915;
2857         }
2858
2859         drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
2860
2861         intel_encoder->disable = intel_disable_sdvo;
2862         intel_encoder->enable = intel_enable_sdvo;
2863         intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
2864
2865         /* In default case sdvo lvds is false */
2866         if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2867                 goto err;
2868
2869         if (intel_sdvo_output_setup(intel_sdvo,
2870                                     intel_sdvo->caps.output_flags) != true) {
2871                 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
2872                               SDVO_NAME(intel_sdvo));
2873                 /* Output_setup can leave behind connectors! */
2874                 goto err_output;
2875         }
2876
2877         /*
2878          * Cloning SDVO with anything is often impossible, since the SDVO
2879          * encoder can request a special input timing mode. And even if that's
2880          * not the case we have evidence that cloning a plain unscaled mode with
2881          * VGA doesn't really work. Furthermore the cloning flags are way too
2882          * simplistic anyway to express such constraints, so just give up on
2883          * cloning for SDVO encoders.
2884          */
2885         intel_sdvo->base.cloneable = false;
2886
2887         /* Only enable the hotplug irq if we need it, to work around noisy
2888          * hotplug lines.
2889          */
2890         if (intel_sdvo->hotplug_active)
2891                 dev_priv->hotplug_supported_mask |= hotplug_mask;
2892
2893         intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2894
2895         /* Set the input timing to the screen. Assume always input 0. */
2896         if (!intel_sdvo_set_target_input(intel_sdvo))
2897                 goto err_output;
2898
2899         if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2900                                                     &intel_sdvo->pixel_clock_min,
2901                                                     &intel_sdvo->pixel_clock_max))
2902                 goto err_output;
2903
2904         DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2905                         "clock range %dMHz - %dMHz, "
2906                         "input 1: %c, input 2: %c, "
2907                         "output 1: %c, output 2: %c\n",
2908                         SDVO_NAME(intel_sdvo),
2909                         intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2910                         intel_sdvo->caps.device_rev_id,
2911                         intel_sdvo->pixel_clock_min / 1000,
2912                         intel_sdvo->pixel_clock_max / 1000,
2913                         (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2914                         (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2915                         /* check currently supported outputs */
2916                         intel_sdvo->caps.output_flags &
2917                         (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2918                         intel_sdvo->caps.output_flags &
2919                         (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2920         return true;
2921
2922 err_output:
2923         intel_sdvo_output_cleanup(intel_sdvo);
2924
2925 err:
2926         drm_encoder_cleanup(&intel_encoder->base);
2927         intel_sdvo_unselect_i2c_bus(intel_sdvo);
2928         kfree(intel_sdvo, M_DRM);
2929
2930         return false;
2931 }