2 * Copyright (c) 1991 The Regents of the University of California.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by the University of
16 * California, Berkeley and its contributors.
17 * 4. Neither the name of the University nor the names of its contributors
18 * may be used to endorse or promote products derived from this software
19 * without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * $FreeBSD: src/sys/isa/sio.c,v 1.291.2.35 2003/05/18 08:51:15 murray Exp $
34 * $DragonFly: src/sys/dev/serial/sio/sio.c,v 1.44 2008/07/23 16:39:33 dillon Exp $
35 * from: @(#)com.c 7.5 (Berkeley) 5/16/91
36 * from: i386/isa sio.c,v 1.234
39 #include "opt_comconsole.h"
40 #include "opt_compat.h"
50 * Serial driver, based on 386BSD-0.1 com driver.
51 * Mostly rewritten to use pseudo-DMA.
52 * Works for National Semiconductor NS8250-NS16550AF UARTs.
53 * COM driver, based on HP dca driver.
55 * Changes for PC-Card integration:
56 * - Added PC-Card driver table and handlers
58 #include <sys/param.h>
59 #include <sys/systm.h>
60 #include <sys/reboot.h>
61 #include <sys/malloc.h>
65 #include <sys/module.h>
67 #include <sys/dkstat.h>
68 #include <sys/fcntl.h>
69 #include <sys/interrupt.h>
70 #include <sys/kernel.h>
71 #include <sys/syslog.h>
72 #include <sys/sysctl.h>
75 #include <sys/timepps.h>
76 #include <sys/thread2.h>
77 #include <sys/devfs.h>
79 #include <machine/limits.h>
81 #include <bus/isa/isareg.h>
82 #include <bus/isa/isavar.h>
84 #include <bus/pci/pcireg.h>
85 #include <bus/pci/pcivar.h>
88 #include <dev/misc/puc/pucvar.h>
90 #include <machine/lock.h>
92 #include <machine/clock.h>
94 #include <machine/lock.h>
98 #include "sio_private.h"
101 #include "../ic_layer/esp.h"
104 #define LOTS_OF_EVENTS 64 /* helps separate urgent events from input */
106 #define CALLOUT_MASK 0x80
107 #define CONTROL_MASK 0x60
108 #define CONTROL_INIT_STATE 0x20
109 #define CONTROL_LOCK_STATE 0x40
110 #define DEV_TO_UNIT(dev) (MINOR_TO_UNIT(minor(dev)))
111 #define MINOR_TO_UNIT(mynor) ((((mynor) & ~0xffffU) >> (8 + 3)) \
113 #define UNIT_TO_MINOR(unit) ((((unit) & ~0x1fU) << (8 + 3)) \
116 #define com_scr 7 /* scratch register for 16450-16550 (R/W) */
118 #define sio_getreg(com, off) \
119 (bus_space_read_1((com)->bst, (com)->bsh, (off)))
120 #define sio_setreg(com, off, value) \
121 (bus_space_write_1((com)->bst, (com)->bsh, (off), (value)))
125 * (CS_BUSY | CS_TTGO) and (CS_BUSY | CS_TTGO | CS_ODEVREADY) must be higher
126 * than the other bits so that they can be tested as a group without masking
129 * The following com and tty flags correspond closely:
130 * CS_BUSY = TS_BUSY (maintained by comstart(), siopoll() and
132 * CS_TTGO = ~TS_TTSTOP (maintained by comparam() and comstart())
133 * CS_CTS_OFLOW = CCTS_OFLOW (maintained by comparam())
134 * CS_RTS_IFLOW = CRTS_IFLOW (maintained by comparam())
135 * TS_FLUSH is not used.
136 * XXX I think TIOCSETA doesn't clear TS_TTSTOP when it clears IXON.
137 * XXX CS_*FLOW should be CF_*FLOW in com->flags (control flags not state).
139 #define CS_BUSY 0x80 /* output in progress */
140 #define CS_TTGO 0x40 /* output not stopped by XOFF */
141 #define CS_ODEVREADY 0x20 /* external device h/w ready (CTS) */
142 #define CS_CHECKMSR 1 /* check of MSR scheduled */
143 #define CS_CTS_OFLOW 2 /* use CTS output flow control */
144 #define CS_DTR_OFF 0x10 /* DTR held off */
145 #define CS_ODONE 4 /* output completed */
146 #define CS_RTS_IFLOW 8 /* use RTS input flow control */
147 #define CSE_BUSYCHECK 1 /* siobusycheck() scheduled */
149 static char const * const error_desc[] = {
152 #define CE_INTERRUPT_BUF_OVERFLOW 1
153 "interrupt-level buffer overflow",
154 #define CE_TTY_BUF_OVERFLOW 2
155 "tty-level buffer overflow",
159 static int espattach (struct com_s *com, Port_t esp_port);
161 static int sio_isa_attach (device_t dev);
163 static timeout_t siobusycheck;
164 static u_int siodivisor (u_long rclk, speed_t speed);
165 static timeout_t siodtrwakeup;
166 static void comhardclose (struct com_s *com);
167 static void sioinput (struct com_s *com);
168 static void siointr1 (struct com_s *com);
169 static void siointr (void *arg);
170 static int commctl (struct com_s *com, int bits, int how);
171 static int comparam (struct tty *tp, struct termios *t);
172 static inthand2_t siopoll;
173 static int sio_isa_probe (device_t dev);
174 static void siosettimeout (void);
175 static int siosetwater (struct com_s *com, speed_t speed);
176 static void comstart (struct tty *tp);
177 static void comstop (struct tty *tp, int rw);
178 static timeout_t comwakeup;
179 static void disc_optim (struct tty *tp, struct termios *t,
183 static int sio_pci_attach (device_t dev);
184 static void sio_pci_kludge_unit (device_t dev);
185 static int sio_pci_probe (device_t dev);
186 #endif /* NPCI > 0 */
189 static int sio_puc_attach (device_t dev);
190 static int sio_puc_probe (device_t dev);
191 #endif /* NPUC > 0 */
193 static char driver_name[] = "sio";
195 /* table and macro for fast conversion from a unit number to its com struct */
196 devclass_t sio_devclass;
197 #define com_addr(unit) ((struct com_s *) \
198 devclass_get_softc(sio_devclass, unit))
200 static device_method_t sio_isa_methods[] = {
201 /* Device interface */
202 DEVMETHOD(device_probe, sio_isa_probe),
203 DEVMETHOD(device_attach, sio_isa_attach),
208 static driver_t sio_isa_driver = {
211 sizeof(struct com_s),
215 static device_method_t sio_pci_methods[] = {
216 /* Device interface */
217 DEVMETHOD(device_probe, sio_pci_probe),
218 DEVMETHOD(device_attach, sio_pci_attach),
223 static driver_t sio_pci_driver = {
226 sizeof(struct com_s),
228 #endif /* NPCI > 0 */
231 static device_method_t sio_puc_methods[] = {
232 /* Device interface */
233 DEVMETHOD(device_probe, sio_puc_probe),
234 DEVMETHOD(device_attach, sio_puc_attach),
239 static driver_t sio_puc_driver = {
242 sizeof(struct com_s),
244 #endif /* NPUC > 0 */
246 static d_open_t sioopen;
247 static d_close_t sioclose;
248 static d_read_t sioread;
249 static d_write_t siowrite;
250 static d_ioctl_t sioioctl;
252 #define CDEV_MAJOR 28
253 static struct dev_ops sio_ops = {
254 { driver_name, CDEV_MAJOR, D_TTY | D_KQFILTER },
261 .d_kqfilter = ttykqfilter,
262 .d_revoke = ttyrevoke
266 static volatile speed_t comdefaultrate = CONSPEED;
267 static u_long comdefaultrclk = DEFAULT_RCLK;
268 SYSCTL_ULONG(_machdep, OID_AUTO, conrclk, CTLFLAG_RW, &comdefaultrclk, 0, "");
269 static u_int com_events; /* input chars + weighted output completions */
270 static Port_t siocniobase;
271 static int siocnunit;
272 static Port_t siogdbiobase;
273 static int siogdbunit = -1;
274 static bool_t sio_registered;
275 static int sio_timeout;
276 static int sio_timeouts_until_log;
277 static struct callout sio_timeout_handle;
278 static int sio_numunits;
281 /* XXX configure this properly. */
282 static Port_t likely_com_ports[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, };
283 static Port_t likely_esp_ports[] = { 0x140, 0x180, 0x280, 0 };
287 * handle sysctl read/write requests for console speed
289 * In addition to setting comdefaultrate for I/O through /dev/console,
290 * also set the initial and lock values for the /dev/ttyXX device
291 * if there is one associated with the console. Finally, if the /dev/tty
292 * device has already been open, change the speed on the open running port
297 sysctl_machdep_comdefaultrate(SYSCTL_HANDLER_ARGS)
304 newspeed = comdefaultrate;
306 error = sysctl_handle_opaque(oidp, &newspeed, sizeof newspeed, req);
307 if (error || !req->newptr)
310 comdefaultrate = newspeed;
312 if (comconsole < 0) /* serial console not selected? */
315 com = com_addr(comconsole);
320 * set the initial and lock rates for /dev/ttydXX and /dev/cuaXX
321 * (note, the lock rates really are boolean -- if non-zero, disallow
324 com->it_in.c_ispeed = com->it_in.c_ospeed =
325 com->lt_in.c_ispeed = com->lt_in.c_ospeed =
326 com->it_out.c_ispeed = com->it_out.c_ospeed =
327 com->lt_out.c_ispeed = com->lt_out.c_ospeed = comdefaultrate;
330 * if we're open, change the running rate too
333 if (tp && (tp->t_state & TS_ISOPEN)) {
334 tp->t_termios.c_ispeed =
335 tp->t_termios.c_ospeed = comdefaultrate;
337 error = comparam(tp, &tp->t_termios);
343 SYSCTL_PROC(_machdep, OID_AUTO, conspeed, CTLTYPE_INT | CTLFLAG_RW,
344 0, 0, sysctl_machdep_comdefaultrate, "I", "");
353 static struct pci_ids pci_ids[] = {
354 { 0x100812b9, "3COM PCI FaxModem", 0x10 },
355 { 0x2000131f, "CyberSerial (1-port) 16550", 0x10 },
356 { 0x01101407, "Koutech IOFLEX-2S PCI Dual Port Serial", 0x10 },
357 { 0x01111407, "Koutech IOFLEX-2S PCI Dual Port Serial", 0x10 },
358 { 0x048011c1, "Lucent kermit based PCI Modem", 0x14 },
359 { 0x95211415, "Oxford Semiconductor PCI Dual Port Serial", 0x10 },
360 { 0x7101135e, "SeaLevel Ultra 530.PCI Single Port Serial", 0x18 },
361 { 0x0000151f, "SmartLink 5634PCV SurfRider", 0x10 },
362 { 0x98459710, "Netmos Nm9845 PCI Bridge with Dual UART", 0x10 },
363 { 0x00000000, NULL, 0 }
367 sio_pci_attach(device_t dev)
372 type = pci_get_devid(dev);
374 while (id->type && id->type != type)
376 if (id->desc == NULL)
378 sio_pci_kludge_unit(dev);
379 return (sioattach(dev, id->rid, 0UL));
383 * Don't cut and paste this to other drivers. It is a horrible kludge
384 * which will fail to work and also be unnecessary in future versions.
387 sio_pci_kludge_unit(device_t dev)
396 while (resource_int_value("sio", unit, "port", &start) == 0 &&
399 if (device_get_unit(dev) < unit) {
400 dc = device_get_devclass(dev);
401 while (devclass_get_device(dc, unit))
403 device_printf(dev, "moving to sio%d\n", unit);
404 err = device_set_unit(dev, unit); /* EVIL DO NOT COPY */
406 device_printf(dev, "error moving device %d\n", err);
411 sio_pci_probe(device_t dev)
416 type = pci_get_devid(dev);
418 while (id->type && id->type != type)
420 if (id->desc == NULL)
422 device_set_desc(dev, id->desc);
423 return (sioprobe(dev, id->rid, 0UL));
425 #endif /* NPCI > 0 */
429 sio_puc_attach(device_t dev)
433 if (BUS_READ_IVAR(device_get_parent(dev), dev, PUC_IVAR_FREQ,
436 return (sioattach(dev, 0, rclk));
440 sio_puc_probe(device_t dev)
444 if (BUS_READ_IVAR(device_get_parent(dev), dev, PUC_IVAR_FREQ,
447 return (sioprobe(dev, 0, rclk));
451 static struct isa_pnp_id sio_ids[] = {
452 {0x0005d041, "Standard PC COM port"}, /* PNP0500 */
453 {0x0105d041, "16550A-compatible COM port"}, /* PNP0501 */
454 {0x0205d041, "Multiport serial device (non-intelligent 16550)"}, /* PNP0502 */
455 {0x1005d041, "Generic IRDA-compatible device"}, /* PNP0510 */
456 {0x1105d041, "Generic IRDA-compatible device"}, /* PNP0511 */
457 /* Devices that do not have a compatid */
458 {0x12206804, NULL}, /* ACH2012 - 5634BTS 56K Video Ready Modem */
459 {0x7602a904, NULL}, /* AEI0276 - 56K v.90 Fax Modem (LKT) */
460 {0x00007905, NULL}, /* AKY0000 - 56K Plug&Play Modem */
461 {0x21107905, NULL}, /* AKY1021 - 56K Plug&Play Modem */
462 {0x01405407, NULL}, /* AZT4001 - AZT3000 PnP SOUND DEVICE, MODEM */
463 {0x56039008, NULL}, /* BDP0356 - Best Data 56x2 */
464 {0x56159008, NULL}, /* BDP1556 - B.D. Smart One 56SPS,Voice Modem*/
465 {0x36339008, NULL}, /* BDP3336 - Best Data Prods. 336F */
466 {0x0014490a, NULL}, /* BRI1400 - Boca 33.6 PnP */
467 {0x0015490a, NULL}, /* BRI1500 - Internal Fax Data */
468 {0x0034490a, NULL}, /* BRI3400 - Internal ACF Modem */
469 {0x0094490a, NULL}, /* BRI9400 - Boca K56Flex PnP */
470 {0x00b4490a, NULL}, /* BRIB400 - Boca 56k PnP */
471 {0x0030320d, NULL}, /* CIR3000 - Cirrus Logic V43 */
472 {0x0100440e, NULL}, /* CRD0001 - Cardinal MVP288IV ? */
473 {0x01308c0e, NULL}, /* CTL3001 - Creative Labs Phoneblaster */
474 {0x36033610, NULL}, /* DAV0336 - DAVICOM 336PNP MODEM */
475 {0x01009416, NULL}, /* ETT0001 - E-Tech Bullet 33k6 PnP */
476 {0x0000aa1a, NULL}, /* FUJ0000 - FUJITSU Modem 33600 PNP/I2 */
477 {0x1200c31e, NULL}, /* GVC0012 - VF1128HV-R9 (win modem?) */
478 {0x0303c31e, NULL}, /* GVC0303 - MaxTech 33.6 PnP D/F/V */
479 {0x0505c31e, NULL}, /* GVC0505 - GVC 56k Faxmodem */
480 {0x0116c31e, NULL}, /* GVC1601 - Rockwell V.34 Plug & Play Modem */
481 {0x0050c31e, NULL}, /* GVC5000 - some GVC modem */
482 {0x3800f91e, NULL}, /* GWY0038 - Telepath with v.90 */
483 {0x9062f91e, NULL}, /* GWY6290 - Telepath with x2 Technology */
484 {0x8100e425, NULL}, /* IOD0081 - I-O DATA DEVICE,INC. IFML-560 */
485 {0x21002534, NULL}, /* MAE0021 - Jetstream Int V.90 56k Voice Series 2*/
486 {0x0000f435, NULL}, /* MOT0000 - Motorola ModemSURFR 33.6 Intern */
487 {0x5015f435, NULL}, /* MOT1550 - Motorola ModemSURFR 56K Modem */
488 {0xf015f435, NULL}, /* MOT15F0 - Motorola VoiceSURFR 56K Modem */
489 {0x6045f435, NULL}, /* MOT4560 - Motorola ? */
490 {0x61e7a338, NULL}, /* NECE761 - 33.6Modem */
491 {0x08804f3f, NULL}, /* OZO8008 - Zoom (33.6k Modem) */
492 {0x0f804f3f, NULL}, /* OZO800f - Zoom 2812 (56k Modem) */
493 {0x39804f3f, NULL}, /* OZO8039 - Zoom 56k flex */
494 {0x00914f3f, NULL}, /* OZO9100 - Zoom 2919 (K56 Faxmodem) */
495 {0x3024a341, NULL}, /* PMC2430 - Pace 56 Voice Internal Modem */
496 {0x1000eb49, NULL}, /* ROK0010 - Rockwell ? */
497 {0x1200b23d, NULL}, /* RSS0012 - OMRON ME5614ISA */
498 {0x5002734a, NULL}, /* RSS0250 - 5614Jx3(G) Internal Modem */
499 {0x6202734a, NULL}, /* RSS0262 - 5614Jx3[G] V90+K56Flex Modem */
500 {0x1010104d, NULL}, /* SHP1010 - Rockwell 33600bps Modem */
501 {0xc100ad4d, NULL}, /* SMM00C1 - Leopard 56k PnP */
502 {0x9012b04e, NULL}, /* SUP1290 - Supra ? */
503 {0x1013b04e, NULL}, /* SUP1310 - SupraExpress 336i PnP */
504 {0x8013b04e, NULL}, /* SUP1380 - SupraExpress 288i PnP Voice */
505 {0x8113b04e, NULL}, /* SUP1381 - SupraExpress 336i PnP Voice */
506 {0x5016b04e, NULL}, /* SUP1650 - Supra 336i Sp Intl */
507 {0x7016b04e, NULL}, /* SUP1670 - Supra 336i V+ Intl */
508 {0x7420b04e, NULL}, /* SUP2070 - Supra ? */
509 {0x8020b04e, NULL}, /* SUP2080 - Supra ? */
510 {0x8420b04e, NULL}, /* SUP2084 - SupraExpress 56i PnP */
511 {0x7121b04e, NULL}, /* SUP2171 - SupraExpress 56i Sp? */
512 {0x8024b04e, NULL}, /* SUP2480 - Supra ? */
513 {0x01007256, NULL}, /* USR0001 - U.S. Robotics Inc., Sportster W */
514 {0x02007256, NULL}, /* USR0002 - U.S. Robotics Inc. Sportster 33. */
515 {0x04007256, NULL}, /* USR0004 - USR Sportster 14.4k */
516 {0x06007256, NULL}, /* USR0006 - USR Sportster 33.6k */
517 {0x11007256, NULL}, /* USR0011 - USR ? */
518 {0x01017256, NULL}, /* USR0101 - USR ? */
519 {0x30207256, NULL}, /* USR2030 - U.S.Robotics Inc. Sportster 560 */
520 {0x50207256, NULL}, /* USR2050 - U.S.Robotics Inc. Sportster 33. */
521 {0x70207256, NULL}, /* USR2070 - U.S.Robotics Inc. Sportster 560 */
522 {0x30307256, NULL}, /* USR3030 - U.S. Robotics 56K FAX INT */
523 {0x31307256, NULL}, /* USR3031 - U.S. Robotics 56K FAX INT */
524 {0x50307256, NULL}, /* USR3050 - U.S. Robotics 56K FAX INT */
525 {0x70307256, NULL}, /* USR3070 - U.S. Robotics 56K Voice INT */
526 {0x90307256, NULL}, /* USR3090 - USR ? */
527 {0x70917256, NULL}, /* USR9170 - U.S. Robotics 56K FAX INT */
528 {0x90917256, NULL}, /* USR9190 - USR 56k Voice INT */
529 {0x0300695c, NULL}, /* WCI0003 - Fax/Voice/Modem/Speakphone/Asvd */
530 {0x01a0896a, NULL}, /* ZTIA001 - Zoom Internal V90 Faxmodem */
531 {0x61f7896a, NULL}, /* ZTIF761 - Zoom ComStar 33.6 */
538 sio_isa_probe(device_t dev)
540 /* Check isapnp ids */
541 if (ISA_PNP_PROBE(device_get_parent(dev), dev, sio_ids) == ENXIO)
543 return (sioprobe(dev, 0, 0UL));
547 sioprobe(device_t dev, int xrid, u_long rclk)
550 static bool_t already_init;
559 intrmask_t irqmap[4];
564 u_int flags = device_get_flags(dev);
566 struct resource *port;
569 port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
570 0, ~0, IO_COMSIZE, RF_ACTIVE);
574 com = device_get_softc(dev);
575 com->bst = rman_get_bustag(port);
576 com->bsh = rman_get_bushandle(port);
583 * XXX this is broken - when we are first called, there are no
584 * previously configured IO ports. We could hard code
585 * 0x3f8, 0x2f8, 0x3e8, 0x2e8 etc but that's probably worse.
586 * This code has been doing nothing since the conversion since
587 * "count" is zero the first time around.
591 * Turn off MCR_IENABLE for all likely serial ports. An unused
592 * port with its MCR_IENABLE gate open will inhibit interrupts
593 * from any used port that shares the interrupt vector.
594 * XXX the gate enable is elsewhere for some multiports.
597 int count, i, xioport;
599 devclass_get_devices(sio_devclass, &devs, &count);
600 for (i = 0; i < count; i++) {
602 if (device_is_enabled(xdev) &&
603 bus_get_resource(xdev, SYS_RES_IOPORT, 0, &xioport,
605 outb(xioport + com_mcr, 0);
612 if (COM_LLCONSOLE(flags)) {
613 kprintf("sio%d: reserved for low-level i/o\n",
614 device_get_unit(dev));
615 bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
620 * If the device is on a multiport card and has an AST/4
621 * compatible interrupt control register, initialize this
622 * register and prepare to leave MCR_IENABLE clear in the mcr.
623 * Otherwise, prepare to set MCR_IENABLE in the mcr.
624 * Point idev to the device struct giving the correct id_irq.
625 * This is the struct for the master device if there is one.
628 mcr_image = MCR_IENABLE;
630 if (COM_ISMULTIPORT(flags)) {
634 idev = devclass_get_device(sio_devclass, COM_MPMASTER(flags));
636 kprintf("sio%d: master device %d not configured\n",
637 device_get_unit(dev), COM_MPMASTER(flags));
640 if (!COM_NOTAST4(flags)) {
641 if (bus_get_resource(idev, SYS_RES_IOPORT, 0, &io,
644 if (bus_get_resource(idev, SYS_RES_IRQ, 0,
646 outb(xiobase + com_scr, 0x80);
648 outb(xiobase + com_scr, 0);
653 #endif /* COM_MULTIPORT */
654 if (bus_get_resource(idev, SYS_RES_IRQ, 0, NULL, NULL) != 0)
657 bzero(failures, sizeof failures);
658 iobase = rman_get_start(port);
661 * We don't want to get actual interrupts, just masked ones.
662 * Interrupts from this line should already be masked in the ICU,
663 * but mask them in the processor as well in case there are some
664 * (misconfigured) shared interrupts.
670 * For the TI16754 chips, set prescaler to 1 (4 is often the
671 * default after-reset value) as otherwise it's impossible to
672 * get highest baudrates.
674 if (COM_TI16754(flags)) {
677 cfcr = sio_getreg(com, com_cfcr);
678 sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE);
679 efr = sio_getreg(com, com_efr);
680 /* Unlock extended features to turn off prescaler. */
681 sio_setreg(com, com_efr, efr | EFR_EFE);
683 sio_setreg(com, com_cfcr, (cfcr != CFCR_EFR_ENABLE) ? cfcr : 0);
684 /* Turn off prescaler. */
685 sio_setreg(com, com_mcr,
686 sio_getreg(com, com_mcr) & ~MCR_PRESCALE);
687 sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE);
688 sio_setreg(com, com_efr, efr);
689 sio_setreg(com, com_cfcr, cfcr);
693 * Initialize the speed and the word size and wait long enough to
694 * drain the maximum of 16 bytes of junk in device output queues.
695 * The speed is undefined after a master reset and must be set
696 * before relying on anything related to output. There may be
697 * junk after a (very fast) soft reboot and (apparently) after
699 * XXX what about the UART bug avoided by waiting in comparam()?
700 * We don't want to to wait long enough to drain at 2 bps.
702 if (iobase == siocniobase) {
703 DELAY((16 + 1) * 1000000 / (comdefaultrate / 10));
705 sio_setreg(com, com_cfcr, CFCR_DLAB | CFCR_8BITS);
706 divisor = siodivisor(rclk, SIO_TEST_SPEED);
707 sio_setreg(com, com_dlbl, divisor & 0xff);
708 sio_setreg(com, com_dlbh, divisor >> 8);
709 sio_setreg(com, com_cfcr, CFCR_8BITS);
710 DELAY((16 + 1) * 1000000 / (SIO_TEST_SPEED / 10));
714 * Make sure we can drain the receiver. If we can't, the serial
715 * port may not exist.
717 for (fn = 0; fn < 256; ++fn) {
718 if ((sio_getreg(com, com_lsr) & LSR_RXRDY) == 0)
720 (void)sio_getreg(com, com_data);
723 kprintf("sio%d: can't drain, serial port might "
724 "not exist, disabling\n", device_get_unit(dev));
730 * Enable the interrupt gate and disable device interupts. This
731 * should leave the device driving the interrupt line low and
732 * guarantee an edge trigger if an interrupt can be generated.
735 sio_setreg(com, com_mcr, mcr_image);
736 sio_setreg(com, com_ier, 0);
737 DELAY(1000); /* XXX */
738 irqmap[0] = isa_irq_pending();
741 * Attempt to set loopback mode so that we can send a null byte
742 * without annoying any external device.
745 sio_setreg(com, com_mcr, mcr_image | MCR_LOOPBACK);
748 * Attempt to generate an output interrupt. On 8250's, setting
749 * IER_ETXRDY generates an interrupt independent of the current
750 * setting and independent of whether the THR is empty. On 16450's,
751 * setting IER_ETXRDY generates an interrupt independent of the
752 * current setting. On 16550A's, setting IER_ETXRDY only
753 * generates an interrupt when IER_ETXRDY is not already set.
755 sio_setreg(com, com_ier, IER_ETXRDY);
758 * On some 16x50 incompatibles, setting IER_ETXRDY doesn't generate
759 * an interrupt. They'd better generate one for actually doing
760 * output. Loopback may be broken on the same incompatibles but
761 * it's unlikely to do more than allow the null byte out.
763 sio_setreg(com, com_data, 0);
764 DELAY((1 + 2) * 1000000 / (SIO_TEST_SPEED / 10));
767 * Turn off loopback mode so that the interrupt gate works again
768 * (MCR_IENABLE was hidden). This should leave the device driving
769 * an interrupt line high. It doesn't matter if the interrupt
770 * line oscillates while we are not looking at it, since interrupts
774 sio_setreg(com, com_mcr, mcr_image);
777 * Some pcmcia cards have the "TXRDY bug", so we check everyone
778 * for IIR_TXRDY implementation ( Palido 321s, DC-1S... )
780 if (COM_NOPROBE(flags)) {
781 /* Reading IIR register twice */
782 for (fn = 0; fn < 2; fn ++) {
784 failures[6] = sio_getreg(com, com_iir);
786 /* Check IIR_TXRDY clear ? */
788 if (failures[6] & IIR_TXRDY) {
789 /* Nop, Double check with clearing IER */
790 sio_setreg(com, com_ier, 0);
791 if (sio_getreg(com, com_iir) & IIR_NOPEND) {
792 /* Ok. we're familia this gang */
793 SET_FLAG(dev, COM_C_IIR_TXRDYBUG);
795 /* Unknown, Just omit this chip.. XXX */
797 sio_setreg(com, com_mcr, 0);
800 /* OK. this is well-known guys */
801 CLR_FLAG(dev, COM_C_IIR_TXRDYBUG);
803 sio_setreg(com, com_ier, 0);
804 sio_setreg(com, com_cfcr, CFCR_8BITS);
806 bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
807 return (iobase == siocniobase ? 0 : result);
812 * o the CFCR, IER and MCR in UART hold the values written to them
813 * (the values happen to be all distinct - this is good for
814 * avoiding false positive tests from bus echoes).
815 * o an output interrupt is generated and its vector is correct.
816 * o the interrupt goes away when the IIR in the UART is read.
819 failures[0] = sio_getreg(com, com_cfcr) - CFCR_8BITS;
820 failures[1] = sio_getreg(com, com_ier) - IER_ETXRDY;
821 failures[2] = sio_getreg(com, com_mcr) - mcr_image;
822 DELAY(10000); /* Some internal modems need this time */
823 irqmap[1] = isa_irq_pending();
824 failures[4] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_TXRDY;
825 DELAY(1000); /* XXX */
826 irqmap[2] = isa_irq_pending();
827 failures[6] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND;
830 * Turn off all device interrupts and check that they go off properly.
831 * Leave MCR_IENABLE alone. For ports without a master port, it gates
832 * the OUT2 output of the UART to
833 * the ICU input. Closing the gate would give a floating ICU input
834 * (unless there is another device driving it) and spurious interrupts.
835 * (On the system that this was first tested on, the input floats high
836 * and gives a (masked) interrupt as soon as the gate is closed.)
838 sio_setreg(com, com_ier, 0);
839 sio_setreg(com, com_cfcr, CFCR_8BITS); /* dummy to avoid bus echo */
840 failures[7] = sio_getreg(com, com_ier);
841 DELAY(1000); /* XXX */
842 irqmap[3] = isa_irq_pending();
843 failures[9] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND;
847 irqs = irqmap[1] & ~irqmap[0];
848 if (bus_get_resource(idev, SYS_RES_IRQ, 0, &xirq, NULL) == 0 &&
849 ((1 << xirq) & irqs) == 0)
851 "sio%d: configured irq %ld not in bitmap of probed irqs %#x\n",
852 device_get_unit(dev), xirq, irqs);
854 kprintf("sio%d: irq maps: %#x %#x %#x %#x\n",
855 device_get_unit(dev),
856 irqmap[0], irqmap[1], irqmap[2], irqmap[3]);
859 for (fn = 0; fn < sizeof failures; ++fn)
861 sio_setreg(com, com_mcr, 0);
864 kprintf("sio%d: probe failed test(s):",
865 device_get_unit(dev));
866 for (fn = 0; fn < sizeof failures; ++fn)
873 bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
874 return (iobase == siocniobase ? 0 : result);
879 espattach(struct com_s *com, Port_t esp_port)
885 * Check the ESP-specific I/O port to see if we're an ESP
886 * card. If not, return failure immediately.
888 if ((inb(esp_port) & 0xf3) == 0) {
889 kprintf(" port 0x%x is not an ESP board?\n", esp_port);
894 * We've got something that claims to be a Hayes ESP card.
898 /* Get the dip-switch configuration */
899 outb(esp_port + ESP_CMD1, ESP_GETDIPS);
900 dips = inb(esp_port + ESP_STATUS1);
903 * Bits 0,1 of dips say which COM port we are.
905 if (rman_get_start(com->ioportres) == likely_com_ports[dips & 0x03])
908 kprintf(" esp_port has com %d\n", dips & 0x03);
913 * Check for ESP version 2.0 or later: bits 4,5,6 = 010.
915 outb(esp_port + ESP_CMD1, ESP_GETTEST);
916 val = inb(esp_port + ESP_STATUS1); /* clear reg 1 */
917 val = inb(esp_port + ESP_STATUS2);
918 if ((val & 0x70) < 0x20) {
919 kprintf("-old (%o)", val & 0x70);
924 * Check for ability to emulate 16550: bit 7 == 1
926 if ((dips & 0x80) == 0) {
932 * Okay, we seem to be a Hayes ESP card. Whee.
935 com->esp_port = esp_port;
941 sio_isa_attach(device_t dev)
943 return (sioattach(dev, 0, 0UL));
947 sioattach(device_t dev, int xrid, u_long rclk)
958 struct resource *port;
964 callout_init(&sio_timeout_handle);
968 port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
969 0, ~0, IO_COMSIZE, RF_ACTIVE);
973 iobase = rman_get_start(port);
974 unit = device_get_unit(dev);
975 com = device_get_softc(dev);
976 flags = device_get_flags(dev);
978 if (unit >= sio_numunits)
979 sio_numunits = unit + 1;
981 * sioprobe() has initialized the device registers as follows:
982 * o cfcr = CFCR_8BITS.
983 * It is most important that CFCR_DLAB is off, so that the
984 * data port is not hidden when we enable interrupts.
986 * Interrupts are only enabled when the line is open.
987 * o mcr = MCR_IENABLE, or 0 if the port has AST/4 compatible
988 * interrupt control register or the config specifies no irq.
989 * Keeping MCR_DTR and MCR_RTS off might stop the external
990 * device from sending before we are ready.
992 bzero(com, sizeof *com);
994 com->ioportres = port;
995 com->bst = rman_get_bustag(port);
996 com->bsh = rman_get_bushandle(port);
997 com->cfcr_image = CFCR_8BITS;
998 com->dtr_wait = 3 * hz;
999 callout_init(&com->dtr_ch);
1000 callout_init(&com->busy_ch);
1001 com->loses_outints = COM_LOSESOUTINTS(flags) != 0;
1002 com->no_irq = bus_get_resource(dev, SYS_RES_IRQ, 0, NULL, NULL) != 0;
1003 com->tx_fifo_size = 1;
1004 com->obufs[0].l_head = com->obuf1;
1005 com->obufs[1].l_head = com->obuf2;
1007 com->data_port = iobase + com_data;
1008 com->int_id_port = iobase + com_iir;
1009 com->modem_ctl_port = iobase + com_mcr;
1010 com->mcr_image = inb(com->modem_ctl_port);
1011 com->line_status_port = iobase + com_lsr;
1012 com->modem_status_port = iobase + com_msr;
1013 com->intr_ctl_port = iobase + com_ier;
1016 rclk = DEFAULT_RCLK;
1020 * We don't use all the flags from <sys/ttydefaults.h> since they
1021 * are only relevant for logins. It's important to have echo off
1022 * initially so that the line doesn't start blathering before the
1023 * echo flag can be turned off.
1025 com->it_in.c_iflag = 0;
1026 com->it_in.c_oflag = 0;
1027 com->it_in.c_cflag = TTYDEF_CFLAG;
1028 com->it_in.c_lflag = 0;
1029 if (unit == comconsole) {
1030 com->it_in.c_iflag = TTYDEF_IFLAG;
1031 com->it_in.c_oflag = TTYDEF_OFLAG;
1032 com->it_in.c_cflag = TTYDEF_CFLAG | CLOCAL;
1033 com->it_in.c_lflag = TTYDEF_LFLAG;
1034 com->lt_out.c_cflag = com->lt_in.c_cflag = CLOCAL;
1035 com->lt_out.c_ispeed = com->lt_out.c_ospeed =
1036 com->lt_in.c_ispeed = com->lt_in.c_ospeed =
1037 com->it_in.c_ispeed = com->it_in.c_ospeed = comdefaultrate;
1039 com->it_in.c_ispeed = com->it_in.c_ospeed = TTYDEF_SPEED;
1040 if (siosetwater(com, com->it_in.c_ispeed) != 0) {
1043 * Leave i/o resources allocated if this is a `cn'-level
1044 * console, so that other devices can't snarf them.
1046 if (iobase != siocniobase)
1047 bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
1051 termioschars(&com->it_in);
1052 com->it_out = com->it_in;
1054 /* attempt to determine UART type */
1055 kprintf("sio%d: type", unit);
1058 #ifdef COM_MULTIPORT
1059 if (!COM_ISMULTIPORT(flags) && !COM_IIR_TXRDYBUG(flags))
1061 if (!COM_IIR_TXRDYBUG(flags))
1068 scr = sio_getreg(com, com_scr);
1069 sio_setreg(com, com_scr, 0xa5);
1070 scr1 = sio_getreg(com, com_scr);
1071 sio_setreg(com, com_scr, 0x5a);
1072 scr2 = sio_getreg(com, com_scr);
1073 sio_setreg(com, com_scr, scr);
1074 if (scr1 != 0xa5 || scr2 != 0x5a) {
1076 goto determined_type;
1079 sio_setreg(com, com_fifo, FIFO_ENABLE | FIFO_RX_HIGH);
1082 switch (inb(com->int_id_port) & IIR_FIFO_MASK) {
1093 if (COM_NOFIFO(flags)) {
1094 kprintf(" 16550A fifo disabled");
1096 com->hasfifo = TRUE;
1097 if (COM_ST16650A(flags)) {
1099 com->tx_fifo_size = 32;
1100 kprintf(" ST16650A");
1101 } else if (COM_TI16754(flags)) {
1102 com->tx_fifo_size = 64;
1103 kprintf(" TI16754");
1105 com->tx_fifo_size = COM_FIFOSIZE(flags);
1110 for (espp = likely_esp_ports; *espp != 0; espp++)
1111 if (espattach(com, *espp)) {
1112 com->tx_fifo_size = 1024;
1116 if (!com->st16650a && !COM_TI16754(flags)) {
1117 if (!com->tx_fifo_size)
1118 com->tx_fifo_size = 16;
1120 kprintf(" lookalike with %d bytes FIFO",
1130 * Set 16550 compatibility mode.
1131 * We don't use the ESP_MODE_SCALE bit to increase the
1132 * fifo trigger levels because we can't handle large
1134 * XXX flow control should be set in comparam(), not here.
1136 outb(com->esp_port + ESP_CMD1, ESP_SETMODE);
1137 outb(com->esp_port + ESP_CMD2, ESP_MODE_RTS | ESP_MODE_FIFO);
1139 /* Set RTS/CTS flow control. */
1140 outb(com->esp_port + ESP_CMD1, ESP_SETFLOWTYPE);
1141 outb(com->esp_port + ESP_CMD2, ESP_FLOW_RTS);
1142 outb(com->esp_port + ESP_CMD2, ESP_FLOW_CTS);
1144 /* Set flow-control levels. */
1145 outb(com->esp_port + ESP_CMD1, ESP_SETRXFLOW);
1146 outb(com->esp_port + ESP_CMD2, HIBYTE(768));
1147 outb(com->esp_port + ESP_CMD2, LOBYTE(768));
1148 outb(com->esp_port + ESP_CMD2, HIBYTE(512));
1149 outb(com->esp_port + ESP_CMD2, LOBYTE(512));
1151 #endif /* COM_ESP */
1152 sio_setreg(com, com_fifo, 0);
1155 #ifdef COM_MULTIPORT
1156 if (COM_ISMULTIPORT(flags)) {
1159 com->multiport = TRUE;
1160 kprintf(" (multiport");
1161 if (unit == COM_MPMASTER(flags))
1164 masterdev = devclass_get_device(sio_devclass,
1165 COM_MPMASTER(flags));
1166 com->no_irq = (masterdev == NULL || bus_get_resource(masterdev,
1167 SYS_RES_IRQ, 0, NULL, NULL) != 0);
1169 #endif /* COM_MULTIPORT */
1170 if (unit == comconsole)
1171 kprintf(", console");
1172 if (COM_IIR_TXRDYBUG(flags))
1173 kprintf(" with a bogus IIR_TXRDY register");
1176 if (!sio_registered) {
1177 register_swi(SWI_TTY, siopoll, NULL ,"swi_siopoll", NULL);
1178 sio_registered = TRUE;
1180 minorbase = UNIT_TO_MINOR(unit);
1181 make_dev(&sio_ops, minorbase,
1182 UID_ROOT, GID_WHEEL, 0600, "ttyd%r", unit);
1183 make_dev(&sio_ops, minorbase | CONTROL_INIT_STATE,
1184 UID_ROOT, GID_WHEEL, 0600, "ttyid%r", unit);
1185 make_dev(&sio_ops, minorbase | CONTROL_LOCK_STATE,
1186 UID_ROOT, GID_WHEEL, 0600, "ttyld%r", unit);
1187 make_dev(&sio_ops, minorbase | CALLOUT_MASK,
1188 UID_UUCP, GID_DIALER, 0660, "cuaa%r", unit);
1189 make_dev(&sio_ops, minorbase | CALLOUT_MASK | CONTROL_INIT_STATE,
1190 UID_UUCP, GID_DIALER, 0660, "cuaia%r", unit);
1191 make_dev(&sio_ops, minorbase | CALLOUT_MASK | CONTROL_LOCK_STATE,
1192 UID_UUCP, GID_DIALER, 0660, "cuala%r", unit);
1194 com->pps.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR;
1195 pps_init(&com->pps);
1198 com->irqres = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0ul, ~0ul, 1,
1201 ret = BUS_SETUP_INTR(device_get_parent(dev), dev,
1202 com->irqres, 0, siointr, com,
1203 &com->cookie, NULL);
1205 device_printf(dev, "could not activate interrupt\n");
1206 #if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \
1207 defined(ALT_BREAK_TO_DEBUGGER))
1209 * Enable interrupts for early break-to-debugger support
1212 if (ret == 0 && unit == comconsole)
1213 outb(siocniobase + com_ier, IER_ERXRDY | IER_ERLS |
1222 sioopen(struct dev_open_args *ap)
1224 cdev_t dev = ap->a_head.a_dev;
1232 unit = MINOR_TO_UNIT(mynor);
1233 com = com_addr(unit);
1238 if (mynor & CONTROL_MASK)
1240 tp = dev->si_tty = com->tp = ttymalloc(com->tp);
1243 * We jump to this label after all non-interrupted sleeps to pick
1244 * up any changes of the device state.
1247 while (com->state & CS_DTR_OFF) {
1248 error = tsleep(&com->dtr_wait, PCATCH, "siodtr", 0);
1249 if (com_addr(unit) == NULL) {
1253 if (error != 0 || com->gone)
1256 if (tp->t_state & TS_ISOPEN) {
1258 * The device is open, so everything has been initialized.
1261 if (mynor & CALLOUT_MASK) {
1262 if (!com->active_out) {
1267 if (com->active_out) {
1268 if (ap->a_oflags & O_NONBLOCK) {
1272 error = tsleep(&com->active_out,
1273 PCATCH, "siobi", 0);
1274 if (com_addr(unit) == NULL) {
1278 if (error != 0 || com->gone)
1283 if (tp->t_state & TS_XCLUDE && priv_check_cred(ap->a_cred, PRIV_ROOT, 0)) {
1289 * The device isn't open, so there are no conflicts.
1290 * Initialize it. Initialization is done twice in many
1291 * cases: to preempt sleeping callin opens if we are
1292 * callout, and to complete a callin open after DCD rises.
1294 tp->t_oproc = comstart;
1295 tp->t_param = comparam;
1296 tp->t_stop = comstop;
1298 tp->t_termios = mynor & CALLOUT_MASK
1299 ? com->it_out : com->it_in;
1300 (void)commctl(com, TIOCM_DTR | TIOCM_RTS, DMSET);
1301 com->poll = com->no_irq;
1302 com->poll_output = com->loses_outints;
1304 error = comparam(tp, &tp->t_termios);
1309 * XXX we should goto open_top if comparam() slept.
1313 * (Re)enable and drain fifos.
1315 * Certain SMC chips cause problems if the fifos
1316 * are enabled while input is ready. Turn off the
1317 * fifo if necessary to clear the input. We test
1318 * the input ready bit after enabling the fifos
1319 * since we've already enabled them in comparam()
1320 * and to handle races between enabling and fresh
1324 sio_setreg(com, com_fifo,
1325 FIFO_RCV_RST | FIFO_XMT_RST
1328 * XXX the delays are for superstitious
1329 * historical reasons. It must be less than
1330 * the character time at the maximum
1331 * supported speed (87 usec at 115200 bps
1332 * 8N1). Otherwise we might loop endlessly
1333 * if data is streaming in. We used to use
1334 * delays of 100. That usually worked
1335 * because DELAY(100) used to usually delay
1336 * for about 85 usec instead of 100.
1339 if (!(inb(com->line_status_port) & LSR_RXRDY))
1341 sio_setreg(com, com_fifo, 0);
1343 (void) inb(com->data_port);
1348 (void) inb(com->line_status_port);
1349 (void) inb(com->data_port);
1350 com->prev_modem_status = com->last_modem_status
1351 = inb(com->modem_status_port);
1352 if (COM_IIR_TXRDYBUG(com->flags)) {
1353 outb(com->intr_ctl_port, IER_ERXRDY | IER_ERLS
1356 outb(com->intr_ctl_port, IER_ERXRDY | IER_ETXRDY
1357 | IER_ERLS | IER_EMSC);
1361 * Handle initial DCD. Callout devices get a fake initial
1362 * DCD (trapdoor DCD). If we are callout, then any sleeping
1363 * callin opens get woken up and resume sleeping on "siobi"
1364 * instead of "siodcd".
1367 * XXX `mynor & CALLOUT_MASK' should be
1368 * `tp->t_cflag & (SOFT_CARRIER | TRAPDOOR_CARRIER) where
1369 * TRAPDOOR_CARRIER is the default initial state for callout
1370 * devices and SOFT_CARRIER is like CLOCAL except it hides
1373 if (com->prev_modem_status & MSR_DCD || mynor & CALLOUT_MASK)
1374 (*linesw[tp->t_line].l_modem)(tp, 1);
1377 * Wait for DCD if necessary.
1379 if (!(tp->t_state & TS_CARR_ON) && !(mynor & CALLOUT_MASK)
1380 && !(tp->t_cflag & CLOCAL) && !(ap->a_oflags & O_NONBLOCK)) {
1382 error = tsleep(TSA_CARR_ON(tp), PCATCH, "siodcd", 0);
1383 if (com_addr(unit) == NULL) {
1388 if (error != 0 || com->gone)
1392 error = (*linesw[tp->t_line].l_open)(dev, tp);
1393 disc_optim(tp, &tp->t_termios, com);
1394 if (tp->t_state & TS_ISOPEN && mynor & CALLOUT_MASK)
1395 com->active_out = TRUE;
1399 if (!(tp->t_state & TS_ISOPEN) && com->wopeners == 0)
1405 sioclose(struct dev_close_args *ap)
1407 cdev_t dev = ap->a_head.a_dev;
1413 if (mynor & CONTROL_MASK)
1415 com = com_addr(MINOR_TO_UNIT(mynor));
1420 (*linesw[tp->t_line].l_close)(tp, ap->a_fflag);
1421 disc_optim(tp, &tp->t_termios, com);
1422 comstop(tp, FREAD | FWRITE);
1428 kprintf("sio%d: gone\n", com->unit);
1430 if (com->ibuf != NULL)
1431 kfree(com->ibuf, M_DEVBUF);
1432 bzero(tp, sizeof *tp);
1439 comhardclose(struct com_s *com)
1447 com->poll_output = FALSE;
1448 com->do_timestamp = FALSE;
1449 com->do_dcd_timestamp = FALSE;
1450 com->pps.ppsparam.mode = 0;
1451 sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK);
1454 #if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \
1455 defined(ALT_BREAK_TO_DEBUGGER))
1457 * Leave interrupts enabled and don't clear DTR if this is the
1458 * console. This allows us to detect break-to-debugger events
1459 * while the console device is closed.
1461 if (com->unit != comconsole)
1464 sio_setreg(com, com_ier, 0);
1465 if (tp->t_cflag & HUPCL
1467 * XXX we will miss any carrier drop between here and the
1468 * next open. Perhaps we should watch DCD even when the
1469 * port is closed; it is not sufficient to check it at
1470 * the next open because it might go up and down while
1471 * we're not watching.
1473 || (!com->active_out
1474 && !(com->prev_modem_status & MSR_DCD)
1475 && !(com->it_in.c_cflag & CLOCAL))
1476 || !(tp->t_state & TS_ISOPEN)) {
1477 (void)commctl(com, TIOCM_DTR, DMBIC);
1478 if (com->dtr_wait != 0 && !(com->state & CS_DTR_OFF)) {
1479 callout_reset(&com->dtr_ch, com->dtr_wait,
1481 com->state |= CS_DTR_OFF;
1487 * Disable fifos so that they are off after controlled
1488 * reboots. Some BIOSes fail to detect 16550s when the
1489 * fifos are enabled.
1491 sio_setreg(com, com_fifo, 0);
1493 com->active_out = FALSE;
1494 wakeup(&com->active_out);
1495 wakeup(TSA_CARR_ON(tp)); /* restart any wopeners */
1500 sioread(struct dev_read_args *ap)
1502 cdev_t dev = ap->a_head.a_dev;
1507 if (mynor & CONTROL_MASK)
1509 com = com_addr(MINOR_TO_UNIT(mynor));
1510 if (com == NULL || com->gone)
1512 return ((*linesw[com->tp->t_line].l_read)(com->tp, ap->a_uio, ap->a_ioflag));
1516 siowrite(struct dev_write_args *ap)
1518 cdev_t dev = ap->a_head.a_dev;
1524 if (mynor & CONTROL_MASK)
1527 unit = MINOR_TO_UNIT(mynor);
1528 com = com_addr(unit);
1529 if (com == NULL || com->gone)
1532 * (XXX) We disallow virtual consoles if the physical console is
1533 * a serial port. This is in case there is a display attached that
1534 * is not the console. In that situation we don't need/want the X
1535 * server taking over the console.
1537 if (constty != NULL && unit == comconsole)
1539 return ((*linesw[com->tp->t_line].l_write)(com->tp, ap->a_uio, ap->a_ioflag));
1543 siobusycheck(void *chan)
1547 com = (struct com_s *)chan;
1550 * Clear TS_BUSY if low-level output is complete.
1551 * spl locking is sufficient because siointr1() does not set CS_BUSY.
1552 * If siointr1() clears CS_BUSY after we look at it, then we'll get
1553 * called again. Reading the line status port outside of siointr1()
1554 * is safe because CS_BUSY is clear so there are no output interrupts
1558 if (com->state & CS_BUSY)
1559 com->extra_state &= ~CSE_BUSYCHECK; /* False alarm. */
1560 else if ((inb(com->line_status_port) & (LSR_TSRE | LSR_TXRDY))
1561 == (LSR_TSRE | LSR_TXRDY)) {
1562 com->tp->t_state &= ~TS_BUSY;
1564 com->extra_state &= ~CSE_BUSYCHECK;
1566 callout_reset(&com->busy_ch, hz / 100, siobusycheck, com);
1572 siodivisor(u_long rclk, speed_t speed)
1578 if (speed == 0 || speed > ((speed_t)-1 - 1) / 8)
1580 divisor = (rclk / (8UL * speed) + 1) / 2;
1581 if (divisor == 0 || divisor >= 65536)
1583 actual_speed = rclk / (16UL * divisor);
1585 /* 10 times error in percent: */
1586 error = ((actual_speed - (long)speed) * 2000 / (long)speed + 1) / 2;
1588 /* 3.0% maximum error tolerance: */
1589 if (error < -30 || error > 30)
1596 siodtrwakeup(void *chan)
1600 com = (struct com_s *)chan;
1601 com->state &= ~CS_DTR_OFF;
1602 wakeup(&com->dtr_wait);
1606 sioinput(struct com_s *com)
1616 if (!(tp->t_state & TS_ISOPEN) || !(tp->t_cflag & CREAD)) {
1617 com_events -= (com->iptr - com->ibuf);
1618 com->iptr = com->ibuf;
1621 if (tp->t_state & TS_CAN_BYPASS_L_RINT) {
1623 * Avoid the grotesquely inefficient lineswitch routine
1624 * (ttyinput) in "raw" mode. It usually takes about 450
1625 * instructions (that's without canonical processing or echo!).
1626 * slinput is reasonably fast (usually 40 instructions plus
1631 incc = com->iptr - buf;
1632 if (tp->t_rawq.c_cc + incc > tp->t_ihiwat
1633 && (com->state & CS_RTS_IFLOW
1634 || tp->t_iflag & IXOFF)
1635 && !(tp->t_state & TS_TBLOCK))
1637 com->delta_error_counts[CE_TTY_BUF_OVERFLOW]
1638 += b_to_q((char *)buf, incc, &tp->t_rawq);
1642 tp->t_rawcc += incc;
1644 if (tp->t_state & TS_TTSTOP
1645 && (tp->t_iflag & IXANY
1646 || tp->t_cc[VSTART] == tp->t_cc[VSTOP])) {
1647 tp->t_state &= ~TS_TTSTOP;
1648 tp->t_lflag &= ~FLUSHO;
1652 } while (buf < com->iptr);
1656 line_status = buf[com->ierroff];
1659 & (LSR_BI | LSR_FE | LSR_OE | LSR_PE)) {
1660 if (line_status & LSR_BI)
1661 recv_data |= TTY_BI;
1662 if (line_status & LSR_FE)
1663 recv_data |= TTY_FE;
1664 if (line_status & LSR_OE)
1665 recv_data |= TTY_OE;
1666 if (line_status & LSR_PE)
1667 recv_data |= TTY_PE;
1669 (*linesw[tp->t_line].l_rint)(recv_data, tp);
1671 } while (buf < com->iptr);
1673 com_events -= (com->iptr - com->ibuf);
1674 com->iptr = com->ibuf;
1677 * There is now room for another low-level buffer full of input,
1678 * so enable RTS if it is now disabled and there is room in the
1679 * high-level buffer.
1681 if ((com->state & CS_RTS_IFLOW) && !(com->mcr_image & MCR_RTS) &&
1682 !(tp->t_state & TS_TBLOCK))
1683 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
1689 #ifndef COM_MULTIPORT
1691 siointr1((struct com_s *) arg);
1693 #else /* COM_MULTIPORT */
1694 bool_t possibly_more_intrs;
1699 * Loop until there is no activity on any port. This is necessary
1700 * to get an interrupt edge more than to avoid another interrupt.
1701 * If the IRQ signal is just an OR of the IRQ signals from several
1702 * devices, then the edge from one may be lost because another is
1707 possibly_more_intrs = FALSE;
1708 for (unit = 0; unit < sio_numunits; ++unit) {
1709 com = com_addr(unit);
1712 * would it work here, or be counter-productive?
1716 && (inb(com->int_id_port) & IIR_IMASK)
1719 possibly_more_intrs = TRUE;
1721 /* XXX com_unlock(); */
1723 } while (possibly_more_intrs);
1725 #endif /* COM_MULTIPORT */
1729 siointr1(struct com_s *com)
1732 u_char modem_status;
1739 int_ctl = inb(com->intr_ctl_port);
1740 int_ctl_new = int_ctl;
1742 while (!com->gone) {
1743 if (com->pps.ppsparam.mode & PPS_CAPTUREBOTH) {
1744 modem_status = inb(com->modem_status_port);
1745 if ((modem_status ^ com->last_modem_status) & MSR_DCD) {
1746 count = sys_cputimer->count();
1747 pps_event(&com->pps, count,
1748 (modem_status & MSR_DCD) ?
1749 PPS_CAPTUREASSERT : PPS_CAPTURECLEAR);
1752 line_status = inb(com->line_status_port);
1754 /* input event? (check first to help avoid overruns) */
1755 while (line_status & LSR_RCV_MASK) {
1756 /* break/unnattached error bits or real input? */
1757 if (!(line_status & LSR_RXRDY))
1760 recv_data = inb(com->data_port);
1761 #if defined(DDB) && defined(ALT_BREAK_TO_DEBUGGER)
1763 * Solaris implements a new BREAK which is initiated
1764 * by a character sequence CR ~ ^b which is similar
1765 * to a familiar pattern used on Sun servers by the
1768 #define KEY_CRTLB 2 /* ^B */
1769 #define KEY_CR 13 /* CR '\r' */
1770 #define KEY_TILDE 126 /* ~ */
1772 if (com->unit == comconsole) {
1773 static int brk_state1 = 0, brk_state2 = 0;
1774 if (recv_data == KEY_CR) {
1775 brk_state1 = recv_data;
1777 } else if (brk_state1 == KEY_CR && (recv_data == KEY_TILDE || recv_data == KEY_CRTLB)) {
1778 if (recv_data == KEY_TILDE)
1779 brk_state2 = recv_data;
1780 else if (brk_state2 == KEY_TILDE && recv_data == KEY_CRTLB) {
1782 brk_state1 = brk_state2 = 0;
1790 if (line_status & (LSR_BI | LSR_FE | LSR_PE)) {
1792 * Don't store BI if IGNBRK or FE/PE if IGNPAR.
1793 * Otherwise, push the work to a higher level
1794 * (to handle PARMRK) if we're bypassing.
1795 * Otherwise, convert BI/FE and PE+INPCK to 0.
1797 * This makes bypassing work right in the
1798 * usual "raw" case (IGNBRK set, and IGNPAR
1801 * Note: BI together with FE/PE means just BI.
1803 if (line_status & LSR_BI) {
1804 #if defined(DDB) && defined(BREAK_TO_DEBUGGER)
1805 if (com->unit == comconsole) {
1811 || com->tp->t_iflag & IGNBRK)
1815 || com->tp->t_iflag & IGNPAR)
1818 if (com->tp->t_state & TS_CAN_BYPASS_L_RINT
1819 && (line_status & (LSR_BI | LSR_FE)
1820 || com->tp->t_iflag & INPCK))
1824 if (com->hotchar != 0 && recv_data == com->hotchar)
1827 if (ioptr >= com->ibufend)
1828 CE_RECORD(com, CE_INTERRUPT_BUF_OVERFLOW);
1830 if (com->do_timestamp)
1831 microtime(&com->timestamp);
1834 #if 0 /* for testing input latency vs efficiency */
1835 if (com->iptr - com->ibuf == 8)
1838 ioptr[0] = recv_data;
1839 ioptr[com->ierroff] = line_status;
1840 com->iptr = ++ioptr;
1841 if (ioptr == com->ihighwater
1842 && com->state & CS_RTS_IFLOW)
1843 outb(com->modem_ctl_port,
1844 com->mcr_image &= ~MCR_RTS);
1845 if (line_status & LSR_OE)
1846 CE_RECORD(com, CE_OVERRUN);
1850 * "& 0x7F" is to avoid the gcc-1.40 generating a slow
1851 * jump from the top of the loop to here
1853 line_status = inb(com->line_status_port) & 0x7F;
1856 /* modem status change? (always check before doing output) */
1857 modem_status = inb(com->modem_status_port);
1858 if (modem_status != com->last_modem_status) {
1859 if (com->do_dcd_timestamp
1860 && !(com->last_modem_status & MSR_DCD)
1861 && modem_status & MSR_DCD)
1862 microtime(&com->dcd_timestamp);
1865 * Schedule high level to handle DCD changes. Note
1866 * that we don't use the delta bits anywhere. Some
1867 * UARTs mess them up, and it's easy to remember the
1868 * previous bits and calculate the delta.
1870 com->last_modem_status = modem_status;
1871 if (!(com->state & CS_CHECKMSR)) {
1872 com_events += LOTS_OF_EVENTS;
1873 com->state |= CS_CHECKMSR;
1877 /* handle CTS change immediately for crisp flow ctl */
1878 if (com->state & CS_CTS_OFLOW) {
1879 if (modem_status & MSR_CTS)
1880 com->state |= CS_ODEVREADY;
1882 com->state &= ~CS_ODEVREADY;
1886 /* output queued and everything ready? */
1887 if (line_status & LSR_TXRDY
1888 && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) {
1889 ioptr = com->obufq.l_head;
1890 if (com->tx_fifo_size > 1) {
1893 ocount = com->obufq.l_tail - ioptr;
1894 if (ocount > com->tx_fifo_size)
1895 ocount = com->tx_fifo_size;
1896 com->bytes_out += ocount;
1898 outb(com->data_port, *ioptr++);
1899 while (--ocount != 0);
1901 outb(com->data_port, *ioptr++);
1904 com->obufq.l_head = ioptr;
1905 if (COM_IIR_TXRDYBUG(com->flags)) {
1906 int_ctl_new = int_ctl | IER_ETXRDY;
1908 if (ioptr >= com->obufq.l_tail) {
1911 qp = com->obufq.l_next;
1912 qp->l_queued = FALSE;
1915 com->obufq.l_head = qp->l_head;
1916 com->obufq.l_tail = qp->l_tail;
1917 com->obufq.l_next = qp;
1919 /* output just completed */
1920 if (COM_IIR_TXRDYBUG(com->flags)) {
1921 int_ctl_new = int_ctl & ~IER_ETXRDY;
1923 com->state &= ~CS_BUSY;
1925 if (!(com->state & CS_ODONE)) {
1926 com_events += LOTS_OF_EVENTS;
1927 com->state |= CS_ODONE;
1928 setsofttty(); /* handle at high level ASAP */
1931 if (COM_IIR_TXRDYBUG(com->flags) && (int_ctl != int_ctl_new)) {
1932 outb(com->intr_ctl_port, int_ctl_new);
1937 #ifndef COM_MULTIPORT
1938 if ((inb(com->int_id_port) & IIR_IMASK) == IIR_NOPEND)
1939 #endif /* COM_MULTIPORT */
1945 sioioctl(struct dev_ioctl_args *ap)
1947 cdev_t dev = ap->a_head.a_dev;
1948 caddr_t data = ap->a_data;
1953 #if defined(COMPAT_43) || defined(COMPAT_SUNOS)
1955 struct termios term;
1959 com = com_addr(MINOR_TO_UNIT(mynor));
1960 if (com == NULL || com->gone)
1962 if (mynor & CONTROL_MASK) {
1965 switch (mynor & CONTROL_MASK) {
1966 case CONTROL_INIT_STATE:
1967 ct = mynor & CALLOUT_MASK ? &com->it_out : &com->it_in;
1969 case CONTROL_LOCK_STATE:
1970 ct = mynor & CALLOUT_MASK ? &com->lt_out : &com->lt_in;
1973 return (ENODEV); /* /dev/nodev */
1975 switch (ap->a_cmd) {
1977 error = priv_check_cred(ap->a_cred, PRIV_ROOT, 0);
1980 *ct = *(struct termios *)data;
1983 *(struct termios *)data = *ct;
1986 *(int *)data = TTYDISC;
1989 bzero(data, sizeof(struct winsize));
1996 #if defined(COMPAT_43) || defined(COMPAT_SUNOS)
1997 term = tp->t_termios;
1999 error = ttsetcompat(tp, &ap->a_cmd, data, &term);
2002 if (ap->a_cmd != oldcmd)
2003 data = (caddr_t)&term;
2005 if (ap->a_cmd == TIOCSETA || ap->a_cmd == TIOCSETAW ||
2006 ap->a_cmd == TIOCSETAF) {
2008 struct termios *dt = (struct termios *)data;
2009 struct termios *lt = mynor & CALLOUT_MASK
2010 ? &com->lt_out : &com->lt_in;
2012 dt->c_iflag = (tp->t_iflag & lt->c_iflag)
2013 | (dt->c_iflag & ~lt->c_iflag);
2014 dt->c_oflag = (tp->t_oflag & lt->c_oflag)
2015 | (dt->c_oflag & ~lt->c_oflag);
2016 dt->c_cflag = (tp->t_cflag & lt->c_cflag)
2017 | (dt->c_cflag & ~lt->c_cflag);
2018 dt->c_lflag = (tp->t_lflag & lt->c_lflag)
2019 | (dt->c_lflag & ~lt->c_lflag);
2020 for (cc = 0; cc < NCCS; ++cc)
2021 if (lt->c_cc[cc] != 0)
2022 dt->c_cc[cc] = tp->t_cc[cc];
2023 if (lt->c_ispeed != 0)
2024 dt->c_ispeed = tp->t_ispeed;
2025 if (lt->c_ospeed != 0)
2026 dt->c_ospeed = tp->t_ospeed;
2028 error = (*linesw[tp->t_line].l_ioctl)(tp, ap->a_cmd, data, ap->a_fflag, ap->a_cred);
2029 if (error != ENOIOCTL)
2032 error = ttioctl(tp, ap->a_cmd, data, ap->a_fflag);
2033 disc_optim(tp, &tp->t_termios, com);
2034 if (error != ENOIOCTL) {
2038 switch (ap->a_cmd) {
2040 sio_setreg(com, com_cfcr, com->cfcr_image |= CFCR_SBREAK);
2043 sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK);
2046 (void)commctl(com, TIOCM_DTR, DMBIS);
2049 (void)commctl(com, TIOCM_DTR, DMBIC);
2052 * XXX should disallow changing MCR_RTS if CS_RTS_IFLOW is set. The
2053 * changes get undone on the next call to comparam().
2056 (void)commctl(com, *(int *)data, DMSET);
2059 (void)commctl(com, *(int *)data, DMBIS);
2062 (void)commctl(com, *(int *)data, DMBIC);
2065 *(int *)data = commctl(com, 0, DMGET);
2068 /* must be root since the wait applies to following logins */
2069 error = priv_check_cred(ap->a_cred, PRIV_ROOT, 0);
2074 com->dtr_wait = *(int *)data * hz / 100;
2077 *(int *)data = com->dtr_wait * 100 / hz;
2080 com->do_timestamp = TRUE;
2081 *(struct timeval *)data = com->timestamp;
2083 case TIOCDCDTIMESTAMP:
2084 com->do_dcd_timestamp = TRUE;
2085 *(struct timeval *)data = com->dcd_timestamp;
2089 error = pps_ioctl(ap->a_cmd, data, &com->pps);
2090 if (error == ENODEV)
2099 siopoll(void *dummy, void *frame)
2103 if (com_events == 0)
2106 for (unit = 0; unit < sio_numunits; ++unit) {
2111 com = com_addr(unit);
2115 if (tp == NULL || com->gone) {
2117 * Discard any events related to never-opened or
2118 * going-away devices.
2121 incc = com->iptr - com->ibuf;
2122 com->iptr = com->ibuf;
2123 if (com->state & CS_CHECKMSR) {
2124 incc += LOTS_OF_EVENTS;
2125 com->state &= ~CS_CHECKMSR;
2131 if (com->iptr != com->ibuf) {
2136 if (com->state & CS_CHECKMSR) {
2137 u_char delta_modem_status;
2140 delta_modem_status = com->last_modem_status
2141 ^ com->prev_modem_status;
2142 com->prev_modem_status = com->last_modem_status;
2143 com_events -= LOTS_OF_EVENTS;
2144 com->state &= ~CS_CHECKMSR;
2146 if (delta_modem_status & MSR_DCD)
2147 (*linesw[tp->t_line].l_modem)
2148 (tp, com->prev_modem_status & MSR_DCD);
2150 if (com->state & CS_ODONE) {
2152 com_events -= LOTS_OF_EVENTS;
2153 com->state &= ~CS_ODONE;
2155 if (!(com->state & CS_BUSY)
2156 && !(com->extra_state & CSE_BUSYCHECK)) {
2157 callout_reset(&com->busy_ch, hz / 100,
2159 com->extra_state |= CSE_BUSYCHECK;
2161 (*linesw[tp->t_line].l_start)(tp);
2163 if (com_events == 0)
2166 if (com_events >= LOTS_OF_EVENTS)
2171 comparam(struct tty *tp, struct termios *t)
2181 unit = DEV_TO_UNIT(tp->t_dev);
2182 com = com_addr(unit);
2186 /* do historical conversions */
2187 if (t->c_ispeed == 0)
2188 t->c_ispeed = t->c_ospeed;
2190 /* check requested parameters */
2191 if (t->c_ospeed == 0)
2194 if (t->c_ispeed != t->c_ospeed)
2196 divisor = siodivisor(com->rclk, t->c_ispeed);
2201 /* parameters are OK, convert them to the com struct and the device */
2204 (void)commctl(com, TIOCM_DTR, DMBIC); /* hang up line */
2206 (void)commctl(com, TIOCM_DTR, DMBIS);
2208 switch (cflag & CSIZE) {
2222 if (cflag & PARENB) {
2224 if (!(cflag & PARODD))
2230 if (com->hasfifo && divisor != 0) {
2232 * Use a fifo trigger level low enough so that the input
2233 * latency from the fifo is less than about 16 msec and
2234 * the total latency is less than about 30 msec. These
2235 * latencies are reasonable for humans. Serial comms
2236 * protocols shouldn't expect anything better since modem
2237 * latencies are larger.
2239 * Interrupts can be held up for long periods of time
2240 * due to inefficiencies in other parts of the kernel,
2241 * certain video cards, etc. Setting the FIFO trigger
2242 * point to MEDH instead of HIGH gives us 694uS of slop
2243 * (8 character times) instead of 173uS (2 character times)
2246 com->fifo_image = t->c_ospeed <= 4800
2247 ? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_MEDH;
2250 * The Hayes ESP card needs the fifo DMA mode bit set
2251 * in compatibility mode. If not, it will interrupt
2252 * for each character received.
2255 com->fifo_image |= FIFO_DMA_MODE;
2257 sio_setreg(com, com_fifo, com->fifo_image);
2261 * This returns with interrupts disabled so that we can complete
2262 * the speed change atomically. Keeping interrupts disabled is
2263 * especially important while com_data is hidden.
2265 (void) siosetwater(com, t->c_ispeed);
2268 sio_setreg(com, com_cfcr, cfcr | CFCR_DLAB);
2270 * Only set the divisor registers if they would change,
2271 * since on some 16550 incompatibles (UMC8669F), setting
2272 * them while input is arriving them loses sync until
2273 * data stops arriving.
2275 dlbl = divisor & 0xFF;
2276 if (sio_getreg(com, com_dlbl) != dlbl)
2277 sio_setreg(com, com_dlbl, dlbl);
2278 dlbh = divisor >> 8;
2279 if (sio_getreg(com, com_dlbh) != dlbh)
2280 sio_setreg(com, com_dlbh, dlbh);
2283 sio_setreg(com, com_cfcr, com->cfcr_image = cfcr);
2285 if (!(tp->t_state & TS_TTSTOP))
2286 com->state |= CS_TTGO;
2288 if (cflag & CRTS_IFLOW) {
2289 if (com->st16650a) {
2290 sio_setreg(com, com_cfcr, 0xbf);
2291 sio_setreg(com, com_fifo,
2292 sio_getreg(com, com_fifo) | 0x40);
2294 com->state |= CS_RTS_IFLOW;
2296 * If CS_RTS_IFLOW just changed from off to on, the change
2297 * needs to be propagated to MCR_RTS. This isn't urgent,
2298 * so do it later by calling comstart() instead of repeating
2299 * a lot of code from comstart() here.
2301 } else if (com->state & CS_RTS_IFLOW) {
2302 com->state &= ~CS_RTS_IFLOW;
2304 * CS_RTS_IFLOW just changed from on to off. Force MCR_RTS
2305 * on here, since comstart() won't do it later.
2307 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
2308 if (com->st16650a) {
2309 sio_setreg(com, com_cfcr, 0xbf);
2310 sio_setreg(com, com_fifo,
2311 sio_getreg(com, com_fifo) & ~0x40);
2317 * Set up state to handle output flow control.
2318 * XXX - worth handling MDMBUF (DCD) flow control at the lowest level?
2319 * Now has 10+ msec latency, while CTS flow has 50- usec latency.
2321 com->state |= CS_ODEVREADY;
2322 com->state &= ~CS_CTS_OFLOW;
2323 if (cflag & CCTS_OFLOW) {
2324 com->state |= CS_CTS_OFLOW;
2325 if (!(com->last_modem_status & MSR_CTS))
2326 com->state &= ~CS_ODEVREADY;
2327 if (com->st16650a) {
2328 sio_setreg(com, com_cfcr, 0xbf);
2329 sio_setreg(com, com_fifo,
2330 sio_getreg(com, com_fifo) | 0x80);
2333 if (com->st16650a) {
2334 sio_setreg(com, com_cfcr, 0xbf);
2335 sio_setreg(com, com_fifo,
2336 sio_getreg(com, com_fifo) & ~0x80);
2340 sio_setreg(com, com_cfcr, com->cfcr_image);
2342 /* XXX shouldn't call functions while intrs are disabled. */
2343 disc_optim(tp, t, com);
2345 * Recover from fiddling with CS_TTGO. We used to call siointr1()
2346 * unconditionally, but that defeated the careful discarding of
2347 * stale input in sioopen().
2349 if (com->state >= (CS_BUSY | CS_TTGO))
2355 if (com->ibufold != NULL) {
2356 kfree(com->ibufold, M_DEVBUF);
2357 com->ibufold = NULL;
2363 siosetwater(struct com_s *com, speed_t speed)
2371 * Make the buffer size large enough to handle a softtty interrupt
2372 * latency of about 2 ticks without loss of throughput or data
2373 * (about 3 ticks if input flow control is not used or not honoured,
2374 * but a bit less for CS5-CS7 modes).
2376 cp4ticks = speed / 10 / hz * 4;
2377 for (ibufsize = 128; ibufsize < cp4ticks;)
2379 if (ibufsize == com->ibufsize) {
2385 * Allocate input buffer. The extra factor of 2 in the size is
2386 * to allow for an error byte for each input byte.
2388 ibuf = kmalloc(2 * ibufsize, M_DEVBUF, M_WAITOK | M_ZERO);
2390 /* Initialize non-critical variables. */
2391 com->ibufold = com->ibuf;
2392 com->ibufsize = ibufsize;
2395 tp->t_ififosize = 2 * ibufsize;
2396 tp->t_ispeedwat = (speed_t)-1;
2397 tp->t_ospeedwat = (speed_t)-1;
2401 * Read current input buffer, if any. Continue with interrupts
2405 if (com->iptr != com->ibuf)
2409 * Initialize critical variables, including input buffer watermarks.
2410 * The external device is asked to stop sending when the buffer
2411 * exactly reaches high water, or when the high level requests it.
2412 * The high level is notified immediately (rather than at a later
2413 * clock tick) when this watermark is reached.
2414 * The buffer size is chosen so the watermark should almost never
2416 * The low watermark is invisibly 0 since the buffer is always
2417 * emptied all at once.
2419 com->iptr = com->ibuf = ibuf;
2420 com->ibufend = ibuf + ibufsize;
2421 com->ierroff = ibufsize;
2422 com->ihighwater = ibuf + 3 * ibufsize / 4;
2427 comstart(struct tty *tp)
2432 unit = DEV_TO_UNIT(tp->t_dev);
2433 com = com_addr(unit);
2438 if (tp->t_state & TS_TTSTOP)
2439 com->state &= ~CS_TTGO;
2441 com->state |= CS_TTGO;
2442 if (tp->t_state & TS_TBLOCK) {
2443 if (com->mcr_image & MCR_RTS && com->state & CS_RTS_IFLOW)
2444 outb(com->modem_ctl_port, com->mcr_image &= ~MCR_RTS);
2446 if (!(com->mcr_image & MCR_RTS) && com->iptr < com->ihighwater
2447 && com->state & CS_RTS_IFLOW)
2448 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
2451 if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP)) {
2456 if (tp->t_outq.c_cc != 0) {
2460 if (!com->obufs[0].l_queued) {
2461 com->obufs[0].l_tail
2462 = com->obuf1 + q_to_b(&tp->t_outq, com->obuf1,
2464 com->obufs[0].l_next = NULL;
2465 com->obufs[0].l_queued = TRUE;
2467 if (com->state & CS_BUSY) {
2468 qp = com->obufq.l_next;
2469 while ((next = qp->l_next) != NULL)
2471 qp->l_next = &com->obufs[0];
2473 com->obufq.l_head = com->obufs[0].l_head;
2474 com->obufq.l_tail = com->obufs[0].l_tail;
2475 com->obufq.l_next = &com->obufs[0];
2476 com->state |= CS_BUSY;
2480 if (tp->t_outq.c_cc != 0 && !com->obufs[1].l_queued) {
2481 com->obufs[1].l_tail
2482 = com->obuf2 + q_to_b(&tp->t_outq, com->obuf2,
2484 com->obufs[1].l_next = NULL;
2485 com->obufs[1].l_queued = TRUE;
2487 if (com->state & CS_BUSY) {
2488 qp = com->obufq.l_next;
2489 while ((next = qp->l_next) != NULL)
2491 qp->l_next = &com->obufs[1];
2493 com->obufq.l_head = com->obufs[1].l_head;
2494 com->obufq.l_tail = com->obufs[1].l_tail;
2495 com->obufq.l_next = &com->obufs[1];
2496 com->state |= CS_BUSY;
2500 tp->t_state |= TS_BUSY;
2503 if (com->state >= (CS_BUSY | CS_TTGO))
2504 siointr1(com); /* fake interrupt to start output */
2511 comstop(struct tty *tp, int rw)
2515 com = com_addr(DEV_TO_UNIT(tp->t_dev));
2516 if (com == NULL || com->gone)
2522 /* XXX avoid h/w bug. */
2525 sio_setreg(com, com_fifo,
2526 FIFO_XMT_RST | com->fifo_image);
2527 com->obufs[0].l_queued = FALSE;
2528 com->obufs[1].l_queued = FALSE;
2529 if (com->state & CS_ODONE)
2530 com_events -= LOTS_OF_EVENTS;
2531 com->state &= ~(CS_ODONE | CS_BUSY);
2532 com->tp->t_state &= ~TS_BUSY;
2537 /* XXX avoid h/w bug. */
2540 sio_setreg(com, com_fifo,
2541 FIFO_RCV_RST | com->fifo_image);
2542 com_events -= (com->iptr - com->ibuf);
2543 com->iptr = com->ibuf;
2550 commctl(struct com_s *com, int bits, int how)
2556 bits = TIOCM_LE; /* XXX - always enabled while open */
2557 mcr = com->mcr_image;
2562 msr = com->prev_modem_status;
2570 * XXX - MSR_RI is naturally volatile, and we make MSR_TERI
2571 * more volatile by reading the modem status a lot. Perhaps
2572 * we should latch both bits until the status is read here.
2574 if (msr & (MSR_RI | MSR_TERI))
2579 if (bits & TIOCM_DTR)
2581 if (bits & TIOCM_RTS)
2588 outb(com->modem_ctl_port,
2589 com->mcr_image = mcr | (com->mcr_image & MCR_IENABLE));
2592 outb(com->modem_ctl_port, com->mcr_image |= mcr);
2595 outb(com->modem_ctl_port, com->mcr_image &= ~mcr);
2610 * Set our timeout period to 1 second if no polled devices are open.
2611 * Otherwise set it to max(1/200, 1/hz).
2612 * Enable timeouts iff some device is open.
2614 callout_stop(&sio_timeout_handle);
2617 for (unit = 0; unit < sio_numunits; ++unit) {
2618 com = com_addr(unit);
2619 if (com != NULL && com->tp != NULL
2620 && com->tp->t_state & TS_ISOPEN && !com->gone) {
2622 if (com->poll || com->poll_output) {
2623 sio_timeout = hz > 200 ? hz / 200 : 1;
2629 sio_timeouts_until_log = hz / sio_timeout;
2630 callout_reset(&sio_timeout_handle, sio_timeout,
2633 /* Flush error messages, if any. */
2634 sio_timeouts_until_log = 1;
2636 callout_stop(&sio_timeout_handle);
2641 comwakeup(void *chan)
2646 callout_reset(&sio_timeout_handle, sio_timeout, comwakeup, NULL);
2649 * Recover from lost output interrupts.
2650 * Poll any lines that don't use interrupts.
2652 for (unit = 0; unit < sio_numunits; ++unit) {
2653 com = com_addr(unit);
2654 if (com != NULL && !com->gone
2655 && (com->state >= (CS_BUSY | CS_TTGO) || com->poll)) {
2663 * Check for and log errors, but not too often.
2665 if (--sio_timeouts_until_log > 0)
2667 sio_timeouts_until_log = hz / sio_timeout;
2668 for (unit = 0; unit < sio_numunits; ++unit) {
2671 com = com_addr(unit);
2676 for (errnum = 0; errnum < CE_NTYPES; ++errnum) {
2681 delta = com->delta_error_counts[errnum];
2682 com->delta_error_counts[errnum] = 0;
2686 total = com->error_counts[errnum] += delta;
2687 log(LOG_ERR, "sio%d: %u more %s%s (total %lu)\n",
2688 unit, delta, error_desc[errnum],
2689 delta == 1 ? "" : "s", total);
2695 disc_optim(struct tty *tp, struct termios *t, struct com_s *com)
2697 if (!(t->c_iflag & (ICRNL | IGNCR | IMAXBEL | INLCR | ISTRIP | IXON))
2698 && (!(t->c_iflag & BRKINT) || (t->c_iflag & IGNBRK))
2699 && (!(t->c_iflag & PARMRK)
2700 || (t->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK))
2701 && !(t->c_lflag & (ECHO | ICANON | IEXTEN | ISIG | PENDIN))
2702 && linesw[tp->t_line].l_rint == ttyinput)
2703 tp->t_state |= TS_CAN_BYPASS_L_RINT;
2705 tp->t_state &= ~TS_CAN_BYPASS_L_RINT;
2706 com->hotchar = linesw[tp->t_line].l_hotchar;
2710 * Following are all routines needed for SIO to act as console
2712 #include <sys/cons.h>
2722 static speed_t siocngetspeed (Port_t, u_long rclk);
2723 static void siocnclose (struct siocnstate *sp, Port_t iobase);
2724 static void siocnopen (struct siocnstate *sp, Port_t iobase, int speed);
2725 static void siocntxwait (Port_t iobase);
2727 static cn_probe_t siocnprobe;
2728 static cn_init_t siocninit;
2729 static cn_init_fini_t siocninit_fini;
2730 static cn_checkc_t siocncheckc;
2731 static cn_getc_t siocngetc;
2732 static cn_putc_t siocnputc;
2734 #if defined(__i386__) || defined(__x86_64__)
2735 CONS_DRIVER(sio, siocnprobe, siocninit, siocninit_fini,
2736 NULL, siocngetc, siocncheckc, siocnputc, NULL);
2739 /* To get the GDB related variables */
2741 #include <ddb/ddb.h>
2745 siocntxwait(Port_t iobase)
2750 * Wait for any pending transmission to finish. Required to avoid
2751 * the UART lockup bug when the speed is changed, and for normal
2755 while ((inb(iobase + com_lsr) & (LSR_TSRE | LSR_TXRDY))
2756 != (LSR_TSRE | LSR_TXRDY) && --timo != 0)
2761 * Read the serial port specified and try to figure out what speed
2762 * it's currently running at. We're assuming the serial port has
2763 * been initialized and is basicly idle. This routine is only intended
2764 * to be run at system startup.
2766 * If the value read from the serial port doesn't make sense, return 0.
2770 siocngetspeed(Port_t iobase, u_long rclk)
2777 cfcr = inb(iobase + com_cfcr);
2778 outb(iobase + com_cfcr, CFCR_DLAB | cfcr);
2780 dlbl = inb(iobase + com_dlbl);
2781 dlbh = inb(iobase + com_dlbh);
2783 outb(iobase + com_cfcr, cfcr);
2785 divisor = dlbh << 8 | dlbl;
2787 /* XXX there should be more sanity checking. */
2790 return (rclk / (16UL * divisor));
2794 siocnopen(struct siocnstate *sp, Port_t iobase, int speed)
2801 * Save all the device control registers except the fifo register
2802 * and set our default ones (cs8 -parenb speed=comdefaultrate).
2803 * We can't save the fifo register since it is read-only.
2805 sp->ier = inb(iobase + com_ier);
2806 outb(iobase + com_ier, 0); /* spltty() doesn't stop siointr() */
2807 siocntxwait(iobase);
2808 sp->cfcr = inb(iobase + com_cfcr);
2809 outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS);
2810 sp->dlbl = inb(iobase + com_dlbl);
2811 sp->dlbh = inb(iobase + com_dlbh);
2813 * Only set the divisor registers if they would change, since on
2814 * some 16550 incompatibles (Startech), setting them clears the
2815 * data input register. This also reduces the effects of the
2818 divisor = siodivisor(comdefaultrclk, speed);
2819 dlbl = divisor & 0xFF;
2820 if (sp->dlbl != dlbl)
2821 outb(iobase + com_dlbl, dlbl);
2822 dlbh = divisor >> 8;
2823 if (sp->dlbh != dlbh)
2824 outb(iobase + com_dlbh, dlbh);
2825 outb(iobase + com_cfcr, CFCR_8BITS);
2826 sp->mcr = inb(iobase + com_mcr);
2828 * We don't want interrupts, but must be careful not to "disable"
2829 * them by clearing the MCR_IENABLE bit, since that might cause
2830 * an interrupt by floating the IRQ line.
2832 outb(iobase + com_mcr, (sp->mcr & MCR_IENABLE) | MCR_DTR | MCR_RTS);
2836 siocnclose(struct siocnstate *sp, Port_t iobase)
2839 * Restore the device control registers.
2841 siocntxwait(iobase);
2842 outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS);
2843 if (sp->dlbl != inb(iobase + com_dlbl))
2844 outb(iobase + com_dlbl, sp->dlbl);
2845 if (sp->dlbh != inb(iobase + com_dlbh))
2846 outb(iobase + com_dlbh, sp->dlbh);
2847 outb(iobase + com_cfcr, sp->cfcr);
2849 * XXX damp oscillations of MCR_DTR and MCR_RTS by not restoring them.
2851 outb(iobase + com_mcr, sp->mcr | MCR_DTR | MCR_RTS);
2852 outb(iobase + com_ier, sp->ier);
2856 siocnprobe(struct consdev *cp)
2862 struct siocnstate sp;
2865 * Find our first enabled console, if any. If it is a high-level
2866 * console device, then initialize it and return successfully.
2867 * If it is a low-level console device, then initialize it and
2868 * return unsuccessfully. It must be initialized in both cases
2869 * for early use by console drivers and debuggers. Initializing
2870 * the hardware is not necessary in all cases, since the i/o
2871 * routines initialize it on the fly, but it is necessary if
2872 * input might arrive while the hardware is switched back to an
2873 * uninitialized state. We can't handle multiple console devices
2874 * yet because our low-level routines don't take a device arg.
2875 * We trust the user to set the console flags properly so that we
2876 * don't need to probe.
2878 cp->cn_pri = CN_DEAD;
2880 for (unit = 0; unit < 16; unit++) { /* XXX need to know how many */
2883 if (resource_int_value("sio", unit, "disabled", &disabled) == 0) {
2887 if (resource_int_value("sio", unit, "flags", &flags))
2889 if (COM_CONSOLE(flags) || COM_DEBUGGER(flags)) {
2893 if (resource_int_value("sio", unit, "port", &port))
2897 if (boothowto & RB_SERIAL) {
2899 siocngetspeed(iobase, comdefaultrclk);
2901 comdefaultrate = boot_speed;
2905 * Initialize the divisor latch. We can't rely on
2906 * siocnopen() to do this the first time, since it
2907 * avoids writing to the latch if the latch appears
2908 * to have the correct value. Also, if we didn't
2909 * just read the speed from the hardware, then we
2910 * need to set the speed in hardware so that
2911 * switching it later is null.
2913 cfcr = inb(iobase + com_cfcr);
2914 outb(iobase + com_cfcr, CFCR_DLAB | cfcr);
2915 divisor = siodivisor(comdefaultrclk, comdefaultrate);
2916 outb(iobase + com_dlbl, divisor & 0xff);
2917 outb(iobase + com_dlbh, divisor >> 8);
2918 outb(iobase + com_cfcr, cfcr);
2920 siocnopen(&sp, iobase, comdefaultrate);
2923 if (COM_CONSOLE(flags) && !COM_LLCONSOLE(flags)) {
2924 cp->cn_probegood = 1;
2925 cp->cn_private = (void *)(intptr_t)unit;
2926 cp->cn_pri = COM_FORCECONSOLE(flags)
2927 || boothowto & RB_SERIAL
2928 ? CN_REMOTE : CN_NORMAL;
2929 siocniobase = iobase;
2932 if (COM_DEBUGGER(flags) && gdb_tab == NULL) {
2933 kprintf("sio%d: gdb debugging port\n", unit);
2934 siogdbiobase = iobase;
2937 cp->cn_gdbprivate = (void *)(intptr_t)unit;
2943 #if defined(__i386__) || defined(__x86_64__)
2946 * XXX Ugly Compatability.
2947 * If no gdb port has been specified, set it to be the console
2948 * as some configuration files don't specify the gdb port.
2950 if (gdb_tab == NULL && (boothowto & RB_GDB)) {
2951 kprintf("Warning: no GDB port specified. Defaulting to sio%d.\n",
2953 kprintf("Set flag 0x80 on desired GDB port in your\n");
2954 kprintf("configuration file (currently sio only).\n");
2955 siogdbiobase = siocniobase;
2956 siogdbunit = siocnunit;
2957 cp->cn_gdbprivate = (void *)(intptr_t)siocnunit;
2965 siocninit(struct consdev *cp)
2967 comconsole = (int)(intptr_t)cp->cn_private;
2971 siocninit_fini(struct consdev *cp)
2976 if (cp->cn_probegood) {
2977 unit = (int)(intptr_t)cp->cn_private;
2979 * Call devfs_find_device_by_name on ttydX to find the correct device,
2980 * as it should have been created already at this point by the
2982 * If it isn't found, the serial port was not attached at all and we
2983 * shouldn't be here, so assert this case.
2985 dev = devfs_find_device_by_name("ttyd%r", unit);
2987 KKASSERT(dev != NULL);
2993 siocncheckc(void *private)
2996 int unit = (int)(intptr_t)private;
2998 struct siocnstate sp;
3000 if (unit == siogdbunit)
3001 iobase = siogdbiobase;
3003 iobase = siocniobase;
3005 siocnopen(&sp, iobase, comdefaultrate);
3006 if (inb(iobase + com_lsr) & LSR_RXRDY)
3007 c = inb(iobase + com_data);
3010 siocnclose(&sp, iobase);
3017 siocngetc(void *private)
3020 int unit = (int)(intptr_t)private;
3022 struct siocnstate sp;
3024 if (unit == siogdbunit)
3025 iobase = siogdbiobase;
3027 iobase = siocniobase;
3029 siocnopen(&sp, iobase, comdefaultrate);
3030 while (!(inb(iobase + com_lsr) & LSR_RXRDY))
3032 c = inb(iobase + com_data);
3033 siocnclose(&sp, iobase);
3039 siocnputc(void *private, int c)
3041 int unit = (int)(intptr_t)private;
3042 struct siocnstate sp;
3045 if (unit == siogdbunit)
3046 iobase = siogdbiobase;
3048 iobase = siocniobase;
3050 siocnopen(&sp, iobase, comdefaultrate);
3051 siocntxwait(iobase);
3052 outb(iobase + com_data, c);
3053 siocnclose(&sp, iobase);
3057 DRIVER_MODULE(sio, isa, sio_isa_driver, sio_devclass, 0, 0);
3058 DRIVER_MODULE(sio, acpi, sio_isa_driver, sio_devclass, 0, 0);
3060 DRIVER_MODULE(sio, pci, sio_pci_driver, sio_devclass, 0, 0);
3063 DRIVER_MODULE(sio, puc, sio_puc_driver, sio_devclass, 0, 0);