2 * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
3 * VA Linux Systems Inc., Fremont, California.
4 * Copyright 2008 Red Hat Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
25 * Kevin E. Martin, Rickard E. Faith, Alan Hourihane
27 * Kernel port Author: Dave Airlie
29 * $FreeBSD: head/sys/dev/drm2/radeon/radeon_mode.h 254885 2013-08-25 19:37:15Z dumbbell $
35 #include <drm/drm_crtc.h>
36 #include <drm/drm_edid.h>
37 #include <drm/drm_dp_helper.h>
38 #include <drm/drm_fixed.h>
39 #include <drm/drm_crtc_helper.h>
44 #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base)
45 #define to_radeon_connector(x) container_of(x, struct radeon_connector, base)
46 #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base)
47 #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base)
49 enum radeon_rmx_type {
68 enum radeon_underscan_type {
81 RADEON_HPD_NONE = 0xff,
84 #define RADEON_MAX_I2C_BUS 16
86 /* radeon gpio-based i2c
87 * 1. "mask" reg and bits
88 * grabs the gpio pins for software use
93 * 3. "en" reg and bits
94 * sets the pin direction
100 struct radeon_i2c_bus_rec {
102 /* id used by atom */
104 /* id used by atom */
105 enum radeon_hpd_id hpd;
106 /* can be used with hw i2c engine */
108 /* uses multi-media i2c engine */
111 uint32_t mask_clk_reg;
112 uint32_t mask_data_reg;
116 uint32_t en_data_reg;
119 uint32_t mask_clk_mask;
120 uint32_t mask_data_mask;
122 uint32_t a_data_mask;
123 uint32_t en_clk_mask;
124 uint32_t en_data_mask;
126 uint32_t y_data_mask;
129 struct radeon_tmds_pll {
134 #define RADEON_MAX_BIOS_CONNECTOR 16
137 #define RADEON_PLL_USE_BIOS_DIVS (1 << 0)
138 #define RADEON_PLL_NO_ODD_POST_DIV (1 << 1)
139 #define RADEON_PLL_USE_REF_DIV (1 << 2)
140 #define RADEON_PLL_LEGACY (1 << 3)
141 #define RADEON_PLL_PREFER_LOW_REF_DIV (1 << 4)
142 #define RADEON_PLL_PREFER_HIGH_REF_DIV (1 << 5)
143 #define RADEON_PLL_PREFER_LOW_FB_DIV (1 << 6)
144 #define RADEON_PLL_PREFER_HIGH_FB_DIV (1 << 7)
145 #define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8)
146 #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9)
147 #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10)
148 #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11)
149 #define RADEON_PLL_USE_POST_DIV (1 << 12)
150 #define RADEON_PLL_IS_LCD (1 << 13)
151 #define RADEON_PLL_PREFER_MINM_OVER_MAXP (1 << 14)
154 /* reference frequency */
155 uint32_t reference_freq;
158 uint32_t reference_div;
161 /* pll in/out limits */
164 uint32_t pll_out_min;
165 uint32_t pll_out_max;
166 uint32_t lcd_pll_out_min;
167 uint32_t lcd_pll_out_max;
171 uint32_t min_ref_div;
172 uint32_t max_ref_div;
173 uint32_t min_post_div;
174 uint32_t max_post_div;
175 uint32_t min_feedback_div;
176 uint32_t max_feedback_div;
177 uint32_t min_frac_feedback_div;
178 uint32_t max_frac_feedback_div;
180 /* flags for the current clock */
187 struct radeon_i2c_chan {
190 struct drm_device *dev;
191 struct radeon_i2c_bus_rec rec;
195 /* mostly for macs, but really any system without connector tables */
196 enum radeon_connector_table {
200 CT_POWERBOOK_EXTERNAL,
201 CT_POWERBOOK_INTERNAL,
214 enum radeon_dvo_chip {
224 bool last_buffer_filled_status;
228 struct radeon_mode_info {
229 struct atom_context *atom_context;
230 struct card_info *atom_card_info;
231 enum radeon_connector_table connector_table;
232 bool mode_config_initialized;
233 struct radeon_crtc *crtcs[6];
234 struct radeon_afmt *afmt[6];
235 /* DVI-I properties */
236 struct drm_property *coherent_mode_property;
237 /* DAC enable load detect */
238 struct drm_property *load_detect_property;
240 struct drm_property *tv_std_property;
241 /* legacy TMDS PLL detect */
242 struct drm_property *tmds_pll_property;
244 struct drm_property *underscan_property;
245 struct drm_property *underscan_hborder_property;
246 struct drm_property *underscan_vborder_property;
247 /* hardcoded DFP edid from BIOS */
248 struct edid *bios_hardcoded_edid;
249 int bios_hardcoded_edid_size;
251 /* pointer to fbdev info structure */
252 struct radeon_fbdev *rfbdev;
255 /* pointer to backlight encoder */
256 struct radeon_encoder *bl_encoder;
259 #define RADEON_MAX_BL_LEVEL 0xFF
261 #if defined(CONFIG_BACKLIGHT_CLASS_DEVICE) || defined(CONFIG_BACKLIGHT_CLASS_DEVICE_MODULE)
263 struct radeon_backlight_privdata {
264 struct radeon_encoder *encoder;
270 #define MAX_H_CODE_TIMING_LEN 32
271 #define MAX_V_CODE_TIMING_LEN 32
273 /* need to store these as reading
274 back code tables is excessive */
275 struct radeon_tv_regs {
277 uint32_t timing_cntl;
281 uint16_t h_code_timing[MAX_H_CODE_TIMING_LEN];
282 uint16_t v_code_timing[MAX_V_CODE_TIMING_LEN];
285 struct radeon_atom_ss {
298 struct drm_crtc base;
300 u16 lut_r[256], lut_g[256], lut_b[256];
303 uint32_t crtc_offset;
304 struct drm_gem_object *cursor_bo;
305 uint64_t cursor_addr;
308 int max_cursor_width;
309 int max_cursor_height;
310 uint32_t legacy_display_base_addr;
311 uint32_t legacy_cursor_offset;
312 enum radeon_rmx_type rmx_type;
317 struct drm_display_mode native_mode;
320 struct radeon_unpin_work *unpin_work;
321 int deferred_flip_completion;
323 struct radeon_atom_ss ss;
327 u32 pll_reference_div;
330 struct drm_encoder *encoder;
331 struct drm_connector *connector;
336 struct drm_display_mode hw_mode;
339 struct radeon_encoder_primary_dac {
340 /* legacy primary dac */
341 uint32_t ps2_pdac_adj;
344 struct radeon_encoder_lvds {
346 uint16_t panel_vcc_delay;
347 uint8_t panel_pwr_delay;
348 uint8_t panel_digon_delay;
349 uint8_t panel_blon_delay;
350 uint16_t panel_ref_divider;
351 uint8_t panel_post_divider;
352 uint16_t panel_fb_divider;
353 bool use_bios_dividers;
354 uint32_t lvds_gen_cntl;
356 struct drm_display_mode native_mode;
357 struct backlight_device *bl_dev;
359 uint8_t backlight_level;
362 struct radeon_encoder_tv_dac {
364 uint32_t ps2_tvdac_adj;
365 uint32_t ntsc_tvdac_adj;
366 uint32_t pal_tvdac_adj;
371 int supported_tv_stds;
373 enum radeon_tv_std tv_std;
374 struct radeon_tv_regs tv;
377 struct radeon_encoder_int_tmds {
378 /* legacy int tmds */
379 struct radeon_tmds_pll tmds_pll[4];
382 struct radeon_encoder_ext_tmds {
384 struct radeon_i2c_chan *i2c_bus;
386 enum radeon_dvo_chip dvo_chip;
389 /* spread spectrum */
390 struct radeon_encoder_atom_dig {
394 int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB, etc. */
397 uint16_t panel_pwr_delay;
400 struct drm_display_mode native_mode;
401 struct backlight_device *bl_dev;
403 uint8_t backlight_level;
405 struct radeon_afmt *afmt;
408 struct radeon_encoder_atom_dac {
409 enum radeon_tv_std tv_std;
412 struct radeon_encoder {
413 struct drm_encoder base;
414 uint32_t encoder_enum;
417 uint32_t active_device;
419 uint32_t pixel_clock;
420 enum radeon_rmx_type rmx_type;
421 enum radeon_underscan_type underscan_type;
422 uint32_t underscan_hborder;
423 uint32_t underscan_vborder;
424 struct drm_display_mode native_mode;
426 int audio_polling_active;
431 struct radeon_connector_atom_dig {
432 uint32_t igp_lane_info;
434 struct radeon_i2c_chan *dp_i2c_bus;
435 u8 dpcd[DP_RECEIVER_CAP_SIZE];
442 struct radeon_gpio_rec {
450 enum radeon_hpd_id hpd;
452 struct radeon_gpio_rec gpio;
455 struct radeon_router {
457 struct radeon_i2c_bus_rec i2c_info;
462 u8 ddc_mux_control_pin;
467 u8 cd_mux_control_pin;
471 struct radeon_connector {
472 struct drm_connector base;
473 uint32_t connector_id;
475 struct radeon_i2c_chan *ddc_bus;
476 /* some systems have an hdmi and vga port with a shared ddc line */
479 /* we need to mind the EDID between detect
480 and get modes due to analog/digital/tvencoder */
483 bool dac_load_detect;
484 bool detected_by_load; /* if the connection status was determined by load */
485 uint16_t connector_object_id;
486 struct radeon_hpd hpd;
487 struct radeon_router router;
488 struct radeon_i2c_chan *router_bus;
491 struct radeon_framebuffer {
492 struct drm_framebuffer base;
493 struct drm_gem_object *obj;
496 #define ENCODER_MODE_IS_DP(em) (((em) == ATOM_ENCODER_MODE_DP) || \
497 ((em) == ATOM_ENCODER_MODE_DP_MST))
499 struct atom_clock_dividers {
505 u32 whole_fb_div : 12;
506 u32 frac_fb_div : 14;
508 u32 frac_fb_div : 14;
509 u32 whole_fb_div : 12;
516 bool enable_post_div;
525 struct atom_mpll_param {
549 #define MEM_TYPE_GDDR5 0x50
550 #define MEM_TYPE_GDDR4 0x40
551 #define MEM_TYPE_GDDR3 0x30
552 #define MEM_TYPE_DDR2 0x20
553 #define MEM_TYPE_GDDR1 0x10
554 #define MEM_TYPE_DDR3 0xb0
555 #define MEM_TYPE_MASK 0xf0
557 struct atom_memory_info {
562 #define MAX_AC_TIMING_ENTRIES 16
564 struct atom_memory_clock_range_table
568 u32 mclk[MAX_AC_TIMING_ENTRIES];
571 #define VBIOS_MC_REGISTER_ARRAY_SIZE 32
572 #define VBIOS_MAX_AC_TIMING_ENTRIES 20
574 struct atom_mc_reg_entry {
576 u32 mc_data[VBIOS_MC_REGISTER_ARRAY_SIZE];
579 struct atom_mc_register_address {
584 struct atom_mc_reg_table {
587 struct atom_mc_reg_entry mc_reg_table_entry[VBIOS_MAX_AC_TIMING_ENTRIES];
588 struct atom_mc_register_address mc_reg_address[VBIOS_MC_REGISTER_ARRAY_SIZE];
591 #define MAX_VOLTAGE_ENTRIES 32
593 struct atom_voltage_table_entry
599 struct atom_voltage_table
604 struct atom_voltage_table_entry entries[MAX_VOLTAGE_ENTRIES];
607 extern enum radeon_tv_std
608 radeon_combios_get_tv_info(struct radeon_device *rdev);
609 extern enum radeon_tv_std
610 radeon_atombios_get_tv_info(struct radeon_device *rdev);
611 extern void radeon_atombios_get_default_voltages(struct radeon_device *rdev,
612 u16 *vddc, u16 *vddci, u16 *mvdd);
614 extern struct drm_connector *
615 radeon_get_connector_for_encoder(struct drm_encoder *encoder);
616 extern struct drm_connector *
617 radeon_get_connector_for_encoder_init(struct drm_encoder *encoder);
618 extern bool radeon_dig_monitor_is_duallink(struct drm_encoder *encoder,
621 extern u16 radeon_encoder_get_dp_bridge_encoder_id(struct drm_encoder *encoder);
622 extern u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector);
623 extern bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector);
624 extern bool radeon_connector_is_dp12_capable(struct drm_connector *connector);
625 extern int radeon_get_monitor_bpc(struct drm_connector *connector);
627 extern void radeon_connector_hotplug(struct drm_connector *connector);
628 extern int radeon_dp_mode_valid_helper(struct drm_connector *connector,
629 struct drm_display_mode *mode);
630 extern void radeon_dp_set_link_config(struct drm_connector *connector,
631 const struct drm_display_mode *mode);
632 extern void radeon_dp_link_train(struct drm_encoder *encoder,
633 struct drm_connector *connector);
634 extern bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector);
635 extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector);
636 extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector);
637 extern int radeon_dp_get_panel_mode(struct drm_encoder *encoder,
638 struct drm_connector *connector);
639 extern void atombios_dig_encoder_setup(struct drm_encoder *encoder, int action, int panel_mode);
640 extern void radeon_atom_encoder_init(struct radeon_device *rdev);
641 extern void radeon_atom_disp_eng_pll_init(struct radeon_device *rdev);
642 extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder,
643 int action, uint8_t lane_num,
645 extern void radeon_atom_ext_encoder_setup_ddc(struct drm_encoder *encoder);
646 extern struct drm_encoder *radeon_get_external_encoder(struct drm_encoder *encoder);
647 extern int radeon_dp_i2c_aux_ch(device_t dev, int mode,
648 u8 write_byte, u8 *read_byte);
650 extern void radeon_i2c_init(struct radeon_device *rdev);
651 extern void radeon_i2c_fini(struct radeon_device *rdev);
652 extern void radeon_combios_i2c_init(struct radeon_device *rdev);
653 extern void radeon_atombios_i2c_init(struct radeon_device *rdev);
654 extern void radeon_i2c_add(struct radeon_device *rdev,
655 struct radeon_i2c_bus_rec *rec,
657 extern struct radeon_i2c_chan *radeon_i2c_lookup(struct radeon_device *rdev,
658 struct radeon_i2c_bus_rec *i2c_bus);
659 extern struct radeon_i2c_chan *radeon_i2c_create_dp(struct drm_device *dev,
660 struct radeon_i2c_bus_rec *rec,
662 extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
663 struct radeon_i2c_bus_rec *rec,
665 extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c);
666 extern void radeon_i2c_get_byte(struct radeon_i2c_chan *i2c_bus,
670 extern void radeon_i2c_put_byte(struct radeon_i2c_chan *i2c,
674 extern void radeon_router_select_ddc_port(struct radeon_connector *radeon_connector);
675 extern void radeon_router_select_cd_port(struct radeon_connector *radeon_connector);
676 extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector, bool use_aux);
677 extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector);
679 extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector);
681 extern bool radeon_atombios_get_ppll_ss_info(struct radeon_device *rdev,
682 struct radeon_atom_ss *ss,
684 extern bool radeon_atombios_get_asic_ss_info(struct radeon_device *rdev,
685 struct radeon_atom_ss *ss,
688 extern void radeon_compute_pll_legacy(struct radeon_pll *pll,
690 uint32_t *dot_clock_p,
692 uint32_t *frac_fb_div_p,
694 uint32_t *post_div_p);
696 extern void radeon_compute_pll_avivo(struct radeon_pll *pll,
704 extern void radeon_setup_encoder_clones(struct drm_device *dev);
706 struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index);
707 struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv);
708 struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv);
709 struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index);
710 struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index);
711 extern void atombios_dvo_setup(struct drm_encoder *encoder, int action);
712 extern void atombios_digital_setup(struct drm_encoder *encoder, int action);
713 extern int atombios_get_encoder_mode(struct drm_encoder *encoder);
714 extern bool atombios_set_edp_panel_power(struct drm_connector *connector, int action);
715 extern void radeon_encoder_set_active_device(struct drm_encoder *encoder);
717 extern void radeon_crtc_load_lut(struct drm_crtc *crtc);
718 extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
719 struct drm_framebuffer *old_fb);
720 extern int atombios_crtc_set_base_atomic(struct drm_crtc *crtc,
721 struct drm_framebuffer *fb,
723 enum mode_set_atomic state);
724 extern int atombios_crtc_mode_set(struct drm_crtc *crtc,
725 struct drm_display_mode *mode,
726 struct drm_display_mode *adjusted_mode,
728 struct drm_framebuffer *old_fb);
729 extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode);
731 extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
732 struct drm_framebuffer *old_fb);
733 extern int radeon_crtc_set_base_atomic(struct drm_crtc *crtc,
734 struct drm_framebuffer *fb,
736 enum mode_set_atomic state);
737 extern int radeon_crtc_do_set_base(struct drm_crtc *crtc,
738 struct drm_framebuffer *fb,
739 int x, int y, int atomic);
740 extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
741 struct drm_file *file_priv,
745 extern int radeon_crtc_cursor_move(struct drm_crtc *crtc,
748 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
749 int *vpos, int *hpos);
751 extern bool radeon_combios_check_hardcoded_edid(struct radeon_device *rdev);
753 radeon_bios_get_hardcoded_edid(struct radeon_device *rdev);
754 extern bool radeon_atom_get_clock_info(struct drm_device *dev);
755 extern bool radeon_combios_get_clock_info(struct drm_device *dev);
756 extern struct radeon_encoder_atom_dig *
757 radeon_atombios_get_lvds_info(struct radeon_encoder *encoder);
758 extern bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
759 struct radeon_encoder_int_tmds *tmds);
760 extern bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder,
761 struct radeon_encoder_int_tmds *tmds);
762 extern bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder,
763 struct radeon_encoder_int_tmds *tmds);
764 extern bool radeon_legacy_get_ext_tmds_info_from_combios(struct radeon_encoder *encoder,
765 struct radeon_encoder_ext_tmds *tmds);
766 extern bool radeon_legacy_get_ext_tmds_info_from_table(struct radeon_encoder *encoder,
767 struct radeon_encoder_ext_tmds *tmds);
768 extern struct radeon_encoder_primary_dac *
769 radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder);
770 extern struct radeon_encoder_tv_dac *
771 radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder);
772 extern struct radeon_encoder_lvds *
773 radeon_combios_get_lvds_info(struct radeon_encoder *encoder);
774 extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder);
775 extern struct radeon_encoder_tv_dac *
776 radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder);
777 extern struct radeon_encoder_primary_dac *
778 radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder);
779 extern bool radeon_combios_external_tmds_setup(struct drm_encoder *encoder);
780 extern void radeon_external_tmds_setup(struct drm_encoder *encoder);
781 extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock);
782 extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev);
783 extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock);
784 extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev);
785 extern void radeon_save_bios_scratch_regs(struct radeon_device *rdev);
786 extern void radeon_restore_bios_scratch_regs(struct radeon_device *rdev);
788 radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
790 radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
792 radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
794 radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
795 extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
796 u16 blue, int regno);
797 extern void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
798 u16 *blue, int regno);
799 int radeon_framebuffer_init(struct drm_device *dev,
800 struct radeon_framebuffer *rfb,
801 struct drm_mode_fb_cmd2 *mode_cmd,
802 struct drm_gem_object *obj);
804 int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb);
805 bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev);
806 bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev);
807 void radeon_atombios_init_crtc(struct drm_device *dev,
808 struct radeon_crtc *radeon_crtc);
809 void radeon_legacy_init_crtc(struct drm_device *dev,
810 struct radeon_crtc *radeon_crtc);
812 void radeon_get_clock_info(struct drm_device *dev);
814 extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev);
815 extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev);
817 void radeon_enc_destroy(struct drm_encoder *encoder);
818 void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj);
819 void radeon_combios_asic_init(struct drm_device *dev);
820 bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
821 const struct drm_display_mode *mode,
822 struct drm_display_mode *adjusted_mode);
823 void radeon_panel_mode_fixup(struct drm_encoder *encoder,
824 struct drm_display_mode *adjusted_mode);
825 void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc);
828 void radeon_legacy_tv_adjust_crtc_reg(struct drm_encoder *encoder,
829 uint32_t *h_total_disp, uint32_t *h_sync_strt_wid,
830 uint32_t *v_total_disp, uint32_t *v_sync_strt_wid);
831 void radeon_legacy_tv_adjust_pll1(struct drm_encoder *encoder,
832 uint32_t *htotal_cntl, uint32_t *ppll_ref_div,
833 uint32_t *ppll_div_3, uint32_t *pixclks_cntl);
834 void radeon_legacy_tv_adjust_pll2(struct drm_encoder *encoder,
835 uint32_t *htotal2_cntl, uint32_t *p2pll_ref_div,
836 uint32_t *p2pll_div_0, uint32_t *pixclks_cntl);
837 void radeon_legacy_tv_mode_set(struct drm_encoder *encoder,
838 struct drm_display_mode *mode,
839 struct drm_display_mode *adjusted_mode);
842 int radeon_fbdev_init(struct radeon_device *rdev);
843 void radeon_fbdev_fini(struct radeon_device *rdev);
844 void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state);
845 int radeon_fbdev_total_size(struct radeon_device *rdev);
846 bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj);
848 void radeon_fb_output_poll_changed(struct radeon_device *rdev);
850 void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id);
852 int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled);