sys/dev/netif/em/if_em.c

   1 /*
   2  * Copyright (c) 2004 Joerg Sonnenberger <joerg@bec.de>.  All rights reserved.
   3  *
   4  * Copyright (c) 2001-2008, Intel Corporation
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions are met:
   9  *
  10  *  1. Redistributions of source code must retain the above copyright notice,
  11  *     this list of conditions and the following disclaimer.
  12  *
  13  *  2. Redistributions in binary form must reproduce the above copyright
  14  *     notice, this list of conditions and the following disclaimer in the
  15  *     documentation and/or other materials provided with the distribution.
  16  *
  17  *  3. Neither the name of the Intel Corporation nor the names of its
  18  *     contributors may be used to endorse or promote products derived from
  19  *     this software without specific prior written permission.
  20  *
  21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  22  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  24  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  25  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  31  * POSSIBILITY OF SUCH DAMAGE.
  32  *
  33  *
  34  * Copyright (c) 2005 The DragonFly Project.  All rights reserved.
  35  *
  36  * This code is derived from software contributed to The DragonFly Project
  37  * by Matthew Dillon <dillon@backplane.com>
  38  *
  39  * Redistribution and use in source and binary forms, with or without
  40  * modification, are permitted provided that the following conditions
  41  * are met:
  42  *
  43  * 1. Redistributions of source code must retain the above copyright
  44  *    notice, this list of conditions and the following disclaimer.
  45  * 2. Redistributions in binary form must reproduce the above copyright
  46  *    notice, this list of conditions and the following disclaimer in
  47  *    the documentation and/or other materials provided with the
  48  *    distribution.
  49  * 3. Neither the name of The DragonFly Project nor the names of its
  50  *    contributors may be used to endorse or promote products derived
  51  *    from this software without specific, prior written permission.
  52  *
  53  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  54  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  55  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  56  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
  57  * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  58  * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
  59  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  60  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  61  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  62  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  63  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  64  * SUCH DAMAGE.
  65  *
  66  */
  67 /*
  68  * SERIALIZATION API RULES:
  69  *
  70  * - We must call lwkt_serialize_handler_enable() prior to enabling the
  71  *   hardware interrupt and lwkt_serialize_handler_disable() after disabling
  72  *   the hardware interrupt in order to avoid handler execution races from
  73  *   scheduled interrupt threads.
  74  */
  75
  76 #include "opt_ifpoll.h"
  77
  78 #include <sys/param.h>
  79 #include <sys/bus.h>
  80 #include <sys/endian.h>
  81 #include <sys/interrupt.h>
  82 #include <sys/kernel.h>
  83 #include <sys/ktr.h>
  84 #include <sys/malloc.h>
  85 #include <sys/mbuf.h>
  86 #include <sys/proc.h>
  87 #include <sys/rman.h>
  88 #include <sys/serialize.h>
  89 #include <sys/socket.h>
  90 #include <sys/sockio.h>
  91 #include <sys/sysctl.h>
  92 #include <sys/systm.h>
  93
  94 #include <net/bpf.h>
  95 #include <net/ethernet.h>
  96 #include <net/if.h>
  97 #include <net/if_arp.h>
  98 #include <net/if_dl.h>
  99 #include <net/if_media.h>
 100 #include <net/if_poll.h>
 101 #include <net/ifq_var.h>
 102 #include <net/vlan/if_vlan_var.h>
 103 #include <net/vlan/if_vlan_ether.h>
 104
 105 #include <netinet/ip.h>
 106 #include <netinet/tcp.h>
 107 #include <netinet/udp.h>
 108
 109 #include <bus/pci/pcivar.h>
 110 #include <bus/pci/pcireg.h>
 111
 112 #include <dev/netif/ig_hal/e1000_api.h>
 113 #include <dev/netif/ig_hal/e1000_82571.h>
 114 #include <dev/netif/em/if_em.h>
 115
 116 #define DEBUG_HW 0
 117
 118 #define EM_NAME "Intel(R) PRO/1000 Network Connection "
 119 #define EM_VER  " 7.3.4"
 120
 121 #define _EM_DEVICE(id, ret)     \
 122         { EM_VENDOR_ID, E1000_DEV_ID_##id, ret, EM_NAME #id EM_VER }
 123 #define EM_EMX_DEVICE(id)       _EM_DEVICE(id, -100)
 124 #define EM_DEVICE(id)           _EM_DEVICE(id, 0)
 125 #define EM_DEVICE_NULL  { 0, 0, 0, NULL }
 126
 127 static const struct em_vendor_info em_vendor_info_array[] = {
 128         EM_DEVICE(82540EM),
 129         EM_DEVICE(82540EM_LOM),
 130         EM_DEVICE(82540EP),
 131         EM_DEVICE(82540EP_LOM),
 132         EM_DEVICE(82540EP_LP),
 133
 134         EM_DEVICE(82541EI),
 135         EM_DEVICE(82541ER),
 136         EM_DEVICE(82541ER_LOM),
 137         EM_DEVICE(82541EI_MOBILE),
 138         EM_DEVICE(82541GI),
 139         EM_DEVICE(82541GI_LF),
 140         EM_DEVICE(82541GI_MOBILE),
 141
 142         EM_DEVICE(82542),
 143
 144         EM_DEVICE(82543GC_FIBER),
 145         EM_DEVICE(82543GC_COPPER),
 146
 147         EM_DEVICE(82544EI_COPPER),
 148         EM_DEVICE(82544EI_FIBER),
 149         EM_DEVICE(82544GC_COPPER),
 150         EM_DEVICE(82544GC_LOM),
 151
 152         EM_DEVICE(82545EM_COPPER),
 153         EM_DEVICE(82545EM_FIBER),
 154         EM_DEVICE(82545GM_COPPER),
 155         EM_DEVICE(82545GM_FIBER),
 156         EM_DEVICE(82545GM_SERDES),
 157
 158         EM_DEVICE(82546EB_COPPER),
 159         EM_DEVICE(82546EB_FIBER),
 160         EM_DEVICE(82546EB_QUAD_COPPER),
 161         EM_DEVICE(82546GB_COPPER),
 162         EM_DEVICE(82546GB_FIBER),
 163         EM_DEVICE(82546GB_SERDES),
 164         EM_DEVICE(82546GB_PCIE),
 165         EM_DEVICE(82546GB_QUAD_COPPER),
 166         EM_DEVICE(82546GB_QUAD_COPPER_KSP3),
 167
 168         EM_DEVICE(82547EI),
 169         EM_DEVICE(82547EI_MOBILE),
 170         EM_DEVICE(82547GI),
 171
 172         EM_EMX_DEVICE(82571EB_COPPER),
 173         EM_EMX_DEVICE(82571EB_FIBER),
 174         EM_EMX_DEVICE(82571EB_SERDES),
 175         EM_EMX_DEVICE(82571EB_SERDES_DUAL),
 176         EM_EMX_DEVICE(82571EB_SERDES_QUAD),
 177         EM_EMX_DEVICE(82571EB_QUAD_COPPER),
 178         EM_EMX_DEVICE(82571EB_QUAD_COPPER_BP),
 179         EM_EMX_DEVICE(82571EB_QUAD_COPPER_LP),
 180         EM_EMX_DEVICE(82571EB_QUAD_FIBER),
 181         EM_EMX_DEVICE(82571PT_QUAD_COPPER),
 182
 183         EM_EMX_DEVICE(82572EI_COPPER),
 184         EM_EMX_DEVICE(82572EI_FIBER),
 185         EM_EMX_DEVICE(82572EI_SERDES),
 186         EM_EMX_DEVICE(82572EI),
 187
 188         EM_EMX_DEVICE(82573E),
 189         EM_EMX_DEVICE(82573E_IAMT),
 190         EM_EMX_DEVICE(82573L),
 191
 192         EM_DEVICE(82583V),
 193
 194         EM_EMX_DEVICE(80003ES2LAN_COPPER_SPT),
 195         EM_EMX_DEVICE(80003ES2LAN_SERDES_SPT),
 196         EM_EMX_DEVICE(80003ES2LAN_COPPER_DPT),
 197         EM_EMX_DEVICE(80003ES2LAN_SERDES_DPT),
 198
 199         EM_DEVICE(ICH8_IGP_M_AMT),
 200         EM_DEVICE(ICH8_IGP_AMT),
 201         EM_DEVICE(ICH8_IGP_C),
 202         EM_DEVICE(ICH8_IFE),
 203         EM_DEVICE(ICH8_IFE_GT),
 204         EM_DEVICE(ICH8_IFE_G),
 205         EM_DEVICE(ICH8_IGP_M),
 206         EM_DEVICE(ICH8_82567V_3),
 207
 208         EM_DEVICE(ICH9_IGP_M_AMT),
 209         EM_DEVICE(ICH9_IGP_AMT),
 210         EM_DEVICE(ICH9_IGP_C),
 211         EM_DEVICE(ICH9_IGP_M),
 212         EM_DEVICE(ICH9_IGP_M_V),
 213         EM_DEVICE(ICH9_IFE),
 214         EM_DEVICE(ICH9_IFE_GT),
 215         EM_DEVICE(ICH9_IFE_G),
 216         EM_DEVICE(ICH9_BM),
 217
 218         EM_EMX_DEVICE(82574L),
 219         EM_EMX_DEVICE(82574LA),
 220
 221         EM_DEVICE(ICH10_R_BM_LM),
 222         EM_DEVICE(ICH10_R_BM_LF),
 223         EM_DEVICE(ICH10_R_BM_V),
 224         EM_DEVICE(ICH10_D_BM_LM),
 225         EM_DEVICE(ICH10_D_BM_LF),
 226         EM_DEVICE(ICH10_D_BM_V),
 227
 228         EM_DEVICE(PCH_M_HV_LM),
 229         EM_DEVICE(PCH_M_HV_LC),
 230         EM_DEVICE(PCH_D_HV_DM),
 231         EM_DEVICE(PCH_D_HV_DC),
 232
 233         EM_DEVICE(PCH2_LV_LM),
 234         EM_DEVICE(PCH2_LV_V),
 235
 236         /* required last entry */
 237         EM_DEVICE_NULL
 238 };
 239
 240 static int      em_probe(device_t);
 241 static int      em_attach(device_t);
 242 static int      em_detach(device_t);
 243 static int      em_shutdown(device_t);
 244 static int      em_suspend(device_t);
 245 static int      em_resume(device_t);
 246
 247 static void     em_init(void *);
 248 static void     em_stop(struct adapter *);
 249 static int      em_ioctl(struct ifnet *, u_long, caddr_t, struct ucred *);
 250 static void     em_start(struct ifnet *, struct ifaltq_subque *);
 251 #ifdef IFPOLL_ENABLE
 252 static void     em_npoll(struct ifnet *, struct ifpoll_info *);
 253 static void     em_npoll_compat(struct ifnet *, void *, int);
 254 #endif
 255 static void     em_watchdog(struct ifnet *);
 256 static void     em_media_status(struct ifnet *, struct ifmediareq *);
 257 static int      em_media_change(struct ifnet *);
 258 static void     em_timer(void *);
 259
 260 static void     em_intr(void *);
 261 static void     em_intr_mask(void *);
 262 static void     em_intr_body(struct adapter *, boolean_t);
 263 static void     em_rxeof(struct adapter *, int);
 264 static void     em_txeof(struct adapter *);
 265 static void     em_tx_collect(struct adapter *);
 266 static void     em_tx_purge(struct adapter *);
 267 static void     em_enable_intr(struct adapter *);
 268 static void     em_disable_intr(struct adapter *);
 269
 270 static int      em_dma_malloc(struct adapter *, bus_size_t,
 271                     struct em_dma_alloc *);
 272 static void     em_dma_free(struct adapter *, struct em_dma_alloc *);
 273 static void     em_init_tx_ring(struct adapter *);
 274 static int      em_init_rx_ring(struct adapter *);
 275 static int      em_create_tx_ring(struct adapter *);
 276 static int      em_create_rx_ring(struct adapter *);
 277 static void     em_destroy_tx_ring(struct adapter *, int);
 278 static void     em_destroy_rx_ring(struct adapter *, int);
 279 static int      em_newbuf(struct adapter *, int, int);
 280 static int      em_encap(struct adapter *, struct mbuf **, int *, int *);
 281 static void     em_rxcsum(struct adapter *, struct e1000_rx_desc *,
 282                     struct mbuf *);
 283 static int      em_txcsum(struct adapter *, struct mbuf *,
 284                     uint32_t *, uint32_t *);
 285 static int      em_tso_pullup(struct adapter *, struct mbuf **);
 286 static int      em_tso_setup(struct adapter *, struct mbuf *,
 287                     uint32_t *, uint32_t *);
 288
 289 static int      em_get_hw_info(struct adapter *);
 290 static int      em_is_valid_eaddr(const uint8_t *);
 291 static int      em_alloc_pci_res(struct adapter *);
 292 static void     em_free_pci_res(struct adapter *);
 293 static int      em_reset(struct adapter *);
 294 static void     em_setup_ifp(struct adapter *);
 295 static void     em_init_tx_unit(struct adapter *);
 296 static void     em_init_rx_unit(struct adapter *);
 297 static void     em_update_stats(struct adapter *);
 298 static void     em_set_promisc(struct adapter *);
 299 static void     em_disable_promisc(struct adapter *);
 300 static void     em_set_multi(struct adapter *);
 301 static void     em_update_link_status(struct adapter *);
 302 static void     em_smartspeed(struct adapter *);
 303 static void     em_set_itr(struct adapter *, uint32_t);
 304 static void     em_disable_aspm(struct adapter *);
 305
 306 /* Hardware workarounds */
 307 static int      em_82547_fifo_workaround(struct adapter *, int);
 308 static void     em_82547_update_fifo_head(struct adapter *, int);
 309 static int      em_82547_tx_fifo_reset(struct adapter *);
 310 static void     em_82547_move_tail(void *);
 311 static void     em_82547_move_tail_serialized(struct adapter *);
 312 static uint32_t em_82544_fill_desc(bus_addr_t, uint32_t, PDESC_ARRAY);
 313
 314 static void     em_print_debug_info(struct adapter *);
 315 static void     em_print_nvm_info(struct adapter *);
 316 static void     em_print_hw_stats(struct adapter *);
 317
 318 static int      em_sysctl_stats(SYSCTL_HANDLER_ARGS);
 319 static int      em_sysctl_debug_info(SYSCTL_HANDLER_ARGS);
 320 static int      em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS);
 321 static int      em_sysctl_int_tx_nsegs(SYSCTL_HANDLER_ARGS);
 322 static void     em_add_sysctl(struct adapter *adapter);
 323
 324 /* Management and WOL Support */
 325 static void     em_get_mgmt(struct adapter *);
 326 static void     em_rel_mgmt(struct adapter *);
 327 static void     em_get_hw_control(struct adapter *);
 328 static void     em_rel_hw_control(struct adapter *);
 329 static void     em_enable_wol(device_t);
 330
 331 static device_method_t em_methods[] = {
 332         /* Device interface */
 333         DEVMETHOD(device_probe,         em_probe),
 334         DEVMETHOD(device_attach,        em_attach),
 335         DEVMETHOD(device_detach,        em_detach),
 336         DEVMETHOD(device_shutdown,      em_shutdown),
 337         DEVMETHOD(device_suspend,       em_suspend),
 338         DEVMETHOD(device_resume,        em_resume),
 339         DEVMETHOD_END
 340 };
 341
 342 static driver_t em_driver = {
 343         "em",
 344         em_methods,
 345         sizeof(struct adapter),
 346 };
 347
 348 static devclass_t em_devclass;
 349
 350 DECLARE_DUMMY_MODULE(if_em);
 351 MODULE_DEPEND(em, ig_hal, 1, 1, 1);
 352 DRIVER_MODULE(if_em, pci, em_driver, em_devclass, NULL, NULL);
 353
 354 /*
 355  * Tunables
 356  */
 357 static int      em_int_throttle_ceil = EM_DEFAULT_ITR;
 358 static int      em_rxd = EM_DEFAULT_RXD;
 359 static int      em_txd = EM_DEFAULT_TXD;
 360 static int      em_smart_pwr_down = 0;
 361
 362 /* Controls whether promiscuous also shows bad packets */
 363 static int      em_debug_sbp = FALSE;
 364
 365 static int      em_82573_workaround = 1;
 366 static int      em_msi_enable = 1;
 367
 368 TUNABLE_INT("hw.em.int_throttle_ceil", &em_int_throttle_ceil);
 369 TUNABLE_INT("hw.em.rxd", &em_rxd);
 370 TUNABLE_INT("hw.em.txd", &em_txd);
 371 TUNABLE_INT("hw.em.smart_pwr_down", &em_smart_pwr_down);
 372 TUNABLE_INT("hw.em.sbp", &em_debug_sbp);
 373 TUNABLE_INT("hw.em.82573_workaround", &em_82573_workaround);
 374 TUNABLE_INT("hw.em.msi.enable", &em_msi_enable);
 375
 376 /* Global used in WOL setup with multiport cards */
 377 static int      em_global_quad_port_a = 0;
 378
 379 /* Set this to one to display debug statistics */
 380 static int      em_display_debug_stats = 0;
 381
 382 #if !defined(KTR_IF_EM)
 383 #define KTR_IF_EM       KTR_ALL
 384 #endif
 385 KTR_INFO_MASTER(if_em);
 386 KTR_INFO(KTR_IF_EM, if_em, intr_beg, 0, "intr begin");
 387 KTR_INFO(KTR_IF_EM, if_em, intr_end, 1, "intr end");
 388 KTR_INFO(KTR_IF_EM, if_em, pkt_receive, 4, "rx packet");
 389 KTR_INFO(KTR_IF_EM, if_em, pkt_txqueue, 5, "tx packet");
 390 KTR_INFO(KTR_IF_EM, if_em, pkt_txclean, 6, "tx clean");
 391 #define logif(name)     KTR_LOG(if_em_ ## name)
 392
 393 static int
 394 em_probe(device_t dev)
 395 {
 396         const struct em_vendor_info *ent;
 397         uint16_t vid, did;
 398
 399         vid = pci_get_vendor(dev);
 400         did = pci_get_device(dev);
 401
 402         for (ent = em_vendor_info_array; ent->desc != NULL; ++ent) {
 403                 if (vid == ent->vendor_id && did == ent->device_id) {
 404                         device_set_desc(dev, ent->desc);
 405                         device_set_async_attach(dev, TRUE);
 406                         return (ent->ret);
 407                 }
 408         }
 409         return (ENXIO);
 410 }
 411
 412 static int
 413 em_attach(device_t dev)
 414 {
 415         struct adapter *adapter = device_get_softc(dev);
 416         struct ifnet *ifp = &adapter->arpcom.ac_if;
 417         int tsize, rsize;
 418         int error = 0;
 419         uint16_t eeprom_data, device_id, apme_mask;
 420         driver_intr_t *intr_func;
 421
 422         adapter->dev = adapter->osdep.dev = dev;
 423
 424         callout_init_mp(&adapter->timer);
 425         callout_init_mp(&adapter->tx_fifo_timer);
 426
 427         /* Determine hardware and mac info */
 428         error = em_get_hw_info(adapter);
 429         if (error) {
 430                 device_printf(dev, "Identify hardware failed\n");
 431                 goto fail;
 432         }
 433
 434         /* Setup PCI resources */
 435         error = em_alloc_pci_res(adapter);
 436         if (error) {
 437                 device_printf(dev, "Allocation of PCI resources failed\n");
 438                 goto fail;
 439         }
 440
 441         /*
 442          * For ICH8 and family we need to map the flash memory,
 443          * and this must happen after the MAC is identified.
 444          */
 445         if (adapter->hw.mac.type == e1000_ich8lan ||
 446             adapter->hw.mac.type == e1000_ich9lan ||
 447             adapter->hw.mac.type == e1000_ich10lan ||
 448             adapter->hw.mac.type == e1000_pchlan ||
 449             adapter->hw.mac.type == e1000_pch2lan) {
 450                 adapter->flash_rid = EM_BAR_FLASH;
 451
 452                 adapter->flash = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
 453                                         &adapter->flash_rid, RF_ACTIVE);
 454                 if (adapter->flash == NULL) {
 455                         device_printf(dev, "Mapping of Flash failed\n");
 456                         error = ENXIO;
 457                         goto fail;
 458                 }
 459                 adapter->osdep.flash_bus_space_tag =
 460                     rman_get_bustag(adapter->flash);
 461                 adapter->osdep.flash_bus_space_handle =
 462                     rman_get_bushandle(adapter->flash);
 463
 464                 /*
 465                  * This is used in the shared code
 466                  * XXX this goof is actually not used.
 467                  */
 468                 adapter->hw.flash_address = (uint8_t *)adapter->flash;
 469         }
 470
 471         switch (adapter->hw.mac.type) {
 472         case e1000_82571:
 473         case e1000_82572:
 474                 /*
 475                  * Pullup extra 4bytes into the first data segment, see:
 476                  * 82571/82572 specification update errata #7
 477                  *
 478                  * NOTE:
 479                  * 4bytes instead of 2bytes, which are mentioned in the
 480                  * errata, are pulled; mainly to keep rest of the data
 481                  * properly aligned.
 482                  */
 483                 adapter->flags |= EM_FLAG_TSO_PULLEX;
 484                 /* FALL THROUGH */
 485
 486         case e1000_82573:
 487         case e1000_82574:
 488         case e1000_80003es2lan:
 489                 adapter->flags |= EM_FLAG_TSO;
 490                 break;
 491
 492         default:
 493                 break;
 494         }
 495
 496         /* Do Shared Code initialization */
 497         if (e1000_setup_init_funcs(&adapter->hw, TRUE)) {
 498                 device_printf(dev, "Setup of Shared code failed\n");
 499                 error = ENXIO;
 500                 goto fail;
 501         }
 502
 503         e1000_get_bus_info(&adapter->hw);
 504
 505         /*
 506          * Validate number of transmit and receive descriptors.  It
 507          * must not exceed hardware maximum, and must be multiple
 508          * of E1000_DBA_ALIGN.
 509          */
 510         if ((em_txd * sizeof(struct e1000_tx_desc)) % EM_DBA_ALIGN != 0 ||
 511             (adapter->hw.mac.type >= e1000_82544 && em_txd > EM_MAX_TXD) ||
 512             (adapter->hw.mac.type < e1000_82544 && em_txd > EM_MAX_TXD_82543) ||
 513             em_txd < EM_MIN_TXD) {
 514                 device_printf(dev, "Using %d TX descriptors instead of %d!\n",
 515                     EM_DEFAULT_TXD, em_txd);
 516                 adapter->num_tx_desc = EM_DEFAULT_TXD;
 517         } else {
 518                 adapter->num_tx_desc = em_txd;
 519         }
 520         if ((em_rxd * sizeof(struct e1000_rx_desc)) % EM_DBA_ALIGN != 0 ||
 521             (adapter->hw.mac.type >= e1000_82544 && em_rxd > EM_MAX_RXD) ||
 522             (adapter->hw.mac.type < e1000_82544 && em_rxd > EM_MAX_RXD_82543) ||
 523             em_rxd < EM_MIN_RXD) {
 524                 device_printf(dev, "Using %d RX descriptors instead of %d!\n",
 525                     EM_DEFAULT_RXD, em_rxd);
 526                 adapter->num_rx_desc = EM_DEFAULT_RXD;
 527         } else {
 528                 adapter->num_rx_desc = em_rxd;
 529         }
 530
 531         adapter->hw.mac.autoneg = DO_AUTO_NEG;
 532         adapter->hw.phy.autoneg_wait_to_complete = FALSE;
 533         adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
 534         adapter->rx_buffer_len = MCLBYTES;
 535
 536         /*
 537          * Interrupt throttle rate
 538          */
 539         if (em_int_throttle_ceil == 0) {
 540                 adapter->int_throttle_ceil = 0;
 541         } else {
 542                 int throttle = em_int_throttle_ceil;
 543
 544                 if (throttle < 0)
 545                         throttle = EM_DEFAULT_ITR;
 546
 547                 /* Recalculate the tunable value to get the exact frequency. */
 548                 throttle = 1000000000 / 256 / throttle;
 549
 550                 /* Upper 16bits of ITR is reserved and should be zero */
 551                 if (throttle & 0xffff0000)
 552                         throttle = 1000000000 / 256 / EM_DEFAULT_ITR;
 553
 554                 adapter->int_throttle_ceil = 1000000000 / 256 / throttle;
 555         }
 556
 557         e1000_init_script_state_82541(&adapter->hw, TRUE);
 558         e1000_set_tbi_compatibility_82543(&adapter->hw, TRUE);
 559
 560         /* Copper options */
 561         if (adapter->hw.phy.media_type == e1000_media_type_copper) {
 562                 adapter->hw.phy.mdix = AUTO_ALL_MODES;
 563                 adapter->hw.phy.disable_polarity_correction = FALSE;
 564                 adapter->hw.phy.ms_type = EM_MASTER_SLAVE;
 565         }
 566
 567         /* Set the frame limits assuming standard ethernet sized frames. */
 568         adapter->max_frame_size = ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN;
 569         adapter->min_frame_size = ETH_ZLEN + ETHER_CRC_LEN;
 570
 571         /* This controls when hardware reports transmit completion status. */
 572         adapter->hw.mac.report_tx_early = 1;
 573
 574         /*
 575          * Create top level busdma tag
 576          */
 577         error = bus_dma_tag_create(NULL, 1, 0,
 578                         BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
 579                         NULL, NULL,
 580                         BUS_SPACE_MAXSIZE_32BIT, 0, BUS_SPACE_MAXSIZE_32BIT,
 581                         0, &adapter->parent_dtag);
 582         if (error) {
 583                 device_printf(dev, "could not create top level DMA tag\n");
 584                 goto fail;
 585         }
 586
 587         /*
 588          * Allocate Transmit Descriptor ring
 589          */
 590         tsize = roundup2(adapter->num_tx_desc * sizeof(struct e1000_tx_desc),
 591                          EM_DBA_ALIGN);
 592         error = em_dma_malloc(adapter, tsize, &adapter->txdma);
 593         if (error) {
 594                 device_printf(dev, "Unable to allocate tx_desc memory\n");
 595                 goto fail;
 596         }
 597         adapter->tx_desc_base = adapter->txdma.dma_vaddr;
 598
 599         /*
 600          * Allocate Receive Descriptor ring
 601          */
 602         rsize = roundup2(adapter->num_rx_desc * sizeof(struct e1000_rx_desc),
 603                          EM_DBA_ALIGN);
 604         error = em_dma_malloc(adapter, rsize, &adapter->rxdma);
 605         if (error) {
 606                 device_printf(dev, "Unable to allocate rx_desc memory\n");
 607                 goto fail;
 608         }
 609         adapter->rx_desc_base = adapter->rxdma.dma_vaddr;
 610
 611         /* Allocate multicast array memory. */
 612         adapter->mta = kmalloc(ETH_ADDR_LEN * MAX_NUM_MULTICAST_ADDRESSES,
 613             M_DEVBUF, M_WAITOK);
 614
 615         /* Indicate SOL/IDER usage */
 616         if (e1000_check_reset_block(&adapter->hw)) {
 617                 device_printf(dev,
 618                     "PHY reset is blocked due to SOL/IDER session.\n");
 619         }
 620
 621         /*
 622          * Start from a known state, this is important in reading the
 623          * nvm and mac from that.
 624          */
 625         e1000_reset_hw(&adapter->hw);
 626
 627         /* Make sure we have a good EEPROM before we read from it */
 628         if (e1000_validate_nvm_checksum(&adapter->hw) < 0) {
 629                 /*
 630                  * Some PCI-E parts fail the first check due to
 631                  * the link being in sleep state, call it again,
 632                  * if it fails a second time its a real issue.
 633                  */
 634                 if (e1000_validate_nvm_checksum(&adapter->hw) < 0) {
 635                         device_printf(dev,
 636                             "The EEPROM Checksum Is Not Valid\n");
 637                         error = EIO;
 638                         goto fail;
 639                 }
 640         }
 641
 642         /* Copy the permanent MAC address out of the EEPROM */
 643         if (e1000_read_mac_addr(&adapter->hw) < 0) {
 644                 device_printf(dev, "EEPROM read error while reading MAC"
 645                     " address\n");
 646                 error = EIO;
 647                 goto fail;
 648         }
 649         if (!em_is_valid_eaddr(adapter->hw.mac.addr)) {
 650                 device_printf(dev, "Invalid MAC address\n");
 651                 error = EIO;
 652                 goto fail;
 653         }
 654
 655         /* Allocate transmit descriptors and buffers */
 656         error = em_create_tx_ring(adapter);
 657         if (error) {
 658                 device_printf(dev, "Could not setup transmit structures\n");
 659                 goto fail;
 660         }
 661
 662         /* Allocate receive descriptors and buffers */
 663         error = em_create_rx_ring(adapter);
 664         if (error) {
 665                 device_printf(dev, "Could not setup receive structures\n");
 666                 goto fail;
 667         }
 668
 669         /* Manually turn off all interrupts */
 670         E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff);
 671
 672         /* Determine if we have to control management hardware */
 673         if (e1000_enable_mng_pass_thru(&adapter->hw))
 674                 adapter->flags |= EM_FLAG_HAS_MGMT;
 675
 676         /*
 677          * Setup Wake-on-Lan
 678          */
 679         apme_mask = EM_EEPROM_APME;
 680         eeprom_data = 0;
 681         switch (adapter->hw.mac.type) {
 682         case e1000_82542:
 683         case e1000_82543:
 684                 break;
 685
 686         case e1000_82573:
 687         case e1000_82583:
 688                 adapter->flags |= EM_FLAG_HAS_AMT;
 689                 /* FALL THROUGH */
 690
 691         case e1000_82546:
 692         case e1000_82546_rev_3:
 693         case e1000_82571:
 694         case e1000_82572:
 695         case e1000_80003es2lan:
 696                 if (adapter->hw.bus.func == 1) {
 697                         e1000_read_nvm(&adapter->hw,
 698                             NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
 699                 } else {
 700                         e1000_read_nvm(&adapter->hw,
 701                             NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
 702                 }
 703                 break;
 704
 705         case e1000_ich8lan:
 706         case e1000_ich9lan:
 707         case e1000_ich10lan:
 708         case e1000_pchlan:
 709         case e1000_pch2lan:
 710                 apme_mask = E1000_WUC_APME;
 711                 adapter->flags |= EM_FLAG_HAS_AMT;
 712                 eeprom_data = E1000_READ_REG(&adapter->hw, E1000_WUC);
 713                 break;
 714
 715         default:
 716                 e1000_read_nvm(&adapter->hw,
 717                     NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
 718                 break;
 719         }
 720         if (eeprom_data & apme_mask)
 721                 adapter->wol = E1000_WUFC_MAG | E1000_WUFC_MC;
 722
 723         /*
 724          * We have the eeprom settings, now apply the special cases
 725          * where the eeprom may be wrong or the board won't support
 726          * wake on lan on a particular port
 727          */
 728         device_id = pci_get_device(dev);
 729         switch (device_id) {
 730         case E1000_DEV_ID_82546GB_PCIE:
 731                 adapter->wol = 0;
 732                 break;
 733
 734         case E1000_DEV_ID_82546EB_FIBER:
 735         case E1000_DEV_ID_82546GB_FIBER:
 736         case E1000_DEV_ID_82571EB_FIBER:
 737                 /*
 738                  * Wake events only supported on port A for dual fiber
 739                  * regardless of eeprom setting
 740                  */
 741                 if (E1000_READ_REG(&adapter->hw, E1000_STATUS) &
 742                     E1000_STATUS_FUNC_1)
 743                         adapter->wol = 0;
 744                 break;
 745
 746         case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
 747         case E1000_DEV_ID_82571EB_QUAD_COPPER:
 748         case E1000_DEV_ID_82571EB_QUAD_FIBER:
 749         case E1000_DEV_ID_82571EB_QUAD_COPPER_LP:
 750                 /* if quad port adapter, disable WoL on all but port A */
 751                 if (em_global_quad_port_a != 0)
 752                         adapter->wol = 0;
 753                 /* Reset for multiple quad port adapters */
 754                 if (++em_global_quad_port_a == 4)
 755                         em_global_quad_port_a = 0;
 756                 break;
 757         }
 758
 759         /* XXX disable wol */
 760         adapter->wol = 0;
 761
 762         /* Setup OS specific network interface */
 763         em_setup_ifp(adapter);
 764
 765         /* Add sysctl tree, must after em_setup_ifp() */
 766         em_add_sysctl(adapter);
 767
 768 #ifdef IFPOLL_ENABLE
 769         /* Polling setup */
 770         ifpoll_compat_setup(&adapter->npoll,
 771             &adapter->sysctl_ctx, adapter->sysctl_tree, device_get_unit(dev),
 772             ifp->if_serializer);
 773 #endif
 774
 775         /* Reset the hardware */
 776         error = em_reset(adapter);
 777         if (error) {
 778                 device_printf(dev, "Unable to reset the hardware\n");
 779                 goto fail;
 780         }
 781
 782         /* Initialize statistics */
 783         em_update_stats(adapter);
 784
 785         adapter->hw.mac.get_link_status = 1;
 786         em_update_link_status(adapter);
 787
 788         /* Do we need workaround for 82544 PCI-X adapter? */
 789         if (adapter->hw.bus.type == e1000_bus_type_pcix &&
 790             adapter->hw.mac.type == e1000_82544)
 791                 adapter->pcix_82544 = TRUE;
 792         else
 793                 adapter->pcix_82544 = FALSE;
 794
 795         if (adapter->pcix_82544) {
 796                 /*
 797                  * 82544 on PCI-X may split one TX segment
 798                  * into two TX descs, so we double its number
 799                  * of spare TX desc here.
 800                  */
 801                 adapter->spare_tx_desc = 2 * EM_TX_SPARE;
 802         } else {
 803                 adapter->spare_tx_desc = EM_TX_SPARE;
 804         }
 805         if (adapter->flags & EM_FLAG_TSO)
 806                 adapter->spare_tx_desc = EM_TX_SPARE_TSO;
 807         adapter->tx_wreg_nsegs = EM_DEFAULT_TXWREG;
 808
 809         /*
 810          * Keep following relationship between spare_tx_desc, oact_tx_desc
 811          * and tx_int_nsegs:
 812          * (spare_tx_desc + EM_TX_RESERVED) <=
 813          * oact_tx_desc <= EM_TX_OACTIVE_MAX <= tx_int_nsegs
 814          */
 815         adapter->oact_tx_desc = adapter->num_tx_desc / 8;
 816         if (adapter->oact_tx_desc > EM_TX_OACTIVE_MAX)
 817                 adapter->oact_tx_desc = EM_TX_OACTIVE_MAX;
 818         if (adapter->oact_tx_desc < adapter->spare_tx_desc + EM_TX_RESERVED)
 819                 adapter->oact_tx_desc = adapter->spare_tx_desc + EM_TX_RESERVED;
 820
 821         adapter->tx_int_nsegs = adapter->num_tx_desc / 16;
 822         if (adapter->tx_int_nsegs < adapter->oact_tx_desc)
 823                 adapter->tx_int_nsegs = adapter->oact_tx_desc;
 824
 825         /* Non-AMT based hardware can now take control from firmware */
 826         if ((adapter->flags & (EM_FLAG_HAS_MGMT | EM_FLAG_HAS_AMT)) ==
 827             EM_FLAG_HAS_MGMT && adapter->hw.mac.type >= e1000_82571)
 828                 em_get_hw_control(adapter);
 829
 830         ifq_set_cpuid(&ifp->if_snd, rman_get_cpuid(adapter->intr_res));
 831
 832         /*
 833          * Missing Interrupt Following ICR read:
 834          *
 835          * 82571/82572 specification update errata #76
 836          * 82573 specification update errata #31
 837          * 82574 specification update errata #12
 838          * 82583 specification update errata #4
 839          */
 840         intr_func = em_intr;
 841         if ((adapter->flags & EM_FLAG_SHARED_INTR) &&
 842             (adapter->hw.mac.type == e1000_82571 ||
 843              adapter->hw.mac.type == e1000_82572 ||
 844              adapter->hw.mac.type == e1000_82573 ||
 845              adapter->hw.mac.type == e1000_82574 ||
 846              adapter->hw.mac.type == e1000_82583))
 847                 intr_func = em_intr_mask;
 848
 849         error = bus_setup_intr(dev, adapter->intr_res, INTR_MPSAFE,
 850                                intr_func, adapter, &adapter->intr_tag,
 851                                ifp->if_serializer);
 852         if (error) {
 853                 device_printf(dev, "Failed to register interrupt handler");
 854                 ether_ifdetach(&adapter->arpcom.ac_if);
 855                 goto fail;
 856         }
 857         return (0);
 858 fail:
 859         em_detach(dev);
 860         return (error);
 861 }
 862
 863 static int
 864 em_detach(device_t dev)
 865 {
 866         struct adapter *adapter = device_get_softc(dev);
 867
 868         if (device_is_attached(dev)) {
 869                 struct ifnet *ifp = &adapter->arpcom.ac_if;
 870
 871                 lwkt_serialize_enter(ifp->if_serializer);
 872
 873                 em_stop(adapter);
 874
 875                 e1000_phy_hw_reset(&adapter->hw);
 876
 877                 em_rel_mgmt(adapter);
 878                 em_rel_hw_control(adapter);
 879
 880                 if (adapter->wol) {
 881                         E1000_WRITE_REG(&adapter->hw, E1000_WUC,
 882                                         E1000_WUC_PME_EN);
 883                         E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol);
 884                         em_enable_wol(dev);
 885                 }
 886
 887                 bus_teardown_intr(dev, adapter->intr_res, adapter->intr_tag);
 888
 889                 lwkt_serialize_exit(ifp->if_serializer);
 890
 891                 ether_ifdetach(ifp);
 892         } else if (adapter->memory != NULL) {
 893                 em_rel_hw_control(adapter);
 894         }
 895         bus_generic_detach(dev);
 896
 897         em_free_pci_res(adapter);
 898
 899         em_destroy_tx_ring(adapter, adapter->num_tx_desc);
 900         em_destroy_rx_ring(adapter, adapter->num_rx_desc);
 901
 902         /* Free Transmit Descriptor ring */
 903         if (adapter->tx_desc_base)
 904                 em_dma_free(adapter, &adapter->txdma);
 905
 906         /* Free Receive Descriptor ring */
 907         if (adapter->rx_desc_base)
 908                 em_dma_free(adapter, &adapter->rxdma);
 909
 910         /* Free top level busdma tag */
 911         if (adapter->parent_dtag != NULL)
 912                 bus_dma_tag_destroy(adapter->parent_dtag);
 913
 914         /* Free sysctl tree */
 915         if (adapter->sysctl_tree != NULL)
 916                 sysctl_ctx_free(&adapter->sysctl_ctx);
 917
 918         if (adapter->mta != NULL)
 919                 kfree(adapter->mta, M_DEVBUF);
 920
 921         return (0);
 922 }
 923
 924 static int
 925 em_shutdown(device_t dev)
 926 {
 927         return em_suspend(dev);
 928 }
 929
 930 static int
 931 em_suspend(device_t dev)
 932 {
 933         struct adapter *adapter = device_get_softc(dev);
 934         struct ifnet *ifp = &adapter->arpcom.ac_if;
 935
 936         lwkt_serialize_enter(ifp->if_serializer);
 937
 938         em_stop(adapter);
 939
 940         em_rel_mgmt(adapter);
 941         em_rel_hw_control(adapter);
 942
 943         if (adapter->wol) {
 944                 E1000_WRITE_REG(&adapter->hw, E1000_WUC, E1000_WUC_PME_EN);
 945                 E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol);
 946                 em_enable_wol(dev);
 947         }
 948
 949         lwkt_serialize_exit(ifp->if_serializer);
 950
 951         return bus_generic_suspend(dev);
 952 }
 953
 954 static int
 955 em_resume(device_t dev)
 956 {
 957         struct adapter *adapter = device_get_softc(dev);
 958         struct ifnet *ifp = &adapter->arpcom.ac_if;
 959
 960         lwkt_serialize_enter(ifp->if_serializer);
 961
 962         if (adapter->hw.mac.type == e1000_pch2lan)
 963                 e1000_resume_workarounds_pchlan(&adapter->hw);
 964
 965         em_init(adapter);
 966         em_get_mgmt(adapter);
 967         if_devstart(ifp);
 968
 969         lwkt_serialize_exit(ifp->if_serializer);
 970
 971         return bus_generic_resume(dev);
 972 }
 973
 974 static void
 975 em_start(struct ifnet *ifp, struct ifaltq_subque *ifsq)
 976 {
 977         struct adapter *adapter = ifp->if_softc;
 978         struct mbuf *m_head;
 979         int idx = -1, nsegs = 0;
 980
 981         ASSERT_ALTQ_SQ_DEFAULT(ifp, ifsq);
 982         ASSERT_SERIALIZED(ifp->if_serializer);
 983
 984         if ((ifp->if_flags & IFF_RUNNING) == 0 || ifq_is_oactive(&ifp->if_snd))
 985                 return;
 986
 987         if (!adapter->link_active) {
 988                 ifq_purge(&ifp->if_snd);
 989                 return;
 990         }
 991
 992         while (!ifq_is_empty(&ifp->if_snd)) {
 993                 /* Now do we at least have a minimal? */
 994                 if (EM_IS_OACTIVE(adapter)) {
 995                         em_tx_collect(adapter);
 996                         if (EM_IS_OACTIVE(adapter)) {
 997                                 ifq_set_oactive(&ifp->if_snd);
 998                                 adapter->no_tx_desc_avail1++;
 999                                 break;
1000                         }
1001                 }
1002
1003                 logif(pkt_txqueue);
1004                 m_head = ifq_dequeue(&ifp->if_snd);
1005                 if (m_head == NULL)
1006                         break;
1007
1008                 if (em_encap(adapter, &m_head, &nsegs, &idx)) {
1009                         IFNET_STAT_INC(ifp, oerrors, 1);
1010                         em_tx_collect(adapter);
1011                         continue;
1012                 }
1013
1014                 if (nsegs >= adapter->tx_wreg_nsegs && idx >= 0) {
1015                         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), idx);
1016                         nsegs = 0;
1017                         idx = -1;
1018                 }
1019
1020                 /* Send a copy of the frame to the BPF listener */
1021                 ETHER_BPF_MTAP(ifp, m_head);
1022
1023                 /* Set timeout in case hardware has problems transmitting. */
1024                 ifp->if_timer = EM_TX_TIMEOUT;
1025         }
1026         if (idx >= 0)
1027                 E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), idx);
1028 }
1029
1030 static int
1031 em_ioctl(struct ifnet *ifp, u_long command, caddr_t data, struct ucred *cr)
1032 {
1033         struct adapter *adapter = ifp->if_softc;
1034         struct ifreq *ifr = (struct ifreq *)data;
1035         uint16_t eeprom_data = 0;
1036         int max_frame_size, mask, reinit;
1037         int error = 0;
1038
1039         ASSERT_SERIALIZED(ifp->if_serializer);
1040
1041         switch (command) {
1042         case SIOCSIFMTU:
1043                 switch (adapter->hw.mac.type) {
1044                 case e1000_82573:
1045                         /*
1046                          * 82573 only supports jumbo frames
1047                          * if ASPM is disabled.
1048                          */
1049                         e1000_read_nvm(&adapter->hw,
1050                             NVM_INIT_3GIO_3, 1, &eeprom_data);
1051                         if (eeprom_data & NVM_WORD1A_ASPM_MASK) {
1052                                 max_frame_size = ETHER_MAX_LEN;
1053                                 break;
1054                         }
1055                         /* FALL THROUGH */
1056
1057                 /* Limit Jumbo Frame size */
1058                 case e1000_82571:
1059                 case e1000_82572:
1060                 case e1000_ich9lan:
1061                 case e1000_ich10lan:
1062                 case e1000_pch2lan:
1063                 case e1000_82574:
1064                 case e1000_82583:
1065                 case e1000_80003es2lan:
1066                         max_frame_size = 9234;
1067                         break;
1068
1069                 case e1000_pchlan:
1070                         max_frame_size = 4096;
1071                         break;
1072
1073                 /* Adapters that do not support jumbo frames */
1074                 case e1000_82542:
1075                 case e1000_ich8lan:
1076                         max_frame_size = ETHER_MAX_LEN;
1077                         break;
1078
1079                 default:
1080                         max_frame_size = MAX_JUMBO_FRAME_SIZE;
1081                         break;
1082                 }
1083                 if (ifr->ifr_mtu > max_frame_size - ETHER_HDR_LEN -
1084                     ETHER_CRC_LEN) {
1085                         error = EINVAL;
1086                         break;
1087                 }
1088
1089                 ifp->if_mtu = ifr->ifr_mtu;
1090                 adapter->max_frame_size =
1091                     ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
1092
1093                 if (ifp->if_flags & IFF_RUNNING)
1094                         em_init(adapter);
1095                 break;
1096
1097         case SIOCSIFFLAGS:
1098                 if (ifp->if_flags & IFF_UP) {
1099                         if ((ifp->if_flags & IFF_RUNNING)) {
1100                                 if ((ifp->if_flags ^ adapter->if_flags) &
1101                                     (IFF_PROMISC | IFF_ALLMULTI)) {
1102                                         em_disable_promisc(adapter);
1103                                         em_set_promisc(adapter);
1104                                 }
1105                         } else {
1106                                 em_init(adapter);
1107                         }
1108                 } else if (ifp->if_flags & IFF_RUNNING) {
1109                         em_stop(adapter);
1110                 }
1111                 adapter->if_flags = ifp->if_flags;
1112                 break;
1113
1114         case SIOCADDMULTI:
1115         case SIOCDELMULTI:
1116                 if (ifp->if_flags & IFF_RUNNING) {
1117                         em_disable_intr(adapter);
1118                         em_set_multi(adapter);
1119                         if (adapter->hw.mac.type == e1000_82542 &&
1120                             adapter->hw.revision_id == E1000_REVISION_2)
1121                                 em_init_rx_unit(adapter);
1122 #ifdef IFPOLL_ENABLE
1123                         if (!(ifp->if_flags & IFF_NPOLLING))
1124 #endif
1125                                 em_enable_intr(adapter);
1126                 }
1127                 break;
1128
1129         case SIOCSIFMEDIA:
1130                 /* Check SOL/IDER usage */
1131                 if (e1000_check_reset_block(&adapter->hw)) {
1132                         device_printf(adapter->dev, "Media change is"
1133                             " blocked due to SOL/IDER session.\n");
1134                         break;
1135                 }
1136                 /* FALL THROUGH */
1137
1138         case SIOCGIFMEDIA:
1139                 error = ifmedia_ioctl(ifp, ifr, &adapter->media, command);
1140                 break;
1141
1142         case SIOCSIFCAP:
1143                 reinit = 0;
1144                 mask = ifr->ifr_reqcap ^ ifp->if_capenable;
1145                 if (mask & IFCAP_RXCSUM) {
1146                         ifp->if_capenable ^= IFCAP_RXCSUM;
1147                         reinit = 1;
1148                 }
1149                 if (mask & IFCAP_TXCSUM) {
1150                         ifp->if_capenable ^= IFCAP_TXCSUM;
1151                         if (ifp->if_capenable & IFCAP_TXCSUM)
1152                                 ifp->if_hwassist |= EM_CSUM_FEATURES;
1153                         else
1154                                 ifp->if_hwassist &= ~EM_CSUM_FEATURES;
1155                 }
1156                 if (mask & IFCAP_TSO) {
1157                         ifp->if_capenable ^= IFCAP_TSO;
1158                         if (ifp->if_capenable & IFCAP_TSO)
1159                                 ifp->if_hwassist |= CSUM_TSO;
1160                         else
1161                                 ifp->if_hwassist &= ~CSUM_TSO;
1162                 }
1163                 if (mask & IFCAP_VLAN_HWTAGGING) {
1164                         ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING;
1165                         reinit = 1;
1166                 }
1167                 if (reinit && (ifp->if_flags & IFF_RUNNING))
1168                         em_init(adapter);
1169                 break;
1170
1171         default:
1172                 error = ether_ioctl(ifp, command, data);
1173                 break;
1174         }
1175         return (error);
1176 }
1177
1178 static void
1179 em_watchdog(struct ifnet *ifp)
1180 {
1181         struct adapter *adapter = ifp->if_softc;
1182
1183         ASSERT_SERIALIZED(ifp->if_serializer);
1184
1185         /*
1186          * The timer is set to 5 every time start queues a packet.
1187          * Then txeof keeps resetting it as long as it cleans at
1188          * least one descriptor.
1189          * Finally, anytime all descriptors are clean the timer is
1190          * set to 0.
1191          */
1192
1193         if (E1000_READ_REG(&adapter->hw, E1000_TDT(0)) ==
1194             E1000_READ_REG(&adapter->hw, E1000_TDH(0))) {
1195                 /*
1196                  * If we reach here, all TX jobs are completed and
1197                  * the TX engine should have been idled for some time.
1198                  * We don't need to call if_devstart() here.
1199                  */
1200                 ifq_clr_oactive(&ifp->if_snd);
1201                 ifp->if_timer = 0;
1202                 return;
1203         }
1204
1205         /*
1206          * If we are in this routine because of pause frames, then
1207          * don't reset the hardware.
1208          */
1209         if (E1000_READ_REG(&adapter->hw, E1000_STATUS) &
1210             E1000_STATUS_TXOFF) {
1211                 ifp->if_timer = EM_TX_TIMEOUT;
1212                 return;
1213         }
1214
1215         if (e1000_check_for_link(&adapter->hw) == 0)
1216                 if_printf(ifp, "watchdog timeout -- resetting\n");
1217
1218         IFNET_STAT_INC(ifp, oerrors, 1);
1219         adapter->watchdog_events++;
1220
1221         em_init(adapter);
1222
1223         if (!ifq_is_empty(&ifp->if_snd))
1224                 if_devstart(ifp);
1225 }
1226
1227 static void
1228 em_init(void *xsc)
1229 {
1230         struct adapter *adapter = xsc;
1231         struct ifnet *ifp = &adapter->arpcom.ac_if;
1232         device_t dev = adapter->dev;
1233
1234         ASSERT_SERIALIZED(ifp->if_serializer);
1235
1236         em_stop(adapter);
1237
1238         /* Get the latest mac address, User can use a LAA */
1239         bcopy(IF_LLADDR(ifp), adapter->hw.mac.addr, ETHER_ADDR_LEN);
1240
1241         /* Put the address into the Receive Address Array */
1242         e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
1243
1244         /*
1245          * With the 82571 adapter, RAR[0] may be overwritten
1246          * when the other port is reset, we make a duplicate
1247          * in RAR[14] for that eventuality, this assures
1248          * the interface continues to function.
1249          */
1250         if (adapter->hw.mac.type == e1000_82571) {
1251                 e1000_set_laa_state_82571(&adapter->hw, TRUE);
1252                 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr,
1253                     E1000_RAR_ENTRIES - 1);
1254         }
1255
1256         /* Reset the hardware */
1257         if (em_reset(adapter)) {
1258                 device_printf(dev, "Unable to reset the hardware\n");
1259                 /* XXX em_stop()? */
1260                 return;
1261         }
1262         em_update_link_status(adapter);
1263
1264         /* Setup VLAN support, basic and offload if available */
1265         E1000_WRITE_REG(&adapter->hw, E1000_VET, ETHERTYPE_VLAN);
1266
1267         if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING) {
1268                 uint32_t ctrl;
1269
1270                 ctrl = E1000_READ_REG(&adapter->hw, E1000_CTRL);
1271                 ctrl |= E1000_CTRL_VME;
1272                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL, ctrl);
1273         }
1274
1275         /* Configure for OS presence */
1276         em_get_mgmt(adapter);
1277
1278         /* Prepare transmit descriptors and buffers */
1279         em_init_tx_ring(adapter);
1280         em_init_tx_unit(adapter);
1281
1282         /* Setup Multicast table */
1283         em_set_multi(adapter);
1284
1285         /* Prepare receive descriptors and buffers */
1286         if (em_init_rx_ring(adapter)) {
1287                 device_printf(dev, "Could not setup receive structures\n");
1288                 em_stop(adapter);
1289                 return;
1290         }
1291         em_init_rx_unit(adapter);
1292
1293         /* Don't lose promiscuous settings */
1294         em_set_promisc(adapter);
1295
1296         ifp->if_flags |= IFF_RUNNING;
1297         ifq_clr_oactive(&ifp->if_snd);
1298
1299         callout_reset(&adapter->timer, hz, em_timer, adapter);
1300         e1000_clear_hw_cntrs_base_generic(&adapter->hw);
1301
1302         /* MSI/X configuration for 82574 */
1303         if (adapter->hw.mac.type == e1000_82574) {
1304                 int tmp;
1305
1306                 tmp = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
1307                 tmp |= E1000_CTRL_EXT_PBA_CLR;
1308                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT, tmp);
1309                 /*
1310                  * XXX MSIX
1311                  * Set the IVAR - interrupt vector routing.
1312                  * Each nibble represents a vector, high bit
1313                  * is enable, other 3 bits are the MSIX table
1314                  * entry, we map RXQ0 to 0, TXQ0 to 1, and
1315                  * Link (other) to 2, hence the magic number.
1316                  */
1317                 E1000_WRITE_REG(&adapter->hw, E1000_IVAR, 0x800A0908);
1318         }
1319
1320 #ifdef IFPOLL_ENABLE
1321         /*
1322          * Only enable interrupts if we are not polling, make sure
1323          * they are off otherwise.
1324          */
1325         if (ifp->if_flags & IFF_NPOLLING)
1326                 em_disable_intr(adapter);
1327         else
1328 #endif /* IFPOLL_ENABLE */
1329                 em_enable_intr(adapter);
1330
1331         /* AMT based hardware can now take control from firmware */
1332         if ((adapter->flags & (EM_FLAG_HAS_MGMT | EM_FLAG_HAS_AMT)) ==
1333             (EM_FLAG_HAS_MGMT | EM_FLAG_HAS_AMT) &&
1334             adapter->hw.mac.type >= e1000_82571)
1335                 em_get_hw_control(adapter);
1336 }
1337
1338 #ifdef IFPOLL_ENABLE
1339
1340 static void
1341 em_npoll_compat(struct ifnet *ifp, void *arg __unused, int count)
1342 {
1343         struct adapter *adapter = ifp->if_softc;
1344
1345         ASSERT_SERIALIZED(ifp->if_serializer);
1346
1347         if (adapter->npoll.ifpc_stcount-- == 0) {
1348                 uint32_t reg_icr;
1349
1350                 adapter->npoll.ifpc_stcount = adapter->npoll.ifpc_stfrac;
1351
1352                 reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
1353                 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1354                         callout_stop(&adapter->timer);
1355                         adapter->hw.mac.get_link_status = 1;
1356                         em_update_link_status(adapter);
1357                         callout_reset(&adapter->timer, hz, em_timer, adapter);
1358                 }
1359         }
1360
1361         em_rxeof(adapter, count);
1362         em_txeof(adapter);
1363
1364         if (!ifq_is_empty(&ifp->if_snd))
1365                 if_devstart(ifp);
1366 }
1367
1368 static void
1369 em_npoll(struct ifnet *ifp, struct ifpoll_info *info)
1370 {
1371         struct adapter *adapter = ifp->if_softc;
1372
1373         ASSERT_SERIALIZED(ifp->if_serializer);
1374
1375         if (info != NULL) {
1376                 int cpuid = adapter->npoll.ifpc_cpuid;
1377
1378                 info->ifpi_rx[cpuid].poll_func = em_npoll_compat;
1379                 info->ifpi_rx[cpuid].arg = NULL;
1380                 info->ifpi_rx[cpuid].serializer = ifp->if_serializer;
1381
1382                 if (ifp->if_flags & IFF_RUNNING)
1383                         em_disable_intr(adapter);
1384                 ifq_set_cpuid(&ifp->if_snd, cpuid);
1385         } else {
1386                 if (ifp->if_flags & IFF_RUNNING)
1387                         em_enable_intr(adapter);
1388                 ifq_set_cpuid(&ifp->if_snd, rman_get_cpuid(adapter->intr_res));
1389         }
1390 }
1391
1392 #endif /* IFPOLL_ENABLE */
1393
1394 static void
1395 em_intr(void *xsc)
1396 {
1397         em_intr_body(xsc, TRUE);
1398 }
1399
1400 static void
1401 em_intr_body(struct adapter *adapter, boolean_t chk_asserted)
1402 {
1403         struct ifnet *ifp = &adapter->arpcom.ac_if;
1404         uint32_t reg_icr;
1405
1406         logif(intr_beg);
1407         ASSERT_SERIALIZED(ifp->if_serializer);
1408
1409         reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
1410
1411         if (chk_asserted &&
1412             ((adapter->hw.mac.type >= e1000_82571 &&
1413               (reg_icr & E1000_ICR_INT_ASSERTED) == 0) ||
1414              reg_icr == 0)) {
1415                 logif(intr_end);
1416                 return;
1417         }
1418
1419         /*
1420          * XXX: some laptops trigger several spurious interrupts
1421          * on em(4) when in the resume cycle. The ICR register
1422          * reports all-ones value in this case. Processing such
1423          * interrupts would lead to a freeze. I don't know why.
1424          */
1425         if (reg_icr == 0xffffffff) {
1426                 logif(intr_end);
1427                 return;
1428         }
1429
1430         if (ifp->if_flags & IFF_RUNNING) {
1431                 if (reg_icr &
1432                     (E1000_ICR_RXT0 | E1000_ICR_RXDMT0 | E1000_ICR_RXO))
1433                         em_rxeof(adapter, -1);
1434                 if (reg_icr & E1000_ICR_TXDW) {
1435                         em_txeof(adapter);
1436                         if (!ifq_is_empty(&ifp->if_snd))
1437                                 if_devstart(ifp);
1438                 }
1439         }
1440
1441         /* Link status change */
1442         if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1443                 callout_stop(&adapter->timer);
1444                 adapter->hw.mac.get_link_status = 1;
1445                 em_update_link_status(adapter);
1446
1447                 /* Deal with TX cruft when link lost */
1448                 em_tx_purge(adapter);
1449
1450                 callout_reset(&adapter->timer, hz, em_timer, adapter);
1451         }
1452
1453         if (reg_icr & E1000_ICR_RXO)
1454                 adapter->rx_overruns++;
1455
1456         logif(intr_end);
1457 }
1458
1459 static void
1460 em_intr_mask(void *xsc)
1461 {
1462         struct adapter *adapter = xsc;
1463
1464         E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff);
1465         /*
1466          * NOTE:
1467          * ICR.INT_ASSERTED bit will never be set if IMS is 0,
1468          * so don't check it.
1469          */
1470         em_intr_body(adapter, FALSE);
1471         E1000_WRITE_REG(&adapter->hw, E1000_IMS, IMS_ENABLE_MASK);
1472 }
1473
1474 static void
1475 em_media_status(struct ifnet *ifp, struct ifmediareq *ifmr)
1476 {
1477         struct adapter *adapter = ifp->if_softc;
1478         u_char fiber_type = IFM_1000_SX;
1479
1480         ASSERT_SERIALIZED(ifp->if_serializer);
1481
1482         em_update_link_status(adapter);
1483
1484         ifmr->ifm_status = IFM_AVALID;
1485         ifmr->ifm_active = IFM_ETHER;
1486
1487         if (!adapter->link_active)
1488                 return;
1489
1490         ifmr->ifm_status |= IFM_ACTIVE;
1491
1492         if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
1493             adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
1494                 if (adapter->hw.mac.type == e1000_82545)
1495                         fiber_type = IFM_1000_LX;
1496                 ifmr->ifm_active |= fiber_type | IFM_FDX;
1497         } else {
1498                 switch (adapter->link_speed) {
1499                 case 10:
1500                         ifmr->ifm_active |= IFM_10_T;
1501                         break;
1502                 case 100:
1503                         ifmr->ifm_active |= IFM_100_TX;
1504                         break;
1505
1506                 case 1000:
1507                         ifmr->ifm_active |= IFM_1000_T;
1508                         break;
1509                 }
1510                 if (adapter->link_duplex == FULL_DUPLEX)
1511                         ifmr->ifm_active |= IFM_FDX;
1512                 else
1513                         ifmr->ifm_active |= IFM_HDX;
1514         }
1515 }
1516
1517 static int
1518 em_media_change(struct ifnet *ifp)
1519 {
1520         struct adapter *adapter = ifp->if_softc;
1521         struct ifmedia *ifm = &adapter->media;
1522
1523         ASSERT_SERIALIZED(ifp->if_serializer);
1524
1525         if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
1526                 return (EINVAL);
1527
1528         switch (IFM_SUBTYPE(ifm->ifm_media)) {
1529         case IFM_AUTO:
1530                 adapter->hw.mac.autoneg = DO_AUTO_NEG;
1531                 adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
1532                 break;
1533
1534         case IFM_1000_LX:
1535         case IFM_1000_SX:
1536         case IFM_1000_T:
1537                 adapter->hw.mac.autoneg = DO_AUTO_NEG;
1538                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
1539                 break;
1540
1541         case IFM_100_TX:
1542                 adapter->hw.mac.autoneg = FALSE;
1543                 adapter->hw.phy.autoneg_advertised = 0;
1544                 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1545                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_FULL;
1546                 else
1547                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_HALF;
1548                 break;
1549
1550         case IFM_10_T:
1551                 adapter->hw.mac.autoneg = FALSE;
1552                 adapter->hw.phy.autoneg_advertised = 0;
1553                 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1554                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_FULL;
1555                 else
1556                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_HALF;
1557                 break;
1558
1559         default:
1560                 if_printf(ifp, "Unsupported media type\n");
1561                 break;
1562         }
1563
1564         em_init(adapter);
1565
1566         return (0);
1567 }
1568
1569 static int
1570 em_encap(struct adapter *adapter, struct mbuf **m_headp,
1571     int *segs_used, int *idx)
1572 {
1573         bus_dma_segment_t segs[EM_MAX_SCATTER];
1574         bus_dmamap_t map;
1575         struct em_buffer *tx_buffer, *tx_buffer_mapped;
1576         struct e1000_tx_desc *ctxd = NULL;
1577         struct mbuf *m_head = *m_headp;
1578         uint32_t txd_upper, txd_lower, txd_used, cmd = 0;
1579         int maxsegs, nsegs, i, j, first, last = 0, error;
1580
1581         if (m_head->m_pkthdr.csum_flags & CSUM_TSO) {
1582                 error = em_tso_pullup(adapter, m_headp);
1583                 if (error)
1584                         return error;
1585                 m_head = *m_headp;
1586         }
1587
1588         txd_upper = txd_lower = 0;
1589         txd_used = 0;
1590
1591         /*
1592          * Capture the first descriptor index, this descriptor
1593          * will have the index of the EOP which is the only one
1594          * that now gets a DONE bit writeback.
1595          */
1596         first = adapter->next_avail_tx_desc;
1597         tx_buffer = &adapter->tx_buffer_area[first];
1598         tx_buffer_mapped = tx_buffer;
1599         map = tx_buffer->map;
1600
1601         maxsegs = adapter->num_tx_desc_avail - EM_TX_RESERVED;
1602         KASSERT(maxsegs >= adapter->spare_tx_desc,
1603                 ("not enough spare TX desc"));
1604         if (adapter->pcix_82544) {
1605                 /* Half it; see the comment in em_attach() */
1606                 maxsegs >>= 1;
1607         }
1608         if (maxsegs > EM_MAX_SCATTER)
1609                 maxsegs = EM_MAX_SCATTER;
1610
1611         error = bus_dmamap_load_mbuf_defrag(adapter->txtag, map, m_headp,
1612                         segs, maxsegs, &nsegs, BUS_DMA_NOWAIT);
1613         if (error) {
1614                 if (error == ENOBUFS)
1615                         adapter->mbuf_alloc_failed++;
1616                 else
1617                         adapter->no_tx_dma_setup++;
1618
1619                 m_freem(*m_headp);
1620                 *m_headp = NULL;
1621                 return error;
1622         }
1623         bus_dmamap_sync(adapter->txtag, map, BUS_DMASYNC_PREWRITE);
1624
1625         m_head = *m_headp;
1626         adapter->tx_nsegs += nsegs;
1627         *segs_used += nsegs;
1628
1629         if (m_head->m_pkthdr.csum_flags & CSUM_TSO) {
1630                 /* TSO will consume one TX desc */
1631                 i = em_tso_setup(adapter, m_head, &txd_upper, &txd_lower);
1632                 adapter->tx_nsegs += i;
1633                 *segs_used += i;
1634         } else if (m_head->m_pkthdr.csum_flags & EM_CSUM_FEATURES) {
1635                 /* TX csum offloading will consume one TX desc */
1636                 i = em_txcsum(adapter, m_head, &txd_upper, &txd_lower);
1637                 adapter->tx_nsegs += i;
1638                 *segs_used += i;
1639         }
1640
1641         /* Handle VLAN tag */
1642         if (m_head->m_flags & M_VLANTAG) {
1643                 /* Set the vlan id. */
1644                 txd_upper |= (htole16(m_head->m_pkthdr.ether_vlantag) << 16);
1645                 /* Tell hardware to add tag */
1646                 txd_lower |= htole32(E1000_TXD_CMD_VLE);
1647         }
1648
1649         i = adapter->next_avail_tx_desc;
1650
1651         /* Set up our transmit descriptors */
1652         for (j = 0; j < nsegs; j++) {
1653                 /* If adapter is 82544 and on PCIX bus */
1654                 if(adapter->pcix_82544) {
1655                         DESC_ARRAY desc_array;
1656                         uint32_t array_elements, counter;
1657
1658                         /*
1659                          * Check the Address and Length combination and
1660                          * split the data accordingly
1661                          */
1662                         array_elements = em_82544_fill_desc(segs[j].ds_addr,
1663                                                 segs[j].ds_len, &desc_array);
1664                         for (counter = 0; counter < array_elements; counter++) {
1665                                 KKASSERT(txd_used < adapter->num_tx_desc_avail);
1666
1667                                 tx_buffer = &adapter->tx_buffer_area[i];
1668                                 ctxd = &adapter->tx_desc_base[i];
1669
1670                                 ctxd->buffer_addr = htole64(
1671                                     desc_array.descriptor[counter].address);
1672                                 ctxd->lower.data = htole32(
1673                                     E1000_TXD_CMD_IFCS | txd_lower |
1674                                     desc_array.descriptor[counter].length);
1675                                 ctxd->upper.data = htole32(txd_upper);
1676
1677                                 last = i;
1678                                 if (++i == adapter->num_tx_desc)
1679                                         i = 0;
1680
1681                                 txd_used++;
1682                         }
1683                 } else {
1684                         tx_buffer = &adapter->tx_buffer_area[i];
1685                         ctxd = &adapter->tx_desc_base[i];
1686
1687                         ctxd->buffer_addr = htole64(segs[j].ds_addr);
1688                         ctxd->lower.data = htole32(E1000_TXD_CMD_IFCS |
1689                                                    txd_lower | segs[j].ds_len);
1690                         ctxd->upper.data = htole32(txd_upper);
1691
1692                         last = i;
1693                         if (++i == adapter->num_tx_desc)
1694                                 i = 0;
1695                 }
1696         }
1697
1698         adapter->next_avail_tx_desc = i;
1699         if (adapter->pcix_82544) {
1700                 KKASSERT(adapter->num_tx_desc_avail > txd_used);
1701                 adapter->num_tx_desc_avail -= txd_used;
1702         } else {
1703                 KKASSERT(adapter->num_tx_desc_avail > nsegs);
1704                 adapter->num_tx_desc_avail -= nsegs;
1705         }
1706
1707         tx_buffer->m_head = m_head;
1708         tx_buffer_mapped->map = tx_buffer->map;
1709         tx_buffer->map = map;
1710
1711         if (adapter->tx_nsegs >= adapter->tx_int_nsegs) {
1712                 adapter->tx_nsegs = 0;
1713
1714                 /*
1715                  * Report Status (RS) is turned on
1716                  * every tx_int_nsegs descriptors.
1717                  */
1718                 cmd = E1000_TXD_CMD_RS;
1719
1720                 /*
1721                  * Keep track of the descriptor, which will
1722                  * be written back by hardware.
1723                  */
1724                 adapter->tx_dd[adapter->tx_dd_tail] = last;
1725                 EM_INC_TXDD_IDX(adapter->tx_dd_tail);
1726                 KKASSERT(adapter->tx_dd_tail != adapter->tx_dd_head);
1727         }
1728
1729         /*
1730          * Last Descriptor of Packet needs End Of Packet (EOP)
1731          */
1732         ctxd->lower.data |= htole32(E1000_TXD_CMD_EOP | cmd);
1733
1734         if (adapter->hw.mac.type == e1000_82547) {
1735                 /*
1736                  * Advance the Transmit Descriptor Tail (TDT), this tells the
1737                  * E1000 that this frame is available to transmit.
1738                  */
1739                 if (adapter->link_duplex == HALF_DUPLEX) {
1740                         em_82547_move_tail_serialized(adapter);
1741                 } else {
1742                         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), i);
1743                         em_82547_update_fifo_head(adapter,
1744                             m_head->m_pkthdr.len);
1745                 }
1746         } else {
1747                 /*
1748                  * Defer TDT updating, until enough descriptors are setup
1749                  */
1750                 *idx = i;
1751         }
1752         return (0);
1753 }
1754
1755 /*
1756  * 82547 workaround to avoid controller hang in half-duplex environment.
1757  * The workaround is to avoid queuing a large packet that would span
1758  * the internal Tx FIFO ring boundary.  We need to reset the FIFO pointers
1759  * in this case.  We do that only when FIFO is quiescent.
1760  */
1761 static void
1762 em_82547_move_tail_serialized(struct adapter *adapter)
1763 {
1764         struct e1000_tx_desc *tx_desc;
1765         uint16_t hw_tdt, sw_tdt, length = 0;
1766         bool eop = 0;
1767
1768         ASSERT_SERIALIZED(adapter->arpcom.ac_if.if_serializer);
1769
1770         hw_tdt = E1000_READ_REG(&adapter->hw, E1000_TDT(0));
1771         sw_tdt = adapter->next_avail_tx_desc;
1772
1773         while (hw_tdt != sw_tdt) {
1774                 tx_desc = &adapter->tx_desc_base[hw_tdt];
1775                 length += tx_desc->lower.flags.length;
1776                 eop = tx_desc->lower.data & E1000_TXD_CMD_EOP;
1777                 if (++hw_tdt == adapter->num_tx_desc)
1778                         hw_tdt = 0;
1779
1780                 if (eop) {
1781                         if (em_82547_fifo_workaround(adapter, length)) {
1782                                 adapter->tx_fifo_wrk_cnt++;
1783                                 callout_reset(&adapter->tx_fifo_timer, 1,
1784                                         em_82547_move_tail, adapter);
1785                                 break;
1786                         }
1787                         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), hw_tdt);
1788                         em_82547_update_fifo_head(adapter, length);
1789                         length = 0;
1790                 }
1791         }
1792 }
1793
1794 static void
1795 em_82547_move_tail(void *xsc)
1796 {
1797         struct adapter *adapter = xsc;
1798         struct ifnet *ifp = &adapter->arpcom.ac_if;
1799
1800         lwkt_serialize_enter(ifp->if_serializer);
1801         em_82547_move_tail_serialized(adapter);
1802         lwkt_serialize_exit(ifp->if_serializer);
1803 }
1804
1805 static int
1806 em_82547_fifo_workaround(struct adapter *adapter, int len)
1807 {
1808         int fifo_space, fifo_pkt_len;
1809
1810         fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1811
1812         if (adapter->link_duplex == HALF_DUPLEX) {
1813                 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
1814
1815                 if (fifo_pkt_len >= (EM_82547_PKT_THRESH + fifo_space)) {
1816                         if (em_82547_tx_fifo_reset(adapter))
1817                                 return (0);
1818                         else
1819                                 return (1);
1820                 }
1821         }
1822         return (0);
1823 }
1824
1825 static void
1826 em_82547_update_fifo_head(struct adapter *adapter, int len)
1827 {
1828         int fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1829
1830         /* tx_fifo_head is always 16 byte aligned */
1831         adapter->tx_fifo_head += fifo_pkt_len;
1832         if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1833                 adapter->tx_fifo_head -= adapter->tx_fifo_size;
1834 }
1835
1836 static int
1837 em_82547_tx_fifo_reset(struct adapter *adapter)
1838 {
1839         uint32_t tctl;
1840
1841         if ((E1000_READ_REG(&adapter->hw, E1000_TDT(0)) ==
1842              E1000_READ_REG(&adapter->hw, E1000_TDH(0))) &&
1843             (E1000_READ_REG(&adapter->hw, E1000_TDFT) ==
1844              E1000_READ_REG(&adapter->hw, E1000_TDFH)) &&
1845             (E1000_READ_REG(&adapter->hw, E1000_TDFTS) ==
1846              E1000_READ_REG(&adapter->hw, E1000_TDFHS)) &&
1847             (E1000_READ_REG(&adapter->hw, E1000_TDFPC) == 0)) {
1848                 /* Disable TX unit */
1849                 tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL);
1850                 E1000_WRITE_REG(&adapter->hw, E1000_TCTL,
1851                     tctl & ~E1000_TCTL_EN);
1852
1853                 /* Reset FIFO pointers */
1854                 E1000_WRITE_REG(&adapter->hw, E1000_TDFT,
1855                     adapter->tx_head_addr);
1856                 E1000_WRITE_REG(&adapter->hw, E1000_TDFH,
1857                     adapter->tx_head_addr);
1858                 E1000_WRITE_REG(&adapter->hw, E1000_TDFTS,
1859                     adapter->tx_head_addr);
1860                 E1000_WRITE_REG(&adapter->hw, E1000_TDFHS,
1861                     adapter->tx_head_addr);
1862
1863                 /* Re-enable TX unit */
1864                 E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl);
1865                 E1000_WRITE_FLUSH(&adapter->hw);
1866
1867                 adapter->tx_fifo_head = 0;
1868                 adapter->tx_fifo_reset_cnt++;
1869
1870                 return (TRUE);
1871         } else {
1872                 return (FALSE);
1873         }
1874 }
1875
1876 static void
1877 em_set_promisc(struct adapter *adapter)
1878 {
1879         struct ifnet *ifp = &adapter->arpcom.ac_if;
1880         uint32_t reg_rctl;
1881
1882         reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1883
1884         if (ifp->if_flags & IFF_PROMISC) {
1885                 reg_rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
1886                 /* Turn this on if you want to see bad packets */
1887                 if (em_debug_sbp)
1888                         reg_rctl |= E1000_RCTL_SBP;
1889                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1890         } else if (ifp->if_flags & IFF_ALLMULTI) {
1891                 reg_rctl |= E1000_RCTL_MPE;
1892                 reg_rctl &= ~E1000_RCTL_UPE;
1893                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1894         }
1895 }
1896
1897 static void
1898 em_disable_promisc(struct adapter *adapter)
1899 {
1900         uint32_t reg_rctl;
1901
1902         reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1903
1904         reg_rctl &= ~E1000_RCTL_UPE;
1905         reg_rctl &= ~E1000_RCTL_MPE;
1906         reg_rctl &= ~E1000_RCTL_SBP;
1907         E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1908 }
1909
1910 static void
1911 em_set_multi(struct adapter *adapter)
1912 {
1913         struct ifnet *ifp = &adapter->arpcom.ac_if;
1914         struct ifmultiaddr *ifma;
1915         uint32_t reg_rctl = 0;
1916         uint8_t *mta;
1917         int mcnt = 0;
1918
1919         mta = adapter->mta;
1920         bzero(mta, ETH_ADDR_LEN * MAX_NUM_MULTICAST_ADDRESSES);
1921
1922         if (adapter->hw.mac.type == e1000_82542 &&
1923             adapter->hw.revision_id == E1000_REVISION_2) {
1924                 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1925                 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
1926                         e1000_pci_clear_mwi(&adapter->hw);
1927                 reg_rctl |= E1000_RCTL_RST;
1928                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1929                 msec_delay(5);
1930         }
1931
1932         TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
1933                 if (ifma->ifma_addr->sa_family != AF_LINK)
1934                         continue;
1935
1936                 if (mcnt == MAX_NUM_MULTICAST_ADDRESSES)
1937                         break;
1938
1939                 bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr),
1940                     &mta[mcnt * ETHER_ADDR_LEN], ETHER_ADDR_LEN);
1941                 mcnt++;
1942         }
1943
1944         if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES) {
1945                 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1946                 reg_rctl |= E1000_RCTL_MPE;
1947                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1948         } else {
1949                 e1000_update_mc_addr_list(&adapter->hw, mta, mcnt);
1950         }
1951
1952         if (adapter->hw.mac.type == e1000_82542 &&
1953             adapter->hw.revision_id == E1000_REVISION_2) {
1954                 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1955                 reg_rctl &= ~E1000_RCTL_RST;
1956                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1957                 msec_delay(5);
1958                 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
1959                         e1000_pci_set_mwi(&adapter->hw);
1960         }
1961 }
1962
1963 /*
1964  * This routine checks for link status and updates statistics.
1965  */
1966 static void
1967 em_timer(void *xsc)
1968 {
1969         struct adapter *adapter = xsc;
1970         struct ifnet *ifp = &adapter->arpcom.ac_if;
1971
1972         lwkt_serialize_enter(ifp->if_serializer);
1973
1974         em_update_link_status(adapter);
1975         em_update_stats(adapter);
1976
1977         /* Reset LAA into RAR[0] on 82571 */
1978         if (e1000_get_laa_state_82571(&adapter->hw) == TRUE)
1979                 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
1980
1981         if (em_display_debug_stats && (ifp->if_flags & IFF_RUNNING))
1982                 em_print_hw_stats(adapter);
1983
1984         em_smartspeed(adapter);
1985
1986         callout_reset(&adapter->timer, hz, em_timer, adapter);
1987
1988         lwkt_serialize_exit(ifp->if_serializer);
1989 }
1990
1991 static void
1992 em_update_link_status(struct adapter *adapter)
1993 {
1994         struct e1000_hw *hw = &adapter->hw;
1995         struct ifnet *ifp = &adapter->arpcom.ac_if;
1996         device_t dev = adapter->dev;
1997         uint32_t link_check = 0;
1998
1999         /* Get the cached link value or read phy for real */
2000         switch (hw->phy.media_type) {
2001         case e1000_media_type_copper:
2002                 if (hw->mac.get_link_status) {
2003                         /* Do the work to read phy */
2004                         e1000_check_for_link(hw);
2005                         link_check = !hw->mac.get_link_status;
2006                         if (link_check) /* ESB2 fix */
2007                                 e1000_cfg_on_link_up(hw);
2008                 } else {
2009                         link_check = TRUE;
2010                 }
2011                 break;
2012
2013         case e1000_media_type_fiber:
2014                 e1000_check_for_link(hw);
2015                 link_check =
2016                         E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU;
2017                 break;
2018
2019         case e1000_media_type_internal_serdes:
2020                 e1000_check_for_link(hw);
2021                 link_check = adapter->hw.mac.serdes_has_link;
2022                 break;
2023
2024         case e1000_media_type_unknown:
2025         default:
2026                 break;
2027         }
2028
2029         /* Now check for a transition */
2030         if (link_check && adapter->link_active == 0) {
2031                 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
2032                     &adapter->link_duplex);
2033
2034                 /*
2035                  * Check if we should enable/disable SPEED_MODE bit on
2036                  * 82571/82572
2037                  */
2038                 if (adapter->link_speed != SPEED_1000 &&
2039                     (hw->mac.type == e1000_82571 ||
2040                      hw->mac.type == e1000_82572)) {
2041                         int tarc0;
2042
2043                         tarc0 = E1000_READ_REG(hw, E1000_TARC(0));
2044                         tarc0 &= ~SPEED_MODE_BIT;
2045                         E1000_WRITE_REG(hw, E1000_TARC(0), tarc0);
2046                 }
2047                 if (bootverbose) {
2048                         device_printf(dev, "Link is up %d Mbps %s\n",
2049                             adapter->link_speed,
2050                             ((adapter->link_duplex == FULL_DUPLEX) ?
2051                             "Full Duplex" : "Half Duplex"));
2052                 }
2053                 adapter->link_active = 1;
2054                 adapter->smartspeed = 0;
2055                 ifp->if_baudrate = adapter->link_speed * 1000000;
2056                 ifp->if_link_state = LINK_STATE_UP;
2057                 if_link_state_change(ifp);
2058         } else if (!link_check && adapter->link_active == 1) {
2059                 ifp->if_baudrate = adapter->link_speed = 0;
2060                 adapter->link_duplex = 0;
2061                 if (bootverbose)
2062                         device_printf(dev, "Link is Down\n");
2063                 adapter->link_active = 0;
2064 #if 0
2065                 /* Link down, disable watchdog */
2066                 if->if_timer = 0;
2067 #endif
2068                 ifp->if_link_state = LINK_STATE_DOWN;
2069                 if_link_state_change(ifp);
2070         }
2071 }
2072
2073 static void
2074 em_stop(struct adapter *adapter)
2075 {
2076         struct ifnet *ifp = &adapter->arpcom.ac_if;
2077         int i;
2078
2079         ASSERT_SERIALIZED(ifp->if_serializer);
2080
2081         em_disable_intr(adapter);
2082
2083         callout_stop(&adapter->timer);
2084         callout_stop(&adapter->tx_fifo_timer);
2085
2086         ifp->if_flags &= ~IFF_RUNNING;
2087         ifq_clr_oactive(&ifp->if_snd);
2088         ifp->if_timer = 0;
2089
2090         e1000_reset_hw(&adapter->hw);
2091         if (adapter->hw.mac.type >= e1000_82544)
2092                 E1000_WRITE_REG(&adapter->hw, E1000_WUC, 0);
2093
2094         for (i = 0; i < adapter->num_tx_desc; i++) {
2095                 struct em_buffer *tx_buffer = &adapter->tx_buffer_area[i];
2096
2097                 if (tx_buffer->m_head != NULL) {
2098                         bus_dmamap_unload(adapter->txtag, tx_buffer->map);
2099                         m_freem(tx_buffer->m_head);
2100                         tx_buffer->m_head = NULL;
2101                 }
2102         }
2103
2104         for (i = 0; i < adapter->num_rx_desc; i++) {
2105                 struct em_buffer *rx_buffer = &adapter->rx_buffer_area[i];
2106
2107                 if (rx_buffer->m_head != NULL) {
2108                         bus_dmamap_unload(adapter->rxtag, rx_buffer->map);
2109                         m_freem(rx_buffer->m_head);
2110                         rx_buffer->m_head = NULL;
2111                 }
2112         }
2113
2114         if (adapter->fmp != NULL)
2115                 m_freem(adapter->fmp);
2116         adapter->fmp = NULL;
2117         adapter->lmp = NULL;
2118
2119         adapter->csum_flags = 0;
2120         adapter->csum_lhlen = 0;
2121         adapter->csum_iphlen = 0;
2122         adapter->csum_thlen = 0;
2123         adapter->csum_mss = 0;
2124         adapter->csum_pktlen = 0;
2125
2126         adapter->tx_dd_head = 0;
2127         adapter->tx_dd_tail = 0;
2128         adapter->tx_nsegs = 0;
2129 }
2130
2131 static int
2132 em_get_hw_info(struct adapter *adapter)
2133 {
2134         device_t dev = adapter->dev;
2135
2136         /* Save off the information about this board */
2137         adapter->hw.vendor_id = pci_get_vendor(dev);
2138         adapter->hw.device_id = pci_get_device(dev);
2139         adapter->hw.revision_id = pci_get_revid(dev);
2140         adapter->hw.subsystem_vendor_id = pci_get_subvendor(dev);
2141         adapter->hw.subsystem_device_id = pci_get_subdevice(dev);
2142
2143         /* Do Shared Code Init and Setup */
2144         if (e1000_set_mac_type(&adapter->hw))
2145                 return ENXIO;
2146         return 0;
2147 }
2148
2149 static int
2150 em_alloc_pci_res(struct adapter *adapter)
2151 {
2152         device_t dev = adapter->dev;
2153         u_int intr_flags;
2154         int val, rid, msi_enable;
2155
2156         /* Enable bus mastering */
2157         pci_enable_busmaster(dev);
2158
2159         adapter->memory_rid = EM_BAR_MEM;
2160         adapter->memory = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
2161                                 &adapter->memory_rid, RF_ACTIVE);
2162         if (adapter->memory == NULL) {
2163                 device_printf(dev, "Unable to allocate bus resource: memory\n");
2164                 return (ENXIO);
2165         }
2166         adapter->osdep.mem_bus_space_tag =
2167             rman_get_bustag(adapter->memory);
2168         adapter->osdep.mem_bus_space_handle =
2169             rman_get_bushandle(adapter->memory);
2170
2171         /* XXX This is quite goofy, it is not actually used */
2172         adapter->hw.hw_addr = (uint8_t *)&adapter->osdep.mem_bus_space_handle;
2173
2174         /* Only older adapters use IO mapping */
2175         if (adapter->hw.mac.type > e1000_82543 &&
2176             adapter->hw.mac.type < e1000_82571) {
2177                 /* Figure our where our IO BAR is ? */
2178                 for (rid = PCIR_BAR(0); rid < PCIR_CARDBUSCIS;) {
2179                         val = pci_read_config(dev, rid, 4);
2180                         if (EM_BAR_TYPE(val) == EM_BAR_TYPE_IO) {
2181                                 adapter->io_rid = rid;
2182                                 break;
2183                         }
2184                         rid += 4;
2185                         /* check for 64bit BAR */
2186                         if (EM_BAR_MEM_TYPE(val) == EM_BAR_MEM_TYPE_64BIT)
2187                                 rid += 4;
2188                 }
2189                 if (rid >= PCIR_CARDBUSCIS) {
2190                         device_printf(dev, "Unable to locate IO BAR\n");
2191                         return (ENXIO);
2192                 }
2193                 adapter->ioport = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
2194                                         &adapter->io_rid, RF_ACTIVE);
2195                 if (adapter->ioport == NULL) {
2196                         device_printf(dev, "Unable to allocate bus resource: "
2197                             "ioport\n");
2198                         return (ENXIO);
2199                 }
2200                 adapter->hw.io_base = 0;
2201                 adapter->osdep.io_bus_space_tag =
2202                     rman_get_bustag(adapter->ioport);
2203                 adapter->osdep.io_bus_space_handle =
2204                     rman_get_bushandle(adapter->ioport);
2205         }
2206
2207         /*
2208          * Don't enable MSI-X on 82574, see:
2209          * 82574 specification update errata #15
2210          *
2211          * Don't enable MSI on PCI/PCI-X chips, see:
2212          * 82540 specification update errata #6
2213          * 82545 specification update errata #4
2214          *
2215          * Don't enable MSI on 82571/82572, see:
2216          * 82571/82572 specification update errata #63
2217          */
2218         msi_enable = em_msi_enable;
2219         if (msi_enable &&
2220             (!pci_is_pcie(dev) ||
2221              adapter->hw.mac.type == e1000_82571 ||
2222              adapter->hw.mac.type == e1000_82572))
2223                 msi_enable = 0;
2224
2225         adapter->intr_type = pci_alloc_1intr(dev, msi_enable,
2226             &adapter->intr_rid, &intr_flags);
2227
2228         if (adapter->intr_type == PCI_INTR_TYPE_LEGACY) {
2229                 int unshared;
2230
2231                 unshared = device_getenv_int(dev, "irq.unshared", 0);
2232                 if (!unshared) {
2233                         adapter->flags |= EM_FLAG_SHARED_INTR;
2234                         if (bootverbose)
2235                                 device_printf(dev, "IRQ shared\n");
2236                 } else {
2237                         intr_flags &= ~RF_SHAREABLE;
2238                         if (bootverbose)
2239                                 device_printf(dev, "IRQ unshared\n");
2240                 }
2241         }
2242
2243         adapter->intr_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
2244             &adapter->intr_rid, intr_flags);
2245         if (adapter->intr_res == NULL) {
2246                 device_printf(dev, "Unable to allocate bus resource: "
2247                     "interrupt\n");
2248                 return (ENXIO);
2249         }
2250
2251         adapter->hw.bus.pci_cmd_word = pci_read_config(dev, PCIR_COMMAND, 2);
2252         adapter->hw.back = &adapter->osdep;
2253         return (0);
2254 }
2255
2256 static void
2257 em_free_pci_res(struct adapter *adapter)
2258 {
2259         device_t dev = adapter->dev;
2260
2261         if (adapter->intr_res != NULL) {
2262                 bus_release_resource(dev, SYS_RES_IRQ,
2263                     adapter->intr_rid, adapter->intr_res);
2264         }
2265
2266         if (adapter->intr_type == PCI_INTR_TYPE_MSI)
2267                 pci_release_msi(dev);
2268
2269         if (adapter->memory != NULL) {
2270                 bus_release_resource(dev, SYS_RES_MEMORY,
2271                     adapter->memory_rid, adapter->memory);
2272         }
2273
2274         if (adapter->flash != NULL) {
2275                 bus_release_resource(dev, SYS_RES_MEMORY,
2276                     adapter->flash_rid, adapter->flash);
2277         }
2278
2279         if (adapter->ioport != NULL) {
2280                 bus_release_resource(dev, SYS_RES_IOPORT,
2281                     adapter->io_rid, adapter->ioport);
2282         }
2283 }
2284
2285 static int
2286 em_reset(struct adapter *adapter)
2287 {
2288         device_t dev = adapter->dev;
2289         uint16_t rx_buffer_size;
2290         uint32_t pba;
2291
2292         /* When hardware is reset, fifo_head is also reset */
2293         adapter->tx_fifo_head = 0;
2294
2295         /* Set up smart power down as default off on newer adapters. */
2296         if (!em_smart_pwr_down &&
2297             (adapter->hw.mac.type == e1000_82571 ||
2298              adapter->hw.mac.type == e1000_82572)) {
2299                 uint16_t phy_tmp = 0;
2300
2301                 /* Speed up time to link by disabling smart power down. */
2302                 e1000_read_phy_reg(&adapter->hw,
2303                     IGP02E1000_PHY_POWER_MGMT, &phy_tmp);
2304                 phy_tmp &= ~IGP02E1000_PM_SPD;
2305                 e1000_write_phy_reg(&adapter->hw,
2306                     IGP02E1000_PHY_POWER_MGMT, phy_tmp);
2307         }
2308
2309         /*
2310          * Packet Buffer Allocation (PBA)
2311          * Writing PBA sets the receive portion of the buffer
2312          * the remainder is used for the transmit buffer.
2313          *
2314          * Devices before the 82547 had a Packet Buffer of 64K.
2315          *   Default allocation: PBA=48K for Rx, leaving 16K for Tx.
2316          * After the 82547 the buffer was reduced to 40K.
2317          *   Default allocation: PBA=30K for Rx, leaving 10K for Tx.
2318          *   Note: default does not leave enough room for Jumbo Frame >10k.
2319          */
2320         switch (adapter->hw.mac.type) {
2321         case e1000_82547:
2322         case e1000_82547_rev_2: /* 82547: Total Packet Buffer is 40K */
2323                 if (adapter->max_frame_size > 8192)
2324                         pba = E1000_PBA_22K; /* 22K for Rx, 18K for Tx */
2325                 else
2326                         pba = E1000_PBA_30K; /* 30K for Rx, 10K for Tx */
2327                 adapter->tx_fifo_head = 0;
2328                 adapter->tx_head_addr = pba << EM_TX_HEAD_ADDR_SHIFT;
2329                 adapter->tx_fifo_size =
2330                     (E1000_PBA_40K - pba) << EM_PBA_BYTES_SHIFT;
2331                 break;
2332
2333         /* Total Packet Buffer on these is 48K */
2334         case e1000_82571:
2335         case e1000_82572:
2336         case e1000_80003es2lan:
2337                 pba = E1000_PBA_32K; /* 32K for Rx, 16K for Tx */
2338                 break;
2339
2340         case e1000_82573: /* 82573: Total Packet Buffer is 32K */
2341                 pba = E1000_PBA_12K; /* 12K for Rx, 20K for Tx */
2342                 break;
2343
2344         case e1000_82574:
2345         case e1000_82583:
2346                 pba = E1000_PBA_20K; /* 20K for Rx, 20K for Tx */
2347                 break;
2348
2349         case e1000_ich8lan:
2350                 pba = E1000_PBA_8K;
2351                 break;
2352
2353         case e1000_ich9lan:
2354         case e1000_ich10lan:
2355 #define E1000_PBA_10K   0x000A
2356                 pba = E1000_PBA_10K;
2357                 break;
2358
2359         case e1000_pchlan:
2360         case e1000_pch2lan:
2361                 pba = E1000_PBA_26K;
2362                 break;
2363
2364         default:
2365                 /* Devices before 82547 had a Packet Buffer of 64K.   */
2366                 if (adapter->max_frame_size > 8192)
2367                         pba = E1000_PBA_40K; /* 40K for Rx, 24K for Tx */
2368                 else
2369                         pba = E1000_PBA_48K; /* 48K for Rx, 16K for Tx */
2370         }
2371         E1000_WRITE_REG(&adapter->hw, E1000_PBA, pba);
2372
2373         /*
2374          * These parameters control the automatic generation (Tx) and
2375          * response (Rx) to Ethernet PAUSE frames.
2376          * - High water mark should allow for at least two frames to be
2377          *   received after sending an XOFF.
2378          * - Low water mark works best when it is very near the high water mark.
2379          *   This allows the receiver to restart by sending XON when it has
2380          *   drained a bit. Here we use an arbitary value of 1500 which will
2381          *   restart after one full frame is pulled from the buffer. There
2382          *   could be several smaller frames in the buffer and if so they will
2383          *   not trigger the XON until their total number reduces the buffer
2384          *   by 1500.
2385          * - The pause time is fairly large at 1000 x 512ns = 512 usec.
2386          */
2387         rx_buffer_size =
2388                 (E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff) << 10;
2389
2390         adapter->hw.fc.high_water = rx_buffer_size -
2391                                     roundup2(adapter->max_frame_size, 1024);
2392         adapter->hw.fc.low_water = adapter->hw.fc.high_water - 1500;
2393
2394         if (adapter->hw.mac.type == e1000_80003es2lan)
2395                 adapter->hw.fc.pause_time = 0xFFFF;
2396         else
2397                 adapter->hw.fc.pause_time = EM_FC_PAUSE_TIME;
2398
2399         adapter->hw.fc.send_xon = TRUE;
2400
2401         adapter->hw.fc.requested_mode = e1000_fc_full;
2402
2403         /*
2404          * Device specific overrides/settings
2405          */
2406         switch (adapter->hw.mac.type) {
2407         case e1000_pchlan:
2408                 /* Workaround: no TX flow ctrl for PCH */
2409                 adapter->hw.fc.requested_mode = e1000_fc_rx_pause;
2410                 adapter->hw.fc.pause_time = 0xFFFF; /* override */
2411                 if (adapter->arpcom.ac_if.if_mtu > ETHERMTU) {
2412                         adapter->hw.fc.high_water = 0x3500;
2413                         adapter->hw.fc.low_water = 0x1500;
2414                 } else {
2415                         adapter->hw.fc.high_water = 0x5000;
2416                         adapter->hw.fc.low_water = 0x3000;
2417                 }
2418                 adapter->hw.fc.refresh_time = 0x1000;
2419                 break;
2420
2421         case e1000_pch2lan:
2422                 adapter->hw.fc.high_water = 0x5C20;
2423                 adapter->hw.fc.low_water = 0x5048;
2424                 adapter->hw.fc.pause_time = 0x0650;
2425                 adapter->hw.fc.refresh_time = 0x0400;
2426                 /* Jumbos need adjusted PBA */
2427                 if (adapter->arpcom.ac_if.if_mtu > ETHERMTU)
2428                         E1000_WRITE_REG(&adapter->hw, E1000_PBA, 12);
2429                 else
2430                         E1000_WRITE_REG(&adapter->hw, E1000_PBA, 26);
2431                 break;
2432
2433         case e1000_ich9lan:
2434         case e1000_ich10lan:
2435                 if (adapter->arpcom.ac_if.if_mtu > ETHERMTU) {
2436                         adapter->hw.fc.high_water = 0x2800;
2437                         adapter->hw.fc.low_water =
2438                             adapter->hw.fc.high_water - 8;
2439                         break;
2440                 }
2441                 /* FALL THROUGH */
2442         default:
2443                 if (adapter->hw.mac.type == e1000_80003es2lan)
2444                         adapter->hw.fc.pause_time = 0xFFFF;
2445                 break;
2446         }
2447
2448         /* Issue a global reset */
2449         e1000_reset_hw(&adapter->hw);
2450         if (adapter->hw.mac.type >= e1000_82544)
2451                 E1000_WRITE_REG(&adapter->hw, E1000_WUC, 0);
2452         em_disable_aspm(adapter);
2453
2454         if (e1000_init_hw(&adapter->hw) < 0) {
2455                 device_printf(dev, "Hardware Initialization Failed\n");
2456                 return (EIO);
2457         }
2458
2459         E1000_WRITE_REG(&adapter->hw, E1000_VET, ETHERTYPE_VLAN);
2460         e1000_get_phy_info(&adapter->hw);
2461         e1000_check_for_link(&adapter->hw);
2462
2463         return (0);
2464 }
2465
2466 static void
2467 em_setup_ifp(struct adapter *adapter)
2468 {
2469         struct ifnet *ifp = &adapter->arpcom.ac_if;
2470
2471         if_initname(ifp, device_get_name(adapter->dev),
2472                     device_get_unit(adapter->dev));
2473         ifp->if_softc = adapter;
2474         ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
2475         ifp->if_init =  em_init;
2476         ifp->if_ioctl = em_ioctl;
2477         ifp->if_start = em_start;
2478 #ifdef IFPOLL_ENABLE
2479         ifp->if_npoll = em_npoll;
2480 #endif
2481         ifp->if_watchdog = em_watchdog;
2482         ifq_set_maxlen(&ifp->if_snd, adapter->num_tx_desc - 1);
2483         ifq_set_ready(&ifp->if_snd);
2484
2485         ether_ifattach(ifp, adapter->hw.mac.addr, NULL);
2486
2487         ifp->if_capabilities = IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU;
2488         if (adapter->hw.mac.type >= e1000_82543)
2489                 ifp->if_capabilities |= IFCAP_HWCSUM;
2490         if (adapter->flags & EM_FLAG_TSO)
2491                 ifp->if_capabilities |= IFCAP_TSO;
2492         ifp->if_capenable = ifp->if_capabilities;
2493
2494         if (ifp->if_capenable & IFCAP_TXCSUM)
2495                 ifp->if_hwassist |= EM_CSUM_FEATURES;
2496         if (ifp->if_capenable & IFCAP_TSO)
2497                 ifp->if_hwassist |= CSUM_TSO;
2498
2499         /*
2500          * Tell the upper layer(s) we support long frames.
2501          */
2502         ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header);
2503
2504         /*
2505          * Specify the media types supported by this adapter and register
2506          * callbacks to update media and link information
2507          */
2508         ifmedia_init(&adapter->media, IFM_IMASK,
2509                      em_media_change, em_media_status);
2510         if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
2511             adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
2512                 u_char fiber_type = IFM_1000_SX; /* default type */
2513
2514                 if (adapter->hw.mac.type == e1000_82545)
2515                         fiber_type = IFM_1000_LX;
2516                 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type | IFM_FDX,
2517                             0, NULL);
2518                 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type, 0, NULL);
2519         } else {
2520                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T, 0, NULL);
2521                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T | IFM_FDX,
2522                             0, NULL);
2523                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX,
2524                             0, NULL);
2525                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX | IFM_FDX,
2526                             0, NULL);
2527                 if (adapter->hw.phy.type != e1000_phy_ife) {
2528                         ifmedia_add(&adapter->media,
2529                                 IFM_ETHER | IFM_1000_T | IFM_FDX, 0, NULL);
2530                         ifmedia_add(&adapter->media,
2531                                 IFM_ETHER | IFM_1000_T, 0, NULL);
2532                 }
2533         }
2534         ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL);
2535         ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO);
2536 }
2537
2538
2539 /*
2540  * Workaround for SmartSpeed on 82541 and 82547 controllers
2541  */
2542 static void
2543 em_smartspeed(struct adapter *adapter)
2544 {
2545         uint16_t phy_tmp;
2546
2547         if (adapter->link_active || adapter->hw.phy.type != e1000_phy_igp ||
2548             adapter->hw.mac.autoneg == 0 ||
2549             (adapter->hw.phy.autoneg_advertised & ADVERTISE_1000_FULL) == 0)
2550                 return;
2551
2552         if (adapter->smartspeed == 0) {
2553                 /*
2554                  * If Master/Slave config fault is asserted twice,
2555                  * we assume back-to-back
2556                  */
2557                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2558                 if (!(phy_tmp & SR_1000T_MS_CONFIG_FAULT))
2559                         return;
2560                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2561                 if (phy_tmp & SR_1000T_MS_CONFIG_FAULT) {
2562                         e1000_read_phy_reg(&adapter->hw,
2563                             PHY_1000T_CTRL, &phy_tmp);
2564                         if (phy_tmp & CR_1000T_MS_ENABLE) {
2565                                 phy_tmp &= ~CR_1000T_MS_ENABLE;
2566                                 e1000_write_phy_reg(&adapter->hw,
2567                                     PHY_1000T_CTRL, phy_tmp);
2568                                 adapter->smartspeed++;
2569                                 if (adapter->hw.mac.autoneg &&
2570                                     !e1000_phy_setup_autoneg(&adapter->hw) &&
2571                                     !e1000_read_phy_reg(&adapter->hw,
2572                                      PHY_CONTROL, &phy_tmp)) {
2573                                         phy_tmp |= MII_CR_AUTO_NEG_EN |
2574                                                    MII_CR_RESTART_AUTO_NEG;
2575                                         e1000_write_phy_reg(&adapter->hw,
2576                                             PHY_CONTROL, phy_tmp);
2577                                 }
2578                         }
2579                 }
2580                 return;
2581         } else if (adapter->smartspeed == EM_SMARTSPEED_DOWNSHIFT) {
2582                 /* If still no link, perhaps using 2/3 pair cable */
2583                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_tmp);
2584                 phy_tmp |= CR_1000T_MS_ENABLE;
2585                 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_tmp);
2586                 if (adapter->hw.mac.autoneg &&
2587                     !e1000_phy_setup_autoneg(&adapter->hw) &&
2588                     !e1000_read_phy_reg(&adapter->hw, PHY_CONTROL, &phy_tmp)) {
2589                         phy_tmp |= MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG;
2590                         e1000_write_phy_reg(&adapter->hw, PHY_CONTROL, phy_tmp);
2591                 }
2592         }
2593
2594         /* Restart process after EM_SMARTSPEED_MAX iterations */
2595         if (adapter->smartspeed++ == EM_SMARTSPEED_MAX)
2596                 adapter->smartspeed = 0;
2597 }
2598
2599 static int
2600 em_dma_malloc(struct adapter *adapter, bus_size_t size,
2601               struct em_dma_alloc *dma)
2602 {
2603         dma->dma_vaddr = bus_dmamem_coherent_any(adapter->parent_dtag,
2604                                 EM_DBA_ALIGN, size, BUS_DMA_WAITOK,
2605                                 &dma->dma_tag, &dma->dma_map,
2606                                 &dma->dma_paddr);
2607         if (dma->dma_vaddr == NULL)
2608                 return ENOMEM;
2609         else
2610                 return 0;
2611 }
2612
2613 static void
2614 em_dma_free(struct adapter *adapter, struct em_dma_alloc *dma)
2615 {
2616         if (dma->dma_tag == NULL)
2617                 return;
2618         bus_dmamap_unload(dma->dma_tag, dma->dma_map);
2619         bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map);
2620         bus_dma_tag_destroy(dma->dma_tag);
2621 }
2622
2623 static int
2624 em_create_tx_ring(struct adapter *adapter)
2625 {
2626         device_t dev = adapter->dev;
2627         struct em_buffer *tx_buffer;
2628         int error, i;
2629
2630         adapter->tx_buffer_area =
2631                 kmalloc(sizeof(struct em_buffer) * adapter->num_tx_desc,
2632                         M_DEVBUF, M_WAITOK | M_ZERO);
2633
2634         /*
2635          * Create DMA tags for tx buffers
2636          */
2637         error = bus_dma_tag_create(adapter->parent_dtag, /* parent */
2638                         1, 0,                   /* alignment, bounds */
2639                         BUS_SPACE_MAXADDR,      /* lowaddr */
2640                         BUS_SPACE_MAXADDR,      /* highaddr */
2641                         NULL, NULL,             /* filter, filterarg */
2642                         EM_TSO_SIZE,            /* maxsize */
2643                         EM_MAX_SCATTER,         /* nsegments */
2644                         PAGE_SIZE,              /* maxsegsize */
2645                         BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW |
2646                         BUS_DMA_ONEBPAGE,       /* flags */
2647                         &adapter->txtag);
2648         if (error) {
2649                 device_printf(dev, "Unable to allocate TX DMA tag\n");
2650                 kfree(adapter->tx_buffer_area, M_DEVBUF);
2651                 adapter->tx_buffer_area = NULL;
2652                 return error;
2653         }
2654
2655         /*
2656          * Create DMA maps for tx buffers
2657          */
2658         for (i = 0; i < adapter->num_tx_desc; i++) {
2659                 tx_buffer = &adapter->tx_buffer_area[i];
2660
2661                 error = bus_dmamap_create(adapter->txtag,
2662                                           BUS_DMA_WAITOK | BUS_DMA_ONEBPAGE,
2663                                           &tx_buffer->map);
2664                 if (error) {
2665                         device_printf(dev, "Unable to create TX DMA map\n");
2666                         em_destroy_tx_ring(adapter, i);
2667                         return error;
2668                 }
2669         }
2670         return (0);
2671 }
2672
2673 static void
2674 em_init_tx_ring(struct adapter *adapter)
2675 {
2676         /* Clear the old ring contents */
2677         bzero(adapter->tx_desc_base,
2678             (sizeof(struct e1000_tx_desc)) * adapter->num_tx_desc);
2679
2680         /* Reset state */
2681         adapter->next_avail_tx_desc = 0;
2682         adapter->next_tx_to_clean = 0;
2683         adapter->num_tx_desc_avail = adapter->num_tx_desc;
2684 }
2685
2686 static void
2687 em_init_tx_unit(struct adapter *adapter)
2688 {
2689         uint32_t tctl, tarc, tipg = 0;
2690         uint64_t bus_addr;
2691
2692         /* Setup the Base and Length of the Tx Descriptor Ring */
2693         bus_addr = adapter->txdma.dma_paddr;
2694         E1000_WRITE_REG(&adapter->hw, E1000_TDLEN(0),
2695             adapter->num_tx_desc * sizeof(struct e1000_tx_desc));
2696         E1000_WRITE_REG(&adapter->hw, E1000_TDBAH(0),
2697             (uint32_t)(bus_addr >> 32));
2698         E1000_WRITE_REG(&adapter->hw, E1000_TDBAL(0),
2699             (uint32_t)bus_addr);
2700         /* Setup the HW Tx Head and Tail descriptor pointers */
2701         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), 0);
2702         E1000_WRITE_REG(&adapter->hw, E1000_TDH(0), 0);
2703
2704         /* Set the default values for the Tx Inter Packet Gap timer */
2705         switch (adapter->hw.mac.type) {
2706         case e1000_82542:
2707                 tipg = DEFAULT_82542_TIPG_IPGT;
2708                 tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2709                 tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2710                 break;
2711
2712         case e1000_80003es2lan:
2713                 tipg = DEFAULT_82543_TIPG_IPGR1;
2714                 tipg |= DEFAULT_80003ES2LAN_TIPG_IPGR2 <<
2715                     E1000_TIPG_IPGR2_SHIFT;
2716                 break;
2717
2718         default:
2719                 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
2720                     adapter->hw.phy.media_type ==
2721                     e1000_media_type_internal_serdes)
2722                         tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
2723                 else
2724                         tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
2725                 tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2726                 tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2727                 break;
2728         }
2729
2730         E1000_WRITE_REG(&adapter->hw, E1000_TIPG, tipg);
2731
2732         /* NOTE: 0 is not allowed for TIDV */
2733         E1000_WRITE_REG(&adapter->hw, E1000_TIDV, 1);
2734         if(adapter->hw.mac.type >= e1000_82540)
2735                 E1000_WRITE_REG(&adapter->hw, E1000_TADV, 0);
2736
2737         if (adapter->hw.mac.type == e1000_82571 ||
2738             adapter->hw.mac.type == e1000_82572) {
2739                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0));
2740                 tarc |= SPEED_MODE_BIT;
2741                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc);
2742         } else if (adapter->hw.mac.type == e1000_80003es2lan) {
2743                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0));
2744                 tarc |= 1;
2745                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc);
2746                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(1));
2747                 tarc |= 1;
2748                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(1), tarc);
2749         }
2750
2751         /* Program the Transmit Control Register */
2752         tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL);
2753         tctl &= ~E1000_TCTL_CT;
2754         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC | E1000_TCTL_EN |
2755                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2756
2757         if (adapter->hw.mac.type >= e1000_82571)
2758                 tctl |= E1000_TCTL_MULR;
2759
2760         /* This write will effectively turn on the transmit unit. */
2761         E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl);
2762
2763         if (adapter->hw.mac.type == e1000_82571 ||
2764             adapter->hw.mac.type == e1000_82572 ||
2765             adapter->hw.mac.type == e1000_80003es2lan) {
2766                 /* Bit 28 of TARC1 must be cleared when MULR is enabled */
2767                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(1));
2768                 tarc &= ~(1 << 28);
2769                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(1), tarc);
2770         }
2771 }
2772
2773 static void
2774 em_destroy_tx_ring(struct adapter *adapter, int ndesc)
2775 {
2776         struct em_buffer *tx_buffer;
2777         int i;
2778
2779         if (adapter->tx_buffer_area == NULL)
2780                 return;
2781
2782         for (i = 0; i < ndesc; i++) {
2783                 tx_buffer = &adapter->tx_buffer_area[i];
2784
2785                 KKASSERT(tx_buffer->m_head == NULL);
2786                 bus_dmamap_destroy(adapter->txtag, tx_buffer->map);
2787         }
2788         bus_dma_tag_destroy(adapter->txtag);
2789
2790         kfree(adapter->tx_buffer_area, M_DEVBUF);
2791         adapter->tx_buffer_area = NULL;
2792 }
2793
2794 /*
2795  * The offload context needs to be set when we transfer the first
2796  * packet of a particular protocol (TCP/UDP).  This routine has been
2797  * enhanced to deal with inserted VLAN headers.
2798  *
2799  * If the new packet's ether header length, ip header length and
2800  * csum offloading type are same as the previous packet, we should
2801  * avoid allocating a new csum context descriptor; mainly to take
2802  * advantage of the pipeline effect of the TX data read request.
2803  *
2804  * This function returns number of TX descrptors allocated for
2805  * csum context.
2806  */
2807 static int
2808 em_txcsum(struct adapter *adapter, struct mbuf *mp,
2809           uint32_t *txd_upper, uint32_t *txd_lower)
2810 {
2811         struct e1000_context_desc *TXD;
2812         int curr_txd, ehdrlen, csum_flags;
2813         uint32_t cmd, hdr_len, ip_hlen;
2814
2815         csum_flags = mp->m_pkthdr.csum_flags & EM_CSUM_FEATURES;
2816         ip_hlen = mp->m_pkthdr.csum_iphlen;
2817         ehdrlen = mp->m_pkthdr.csum_lhlen;
2818
2819         if (adapter->csum_lhlen == ehdrlen &&
2820             adapter->csum_iphlen == ip_hlen &&
2821             adapter->csum_flags == csum_flags) {
2822                 /*
2823                  * Same csum offload context as the previous packets;
2824                  * just return.
2825                  */
2826                 *txd_upper = adapter->csum_txd_upper;
2827                 *txd_lower = adapter->csum_txd_lower;
2828                 return 0;
2829         }
2830
2831         /*
2832          * Setup a new csum offload context.
2833          */
2834
2835         curr_txd = adapter->next_avail_tx_desc;
2836         TXD = (struct e1000_context_desc *)&adapter->tx_desc_base[curr_txd];
2837
2838         cmd = 0;
2839
2840         /* Setup of IP header checksum. */
2841         if (csum_flags & CSUM_IP) {
2842                 /*
2843                  * Start offset for header checksum calculation.
2844                  * End offset for header checksum calculation.
2845                  * Offset of place to put the checksum.
2846                  */
2847                 TXD->lower_setup.ip_fields.ipcss = ehdrlen;
2848                 TXD->lower_setup.ip_fields.ipcse =
2849                     htole16(ehdrlen + ip_hlen - 1);
2850                 TXD->lower_setup.ip_fields.ipcso =
2851                     ehdrlen + offsetof(struct ip, ip_sum);
2852                 cmd |= E1000_TXD_CMD_IP;
2853                 *txd_upper |= E1000_TXD_POPTS_IXSM << 8;
2854         }
2855         hdr_len = ehdrlen + ip_hlen;
2856
2857         if (csum_flags & CSUM_TCP) {
2858                 /*
2859                  * Start offset for payload checksum calculation.
2860                  * End offset for payload checksum calculation.
2861                  * Offset of place to put the checksum.
2862                  */
2863                 TXD->upper_setup.tcp_fields.tucss = hdr_len;
2864                 TXD->upper_setup.tcp_fields.tucse = htole16(0);
2865                 TXD->upper_setup.tcp_fields.tucso =
2866                     hdr_len + offsetof(struct tcphdr, th_sum);
2867                 cmd |= E1000_TXD_CMD_TCP;
2868                 *txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2869         } else if (csum_flags & CSUM_UDP) {
2870                 /*
2871                  * Start offset for header checksum calculation.
2872                  * End offset for header checksum calculation.
2873                  * Offset of place to put the checksum.
2874                  */
2875                 TXD->upper_setup.tcp_fields.tucss = hdr_len;
2876                 TXD->upper_setup.tcp_fields.tucse = htole16(0);
2877                 TXD->upper_setup.tcp_fields.tucso =
2878                     hdr_len + offsetof(struct udphdr, uh_sum);
2879                 *txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2880         }
2881
2882         *txd_lower = E1000_TXD_CMD_DEXT |       /* Extended descr type */
2883                      E1000_TXD_DTYP_D;          /* Data descr */
2884
2885         /* Save the information for this csum offloading context */
2886         adapter->csum_lhlen = ehdrlen;
2887         adapter->csum_iphlen = ip_hlen;
2888         adapter->csum_flags = csum_flags;
2889         adapter->csum_txd_upper = *txd_upper;
2890         adapter->csum_txd_lower = *txd_lower;
2891
2892         TXD->tcp_seg_setup.data = htole32(0);
2893         TXD->cmd_and_length =
2894             htole32(E1000_TXD_CMD_IFCS | E1000_TXD_CMD_DEXT | cmd);
2895
2896         if (++curr_txd == adapter->num_tx_desc)
2897                 curr_txd = 0;
2898
2899         KKASSERT(adapter->num_tx_desc_avail > 0);
2900         adapter->num_tx_desc_avail--;
2901
2902         adapter->next_avail_tx_desc = curr_txd;
2903         return 1;
2904 }
2905
2906 static void
2907 em_txeof(struct adapter *adapter)
2908 {
2909         struct ifnet *ifp = &adapter->arpcom.ac_if;
2910         struct em_buffer *tx_buffer;
2911         int first, num_avail;
2912
2913         if (adapter->tx_dd_head == adapter->tx_dd_tail)
2914                 return;
2915
2916         if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2917                 return;
2918
2919         num_avail = adapter->num_tx_desc_avail;
2920         first = adapter->next_tx_to_clean;
2921
2922         while (adapter->tx_dd_head != adapter->tx_dd_tail) {
2923                 struct e1000_tx_desc *tx_desc;
2924                 int dd_idx = adapter->tx_dd[adapter->tx_dd_head];
2925
2926                 tx_desc = &adapter->tx_desc_base[dd_idx];
2927                 if (tx_desc->upper.fields.status & E1000_TXD_STAT_DD) {
2928                         EM_INC_TXDD_IDX(adapter->tx_dd_head);
2929
2930                         if (++dd_idx == adapter->num_tx_desc)
2931                                 dd_idx = 0;
2932
2933                         while (first != dd_idx) {
2934                                 logif(pkt_txclean);
2935
2936                                 num_avail++;
2937
2938                                 tx_buffer = &adapter->tx_buffer_area[first];
2939                                 if (tx_buffer->m_head) {
2940                                         IFNET_STAT_INC(ifp, opackets, 1);
2941                                         bus_dmamap_unload(adapter->txtag,
2942                                                           tx_buffer->map);
2943                                         m_freem(tx_buffer->m_head);
2944                                         tx_buffer->m_head = NULL;
2945                                 }
2946
2947                                 if (++first == adapter->num_tx_desc)
2948                                         first = 0;
2949                         }
2950                 } else {
2951                         break;
2952                 }
2953         }
2954         adapter->next_tx_to_clean = first;
2955         adapter->num_tx_desc_avail = num_avail;
2956
2957         if (adapter->tx_dd_head == adapter->tx_dd_tail) {
2958                 adapter->tx_dd_head = 0;
2959                 adapter->tx_dd_tail = 0;
2960         }
2961
2962         if (!EM_IS_OACTIVE(adapter)) {
2963                 ifq_clr_oactive(&ifp->if_snd);
2964
2965                 /* All clean, turn off the timer */
2966                 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2967                         ifp->if_timer = 0;
2968         }
2969 }
2970
2971 static void
2972 em_tx_collect(struct adapter *adapter)
2973 {
2974         struct ifnet *ifp = &adapter->arpcom.ac_if;
2975         struct em_buffer *tx_buffer;
2976         int tdh, first, num_avail, dd_idx = -1;
2977
2978         if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2979                 return;
2980
2981         tdh = E1000_READ_REG(&adapter->hw, E1000_TDH(0));
2982         if (tdh == adapter->next_tx_to_clean)
2983                 return;
2984
2985         if (adapter->tx_dd_head != adapter->tx_dd_tail)
2986                 dd_idx = adapter->tx_dd[adapter->tx_dd_head];
2987
2988         num_avail = adapter->num_tx_desc_avail;
2989         first = adapter->next_tx_to_clean;
2990
2991         while (first != tdh) {
2992                 logif(pkt_txclean);
2993
2994                 num_avail++;
2995
2996                 tx_buffer = &adapter->tx_buffer_area[first];
2997                 if (tx_buffer->m_head) {
2998                         IFNET_STAT_INC(ifp, opackets, 1);
2999                         bus_dmamap_unload(adapter->txtag,
3000                                           tx_buffer->map);
3001                         m_freem(tx_buffer->m_head);
3002                         tx_buffer->m_head = NULL;
3003                 }
3004
3005                 if (first == dd_idx) {
3006                         EM_INC_TXDD_IDX(adapter->tx_dd_head);
3007                         if (adapter->tx_dd_head == adapter->tx_dd_tail) {
3008                                 adapter->tx_dd_head = 0;
3009                                 adapter->tx_dd_tail = 0;
3010                                 dd_idx = -1;
3011                         } else {
3012                                 dd_idx = adapter->tx_dd[adapter->tx_dd_head];
3013                         }
3014                 }
3015
3016                 if (++first == adapter->num_tx_desc)
3017                         first = 0;
3018         }
3019         adapter->next_tx_to_clean = first;
3020         adapter->num_tx_desc_avail = num_avail;
3021
3022         if (!EM_IS_OACTIVE(adapter)) {
3023                 ifq_clr_oactive(&ifp->if_snd);
3024
3025                 /* All clean, turn off the timer */
3026                 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
3027                         ifp->if_timer = 0;
3028         }
3029 }
3030
3031 /*
3032  * When Link is lost sometimes there is work still in the TX ring
3033  * which will result in a watchdog, rather than allow that do an
3034  * attempted cleanup and then reinit here.  Note that this has been
3035  * seens mostly with fiber adapters.
3036  */
3037 static void
3038 em_tx_purge(struct adapter *adapter)
3039 {
3040         struct ifnet *ifp = &adapter->arpcom.ac_if;
3041
3042         if (!adapter->link_active && ifp->if_timer) {
3043                 em_tx_collect(adapter);
3044                 if (ifp->if_timer) {
3045                         if_printf(ifp, "Link lost, TX pending, reinit\n");
3046                         ifp->if_timer = 0;
3047                         em_init(adapter);
3048                 }
3049         }
3050 }
3051
3052 static int
3053 em_newbuf(struct adapter *adapter, int i, int init)
3054 {
3055         struct mbuf *m;
3056         bus_dma_segment_t seg;
3057         bus_dmamap_t map;
3058         struct em_buffer *rx_buffer;
3059         int error, nseg;
3060
3061         m = m_getcl(init ? MB_WAIT : MB_DONTWAIT, MT_DATA, M_PKTHDR);
3062         if (m == NULL) {
3063                 adapter->mbuf_cluster_failed++;
3064                 if (init) {
3065                         if_printf(&adapter->arpcom.ac_if,
3066                                   "Unable to allocate RX mbuf\n");
3067                 }
3068                 return (ENOBUFS);
3069         }
3070         m->m_len = m->m_pkthdr.len = MCLBYTES;
3071
3072         if (adapter->max_frame_size <= MCLBYTES - ETHER_ALIGN)
3073                 m_adj(m, ETHER_ALIGN);
3074
3075         error = bus_dmamap_load_mbuf_segment(adapter->rxtag,
3076                         adapter->rx_sparemap, m,
3077                         &seg, 1, &nseg, BUS_DMA_NOWAIT);
3078         if (error) {
3079                 m_freem(m);
3080                 if (init) {
3081                         if_printf(&adapter->arpcom.ac_if,
3082                                   "Unable to load RX mbuf\n");
3083                 }
3084                 return (error);
3085         }
3086
3087         rx_buffer = &adapter->rx_buffer_area[i];
3088         if (rx_buffer->m_head != NULL)
3089                 bus_dmamap_unload(adapter->rxtag, rx_buffer->map);
3090
3091         map = rx_buffer->map;
3092         rx_buffer->map = adapter->rx_sparemap;
3093         adapter->rx_sparemap = map;
3094
3095         rx_buffer->m_head = m;
3096
3097         adapter->rx_desc_base[i].buffer_addr = htole64(seg.ds_addr);
3098         return (0);
3099 }
3100
3101 static int
3102 em_create_rx_ring(struct adapter *adapter)
3103 {
3104         device_t dev = adapter->dev;
3105         struct em_buffer *rx_buffer;
3106         int i, error;
3107
3108         adapter->rx_buffer_area =
3109                 kmalloc(sizeof(struct em_buffer) * adapter->num_rx_desc,
3110                         M_DEVBUF, M_WAITOK | M_ZERO);
3111
3112         /*
3113          * Create DMA tag for rx buffers
3114          */
3115         error = bus_dma_tag_create(adapter->parent_dtag, /* parent */
3116                         1, 0,                   /* alignment, bounds */
3117                         BUS_SPACE_MAXADDR,      /* lowaddr */
3118                         BUS_SPACE_MAXADDR,      /* highaddr */
3119                         NULL, NULL,             /* filter, filterarg */
3120                         MCLBYTES,               /* maxsize */
3121                         1,                      /* nsegments */
3122                         MCLBYTES,               /* maxsegsize */
3123                         BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW, /* flags */
3124                         &adapter->rxtag);
3125         if (error) {
3126                 device_printf(dev, "Unable to allocate RX DMA tag\n");
3127                 kfree(adapter->rx_buffer_area, M_DEVBUF);
3128                 adapter->rx_buffer_area = NULL;
3129                 return error;
3130         }
3131
3132         /*
3133          * Create spare DMA map for rx buffers
3134          */
3135         error = bus_dmamap_create(adapter->rxtag, BUS_DMA_WAITOK,
3136                                   &adapter->rx_sparemap);
3137         if (error) {
3138                 device_printf(dev, "Unable to create spare RX DMA map\n");
3139                 bus_dma_tag_destroy(adapter->rxtag);
3140                 kfree(adapter->rx_buffer_area, M_DEVBUF);
3141                 adapter->rx_buffer_area = NULL;
3142                 return error;
3143         }
3144
3145         /*
3146          * Create DMA maps for rx buffers
3147          */
3148         for (i = 0; i < adapter->num_rx_desc; i++) {
3149                 rx_buffer = &adapter->rx_buffer_area[i];
3150
3151                 error = bus_dmamap_create(adapter->rxtag, BUS_DMA_WAITOK,
3152                                           &rx_buffer->map);
3153                 if (error) {
3154                         device_printf(dev, "Unable to create RX DMA map\n");
3155                         em_destroy_rx_ring(adapter, i);
3156                         return error;
3157                 }
3158         }
3159         return (0);
3160 }
3161
3162 static int
3163 em_init_rx_ring(struct adapter *adapter)
3164 {
3165         int i, error;
3166
3167         /* Reset descriptor ring */
3168         bzero(adapter->rx_desc_base,
3169             (sizeof(struct e1000_rx_desc)) * adapter->num_rx_desc);
3170
3171         /* Allocate new ones. */
3172         for (i = 0; i < adapter->num_rx_desc; i++) {
3173                 error = em_newbuf(adapter, i, 1);
3174                 if (error)
3175                         return (error);
3176         }
3177
3178         /* Setup our descriptor pointers */
3179         adapter->next_rx_desc_to_check = 0;
3180
3181         return (0);
3182 }
3183
3184 static void
3185 em_init_rx_unit(struct adapter *adapter)
3186 {
3187         struct ifnet *ifp = &adapter->arpcom.ac_if;
3188         uint64_t bus_addr;
3189         uint32_t rctl;
3190
3191         /*
3192          * Make sure receives are disabled while setting
3193          * up the descriptor ring
3194          */
3195         rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
3196         E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);
3197
3198         if (adapter->hw.mac.type >= e1000_82540) {
3199                 uint32_t itr;
3200
3201                 /*
3202                  * Set the interrupt throttling rate. Value is calculated
3203                  * as ITR = 1 / (INT_THROTTLE_CEIL * 256ns)
3204                  */
3205                 if (adapter->int_throttle_ceil)
3206                         itr = 1000000000 / 256 / adapter->int_throttle_ceil;
3207                 else
3208                         itr = 0;
3209                 em_set_itr(adapter, itr);
3210         }
3211
3212         /* Disable accelerated ackknowledge */
3213         if (adapter->hw.mac.type == e1000_82574) {
3214                 E1000_WRITE_REG(&adapter->hw,
3215                     E1000_RFCTL, E1000_RFCTL_ACK_DIS);
3216         }
3217
3218         /* Receive Checksum Offload for TCP and UDP */
3219         if (ifp->if_capenable & IFCAP_RXCSUM) {
3220                 uint32_t rxcsum;
3221
3222                 rxcsum = E1000_READ_REG(&adapter->hw, E1000_RXCSUM);
3223                 rxcsum |= (E1000_RXCSUM_IPOFL | E1000_RXCSUM_TUOFL);
3224                 E1000_WRITE_REG(&adapter->hw, E1000_RXCSUM, rxcsum);
3225         }
3226
3227         /*
3228          * XXX TEMPORARY WORKAROUND: on some systems with 82573
3229          * long latencies are observed, like Lenovo X60. This
3230          * change eliminates the problem, but since having positive
3231          * values in RDTR is a known source of problems on other
3232          * platforms another solution is being sought.
3233          */
3234         if (em_82573_workaround && adapter->hw.mac.type == e1000_82573) {
3235                 E1000_WRITE_REG(&adapter->hw, E1000_RADV, EM_RADV_82573);
3236                 E1000_WRITE_REG(&adapter->hw, E1000_RDTR, EM_RDTR_82573);
3237         }
3238
3239         /*
3240          * Setup the Base and Length of the Rx Descriptor Ring
3241          */
3242         bus_addr = adapter->rxdma.dma_paddr;
3243         E1000_WRITE_REG(&adapter->hw, E1000_RDLEN(0),
3244             adapter->num_rx_desc * sizeof(struct e1000_rx_desc));
3245         E1000_WRITE_REG(&adapter->hw, E1000_RDBAH(0),
3246             (uint32_t)(bus_addr >> 32));
3247         E1000_WRITE_REG(&adapter->hw, E1000_RDBAL(0),
3248             (uint32_t)bus_addr);
3249
3250         /*
3251          * Setup the HW Rx Head and Tail Descriptor Pointers
3252          */
3253         E1000_WRITE_REG(&adapter->hw, E1000_RDH(0), 0);
3254         E1000_WRITE_REG(&adapter->hw, E1000_RDT(0), adapter->num_rx_desc - 1);
3255
3256         /* Set PTHRESH for improved jumbo performance */
3257         if (((adapter->hw.mac.type == e1000_ich9lan) ||
3258             (adapter->hw.mac.type == e1000_pch2lan) ||
3259             (adapter->hw.mac.type == e1000_ich10lan)) &&
3260             (ifp->if_mtu > ETHERMTU)) {
3261                 uint32_t rxdctl;
3262
3263                 rxdctl = E1000_READ_REG(&adapter->hw, E1000_RXDCTL(0));
3264                 E1000_WRITE_REG(&adapter->hw, E1000_RXDCTL(0), rxdctl | 3);
3265         }
3266
3267         if (adapter->hw.mac.type == e1000_pch2lan) {
3268                 if (ifp->if_mtu > ETHERMTU)
3269                         e1000_lv_jumbo_workaround_ich8lan(&adapter->hw, TRUE);
3270                 else
3271                         e1000_lv_jumbo_workaround_ich8lan(&adapter->hw, FALSE);
3272         }
3273
3274         /* Setup the Receive Control Register */
3275         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3276         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_LBM_NO |
3277                 E1000_RCTL_RDMTS_HALF |
3278                 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3279
3280         /* Make sure VLAN Filters are off */
3281         rctl &= ~E1000_RCTL_VFE;
3282
3283         if (e1000_tbi_sbp_enabled_82543(&adapter->hw))
3284                 rctl |= E1000_RCTL_SBP;
3285         else
3286                 rctl &= ~E1000_RCTL_SBP;
3287
3288         switch (adapter->rx_buffer_len) {
3289         default:
3290         case 2048:
3291                 rctl |= E1000_RCTL_SZ_2048;
3292                 break;
3293
3294         case 4096:
3295                 rctl |= E1000_RCTL_SZ_4096 |
3296                     E1000_RCTL_BSEX | E1000_RCTL_LPE;
3297                 break;
3298
3299         case 8192:
3300                 rctl |= E1000_RCTL_SZ_8192 |
3301                     E1000_RCTL_BSEX | E1000_RCTL_LPE;
3302                 break;
3303
3304         case 16384:
3305                 rctl |= E1000_RCTL_SZ_16384 |
3306                     E1000_RCTL_BSEX | E1000_RCTL_LPE;
3307                 break;
3308         }
3309
3310         if (ifp->if_mtu > ETHERMTU)
3311                 rctl |= E1000_RCTL_LPE;
3312         else
3313                 rctl &= ~E1000_RCTL_LPE;
3314
3315         /* Enable Receives */
3316         E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl);
3317 }
3318
3319 static void
3320 em_destroy_rx_ring(struct adapter *adapter, int ndesc)
3321 {
3322         struct em_buffer *rx_buffer;
3323         int i;
3324
3325         if (adapter->rx_buffer_area == NULL)
3326                 return;
3327
3328         for (i = 0; i < ndesc; i++) {
3329                 rx_buffer = &adapter->rx_buffer_area[i];
3330
3331                 KKASSERT(rx_buffer->m_head == NULL);
3332                 bus_dmamap_destroy(adapter->rxtag, rx_buffer->map);
3333         }
3334         bus_dmamap_destroy(adapter->rxtag, adapter->rx_sparemap);
3335         bus_dma_tag_destroy(adapter->rxtag);
3336
3337         kfree(adapter->rx_buffer_area, M_DEVBUF);
3338         adapter->rx_buffer_area = NULL;
3339 }
3340
3341 static void
3342 em_rxeof(struct adapter *adapter, int count)
3343 {
3344         struct ifnet *ifp = &adapter->arpcom.ac_if;
3345         uint8_t status, accept_frame = 0, eop = 0;
3346         uint16_t len, desc_len, prev_len_adj;
3347         struct e1000_rx_desc *current_desc;
3348         struct mbuf *mp;
3349         int i;
3350
3351         i = adapter->next_rx_desc_to_check;
3352         current_desc = &adapter->rx_desc_base[i];
3353
3354         if (!(current_desc->status & E1000_RXD_STAT_DD))
3355                 return;
3356
3357         while ((current_desc->status & E1000_RXD_STAT_DD) && count != 0) {
3358                 struct mbuf *m = NULL;
3359
3360                 logif(pkt_receive);
3361
3362                 mp = adapter->rx_buffer_area[i].m_head;
3363
3364                 /*
3365                  * Can't defer bus_dmamap_sync(9) because TBI_ACCEPT
3366                  * needs to access the last received byte in the mbuf.
3367                  */
3368                 bus_dmamap_sync(adapter->rxtag, adapter->rx_buffer_area[i].map,
3369                                 BUS_DMASYNC_POSTREAD);
3370
3371                 accept_frame = 1;
3372                 prev_len_adj = 0;
3373                 desc_len = le16toh(current_desc->length);
3374                 status = current_desc->status;
3375                 if (status & E1000_RXD_STAT_EOP) {
3376                         count--;
3377                         eop = 1;
3378                         if (desc_len < ETHER_CRC_LEN) {
3379                                 len = 0;
3380                                 prev_len_adj = ETHER_CRC_LEN - desc_len;
3381                         } else {
3382                                 len = desc_len - ETHER_CRC_LEN;
3383                         }
3384                 } else {
3385                         eop = 0;
3386                         len = desc_len;
3387                 }
3388
3389                 if (current_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
3390                         uint8_t last_byte;
3391                         uint32_t pkt_len = desc_len;
3392
3393                         if (adapter->fmp != NULL)
3394                                 pkt_len += adapter->fmp->m_pkthdr.len;
3395
3396                         last_byte = *(mtod(mp, caddr_t) + desc_len - 1);
3397                         if (TBI_ACCEPT(&adapter->hw, status,
3398                             current_desc->errors, pkt_len, last_byte,
3399                             adapter->min_frame_size, adapter->max_frame_size)) {
3400                                 e1000_tbi_adjust_stats_82543(&adapter->hw,
3401                                     &adapter->stats, pkt_len,
3402                                     adapter->hw.mac.addr,
3403                                     adapter->max_frame_size);
3404                                 if (len > 0)
3405                                         len--;
3406                         } else {
3407                                 accept_frame = 0;
3408                         }
3409                 }
3410
3411                 if (accept_frame) {
3412                         if (em_newbuf(adapter, i, 0) != 0) {
3413                                 IFNET_STAT_INC(ifp, iqdrops, 1);
3414                                 goto discard;
3415                         }
3416
3417                         /* Assign correct length to the current fragment */
3418                         mp->m_len = len;
3419
3420                         if (adapter->fmp == NULL) {
3421                                 mp->m_pkthdr.len = len;
3422                                 adapter->fmp = mp; /* Store the first mbuf */
3423                                 adapter->lmp = mp;
3424                         } else {
3425                                 /*
3426                                  * Chain mbuf's together
3427                                  */
3428
3429                                 /*
3430                                  * Adjust length of previous mbuf in chain if
3431                                  * we received less than 4 bytes in the last
3432                                  * descriptor.
3433                                  */
3434                                 if (prev_len_adj > 0) {
3435                                         adapter->lmp->m_len -= prev_len_adj;
3436                                         adapter->fmp->m_pkthdr.len -=
3437                                             prev_len_adj;
3438                                 }
3439                                 adapter->lmp->m_next = mp;
3440                                 adapter->lmp = adapter->lmp->m_next;
3441                                 adapter->fmp->m_pkthdr.len += len;
3442                         }
3443
3444                         if (eop) {
3445                                 adapter->fmp->m_pkthdr.rcvif = ifp;
3446                                 IFNET_STAT_INC(ifp, ipackets, 1);
3447
3448                                 if (ifp->if_capenable & IFCAP_RXCSUM) {
3449                                         em_rxcsum(adapter, current_desc,
3450                                                   adapter->fmp);
3451                                 }
3452
3453                                 if (status & E1000_RXD_STAT_VP) {
3454                                         adapter->fmp->m_pkthdr.ether_vlantag =
3455                                             (le16toh(current_desc->special) &
3456                                             E1000_RXD_SPC_VLAN_MASK);
3457                                         adapter->fmp->m_flags |= M_VLANTAG;
3458                                 }
3459                                 m = adapter->fmp;
3460                                 adapter->fmp = NULL;
3461                                 adapter->lmp = NULL;
3462                         }
3463                 } else {
3464                         IFNET_STAT_INC(ifp, ierrors, 1);
3465 discard:
3466 #ifdef foo
3467                         /* Reuse loaded DMA map and just update mbuf chain */
3468                         mp = adapter->rx_buffer_area[i].m_head;
3469                         mp->m_len = mp->m_pkthdr.len = MCLBYTES;
3470                         mp->m_data = mp->m_ext.ext_buf;
3471                         mp->m_next = NULL;
3472                         if (adapter->max_frame_size <= (MCLBYTES - ETHER_ALIGN))
3473                                 m_adj(mp, ETHER_ALIGN);
3474 #endif
3475                         if (adapter->fmp != NULL) {
3476                                 m_freem(adapter->fmp);
3477                                 adapter->fmp = NULL;
3478                                 adapter->lmp = NULL;
3479                         }
3480                         m = NULL;
3481                 }
3482
3483                 /* Zero out the receive descriptors status. */
3484                 current_desc->status = 0;
3485
3486                 if (m != NULL)
3487                         ifp->if_input(ifp, m);
3488
3489                 /* Advance our pointers to the next descriptor. */
3490                 if (++i == adapter->num_rx_desc)
3491                         i = 0;
3492                 current_desc = &adapter->rx_desc_base[i];
3493         }
3494         adapter->next_rx_desc_to_check = i;
3495
3496         /* Advance the E1000's Receive Queue #0  "Tail Pointer". */
3497         if (--i < 0)
3498                 i = adapter->num_rx_desc - 1;
3499         E1000_WRITE_REG(&adapter->hw, E1000_RDT(0), i);
3500 }
3501
3502 static void
3503 em_rxcsum(struct adapter *adapter, struct e1000_rx_desc *rx_desc,
3504           struct mbuf *mp)
3505 {
3506         /* 82543 or newer only */
3507         if (adapter->hw.mac.type < e1000_82543 ||
3508             /* Ignore Checksum bit is set */
3509             (rx_desc->status & E1000_RXD_STAT_IXSM))
3510                 return;
3511
3512         if ((rx_desc->status & E1000_RXD_STAT_IPCS) &&
3513             !(rx_desc->errors & E1000_RXD_ERR_IPE)) {
3514                 /* IP Checksum Good */
3515                 mp->m_pkthdr.csum_flags |= CSUM_IP_CHECKED | CSUM_IP_VALID;
3516         }
3517
3518         if ((rx_desc->status & E1000_RXD_STAT_TCPCS) &&
3519             !(rx_desc->errors & E1000_RXD_ERR_TCPE)) {
3520                 mp->m_pkthdr.csum_flags |= CSUM_DATA_VALID |
3521                                            CSUM_PSEUDO_HDR |
3522                                            CSUM_FRAG_NOT_CHECKED;
3523                 mp->m_pkthdr.csum_data = htons(0xffff);
3524         }
3525 }
3526
3527 static void
3528 em_enable_intr(struct adapter *adapter)
3529 {
3530         uint32_t ims_mask = IMS_ENABLE_MASK;
3531
3532         lwkt_serialize_handler_enable(adapter->arpcom.ac_if.if_serializer);
3533
3534 #if 0
3535         /* XXX MSIX */
3536         if (adapter->hw.mac.type == e1000_82574) {
3537                 E1000_WRITE_REG(&adapter->hw, EM_EIAC, EM_MSIX_MASK);
3538                 ims_mask |= EM_MSIX_MASK;
3539         }
3540 #endif
3541         E1000_WRITE_REG(&adapter->hw, E1000_IMS, ims_mask);
3542 }
3543
3544 static void
3545 em_disable_intr(struct adapter *adapter)
3546 {
3547         uint32_t clear = 0xffffffff;
3548
3549         /*
3550          * The first version of 82542 had an errata where when link was forced
3551          * it would stay up even up even if the cable was disconnected.
3552          * Sequence errors were used to detect the disconnect and then the
3553          * driver would unforce the link.  This code in the in the ISR.  For
3554          * this to work correctly the Sequence error interrupt had to be
3555          * enabled all the time.
3556          */
3557         if (adapter->hw.mac.type == e1000_82542 &&
3558             adapter->hw.revision_id == E1000_REVISION_2)
3559                 clear &= ~E1000_ICR_RXSEQ;
3560         else if (adapter->hw.mac.type == e1000_82574)
3561                 E1000_WRITE_REG(&adapter->hw, EM_EIAC, 0);
3562
3563         E1000_WRITE_REG(&adapter->hw, E1000_IMC, clear);
3564
3565         adapter->npoll.ifpc_stcount = 0;
3566
3567         lwkt_serialize_handler_disable(adapter->arpcom.ac_if.if_serializer);
3568 }
3569
3570 /*
3571  * Bit of a misnomer, what this really means is
3572  * to enable OS management of the system... aka
3573  * to disable special hardware management features
3574  */
3575 static void
3576 em_get_mgmt(struct adapter *adapter)
3577 {
3578         /* A shared code workaround */
3579 #define E1000_82542_MANC2H E1000_MANC2H
3580         if (adapter->flags & EM_FLAG_HAS_MGMT) {
3581                 int manc2h = E1000_READ_REG(&adapter->hw, E1000_MANC2H);
3582                 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC);
3583
3584                 /* disable hardware interception of ARP */
3585                 manc &= ~(E1000_MANC_ARP_EN);
3586
3587                 /* enable receiving management packets to the host */
3588                 if (adapter->hw.mac.type >= e1000_82571) {
3589                         manc |= E1000_MANC_EN_MNG2HOST;
3590 #define E1000_MNG2HOST_PORT_623 (1 << 5)
3591 #define E1000_MNG2HOST_PORT_664 (1 << 6)
3592                         manc2h |= E1000_MNG2HOST_PORT_623;
3593                         manc2h |= E1000_MNG2HOST_PORT_664;
3594                         E1000_WRITE_REG(&adapter->hw, E1000_MANC2H, manc2h);
3595                 }
3596
3597                 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc);
3598         }
3599 }
3600
3601 /*
3602  * Give control back to hardware management
3603  * controller if there is one.
3604  */
3605 static void
3606 em_rel_mgmt(struct adapter *adapter)
3607 {
3608         if (adapter->flags & EM_FLAG_HAS_MGMT) {
3609                 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC);
3610
3611                 /* re-enable hardware interception of ARP */
3612                 manc |= E1000_MANC_ARP_EN;
3613
3614                 if (adapter->hw.mac.type >= e1000_82571)
3615                         manc &= ~E1000_MANC_EN_MNG2HOST;
3616
3617                 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc);
3618         }
3619 }
3620
3621 /*
3622  * em_get_hw_control() sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
3623  * For ASF and Pass Through versions of f/w this means that
3624  * the driver is loaded.  For AMT version (only with 82573)
3625  * of the f/w this means that the network i/f is open.
3626  */
3627 static void
3628 em_get_hw_control(struct adapter *adapter)
3629 {
3630         /* Let firmware know the driver has taken over */
3631         if (adapter->hw.mac.type == e1000_82573) {
3632                 uint32_t swsm;
3633
3634                 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM);
3635                 E1000_WRITE_REG(&adapter->hw, E1000_SWSM,
3636                     swsm | E1000_SWSM_DRV_LOAD);
3637         } else {
3638                 uint32_t ctrl_ext;
3639
3640                 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
3641                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
3642                     ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
3643         }
3644         adapter->flags |= EM_FLAG_HW_CTRL;
3645 }
3646
3647 /*
3648  * em_rel_hw_control() resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
3649  * For ASF and Pass Through versions of f/w this means that the
3650  * driver is no longer loaded.  For AMT version (only with 82573)
3651  * of the f/w this means that the network i/f is closed.
3652  */
3653 static void
3654 em_rel_hw_control(struct adapter *adapter)
3655 {
3656         if ((adapter->flags & EM_FLAG_HW_CTRL) == 0)
3657                 return;
3658         adapter->flags &= ~EM_FLAG_HW_CTRL;
3659
3660         /* Let firmware taken over control of h/w */
3661         if (adapter->hw.mac.type == e1000_82573) {
3662                 uint32_t swsm;
3663
3664                 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM);
3665                 E1000_WRITE_REG(&adapter->hw, E1000_SWSM,
3666                     swsm & ~E1000_SWSM_DRV_LOAD);
3667         } else {
3668                 uint32_t ctrl_ext;
3669
3670                 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
3671                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
3672                     ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
3673         }
3674 }
3675
3676 static int
3677 em_is_valid_eaddr(const uint8_t *addr)
3678 {
3679         char zero_addr[ETHER_ADDR_LEN] = { 0, 0, 0, 0, 0, 0 };
3680
3681         if ((addr[0] & 1) || !bcmp(addr, zero_addr, ETHER_ADDR_LEN))
3682                 return (FALSE);
3683
3684         return (TRUE);
3685 }
3686
3687 /*
3688  * Enable PCI Wake On Lan capability
3689  */
3690 void
3691 em_enable_wol(device_t dev)
3692 {
3693         uint16_t cap, status;
3694         uint8_t id;
3695
3696         /* First find the capabilities pointer*/
3697         cap = pci_read_config(dev, PCIR_CAP_PTR, 2);
3698
3699         /* Read the PM Capabilities */
3700         id = pci_read_config(dev, cap, 1);
3701         if (id != PCIY_PMG)     /* Something wrong */
3702                 return;
3703
3704         /*
3705          * OK, we have the power capabilities,
3706          * so now get the status register
3707          */
3708         cap += PCIR_POWER_STATUS;
3709         status = pci_read_config(dev, cap, 2);
3710         status |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE;
3711         pci_write_config(dev, cap, status, 2);
3712 }
3713
3714
3715 /*
3716  * 82544 Coexistence issue workaround.
3717  *    There are 2 issues.
3718  *       1. Transmit Hang issue.
3719  *    To detect this issue, following equation can be used...
3720  *        SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3721  *        If SUM[3:0] is in between 1 to 4, we will have this issue.
3722  *
3723  *       2. DAC issue.
3724  *    To detect this issue, following equation can be used...
3725  *        SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3726  *        If SUM[3:0] is in between 9 to c, we will have this issue.
3727  *
3728  *    WORKAROUND:
3729  *        Make sure we do not have ending address
3730  *        as 1,2,3,4(Hang) or 9,a,b,c (DAC)
3731  */
3732 static uint32_t
3733 em_82544_fill_desc(bus_addr_t address, uint32_t length, PDESC_ARRAY desc_array)
3734 {
3735         uint32_t safe_terminator;
3736
3737         /*
3738          * Since issue is sensitive to length and address.
3739          * Let us first check the address...
3740          */
3741         if (length <= 4) {
3742                 desc_array->descriptor[0].address = address;
3743                 desc_array->descriptor[0].length = length;
3744                 desc_array->elements = 1;
3745                 return (desc_array->elements);
3746         }
3747
3748         safe_terminator =
3749         (uint32_t)((((uint32_t)address & 0x7) + (length & 0xF)) & 0xF);
3750
3751         /* If it does not fall between 0x1 to 0x4 and 0x9 to 0xC then return */
3752         if (safe_terminator == 0 ||
3753             (safe_terminator > 4 && safe_terminator < 9) ||
3754             (safe_terminator > 0xC && safe_terminator <= 0xF)) {
3755                 desc_array->descriptor[0].address = address;
3756                 desc_array->descriptor[0].length = length;
3757                 desc_array->elements = 1;
3758                 return (desc_array->elements);
3759         }
3760
3761         desc_array->descriptor[0].address = address;
3762         desc_array->descriptor[0].length = length - 4;
3763         desc_array->descriptor[1].address = address + (length - 4);
3764         desc_array->descriptor[1].length = 4;
3765         desc_array->elements = 2;
3766         return (desc_array->elements);
3767 }
3768
3769 static void
3770 em_update_stats(struct adapter *adapter)
3771 {
3772         struct ifnet *ifp = &adapter->arpcom.ac_if;
3773
3774         if (adapter->hw.phy.media_type == e1000_media_type_copper ||
3775             (E1000_READ_REG(&adapter->hw, E1000_STATUS) & E1000_STATUS_LU)) {
3776                 adapter->stats.symerrs +=
3777                         E1000_READ_REG(&adapter->hw, E1000_SYMERRS);
3778                 adapter->stats.sec += E1000_READ_REG(&adapter->hw, E1000_SEC);
3779         }
3780         adapter->stats.crcerrs += E1000_READ_REG(&adapter->hw, E1000_CRCERRS);
3781         adapter->stats.mpc += E1000_READ_REG(&adapter->hw, E1000_MPC);
3782         adapter->stats.scc += E1000_READ_REG(&adapter->hw, E1000_SCC);
3783         adapter->stats.ecol += E1000_READ_REG(&adapter->hw, E1000_ECOL);
3784
3785         adapter->stats.mcc += E1000_READ_REG(&adapter->hw, E1000_MCC);
3786         adapter->stats.latecol += E1000_READ_REG(&adapter->hw, E1000_LATECOL);
3787         adapter->stats.colc += E1000_READ_REG(&adapter->hw, E1000_COLC);
3788         adapter->stats.dc += E1000_READ_REG(&adapter->hw, E1000_DC);
3789         adapter->stats.rlec += E1000_READ_REG(&adapter->hw, E1000_RLEC);
3790         adapter->stats.xonrxc += E1000_READ_REG(&adapter->hw, E1000_XONRXC);
3791         adapter->stats.xontxc += E1000_READ_REG(&adapter->hw, E1000_XONTXC);
3792         adapter->stats.xoffrxc += E1000_READ_REG(&adapter->hw, E1000_XOFFRXC);
3793         adapter->stats.xofftxc += E1000_READ_REG(&adapter->hw, E1000_XOFFTXC);
3794         adapter->stats.fcruc += E1000_READ_REG(&adapter->hw, E1000_FCRUC);
3795         adapter->stats.prc64 += E1000_READ_REG(&adapter->hw, E1000_PRC64);
3796         adapter->stats.prc127 += E1000_READ_REG(&adapter->hw, E1000_PRC127);
3797         adapter->stats.prc255 += E1000_READ_REG(&adapter->hw, E1000_PRC255);
3798         adapter->stats.prc511 += E1000_READ_REG(&adapter->hw, E1000_PRC511);
3799         adapter->stats.prc1023 += E1000_READ_REG(&adapter->hw, E1000_PRC1023);
3800         adapter->stats.prc1522 += E1000_READ_REG(&adapter->hw, E1000_PRC1522);
3801         adapter->stats.gprc += E1000_READ_REG(&adapter->hw, E1000_GPRC);
3802         adapter->stats.bprc += E1000_READ_REG(&adapter->hw, E1000_BPRC);
3803         adapter->stats.mprc += E1000_READ_REG(&adapter->hw, E1000_MPRC);
3804         adapter->stats.gptc += E1000_READ_REG(&adapter->hw, E1000_GPTC);
3805
3806         /* For the 64-bit byte counters the low dword must be read first. */
3807         /* Both registers clear on the read of the high dword */
3808
3809         adapter->stats.gorc += E1000_READ_REG(&adapter->hw, E1000_GORCH);
3810         adapter->stats.gotc += E1000_READ_REG(&adapter->hw, E1000_GOTCH);
3811
3812         adapter->stats.rnbc += E1000_READ_REG(&adapter->hw, E1000_RNBC);
3813         adapter->stats.ruc += E1000_READ_REG(&adapter->hw, E1000_RUC);
3814         adapter->stats.rfc += E1000_READ_REG(&adapter->hw, E1000_RFC);
3815         adapter->stats.roc += E1000_READ_REG(&adapter->hw, E1000_ROC);
3816         adapter->stats.rjc += E1000_READ_REG(&adapter->hw, E1000_RJC);
3817
3818         adapter->stats.tor += E1000_READ_REG(&adapter->hw, E1000_TORH);
3819         adapter->stats.tot += E1000_READ_REG(&adapter->hw, E1000_TOTH);
3820
3821         adapter->stats.tpr += E1000_READ_REG(&adapter->hw, E1000_TPR);
3822         adapter->stats.tpt += E1000_READ_REG(&adapter->hw, E1000_TPT);
3823         adapter->stats.ptc64 += E1000_READ_REG(&adapter->hw, E1000_PTC64);
3824         adapter->stats.ptc127 += E1000_READ_REG(&adapter->hw, E1000_PTC127);
3825         adapter->stats.ptc255 += E1000_READ_REG(&adapter->hw, E1000_PTC255);
3826         adapter->stats.ptc511 += E1000_READ_REG(&adapter->hw, E1000_PTC511);
3827         adapter->stats.ptc1023 += E1000_READ_REG(&adapter->hw, E1000_PTC1023);
3828         adapter->stats.ptc1522 += E1000_READ_REG(&adapter->hw, E1000_PTC1522);
3829         adapter->stats.mptc += E1000_READ_REG(&adapter->hw, E1000_MPTC);
3830         adapter->stats.bptc += E1000_READ_REG(&adapter->hw, E1000_BPTC);
3831
3832         if (adapter->hw.mac.type >= e1000_82543) {
3833                 adapter->stats.algnerrc +=
3834                 E1000_READ_REG(&adapter->hw, E1000_ALGNERRC);
3835                 adapter->stats.rxerrc +=
3836                 E1000_READ_REG(&adapter->hw, E1000_RXERRC);
3837                 adapter->stats.tncrs +=
3838                 E1000_READ_REG(&adapter->hw, E1000_TNCRS);
3839                 adapter->stats.cexterr +=
3840                 E1000_READ_REG(&adapter->hw, E1000_CEXTERR);
3841                 adapter->stats.tsctc +=
3842                 E1000_READ_REG(&adapter->hw, E1000_TSCTC);
3843                 adapter->stats.tsctfc +=
3844                 E1000_READ_REG(&adapter->hw, E1000_TSCTFC);
3845         }
3846
3847         IFNET_STAT_SET(ifp, collisions, adapter->stats.colc);
3848
3849         /* Rx Errors */
3850         IFNET_STAT_SET(ifp, ierrors,
3851             adapter->dropped_pkts + adapter->stats.rxerrc +
3852             adapter->stats.crcerrs + adapter->stats.algnerrc +
3853             adapter->stats.ruc + adapter->stats.roc +
3854             adapter->stats.mpc + adapter->stats.cexterr);
3855
3856         /* Tx Errors */
3857         IFNET_STAT_SET(ifp, oerrors,
3858             adapter->stats.ecol + adapter->stats.latecol +
3859             adapter->watchdog_events);
3860 }
3861
3862 static void
3863 em_print_debug_info(struct adapter *adapter)
3864 {
3865         device_t dev = adapter->dev;
3866         uint8_t *hw_addr = adapter->hw.hw_addr;
3867
3868         device_printf(dev, "Adapter hardware address = %p \n", hw_addr);
3869         device_printf(dev, "CTRL = 0x%x RCTL = 0x%x \n",
3870             E1000_READ_REG(&adapter->hw, E1000_CTRL),
3871             E1000_READ_REG(&adapter->hw, E1000_RCTL));
3872         device_printf(dev, "Packet buffer = Tx=%dk Rx=%dk \n",
3873             ((E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff0000) >> 16),\
3874             (E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff) );
3875         device_printf(dev, "Flow control watermarks high = %d low = %d\n",
3876             adapter->hw.fc.high_water,
3877             adapter->hw.fc.low_water);
3878         device_printf(dev, "tx_int_delay = %d, tx_abs_int_delay = %d\n",
3879             E1000_READ_REG(&adapter->hw, E1000_TIDV),
3880             E1000_READ_REG(&adapter->hw, E1000_TADV));
3881         device_printf(dev, "rx_int_delay = %d, rx_abs_int_delay = %d\n",
3882             E1000_READ_REG(&adapter->hw, E1000_RDTR),
3883             E1000_READ_REG(&adapter->hw, E1000_RADV));
3884         device_printf(dev, "fifo workaround = %lld, fifo_reset_count = %lld\n",
3885             (long long)adapter->tx_fifo_wrk_cnt,
3886             (long long)adapter->tx_fifo_reset_cnt);
3887         device_printf(dev, "hw tdh = %d, hw tdt = %d\n",
3888             E1000_READ_REG(&adapter->hw, E1000_TDH(0)),
3889             E1000_READ_REG(&adapter->hw, E1000_TDT(0)));
3890         device_printf(dev, "hw rdh = %d, hw rdt = %d\n",
3891             E1000_READ_REG(&adapter->hw, E1000_RDH(0)),
3892             E1000_READ_REG(&adapter->hw, E1000_RDT(0)));
3893         device_printf(dev, "Num Tx descriptors avail = %d\n",
3894             adapter->num_tx_desc_avail);
3895         device_printf(dev, "Tx Descriptors not avail1 = %ld\n",
3896             adapter->no_tx_desc_avail1);
3897         device_printf(dev, "Tx Descriptors not avail2 = %ld\n",
3898             adapter->no_tx_desc_avail2);
3899         device_printf(dev, "Std mbuf failed = %ld\n",
3900             adapter->mbuf_alloc_failed);
3901         device_printf(dev, "Std mbuf cluster failed = %ld\n",
3902             adapter->mbuf_cluster_failed);
3903         device_printf(dev, "Driver dropped packets = %ld\n",
3904             adapter->dropped_pkts);
3905         device_printf(dev, "Driver tx dma failure in encap = %ld\n",
3906             adapter->no_tx_dma_setup);
3907 }
3908
3909 static void
3910 em_print_hw_stats(struct adapter *adapter)
3911 {
3912         device_t dev = adapter->dev;
3913
3914         device_printf(dev, "Excessive collisions = %lld\n",
3915             (long long)adapter->stats.ecol);
3916 #if (DEBUG_HW > 0)  /* Dont output these errors normally */
3917         device_printf(dev, "Symbol errors = %lld\n",
3918             (long long)adapter->stats.symerrs);
3919 #endif
3920         device_printf(dev, "Sequence errors = %lld\n",
3921             (long long)adapter->stats.sec);
3922         device_printf(dev, "Defer count = %lld\n",
3923             (long long)adapter->stats.dc);
3924         device_printf(dev, "Missed Packets = %lld\n",
3925             (long long)adapter->stats.mpc);
3926         device_printf(dev, "Receive No Buffers = %lld\n",
3927             (long long)adapter->stats.rnbc);
3928         /* RLEC is inaccurate on some hardware, calculate our own. */
3929         device_printf(dev, "Receive Length Errors = %lld\n",
3930             ((long long)adapter->stats.roc + (long long)adapter->stats.ruc));
3931         device_printf(dev, "Receive errors = %lld\n",
3932             (long long)adapter->stats.rxerrc);
3933         device_printf(dev, "Crc errors = %lld\n",
3934             (long long)adapter->stats.crcerrs);
3935         device_printf(dev, "Alignment errors = %lld\n",
3936             (long long)adapter->stats.algnerrc);
3937         device_printf(dev, "Collision/Carrier extension errors = %lld\n",
3938             (long long)adapter->stats.cexterr);
3939         device_printf(dev, "RX overruns = %ld\n", adapter->rx_overruns);
3940         device_printf(dev, "watchdog timeouts = %ld\n",
3941             adapter->watchdog_events);
3942         device_printf(dev, "XON Rcvd = %lld\n",
3943             (long long)adapter->stats.xonrxc);
3944         device_printf(dev, "XON Xmtd = %lld\n",
3945             (long long)adapter->stats.xontxc);
3946         device_printf(dev, "XOFF Rcvd = %lld\n",
3947             (long long)adapter->stats.xoffrxc);
3948         device_printf(dev, "XOFF Xmtd = %lld\n",
3949             (long long)adapter->stats.xofftxc);
3950         device_printf(dev, "Good Packets Rcvd = %lld\n",
3951             (long long)adapter->stats.gprc);
3952         device_printf(dev, "Good Packets Xmtd = %lld\n",
3953             (long long)adapter->stats.gptc);
3954 }
3955
3956 static void
3957 em_print_nvm_info(struct adapter *adapter)
3958 {
3959         uint16_t eeprom_data;
3960         int i, j, row = 0;
3961
3962         /* Its a bit crude, but it gets the job done */
3963         kprintf("\nInterface EEPROM Dump:\n");
3964         kprintf("Offset\n0x0000  ");
3965         for (i = 0, j = 0; i < 32; i++, j++) {
3966                 if (j == 8) { /* Make the offset block */
3967                         j = 0; ++row;
3968                         kprintf("\n0x00%x0  ",row);
3969                 }
3970                 e1000_read_nvm(&adapter->hw, i, 1, &eeprom_data);
3971                 kprintf("%04x ", eeprom_data);
3972         }
3973         kprintf("\n");
3974 }
3975
3976 static int
3977 em_sysctl_debug_info(SYSCTL_HANDLER_ARGS)
3978 {
3979         struct adapter *adapter;
3980         struct ifnet *ifp;
3981         int error, result;
3982
3983         result = -1;
3984         error = sysctl_handle_int(oidp, &result, 0, req);
3985         if (error || !req->newptr)
3986                 return (error);
3987
3988         adapter = (struct adapter *)arg1;
3989         ifp = &adapter->arpcom.ac_if;
3990
3991         lwkt_serialize_enter(ifp->if_serializer);
3992
3993         if (result == 1)
3994                 em_print_debug_info(adapter);
3995
3996         /*
3997          * This value will cause a hex dump of the
3998          * first 32 16-bit words of the EEPROM to
3999          * the screen.
4000          */
4001         if (result == 2)
4002                 em_print_nvm_info(adapter);
4003
4004         lwkt_serialize_exit(ifp->if_serializer);
4005
4006         return (error);
4007 }
4008
4009 static int
4010 em_sysctl_stats(SYSCTL_HANDLER_ARGS)
4011 {
4012         int error, result;
4013
4014         result = -1;
4015         error = sysctl_handle_int(oidp, &result, 0, req);
4016         if (error || !req->newptr)
4017                 return (error);
4018
4019         if (result == 1) {
4020                 struct adapter *adapter = (struct adapter *)arg1;
4021                 struct ifnet *ifp = &adapter->arpcom.ac_if;
4022
4023                 lwkt_serialize_enter(ifp->if_serializer);
4024                 em_print_hw_stats(adapter);
4025                 lwkt_serialize_exit(ifp->if_serializer);
4026         }
4027         return (error);
4028 }
4029
4030 static void
4031 em_add_sysctl(struct adapter *adapter)
4032 {
4033         sysctl_ctx_init(&adapter->sysctl_ctx);
4034         adapter->sysctl_tree = SYSCTL_ADD_NODE(&adapter->sysctl_ctx,
4035                                         SYSCTL_STATIC_CHILDREN(_hw), OID_AUTO,
4036                                         device_get_nameunit(adapter->dev),
4037                                         CTLFLAG_RD, 0, "");
4038         if (adapter->sysctl_tree == NULL) {
4039                 device_printf(adapter->dev, "can't add sysctl node\n");
4040         } else {
4041                 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
4042                     SYSCTL_CHILDREN(adapter->sysctl_tree),
4043                     OID_AUTO, "debug", CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4044                     em_sysctl_debug_info, "I", "Debug Information");
4045
4046                 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
4047                     SYSCTL_CHILDREN(adapter->sysctl_tree),
4048                     OID_AUTO, "stats", CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4049                     em_sysctl_stats, "I", "Statistics");
4050
4051                 SYSCTL_ADD_INT(&adapter->sysctl_ctx,
4052                     SYSCTL_CHILDREN(adapter->sysctl_tree),
4053                     OID_AUTO, "rxd", CTLFLAG_RD,
4054                     &adapter->num_rx_desc, 0, NULL);
4055                 SYSCTL_ADD_INT(&adapter->sysctl_ctx,
4056                     SYSCTL_CHILDREN(adapter->sysctl_tree),
4057                     OID_AUTO, "txd", CTLFLAG_RD,
4058                     &adapter->num_tx_desc, 0, NULL);
4059
4060                 if (adapter->hw.mac.type >= e1000_82540) {
4061                         SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
4062                             SYSCTL_CHILDREN(adapter->sysctl_tree),
4063                             OID_AUTO, "int_throttle_ceil",
4064                             CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4065                             em_sysctl_int_throttle, "I",
4066                             "interrupt throttling rate");
4067                 }
4068                 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
4069                     SYSCTL_CHILDREN(adapter->sysctl_tree),
4070                     OID_AUTO, "int_tx_nsegs",
4071                     CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4072                     em_sysctl_int_tx_nsegs, "I",
4073                     "# segments per TX interrupt");
4074                 SYSCTL_ADD_INT(&adapter->sysctl_ctx,
4075                     SYSCTL_CHILDREN(adapter->sysctl_tree),
4076                     OID_AUTO, "wreg_tx_nsegs", CTLFLAG_RW,
4077                     &adapter->tx_wreg_nsegs, 0,
4078                     "# segments before write to hardware register");
4079         }
4080 }
4081
4082 static int
4083 em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS)
4084 {
4085         struct adapter *adapter = (void *)arg1;
4086         struct ifnet *ifp = &adapter->arpcom.ac_if;
4087         int error, throttle;
4088
4089         throttle = adapter->int_throttle_ceil;
4090         error = sysctl_handle_int(oidp, &throttle, 0, req);
4091         if (error || req->newptr == NULL)
4092                 return error;
4093         if (throttle < 0 || throttle > 1000000000 / 256)
4094                 return EINVAL;
4095
4096         if (throttle) {
4097                 /*
4098                  * Set the interrupt throttling rate in 256ns increments,
4099                  * recalculate sysctl value assignment to get exact frequency.
4100                  */
4101                 throttle = 1000000000 / 256 / throttle;
4102
4103                 /* Upper 16bits of ITR is reserved and should be zero */
4104                 if (throttle & 0xffff0000)
4105                         return EINVAL;
4106         }
4107
4108         lwkt_serialize_enter(ifp->if_serializer);
4109
4110         if (throttle)
4111                 adapter->int_throttle_ceil = 1000000000 / 256 / throttle;
4112         else
4113                 adapter->int_throttle_ceil = 0;
4114
4115         if (ifp->if_flags & IFF_RUNNING)
4116                 em_set_itr(adapter, throttle);
4117
4118         lwkt_serialize_exit(ifp->if_serializer);
4119
4120         if (bootverbose) {
4121                 if_printf(ifp, "Interrupt moderation set to %d/sec\n",
4122                           adapter->int_throttle_ceil);
4123         }
4124         return 0;
4125 }
4126
4127 static int
4128 em_sysctl_int_tx_nsegs(SYSCTL_HANDLER_ARGS)
4129 {
4130         struct adapter *adapter = (void *)arg1;
4131         struct ifnet *ifp = &adapter->arpcom.ac_if;
4132         int error, segs;
4133
4134         segs = adapter->tx_int_nsegs;
4135         error = sysctl_handle_int(oidp, &segs, 0, req);
4136         if (error || req->newptr == NULL)
4137                 return error;
4138         if (segs <= 0)
4139                 return EINVAL;
4140
4141         lwkt_serialize_enter(ifp->if_serializer);
4142
4143         /*
4144          * Don't allow int_tx_nsegs to become:
4145          * o  Less the oact_tx_desc
4146          * o  Too large that no TX desc will cause TX interrupt to
4147          *    be generated (OACTIVE will never recover)
4148          * o  Too small that will cause tx_dd[] overflow
4149          */
4150         if (segs < adapter->oact_tx_desc ||
4151             segs >= adapter->num_tx_desc - adapter->oact_tx_desc ||
4152             segs < adapter->num_tx_desc / EM_TXDD_SAFE) {
4153                 error = EINVAL;
4154         } else {
4155                 error = 0;
4156                 adapter->tx_int_nsegs = segs;
4157         }
4158
4159         lwkt_serialize_exit(ifp->if_serializer);
4160
4161         return error;
4162 }
4163
4164 static void
4165 em_set_itr(struct adapter *adapter, uint32_t itr)
4166 {
4167         E1000_WRITE_REG(&adapter->hw, E1000_ITR, itr);
4168         if (adapter->hw.mac.type == e1000_82574) {
4169                 int i;
4170
4171                 /*
4172                  * When using MSIX interrupts we need to
4173                  * throttle using the EITR register
4174                  */
4175                 for (i = 0; i < 4; ++i) {
4176                         E1000_WRITE_REG(&adapter->hw,
4177                             E1000_EITR_82574(i), itr);
4178                 }
4179         }
4180 }
4181
4182 static void
4183 em_disable_aspm(struct adapter *adapter)
4184 {
4185         uint16_t link_cap, link_ctrl, disable;
4186         uint8_t pcie_ptr, reg;
4187         device_t dev = adapter->dev;
4188
4189         switch (adapter->hw.mac.type) {
4190         case e1000_82571:
4191         case e1000_82572:
4192         case e1000_82573:
4193                 /*
4194                  * 82573 specification update
4195                  * errata #8 disable L0s
4196                  * errata #41 disable L1
4197                  *
4198                  * 82571/82572 specification update
4199                  # errata #13 disable L1
4200                  * errata #68 disable L0s
4201                  */
4202                 disable = PCIEM_LNKCTL_ASPM_L0S | PCIEM_LNKCTL_ASPM_L1;
4203                 break;
4204
4205         case e1000_82574:
4206         case e1000_82583:
4207                 /*
4208                  * 82574 specification update errata #20
4209                  * 82583 specification update errata #9
4210                  *
4211                  * There is no need to disable L1
4212                  */
4213                 disable = PCIEM_LNKCTL_ASPM_L0S;
4214                 break;
4215
4216         default:
4217                 return;
4218         }
4219
4220         pcie_ptr = pci_get_pciecap_ptr(dev);
4221         if (pcie_ptr == 0)
4222                 return;
4223
4224         link_cap = pci_read_config(dev, pcie_ptr + PCIER_LINKCAP, 2);
4225         if ((link_cap & PCIEM_LNKCAP_ASPM_MASK) == 0)
4226                 return;
4227
4228         if (bootverbose) {
4229                 if_printf(&adapter->arpcom.ac_if,
4230                     "disable ASPM %#02x\n", disable);
4231         }
4232
4233         reg = pcie_ptr + PCIER_LINKCTRL;
4234         link_ctrl = pci_read_config(dev, reg, 2);
4235         link_ctrl &= ~disable;
4236         pci_write_config(dev, reg, link_ctrl, 2);
4237 }
4238
4239 static int
4240 em_tso_pullup(struct adapter *adapter, struct mbuf **mp)
4241 {
4242         int iphlen, hoff, thoff, ex = 0;
4243         struct mbuf *m;
4244         struct ip *ip;
4245
4246         m = *mp;
4247         KASSERT(M_WRITABLE(m), ("TSO mbuf not writable"));
4248
4249         iphlen = m->m_pkthdr.csum_iphlen;
4250         thoff = m->m_pkthdr.csum_thlen;
4251         hoff = m->m_pkthdr.csum_lhlen;
4252
4253         KASSERT(iphlen > 0, ("invalid ip hlen"));
4254         KASSERT(thoff > 0, ("invalid tcp hlen"));
4255         KASSERT(hoff > 0, ("invalid ether hlen"));
4256
4257         if (adapter->flags & EM_FLAG_TSO_PULLEX)
4258                 ex = 4;
4259
4260         if (m->m_len < hoff + iphlen + thoff + ex) {
4261                 m = m_pullup(m, hoff + iphlen + thoff + ex);
4262                 if (m == NULL) {
4263                         *mp = NULL;
4264                         return ENOBUFS;
4265                 }
4266                 *mp = m;
4267         }
4268         ip = mtodoff(m, struct ip *, hoff);
4269         ip->ip_len = 0;
4270
4271         return 0;
4272 }
4273
4274 static int
4275 em_tso_setup(struct adapter *adapter, struct mbuf *mp,
4276     uint32_t *txd_upper, uint32_t *txd_lower)
4277 {
4278         struct e1000_context_desc *TXD;
4279         int hoff, iphlen, thoff, hlen;
4280         int mss, pktlen, curr_txd;
4281
4282         iphlen = mp->m_pkthdr.csum_iphlen;
4283         thoff = mp->m_pkthdr.csum_thlen;
4284         hoff = mp->m_pkthdr.csum_lhlen;
4285         mss = mp->m_pkthdr.tso_segsz;
4286         pktlen = mp->m_pkthdr.len;
4287
4288         if (adapter->csum_flags == CSUM_TSO &&
4289             adapter->csum_iphlen == iphlen &&
4290             adapter->csum_lhlen == hoff &&
4291             adapter->csum_thlen == thoff &&
4292             adapter->csum_mss == mss &&
4293             adapter->csum_pktlen == pktlen) {
4294                 *txd_upper = adapter->csum_txd_upper;
4295                 *txd_lower = adapter->csum_txd_lower;
4296                 return 0;
4297         }
4298         hlen = hoff + iphlen + thoff;
4299
4300         /*
4301          * Setup a new TSO context.
4302          */
4303
4304         curr_txd = adapter->next_avail_tx_desc;
4305         TXD = (struct e1000_context_desc *)&adapter->tx_desc_base[curr_txd];
4306
4307         *txd_lower = E1000_TXD_CMD_DEXT |       /* Extended descr type */
4308                      E1000_TXD_DTYP_D |         /* Data descr type */
4309                      E1000_TXD_CMD_TSE;         /* Do TSE on this packet */
4310
4311         /* IP and/or TCP header checksum calculation and insertion. */
4312         *txd_upper = (E1000_TXD_POPTS_IXSM | E1000_TXD_POPTS_TXSM) << 8;
4313
4314         /*
4315          * Start offset for header checksum calculation.
4316          * End offset for header checksum calculation.
4317          * Offset of place put the checksum.
4318          */
4319         TXD->lower_setup.ip_fields.ipcss = hoff;
4320         TXD->lower_setup.ip_fields.ipcse = htole16(hoff + iphlen - 1);
4321         TXD->lower_setup.ip_fields.ipcso = hoff + offsetof(struct ip, ip_sum);
4322
4323         /*
4324          * Start offset for payload checksum calculation.
4325          * End offset for payload checksum calculation.
4326          * Offset of place to put the checksum.
4327          */
4328         TXD->upper_setup.tcp_fields.tucss = hoff + iphlen;
4329         TXD->upper_setup.tcp_fields.tucse = 0;
4330         TXD->upper_setup.tcp_fields.tucso =
4331             hoff + iphlen + offsetof(struct tcphdr, th_sum);
4332
4333         /*
4334          * Payload size per packet w/o any headers.
4335          * Length of all headers up to payload.
4336          */
4337         TXD->tcp_seg_setup.fields.mss = htole16(mss);
4338         TXD->tcp_seg_setup.fields.hdr_len = hlen;
4339         TXD->cmd_and_length = htole32(E1000_TXD_CMD_IFCS |
4340                                 E1000_TXD_CMD_DEXT |    /* Extended descr */
4341                                 E1000_TXD_CMD_TSE |     /* TSE context */
4342                                 E1000_TXD_CMD_IP |      /* Do IP csum */
4343                                 E1000_TXD_CMD_TCP |     /* Do TCP checksum */
4344                                 (pktlen - hlen));       /* Total len */
4345
4346         /* Save the information for this TSO context */
4347         adapter->csum_flags = CSUM_TSO;
4348         adapter->csum_lhlen = hoff;
4349         adapter->csum_iphlen = iphlen;
4350         adapter->csum_thlen = thoff;
4351         adapter->csum_mss = mss;
4352         adapter->csum_pktlen = pktlen;
4353         adapter->csum_txd_upper = *txd_upper;
4354         adapter->csum_txd_lower = *txd_lower;
4355
4356         if (++curr_txd == adapter->num_tx_desc)
4357                 curr_txd = 0;
4358
4359         KKASSERT(adapter->num_tx_desc_avail > 0);
4360         adapter->num_tx_desc_avail--;
4361
4362         adapter->next_avail_tx_desc = curr_txd;
4363         return 1;
4364 }