2 * Copyright (c) 2008 The DragonFly Project. All rights reserved.
4 * This code is derived from software contributed to The DragonFly Project
5 * by Sepherosa Ziehau <sepherosa@gmail.com>
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * 3. Neither the name of The DragonFly Project nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific, prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
24 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
25 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
27 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
29 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 #define IWL_ALIGN 0x1000 /* XXX */
40 struct iwl_dmamap_ctx {
42 bus_dma_segment_t *segs;
46 struct netmsg iwlm_nmsg;
50 enum ieee80211_state iwlm_nstate;
55 struct ieee80211com iwl_ic;
59 struct resource *iwl_mem_res;
60 bus_space_tag_t iwl_mem_bt;
61 bus_space_handle_t iwl_mem_bh;
64 struct resource *iwl_irq_res;
69 struct lwkt_port iwl_reply_port;
70 struct lwkt_port iwl_thread_port;
71 struct thread iwl_thread;
73 (struct lwkt_port *, struct lwkt_msg *);
76 #define sc_ic iwlcom.iwl_ic
77 #define sc_irq_res iwlcom.iwl_irq_res
78 #define sc_irq_handle iwlcom.iwl_irq_handle
79 #define sc_thread iwlcom.iwl_thread
80 #define sc_thread_port iwlcom.iwl_thread_port
81 #define sc_reply_port iwlcom.iwl_reply_port
82 #define sc_tx_timer iwlcom.iwl_tx_timer
83 #define sc_sysctl_ctx iwlcom.iwl_sysctl_ctx
84 #define sc_sysctl_tree iwlcom.iwl_sysctl_tree
86 #define IWL_FW_PATH "iwl/"
88 #define IWL_WRITE_4(iwl, reg, val) \
89 bus_space_write_4((iwl)->iwl_mem_bt, (iwl)->iwl_mem_bh, (reg), (val))
90 #define IWL_WRITE_2(iwl, reg, val) \
91 bus_space_write_2((iwl)->iwl_mem_bt, (iwl)->iwl_mem_bh, (reg), (val))
92 #define IWL_WRITE_1(iwl, reg, val) \
93 bus_space_write_1((iwl)->iwl_mem_bt, (iwl)->iwl_mem_bh, (reg), (val))
94 #define IWL_READ_4(iwl, reg) \
95 bus_space_read_4((iwl)->iwl_mem_bt, (iwl)->iwl_mem_bh, (reg))
96 #define IWL_READ_2(iwl, reg) \
97 bus_space_read_2((iwl)->iwl_mem_bt, (iwl)->iwl_mem_bh, (reg))
98 #define IWL_READ_1(iwl, reg) \
99 bus_space_read_1((iwl)->iwl_mem_bt, (iwl)->iwl_mem_bh, (reg))
101 #define IND_WRITE_4(sc, reg, val) \
102 iwl_ind_write_4(&(sc)->iwlcom, (reg), (val))
103 #define IND_WRITE_2(sc, reg, val) \
104 iwl_ind_write_2(&(sc)->iwlcom, (reg), (val))
105 #define IND_WRITE_1(sc, reg, val) \
106 iwl_ind_write_1(&(sc)->iwlcom, (reg), (val))
107 #define IND_READ_4(sc, reg) \
108 iwl_ind_read_4(&(sc)->iwlcom, (reg))
109 #define IND_READ_2(sc, reg) \
110 iwl_ind_read_2(&(sc)->iwlcom, (reg))
111 #define IND_READ_1(sc, reg) \
112 iwl_ind_read_1(&(sc)->iwlcom, (reg))
114 #define CSR_READ_1(sc, reg) IWL_READ_1(&(sc)->iwlcom, (reg))
116 #define CSR_WRITE_4(sc, reg, val) IWL_WRITE_4(&(sc)->iwlcom, (reg), (val))
117 #define CSR_READ_4(sc, reg) IWL_READ_4(&(sc)->iwlcom, (reg))
118 #define CSR_SETBITS_4(sc, reg, bit) \
119 CSR_WRITE_4((sc), (reg), CSR_READ_4((sc), (reg)) | (bit))
121 extern const struct ieee80211_rateset iwl_rateset_11b;
123 void iwl_ind_write_4(struct iwlcom *, uint32_t, uint32_t);
124 void iwl_ind_write_2(struct iwlcom *, uint32_t, uint16_t);
125 void iwl_ind_write_1(struct iwlcom *, uint32_t, uint8_t);
126 uint32_t iwl_ind_read_4(struct iwlcom *, uint32_t);
127 uint16_t iwl_ind_read_2(struct iwlcom *, uint32_t);
128 uint8_t iwl_ind_read_1(struct iwlcom *, uint32_t);
129 uint16_t iwl_read_eeprom(struct iwlcom *, uint8_t);
130 int iwl_dma_mem_create(device_t, bus_dma_tag_t, bus_size_t,
131 bus_dma_tag_t *, void **, bus_addr_t *,
133 void iwl_dma_mem_destroy(bus_dma_tag_t, void *, bus_dmamap_t);
134 void iwl_dma_buf_addr(void *, bus_dma_segment_t *, int,
136 void iwl_create_thread(struct iwlcom *, int);
137 void iwl_destroy_thread(struct iwlcom *);
139 void iwlmsg_send(struct iwlmsg *, struct lwkt_port *);
140 void iwlmsg_init(struct iwlmsg *, struct lwkt_port *,
141 netisr_fn_t, void *);
143 #endif /* !_IF_IWLVAR_H */