2 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
3 * Copyright (c) 1992 Terrence R. Lambert.
4 * Copyright (c) 2003 Peter Wemm.
5 * Copyright (c) 2008 The DragonFly Project.
8 * This code is derived from software contributed to Berkeley by
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the University of
22 * California, Berkeley and its contributors.
23 * 4. Neither the name of the University nor the names of its contributors
24 * may be used to endorse or promote products derived from this software
25 * without specific prior written permission.
27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
40 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
43 //#include "use_npx.h"
45 #include "opt_compat.h"
48 #include "opt_directio.h"
51 #include "opt_msgbuf.h"
54 #include <sys/param.h>
55 #include <sys/systm.h>
56 #include <sys/sysproto.h>
57 #include <sys/signalvar.h>
58 #include <sys/kernel.h>
59 #include <sys/linker.h>
60 #include <sys/malloc.h>
64 #include <sys/reboot.h>
66 #include <sys/msgbuf.h>
67 #include <sys/sysent.h>
68 #include <sys/sysctl.h>
69 #include <sys/vmmeter.h>
71 #include <sys/upcall.h>
72 #include <sys/usched.h>
76 #include <vm/vm_param.h>
78 #include <vm/vm_kern.h>
79 #include <vm/vm_object.h>
80 #include <vm/vm_page.h>
81 #include <vm/vm_map.h>
82 #include <vm/vm_pager.h>
83 #include <vm/vm_extern.h>
85 #include <sys/thread2.h>
86 #include <sys/mplock2.h>
87 #include <sys/mutex2.h>
95 #include <machine/cpu.h>
96 #include <machine/clock.h>
97 #include <machine/specialreg.h>
99 #include <machine/bootinfo.h>
101 #include <machine/md_var.h>
102 #include <machine/metadata.h>
103 #include <machine/pc/bios.h>
104 #include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
105 #include <machine/globaldata.h> /* CPU_prvspace */
106 #include <machine/smp.h>
108 #include <machine/perfmon.h>
110 #include <machine/cputypes.h>
111 #include <machine/intr_machdep.h>
114 #include <bus/isa/isa_device.h>
116 #include <machine_base/isa/isa_intr.h>
117 #include <bus/isa/rtc.h>
118 #include <sys/random.h>
119 #include <sys/ptrace.h>
120 #include <machine/sigframe.h>
122 #include <sys/machintr.h>
123 #include <machine_base/icu/icu_abi.h>
124 #include <machine_base/icu/elcr_var.h>
125 #include <machine_base/apic/lapic.h>
126 #include <machine_base/apic/ioapic.h>
127 #include <machine_base/apic/ioapic_abi.h>
128 #include <machine/mptable.h>
130 #define PHYSMAP_ENTRIES 10
132 extern u_int64_t hammer_time(u_int64_t, u_int64_t);
134 extern void printcpuinfo(void); /* XXX header file */
135 extern void identify_cpu(void);
137 extern void finishidentcpu(void);
139 extern void panicifcpuunsupported(void);
141 static void cpu_startup(void *);
142 static void pic_finish(void *);
143 static void cpu_finish(void *);
145 #ifndef CPU_DISABLE_SSE
146 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
147 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
148 #endif /* CPU_DISABLE_SSE */
150 extern void ffs_rawread_setup(void);
151 #endif /* DIRECTIO */
152 static void init_locks(void);
154 SYSINIT(cpu, SI_BOOT2_START_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
155 SYSINIT(pic_finish, SI_BOOT2_FINISH_PIC, SI_ORDER_FIRST, pic_finish, NULL)
156 SYSINIT(cpu_finish, SI_BOOT2_FINISH_CPU, SI_ORDER_FIRST, cpu_finish, NULL)
159 extern vm_offset_t ksym_start, ksym_end;
162 struct privatespace CPU_prvspace[MAXCPU] __aligned(4096); /* XXX */
164 int _udatasel, _ucodesel, _ucode32sel;
167 int64_t tsc_offsets[MAXCPU];
169 int64_t tsc_offsets[1];
172 #if defined(SWTCH_OPTIM_STATS)
173 extern int swtch_optim_stats;
174 SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
175 CTLFLAG_RD, &swtch_optim_stats, 0, "");
176 SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
177 CTLFLAG_RD, &tlb_flush_count, 0, "");
182 u_long ebda_addr = 0;
184 int imcr_present = 0;
186 int naps = 0; /* # of Applications processors */
189 struct mtx dt_lock; /* lock for GDT and LDT */
192 sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
194 u_long pmem = ctob(physmem);
196 int error = sysctl_handle_long(oidp, &pmem, 0, req);
200 SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_ULONG|CTLFLAG_RD,
201 0, 0, sysctl_hw_physmem, "LU", "Total system memory in bytes (number of pages * page size)");
204 sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
206 int error = sysctl_handle_int(oidp, 0,
207 ctob(physmem - vmstats.v_wire_count), req);
211 SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
212 0, 0, sysctl_hw_usermem, "IU", "");
215 sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
217 int error = sysctl_handle_int(oidp, 0,
218 x86_64_btop(avail_end - avail_start), req);
222 SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
223 0, 0, sysctl_hw_availpages, "I", "");
229 * The number of PHYSMAP entries must be one less than the number of
230 * PHYSSEG entries because the PHYSMAP entry that spans the largest
231 * physical address that is accessible by ISA DMA is split into two
234 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
236 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
237 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
239 /* must be 2 less so 0 0 can signal end of chunks */
240 #define PHYS_AVAIL_ARRAY_END (NELEM(phys_avail) - 2)
241 #define DUMP_AVAIL_ARRAY_END (NELEM(dump_avail) - 2)
243 static vm_offset_t buffer_sva, buffer_eva;
244 vm_offset_t clean_sva, clean_eva;
245 static vm_offset_t pager_sva, pager_eva;
246 static struct trapframe proc0_tf;
249 cpu_startup(void *dummy)
253 vm_offset_t firstaddr;
256 * Good {morning,afternoon,evening,night}.
258 kprintf("%s", version);
261 panicifcpuunsupported();
265 kprintf("real memory = %ju (%ju MB)\n",
267 (intmax_t)Realmem / 1024 / 1024);
269 * Display any holes after the first chunk of extended memory.
274 kprintf("Physical memory chunk(s):\n");
275 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
276 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
278 kprintf("0x%08jx - 0x%08jx, %ju bytes (%ju pages)\n",
279 (intmax_t)phys_avail[indx],
280 (intmax_t)phys_avail[indx + 1] - 1,
282 (intmax_t)(size1 / PAGE_SIZE));
287 * Allocate space for system data structures.
288 * The first available kernel virtual address is in "v".
289 * As pages of kernel virtual memory are allocated, "v" is incremented.
290 * As pages of memory are allocated and cleared,
291 * "firstaddr" is incremented.
292 * An index into the kernel page table corresponding to the
293 * virtual memory address maintained in "v" is kept in "mapaddr".
297 * Make two passes. The first pass calculates how much memory is
298 * needed and allocates it. The second pass assigns virtual
299 * addresses to the various data structures.
303 v = (caddr_t)firstaddr;
305 #define valloc(name, type, num) \
306 (name) = (type *)v; v = (caddr_t)((name)+(num))
307 #define valloclim(name, type, num, lim) \
308 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
311 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
312 * For the first 64MB of ram nominally allocate sufficient buffers to
313 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
314 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
315 * the buffer cache we limit the eventual kva reservation to
318 * factor represents the 1/4 x ram conversion.
321 int factor = 4 * BKVASIZE / 1024;
322 int kbytes = physmem * (PAGE_SIZE / 1024);
326 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
328 nbuf += (kbytes - 65536) * 2 / (factor * 5);
329 if (maxbcache && nbuf > maxbcache / BKVASIZE)
330 nbuf = maxbcache / BKVASIZE;
334 * Do not allow the buffer_map to be more then 1/2 the size of the
337 if (nbuf > (virtual_end - virtual_start) / (BKVASIZE * 2)) {
338 nbuf = (virtual_end - virtual_start) / (BKVASIZE * 2);
339 kprintf("Warning: nbufs capped at %d\n", nbuf);
342 nswbuf = max(min(nbuf/4, 256), 16);
344 if (nswbuf < NSWBUF_MIN)
351 valloc(swbuf, struct buf, nswbuf);
352 valloc(buf, struct buf, nbuf);
355 * End of first pass, size has been calculated so allocate memory
357 if (firstaddr == 0) {
358 size = (vm_size_t)(v - firstaddr);
359 firstaddr = kmem_alloc(&kernel_map, round_page(size));
361 panic("startup: no room for tables");
366 * End of second pass, addresses have been assigned
368 if ((vm_size_t)(v - firstaddr) != size)
369 panic("startup: table size inconsistency");
371 kmem_suballoc(&kernel_map, &clean_map, &clean_sva, &clean_eva,
372 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
373 kmem_suballoc(&clean_map, &buffer_map, &buffer_sva, &buffer_eva,
375 buffer_map.system_map = 1;
376 kmem_suballoc(&clean_map, &pager_map, &pager_sva, &pager_eva,
377 (nswbuf*MAXPHYS) + pager_map_size);
378 pager_map.system_map = 1;
380 #if defined(USERCONFIG)
382 cninit(); /* the preferred console may have changed */
385 kprintf("avail memory = %ju (%ju MB)\n",
386 (uintmax_t)ptoa(vmstats.v_free_count),
387 (uintmax_t)ptoa(vmstats.v_free_count) / 1024 / 1024);
390 * Set up buffers, so they can be used to read disk labels.
393 vm_pager_bufferinit();
397 cpu_finish(void *dummy __unused)
403 pic_finish(void *dummy __unused)
405 /* Log ELCR information */
408 /* Log MPTABLE information */
409 mptable_pci_int_dump();
412 MachIntrABI.finalize();
416 * Send an interrupt to process.
418 * Stack is set up to allow sigcode stored
419 * at top to call routine, followed by kcall
420 * to sigreturn routine below. After sigreturn
421 * resets the signal mask, the stack, and the
422 * frame pointer, it returns to the user
426 sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
428 struct lwp *lp = curthread->td_lwp;
429 struct proc *p = lp->lwp_proc;
430 struct trapframe *regs;
431 struct sigacts *psp = p->p_sigacts;
432 struct sigframe sf, *sfp;
436 regs = lp->lwp_md.md_regs;
437 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
439 /* Save user context */
440 bzero(&sf, sizeof(struct sigframe));
441 sf.sf_uc.uc_sigmask = *mask;
442 sf.sf_uc.uc_stack = lp->lwp_sigstk;
443 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
444 KKASSERT(__offsetof(struct trapframe, tf_rdi) == 0);
445 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(struct trapframe));
447 /* Make the size of the saved context visible to userland */
448 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext);
450 /* Allocate and validate space for the signal handler context. */
451 if ((lp->lwp_flags & LWP_ALTSTACK) != 0 && !oonstack &&
452 SIGISMEMBER(psp->ps_sigonstack, sig)) {
453 sp = (char *)(lp->lwp_sigstk.ss_sp + lp->lwp_sigstk.ss_size -
454 sizeof(struct sigframe));
455 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
457 /* We take red zone into account */
458 sp = (char *)regs->tf_rsp - sizeof(struct sigframe) - 128;
461 /* Align to 16 bytes */
462 sfp = (struct sigframe *)((intptr_t)sp & ~(intptr_t)0xF);
464 /* Translate the signal is appropriate */
465 if (p->p_sysent->sv_sigtbl) {
466 if (sig <= p->p_sysent->sv_sigsize)
467 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
471 * Build the argument list for the signal handler.
473 * Arguments are in registers (%rdi, %rsi, %rdx, %rcx)
475 regs->tf_rdi = sig; /* argument 1 */
476 regs->tf_rdx = (register_t)&sfp->sf_uc; /* argument 3 */
478 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
480 * Signal handler installed with SA_SIGINFO.
482 * action(signo, siginfo, ucontext)
484 regs->tf_rsi = (register_t)&sfp->sf_si; /* argument 2 */
485 regs->tf_rcx = (register_t)regs->tf_addr; /* argument 4 */
486 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
488 /* fill siginfo structure */
489 sf.sf_si.si_signo = sig;
490 sf.sf_si.si_code = code;
491 sf.sf_si.si_addr = (void *)regs->tf_addr;
494 * Old FreeBSD-style arguments.
496 * handler (signo, code, [uc], addr)
498 regs->tf_rsi = (register_t)code; /* argument 2 */
499 regs->tf_rcx = (register_t)regs->tf_addr; /* argument 4 */
500 sf.sf_ahu.sf_handler = catcher;
504 * If we're a vm86 process, we want to save the segment registers.
505 * We also change eflags to be our emulated eflags, not the actual
509 if (regs->tf_eflags & PSL_VM) {
510 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
511 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
513 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
514 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
515 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
516 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
518 if (vm86->vm86_has_vme == 0)
519 sf.sf_uc.uc_mcontext.mc_eflags =
520 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
521 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
524 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
525 * syscalls made by the signal handler. This just avoids
526 * wasting time for our lazy fixup of such faults. PSL_NT
527 * does nothing in vm86 mode, but vm86 programs can set it
528 * almost legitimately in probes for old cpu types.
530 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
535 * Save the FPU state and reinit the FP unit
537 npxpush(&sf.sf_uc.uc_mcontext);
540 * Copy the sigframe out to the user's stack.
542 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
544 * Something is wrong with the stack pointer.
545 * ...Kill the process.
550 regs->tf_rsp = (register_t)sfp;
551 regs->tf_rip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
554 * i386 abi specifies that the direction flag must be cleared
557 regs->tf_rflags &= ~(PSL_T|PSL_D);
560 * 64 bit mode has a code and stack selector but
561 * no data or extra selector. %fs and %gs are not
564 regs->tf_cs = _ucodesel;
565 regs->tf_ss = _udatasel;
570 * Sanitize the trapframe for a virtual kernel passing control to a custom
571 * VM context. Remove any items that would otherwise create a privilage
574 * XXX at the moment we allow userland to set the resume flag. Is this a
578 cpu_sanitize_frame(struct trapframe *frame)
580 frame->tf_cs = _ucodesel;
581 frame->tf_ss = _udatasel;
582 /* XXX VM (8086) mode not supported? */
583 frame->tf_rflags &= (PSL_RF | PSL_USERCHANGE | PSL_VM_UNSUPP);
584 frame->tf_rflags |= PSL_RESERVED_DEFAULT | PSL_I;
590 * Sanitize the tls so loading the descriptor does not blow up
591 * on us. For x86_64 we don't have to do anything.
594 cpu_sanitize_tls(struct savetls *tls)
600 * sigreturn(ucontext_t *sigcntxp)
602 * System call to cleanup state after a signal
603 * has been taken. Reset signal mask and
604 * stack state from context left by sendsig (above).
605 * Return to previous pc and psl as specified by
606 * context left by sendsig. Check carefully to
607 * make sure that the user has not modified the
608 * state to gain improper privileges.
612 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
613 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
616 sys_sigreturn(struct sigreturn_args *uap)
618 struct lwp *lp = curthread->td_lwp;
619 struct trapframe *regs;
627 * We have to copy the information into kernel space so userland
628 * can't modify it while we are sniffing it.
630 regs = lp->lwp_md.md_regs;
631 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
635 rflags = ucp->uc_mcontext.mc_rflags;
637 /* VM (8086) mode not supported */
638 rflags &= ~PSL_VM_UNSUPP;
641 if (eflags & PSL_VM) {
642 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
643 struct vm86_kernel *vm86;
646 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
647 * set up the vm86 area, and we can't enter vm86 mode.
649 if (lp->lwp_thread->td_pcb->pcb_ext == 0)
651 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
652 if (vm86->vm86_inited == 0)
655 /* go back to user mode if both flags are set */
656 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
657 trapsignal(lp, SIGBUS, 0);
659 if (vm86->vm86_has_vme) {
660 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
661 (eflags & VME_USERCHANGE) | PSL_VM;
663 vm86->vm86_eflags = eflags; /* save VIF, VIP */
664 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
665 (eflags & VM_USERCHANGE) | PSL_VM;
667 bcopy(&ucp->uc_mcontext.mc_gs, tf, sizeof(struct trapframe));
668 tf->tf_eflags = eflags;
669 tf->tf_vm86_ds = tf->tf_ds;
670 tf->tf_vm86_es = tf->tf_es;
671 tf->tf_vm86_fs = tf->tf_fs;
672 tf->tf_vm86_gs = tf->tf_gs;
673 tf->tf_ds = _udatasel;
674 tf->tf_es = _udatasel;
675 tf->tf_fs = _udatasel;
676 tf->tf_gs = _udatasel;
681 * Don't allow users to change privileged or reserved flags.
684 * XXX do allow users to change the privileged flag PSL_RF.
685 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
686 * should sometimes set it there too. tf_eflags is kept in
687 * the signal context during signal handling and there is no
688 * other place to remember it, so the PSL_RF bit may be
689 * corrupted by the signal handler without us knowing.
690 * Corruption of the PSL_RF bit at worst causes one more or
691 * one less debugger trap, so allowing it is fairly harmless.
693 if (!EFL_SECURE(rflags & ~PSL_RF, regs->tf_rflags & ~PSL_RF)) {
694 kprintf("sigreturn: rflags = 0x%lx\n", (long)rflags);
699 * Don't allow users to load a valid privileged %cs. Let the
700 * hardware check for invalid selectors, excess privilege in
701 * other selectors, invalid %eip's and invalid %esp's.
703 cs = ucp->uc_mcontext.mc_cs;
704 if (!CS_SECURE(cs)) {
705 kprintf("sigreturn: cs = 0x%x\n", cs);
706 trapsignal(lp, SIGBUS, T_PROTFLT);
709 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(struct trapframe));
713 * Restore the FPU state from the frame
716 npxpop(&ucp->uc_mcontext);
718 if (ucp->uc_mcontext.mc_onstack & 1)
719 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
721 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK;
723 lp->lwp_sigmask = ucp->uc_sigmask;
724 SIG_CANTMASK(lp->lwp_sigmask);
731 * Stack frame on entry to function. %rax will contain the function vector,
732 * %rcx will contain the function data. flags, rcx, and rax will have
733 * already been pushed on the stack.
744 sendupcall(struct vmupcall *vu, int morepending)
746 struct lwp *lp = curthread->td_lwp;
747 struct trapframe *regs;
748 struct upcall upcall;
749 struct upc_frame upc_frame;
753 * If we are a virtual kernel running an emulated user process
754 * context, switch back to the virtual kernel context before
755 * trying to post the signal.
757 if (lp->lwp_vkernel && lp->lwp_vkernel->ve) {
758 lp->lwp_md.md_regs->tf_trapno = 0;
759 vkernel_trap(lp, lp->lwp_md.md_regs);
763 * Get the upcall data structure
765 if (copyin(lp->lwp_upcall, &upcall, sizeof(upcall)) ||
766 copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int))
769 kprintf("bad upcall address\n");
774 * If the data structure is already marked pending or has a critical
775 * section count, mark the data structure as pending and return
776 * without doing an upcall. vu_pending is left set.
778 if (upcall.upc_pending || crit_count >= vu->vu_pending) {
779 if (upcall.upc_pending < vu->vu_pending) {
780 upcall.upc_pending = vu->vu_pending;
781 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
782 sizeof(upcall.upc_pending));
788 * We can run this upcall now, clear vu_pending.
790 * Bump our critical section count and set or clear the
791 * user pending flag depending on whether more upcalls are
792 * pending. The user will be responsible for calling
793 * upc_dispatch(-1) to process remaining upcalls.
796 upcall.upc_pending = morepending;
798 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
799 sizeof(upcall.upc_pending));
800 copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff,
804 * Construct a stack frame and issue the upcall
806 regs = lp->lwp_md.md_regs;
807 upc_frame.rax = regs->tf_rax;
808 upc_frame.rcx = regs->tf_rcx;
809 upc_frame.rdx = regs->tf_rdx;
810 upc_frame.flags = regs->tf_rflags;
811 upc_frame.oldip = regs->tf_rip;
812 if (copyout(&upc_frame, (void *)(regs->tf_rsp - sizeof(upc_frame)),
813 sizeof(upc_frame)) != 0) {
814 kprintf("bad stack on upcall\n");
816 regs->tf_rax = (register_t)vu->vu_func;
817 regs->tf_rcx = (register_t)vu->vu_data;
818 regs->tf_rdx = (register_t)lp->lwp_upcall;
819 regs->tf_rip = (register_t)vu->vu_ctx;
820 regs->tf_rsp -= sizeof(upc_frame);
825 * fetchupcall occurs in the context of a system call, which means that
826 * we have to return EJUSTRETURN in order to prevent eax and edx from
827 * being overwritten by the syscall return value.
829 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
830 * and the function pointer in %eax.
833 fetchupcall(struct vmupcall *vu, int morepending, void *rsp)
835 struct upc_frame upc_frame;
836 struct lwp *lp = curthread->td_lwp;
837 struct trapframe *regs;
839 struct upcall upcall;
842 regs = lp->lwp_md.md_regs;
844 error = copyout(&morepending, &lp->lwp_upcall->upc_pending, sizeof(int));
848 * This jumps us to the next ready context.
851 error = copyin(lp->lwp_upcall, &upcall, sizeof(upcall));
854 error = copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int));
857 error = copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff, sizeof(int));
858 regs->tf_rax = (register_t)vu->vu_func;
859 regs->tf_rcx = (register_t)vu->vu_data;
860 regs->tf_rdx = (register_t)lp->lwp_upcall;
861 regs->tf_rip = (register_t)vu->vu_ctx;
862 regs->tf_rsp = (register_t)rsp;
865 * This returns us to the originally interrupted code.
867 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
868 regs->tf_rax = upc_frame.rax;
869 regs->tf_rcx = upc_frame.rcx;
870 regs->tf_rdx = upc_frame.rdx;
871 regs->tf_rflags = (regs->tf_rflags & ~PSL_USERCHANGE) |
872 (upc_frame.flags & PSL_USERCHANGE);
873 regs->tf_rip = upc_frame.oldip;
874 regs->tf_rsp = (register_t)((char *)rsp + sizeof(upc_frame));
883 * Machine dependent boot() routine
885 * I haven't seen anything to put here yet
886 * Possibly some stuff might be grafted back here from boot()
894 * Shutdown the CPU as much as possible
900 __asm__ __volatile("hlt");
904 * cpu_idle() represents the idle LWKT. You cannot return from this function
905 * (unless you want to blow things up!). Instead we look for runnable threads
906 * and loop or halt as appropriate. Giant is not held on entry to the thread.
908 * The main loop is entered with a critical section held, we must release
909 * the critical section before doing anything else. lwkt_switch() will
910 * check for pending interrupts due to entering and exiting its own
913 * NOTE: On an SMP system we rely on a scheduler IPI to wake a HLTed cpu up.
914 * However, there are cases where the idlethread will be entered with
915 * the possibility that no IPI will occur and in such cases
916 * lwkt_switch() sets TDF_IDLE_NOHLT.
918 * NOTE: cpu_idle_hlt again defaults to 2 (use ACPI sleep states). Set to
919 * 1 to just use hlt and for debugging purposes.
921 * NOTE: cpu_idle_repeat determines how many entries into the idle thread
922 * must occur before it starts using ACPI halt.
924 static int cpu_idle_hlt = 2;
925 static int cpu_idle_hltcnt;
926 static int cpu_idle_spincnt;
927 static u_int cpu_idle_repeat = 4;
928 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
929 &cpu_idle_hlt, 0, "Idle loop HLT enable");
930 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
931 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
932 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
933 &cpu_idle_spincnt, 0, "Idle loop entry spins");
934 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_repeat, CTLFLAG_RW,
935 &cpu_idle_repeat, 0, "Idle entries before acpi hlt");
938 cpu_idle_default_hook(void)
941 * We must guarentee that hlt is exactly the instruction
944 __asm __volatile("sti; hlt");
947 /* Other subsystems (e.g., ACPI) can hook this later. */
948 void (*cpu_idle_hook)(void) = cpu_idle_default_hook;
953 globaldata_t gd = mycpu;
954 struct thread *td __debugvar = gd->gd_curthread;
959 KKASSERT(td->td_critcount == 0);
962 * See if there are any LWKTs ready to go.
967 * When halting inside a cli we must check for reqflags
968 * races, particularly [re]schedule requests. Running
969 * splz() does the job.
972 * 0 Never halt, just spin
974 * 1 Always use HLT (or MONITOR/MWAIT if avail).
975 * This typically eats more power than the
978 * 2 Use HLT/MONITOR/MWAIT up to a point and then
979 * use the ACPI halt (default). This is a hybrid
980 * approach. See machdep.cpu_idle_repeat.
982 * 3 Always use the ACPI halt. This typically
983 * eats the least amount of power but the cpu
984 * will be slow waking up. Slows down e.g.
985 * compiles and other pipe/event oriented stuff.
987 * NOTE: Interrupts are enabled and we are not in a critical
990 * NOTE: Preemptions do not reset gd_idle_repeat. Also we
991 * don't bother capping gd_idle_repeat, it is ok if
994 ++gd->gd_idle_repeat;
995 reqflags = gd->gd_reqflags;
996 quick = (cpu_idle_hlt == 1) ||
998 gd->gd_idle_repeat < cpu_idle_repeat);
1000 if (quick && (cpu_mi_feature & CPU_MI_MONITOR) &&
1001 (reqflags & RQF_IDLECHECK_WK_MASK) == 0) {
1003 cpu_mmw_pause_int(&gd->gd_reqflags, reqflags);
1005 } else if (cpu_idle_hlt) {
1006 __asm __volatile("cli");
1008 if ((gd->gd_reqflags & RQF_IDLECHECK_WK_MASK) == 0) {
1010 cpu_idle_default_hook();
1014 __asm __volatile("sti");
1018 __asm __volatile("sti");
1027 * This routine is called if a spinlock has been held through the
1028 * exponential backoff period and is seriously contested. On a real cpu
1032 cpu_spinlock_contested(void)
1040 * Clear registers on exec
1043 exec_setregs(u_long entry, u_long stack, u_long ps_strings)
1045 struct thread *td = curthread;
1046 struct lwp *lp = td->td_lwp;
1047 struct pcb *pcb = td->td_pcb;
1048 struct trapframe *regs = lp->lwp_md.md_regs;
1050 /* was i386_user_cleanup() in NetBSD */
1054 bzero((char *)regs, sizeof(struct trapframe));
1055 regs->tf_rip = entry;
1056 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8; /* align the stack */
1057 regs->tf_rdi = stack; /* argv */
1058 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T);
1059 regs->tf_ss = _udatasel;
1060 regs->tf_cs = _ucodesel;
1061 regs->tf_rbx = ps_strings;
1064 * Reset the hardware debug registers if they were in use.
1065 * They won't have any meaning for the newly exec'd process.
1067 if (pcb->pcb_flags & PCB_DBREGS) {
1073 pcb->pcb_dr7 = 0; /* JG set bit 10? */
1074 if (pcb == td->td_pcb) {
1076 * Clear the debug registers on the running
1077 * CPU, otherwise they will end up affecting
1078 * the next process we switch to.
1082 pcb->pcb_flags &= ~PCB_DBREGS;
1086 * Initialize the math emulator (if any) for the current process.
1087 * Actually, just clear the bit that says that the emulator has
1088 * been initialized. Initialization is delayed until the process
1089 * traps to the emulator (if it is done at all) mainly because
1090 * emulators don't provide an entry point for initialization.
1092 pcb->pcb_flags &= ~FP_SOFTFP;
1095 * NOTE: do not set CR0_TS here. npxinit() must do it after clearing
1096 * gd_npxthread. Otherwise a preemptive interrupt thread
1097 * may panic in npxdna().
1100 load_cr0(rcr0() | CR0_MP);
1103 * NOTE: The MSR values must be correct so we can return to
1104 * userland. gd_user_fs/gs must be correct so the switch
1105 * code knows what the current MSR values are.
1107 pcb->pcb_fsbase = 0; /* Values loaded from PCB on switch */
1108 pcb->pcb_gsbase = 0;
1109 mdcpu->gd_user_fs = 0; /* Cache of current MSR values */
1110 mdcpu->gd_user_gs = 0;
1111 wrmsr(MSR_FSBASE, 0); /* Set MSR values for return to userland */
1112 wrmsr(MSR_KGSBASE, 0);
1114 /* Initialize the npx (if any) for the current process. */
1115 npxinit(__INITIAL_NPXCW__);
1118 pcb->pcb_ds = _udatasel;
1119 pcb->pcb_es = _udatasel;
1120 pcb->pcb_fs = _udatasel;
1121 pcb->pcb_gs = _udatasel;
1130 cr0 |= CR0_NE; /* Done by npxinit() */
1131 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1132 cr0 |= CR0_WP | CR0_AM;
1138 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1141 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1143 if (!error && req->newptr)
1148 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1149 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1151 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1152 CTLFLAG_RW, &disable_rtc_set, 0, "");
1155 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1156 CTLFLAG_RD, &bootinfo, bootinfo, "");
1159 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1160 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1162 extern u_long bootdev; /* not a cdev_t - encoding is different */
1163 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1164 CTLFLAG_RD, &bootdev, 0, "Boot device (not in cdev_t format)");
1167 * Initialize 386 and configure to run kernel
1171 * Initialize segments & interrupt table
1175 struct user_segment_descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1176 static struct gate_descriptor idt0[NIDT];
1177 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1179 union descriptor ldt[NLDT]; /* local descriptor table */
1182 /* table descriptors - used to load tables by cpu */
1183 struct region_descriptor r_gdt, r_idt;
1185 /* JG proc0paddr is a virtual address */
1188 char proc0paddr_buff[LWKT_THREAD_STACK];
1191 /* software prototypes -- in more palatable form */
1192 struct soft_segment_descriptor gdt_segs[] = {
1193 /* GNULL_SEL 0 Null Descriptor */
1194 { 0x0, /* segment base address */
1196 0, /* segment type */
1197 0, /* segment descriptor priority level */
1198 0, /* segment descriptor present */
1200 0, /* default 32 vs 16 bit size */
1201 0 /* limit granularity (byte/page units)*/ },
1202 /* GCODE_SEL 1 Code Descriptor for kernel */
1203 { 0x0, /* segment base address */
1204 0xfffff, /* length - all address space */
1205 SDT_MEMERA, /* segment type */
1206 SEL_KPL, /* segment descriptor priority level */
1207 1, /* segment descriptor present */
1209 0, /* default 32 vs 16 bit size */
1210 1 /* limit granularity (byte/page units)*/ },
1211 /* GDATA_SEL 2 Data Descriptor for kernel */
1212 { 0x0, /* segment base address */
1213 0xfffff, /* length - all address space */
1214 SDT_MEMRWA, /* segment type */
1215 SEL_KPL, /* segment descriptor priority level */
1216 1, /* segment descriptor present */
1218 0, /* default 32 vs 16 bit size */
1219 1 /* limit granularity (byte/page units)*/ },
1220 /* GUCODE32_SEL 3 32 bit Code Descriptor for user */
1221 { 0x0, /* segment base address */
1222 0xfffff, /* length - all address space */
1223 SDT_MEMERA, /* segment type */
1224 SEL_UPL, /* segment descriptor priority level */
1225 1, /* segment descriptor present */
1227 1, /* default 32 vs 16 bit size */
1228 1 /* limit granularity (byte/page units)*/ },
1229 /* GUDATA_SEL 4 32/64 bit Data Descriptor for user */
1230 { 0x0, /* segment base address */
1231 0xfffff, /* length - all address space */
1232 SDT_MEMRWA, /* segment type */
1233 SEL_UPL, /* segment descriptor priority level */
1234 1, /* segment descriptor present */
1236 1, /* default 32 vs 16 bit size */
1237 1 /* limit granularity (byte/page units)*/ },
1238 /* GUCODE_SEL 5 64 bit Code Descriptor for user */
1239 { 0x0, /* segment base address */
1240 0xfffff, /* length - all address space */
1241 SDT_MEMERA, /* segment type */
1242 SEL_UPL, /* segment descriptor priority level */
1243 1, /* segment descriptor present */
1245 0, /* default 32 vs 16 bit size */
1246 1 /* limit granularity (byte/page units)*/ },
1247 /* GPROC0_SEL 6 Proc 0 Tss Descriptor */
1249 0x0, /* segment base address */
1250 sizeof(struct x86_64tss)-1,/* length - all address space */
1251 SDT_SYSTSS, /* segment type */
1252 SEL_KPL, /* segment descriptor priority level */
1253 1, /* segment descriptor present */
1255 0, /* unused - default 32 vs 16 bit size */
1256 0 /* limit granularity (byte/page units)*/ },
1257 /* Actually, the TSS is a system descriptor which is double size */
1258 { 0x0, /* segment base address */
1260 0, /* segment type */
1261 0, /* segment descriptor priority level */
1262 0, /* segment descriptor present */
1264 0, /* default 32 vs 16 bit size */
1265 0 /* limit granularity (byte/page units)*/ },
1266 /* GUGS32_SEL 8 32 bit GS Descriptor for user */
1267 { 0x0, /* segment base address */
1268 0xfffff, /* length - all address space */
1269 SDT_MEMRWA, /* segment type */
1270 SEL_UPL, /* segment descriptor priority level */
1271 1, /* segment descriptor present */
1273 1, /* default 32 vs 16 bit size */
1274 1 /* limit granularity (byte/page units)*/ },
1278 setidt(int idx, inthand_t *func, int typ, int dpl, int ist)
1280 struct gate_descriptor *ip;
1283 ip->gd_looffset = (uintptr_t)func;
1284 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL);
1290 ip->gd_hioffset = ((uintptr_t)func)>>16 ;
1293 #define IDTVEC(name) __CONCAT(X,name)
1296 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1297 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1298 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1299 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1300 IDTVEC(xmm), IDTVEC(dblfault),
1301 IDTVEC(fast_syscall), IDTVEC(fast_syscall32);
1303 #ifdef DEBUG_INTERRUPTS
1304 extern inthand_t *Xrsvdary[256];
1308 sdtossd(struct user_segment_descriptor *sd, struct soft_segment_descriptor *ssd)
1310 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1311 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1312 ssd->ssd_type = sd->sd_type;
1313 ssd->ssd_dpl = sd->sd_dpl;
1314 ssd->ssd_p = sd->sd_p;
1315 ssd->ssd_def32 = sd->sd_def32;
1316 ssd->ssd_gran = sd->sd_gran;
1320 ssdtosd(struct soft_segment_descriptor *ssd, struct user_segment_descriptor *sd)
1323 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
1324 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff;
1325 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
1326 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
1327 sd->sd_type = ssd->ssd_type;
1328 sd->sd_dpl = ssd->ssd_dpl;
1329 sd->sd_p = ssd->ssd_p;
1330 sd->sd_long = ssd->ssd_long;
1331 sd->sd_def32 = ssd->ssd_def32;
1332 sd->sd_gran = ssd->ssd_gran;
1336 ssdtosyssd(struct soft_segment_descriptor *ssd,
1337 struct system_segment_descriptor *sd)
1340 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
1341 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful;
1342 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
1343 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
1344 sd->sd_type = ssd->ssd_type;
1345 sd->sd_dpl = ssd->ssd_dpl;
1346 sd->sd_p = ssd->ssd_p;
1347 sd->sd_gran = ssd->ssd_gran;
1351 * Populate the (physmap) array with base/bound pairs describing the
1352 * available physical memory in the system, then test this memory and
1353 * build the phys_avail array describing the actually-available memory.
1355 * If we cannot accurately determine the physical memory map, then use
1356 * value from the 0xE801 call, and failing that, the RTC.
1358 * Total memory size may be set by the kernel environment variable
1359 * hw.physmem or the compile-time define MAXMEM.
1361 * Memory is aligned to PHYSMAP_ALIGN which must be a multiple
1362 * of PAGE_SIZE. This also greatly reduces the memory test time
1363 * which would otherwise be excessive on machines with > 8G of ram.
1365 * XXX first should be vm_paddr_t.
1368 #define PHYSMAP_ALIGN (vm_paddr_t)(128 * 1024)
1369 #define PHYSMAP_ALIGN_MASK (vm_paddr_t)(PHYSMAP_ALIGN - 1)
1372 getmemsize(caddr_t kmdp, u_int64_t first)
1374 int off, physmap_idx, pa_indx, da_indx;
1376 vm_paddr_t physmap[PHYSMAP_SIZE];
1378 vm_paddr_t msgbuf_size;
1379 u_long physmem_tunable;
1381 struct bios_smap *smapbase, *smap, *smapend;
1383 quad_t dcons_addr, dcons_size;
1385 bzero(physmap, sizeof(physmap));
1389 * get memory map from INT 15:E820, kindly supplied by the loader.
1391 * subr_module.c says:
1392 * "Consumer may safely assume that size value precedes data."
1393 * ie: an int32_t immediately precedes smap.
1395 smapbase = (struct bios_smap *)preload_search_info(kmdp,
1396 MODINFO_METADATA | MODINFOMD_SMAP);
1397 if (smapbase == NULL)
1398 panic("No BIOS smap info from loader!");
1400 smapsize = *((u_int32_t *)smapbase - 1);
1401 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize);
1403 for (smap = smapbase; smap < smapend; smap++) {
1404 if (boothowto & RB_VERBOSE)
1405 kprintf("SMAP type=%02x base=%016lx len=%016lx\n",
1406 smap->type, smap->base, smap->length);
1408 if (smap->type != SMAP_TYPE_MEMORY)
1411 if (smap->length == 0)
1414 for (i = 0; i <= physmap_idx; i += 2) {
1415 if (smap->base < physmap[i + 1]) {
1416 if (boothowto & RB_VERBOSE) {
1417 kprintf("Overlapping or non-monotonic "
1418 "memory region, ignoring "
1424 Realmem += smap->length;
1426 if (smap->base == physmap[physmap_idx + 1]) {
1427 physmap[physmap_idx + 1] += smap->length;
1432 if (physmap_idx == PHYSMAP_SIZE) {
1433 kprintf("Too many segments in the physical "
1434 "address map, giving up\n");
1437 physmap[physmap_idx] = smap->base;
1438 physmap[physmap_idx + 1] = smap->base + smap->length;
1441 base_memory = physmap[1] / 1024;
1443 /* make hole for AP bootstrap code */
1444 physmap[1] = mp_bootaddress(base_memory);
1447 /* Save EBDA address, if any */
1448 ebda_addr = (u_long)(*(u_short *)(KERNBASE + 0x40e));
1452 * Maxmem isn't the "maximum memory", it's one larger than the
1453 * highest page of the physical address space. It should be
1454 * called something like "Maxphyspage". We may adjust this
1455 * based on ``hw.physmem'' and the results of the memory test.
1457 Maxmem = atop(physmap[physmap_idx + 1]);
1460 Maxmem = MAXMEM / 4;
1463 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
1464 Maxmem = atop(physmem_tunable);
1467 * Don't allow MAXMEM or hw.physmem to extend the amount of memory
1470 if (Maxmem > atop(physmap[physmap_idx + 1]))
1471 Maxmem = atop(physmap[physmap_idx + 1]);
1474 * Blowing out the DMAP will blow up the system.
1476 if (Maxmem > atop(DMAP_MAX_ADDRESS - DMAP_MIN_ADDRESS)) {
1477 kprintf("Limiting Maxmem due to DMAP size\n");
1478 Maxmem = atop(DMAP_MAX_ADDRESS - DMAP_MIN_ADDRESS);
1481 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1482 (boothowto & RB_VERBOSE)) {
1483 kprintf("Physical memory use set to %ldK\n", Maxmem * 4);
1487 * Call pmap initialization to make new kernel address space
1491 pmap_bootstrap(&first);
1492 physmap[0] = PAGE_SIZE;
1495 * Align the physmap to PHYSMAP_ALIGN and cut out anything
1498 for (i = j = 0; i <= physmap_idx; i += 2) {
1499 if (physmap[i+1] > ptoa((vm_paddr_t)Maxmem))
1500 physmap[i+1] = ptoa((vm_paddr_t)Maxmem);
1501 physmap[i] = (physmap[i] + PHYSMAP_ALIGN_MASK) &
1502 ~PHYSMAP_ALIGN_MASK;
1503 physmap[i+1] = physmap[i+1] & ~PHYSMAP_ALIGN_MASK;
1505 physmap[j] = physmap[i];
1506 physmap[j+1] = physmap[i+1];
1508 if (physmap[i] < physmap[i+1])
1511 physmap_idx = j - 2;
1514 * Align anything else used in the validation loop.
1516 first = (first + PHYSMAP_ALIGN_MASK) & ~PHYSMAP_ALIGN_MASK;
1519 * Size up each available chunk of physical memory.
1523 phys_avail[pa_indx++] = physmap[0];
1524 phys_avail[pa_indx] = physmap[0];
1525 dump_avail[da_indx] = physmap[0];
1529 * Get dcons buffer address
1531 if (kgetenv_quad("dcons.addr", &dcons_addr) == 0 ||
1532 kgetenv_quad("dcons.size", &dcons_size) == 0)
1536 * Validate the physical memory. The physical memory segments
1537 * have already been aligned to PHYSMAP_ALIGN which is a multiple
1540 for (i = 0; i <= physmap_idx; i += 2) {
1543 end = physmap[i + 1];
1545 for (pa = physmap[i]; pa < end; pa += PHYSMAP_ALIGN) {
1546 int tmp, page_bad, full;
1547 int *ptr = (int *)CADDR1;
1551 * block out kernel memory as not available.
1553 if (pa >= 0x100000 && pa < first)
1557 * block out dcons buffer
1560 && pa >= trunc_page(dcons_addr)
1561 && pa < dcons_addr + dcons_size) {
1568 * map page into kernel: valid, read/write,non-cacheable
1570 *pte = pa | PG_V | PG_RW | PG_N;
1575 * Test for alternating 1's and 0's
1577 *(volatile int *)ptr = 0xaaaaaaaa;
1579 if (*(volatile int *)ptr != 0xaaaaaaaa)
1582 * Test for alternating 0's and 1's
1584 *(volatile int *)ptr = 0x55555555;
1586 if (*(volatile int *)ptr != 0x55555555)
1591 *(volatile int *)ptr = 0xffffffff;
1593 if (*(volatile int *)ptr != 0xffffffff)
1598 *(volatile int *)ptr = 0x0;
1600 if (*(volatile int *)ptr != 0x0)
1603 * Restore original value.
1608 * Adjust array of valid/good pages.
1610 if (page_bad == TRUE)
1613 * If this good page is a continuation of the
1614 * previous set of good pages, then just increase
1615 * the end pointer. Otherwise start a new chunk.
1616 * Note that "end" points one higher than end,
1617 * making the range >= start and < end.
1618 * If we're also doing a speculative memory
1619 * test and we at or past the end, bump up Maxmem
1620 * so that we keep going. The first bad page
1621 * will terminate the loop.
1623 if (phys_avail[pa_indx] == pa) {
1624 phys_avail[pa_indx] += PHYSMAP_ALIGN;
1627 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1629 "Too many holes in the physical address space, giving up\n");
1634 phys_avail[pa_indx++] = pa;
1635 phys_avail[pa_indx] = pa + PHYSMAP_ALIGN;
1637 physmem += PHYSMAP_ALIGN / PAGE_SIZE;
1639 if (dump_avail[da_indx] == pa) {
1640 dump_avail[da_indx] += PHYSMAP_ALIGN;
1643 if (da_indx == DUMP_AVAIL_ARRAY_END) {
1647 dump_avail[da_indx++] = pa;
1648 dump_avail[da_indx] = pa + PHYSMAP_ALIGN;
1659 * The last chunk must contain at least one page plus the message
1660 * buffer to avoid complicating other code (message buffer address
1661 * calculation, etc.).
1663 msgbuf_size = (MSGBUF_SIZE + PHYSMAP_ALIGN_MASK) & ~PHYSMAP_ALIGN_MASK;
1665 while (phys_avail[pa_indx - 1] + PHYSMAP_ALIGN +
1666 msgbuf_size >= phys_avail[pa_indx]) {
1667 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1668 phys_avail[pa_indx--] = 0;
1669 phys_avail[pa_indx--] = 0;
1672 Maxmem = atop(phys_avail[pa_indx]);
1674 /* Trim off space for the message buffer. */
1675 phys_avail[pa_indx] -= msgbuf_size;
1677 avail_end = phys_avail[pa_indx];
1679 /* Map the message buffer. */
1680 for (off = 0; off < msgbuf_size; off += PAGE_SIZE) {
1681 pmap_kenter((vm_offset_t)msgbufp + off,
1682 phys_avail[pa_indx] + off);
1686 struct machintr_abi MachIntrABI;
1697 * 7 Device Not Available (x87)
1699 * 9 Coprocessor Segment overrun (unsupported, reserved)
1701 * 11 Segment not present
1703 * 13 General Protection
1706 * 16 x87 FP Exception pending
1707 * 17 Alignment Check
1709 * 19 SIMD floating point
1711 * 32-255 INTn/external sources
1714 hammer_time(u_int64_t modulep, u_int64_t physfree)
1719 int metadata_missing, off;
1721 struct mdglobaldata *gd;
1725 * Prevent lowering of the ipl if we call tsleep() early.
1727 gd = &CPU_prvspace[0].mdglobaldata;
1728 bzero(gd, sizeof(*gd));
1731 * Note: on both UP and SMP curthread must be set non-NULL
1732 * early in the boot sequence because the system assumes
1733 * that 'curthread' is never NULL.
1736 gd->mi.gd_curthread = &thread0;
1737 thread0.td_gd = &gd->mi;
1739 atdevbase = ISA_HOLE_START + PTOV_OFFSET;
1742 metadata_missing = 0;
1743 if (bootinfo.bi_modulep) {
1744 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1745 preload_bootstrap_relocate(KERNBASE);
1747 metadata_missing = 1;
1749 if (bootinfo.bi_envp)
1750 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1753 preload_metadata = (caddr_t)(uintptr_t)(modulep + PTOV_OFFSET);
1754 preload_bootstrap_relocate(PTOV_OFFSET);
1755 kmdp = preload_search_by_type("elf kernel");
1757 kmdp = preload_search_by_type("elf64 kernel");
1758 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
1759 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *) + PTOV_OFFSET;
1761 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
1762 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
1765 if (boothowto & RB_VERBOSE)
1769 * Default MachIntrABI to ICU
1771 MachIntrABI = MachIntrABI_ICU;
1773 TUNABLE_INT_FETCH("hw.apic_io_enable", &ioapic_enable); /* for compat */
1774 TUNABLE_INT_FETCH("hw.ioapic_enable", &ioapic_enable);
1775 TUNABLE_INT_FETCH("hw.lapic_enable", &lapic_enable);
1778 * start with one cpu. Note: with one cpu, ncpus2_shift, ncpus2_mask,
1779 * and ncpus_fit_mask remain 0.
1784 /* Init basic tunables, hz etc */
1788 * make gdt memory segments
1790 gdt_segs[GPROC0_SEL].ssd_base =
1791 (uintptr_t) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
1793 gd->mi.gd_prvspace = &CPU_prvspace[0];
1795 for (x = 0; x < NGDT; x++) {
1796 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1))
1797 ssdtosd(&gdt_segs[x], &gdt[x]);
1799 ssdtosyssd(&gdt_segs[GPROC0_SEL],
1800 (struct system_segment_descriptor *)&gdt[GPROC0_SEL]);
1802 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1803 r_gdt.rd_base = (long) gdt;
1806 wrmsr(MSR_FSBASE, 0); /* User value */
1807 wrmsr(MSR_GSBASE, (u_int64_t)&gd->mi);
1808 wrmsr(MSR_KGSBASE, 0); /* User value while in the kernel */
1810 mi_gdinit(&gd->mi, 0);
1812 proc0paddr = proc0paddr_buff;
1813 mi_proc0init(&gd->mi, proc0paddr);
1814 safepri = TDPRI_MAX;
1816 /* spinlocks and the BGL */
1820 for (x = 0; x < NIDT; x++)
1821 setidt(x, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0);
1822 setidt(IDT_DE, &IDTVEC(div), SDT_SYSIGT, SEL_KPL, 0);
1823 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYSIGT, SEL_KPL, 0);
1824 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYSIGT, SEL_KPL, 1);
1825 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYSIGT, SEL_UPL, 0);
1826 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYSIGT, SEL_KPL, 0);
1827 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYSIGT, SEL_KPL, 0);
1828 setidt(IDT_UD, &IDTVEC(ill), SDT_SYSIGT, SEL_KPL, 0);
1829 setidt(IDT_NM, &IDTVEC(dna), SDT_SYSIGT, SEL_KPL, 0);
1830 setidt(IDT_DF, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1);
1831 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYSIGT, SEL_KPL, 0);
1832 setidt(IDT_TS, &IDTVEC(tss), SDT_SYSIGT, SEL_KPL, 0);
1833 setidt(IDT_NP, &IDTVEC(missing), SDT_SYSIGT, SEL_KPL, 0);
1834 setidt(IDT_SS, &IDTVEC(stk), SDT_SYSIGT, SEL_KPL, 0);
1835 setidt(IDT_GP, &IDTVEC(prot), SDT_SYSIGT, SEL_KPL, 0);
1836 setidt(IDT_PF, &IDTVEC(page), SDT_SYSIGT, SEL_KPL, 0);
1837 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYSIGT, SEL_KPL, 0);
1838 setidt(IDT_AC, &IDTVEC(align), SDT_SYSIGT, SEL_KPL, 0);
1839 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 0);
1840 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYSIGT, SEL_KPL, 0);
1842 r_idt.rd_limit = sizeof(idt0) - 1;
1843 r_idt.rd_base = (long) idt;
1847 * Initialize the console before we print anything out.
1852 if (metadata_missing)
1853 kprintf("WARNING: loader(8) metadata is missing!\n");
1863 * Initialize IRQ mapping
1866 * SHOULD be after elcr_probe()
1868 MachIntrABI_ICU.initmap();
1870 MachIntrABI_IOAPIC.initmap();
1875 if (boothowto & RB_KDB)
1876 Debugger("Boot flags requested debugger");
1880 finishidentcpu(); /* Final stage of CPU initialization */
1881 setidt(6, &IDTVEC(ill), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1882 setidt(13, &IDTVEC(prot), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1884 identify_cpu(); /* Final stage of CPU initialization */
1885 initializecpu(); /* Initialize CPU registers */
1887 /* make an initial tss so cpu can get interrupt stack on syscall! */
1888 gd->gd_common_tss.tss_rsp0 =
1889 (register_t)(thread0.td_kstack +
1890 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb));
1891 /* Ensure the stack is aligned to 16 bytes */
1892 gd->gd_common_tss.tss_rsp0 &= ~(register_t)0xF;
1894 /* double fault stack */
1895 gd->gd_common_tss.tss_ist1 =
1896 (long)&gd->mi.gd_prvspace->idlestack[
1897 sizeof(gd->mi.gd_prvspace->idlestack)];
1899 /* Set the IO permission bitmap (empty due to tss seg limit) */
1900 gd->gd_common_tss.tss_iobase = sizeof(struct x86_64tss);
1902 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
1903 gd->gd_tss_gdt = &gdt[GPROC0_SEL];
1904 gd->gd_common_tssd = *gd->gd_tss_gdt;
1907 /* Set up the fast syscall stuff */
1908 msr = rdmsr(MSR_EFER) | EFER_SCE;
1909 wrmsr(MSR_EFER, msr);
1910 wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall));
1911 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32));
1912 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) |
1913 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48);
1914 wrmsr(MSR_STAR, msr);
1915 wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D);
1917 getmemsize(kmdp, physfree);
1918 init_param2(physmem);
1920 /* now running on new page tables, configured,and u/iom is accessible */
1922 /* Map the message buffer. */
1924 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1925 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
1928 msgbufinit(msgbufp, MSGBUF_SIZE);
1931 /* transfer to user mode */
1933 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
1934 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
1935 _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL);
1941 /* setup proc 0's pcb */
1942 thread0.td_pcb->pcb_flags = 0;
1943 thread0.td_pcb->pcb_cr3 = KPML4phys;
1944 thread0.td_pcb->pcb_ext = 0;
1945 lwp0.lwp_md.md_regs = &proc0_tf; /* XXX needed? */
1947 /* Location of kernel stack for locore */
1948 return ((u_int64_t)thread0.td_pcb);
1952 * Initialize machine-dependant portions of the global data structure.
1953 * Note that the global data area and cpu0's idlestack in the private
1954 * data space were allocated in locore.
1956 * Note: the idlethread's cpl is 0
1958 * WARNING! Called from early boot, 'mycpu' may not work yet.
1961 cpu_gdinit(struct mdglobaldata *gd, int cpu)
1964 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
1966 lwkt_init_thread(&gd->mi.gd_idlethread,
1967 gd->mi.gd_prvspace->idlestack,
1968 sizeof(gd->mi.gd_prvspace->idlestack),
1970 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
1971 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
1972 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
1973 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
1977 is_globaldata_space(vm_offset_t saddr, vm_offset_t eaddr)
1979 if (saddr >= (vm_offset_t)&CPU_prvspace[0] &&
1980 eaddr <= (vm_offset_t)&CPU_prvspace[MAXCPU]) {
1983 if (saddr >= DMAP_MIN_ADDRESS && eaddr <= DMAP_MAX_ADDRESS)
1989 globaldata_find(int cpu)
1991 KKASSERT(cpu >= 0 && cpu < ncpus);
1992 return(&CPU_prvspace[cpu].mdglobaldata.mi);
1996 ptrace_set_pc(struct lwp *lp, unsigned long addr)
1998 lp->lwp_md.md_regs->tf_rip = addr;
2003 ptrace_single_step(struct lwp *lp)
2005 lp->lwp_md.md_regs->tf_rflags |= PSL_T;
2010 fill_regs(struct lwp *lp, struct reg *regs)
2012 struct trapframe *tp;
2014 if ((tp = lp->lwp_md.md_regs) == NULL)
2016 bcopy(&tp->tf_rdi, ®s->r_rdi, sizeof(*regs));
2021 set_regs(struct lwp *lp, struct reg *regs)
2023 struct trapframe *tp;
2025 tp = lp->lwp_md.md_regs;
2026 if (!EFL_SECURE(regs->r_rflags, tp->tf_rflags) ||
2027 !CS_SECURE(regs->r_cs))
2029 bcopy(®s->r_rdi, &tp->tf_rdi, sizeof(*regs));
2034 #ifndef CPU_DISABLE_SSE
2036 fill_fpregs_xmm(struct savexmm *sv_xmm, struct save87 *sv_87)
2038 struct env87 *penv_87 = &sv_87->sv_env;
2039 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2042 /* FPU control/status */
2043 penv_87->en_cw = penv_xmm->en_cw;
2044 penv_87->en_sw = penv_xmm->en_sw;
2045 penv_87->en_tw = penv_xmm->en_tw;
2046 penv_87->en_fip = penv_xmm->en_fip;
2047 penv_87->en_fcs = penv_xmm->en_fcs;
2048 penv_87->en_opcode = penv_xmm->en_opcode;
2049 penv_87->en_foo = penv_xmm->en_foo;
2050 penv_87->en_fos = penv_xmm->en_fos;
2053 for (i = 0; i < 8; ++i)
2054 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2058 set_fpregs_xmm(struct save87 *sv_87, struct savexmm *sv_xmm)
2060 struct env87 *penv_87 = &sv_87->sv_env;
2061 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2064 /* FPU control/status */
2065 penv_xmm->en_cw = penv_87->en_cw;
2066 penv_xmm->en_sw = penv_87->en_sw;
2067 penv_xmm->en_tw = penv_87->en_tw;
2068 penv_xmm->en_fip = penv_87->en_fip;
2069 penv_xmm->en_fcs = penv_87->en_fcs;
2070 penv_xmm->en_opcode = penv_87->en_opcode;
2071 penv_xmm->en_foo = penv_87->en_foo;
2072 penv_xmm->en_fos = penv_87->en_fos;
2075 for (i = 0; i < 8; ++i)
2076 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2078 #endif /* CPU_DISABLE_SSE */
2081 fill_fpregs(struct lwp *lp, struct fpreg *fpregs)
2083 if (lp->lwp_thread == NULL || lp->lwp_thread->td_pcb == NULL)
2085 #ifndef CPU_DISABLE_SSE
2087 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm,
2088 (struct save87 *)fpregs);
2091 #endif /* CPU_DISABLE_SSE */
2092 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2097 set_fpregs(struct lwp *lp, struct fpreg *fpregs)
2099 #ifndef CPU_DISABLE_SSE
2101 set_fpregs_xmm((struct save87 *)fpregs,
2102 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm);
2105 #endif /* CPU_DISABLE_SSE */
2106 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2111 fill_dbregs(struct lwp *lp, struct dbreg *dbregs)
2116 dbregs->dr[0] = rdr0();
2117 dbregs->dr[1] = rdr1();
2118 dbregs->dr[2] = rdr2();
2119 dbregs->dr[3] = rdr3();
2120 dbregs->dr[4] = rdr4();
2121 dbregs->dr[5] = rdr5();
2122 dbregs->dr[6] = rdr6();
2123 dbregs->dr[7] = rdr7();
2126 if (lp->lwp_thread == NULL || (pcb = lp->lwp_thread->td_pcb) == NULL)
2128 dbregs->dr[0] = pcb->pcb_dr0;
2129 dbregs->dr[1] = pcb->pcb_dr1;
2130 dbregs->dr[2] = pcb->pcb_dr2;
2131 dbregs->dr[3] = pcb->pcb_dr3;
2134 dbregs->dr[6] = pcb->pcb_dr6;
2135 dbregs->dr[7] = pcb->pcb_dr7;
2140 set_dbregs(struct lwp *lp, struct dbreg *dbregs)
2143 load_dr0(dbregs->dr[0]);
2144 load_dr1(dbregs->dr[1]);
2145 load_dr2(dbregs->dr[2]);
2146 load_dr3(dbregs->dr[3]);
2147 load_dr4(dbregs->dr[4]);
2148 load_dr5(dbregs->dr[5]);
2149 load_dr6(dbregs->dr[6]);
2150 load_dr7(dbregs->dr[7]);
2153 struct ucred *ucred;
2155 uint64_t mask1, mask2;
2158 * Don't let an illegal value for dr7 get set. Specifically,
2159 * check for undefined settings. Setting these bit patterns
2160 * result in undefined behaviour and can lead to an unexpected
2163 /* JG this loop looks unreadable */
2164 /* Check 4 2-bit fields for invalid patterns.
2165 * These fields are R/Wi, for i = 0..3
2167 /* Is 10 in LENi allowed when running in compatibility mode? */
2168 /* Pattern 10 in R/Wi might be used to indicate
2169 * breakpoint on I/O. Further analysis should be
2170 * carried to decide if it is safe and useful to
2171 * provide access to that capability
2173 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 4;
2174 i++, mask1 <<= 4, mask2 <<= 4)
2175 if ((dbregs->dr[7] & mask1) == mask2)
2178 pcb = lp->lwp_thread->td_pcb;
2179 ucred = lp->lwp_proc->p_ucred;
2182 * Don't let a process set a breakpoint that is not within the
2183 * process's address space. If a process could do this, it
2184 * could halt the system by setting a breakpoint in the kernel
2185 * (if ddb was enabled). Thus, we need to check to make sure
2186 * that no breakpoints are being enabled for addresses outside
2187 * process's address space, unless, perhaps, we were called by
2190 * XXX - what about when the watched area of the user's
2191 * address space is written into from within the kernel
2192 * ... wouldn't that still cause a breakpoint to be generated
2193 * from within kernel mode?
2196 if (priv_check_cred(ucred, PRIV_ROOT, 0) != 0) {
2197 if (dbregs->dr[7] & 0x3) {
2198 /* dr0 is enabled */
2199 if (dbregs->dr[0] >= VM_MAX_USER_ADDRESS)
2203 if (dbregs->dr[7] & (0x3<<2)) {
2204 /* dr1 is enabled */
2205 if (dbregs->dr[1] >= VM_MAX_USER_ADDRESS)
2209 if (dbregs->dr[7] & (0x3<<4)) {
2210 /* dr2 is enabled */
2211 if (dbregs->dr[2] >= VM_MAX_USER_ADDRESS)
2215 if (dbregs->dr[7] & (0x3<<6)) {
2216 /* dr3 is enabled */
2217 if (dbregs->dr[3] >= VM_MAX_USER_ADDRESS)
2222 pcb->pcb_dr0 = dbregs->dr[0];
2223 pcb->pcb_dr1 = dbregs->dr[1];
2224 pcb->pcb_dr2 = dbregs->dr[2];
2225 pcb->pcb_dr3 = dbregs->dr[3];
2226 pcb->pcb_dr6 = dbregs->dr[6];
2227 pcb->pcb_dr7 = dbregs->dr[7];
2229 pcb->pcb_flags |= PCB_DBREGS;
2236 * Return > 0 if a hardware breakpoint has been hit, and the
2237 * breakpoint was in user space. Return 0, otherwise.
2240 user_dbreg_trap(void)
2242 u_int64_t dr7, dr6; /* debug registers dr6 and dr7 */
2243 u_int64_t bp; /* breakpoint bits extracted from dr6 */
2244 int nbp; /* number of breakpoints that triggered */
2245 caddr_t addr[4]; /* breakpoint addresses */
2249 if ((dr7 & 0xff) == 0) {
2251 * all GE and LE bits in the dr7 register are zero,
2252 * thus the trap couldn't have been caused by the
2253 * hardware debug registers
2264 * None of the breakpoint bits are set meaning this
2265 * trap was not caused by any of the debug registers
2271 * at least one of the breakpoints were hit, check to see
2272 * which ones and if any of them are user space addresses
2276 addr[nbp++] = (caddr_t)rdr0();
2279 addr[nbp++] = (caddr_t)rdr1();
2282 addr[nbp++] = (caddr_t)rdr2();
2285 addr[nbp++] = (caddr_t)rdr3();
2288 for (i=0; i<nbp; i++) {
2290 (caddr_t)VM_MAX_USER_ADDRESS) {
2292 * addr[i] is in user space
2299 * None of the breakpoints are in user space.
2307 Debugger(const char *msg)
2309 kprintf("Debugger(\"%s\") called.\n", msg);
2316 * Provide inb() and outb() as functions. They are normally only
2317 * available as macros calling inlined functions, thus cannot be
2318 * called inside DDB.
2320 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2326 /* silence compiler warnings */
2328 void outb(u_int, u_char);
2335 * We use %%dx and not %1 here because i/o is done at %dx and not at
2336 * %edx, while gcc generates inferior code (movw instead of movl)
2337 * if we tell it to load (u_short) port.
2339 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2344 outb(u_int port, u_char data)
2348 * Use an unnecessary assignment to help gcc's register allocator.
2349 * This make a large difference for gcc-1.40 and a tiny difference
2350 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2351 * best results. gcc-2.6.0 can't handle this.
2354 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2361 #include "opt_cpu.h"
2365 * initialize all the SMP locks
2368 /* critical region when masking or unmasking interupts */
2369 struct spinlock_deprecated imen_spinlock;
2371 /* critical region for old style disable_intr/enable_intr */
2372 struct spinlock_deprecated mpintr_spinlock;
2374 /* critical region around INTR() routines */
2375 struct spinlock_deprecated intr_spinlock;
2377 /* lock region used by kernel profiling */
2378 struct spinlock_deprecated mcount_spinlock;
2380 /* locks com (tty) data/hardware accesses: a FASTINTR() */
2381 struct spinlock_deprecated com_spinlock;
2383 /* lock regions around the clock hardware */
2384 struct spinlock_deprecated clock_spinlock;
2391 * Get the initial mplock with a count of 1 for the BSP.
2392 * This uses a LOGICAL cpu ID, ie BSP == 0.
2394 cpu_get_initial_mplock();
2397 spin_lock_init(&mcount_spinlock);
2398 spin_lock_init(&intr_spinlock);
2399 spin_lock_init(&mpintr_spinlock);
2400 spin_lock_init(&imen_spinlock);
2401 spin_lock_init(&com_spinlock);
2402 spin_lock_init(&clock_spinlock);
2404 /* our token pool needs to work early */
2405 lwkt_token_pool_init();