twe(4): Sync with FreeBSD.
[dragonfly.git] / sys / dev / agp / agp_i810.c
1 /*
2  * Copyright (c) 2000 Doug Rabson
3  * Copyright (c) 2000 Ruslan Ermilov
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  *
27  * $FreeBSD: src/sys/dev/agp/agp_i810.c,v 1.56 2010/03/12 21:34:23 rnoland Exp $
28  */
29
30 /*
31  * Fixes for 830/845G support: David Dawes <dawes@xfree86.org>
32  * 852GM/855GM/865G support added by David Dawes <dawes@xfree86.org>
33  */
34
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/malloc.h>
38 #include <sys/kernel.h>
39 #include <sys/bus.h>
40 #include <sys/lock.h>
41 #include <sys/rman.h>
42
43 #include <bus/pci/pcivar.h>
44 #include <bus/pci/pcireg.h>
45 #include "agppriv.h"
46 #include "agpreg.h"
47
48 #include <vm/vm.h>
49 #include <vm/vm_object.h>
50 #include <vm/vm_page.h>
51 #include <vm/vm_pageout.h>
52 #include <vm/pmap.h>
53
54 #include <machine/md_var.h>
55
56 #define bus_read_1(r, o) \
57                    bus_space_read_1((r)->r_bustag, (r)->r_bushandle, (o))
58 #define bus_read_4(r, o) \
59                    bus_space_read_4((r)->r_bustag, (r)->r_bushandle, (o))
60 #define bus_write_4(r, o, v) \
61                     bus_space_write_4((r)->r_bustag, (r)->r_bushandle, (o), (v))
62
63 MALLOC_DECLARE(M_AGP);
64
65 enum {
66         CHIP_I810,      /* i810/i815 */
67         CHIP_I830,      /* 830M/845G */
68         CHIP_I855,      /* 852GM/855GM/865G */
69         CHIP_I915,      /* 915G/915GM */
70         CHIP_I965,      /* G965 */
71         CHIP_G33,       /* G33/Q33/Q35 */
72         CHIP_IGD,       /* Pineview */
73         CHIP_G4X,       /* G45/Q45 */
74 };
75
76 /* The i810 through i855 have the registers at BAR 1, and the GATT gets
77  * allocated by us.  The i915 has registers in BAR 0 and the GATT is at the
78  * start of the stolen memory, and should only be accessed by the OS through
79  * BAR 3.  The G965 has registers and GATT in the same BAR (0) -- first 512KB
80  * is registers, second 512KB is GATT.
81  */
82 static struct resource_spec agp_i810_res_spec[] = {
83         { SYS_RES_MEMORY, AGP_I810_MMADR, RF_ACTIVE | RF_SHAREABLE },
84         { -1, 0 }
85 };
86
87 static struct resource_spec agp_i915_res_spec[] = {
88         { SYS_RES_MEMORY, AGP_I915_MMADR, RF_ACTIVE | RF_SHAREABLE },
89         { SYS_RES_MEMORY, AGP_I915_GTTADR, RF_ACTIVE | RF_SHAREABLE },
90         { -1, 0 }
91 };
92
93 static struct resource_spec agp_i965_res_spec[] = {
94         { SYS_RES_MEMORY, AGP_I965_GTTMMADR, RF_ACTIVE | RF_SHAREABLE },
95         { -1, 0 }
96 };
97
98 struct agp_i810_softc {
99         struct agp_softc agp;
100         u_int32_t initial_aperture;     /* aperture size at startup */
101         struct agp_gatt *gatt;
102         int chiptype;                   /* i810-like or i830 */
103         u_int32_t dcache_size;          /* i810 only */
104         u_int32_t stolen;               /* number of i830/845 gtt entries for stolen memory */
105         device_t bdev;                  /* bridge device */
106
107         void *argb_cursor;              /* contigmalloc area for ARGB cursor */
108
109         struct resource_spec * sc_res_spec;
110         struct resource *sc_res[2];
111 };
112
113 /* For adding new devices, devid is the id of the graphics controller
114  * (pci:0:2:0, for example).  The placeholder (usually at pci:0:2:1) for the
115  * second head should never be added.  The bridge_offset is the offset to
116  * subtract from devid to get the id of the hostb that the device is on.
117  */
118 static const struct agp_i810_match {
119         int devid;
120         int chiptype;
121         int bridge_offset;
122         char *name;
123 } agp_i810_matches[] = {
124         {0x71218086, CHIP_I810, 0x00010000,
125             "Intel 82810 (i810 GMCH) SVGA controller"},
126         {0x71238086, CHIP_I810, 0x00010000,
127             "Intel 82810-DC100 (i810-DC100 GMCH) SVGA controller"},
128         {0x71258086, CHIP_I810, 0x00010000,
129             "Intel 82810E (i810E GMCH) SVGA controller"},
130         {0x11328086, CHIP_I810, 0x00020000,
131             "Intel 82815 (i815 GMCH) SVGA controller"},
132         {0x35778086, CHIP_I830, 0x00020000,
133             "Intel 82830M (830M GMCH) SVGA controller"},
134         {0x25628086, CHIP_I830, 0x00020000,
135             "Intel 82845M (845M GMCH) SVGA controller"},
136         {0x35828086, CHIP_I855, 0x00020000,
137             "Intel 82852/855GM SVGA controller"},
138         {0x25728086, CHIP_I855, 0x00020000,
139             "Intel 82865G (865G GMCH) SVGA controller"},
140         {0x25828086, CHIP_I915, 0x00020000,
141             "Intel 82915G (915G GMCH) SVGA controller"},
142         {0x258A8086, CHIP_I915, 0x00020000,
143             "Intel E7221 SVGA controller"},
144         {0x25928086, CHIP_I915, 0x00020000,
145             "Intel 82915GM (915GM GMCH) SVGA controller"},
146         {0x27728086, CHIP_I915, 0x00020000,
147             "Intel 82945G (945G GMCH) SVGA controller"},
148         {0x27A28086, CHIP_I915, 0x00020000,
149             "Intel 82945GM (945GM GMCH) SVGA controller"},
150         {0x27AE8086, CHIP_I915, 0x00020000,
151             "Intel 945GME SVGA controller"},
152         {0x29728086, CHIP_I965, 0x00020000,
153             "Intel 946GZ SVGA controller"},
154         {0x29828086, CHIP_I965, 0x00020000,
155             "Intel G965 SVGA controller"},
156         {0x29928086, CHIP_I965, 0x00020000,
157             "Intel Q965 SVGA controller"},
158         {0x29A28086, CHIP_I965, 0x00020000,
159             "Intel G965 SVGA controller"},
160         {0x29B28086, CHIP_G33, 0x00020000,
161             "Intel Q35 SVGA controller"},
162         {0x29C28086, CHIP_G33, 0x00020000,
163             "Intel G33 SVGA controller"},
164         {0x29D28086, CHIP_G33, 0x00020000,
165             "Intel Q33 SVGA controller"},
166         {0xA0018086, CHIP_IGD, 0x00010000,
167             "Intel Pineview SVGA controller"},
168         {0xA0118086, CHIP_IGD, 0x00010000,
169             "Intel Pineview (M) SVGA controller"},
170         {0x2A028086, CHIP_I965, 0x00020000,
171             "Intel GM965 SVGA controller"},
172         {0x2A128086, CHIP_I965, 0x00020000,
173             "Intel GME965 SVGA controller"},
174         {0x2A428086, CHIP_G4X, 0x00020000,
175             "Intel GM45 SVGA controller"},
176         {0x2E028086, CHIP_G4X, 0x00020000,
177             "Intel Eaglelake SVGA controller"},
178         {0x2E128086, CHIP_G4X, 0x00020000,
179             "Intel Q45 SVGA controller"},
180         {0x2E228086, CHIP_G4X, 0x00020000,
181             "Intel G45 SVGA controller"},
182         {0x2E328086, CHIP_G4X, 0x00020000,
183             "Intel G41 SVGA controller"},
184         {0x00428086, CHIP_G4X, 0x00020000,
185             "Intel Ironlake (D) SVGA controller"},
186         {0x00468086, CHIP_G4X, 0x00020000,
187             "Intel Ironlake (M) SVGA controller"},
188         {0, 0, 0, NULL}
189 };
190
191 static const struct agp_i810_match*
192 agp_i810_match(device_t dev)
193 {
194         int i, devid;
195
196         if (pci_get_class(dev) != PCIC_DISPLAY
197             || pci_get_subclass(dev) != PCIS_DISPLAY_VGA)
198                 return NULL;
199
200         devid = pci_get_devid(dev);
201         for (i = 0; agp_i810_matches[i].devid != 0; i++) {
202                 if (agp_i810_matches[i].devid == devid)
203                     break;
204         }
205         if (agp_i810_matches[i].devid == 0)
206                 return NULL;
207         else
208                 return &agp_i810_matches[i];
209 }
210
211 /*
212  * Find bridge device.
213  */
214 static device_t
215 agp_i810_find_bridge(device_t dev)
216 {
217         device_t *children, child;
218         int nchildren, i;
219         u_int32_t devid;
220         const struct agp_i810_match *match;
221   
222         match = agp_i810_match(dev);
223         devid = match->devid - match->bridge_offset;
224
225         if (device_get_children(device_get_parent(device_get_parent(dev)),
226                     &children, &nchildren))
227                 return 0;
228
229         for (i = 0; i < nchildren; i++) {
230                 child = children[i];
231
232                 if (pci_get_devid(child) == devid) {
233                         kfree(children, M_TEMP);
234                         return child;
235                 }
236         }
237         kfree(children, M_TEMP);
238         return 0;
239 }
240
241 static void
242 agp_i810_identify(driver_t *driver, device_t parent)
243 {
244
245         if (device_find_child(parent, "agp", -1) == NULL &&
246             agp_i810_match(parent))
247                 device_add_child(parent, "agp", -1);
248 }
249
250 static int
251 agp_i810_probe(device_t dev)
252 {
253         device_t bdev;
254         const struct agp_i810_match *match;
255         u_int8_t smram;
256         int gcc1, deven;
257
258         if (resource_disabled("agp", device_get_unit(dev)))
259                 return (ENXIO);
260         match = agp_i810_match(dev);
261         if (match == NULL)
262                 return ENXIO;
263
264         bdev = agp_i810_find_bridge(dev);
265         if (!bdev) {
266                 if (bootverbose)
267                         kprintf("I810: can't find bridge device\n");
268                 return ENXIO;
269         }
270
271         /*
272          * checking whether internal graphics device has been activated.
273          */
274         switch (match->chiptype) {
275         case CHIP_I810:
276                 smram = pci_read_config(bdev, AGP_I810_SMRAM, 1);
277                 if ((smram & AGP_I810_SMRAM_GMS) ==
278                     AGP_I810_SMRAM_GMS_DISABLED) {
279                         if (bootverbose)
280                                 kprintf("I810: disabled, not probing\n");
281                         return ENXIO;
282                 }
283                 break;
284         case CHIP_I830:
285         case CHIP_I855:
286                 gcc1 = pci_read_config(bdev, AGP_I830_GCC1, 1);
287                 if ((gcc1 & AGP_I830_GCC1_DEV2) ==
288                     AGP_I830_GCC1_DEV2_DISABLED) {
289                         if (bootverbose)
290                                 kprintf("I830: disabled, not probing\n");
291                         return ENXIO;
292                 }
293                 break;
294         case CHIP_I915:
295         case CHIP_I965:
296         case CHIP_G33:
297         case CHIP_IGD:
298         case CHIP_G4X:
299                 deven = pci_read_config(bdev, AGP_I915_DEVEN, 4);
300                 if ((deven & AGP_I915_DEVEN_D2F0) ==
301                     AGP_I915_DEVEN_D2F0_DISABLED) {
302                         if (bootverbose)
303                                 kprintf("I915: disabled, not probing\n");
304                         return ENXIO;
305                 }
306                 break;
307         }
308
309         device_verbose(dev);
310         if (match->devid == 0x35828086) {
311                 switch (pci_read_config(dev, AGP_I85X_CAPID, 1)) {
312                 case AGP_I855_GME:
313                         device_set_desc(dev,
314                             "Intel 82855GME (855GME GMCH) SVGA controller");
315                         break;
316                 case AGP_I855_GM:
317                         device_set_desc(dev,
318                             "Intel 82855GM (855GM GMCH) SVGA controller");
319                         break;
320                 case AGP_I852_GME:
321                         device_set_desc(dev,
322                             "Intel 82852GME (852GME GMCH) SVGA controller");
323                         break;
324                 case AGP_I852_GM:
325                         device_set_desc(dev,
326                             "Intel 82852GM (852GM GMCH) SVGA controller");
327                         break;
328                 default:
329                         device_set_desc(dev,
330                             "Intel 8285xM (85xGM GMCH) SVGA controller");
331                         break;
332                 }
333         } else {
334                 device_set_desc(dev, match->name);
335         }
336
337         return BUS_PROBE_DEFAULT;
338 }
339
340 static void
341 agp_i810_dump_regs(device_t dev)
342 {
343         struct agp_i810_softc *sc = device_get_softc(dev);
344
345         device_printf(dev, "AGP_I810_PGTBL_CTL: %08x\n",
346             bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL));
347
348         switch (sc->chiptype) {
349         case CHIP_I810:
350                 device_printf(dev, "AGP_I810_MISCC: 0x%04x\n",
351                     pci_read_config(sc->bdev, AGP_I810_MISCC, 2));
352                 break;
353         case CHIP_I830:
354                 device_printf(dev, "AGP_I830_GCC1: 0x%02x\n",
355                     pci_read_config(sc->bdev, AGP_I830_GCC1, 1));
356                 break;
357         case CHIP_I855:
358                 device_printf(dev, "AGP_I855_GCC1: 0x%02x\n",
359                     pci_read_config(sc->bdev, AGP_I855_GCC1, 1));
360                 break;
361         case CHIP_I915:
362         case CHIP_I965:
363         case CHIP_G33:
364         case CHIP_IGD:
365         case CHIP_G4X:
366                 device_printf(dev, "AGP_I855_GCC1: 0x%02x\n",
367                     pci_read_config(sc->bdev, AGP_I855_GCC1, 1));
368                 device_printf(dev, "AGP_I915_MSAC: 0x%02x\n",
369                     pci_read_config(sc->bdev, AGP_I915_MSAC, 1));
370                 break;
371         }
372         device_printf(dev, "Aperture resource size: %d bytes\n",
373             AGP_GET_APERTURE(dev));
374 }
375
376 static int
377 agp_i810_attach(device_t dev)
378 {
379         struct agp_i810_softc *sc = device_get_softc(dev);
380         struct agp_gatt *gatt;
381         const struct agp_i810_match *match;
382         int error;
383
384         sc->bdev = agp_i810_find_bridge(dev);
385         if (!sc->bdev)
386                 return ENOENT;
387
388         match = agp_i810_match(dev);
389         sc->chiptype = match->chiptype;
390
391         switch (sc->chiptype) {
392         case CHIP_I810:
393         case CHIP_I830:
394         case CHIP_I855:
395                 sc->sc_res_spec = agp_i810_res_spec;
396                 agp_set_aperture_resource(dev, AGP_APBASE);
397                 break;
398         case CHIP_I915:
399         case CHIP_G33:
400         case CHIP_IGD:
401                 sc->sc_res_spec = agp_i915_res_spec;
402                 agp_set_aperture_resource(dev, AGP_I915_GMADR);
403                 break;
404         case CHIP_I965:
405         case CHIP_G4X:
406                 sc->sc_res_spec = agp_i965_res_spec;
407                 agp_set_aperture_resource(dev, AGP_I915_GMADR);
408                 break;
409         }
410
411         error = agp_generic_attach(dev);
412         if (error)
413                 return error;
414
415         if (sc->chiptype != CHIP_I965 && sc->chiptype != CHIP_G33 &&
416             sc->chiptype != CHIP_IGD && sc->chiptype != CHIP_G4X &&
417             ptoa((vm_paddr_t)Maxmem) > 0xfffffffful)
418         {
419                 device_printf(dev, "agp_i810.c does not support physical "
420                     "memory above 4GB.\n");
421                 return ENOENT;
422         }
423
424         if (bus_alloc_resources(dev, sc->sc_res_spec, sc->sc_res)) {
425                 agp_generic_detach(dev);
426                 return ENODEV;
427         }
428
429         sc->initial_aperture = AGP_GET_APERTURE(dev);
430         if (sc->initial_aperture == 0) {
431                 device_printf(dev, "bad initial aperture size, disabling\n");
432                 return ENXIO;
433         }
434
435         gatt = kmalloc( sizeof(struct agp_gatt), M_AGP, M_INTWAIT);
436         sc->gatt = gatt;
437
438         gatt->ag_entries = AGP_GET_APERTURE(dev) >> AGP_PAGE_SHIFT;
439
440         if ( sc->chiptype == CHIP_I810 ) {
441                 /* Some i810s have on-chip memory called dcache */
442                 if (bus_read_1(sc->sc_res[0], AGP_I810_DRT) &
443                     AGP_I810_DRT_POPULATED)
444                         sc->dcache_size = 4 * 1024 * 1024;
445                 else
446                         sc->dcache_size = 0;
447
448                 /* According to the specs the gatt on the i810 must be 64k */
449                 gatt->ag_virtual = contigmalloc( 64 * 1024, M_AGP, 0, 
450                                         0, ~0, PAGE_SIZE, 0);
451                 if (!gatt->ag_virtual) {
452                         if (bootverbose)
453                                 device_printf(dev, "contiguous allocation failed\n");
454                         bus_release_resources(dev, sc->sc_res_spec,
455                             sc->sc_res);
456                         kfree(gatt, M_AGP);
457                         agp_generic_detach(dev);
458                         return ENOMEM;
459                 }
460                 bzero(gatt->ag_virtual, gatt->ag_entries * sizeof(u_int32_t));
461         
462                 gatt->ag_physical = vtophys((vm_offset_t) gatt->ag_virtual);
463                 agp_flush_cache();
464                 /* Install the GATT. */
465                 bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL,
466                     gatt->ag_physical | 1);
467         } else if ( sc->chiptype == CHIP_I830 ) {
468                 /* The i830 automatically initializes the 128k gatt on boot. */
469                 unsigned int gcc1, pgtblctl;
470                 
471                 gcc1 = pci_read_config(sc->bdev, AGP_I830_GCC1, 1);
472                 switch (gcc1 & AGP_I830_GCC1_GMS) {
473                         case AGP_I830_GCC1_GMS_STOLEN_512:
474                                 sc->stolen = (512 - 132) * 1024 / 4096;
475                                 break;
476                         case AGP_I830_GCC1_GMS_STOLEN_1024: 
477                                 sc->stolen = (1024 - 132) * 1024 / 4096;
478                                 break;
479                         case AGP_I830_GCC1_GMS_STOLEN_8192: 
480                                 sc->stolen = (8192 - 132) * 1024 / 4096;
481                                 break;
482                         default:
483                                 sc->stolen = 0;
484                                 device_printf(dev, "unknown memory configuration, disabling\n");
485                                 bus_release_resources(dev, sc->sc_res_spec,
486                                     sc->sc_res);
487                                 kfree(gatt, M_AGP);
488                                 agp_generic_detach(dev);
489                                 return EINVAL;
490                 }
491
492                 /* GATT address is already in there, make sure it's enabled */
493                 pgtblctl = bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL);
494                 pgtblctl |= 1;
495                 bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL, pgtblctl);
496
497                 gatt->ag_physical = pgtblctl & ~1;
498         } else if (sc->chiptype == CHIP_I855 || sc->chiptype == CHIP_I915 ||
499             sc->chiptype == CHIP_I965 || sc->chiptype == CHIP_G33 ||
500             sc->chiptype == CHIP_IGD || sc->chiptype == CHIP_G4X) {
501                 unsigned int gcc1, pgtblctl, stolen, gtt_size;
502
503                 /* Stolen memory is set up at the beginning of the aperture by
504                  * the BIOS, consisting of the GATT followed by 4kb for the
505                  * BIOS display.
506                  */
507                 switch (sc->chiptype) {
508                 case CHIP_I855:
509                         gtt_size = 128;
510                         break;
511                 case CHIP_I915:
512                         gtt_size = 256;
513                         break;
514                 case CHIP_I965:
515                         switch (bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL) &
516                             AGP_I810_PGTBL_SIZE_MASK) {
517                         case AGP_I810_PGTBL_SIZE_128KB:
518                                 gtt_size = 128;
519                                 break;
520                         case AGP_I810_PGTBL_SIZE_256KB:
521                                 gtt_size = 256;
522                                 break;
523                         case AGP_I810_PGTBL_SIZE_512KB:
524                                 gtt_size = 512;
525                                 break;
526                         case AGP_I965_PGTBL_SIZE_1MB:
527                                 gtt_size = 1024;
528                                 break;
529                         case AGP_I965_PGTBL_SIZE_2MB:
530                                 gtt_size = 2048;
531                                 break;
532                         case AGP_I965_PGTBL_SIZE_1_5MB:
533                                 gtt_size = 1024 + 512;
534                                 break;
535                         default:
536                                 device_printf(dev, "Bad PGTBL size\n");
537                                 bus_release_resources(dev, sc->sc_res_spec,
538                                     sc->sc_res);
539                                 kfree(gatt, M_AGP);
540                                 agp_generic_detach(dev);
541                                 return EINVAL;
542                         }
543                         break;
544                 case CHIP_G33:
545                         gcc1 = pci_read_config(sc->bdev, AGP_I855_GCC1, 2);
546                         switch (gcc1 & AGP_G33_MGGC_GGMS_MASK) {
547                         case AGP_G33_MGGC_GGMS_SIZE_1M:
548                                 gtt_size = 1024;
549                                 break;
550                         case AGP_G33_MGGC_GGMS_SIZE_2M:
551                                 gtt_size = 2048;
552                                 break;
553                         default:
554                                 device_printf(dev, "Bad PGTBL size\n");
555                                 bus_release_resources(dev, sc->sc_res_spec,
556                                     sc->sc_res);
557                                 kfree(gatt, M_AGP);
558                                 agp_generic_detach(dev);
559                                 return EINVAL;
560                         }
561                         break;
562                 case CHIP_IGD:
563                 case CHIP_G4X:
564                         gtt_size = 0;
565                         break;
566                 default:
567                         device_printf(dev, "Bad chiptype\n");
568                         bus_release_resources(dev, sc->sc_res_spec,
569                             sc->sc_res);
570                         kfree(gatt, M_AGP);
571                         agp_generic_detach(dev);
572                         return EINVAL;
573                 }
574
575                 /* GCC1 is called MGGC on i915+ */
576                 gcc1 = pci_read_config(sc->bdev, AGP_I855_GCC1, 1);
577                 switch (gcc1 & AGP_I855_GCC1_GMS) {
578                 case AGP_I855_GCC1_GMS_STOLEN_1M:
579                         stolen = 1024;
580                         break;
581                 case AGP_I855_GCC1_GMS_STOLEN_4M:
582                         stolen = 4 * 1024;
583                         break;
584                 case AGP_I855_GCC1_GMS_STOLEN_8M:
585                         stolen = 8 * 1024;
586                         break;
587                 case AGP_I855_GCC1_GMS_STOLEN_16M:
588                         stolen = 16 * 1024;
589                         break;
590                 case AGP_I855_GCC1_GMS_STOLEN_32M:
591                         stolen = 32 * 1024;
592                         break;
593                 case AGP_I915_GCC1_GMS_STOLEN_48M:
594                         if (sc->chiptype == CHIP_I915 ||
595                             sc->chiptype == CHIP_I965 ||
596                             sc->chiptype == CHIP_G33 ||
597                             sc->chiptype == CHIP_IGD ||
598                             sc->chiptype == CHIP_G4X) {
599                                 stolen = 48 * 1024;
600                         } else {
601                                 stolen = 0;
602                         }
603                         break;
604                 case AGP_I915_GCC1_GMS_STOLEN_64M:
605                         if (sc->chiptype == CHIP_I915 ||
606                             sc->chiptype == CHIP_I965 ||
607                             sc->chiptype == CHIP_G33 ||
608                             sc->chiptype == CHIP_IGD ||
609                             sc->chiptype == CHIP_G4X) {
610                                 stolen = 64 * 1024;
611                         } else {
612                                 stolen = 0;
613                         }
614                         break;
615                 case AGP_G33_GCC1_GMS_STOLEN_128M:
616                         if (sc->chiptype == CHIP_I965 ||
617                             sc->chiptype == CHIP_G33 ||
618                             sc->chiptype == CHIP_IGD ||
619                             sc->chiptype == CHIP_G4X) {
620                                 stolen = 128 * 1024;
621                         } else {
622                                 stolen = 0;
623                         }
624                         break;
625                 case AGP_G33_GCC1_GMS_STOLEN_256M:
626                         if (sc->chiptype == CHIP_I965 ||
627                             sc->chiptype == CHIP_G33 ||
628                             sc->chiptype == CHIP_IGD ||
629                             sc->chiptype == CHIP_G4X) {
630                                 stolen = 256 * 1024;
631                         } else {
632                                 stolen = 0;
633                         }
634                         break;
635                 case AGP_G4X_GCC1_GMS_STOLEN_96M:
636                         if (sc->chiptype == CHIP_I965 ||
637                             sc->chiptype == CHIP_G4X) {
638                                 stolen = 96 * 1024;
639                         } else {
640                                 stolen = 0;
641                         }
642                         break;
643                 case AGP_G4X_GCC1_GMS_STOLEN_160M:
644                         if (sc->chiptype == CHIP_I965 ||
645                             sc->chiptype == CHIP_G4X) {
646                                 stolen = 160 * 1024;
647                         } else {
648                                 stolen = 0;
649                         }
650                         break;
651                 case AGP_G4X_GCC1_GMS_STOLEN_224M:
652                         if (sc->chiptype == CHIP_I965 ||
653                             sc->chiptype == CHIP_G4X) {
654                                 stolen = 224 * 1024;
655                         } else {
656                                 stolen = 0;
657                         }
658                         break;
659                 case AGP_G4X_GCC1_GMS_STOLEN_352M:
660                         if (sc->chiptype == CHIP_I965 ||
661                             sc->chiptype == CHIP_G4X) {
662                                 stolen = 352 * 1024;
663                         } else {
664                                 stolen = 0;
665                         }
666                         break;
667                 default:
668                         device_printf(dev, "unknown memory configuration, "
669                             "disabling\n");
670                         bus_release_resources(dev, sc->sc_res_spec,
671                             sc->sc_res);
672                         kfree(gatt, M_AGP);
673                         agp_generic_detach(dev);
674                         return EINVAL;
675                 }
676
677                 gtt_size += 4;
678
679                 sc->stolen = (stolen - gtt_size) * 1024 / 4096;
680
681                 /* GATT address is already in there, make sure it's enabled */
682                 pgtblctl = bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL);
683                 pgtblctl |= 1;
684                 bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL, pgtblctl);
685
686                 gatt->ag_physical = pgtblctl & ~1;
687         }
688
689         device_printf(dev, "aperture size is %dM",
690             sc->initial_aperture / 1024 / 1024);
691         if (sc->stolen > 0)
692                 kprintf(", detected %dk stolen memory\n", sc->stolen * 4);
693         else
694                 kprintf("\n");
695
696         if (0)
697                 agp_i810_dump_regs(dev);
698
699         return 0;
700 }
701
702 static int
703 agp_i810_detach(device_t dev)
704 {
705         struct agp_i810_softc *sc = device_get_softc(dev);
706
707         agp_free_cdev(dev);
708
709         /* Clear the GATT base. */
710         if ( sc->chiptype == CHIP_I810 ) {
711                 bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL, 0);
712         } else {
713                 unsigned int pgtblctl;
714                 pgtblctl = bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL);
715                 pgtblctl &= ~1;
716                 bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL, pgtblctl);
717         }
718
719         /* Put the aperture back the way it started. */
720         AGP_SET_APERTURE(dev, sc->initial_aperture);
721
722         if ( sc->chiptype == CHIP_I810 ) {
723                 contigfree(sc->gatt->ag_virtual, 64 * 1024, M_AGP);
724         }
725         kfree(sc->gatt, M_AGP);
726
727         bus_release_resources(dev, sc->sc_res_spec, sc->sc_res);
728         agp_free_res(dev);
729
730         return 0;
731 }
732
733 static int
734 agp_i810_resume(device_t dev)
735 {
736         struct agp_i810_softc *sc;
737         sc = device_get_softc(dev);
738
739         AGP_SET_APERTURE(dev, sc->initial_aperture);
740
741         /* Install the GATT. */
742         bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL,
743         sc->gatt->ag_physical | 1);
744
745         return (bus_generic_resume(dev));
746 }
747
748 /**
749  * Sets the PCI resource size of the aperture on i830-class and below chipsets,
750  * while returning failure on later chipsets when an actual change is
751  * requested.
752  *
753  * This whole function is likely bogus, as the kernel would probably need to
754  * reconfigure the placement of the AGP aperture if a larger size is requested,
755  * which doesn't happen currently.
756  */
757 static int
758 agp_i810_set_aperture(device_t dev, u_int32_t aperture)
759 {
760         struct agp_i810_softc *sc = device_get_softc(dev);
761         u_int16_t miscc, gcc1;
762
763         switch (sc->chiptype) {
764         case CHIP_I810:
765                 /*
766                  * Double check for sanity.
767                  */
768                 if (aperture != 32 * 1024 * 1024 && aperture != 64 * 1024 * 1024) {
769                         device_printf(dev, "bad aperture size %d\n", aperture);
770                         return EINVAL;
771                 }
772
773                 miscc = pci_read_config(sc->bdev, AGP_I810_MISCC, 2);
774                 miscc &= ~AGP_I810_MISCC_WINSIZE;
775                 if (aperture == 32 * 1024 * 1024)
776                         miscc |= AGP_I810_MISCC_WINSIZE_32;
777                 else
778                         miscc |= AGP_I810_MISCC_WINSIZE_64;
779         
780                 pci_write_config(sc->bdev, AGP_I810_MISCC, miscc, 2);
781                 break;
782         case CHIP_I830:
783                 if (aperture != 64 * 1024 * 1024 &&
784                     aperture != 128 * 1024 * 1024) {
785                         device_printf(dev, "bad aperture size %d\n", aperture);
786                         return EINVAL;
787                 }
788                 gcc1 = pci_read_config(sc->bdev, AGP_I830_GCC1, 2);
789                 gcc1 &= ~AGP_I830_GCC1_GMASIZE;
790                 if (aperture == 64 * 1024 * 1024)
791                         gcc1 |= AGP_I830_GCC1_GMASIZE_64;
792                 else
793                         gcc1 |= AGP_I830_GCC1_GMASIZE_128;
794
795                 pci_write_config(sc->bdev, AGP_I830_GCC1, gcc1, 2);
796                 break;
797         case CHIP_I855:
798         case CHIP_I915:
799         case CHIP_I965:
800         case CHIP_G33:
801         case CHIP_IGD:
802         case CHIP_G4X:
803                 return agp_generic_set_aperture(dev, aperture);
804         }
805
806         return 0;
807 }
808
809 /**
810  * Writes a GTT entry mapping the page at the given offset from the beginning
811  * of the aperture to the given physical address.
812  */
813 static void
814 agp_i810_write_gtt_entry(device_t dev, int offset, vm_offset_t physical,
815     int enabled)
816 {
817         struct agp_i810_softc *sc = device_get_softc(dev);
818         u_int32_t pte;
819
820         pte = (u_int32_t)physical | 1;
821         if (sc->chiptype == CHIP_I965 || sc->chiptype == CHIP_G33 ||
822             sc->chiptype == CHIP_IGD || sc->chiptype == CHIP_G4X) {
823                 pte |= (physical & 0x0000000f00000000ull) >> 28;
824         } else {
825                 /* If we do actually have memory above 4GB on an older system,
826                  * crash cleanly rather than scribble on system memory,
827                  * so we know we need to fix it.
828                  */
829                 KASSERT((pte & 0x0000000f00000000ull) == 0,
830                     (">4GB physical address in agp"));
831         }
832
833         switch (sc->chiptype) {
834         case CHIP_I810:
835         case CHIP_I830:
836         case CHIP_I855:
837                 bus_write_4(sc->sc_res[0],
838                     AGP_I810_GTT + (offset >> AGP_PAGE_SHIFT) * 4, pte);
839                 break;
840         case CHIP_I915:
841         case CHIP_G33:
842         case CHIP_IGD:
843                 bus_write_4(sc->sc_res[1],
844                     (offset >> AGP_PAGE_SHIFT) * 4, pte);
845                 break;
846         case CHIP_I965:
847                 bus_write_4(sc->sc_res[0],
848                     (offset >> AGP_PAGE_SHIFT) * 4 + (512 * 1024), pte);
849                 break;
850         case CHIP_G4X:
851                 bus_write_4(sc->sc_res[0],
852                     (offset >> AGP_PAGE_SHIFT) * 4 + (2 * 1024 * 1024), pte);
853                 break;
854         }
855 }
856
857 static int
858 agp_i810_bind_page(device_t dev, vm_offset_t offset, vm_offset_t physical)
859 {
860         struct agp_i810_softc *sc = device_get_softc(dev);
861
862         if (offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) {
863                 device_printf(dev, "failed: offset is 0x%08jx, shift is %d, entries is %d\n", (intmax_t)offset, AGP_PAGE_SHIFT, sc->gatt->ag_entries);
864                 return EINVAL;
865         }
866
867         if ( sc->chiptype != CHIP_I810 ) {
868                 if ( (offset >> AGP_PAGE_SHIFT) < sc->stolen ) {
869                         device_printf(dev, "trying to bind into stolen memory");
870                         return EINVAL;
871                 }
872         }
873
874         agp_i810_write_gtt_entry(dev, offset, physical, 1);
875
876         return 0;
877 }
878
879 static int
880 agp_i810_unbind_page(device_t dev, vm_offset_t offset)
881 {
882         struct agp_i810_softc *sc = device_get_softc(dev);
883
884         if (offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT))
885                 return EINVAL;
886
887         if ( sc->chiptype != CHIP_I810 ) {
888                 if ( (offset >> AGP_PAGE_SHIFT) < sc->stolen ) {
889                         device_printf(dev, "trying to unbind from stolen memory");
890                         return EINVAL;
891                 }
892         }
893
894         agp_i810_write_gtt_entry(dev, offset, 0, 0);
895
896         return 0;
897 }
898
899 /*
900  * Writing via memory mapped registers already flushes all TLBs.
901  */
902 static void
903 agp_i810_flush_tlb(device_t dev)
904 {
905 }
906
907 static int
908 agp_i810_enable(device_t dev, u_int32_t mode)
909 {
910
911         return 0;
912 }
913
914 static struct agp_memory *
915 agp_i810_alloc_memory(device_t dev, int type, vm_size_t size)
916 {
917         struct agp_i810_softc *sc = device_get_softc(dev);
918         struct agp_memory *mem;
919
920         if ((size & (AGP_PAGE_SIZE - 1)) != 0)
921                 return 0;
922
923         if (sc->agp.as_allocated + size > sc->agp.as_maxmem)
924                 return 0;
925
926         if (type == 1) {
927                 /*
928                  * Mapping local DRAM into GATT.
929                  */
930                 if ( sc->chiptype != CHIP_I810 )
931                         return 0;
932                 if (size != sc->dcache_size)
933                         return 0;
934         } else if (type == 2) {
935                 /*
936                  * Type 2 is the contiguous physical memory type, that hands
937                  * back a physical address.  This is used for cursors on i810.
938                  * Hand back as many single pages with physical as the user
939                  * wants, but only allow one larger allocation (ARGB cursor)
940                  * for simplicity.
941                  */
942                 if (size != AGP_PAGE_SIZE) {
943                         if (sc->argb_cursor != NULL)
944                                 return 0;
945
946                         /* Allocate memory for ARGB cursor, if we can. */
947                         sc->argb_cursor = contigmalloc(size, M_AGP,
948                            0, 0, ~0, PAGE_SIZE, 0);
949                         if (sc->argb_cursor == NULL)
950                                 return 0;
951                 }
952         }
953
954         mem = kmalloc(sizeof *mem, M_AGP, M_INTWAIT);
955         mem->am_id = sc->agp.as_nextid++;
956         mem->am_size = size;
957         mem->am_type = type;
958         if (type != 1 && (type != 2 || size == AGP_PAGE_SIZE))
959                 mem->am_obj = vm_object_allocate(OBJT_DEFAULT,
960                                                  atop(round_page(size)));
961         else
962                 mem->am_obj = 0;
963
964         if (type == 2) {
965                 if (size == AGP_PAGE_SIZE) {
966                         /*
967                          * Allocate and wire down the page now so that we can
968                          * get its physical address.
969                          */
970                         vm_page_t m;
971         
972                         m = vm_page_grab(mem->am_obj, 0, VM_ALLOC_NORMAL |
973                                                          VM_ALLOC_ZERO |
974                                                          VM_ALLOC_RETRY);
975                         vm_page_wire(m);
976                         mem->am_physical = VM_PAGE_TO_PHYS(m);
977                         vm_page_wakeup(m);
978                 } else {
979                         /* Our allocation is already nicely wired down for us.
980                          * Just grab the physical address.
981                          */
982                         mem->am_physical = vtophys(sc->argb_cursor);
983                 }
984         } else {
985                 mem->am_physical = 0;
986         }
987
988         mem->am_offset = 0;
989         mem->am_is_bound = 0;
990         TAILQ_INSERT_TAIL(&sc->agp.as_memory, mem, am_link);
991         sc->agp.as_allocated += size;
992
993         return mem;
994 }
995
996 static int
997 agp_i810_free_memory(device_t dev, struct agp_memory *mem)
998 {
999         struct agp_i810_softc *sc = device_get_softc(dev);
1000
1001         if (mem->am_is_bound)
1002                 return EBUSY;
1003
1004         if (mem->am_type == 2) {
1005                 if (mem->am_size == AGP_PAGE_SIZE) {
1006                         /*
1007                          * Unwire the page which we wired in alloc_memory.
1008                          */
1009                         vm_page_t m;
1010
1011                         vm_object_hold(mem->am_obj);
1012                         m = vm_page_lookup_busy_wait(mem->am_obj, 0,
1013                                                      FALSE, "agppg");
1014                         vm_object_drop(mem->am_obj);
1015                         vm_page_unwire(m, 0);
1016                         vm_page_wakeup(m);
1017                 } else {
1018                         contigfree(sc->argb_cursor, mem->am_size, M_AGP);
1019                         sc->argb_cursor = NULL;
1020                 }
1021         }
1022
1023         sc->agp.as_allocated -= mem->am_size;
1024         TAILQ_REMOVE(&sc->agp.as_memory, mem, am_link);
1025         if (mem->am_obj)
1026                 vm_object_deallocate(mem->am_obj);
1027         kfree(mem, M_AGP);
1028         return 0;
1029 }
1030
1031 static int
1032 agp_i810_bind_memory(device_t dev, struct agp_memory *mem,
1033                      vm_offset_t offset)
1034 {
1035         struct agp_i810_softc *sc = device_get_softc(dev);
1036         vm_offset_t i;
1037
1038         /* Do some sanity checks first. */
1039         if ((offset & (AGP_PAGE_SIZE - 1)) != 0 ||
1040             offset + mem->am_size > AGP_GET_APERTURE(dev)) {
1041                 device_printf(dev, "binding memory at bad offset %#x\n",
1042                     (int)offset);
1043                 return EINVAL;
1044         }
1045
1046         if (mem->am_type == 2 && mem->am_size != AGP_PAGE_SIZE) {
1047                 lockmgr(&sc->agp.as_lock, LK_EXCLUSIVE);
1048                 if (mem->am_is_bound) {
1049                         lockmgr(&sc->agp.as_lock, LK_RELEASE);
1050                         return EINVAL;
1051                 }
1052                 /* The memory's already wired down, just stick it in the GTT. */
1053                 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) {
1054                         agp_i810_write_gtt_entry(dev, offset + i,
1055                             mem->am_physical + i, 1);
1056                 }
1057                 agp_flush_cache();
1058                 mem->am_offset = offset;
1059                 mem->am_is_bound = 1;
1060                 lockmgr(&sc->agp.as_lock, LK_RELEASE);
1061                 return 0;
1062         }
1063
1064         if (mem->am_type != 1)
1065                 return agp_generic_bind_memory(dev, mem, offset);
1066
1067         if ( sc->chiptype != CHIP_I810 )
1068                 return EINVAL;
1069
1070         for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) {
1071                 bus_write_4(sc->sc_res[0],
1072                     AGP_I810_GTT + (i >> AGP_PAGE_SHIFT) * 4, i | 3);
1073         }
1074
1075         return 0;
1076 }
1077
1078 static int
1079 agp_i810_unbind_memory(device_t dev, struct agp_memory *mem)
1080 {
1081         struct agp_i810_softc *sc = device_get_softc(dev);
1082         vm_offset_t i;
1083
1084         if (mem->am_type == 2 && mem->am_size != AGP_PAGE_SIZE) {
1085                 lockmgr(&sc->agp.as_lock, LK_EXCLUSIVE);
1086                 if (!mem->am_is_bound) {
1087                         lockmgr(&sc->agp.as_lock, LK_RELEASE);
1088                         return EINVAL;
1089                 }
1090
1091                 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) {
1092                         agp_i810_write_gtt_entry(dev, mem->am_offset + i,
1093                             0, 0);
1094                 }
1095                 agp_flush_cache();
1096                 mem->am_is_bound = 0;
1097                 lockmgr(&sc->agp.as_lock, LK_RELEASE);
1098                 return 0;
1099         }
1100
1101         if (mem->am_type != 1)
1102                 return agp_generic_unbind_memory(dev, mem);
1103
1104         if ( sc->chiptype != CHIP_I810 )
1105                 return EINVAL;
1106
1107         for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) {
1108                 bus_write_4(sc->sc_res[0],
1109                     AGP_I810_GTT + (i >> AGP_PAGE_SHIFT) * 4, 0);
1110         }
1111
1112         return 0;
1113 }
1114
1115 static device_method_t agp_i810_methods[] = {
1116         /* Device interface */
1117         DEVMETHOD(device_identify,      agp_i810_identify),
1118         DEVMETHOD(device_probe,         agp_i810_probe),
1119         DEVMETHOD(device_attach,        agp_i810_attach),
1120         DEVMETHOD(device_detach,        agp_i810_detach),
1121         DEVMETHOD(device_suspend,       bus_generic_suspend),
1122         DEVMETHOD(device_resume,        agp_i810_resume),
1123
1124         /* AGP interface */
1125         DEVMETHOD(agp_get_aperture,     agp_generic_get_aperture),
1126         DEVMETHOD(agp_set_aperture,     agp_i810_set_aperture),
1127         DEVMETHOD(agp_bind_page,        agp_i810_bind_page),
1128         DEVMETHOD(agp_unbind_page,      agp_i810_unbind_page),
1129         DEVMETHOD(agp_flush_tlb,        agp_i810_flush_tlb),
1130         DEVMETHOD(agp_enable,           agp_i810_enable),
1131         DEVMETHOD(agp_alloc_memory,     agp_i810_alloc_memory),
1132         DEVMETHOD(agp_free_memory,      agp_i810_free_memory),
1133         DEVMETHOD(agp_bind_memory,      agp_i810_bind_memory),
1134         DEVMETHOD(agp_unbind_memory,    agp_i810_unbind_memory),
1135
1136         { 0, 0 }
1137 };
1138
1139 static driver_t agp_i810_driver = {
1140         "agp",
1141         agp_i810_methods,
1142         sizeof(struct agp_i810_softc),
1143 };
1144
1145 static devclass_t agp_devclass;
1146
1147 DRIVER_MODULE(agp_i810, vgapci, agp_i810_driver, agp_devclass, NULL, NULL);
1148 MODULE_DEPEND(agp_i810, agp, 1, 1, 1);
1149 MODULE_DEPEND(agp_i810, pci, 1, 1, 1);