bce: Implement multiple TX/RX rings and MSI-X support for 5709/5716

bce: Implement multiple TX/RX rings and MSI-X support for 5709/5716

5709/5716 support 9 RX rings, 9 TX rings and 9 MSI-X vectors; each
MSI-X vector has its own interrupt moderation parameters.

(N + 1) RX rings, N TX rings and (N + 1) MSI-X vectors will be enabled;
N is ncpus2, if ncpus2 is less than 8, else N will be 8.

The extra RX ring is enabled mainly because:
The first RX ring is only used for packets whose RSS hash could not
be calculated, so it is actually _not_ involved in RSS.  This extra RX
ring is used for the packets whose masked RSS hash equal 0.

An extra MSI-X vector is allocated for this extra RX ring; there is no
correponding TX ring for this extra RX ring.  In polling(4), this extra
RX ring is polled along with the first RX ring in the first RX polling
handler, in which the packets whose RSS hash equal 0 should be processed.

Hardware provided RSS hash and packet type are not utilized yet; they will
be supported in the upcoming commits.

Related hardware registers and hardware initialization order are infered
from Linux's bnx2 (*); NetXtremeII-PG203-R.pdf provided on Broadcom's
website does not contain enough information for multiple rings and MSI-X
to function.

(*) Unlike Linux's bnx2, which limits number of RX rings to 8, DragonFly
limits number of RX rings to 9 and 9 RX rings actually work quite well.