sys/dev/netif/sr/if_sr.c

   1 /*
   2  * Copyright (c) 1996 - 2001 John Hay.
   3  * Copyright (c) 1996 SDL Communications, Inc.
   4  * All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice, this list of conditions and the following disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  * 3. Neither the name of the author nor the names of any co-contributors
  15  *    may be used to endorse or promote products derived from this software
  16  *    without specific prior written permission.
  17  *
  18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  28  * SUCH DAMAGE.
  29  *
  30  * $FreeBSD: src/sys/dev/sr/if_sr.c,v 1.48.2.1 2002/06/17 15:10:58 jhay Exp $
  31  * $DragonFly: src/sys/dev/netif/sr/if_sr.c,v 1.24 2008/03/07 11:34:19 sephe Exp $
  32  */
  33
  34 /*
  35  * Programming assumptions and other issues.
  36  *
  37  * Only a 16K window will be used.
  38  *
  39  * The descriptors of a DMA channel will fit in a 16K memory window.
  40  *
  41  * The buffers of a transmit DMA channel will fit in a 16K memory window.
  42  *
  43  * When interface is going up, handshaking is set and it is only cleared
  44  * when the interface is down'ed.
  45  *
  46  * There should be a way to set/reset Raw HDLC/PPP, Loopback, DCE/DTE,
  47  * internal/external clock, etc.....
  48  *
  49  */
  50
  51 #include "opt_netgraph.h"
  52 #ifdef NETGRAPH
  53 #include "if_sr.h"
  54 #endif  /* NETGRAPH */
  55
  56 #include <sys/param.h>
  57 #include <sys/systm.h>
  58 #include <sys/kernel.h>
  59 #include <sys/malloc.h>
  60 #include <sys/mbuf.h>
  61 #include <sys/sockio.h>
  62 #include <sys/socket.h>
  63 #include <sys/thread2.h>
  64 #include <sys/bus.h>
  65 #include <sys/rman.h>
  66
  67 #include <net/if.h>
  68 #ifdef NETGRAPH
  69 #include <sys/syslog.h>
  70 #else /* NETGRAPH */
  71 #include <net/sppp/if_sppp.h>
  72
  73 #include <net/bpf.h>
  74 #endif  /* NETGRAPH */
  75
  76 #include <machine/md_var.h>
  77
  78 #include "../ic_layer/hd64570.h"
  79 #include "if_srregs.h"
  80
  81 #ifdef NETGRAPH
  82 #include <netgraph/ng_message.h>
  83 #include <netgraph/netgraph.h>
  84 #endif /* NETGRAPH */
  85 /* #define USE_MODEMCK */
  86
  87 #ifndef BUGGY
  88 #define BUGGY           0
  89 #endif
  90
  91 #ifndef NETGRAPH
  92 #define PPP_HEADER_LEN  4
  93 #endif /* NETGRAPH */
  94
  95 static int      next_sc_unit = 0;
  96 #ifndef NETGRAPH
  97 #ifdef USE_MODEMCK
  98 static int      sr_watcher = 0;
  99 #endif
 100 #endif /* NETGRAPH */
 101
 102 /*
 103  * Define the software interface for the card... There is one for
 104  * every channel (port).
 105  */
 106 struct sr_softc {
 107 #ifndef NETGRAPH
 108         struct  sppp ifsppp;    /* PPP service w/in system */
 109 #endif /* NETGRAPH */
 110         struct  sr_hardc *hc;   /* card-level information */
 111
 112         int     unit;           /* With regard to all sr devices */
 113         int     subunit;        /* With regard to this card */
 114
 115         struct  buf_block {
 116                 u_int   txdesc; /* DPRAM offset */
 117                 u_int   txstart;/* DPRAM offset */
 118                 u_int   txend;  /* DPRAM offset */
 119                 u_int   txtail; /* # of 1st free gran */
 120                 u_int   txmax;  /* # of free grans */
 121                 u_int   txeda;  /* err descr addr */
 122         } block[SR_TX_BLOCKS];
 123
 124         char    xmit_busy;      /* Transmitter is busy */
 125         char    txb_inuse;      /* # of tx grans in use */
 126         u_int   txb_new;        /* ndx to new buffer */
 127         u_int   txb_next_tx;    /* ndx to next gran rdy tx */
 128
 129         u_int   rxdesc;         /* DPRAM offset */
 130         u_int   rxstart;        /* DPRAM offset */
 131         u_int   rxend;          /* DPRAM offset */
 132         u_int   rxhind;         /* ndx to the hd of rx bufrs */
 133         u_int   rxmax;          /* # of avail grans */
 134
 135         u_int   clk_cfg;        /* Clock configuration */
 136
 137         int     scachan;        /* channel # on card */
 138 #ifdef NETGRAPH
 139         int     running;        /* something is attached so we are running */
 140         int     dcd;            /* do we have dcd? */
 141         /* ---netgraph bits --- */
 142         char            nodename[NG_NODESIZ]; /* store our node name */
 143         int             datahooks;      /* number of data hooks attached */
 144         node_p          node;           /* netgraph node */
 145         hook_p          hook;           /* data hook */
 146         hook_p          debug_hook;
 147         struct ifqueue  xmitq_hipri;    /* hi-priority transmit queue */
 148         struct ifqueue  xmitq;          /* transmit queue */
 149         int             flags;          /* state */
 150 #define SCF_RUNNING     0x01            /* board is active */
 151 #define SCF_OACTIVE     0x02            /* output is active */
 152         int             out_dog;        /* watchdog cycles output count-down */
 153         struct callout  sr_timer;       /* timeout(9) handle */
 154         u_long          inbytes, outbytes;      /* stats */
 155         u_long          lastinbytes, lastoutbytes; /* a second ago */
 156         u_long          inrate, outrate;        /* highest rate seen */
 157         u_long          inlast;         /* last input N secs ago */
 158         u_long          out_deficit;    /* output since last input */
 159         u_long          oerrors, ierrors[6];
 160         u_long          opackets, ipackets;
 161 #endif /* NETGRAPH */
 162 };
 163
 164 #ifdef NETGRAPH
 165 #define DOG_HOLDOFF     6       /* dog holds off for 6 secs */
 166 #define QUITE_A_WHILE   300     /* 5 MINUTES */
 167 #define LOTS_OF_PACKETS 100
 168 #endif /* NETGRAPH */
 169
 170 /*
 171  * Baud Rate table for Sync Mode.
 172  * Each entry consists of 3 elements:
 173  * Baud Rate (x100) , TMC, BR
 174  *
 175  * Baud Rate = FCLK / TMC / 2^BR
 176  * Baud table for Crystal freq. of 9.8304 Mhz
 177  */
 178 #ifdef N2_TEST_SPEED
 179 struct rate_line {
 180         int     target;         /* target rate/100 */
 181         int     tmc_reg;        /* TMC register value */
 182         int     br_reg;         /* BR (BaudRateClk) selector */
 183 } n2_rates[] = {
 184         /* Baudx100     TMC             BR */
 185         { 3,            128,            8 },
 186         { 6,            128,            7 },
 187         { 12,           128,            6 },
 188         { 24,           128,            5 },
 189         { 48,           128,            4 },
 190         { 96,           128,            3 },
 191         { 192,          128,            2 },
 192         { 384,          128,            1 },
 193         { 560,          88,             1 },
 194         { 640,          77,             1 },
 195         { 1280,         38,             1 },
 196         { 2560,         19,             1 },
 197         { 5120,         10,             1 },
 198         { 10000,        5,              1 },
 199         { 15000,        3,              1 },
 200         { 25000,        2,              1 },
 201         { 50000,        1,              1 },
 202         { 0,            0,              0 }
 203 };
 204
 205 int     sr_test_speed[] = {
 206         N2_TEST_SPEED,
 207         N2_TEST_SPEED
 208 };
 209
 210 int     etc0vals[] = {
 211         SR_MCR_ETC0,            /* ISA channel 0 */
 212         SR_MCR_ETC1,            /* ISA channel 1 */
 213         SR_FECR_ETC0,           /* PCI channel 0 */
 214         SR_FECR_ETC1            /* PCI channel 1 */
 215 };
 216 #endif
 217
 218 devclass_t sr_devclass;
 219 #ifndef NETGRAPH
 220 DECLARE_DUMMY_MODULE(if_sr);
 221 MODULE_DEPEND(if_sr, sppp, 1, 1, 1);
 222 #else
 223 MODULE_DEPEND(ng_sync_sr, netgraph, 1, 1, 1);
 224 #endif
 225
 226 static void     srintr(void *arg);
 227 static void     sr_xmit(struct sr_softc *sc);
 228 #ifndef NETGRAPH
 229 static void     srstart(struct ifnet *ifp);
 230 static int      srioctl(struct ifnet *ifp, u_long cmd, caddr_t data,
 231                         struct ucred *);
 232 static void     srwatchdog(struct ifnet *ifp);
 233 #else
 234 static void     srstart(struct sr_softc *sc);
 235 static void     srwatchdog(struct sr_softc *sc);
 236 #endif /* NETGRAPH */
 237 static int      sr_packet_avail(struct sr_softc *sc, int *len, u_char *rxstat);
 238 static void     sr_copy_rxbuf(struct mbuf *m, struct sr_softc *sc, int len);
 239 static void     sr_eat_packet(struct sr_softc *sc, int single);
 240 static void     sr_get_packets(struct sr_softc *sc);
 241
 242 static void     sr_up(struct sr_softc *sc);
 243 static void     sr_down(struct sr_softc *sc);
 244 static void     src_init(struct sr_hardc *hc);
 245 static void     sr_init_sca(struct sr_hardc *hc);
 246 static void     sr_init_msci(struct sr_softc *sc);
 247 static void     sr_init_rx_dmac(struct sr_softc *sc);
 248 static void     sr_init_tx_dmac(struct sr_softc *sc);
 249 static void     sr_dmac_intr(struct sr_hardc *hc, u_char isr);
 250 static void     sr_msci_intr(struct sr_hardc *hc, u_char isr);
 251 static void     sr_timer_intr(struct sr_hardc *hc, u_char isr);
 252 #ifndef NETGRAPH
 253 #ifdef USE_MODEMCK
 254 static void     sr_modemck(void *x);
 255 #endif
 256 #else
 257 static void     sr_modemck(struct sr_softc *x);
 258 #endif /* NETGRAPH */
 259
 260 #ifdef NETGRAPH
 261 static  void    ngsr_watchdog_frame(void * arg);
 262 static  void    ngsr_init(void* ignored);
 263
 264 static ng_constructor_t ngsr_constructor;
 265 static ng_rcvmsg_t      ngsr_rcvmsg;
 266 static ng_shutdown_t    ngsr_rmnode;
 267 static ng_newhook_t     ngsr_newhook;
 268 /*static ng_findhook_t  ngsr_findhook; */
 269 static ng_connect_t     ngsr_connect;
 270 static ng_rcvdata_t     ngsr_rcvdata;
 271 static ng_disconnect_t  ngsr_disconnect;
 272
 273 static struct ng_type typestruct = {
 274         NG_VERSION,
 275         NG_SR_NODE_TYPE,
 276         NULL,
 277         ngsr_constructor,
 278         ngsr_rcvmsg,
 279         ngsr_rmnode,
 280         ngsr_newhook,
 281         NULL,
 282         ngsr_connect,
 283         ngsr_rcvdata,
 284         ngsr_rcvdata,
 285         ngsr_disconnect,
 286         NULL
 287 };
 288
 289 static int      ngsr_done_init = 0;
 290 #endif /* NETGRAPH */
 291
 292 /*
 293  * Register the ports on the adapter.
 294  * Fill in the info for each port.
 295 #ifndef NETGRAPH
 296  * Attach each port to sppp and bpf.
 297 #endif
 298  */
 299 int
 300 sr_attach(device_t device)
 301 {
 302         int intf_sw, pndx;
 303         u_int32_t flags;
 304         u_int fecr, *fecrp;
 305         struct sr_hardc *hc;
 306         struct sr_softc *sc;
 307 #ifndef NETGRAPH
 308         struct ifnet *ifp;
 309 #endif /* NETGRAPH */
 310         int unit;               /* index: channel w/in card */
 311
 312         hc = (struct sr_hardc *)device_get_softc(device);
 313         MALLOC(sc, struct sr_softc *,
 314                 hc->numports * sizeof(struct sr_softc),
 315                 M_DEVBUF, M_WAITOK | M_ZERO);
 316         hc->sc = sc;
 317
 318         /*
 319          * Get the TX clock direction and configuration. The default is a
 320          * single external clock which is used by RX and TX.
 321          */
 322         switch(hc->cardtype) {
 323         case SR_CRD_N2:
 324                 flags = device_get_flags(device);
 325 #ifdef N2_TEST_SPEED
 326                 if (sr_test_speed[0] > 0)
 327                         hc->sc[0].clk_cfg = SR_FLAGS_INT_CLK;
 328                 else
 329 #endif
 330                 if (flags & SR_FLAGS_0_CLK_MSK)
 331                         hc->sc[0].clk_cfg =
 332                             (flags & SR_FLAGS_0_CLK_MSK)
 333                             >> SR_FLAGS_CLK_SHFT;
 334
 335                 if (hc->numports == 2)
 336 #ifdef N2_TEST_SPEED
 337                         if (sr_test_speed[1] > 0)
 338                                 hc->sc[0].clk_cfg = SR_FLAGS_INT_CLK;
 339                         else
 340 #endif
 341                         if (flags & SR_FLAGS_1_CLK_MSK)
 342                                 hc->sc[1].clk_cfg = (flags & SR_FLAGS_1_CLK_MSK)
 343                                     >> (SR_FLAGS_CLK_SHFT +
 344                                     SR_FLAGS_CLK_CHAN_SHFT);
 345                 break;
 346         case SR_CRD_N2PCI:
 347                 fecrp = (u_int *)(hc->sca_base + SR_FECR);
 348                 fecr = *fecrp;
 349                 for (pndx = 0; pndx < hc->numports; pndx++, sc++) {
 350                         switch (pndx) {
 351                         case 1:
 352                                 intf_sw = fecr & SR_FECR_ID1 >> SR_FE_ID1_SHFT;
 353                                 break;
 354                         case 0:
 355                         default:
 356                                 intf_sw = fecr & SR_FECR_ID0 >> SR_FE_ID0_SHFT;
 357                         }
 358
 359 #ifdef N2_TEST_SPEED
 360                         if (sr_test_speed[pndx] > 0)
 361                                 sc->clk_cfg = SR_FLAGS_INT_CLK;
 362                         else
 363 #endif
 364                                 switch (intf_sw) {
 365                                 default:
 366                                 case SR_FE_ID_RS232:
 367                                 case SR_FE_ID_HSSI:
 368                                 case SR_FE_ID_RS422:
 369                                 case SR_FE_ID_TEST:
 370                                         break;
 371
 372                                 case SR_FE_ID_V35:
 373                                         sc->clk_cfg = SR_FLAGS_EXT_SEP_CLK;
 374                                         break;
 375
 376                                 case SR_FE_ID_X21:
 377                                         sc->clk_cfg = SR_FLAGS_EXT_CLK;
 378                                         break;
 379                                 }
 380                 }
 381                 sc = hc->sc;
 382                 break;
 383         }
 384
 385         /*
 386          * Report Card configuration information before we start configuring
 387          * each channel on the card...
 388          */
 389         kprintf("src%d: %uK RAM (%d mempages) @ %08x-%08x, %u ports.\n",
 390                hc->cunit, hc->memsize / 1024, hc->mempages,
 391                (u_int)hc->mem_start, (u_int)hc->mem_end, hc->numports);
 392
 393         src_init(hc);
 394         sr_init_sca(hc);
 395
 396         if (BUS_SETUP_INTR(device_get_parent(device), device, hc->res_irq,
 397                            0, srintr, hc,
 398                            &hc->intr_cookie, NULL) != 0)
 399                 goto errexit;
 400
 401         /*
 402          * Now configure each port on the card.
 403          */
 404         for (unit = 0; unit < hc->numports; sc++, unit++) {
 405                 sc->hc = hc;
 406                 sc->subunit = unit;
 407                 sc->unit = next_sc_unit;
 408                 next_sc_unit++;
 409                 sc->scachan = unit % NCHAN;
 410
 411                 sr_init_rx_dmac(sc);
 412                 sr_init_tx_dmac(sc);
 413                 sr_init_msci(sc);
 414
 415                 kprintf("sr%d: Adapter %d, port %d.\n",
 416                        sc->unit, hc->cunit, sc->subunit);
 417
 418 #ifndef NETGRAPH
 419                 ifp = &sc->ifsppp.pp_if;
 420                 ifp->if_softc = sc;
 421                 if_initname(ifp, "sr", sc->unit);
 422                 ifp->if_mtu = PP_MTU;
 423                 ifp->if_flags = IFF_POINTOPOINT | IFF_MULTICAST;
 424                 ifp->if_ioctl = srioctl;
 425                 ifp->if_start = srstart;
 426                 ifp->if_watchdog = srwatchdog;
 427
 428                 sc->ifsppp.pp_flags = PP_KEEPALIVE;
 429                 sppp_attach((struct ifnet *)&sc->ifsppp);
 430                 if_attach(ifp, NULL);
 431
 432                 bpfattach(ifp, DLT_PPP, PPP_HEADER_LEN);
 433 #else   /* NETGRAPH */
 434                 /*
 435                  * we have found a node, make sure our 'type' is availabe.
 436                  */
 437                 if (ngsr_done_init == 0) ngsr_init(NULL);
 438                 if (ng_make_node_common(&typestruct, &sc->node) != 0)
 439                         goto errexit;
 440                 sc->node->private = sc;
 441                 callout_init(&sc->sr_timer);
 442                 sc->xmitq.ifq_maxlen = IFQ_MAXLEN;
 443                 sc->xmitq_hipri.ifq_maxlen = IFQ_MAXLEN;
 444                 ksprintf(sc->nodename, "%s%d", NG_SR_NODE_TYPE, sc->unit);
 445                 if (ng_name_node(sc->node, sc->nodename)) {
 446                         ng_rmnode(sc->node);
 447                         ng_unref(sc->node);
 448                         return (0);
 449                 }
 450                 sc->running = 0;
 451 #endif  /* NETGRAPH */
 452         }
 453
 454         return (0);
 455
 456 errexit:
 457         sr_deallocate_resources(device);
 458         return (ENXIO);
 459 }
 460
 461 int
 462 sr_detach(device_t device)
 463 {
 464         device_t parent = device_get_parent(device);
 465         struct sr_hardc *hc = device_get_softc(device);
 466
 467         if (hc->intr_cookie != NULL) {
 468                 if (BUS_TEARDOWN_INTR(parent, device,
 469                         hc->res_irq, hc->intr_cookie) != 0) {
 470                                 kprintf("intr teardown failed.. continuing\n");
 471                 }
 472                 hc->intr_cookie = NULL;
 473         }
 474
 475         /* XXX Stop the DMA. */
 476
 477         /*
 478          * deallocate any system resources we may have
 479          * allocated on behalf of this driver.
 480          */
 481         FREE(hc->sc, M_DEVBUF);
 482         hc->sc = NULL;
 483         hc->mem_start = NULL;
 484         return (sr_deallocate_resources(device));
 485 }
 486
 487 int
 488 sr_allocate_irq(device_t device, int rid, u_long size)
 489 {
 490         struct sr_hardc *hc = device_get_softc(device);
 491
 492         hc->rid_irq = rid;
 493         hc->res_irq = bus_alloc_resource_any(device, SYS_RES_IRQ,
 494             &hc->rid_irq, RF_SHAREABLE|RF_ACTIVE);
 495         if (hc->res_irq == NULL) {
 496                 goto errexit;
 497         }
 498         return (0);
 499
 500 errexit:
 501         sr_deallocate_resources(device);
 502         return (ENXIO);
 503 }
 504
 505 int
 506 sr_allocate_memory(device_t device, int rid, u_long size)
 507 {
 508         struct sr_hardc *hc = device_get_softc(device);
 509
 510         hc->rid_memory = rid;
 511         hc->res_memory = bus_alloc_resource(device, SYS_RES_MEMORY,
 512                         &hc->rid_memory, 0ul, ~0ul, size, RF_ACTIVE);
 513         if (hc->res_memory == NULL) {
 514                 goto errexit;
 515         }
 516         return (0);
 517
 518 errexit:
 519         sr_deallocate_resources(device);
 520         return (ENXIO);
 521 }
 522
 523 int
 524 sr_allocate_plx_memory(device_t device, int rid, u_long size)
 525 {
 526         struct sr_hardc *hc = device_get_softc(device);
 527
 528         hc->rid_plx_memory = rid;
 529         hc->res_plx_memory = bus_alloc_resource(device, SYS_RES_MEMORY,
 530                         &hc->rid_plx_memory, 0ul, ~0ul, size, RF_ACTIVE);
 531         if (hc->res_plx_memory == NULL) {
 532                 goto errexit;
 533         }
 534         return (0);
 535
 536 errexit:
 537         sr_deallocate_resources(device);
 538         return (ENXIO);
 539 }
 540
 541 int
 542 sr_deallocate_resources(device_t device)
 543 {
 544         struct sr_hardc *hc = device_get_softc(device);
 545
 546         if (hc->res_irq != 0) {
 547                 bus_deactivate_resource(device, SYS_RES_IRQ,
 548                         hc->rid_irq, hc->res_irq);
 549                 bus_release_resource(device, SYS_RES_IRQ,
 550                         hc->rid_irq, hc->res_irq);
 551                 hc->res_irq = 0;
 552         }
 553         if (hc->res_memory != 0) {
 554                 bus_deactivate_resource(device, SYS_RES_MEMORY,
 555                         hc->rid_memory, hc->res_memory);
 556                 bus_release_resource(device, SYS_RES_MEMORY,
 557                         hc->rid_memory, hc->res_memory);
 558                 hc->res_memory = 0;
 559         }
 560         if (hc->res_plx_memory != 0) {
 561                 bus_deactivate_resource(device, SYS_RES_MEMORY,
 562                         hc->rid_plx_memory, hc->res_plx_memory);
 563                 bus_release_resource(device, SYS_RES_MEMORY,
 564                         hc->rid_plx_memory, hc->res_plx_memory);
 565                 hc->res_plx_memory = 0;
 566         }
 567         return (0);
 568 }
 569
 570 /*
 571  * N2 Interrupt Service Routine
 572  *
 573  * First figure out which SCA gave the interrupt.
 574  * Process it.
 575  * See if there is other interrupts pending.
 576  * Repeat until there no interrupts remain.
 577  */
 578 static void
 579 srintr(void *arg)
 580 {
 581         struct sr_hardc *hc = (struct sr_hardc *)arg;
 582         sca_regs *sca = hc->sca;        /* MSCI register tree */
 583         u_char  isr0, isr1, isr2;       /* interrupt statii captured */
 584
 585 #if BUGGY > 1
 586         kprintf("sr: srintr_hc(hc=%08x)\n", hc);
 587 #endif
 588
 589         /*
 590          * Since multiple interfaces may share this interrupt, we must loop
 591          * until no interrupts are still pending service.
 592          */
 593         while (1) {
 594                 /*
 595                  * Read all three interrupt status registers from the N2
 596                  * card...
 597                  */
 598                 isr0 = SRC_GET8(hc->sca_base, sca->isr0);
 599                 isr1 = SRC_GET8(hc->sca_base, sca->isr1);
 600                 isr2 = SRC_GET8(hc->sca_base, sca->isr2);
 601
 602                 /*
 603                  * If all three registers returned 0, we've finished
 604                  * processing interrupts from this device, so we can quit
 605                  * this loop...
 606                  */
 607                 if ((isr0 | isr1 | isr2) == 0)
 608                         break;
 609
 610 #if BUGGY > 2
 611                 kprintf("src%d: srintr_hc isr0 %x, isr1 %x, isr2 %x\n",
 612 #ifndef NETGRAPH
 613                         unit, isr0, isr1, isr2);
 614 #else
 615                         hc->cunit, isr0, isr1, isr2);
 616 #endif /* NETGRAPH */
 617 #endif
 618
 619                 /*
 620                  * Now we can dispatch the interrupts. Since we don't expect
 621                  * either MSCI or timer interrupts, we'll test for DMA
 622                  * interrupts first...
 623                  */
 624                 if (isr1)       /* DMA-initiated interrupt */
 625                         sr_dmac_intr(hc, isr1);
 626
 627                 if (isr0)       /* serial part IRQ? */
 628                         sr_msci_intr(hc, isr0);
 629
 630                 if (isr2)       /* timer-initiated interrupt */
 631                         sr_timer_intr(hc, isr2);
 632         }
 633 }
 634
 635 /*
 636  * This will only start the transmitter. It is assumed that the data
 637  * is already there.
 638  * It is normally called from srstart() or sr_dmac_intr().
 639  */
 640 static void
 641 sr_xmit(struct sr_softc *sc)
 642 {
 643         u_short cda_value;      /* starting descriptor */
 644         u_short eda_value;      /* ending descriptor */
 645         struct sr_hardc *hc;
 646 #ifndef NETGRAPH
 647         struct ifnet *ifp;      /* O/S Network Services */
 648 #endif /* NETGRAPH */
 649         dmac_channel *dmac;     /* DMA channel registers */
 650
 651 #if BUGGY > 0
 652         kprintf("sr: sr_xmit( sc=%08x)\n", sc);
 653 #endif
 654
 655         hc = sc->hc;
 656 #ifndef NETGRAPH
 657         ifp = &sc->ifsppp.pp_if;
 658 #endif /* NETGRAPH */
 659         dmac = &hc->sca->dmac[DMAC_TXCH(sc->scachan)];
 660
 661         /*
 662          * Get the starting and ending addresses of the chain to be
 663          * transmitted and pass these on to the DMA engine on-chip.
 664          */
 665         cda_value = sc->block[sc->txb_next_tx].txdesc + hc->mem_pstart;
 666         cda_value &= 0x00ffff;
 667         eda_value = sc->block[sc->txb_next_tx].txeda + hc->mem_pstart;
 668         eda_value &= 0x00ffff;
 669
 670         SRC_PUT16(hc->sca_base, dmac->cda, cda_value);
 671         SRC_PUT16(hc->sca_base, dmac->eda, eda_value);
 672
 673         /*
 674          * Now we'll let the DMA status register know about this change
 675          */
 676         SRC_PUT8(hc->sca_base, dmac->dsr, SCA_DSR_DE);
 677
 678         sc->xmit_busy = 1;      /* mark transmitter busy */
 679
 680 #if BUGGY > 2
 681         kprintf("sr%d: XMIT  cda=%04x, eda=%4x, rcda=%08lx\n",
 682                sc->unit, cda_value, eda_value,
 683                sc->block[sc->txb_next_tx].txdesc + hc->mem_pstart);
 684 #endif
 685
 686         sc->txb_next_tx++;      /* update next transmit seq# */
 687
 688         if (sc->txb_next_tx == SR_TX_BLOCKS)    /* handle wrap... */
 689                 sc->txb_next_tx = 0;
 690
 691 #ifndef NETGRAPH
 692         /*
 693          * Finally, we'll set a timout (which will start srwatchdog())
 694          * within the O/S network services layer...
 695          */
 696         ifp->if_timer = 2;      /* Value in seconds. */
 697 #else
 698         /*
 699          * Don't time out for a while.
 700          */
 701         sc->out_dog = DOG_HOLDOFF;      /* give ourself some breathing space*/
 702 #endif /* NETGRAPH */
 703 }
 704
 705 /*
 706  * This function will be called from the upper level when a user add a
 707  * packet to be send, and from the interrupt handler after a finished
 708  * transmit.
 709  *
 710  * This function only place the data in the oncard buffers. It does not
 711  * start the transmition. sr_xmit() does that.
 712  *
 713  * Transmitter idle state is indicated by the IFF_OACTIVE flag.
 714  * The function that clears that should ensure that the transmitter
 715  * and its DMA is in a "good" idle state.
 716  */
 717 #ifndef NETGRAPH
 718 static void
 719 srstart(struct ifnet *ifp)
 720 {
 721         struct sr_softc *sc;    /* channel control structure */
 722 #else
 723 static void
 724 srstart(struct sr_softc *sc)
 725 {
 726 #endif /* NETGRAPH */
 727         struct sr_hardc *hc;    /* card control/config block */
 728         int len;                /* total length of a packet */
 729         int pkts;               /* packets placed in DPRAM */
 730         int tlen;               /* working length of pkt */
 731         u_int i;
 732         struct mbuf *mtx;       /* message buffer from O/S */
 733         u_char *txdata;         /* buffer address in DPRAM */
 734         sca_descriptor *txdesc; /* working descriptor pointr */
 735         struct buf_block *blkp;
 736
 737 #ifndef NETGRAPH
 738 #if BUGGY > 0
 739         kprintf("sr: srstart( ifp=%08x)\n", ifp);
 740 #endif
 741         sc = ifp->if_softc;
 742         if ((ifp->if_flags & IFF_RUNNING) == 0)
 743                 return;
 744 #endif /* NETGRAPH */
 745         hc = sc->hc;
 746         /*
 747          * It is OK to set the memory window outside the loop because all tx
 748          * buffers and descriptors are assumed to be in the same 16K window.
 749          */
 750
 751         /*
 752          * Loop to place packets into DPRAM.
 753          *
 754          * We stay in this loop until there is nothing in
 755          * the TX queue left or the tx buffers are full.
 756          */
 757 top_srstart:
 758
 759         /*
 760          * See if we have space for more packets.
 761          */
 762         if (sc->txb_inuse == SR_TX_BLOCKS) {    /* out of space? */
 763 #ifndef NETGRAPH
 764                 ifp->if_flags |= IFF_OACTIVE;   /* yes, mark active */
 765 #else
 766                 /*ifp->if_flags |= IFF_OACTIVE;*/       /* yes, mark active */
 767 #endif /* NETGRAPH */
 768
 769 #if BUGGY > 9
 770                 kprintf("sr%d.srstart: sc->txb_inuse=%d; DPRAM full...\n",
 771                        sc->unit, sc->txb_inuse);
 772 #endif
 773                 return;
 774         }
 775         /*
 776          * OK, the card can take more traffic.  Let's see if there's any
 777          * pending from the system...
 778          *
 779          * NOTE:
 780          * The architecture of the networking interface doesn't
 781          * actually call us like 'write()', providing an address.  We get
 782          * started, a lot like a disk strategy routine, and we actually call
 783          * back out to the system to get traffic to send...
 784          *
 785          * NOTE:
 786          * If we were gonna run through another layer, we would use a
 787          * dispatch table to select the service we're getting a packet
 788          * from...
 789          */
 790 #ifndef NETGRAPH
 791         mtx = sppp_dequeue(ifp);
 792 #else /* NETGRAPH */
 793         IF_DEQUEUE(&sc->xmitq_hipri, mtx);
 794         if (mtx == NULL) {
 795                 IF_DEQUEUE(&sc->xmitq, mtx);
 796         }
 797 #endif /* NETGRAPH */
 798         if (!mtx) {
 799                 return;
 800         }
 801         /*
 802          * OK, we got a packet from the network services of the O/S. Now we
 803          * can move it into the DPRAM (under control of the descriptors) and
 804          * fire it off...
 805          */
 806         pkts = 0;
 807         i = 0;                  /* counts # of granules used */
 808
 809         blkp = &sc->block[sc->txb_new]; /* address of free granule */
 810         txdesc = (sca_descriptor *)
 811             (hc->mem_start + (blkp->txdesc & hc->winmsk));
 812
 813         txdata = (u_char *)(hc->mem_start
 814                             + (blkp->txstart & hc->winmsk));
 815
 816         /*
 817          * Now we'll try to install as many packets as possible into the
 818          * card's DP RAM buffers.
 819          */
 820         for (;;) {              /* perform actual copy of packet */
 821                 len = mtx->m_pkthdr.len;        /* length of message */
 822
 823 #if BUGGY > 1
 824                 kprintf("sr%d.srstart: mbuf @ %08lx, %d bytes\n",
 825                            sc->unit, mtx, len);
 826 #endif
 827
 828 #ifndef NETGRAPH
 829                 BPF_MTAP(ifp, mtx);
 830 #else   /* NETGRAPH */
 831                 sc->outbytes += len;
 832 #endif  /* NETGRAPH */
 833
 834                 /*
 835                  * We can perform a straight copy because the tranmit
 836                  * buffers won't wrap.
 837                  */
 838                 m_copydata(mtx, 0, len, txdata);
 839
 840                 /*
 841                  * Now we know how big the message is gonna be.  We must now
 842                  * construct the descriptors to drive this message out...
 843                  */
 844                 tlen = len;
 845                 while (tlen > SR_BUF_SIZ) {     /* loop for full granules */
 846                         txdesc->stat = 0;       /* reset bits */
 847                         txdesc->len = SR_BUF_SIZ;       /* size of granule */
 848                         tlen -= SR_BUF_SIZ;
 849
 850                         txdesc++;       /* move to next dscr */
 851                         txdata += SR_BUF_SIZ;   /* adjust data addr */
 852                         i++;
 853                 }
 854
 855                 /*
 856                  * This section handles the setting of the final piece of a
 857                  * message.
 858                  */
 859                 txdesc->stat = SCA_DESC_EOM;
 860                 txdesc->len = tlen;
 861                 pkts++;
 862
 863                 /*
 864                  * prepare for subsequent packets (if any)
 865                  */
 866                 txdesc++;
 867                 txdata += SR_BUF_SIZ;   /* next mem granule */
 868                 i++;            /* count of granules */
 869
 870                 /*
 871                  * OK, we've now placed the message into the DPRAM where it
 872                  * can be transmitted.  We'll now release the message memory
 873                  * and update the statistics...
 874                  */
 875                 m_freem(mtx);
 876 #ifndef NETGRAPH
 877                 ++sc->ifsppp.pp_if.if_opackets;
 878 #else   /* NETGRAPH */
 879                 sc->opackets++;
 880 #endif /* NETGRAPH */
 881
 882                 /*
 883                  * Check if we have space for another packet. XXX This is
 884                  * hardcoded.  A packet can't be larger than 3 buffers (3 x
 885                  * 512).
 886                  */
 887                 if ((i + 3) >= blkp->txmax) {   /* enough remains? */
 888 #if BUGGY > 9
 889                         kprintf("sr%d.srstart: i=%d (%d pkts); card full.\n",
 890                                sc->unit, i, pkts);
 891 #endif
 892                         break;
 893                 }
 894                 /*
 895                  * We'll pull the next message to be sent (if any)
 896                  */
 897 #ifndef NETGRAPH
 898                 mtx = sppp_dequeue(ifp);
 899 #else /* NETGRAPH */
 900                 IF_DEQUEUE(&sc->xmitq_hipri, mtx);
 901                 if (mtx == NULL) {
 902                         IF_DEQUEUE(&sc->xmitq, mtx);
 903                 }
 904 #endif /* NETGRAPH */
 905                 if (!mtx) {     /* no message?  We're done! */
 906 #if BUGGY > 9
 907                         kprintf("sr%d.srstart: pending=0, pkts=%d\n",
 908                                sc->unit, pkts);
 909 #endif
 910                         break;
 911                 }
 912         }
 913
 914         blkp->txtail = i;       /* record next free granule */
 915
 916         /*
 917          * Mark the last descriptor, so that the SCA know where to stop.
 918          */
 919         txdesc--;               /* back up to last descriptor in list */
 920         txdesc->stat |= SCA_DESC_EOT;   /* mark as end of list */
 921
 922         /*
 923          * Now we'll reset the transmit granule's descriptor address so we
 924          * can record this in the structure and fire it off w/ the DMA
 925          * processor of the serial chip...
 926          */
 927         txdesc = (sca_descriptor *)blkp->txdesc;
 928         blkp->txeda = (u_short)((u_int)&txdesc[i]);
 929
 930         sc->txb_inuse++;        /* update inuse status */
 931         sc->txb_new++;          /* new traffic wuz added */
 932
 933         if (sc->txb_new == SR_TX_BLOCKS)
 934                 sc->txb_new = 0;
 935
 936         /*
 937          * If the tranmitter wasn't marked as "busy" we will force it to be
 938          * started...
 939          */
 940         if (sc->xmit_busy == 0) {
 941                 sr_xmit(sc);
 942 #if BUGGY > 9
 943                 kprintf("sr%d.srstart: called sr_xmit()\n", sc->unit);
 944 #endif
 945         }
 946         goto top_srstart;
 947 }
 948
 949 #ifndef NETGRAPH
 950 /*
 951  * Handle ioctl's at the device level, though we *will* call up
 952  * a layer...
 953  */
 954 #if BUGGY > 2
 955 static int bug_splats[] = {0, 0, 0, 0, 0, 0, 0, 0};
 956 #endif
 957
 958 static int
 959 srioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *cr)
 960 {
 961         int error, was_up, should_be_up;
 962         struct sr_softc *sc = ifp->if_softc;
 963
 964 #if BUGGY > 0
 965         kprintf("%s: srioctl(ifp=%08x, cmd=%08x, data=%08x)\n",
 966                ifp->if_xname, ifp, cmd, data);
 967 #endif
 968
 969         was_up = ifp->if_flags & IFF_RUNNING;
 970
 971         error = sppp_ioctl(ifp, cmd, data);
 972
 973 #if BUGGY > 1
 974         kprintf("%s: ioctl: ifsppp.pp_flags = %08x, if_flags %08x.\n",
 975               ifp->if_xname, ((struct sppp *)ifp)->pp_flags, ifp->if_flags);
 976 #endif
 977
 978         if (error)
 979                 return error;
 980
 981         if ((cmd != SIOCSIFFLAGS) && (cmd != SIOCSIFADDR)) {
 982 #if BUGGY > 2
 983                 if (bug_splats[sc->unit]++ < 2) {
 984                         kprintf("sr(%d).if_addrheads = %08x\n",
 985                                sc->unit, ifp->if_addrheads);
 986                         kprintf("sr(%d).if_bpf = %08x\n",
 987                                sc->unit, ifp->if_bpf);
 988                         kprintf("sr(%d).if_init = %08x\n",
 989                                sc->unit, ifp->if_init);
 990                         kprintf("sr(%d).if_output = %08x\n",
 991                                sc->unit, ifp->if_output);
 992                         kprintf("sr(%d).if_start = %08x\n",
 993                                sc->unit, ifp->if_start);
 994                         kprintf("sr(%d).if_done = %08x\n",
 995                                sc->unit, ifp->if_done);
 996                         kprintf("sr(%d).if_ioctl = %08x\n",
 997                                sc->unit, ifp->if_ioctl);
 998                         kprintf("sr(%d).if_reset = %08x\n",
 999                                sc->unit, ifp->if_reset);
1000                         kprintf("sr(%d).if_watchdog = %08x\n",
1001                                sc->unit, ifp->if_watchdog);
1002                 }
1003 #endif
1004                 return 0;
1005         }
1006
1007         crit_enter();
1008
1009         should_be_up = ifp->if_flags & IFF_RUNNING;
1010
1011         if (!was_up && should_be_up) {
1012                 /*
1013                  * Interface should be up -- start it.
1014                  */
1015                 sr_up(sc);
1016                 srstart(ifp);
1017
1018                 /*
1019                  * XXX Clear the IFF_UP flag so that the link will only go
1020                  * up after sppp lcp and ipcp negotiation.
1021                  */
1022                 /* ifp->if_flags &= ~IFF_UP; */
1023         } else if (was_up && !should_be_up) {
1024                 /*
1025                  * Interface should be down -- stop it.
1026                  */
1027                 sr_down(sc);
1028                 sppp_flush(ifp);
1029         }
1030
1031         crit_exit();
1032
1033         return 0;
1034 }
1035 #endif /* NETGRAPH */
1036
1037 /*
1038  * This is to catch lost tx interrupts.
1039  */
1040 static void
1041 #ifndef NETGRAPH
1042 srwatchdog(struct ifnet *ifp)
1043 #else
1044 srwatchdog(struct sr_softc *sc)
1045 #endif /* NETGRAPH */
1046 {
1047         int     got_st0, got_st1, got_st3, got_dsr;
1048 #ifndef NETGRAPH
1049         struct sr_softc *sc = ifp->if_softc;
1050 #endif /* NETGRAPH */
1051         struct sr_hardc *hc = sc->hc;
1052         msci_channel *msci = &hc->sca->msci[sc->scachan];
1053         dmac_channel *dmac = &sc->hc->sca->dmac[sc->scachan];
1054
1055 #if BUGGY > 0
1056 #ifndef NETGRAPH
1057         kprintf("srwatchdog(unit=%d)\n", unit);
1058 #else
1059         kprintf("srwatchdog(unit=%d)\n", sc->unit);
1060 #endif /* NETGRAPH */
1061 #endif
1062
1063 #ifndef NETGRAPH
1064         if (!(ifp->if_flags & IFF_RUNNING))
1065                 return;
1066
1067         ifp->if_oerrors++;      /* update output error count */
1068 #else   /* NETGRAPH */
1069         sc->oerrors++;  /* update output error count */
1070 #endif /* NETGRAPH */
1071
1072         got_st0 = SRC_GET8(hc->sca_base, msci->st0);
1073         got_st1 = SRC_GET8(hc->sca_base, msci->st1);
1074         got_st3 = SRC_GET8(hc->sca_base, msci->st3);
1075         got_dsr = SRC_GET8(hc->sca_base, dmac->dsr);
1076
1077 #ifndef NETGRAPH
1078 #if     0
1079         if (ifp->if_flags & IFF_DEBUG)
1080 #endif
1081                 kprintf("sr%d: transmit failed, "
1082 #else   /* NETGRAPH */
1083         kprintf("sr%d: transmit failed, "
1084 #endif /* NETGRAPH */
1085                        "ST0 %02x, ST1 %02x, ST3 %02x, DSR %02x.\n",
1086                        sc->unit,
1087                        got_st0, got_st1, got_st3, got_dsr);
1088
1089         if (SRC_GET8(hc->sca_base, msci->st1) & SCA_ST1_UDRN) {
1090                 SRC_PUT8(hc->sca_base, msci->cmd, SCA_CMD_TXABORT);
1091                 SRC_PUT8(hc->sca_base, msci->cmd, SCA_CMD_TXENABLE);
1092                 SRC_PUT8(hc->sca_base, msci->st1, SCA_ST1_UDRN);
1093         }
1094         sc->xmit_busy = 0;
1095 #ifndef NETGRAPH
1096         ifp->if_flags &= ~IFF_OACTIVE;
1097 #else
1098         /*ifp->if_flags &= ~IFF_OACTIVE; */
1099 #endif /* NETGRAPH */
1100
1101         if (sc->txb_inuse && --sc->txb_inuse)
1102                 sr_xmit(sc);
1103
1104 #ifndef NETGRAPH
1105         srstart(ifp);   /* restart transmitter */
1106 #else
1107         srstart(sc);    /* restart transmitter */
1108 #endif /* NETGRAPH */
1109 }
1110
1111 static void
1112 sr_up(struct sr_softc *sc)
1113 {
1114         u_int *fecrp;
1115         struct sr_hardc *hc = sc->hc;
1116         sca_regs *sca = hc->sca;
1117         msci_channel *msci = &sca->msci[sc->scachan];
1118
1119 #if BUGGY > 0
1120         kprintf("sr_up(sc=%08x)\n", sc);
1121 #endif
1122
1123         /*
1124          * Enable transmitter and receiver. Raise DTR and RTS. Enable
1125          * interrupts.
1126          *
1127          * XXX What about using AUTO mode in msci->md0 ???
1128          */
1129         SRC_PUT8(hc->sca_base, msci->ctl,
1130                  SRC_GET8(hc->sca_base, msci->ctl) & ~SCA_CTL_RTS);
1131
1132         if (sc->scachan == 0)
1133                 switch (hc->cardtype) {
1134                 case SR_CRD_N2PCI:
1135                         fecrp = (u_int *)(hc->sca_base + SR_FECR);
1136                         *fecrp &= ~SR_FECR_DTR0;
1137                         break;
1138                 }
1139         else
1140                 switch (hc->cardtype) {
1141                 case SR_CRD_N2PCI:
1142                         fecrp = (u_int *)(hc->sca_base + SR_FECR);
1143                         *fecrp &= ~SR_FECR_DTR1;
1144                         break;
1145                 }
1146
1147         if (sc->scachan == 0) {
1148                 SRC_PUT8(hc->sca_base, sca->ier0,
1149                          SRC_GET8(hc->sca_base, sca->ier0) | 0x000F);
1150                 SRC_PUT8(hc->sca_base, sca->ier1,
1151                          SRC_GET8(hc->sca_base, sca->ier1) | 0x000F);
1152         } else {
1153                 SRC_PUT8(hc->sca_base, sca->ier0,
1154                          SRC_GET8(hc->sca_base, sca->ier0) | 0x00F0);
1155                 SRC_PUT8(hc->sca_base, sca->ier1,
1156                          SRC_GET8(hc->sca_base, sca->ier1) | 0x00F0);
1157         }
1158
1159         SRC_PUT8(hc->sca_base, msci->cmd, SCA_CMD_RXENABLE);
1160         DELAY(1000);    /* XXX slow it down a bit. */
1161         SRC_PUT8(hc->sca_base, msci->cmd, SCA_CMD_TXENABLE);
1162
1163 #ifndef NETGRAPH
1164 #ifdef USE_MODEMCK
1165         if (sr_watcher == 0)
1166                 sr_modemck(NULL);
1167 #endif
1168 #else   /* NETGRAPH */
1169         callout_reset(&sc->sr_timer, hz, ngsr_watchdog_frame, sc);
1170         sc->running = 1;
1171 #endif /* NETGRAPH */
1172 }
1173
1174 static void
1175 sr_down(struct sr_softc *sc)
1176 {
1177         u_int *fecrp;
1178         struct sr_hardc *hc = sc->hc;
1179         sca_regs *sca = hc->sca;
1180         msci_channel *msci = &sca->msci[sc->scachan];
1181
1182 #if BUGGY > 0
1183         kprintf("sr_down(sc=%08x)\n", sc);
1184 #endif
1185 #ifdef NETGRAPH
1186         callout_stop(&sc->sr_timer);
1187         sc->running = 0;
1188 #endif /* NETGRAPH */
1189
1190         /*
1191          * Disable transmitter and receiver. Lower DTR and RTS. Disable
1192          * interrupts.
1193          */
1194         SRC_PUT8(hc->sca_base, msci->cmd, SCA_CMD_RXDISABLE);
1195         DELAY(1000);    /* XXX slow it down a bit. */
1196         SRC_PUT8(hc->sca_base, msci->cmd, SCA_CMD_TXDISABLE);
1197
1198         SRC_PUT8(hc->sca_base, msci->ctl,
1199                  SRC_GET8(hc->sca_base, msci->ctl) | SCA_CTL_RTS);
1200
1201         if (sc->scachan == 0)
1202                 switch (hc->cardtype) {
1203                 case SR_CRD_N2PCI:
1204                         fecrp = (u_int *)(hc->sca_base + SR_FECR);
1205                         *fecrp |= SR_FECR_DTR0;
1206                         break;
1207                 }
1208         else
1209                 switch (hc->cardtype) {
1210                 case SR_CRD_N2PCI:
1211                         fecrp = (u_int *)(hc->sca_base + SR_FECR);
1212                         *fecrp |= SR_FECR_DTR1;
1213                         break;
1214                 }
1215
1216         if (sc->scachan == 0) {
1217                 SRC_PUT8(hc->sca_base, sca->ier0,
1218                          SRC_GET8(hc->sca_base, sca->ier0) & ~0x0F);
1219                 SRC_PUT8(hc->sca_base, sca->ier1,
1220                          SRC_GET8(hc->sca_base, sca->ier1) & ~0x0F);
1221         } else {
1222                 SRC_PUT8(hc->sca_base, sca->ier0,
1223                          SRC_GET8(hc->sca_base, sca->ier0) & ~0xF0);
1224                 SRC_PUT8(hc->sca_base, sca->ier1,
1225                          SRC_GET8(hc->sca_base, sca->ier1) & ~0xF0);
1226         }
1227 }
1228
1229 /*
1230  * Initialize the card, allocate memory for the sr_softc structures
1231  * and fill in the pointers.
1232  */
1233 static void
1234 src_init(struct sr_hardc *hc)
1235 {
1236         struct sr_softc *sc = hc->sc;
1237         int x;
1238         u_int chanmem;
1239         u_int bufmem;
1240         u_int next;
1241         u_int descneeded;
1242
1243 #if BUGGY > 0
1244         kprintf("src_init(hc=%08x)\n", hc);
1245 #endif
1246
1247         chanmem = hc->memsize / hc->numports;
1248         next = 0;
1249
1250         for (x = 0; x < hc->numports; x++, sc++) {
1251                 int blk;
1252
1253                 for (blk = 0; blk < SR_TX_BLOCKS; blk++) {
1254                         sc->block[blk].txdesc = next;
1255                         bufmem = (16 * 1024) / SR_TX_BLOCKS;
1256                         descneeded = bufmem / SR_BUF_SIZ;
1257
1258                         sc->block[blk].txstart = sc->block[blk].txdesc
1259                             + ((((descneeded * sizeof(sca_descriptor))
1260                                  / SR_BUF_SIZ) + 1)
1261                                * SR_BUF_SIZ);
1262
1263                         sc->block[blk].txend = next + bufmem;
1264                         sc->block[blk].txmax =
1265                             (sc->block[blk].txend - sc->block[blk].txstart)
1266                             / SR_BUF_SIZ;
1267                         next += bufmem;
1268
1269 #if BUGGY > 2
1270                         kprintf("sr%d: blk %d: txdesc %08x, txstart %08x\n",
1271                                sc->unit, blk,
1272                                sc->block[blk].txdesc, sc->block[blk].txstart);
1273 #endif
1274                 }
1275
1276                 sc->rxdesc = next;
1277                 bufmem = chanmem - (bufmem * SR_TX_BLOCKS);
1278                 descneeded = bufmem / SR_BUF_SIZ;
1279                 sc->rxstart = sc->rxdesc +
1280                     ((((descneeded * sizeof(sca_descriptor)) /
1281                        SR_BUF_SIZ) + 1) * SR_BUF_SIZ);
1282                 sc->rxend = next + bufmem;
1283                 sc->rxmax = (sc->rxend - sc->rxstart) / SR_BUF_SIZ;
1284                 next += bufmem;
1285         }
1286 }
1287
1288 /*
1289  * The things done here are channel independent.
1290  *
1291  * Configure the sca waitstates.
1292  * Configure the global interrupt registers.
1293  * Enable master dma enable.
1294  */
1295 static void
1296 sr_init_sca(struct sr_hardc *hc)
1297 {
1298         sca_regs *sca = hc->sca;
1299
1300 #if BUGGY > 0
1301         kprintf("sr_init_sca(hc=%08x)\n", hc);
1302 #endif
1303
1304         /*
1305          * Do the wait registers. Set everything to 0 wait states.
1306          */
1307         SRC_PUT8(hc->sca_base, sca->pabr0, 0);
1308         SRC_PUT8(hc->sca_base, sca->pabr1, 0);
1309         SRC_PUT8(hc->sca_base, sca->wcrl, 0);
1310         SRC_PUT8(hc->sca_base, sca->wcrm, 0);
1311         SRC_PUT8(hc->sca_base, sca->wcrh, 0);
1312
1313         /*
1314          * Configure the interrupt registers. Most are cleared until the
1315          * interface is configured.
1316          */
1317         SRC_PUT8(hc->sca_base, sca->ier0, 0x00);        /* MSCI interrupts. */
1318         SRC_PUT8(hc->sca_base, sca->ier1, 0x00);        /* DMAC interrupts */
1319         SRC_PUT8(hc->sca_base, sca->ier2, 0x00);        /* TIMER interrupts. */
1320         SRC_PUT8(hc->sca_base, sca->itcr, 0x00);        /* Use ivr and no intr
1321                                                          * ack */
1322         SRC_PUT8(hc->sca_base, sca->ivr, 0x40); /* Interrupt vector. */
1323         SRC_PUT8(hc->sca_base, sca->imvr, 0x40);
1324
1325         /*
1326          * Configure the timers. XXX Later
1327          */
1328
1329         /*
1330          * Set the DMA channel priority to rotate between all four channels.
1331          *
1332          * Enable all dma channels.
1333          */
1334         SRC_PUT8(hc->sca_base, sca->pcr, SCA_PCR_PR2);
1335         SRC_PUT8(hc->sca_base, sca->dmer, SCA_DMER_EN);
1336 }
1337
1338 /*
1339  * Configure the msci
1340  *
1341  * NOTE: The serial port configuration is hardcoded at the moment.
1342  */
1343 static void
1344 sr_init_msci(struct sr_softc *sc)
1345 {
1346         int portndx;            /* on-board port number */
1347         u_int *fecrp;           /* pointer for PCI's MCR i/o */
1348         struct sr_hardc *hc = sc->hc;
1349         msci_channel *msci = &hc->sca->msci[sc->scachan];
1350 #ifdef N2_TEST_SPEED
1351         int br_v;               /* contents for BR divisor */
1352         int etcndx;             /* index into ETC table */
1353         int fifo_v, gotspeed;   /* final tabled speed found */
1354         int tmc_v;              /* timer control register */
1355         int wanted;             /* speed (bitrate) wanted... */
1356         struct rate_line *rtp;
1357 #endif
1358
1359         portndx = sc->scachan;
1360
1361 #if BUGGY > 0
1362         kprintf("sr: sr_init_msci( sc=%08x)\n", sc);
1363 #endif
1364
1365         SRC_PUT8(hc->sca_base, msci->cmd, SCA_CMD_RESET);
1366         SRC_PUT8(hc->sca_base, msci->md0, SCA_MD0_CRC_1 |
1367                  SCA_MD0_CRC_CCITT |
1368                  SCA_MD0_CRC_ENABLE |
1369                  SCA_MD0_MODE_HDLC);
1370         SRC_PUT8(hc->sca_base, msci->md1, SCA_MD1_NOADDRCHK);
1371         SRC_PUT8(hc->sca_base, msci->md2, SCA_MD2_DUPLEX | SCA_MD2_NRZ);
1372
1373         /*
1374          * According to the manual I should give a reset after changing the
1375          * mode registers.
1376          */
1377         SRC_PUT8(hc->sca_base, msci->cmd, SCA_CMD_RXRESET);
1378         SRC_PUT8(hc->sca_base, msci->ctl, SCA_CTL_IDLPAT |
1379                  SCA_CTL_UDRNC |
1380                  SCA_CTL_RTS);
1381
1382         /*
1383          * XXX Later we will have to support different clock settings.
1384          */
1385         switch (sc->clk_cfg) {
1386         default:
1387 #if BUGGY > 0
1388                 kprintf("sr%: clk_cfg=%08x, selected default clock.\n",
1389                        portndx, sc->clk_cfg);
1390 #endif
1391                 /* FALLTHROUGH */
1392         case SR_FLAGS_EXT_CLK:
1393                 /*
1394                  * For now all interfaces are programmed to use the RX clock
1395                  * for the TX clock.
1396                  */
1397
1398 #if BUGGY > 0
1399                 kprintf("sr%d: External Clock Selected.\n", portndx);
1400 #endif
1401
1402                 SRC_PUT8(hc->sca_base, msci->rxs,
1403                          SCA_RXS_CLK_RXC0 | SCA_RXS_DIV1);
1404                 SRC_PUT8(hc->sca_base, msci->txs,
1405                          SCA_TXS_CLK_RX | SCA_TXS_DIV1);
1406                 break;
1407
1408         case SR_FLAGS_EXT_SEP_CLK:
1409 #if BUGGY > 0
1410                 kprintf("sr%d: Split Clocking Selected.\n", portndx);
1411 #endif
1412
1413                 SRC_PUT8(hc->sca_base, msci->rxs,
1414                          SCA_RXS_CLK_RXC0 | SCA_RXS_DIV1);
1415                 SRC_PUT8(hc->sca_base, msci->txs,
1416                          SCA_TXS_CLK_TXC | SCA_TXS_DIV1);
1417                 break;
1418
1419         case SR_FLAGS_INT_CLK:
1420 #if BUGGY > 0
1421                 kprintf("sr%d: Internal Clocking selected.\n", portndx);
1422 #endif
1423
1424                 /*
1425                  * XXX I do need some code to set the baud rate here!
1426                  */
1427 #ifdef N2_TEST_SPEED
1428                 switch (hc->cardtype) {
1429                 case SR_CRD_N2PCI:
1430                         fecrp = (u_int *)(hc->sca_base + SR_FECR);
1431                         mcr_v = *fecrp;
1432                         etcndx = 2;
1433                         break;
1434                 }
1435
1436                 fifo_v = 0x10;  /* stolen from Linux version */
1437
1438                 /*
1439                  * search for appropriate speed in table, don't calc it:
1440                  */
1441                 wanted = sr_test_speed[portndx];
1442                 rtp = &n2_rates[0];     /* point to first table item */
1443
1444                 while ((rtp->target > 0)        /* search table for speed */
1445                        &&(rtp->target != wanted))
1446                         rtp++;
1447
1448                 /*
1449                  * We've searched the table for a matching speed.  If we've
1450                  * found the correct rate line, we'll get the pre-calc'd
1451                  * values for the TMC and baud rate divisor for subsequent
1452                  * use...
1453                  */
1454                 if (rtp->target > 0) {  /* use table-provided values */
1455                         gotspeed = wanted;
1456                         tmc_v = rtp->tmc_reg;
1457                         br_v = rtp->br_reg;
1458                 } else {        /* otherwise assume 1MBit comm rate */
1459                         gotspeed = 10000;
1460                         tmc_v = 5;
1461                         br_v = 1;
1462                 }
1463
1464                 /*
1465                  * Now we mask in the enable clock output for the MCR:
1466                  */
1467                 mcr_v |= etc0vals[etcndx + portndx];
1468
1469                 /*
1470                  * Now we'll program the registers with these speed- related
1471                  * contents...
1472                  */
1473                 SRC_PUT8(hc->sca_base, msci->tmc, tmc_v);
1474                 SRC_PUT8(hc->sca_base, msci->trc0, fifo_v);
1475                 SRC_PUT8(hc->sca_base, msci->rxs, SCA_RXS_CLK_INT + br_v);
1476                 SRC_PUT8(hc->sca_base, msci->txs, SCA_TXS_CLK_INT + br_v);
1477
1478                 switch (hc->cardtype) {
1479                 case SR_CRD_N2PCI:
1480                         *fecrp = mcr_v;
1481                         break;
1482                 }
1483
1484 #if BUGGY > 0
1485                 if (wanted != gotspeed)
1486                         kprintf("sr%d: Speed wanted=%d, found=%d\n",
1487                                wanted, gotspeed);
1488
1489                 kprintf("sr%d: Internal Clock %dx100 BPS, tmc=%d, div=%d\n",
1490                        portndx, gotspeed, tmc_v, br_v);
1491 #endif
1492 #else
1493                 SRC_PUT8(hc->sca_base, msci->rxs,
1494                          SCA_RXS_CLK_INT | SCA_RXS_DIV1);
1495                 SRC_PUT8(hc->sca_base, msci->txs,
1496                          SCA_TXS_CLK_INT | SCA_TXS_DIV1);
1497
1498                 SRC_PUT8(hc->sca_base, msci->tmc, 5);
1499
1500                 if (portndx == 0)
1501                         switch (hc->cardtype) {
1502                         case SR_CRD_N2PCI:
1503                                 fecrp = (u_int *)(hc->sca_base + SR_FECR);
1504                                 *fecrp |= SR_FECR_ETC0;
1505                                 break;
1506                         }
1507                 else
1508                         switch (hc->cardtype) {
1509                         case SR_CRD_N2PCI:
1510                                 fecrp = (u_int *)(hc->sca_base + SR_FECR);
1511                                 *fecrp |= SR_FECR_ETC1;
1512                                 break;
1513                         }
1514 #endif
1515         }
1516
1517         /*
1518          * XXX Disable all interrupts for now. I think if you are using the
1519          * dmac you don't use these interrupts.
1520          */
1521         SRC_PUT8(hc->sca_base, msci->ie0, 0);
1522         SRC_PUT8(hc->sca_base, msci->ie1, 0x0C);
1523         SRC_PUT8(hc->sca_base, msci->ie2, 0);
1524         SRC_PUT8(hc->sca_base, msci->fie, 0);
1525
1526         SRC_PUT8(hc->sca_base, msci->sa0, 0);
1527         SRC_PUT8(hc->sca_base, msci->sa1, 0);
1528
1529         SRC_PUT8(hc->sca_base, msci->idl, 0x7E);        /* set flags value */
1530
1531         SRC_PUT8(hc->sca_base, msci->rrc, 0x0E);
1532         SRC_PUT8(hc->sca_base, msci->trc0, 0x10);
1533         SRC_PUT8(hc->sca_base, msci->trc1, 0x1F);
1534 }
1535
1536 /*
1537  * Configure the rx dma controller.
1538  */
1539 static void
1540 sr_init_rx_dmac(struct sr_softc *sc)
1541 {
1542         struct sr_hardc *hc;
1543         dmac_channel *dmac;
1544         sca_descriptor *rxd;
1545         u_int cda_v, sarb_v, rxbuf, rxda, rxda_d;
1546
1547 #if BUGGY > 0
1548         kprintf("sr_init_rx_dmac(sc=%08x)\n", sc);
1549 #endif
1550
1551         hc = sc->hc;
1552         dmac = &hc->sca->dmac[DMAC_RXCH(sc->scachan)];
1553
1554         /*
1555          * This phase initializes the contents of the descriptor table
1556          * needed to construct a circular buffer...
1557          */
1558         rxd = (sca_descriptor *)(hc->mem_start + (sc->rxdesc & hc->winmsk));
1559         rxda_d = (u_int) hc->mem_start - (sc->rxdesc & ~hc->winmsk);
1560
1561         for (rxbuf = sc->rxstart;
1562              rxbuf < sc->rxend;
1563              rxbuf += SR_BUF_SIZ, rxd++) {
1564                 /*
1565                  * construct the circular chain...
1566                  */
1567                 rxda = (u_int) & rxd[1] - rxda_d + hc->mem_pstart;
1568                 rxd->cp = (u_short)(rxda & 0xffff);
1569
1570                 /*
1571                  * set the on-card buffer address...
1572                  */
1573                 rxd->bp = (u_short)((rxbuf + hc->mem_pstart) & 0xffff);
1574                 rxd->bpb = (u_char)(((rxbuf + hc->mem_pstart) >> 16) & 0xff);
1575
1576                 rxd->len = 0;   /* bytes resident w/in granule */
1577                 rxd->stat = 0xff;       /* The sca write here when finished */
1578         }
1579
1580         /*
1581          * heal the chain so that the last entry points to the first...
1582          */
1583         rxd--;
1584         rxd->cp = (u_short)((sc->rxdesc + hc->mem_pstart) & 0xffff);
1585
1586         /*
1587          * reset the reception handler's index...
1588          */
1589         sc->rxhind = 0;
1590
1591         /*
1592          * We'll now configure the receiver's DMA logic...
1593          */
1594         SRC_PUT8(hc->sca_base, dmac->dsr, 0);   /* Disable DMA transfer */
1595         SRC_PUT8(hc->sca_base, dmac->dcr, SCA_DCR_ABRT);
1596
1597         /* XXX maybe also SCA_DMR_CNTE */
1598         SRC_PUT8(hc->sca_base, dmac->dmr, SCA_DMR_TMOD | SCA_DMR_NF);
1599         SRC_PUT16(hc->sca_base, dmac->bfl, SR_BUF_SIZ);
1600
1601         cda_v = (u_short)((sc->rxdesc + hc->mem_pstart) & 0xffff);
1602         sarb_v = (u_char)(((sc->rxdesc + hc->mem_pstart) >> 16) & 0xff);
1603
1604         SRC_PUT16(hc->sca_base, dmac->cda, cda_v);
1605         SRC_PUT8(hc->sca_base, dmac->sarb, sarb_v);
1606
1607         rxd = (sca_descriptor *)sc->rxstart;
1608
1609         SRC_PUT16(hc->sca_base, dmac->eda,
1610                   (u_short)((u_int) & rxd[sc->rxmax - 1] & 0xffff));
1611
1612         SRC_PUT8(hc->sca_base, dmac->dir, 0xF0);
1613
1614
1615         SRC_PUT8(hc->sca_base, dmac->dsr, SCA_DSR_DE);  /* Enable DMA */
1616 }
1617
1618 /*
1619  * Configure the TX DMA descriptors.
1620  * Initialize the needed values and chain the descriptors.
1621  */
1622 static void
1623 sr_init_tx_dmac(struct sr_softc *sc)
1624 {
1625         int blk;
1626         u_int txbuf, txda, txda_d;
1627         struct sr_hardc *hc;
1628         sca_descriptor *txd;
1629         dmac_channel *dmac;
1630         struct buf_block *blkp;
1631         u_int x;
1632         u_int sarb_v;
1633
1634 #if BUGGY > 0
1635         kprintf("sr_init_tx_dmac(sc=%08x)\n", sc);
1636 #endif
1637
1638         hc = sc->hc;
1639         dmac = &hc->sca->dmac[DMAC_TXCH(sc->scachan)];
1640
1641         /*
1642          * Initialize the array of descriptors for transmission
1643          */
1644         for (blk = 0; blk < SR_TX_BLOCKS; blk++) {
1645                 blkp = &sc->block[blk];
1646                 txd = (sca_descriptor *)(hc->mem_start
1647                                          + (blkp->txdesc & hc->winmsk));
1648                 txda_d = (u_int) hc->mem_start
1649                     - (blkp->txdesc & ~hc->winmsk);
1650
1651                 x = 0;
1652                 txbuf = blkp->txstart;
1653                 for (; txbuf < blkp->txend; txbuf += SR_BUF_SIZ, txd++) {
1654                         txda = (u_int) & txd[1] - txda_d + hc->mem_pstart;
1655                         txd->cp = (u_short)(txda & 0xffff);
1656
1657                         txd->bp = (u_short)((txbuf + hc->mem_pstart)
1658                                             & 0xffff);
1659                         txd->bpb = (u_char)(((txbuf + hc->mem_pstart) >> 16)
1660                                             & 0xff);
1661                         txd->len = 0;
1662                         txd->stat = 0;
1663                         x++;
1664                 }
1665
1666                 txd--;
1667                 txd->cp = (u_short)((blkp->txdesc + hc->mem_pstart)
1668                                     & 0xffff);
1669
1670                 blkp->txtail = (u_int)txd - (u_int)hc->mem_start;
1671         }
1672
1673         SRC_PUT8(hc->sca_base, dmac->dsr, 0);   /* Disable DMA */
1674         SRC_PUT8(hc->sca_base, dmac->dcr, SCA_DCR_ABRT);
1675         SRC_PUT8(hc->sca_base, dmac->dmr, SCA_DMR_TMOD | SCA_DMR_NF);
1676         SRC_PUT8(hc->sca_base, dmac->dir,
1677                  SCA_DIR_EOT | SCA_DIR_BOF | SCA_DIR_COF);
1678
1679         sarb_v = (sc->block[0].txdesc + hc->mem_pstart) >> 16;
1680         sarb_v &= 0x00ff;
1681
1682         SRC_PUT8(hc->sca_base, dmac->sarb, (u_char) sarb_v);
1683 }
1684
1685 /*
1686  * Look through the descriptors to see if there is a complete packet
1687  * available. Stop if we get to where the sca is busy.
1688  *
1689  * Return the length and status of the packet.
1690  * Return nonzero if there is a packet available.
1691  *
1692  * NOTE:
1693  * It seems that we get the interrupt a bit early. The updateing of
1694  * descriptor values is not always completed when this is called.
1695  */
1696 static int
1697 sr_packet_avail(struct sr_softc *sc, int *len, u_char *rxstat)
1698 {
1699         int granules;   /* count of granules in pkt */
1700         int wki, wko;
1701         struct sr_hardc *hc;
1702         sca_descriptor *rxdesc; /* current descriptor */
1703         sca_descriptor *endp;   /* ending descriptor */
1704         sca_descriptor *cda;    /* starting descriptor */
1705
1706         hc = sc->hc;            /* get card's information */
1707
1708         /*
1709          * set up starting descriptor by pulling that info from the DMA half
1710          * of the HD chip...
1711          */
1712         wki = DMAC_RXCH(sc->scachan);
1713         wko = SRC_GET16(hc->sca_base, hc->sca->dmac[wki].cda);
1714
1715         cda = (sca_descriptor *)(hc->mem_start + (wko & hc->winmsk));
1716
1717 #if BUGGY > 1
1718         kprintf("sr_packet_avail(): wki=%d, wko=%04x, cda=%08x\n",
1719                wki, wko, cda);
1720 #endif
1721
1722         /*
1723          * open the appropriate memory window and set our expectations...
1724          */
1725         rxdesc = (sca_descriptor *)
1726             (hc->mem_start + (sc->rxdesc & hc->winmsk));
1727         endp = rxdesc;
1728         rxdesc = &rxdesc[sc->rxhind];
1729         endp = &endp[sc->rxmax];
1730
1731         *len = 0;               /* reset result total length */
1732         granules = 0;           /* reset count of granules */
1733
1734         /*
1735          * This loop will scan descriptors, but it *will* puke up if we wrap
1736          * around to our starting point...
1737          */
1738         while (rxdesc != cda) {
1739                 *len += rxdesc->len;    /* increment result length */
1740                 granules++;
1741
1742                 /*
1743                  * If we hit a valid packet's completion we'll know we've
1744                  * got a live one, and that we can deliver the packet.
1745                  * Since we're only allowed to report a packet available,
1746                  * somebody else does that...
1747                  */
1748                 if (rxdesc->stat & SCA_DESC_EOM) {      /* End Of Message */
1749                         *rxstat = rxdesc->stat; /* return closing */
1750 #if BUGGY > 0
1751                         kprintf("sr%d: PKT AVAIL len %d, %x, bufs %u.\n",
1752                                sc->unit, *len, *rxstat, granules);
1753 #endif
1754                         return 1;       /* indicate success */
1755                 }
1756                 /*
1757                  * OK, this packet take up multiple granules.  Move on to
1758                  * the next descriptor so we can consider it...
1759                  */
1760                 rxdesc++;
1761
1762                 if (rxdesc == endp)     /* recognize & act on wrap point */
1763                         rxdesc = (sca_descriptor *)
1764                             (hc->mem_start + (sc->rxdesc & hc->winmsk));
1765         }
1766
1767         /*
1768          * Nothing found in the DPRAM.  Let the caller know...
1769          */
1770         *len = 0;
1771         *rxstat = 0;
1772
1773         return 0;
1774 }
1775
1776 /*
1777  * Copy a packet from the on card memory into a provided mbuf.
1778  * Take into account that buffers wrap and that a packet may
1779  * be larger than a buffer.
1780  */
1781 static void
1782 sr_copy_rxbuf(struct mbuf *m, struct sr_softc *sc, int len)
1783 {
1784         struct sr_hardc *hc;
1785         sca_descriptor *rxdesc;
1786         u_int rxdata;
1787         u_int rxmax;
1788         u_int off = 0;
1789         u_int tlen;
1790
1791 #if BUGGY > 0
1792         kprintf("sr_copy_rxbuf(m=%08x,sc=%08x,len=%d)\n",
1793                m, sc, len);
1794 #endif
1795
1796         hc = sc->hc;
1797
1798         rxdata = sc->rxstart + (sc->rxhind * SR_BUF_SIZ);
1799         rxmax = sc->rxstart + (sc->rxmax * SR_BUF_SIZ);
1800
1801         rxdesc = (sca_descriptor *)
1802             (hc->mem_start + (sc->rxdesc & hc->winmsk));
1803         rxdesc = &rxdesc[sc->rxhind];
1804
1805         /*
1806          * Using the count of bytes in the received packet, we decrement it
1807          * for each granule (controller by an SCA descriptor) to control the
1808          * looping...
1809          */
1810         while (len) {
1811                 /*
1812                  * tlen gets the length of *this* granule... ...which is
1813                  * then copied to the target buffer.
1814                  */
1815                 tlen = (len < SR_BUF_SIZ) ? len : SR_BUF_SIZ;
1816
1817                 bcopy(hc->mem_start + (rxdata & hc->winmsk),
1818                       mtod(m, caddr_t) +off,
1819                       tlen);
1820
1821                 off += tlen;
1822                 len -= tlen;
1823
1824                 /*
1825                  * now, return to the descriptor's window in DPRAM and reset
1826                  * the descriptor we've just suctioned...
1827                  */
1828
1829                 rxdesc->len = 0;
1830                 rxdesc->stat = 0xff;
1831
1832                 /*
1833                  * Move on to the next granule.  If we've any remaining
1834                  * bytes to process we'll just continue in our loop...
1835                  */
1836                 rxdata += SR_BUF_SIZ;
1837                 rxdesc++;
1838
1839                 if (rxdata == rxmax) {  /* handle the wrap point */
1840                         rxdata = sc->rxstart;
1841                         rxdesc = (sca_descriptor *)
1842                             (hc->mem_start + (sc->rxdesc & hc->winmsk));
1843                 }
1844         }
1845 }
1846
1847 /*
1848  * If single is set, just eat a packet. Otherwise eat everything up to
1849  * where cda points. Update pointers to point to the next packet.
1850  *
1851  * This handles "flushing" of a packet as received...
1852  *
1853  * If the "single" parameter is zero, all pending reeceive traffic will
1854  * be flushed out of existence.  A non-zero value will only drop the
1855  * *next* (currently) pending packet...
1856  */
1857 static void
1858 sr_eat_packet(struct sr_softc *sc, int single)
1859 {
1860         struct sr_hardc *hc;
1861         sca_descriptor *rxdesc; /* current descriptor being eval'd */
1862         sca_descriptor *endp;   /* last descriptor in chain */
1863         sca_descriptor *cda;    /* current start point */
1864         u_int loopcnt = 0;      /* count of packets flushed ??? */
1865         u_char stat;            /* captured status byte from descr */
1866
1867         hc = sc->hc;
1868         cda = (sca_descriptor *)(hc->mem_start +
1869                                  (SRC_GET16(hc->sca_base,
1870                                   hc->sca->dmac[DMAC_RXCH(sc->scachan)].cda) &
1871                                   hc->winmsk));
1872
1873         /*
1874          * loop until desc->stat == (0xff || EOM) Clear the status and
1875          * length in the descriptor. Increment the descriptor.
1876          */
1877
1878         rxdesc = (sca_descriptor *)
1879             (hc->mem_start + (sc->rxdesc & hc->winmsk));
1880         endp = rxdesc;
1881         rxdesc = &rxdesc[sc->rxhind];
1882         endp = &endp[sc->rxmax];
1883
1884         /*
1885          * allow loop, but abort it if we wrap completely...
1886          */
1887         while (rxdesc != cda) {
1888                 loopcnt++;
1889
1890                 if (loopcnt > sc->rxmax) {
1891                         kprintf("sr%d: eat pkt %d loop, cda %x, "
1892                                "rxdesc %x, stat %x.\n",
1893                                sc->unit, loopcnt, (u_int) cda, (u_int) rxdesc,
1894                                rxdesc->stat);
1895                         break;
1896                 }
1897                 stat = rxdesc->stat;
1898
1899                 rxdesc->len = 0;
1900                 rxdesc->stat = 0xff;
1901
1902                 rxdesc++;
1903                 sc->rxhind++;
1904
1905                 if (rxdesc == endp) {
1906                         rxdesc = (sca_descriptor *)
1907                             (hc->mem_start + (sc->rxdesc & hc->winmsk));
1908                         sc->rxhind = 0;
1909                 }
1910                 if (single && (stat == SCA_DESC_EOM))
1911                         break;
1912         }
1913
1914         /*
1915          * Update the eda to the previous descriptor.
1916          */
1917         rxdesc = (sca_descriptor *)sc->rxdesc;
1918         rxdesc = &rxdesc[(sc->rxhind + sc->rxmax - 2) % sc->rxmax];
1919
1920         SRC_PUT16(hc->sca_base,
1921                   hc->sca->dmac[DMAC_RXCH(sc->scachan)].eda,
1922                   (u_short)((u_int)(rxdesc + hc->mem_pstart) & 0xffff));
1923 }
1924
1925 /*
1926  * While there is packets available in the rx buffer, read them out
1927  * into mbufs and ship them off.
1928  */
1929 static void
1930 sr_get_packets(struct sr_softc *sc)
1931 {
1932         u_char rxstat;          /* acquired status byte */
1933         int i;
1934         int pkts;               /* count of packets found */
1935         int rxndx;              /* rcv buffer index */
1936         int tries;              /* settling time counter */
1937         u_int len;              /* length of pending packet */
1938         struct sr_hardc *hc;    /* card-level information */
1939         sca_descriptor *rxdesc; /* descriptor in memory */
1940 #ifndef NETGRAPH
1941         struct ifnet *ifp;      /* network intf ctl table */
1942 #endif /* NETGRAPH */
1943         struct mbuf *m = NULL;  /* message buffer */
1944
1945 #if BUGGY > 0
1946         kprintf("sr_get_packets(sc=%08x)\n", sc);
1947 #endif
1948
1949         hc = sc->hc;
1950 #ifndef NETGRAPH
1951         ifp = &sc->ifsppp.pp_if;
1952 #endif /* NETGRAPH */
1953
1954         pkts = 0;               /* reset count of found packets */
1955
1956         /*
1957          * for each complete packet in the receiving pool, process each
1958          * packet...
1959          */
1960         while (sr_packet_avail(sc, &len, &rxstat)) {    /* packet pending? */
1961                 /*
1962                  * I have seen situations where we got the interrupt but the
1963                  * status value wasn't deposited.  This code should allow
1964                  * the status byte's value to settle...
1965                  */
1966
1967                 tries = 5;
1968
1969                 while ((rxstat == 0x00ff)
1970                        && --tries)
1971                         sr_packet_avail(sc, &len, &rxstat);
1972
1973 #if BUGGY > 1
1974                 kprintf("sr_packet_avail() returned len=%d, rxstat=%02ux\n",
1975                        len, rxstat);
1976 #endif
1977
1978                 pkts++;
1979 #ifdef NETGRAPH
1980                 sc->inbytes += len;
1981                 sc->inlast = 0;
1982 #endif /* NETGRAPH */
1983
1984                 /*
1985                  * OK, we've settled the incoming message status. We can now
1986                  * process it...
1987                  */
1988                 if (((rxstat & SCA_DESC_ERRORS) == 0) && (len < MCLBYTES)) {
1989 #if BUGGY > 1
1990                         kprintf("sr%d: sr_get_packet() rxstat=%02x, len=%d\n",
1991                                sc->unit, rxstat, len);
1992 #endif
1993
1994                         MGETHDR(m, MB_DONTWAIT, MT_DATA);
1995                         if (m == NULL) {
1996                                 /*
1997                                  * eat (flush) packet if get mbuf fail!!
1998                                  */
1999                                 sr_eat_packet(sc, 1);
2000                                 continue;
2001                         }
2002                         /*
2003                          * construct control information for pass-off
2004                          */
2005 #ifndef NETGRAPH
2006                         m->m_pkthdr.rcvif = ifp;
2007 #else
2008                         m->m_pkthdr.rcvif = NULL;
2009 #endif /* NETGRAPH */
2010                         m->m_pkthdr.len = m->m_len = len;
2011                         if (len > MHLEN) {
2012                                 MCLGET(m, MB_DONTWAIT);
2013                                 if ((m->m_flags & M_EXT) == 0) {
2014                                         /*
2015                                          * We couldn't get a big enough
2016                                          * message packet, so we'll send the
2017                                          * packet to /dev/null...
2018                                          */
2019                                         m_freem(m);
2020                                         sr_eat_packet(sc, 1);
2021                                         continue;
2022                                 }
2023                         }
2024                         /*
2025                          * OK, we've got a good message buffer.  Now we can
2026                          * copy the received message into it
2027                          */
2028                         sr_copy_rxbuf(m, sc, len);      /* copy from DPRAM */
2029
2030 #ifndef NETGRAPH
2031                         BPF_MTAP(ifp, m);
2032
2033 #if BUGGY > 3
2034                         {
2035                                 u_char *bp;
2036
2037                                 bp = (u_char *)m;
2038                                 kprintf("sr%d: rcvd=%02x%02x%02x%02x%02x%02x\n",
2039                                        sc->unit,
2040                                        bp[0], bp[1], bp[2],
2041                                        bp[4], bp[5], bp[6]);
2042                         }
2043 #endif
2044                         sppp_input(ifp, m);
2045                         ifp->if_ipackets++;
2046
2047 #else   /* NETGRAPH */
2048 #if BUGGY > 3
2049                         {
2050                                 u_char *bp;
2051
2052                                 bp = mtod(m,u_char *);
2053                                 kprintf("sr%d: rd=%02x:%02x:%02x:%02x:%02x:%02x",
2054                                        sc->unit,
2055                                        bp[0], bp[1], bp[2],
2056                                        bp[4], bp[5], bp[6]);
2057                                 kprintf(":%02x:%02x:%02x:%02x:%02x:%02x\n",
2058                                        bp[6], bp[7], bp[8],
2059                                        bp[9], bp[10], bp[11]);
2060                         }
2061 #endif
2062                         ng_queue_data(sc->hook, m, NULL);
2063                         sc->ipackets++;
2064 #endif /* NETGRAPH */
2065                         /*
2066                          * Update the eda to the previous descriptor.
2067                          */
2068                         i = (len + SR_BUF_SIZ - 1) / SR_BUF_SIZ;
2069                         sc->rxhind = (sc->rxhind + i) % sc->rxmax;
2070
2071                         rxdesc = (sca_descriptor *)sc->rxdesc;
2072                         rxndx = (sc->rxhind + sc->rxmax - 2) % sc->rxmax;
2073                         rxdesc = &rxdesc[rxndx];
2074
2075                         SRC_PUT16(hc->sca_base,
2076                                   hc->sca->dmac[DMAC_RXCH(sc->scachan)].eda,
2077                                   (u_short)((u_int)(rxdesc + hc->mem_pstart)
2078                                              & 0xffff));
2079
2080                 } else {
2081                         int got_st3, got_cda, got_eda;
2082                         int tries = 5;
2083
2084                         while ((rxstat == 0xff) && --tries)
2085                                 sr_packet_avail(sc, &len, &rxstat);
2086
2087                         /*
2088                          * It look like we get an interrupt early
2089                          * sometimes and then the status is not
2090                          * filled in yet.
2091                          */
2092                         if (tries && (tries != 5))
2093                                 continue;
2094
2095                         /*
2096                          * This chunk of code handles the error packets.
2097                          * We'll log them for posterity...
2098                          */
2099                         sr_eat_packet(sc, 1);
2100
2101 #ifndef NETGRAPH
2102                         ifp->if_ierrors++;
2103 #else
2104                         sc->ierrors[0]++;
2105 #endif /* NETGRAPH */
2106
2107                         got_st3 = SRC_GET8(hc->sca_base,
2108                                   hc->sca->msci[sc->scachan].st3);
2109                         got_cda = SRC_GET16(hc->sca_base,
2110                                   hc->sca->dmac[DMAC_RXCH(sc->scachan)].cda);
2111                         got_eda = SRC_GET16(hc->sca_base,
2112                                   hc->sca->dmac[DMAC_RXCH(sc->scachan)].eda);
2113
2114 #if BUGGY > 0
2115                         kprintf("sr%d: Receive error chan %d, "
2116                                "stat %02x, msci st3 %02x,"
2117                                "rxhind %d, cda %04x, eda %04x.\n",
2118                                sc->unit, sc->scachan, rxstat,
2119                                got_st3, sc->rxhind, got_cda, got_eda);
2120 #endif
2121                 }
2122         }
2123
2124 #if BUGGY > 0
2125         kprintf("sr%d: sr_get_packets() found %d packet(s)\n",
2126                sc->unit, pkts);
2127 #endif
2128 }
2129
2130 /*
2131  * All DMA interrupts come here.
2132  *
2133  * Each channel has two interrupts.
2134  * Interrupt A for errors and Interrupt B for normal stuff like end
2135  * of transmit or receive dmas.
2136  */
2137 static void
2138 sr_dmac_intr(struct sr_hardc *hc, u_char isr1)
2139 {
2140         u_char dsr;             /* contents of DMA Stat Reg */
2141         u_char dotxstart;       /* enables for tranmit part */
2142         int mch;                /* channel being processed */
2143         struct sr_softc *sc;    /* channel's softc structure */
2144         sca_regs *sca = hc->sca;
2145         dmac_channel *dmac;     /* dma structure of chip */
2146
2147 #if BUGGY > 0
2148         kprintf("sr_dmac_intr(hc=%08x,isr1=%04x)\n", hc, isr1);
2149 #endif
2150
2151         mch = 0;                /* assume chan0 on card */
2152         dotxstart = isr1;       /* copy for xmitter starts */
2153
2154         /*
2155          * Shortcut if there is no interrupts for dma channel 0 or 1.
2156          * Skip processing for channel 0 if no incoming hit
2157          */
2158         if ((isr1 & 0x0F) == 0) {
2159                 mch = 1;
2160                 isr1 >>= 4;
2161         }
2162         do {
2163                 sc = &hc->sc[mch];
2164
2165                 /*
2166                  * Transmit channel - DMA Status Register Evaluation
2167                  */
2168                 if (isr1 & 0x0C) {
2169                         dmac = &sca->dmac[DMAC_TXCH(mch)];
2170
2171                         /*
2172                          * get the DMA Status Register contents and write
2173                          * back to reset interrupt...
2174                          */
2175                         dsr = SRC_GET8(hc->sca_base, dmac->dsr);
2176                         SRC_PUT8(hc->sca_base, dmac->dsr, dsr);
2177
2178                         /*
2179                          * Check for (& process) a Counter overflow
2180                          */
2181                         if (dsr & SCA_DSR_COF) {
2182                                 kprintf("sr%d: TX DMA Counter overflow, "
2183                                        "txpacket no %lu.\n",
2184 #ifndef NETGRAPH
2185                                        sc->unit, sc->ifsppp.pp_if.if_opackets);
2186                                 sc->ifsppp.pp_if.if_oerrors++;
2187 #else
2188                                        sc->unit, sc->opackets);
2189                                 sc->oerrors++;
2190 #endif /* NETGRAPH */
2191                         }
2192                         /*
2193                          * Check for (& process) a Buffer overflow
2194                          */
2195                         if (dsr & SCA_DSR_BOF) {
2196                                 kprintf("sr%d: TX DMA Buffer overflow, "
2197                                        "txpacket no %lu, dsr %02x, "
2198                                        "cda %04x, eda %04x.\n",
2199 #ifndef NETGRAPH
2200                                        sc->unit, sc->ifsppp.pp_if.if_opackets,
2201 #else
2202                                        sc->unit, sc->opackets,
2203 #endif /* NETGRAPH */
2204                                        dsr,
2205                                        SRC_GET16(hc->sca_base, dmac->cda),
2206                                        SRC_GET16(hc->sca_base, dmac->eda));
2207 #ifndef NETGRAPH
2208                                 sc->ifsppp.pp_if.if_oerrors++;
2209 #else
2210                                 sc->oerrors++;
2211 #endif /* NETGRAPH */
2212                         }
2213                         /*
2214                          * Check for (& process) an End of Transfer (OK)
2215                          */
2216                         if (dsr & SCA_DSR_EOT) {
2217                                 /*
2218                                  * This should be the most common case.
2219                                  *
2220                                  * Clear the IFF_OACTIVE flag.
2221                                  *
2222                                  * Call srstart to start a new transmit if
2223                                  * there is data to transmit.
2224                                  */
2225 #if BUGGY > 0
2226                                 kprintf("sr%d: TX Completed OK\n", sc->unit);
2227 #endif
2228                                 sc->xmit_busy = 0;
2229 #ifndef NETGRAPH
2230                                 sc->ifsppp.pp_if.if_flags &= ~IFF_OACTIVE;
2231                                 sc->ifsppp.pp_if.if_timer = 0;
2232 #else
2233                                 /* XXX may need to mark tx inactive? */
2234                                 sc->out_deficit++;
2235                                 sc->out_dog = DOG_HOLDOFF;
2236 #endif /* NETGRAPH */
2237
2238                                 if (sc->txb_inuse && --sc->txb_inuse)
2239                                         sr_xmit(sc);
2240                         }
2241                 }
2242                 /*
2243                  * Receive channel processing of DMA Status Register
2244                  */
2245                 if (isr1 & 0x03) {
2246                         dmac = &sca->dmac[DMAC_RXCH(mch)];
2247
2248                         dsr = SRC_GET8(hc->sca_base, dmac->dsr);
2249                         SRC_PUT8(hc->sca_base, dmac->dsr, dsr);
2250
2251                         /*
2252                          * End of frame processing (MSG OK?)
2253                          */
2254                         if (dsr & SCA_DSR_EOM) {
2255 #if BUGGY > 0
2256                                 int tt, ind;
2257
2258 #ifndef NETGRAPH
2259                                 tt = sc->ifsppp.pp_if.if_ipackets;
2260 #else   /* NETGRAPH */
2261                                 tt = sc->ipackets;
2262 #endif /* NETGRAPH */
2263                                 ind = sc->rxhind;
2264 #endif
2265
2266                                 sr_get_packets(sc);
2267 #if BUGGY > 0
2268 #ifndef NETGRAPH
2269                                 if (tt == sc->ifsppp.pp_if.if_ipackets)
2270 #else   /* NETGRAPH */
2271                                 if (tt == sc->ipackets)
2272 #endif /* NETGRAPH */
2273                                 {
2274                                         sca_descriptor *rxdesc;
2275                                         int i;
2276
2277                                         kprintf("SR: RXINTR isr1 %x, dsr %x, "
2278                                                "no data %d pkts, orxind %d.\n",
2279                                                dotxstart, dsr, tt, ind);
2280                                         kprintf("SR: rxdesc %x, rxstart %x, "
2281                                                "rxend %x, rxhind %d, "
2282                                                "rxmax %d.\n",
2283                                                sc->rxdesc, sc->rxstart,
2284                                                sc->rxend, sc->rxhind,
2285                                                sc->rxmax);
2286                                         kprintf("SR: cda %x, eda %x.\n",
2287                                             SRC_GET16(hc->sca_base, dmac->cda),
2288                                             SRC_GET16(hc->sca_base, dmac->eda));
2289
2290                                         rxdesc = (sca_descriptor *)
2291                                                  (hc->mem_start +
2292                                                   (sc->rxdesc & hc->winmsk));
2293                                         rxdesc = &rxdesc[sc->rxhind];
2294
2295                                         for (i = 0; i < 3; i++, rxdesc++)
2296                                                 kprintf("SR: rxdesc->stat %x, "
2297                                                        "len %d.\n",
2298                                                        rxdesc->stat,
2299                                                        rxdesc->len);
2300                                 }
2301 #endif /* BUGGY */
2302                         }
2303                         /*
2304                          * Check for Counter overflow
2305                          */
2306                         if (dsr & SCA_DSR_COF) {
2307                                 kprintf("sr%d: RX DMA Counter overflow, "
2308                                        "rxpkts %lu.\n",
2309 #ifndef NETGRAPH
2310                                        sc->unit, sc->ifsppp.pp_if.if_ipackets);
2311                                 sc->ifsppp.pp_if.if_ierrors++;
2312 #else   /* NETGRAPH */
2313                                        sc->unit, sc->ipackets);
2314                                 sc->ierrors[1]++;
2315 #endif /* NETGRAPH */
2316                         }
2317                         /*
2318                          * Check for Buffer overflow
2319                          */
2320                         if (dsr & SCA_DSR_BOF) {
2321                                 kprintf("sr%d: RX DMA Buffer overflow, "
2322                                        "rxpkts %lu, rxind %d, "
2323                                        "cda %x, eda %x, dsr %x.\n",
2324 #ifndef NETGRAPH
2325                                        sc->unit, sc->ifsppp.pp_if.if_ipackets,
2326 #else   /* NETGRAPH */
2327                                        sc->unit, sc->ipackets,
2328 #endif /* NETGRAPH */
2329                                        sc->rxhind,
2330                                        SRC_GET16(hc->sca_base, dmac->cda),
2331                                        SRC_GET16(hc->sca_base, dmac->eda),
2332                                        dsr);
2333
2334                                 /*
2335                                  * Make sure we eat as many as possible.
2336                                  * Then get the system running again.
2337                                  */
2338
2339                                 sr_eat_packet(sc, 0);
2340 #ifndef NETGRAPH
2341                                 sc->ifsppp.pp_if.if_ierrors++;
2342 #else   /* NETGRAPH */
2343                                 sc->ierrors[2]++;
2344 #endif /* NETGRAPH */
2345
2346                                 SRC_PUT8(hc->sca_base,
2347                                          sca->msci[mch].cmd,
2348                                          SCA_CMD_RXMSGREJ);
2349
2350                                 SRC_PUT8(hc->sca_base, dmac->dsr, SCA_DSR_DE);
2351
2352 #if BUGGY > 0
2353                                 kprintf("sr%d: RX DMA Buffer overflow, "
2354                                        "rxpkts %lu, rxind %d, "
2355                                        "cda %x, eda %x, dsr %x. After\n",
2356                                        sc->unit,
2357 #ifndef NETGRAPH
2358                                        sc->ipackets,
2359 #else   /* NETGRAPH */
2360                                        sc->ifsppp.pp_if.if_ipackets,
2361 #endif /* NETGRAPH */
2362                                        sc->rxhind,
2363                                        SRC_GET16(hc->sca_base, dmac->cda),
2364                                        SRC_GET16(hc->sca_base, dmac->eda),
2365                                        SRC_GET8(hc->sca_base, dmac->dsr));
2366 #endif
2367                         }
2368                         /*
2369                          * End of Transfer
2370                          */
2371                         if (dsr & SCA_DSR_EOT) {
2372                                 /*
2373                                  * If this happen, it means that we are
2374                                  * receiving faster than what the processor
2375                                  * can handle.
2376                                  *
2377                                  * XXX We should enable the dma again.
2378                                  */
2379                                 kprintf("sr%d: RX End of xfer, rxpkts %lu.\n",
2380                                        sc->unit,
2381 #ifndef NETGRAPH
2382                                        sc->ifsppp.pp_if.if_ipackets);
2383                                 sc->ifsppp.pp_if.if_ierrors++;
2384 #else
2385                                        sc->ipackets);
2386                                 sc->ierrors[3]++;
2387 #endif /* NETGRAPH */
2388                         }
2389                 }
2390                 isr1 >>= 4;     /* process next half of ISR */
2391                 mch++;          /* and move to next channel */
2392         } while ((mch < NCHAN) && isr1);        /* loop for each chn */
2393
2394         /*
2395          * Now that we have done all the urgent things, see if we can fill
2396          * the transmit buffers.
2397          */
2398         for (mch = 0; mch < NCHAN; mch++) {
2399                 if (dotxstart & 0x0C) { /* TX initiation enabled? */
2400                         sc = &hc->sc[mch];
2401 #ifndef NETGRAPH
2402                         srstart(&sc->ifsppp.pp_if);
2403 #else
2404                         srstart(sc);
2405 #endif /* NETGRAPH */
2406                 }
2407                 dotxstart >>= 4;/* shift for next channel */
2408         }
2409 }
2410 #ifndef NETGRAPH
2411 #ifdef USE_MODEMCK
2412 /*
2413  * Perform timeout on an FR channel
2414  *
2415  * Establish a periodic check of open N2 ports;  If
2416  * a port is open/active, its DCD state is checked
2417  * and a loss of DCD is recognized (and eventually
2418  * processed).
2419  */
2420 static void
2421 sr_modemck(void *arg)
2422 {
2423         int card;               /* card index in table */
2424         int cards;              /* card list index */
2425         int mch;                /* channel on card */
2426         u_char dcd_v;           /* Data Carrier Detect */
2427         u_char got_st0;         /* contents of ST0 */
2428         u_char got_st1;         /* contents of ST1 */
2429         u_char got_st2;         /* contents of ST2 */
2430         u_char got_st3;         /* contents of ST3 */
2431         struct sr_hardc *hc;    /* card's configuration */
2432         struct sr_hardc *Card[16];/* up to 16 cards in system */
2433         struct sr_softc *sc;    /* channel's softc structure */
2434         struct ifnet *ifp;      /* interface control table */
2435         msci_channel *msci;     /* regs specific to channel */
2436
2437         crit_enter();
2438
2439 #if     0
2440         if (sr_opens == 0) {    /* count of "up" channels */
2441                 sr_watcher = 0; /* indicate no watcher */
2442
2443                 crit_exit();
2444
2445                 return;
2446         }
2447 #endif
2448
2449         sr_watcher = 1;         /* mark that we're online */
2450
2451         /*
2452          * Now we'll need a list of cards to process.  Since we can handle
2453          * both ISA and PCI cards (and I didn't think of making this logic
2454          * global YET) we'll generate a single table of card table
2455          * addresses.
2456          */
2457         cards = 0;
2458
2459         for (card = 0; card < NSR; card++) {
2460                 hc = &sr_hardc[card];
2461
2462                 if (hc->sc == NULL)
2463                         continue;
2464
2465                 Card[cards++] = hc;
2466         }
2467
2468         hc = sr_hardc_pci;
2469
2470         while (hc) {
2471                 Card[cards++] = hc;
2472                 hc = hc->next;
2473         }
2474
2475         /*
2476          * OK, we've got work we can do.  Let's do it... (Please note that
2477          * this code _only_ deals w/ ISA cards)
2478          */
2479         for (card = 0; card < cards; card++) {
2480                 hc = Card[card];/* get card table */
2481
2482                 for (mch = 0; mch < hc->numports; mch++) {
2483                         sc = &hc->sc[mch];
2484
2485                         ifp = &sc->ifsppp.pp_if;
2486
2487                         /*
2488                          * if this channel isn't "up", skip it
2489                          */
2490                         if ((ifp->if_flags & IFF_UP) == 0)
2491                                 continue;
2492
2493                         /*
2494                          * OK, now we can go looking at this channel's
2495                          * actual register contents...
2496                          */
2497                         msci = &hc->sca->msci[sc->scachan];
2498
2499                         /*
2500                          * OK, now we'll look into the actual status of this
2501                          * channel...
2502                          *
2503                          * I suck in more registers than strictly needed
2504                          */
2505                         got_st0 = SRC_GET8(hc->sca_base, msci->st0);
2506                         got_st1 = SRC_GET8(hc->sca_base, msci->st1);
2507                         got_st2 = SRC_GET8(hc->sca_base, msci->st2);
2508                         got_st3 = SRC_GET8(hc->sca_base, msci->st3);
2509
2510                         /*
2511                          * We want to see if the DCD signal is up (DCD is
2512                          * true if zero)
2513                          */
2514                         dcd_v = (got_st3 & SCA_ST3_DCD) == 0;
2515
2516                         if (dcd_v == 0)
2517                                 kprintf("sr%d: DCD lost\n", sc->unit);
2518                 }
2519         }
2520
2521         /*
2522          * OK, now set up for the next modem signal checking pass...
2523          */
2524         timeout(sr_modemck, NULL, hz);
2525
2526         crit_exit();
2527 }
2528 #endif
2529 #else   /* NETGRAPH */
2530 /*
2531  * If a port is open/active, it's DCD state is checked
2532  * and a loss of DCD is recognized (and eventually processed?).
2533  */
2534 static void
2535 sr_modemck(struct sr_softc *sc )
2536 {
2537         u_char got_st3;                 /* contents of ST3 */
2538         struct sr_hardc *hc = sc->hc;   /* card's configuration */
2539         msci_channel *msci;             /* regs specific to channel */
2540
2541         crit_enter();
2542
2543         if (sc->running == 0) {
2544                 crit_exit();
2545                 return;
2546         }
2547
2548         /*
2549          * OK, now we can go looking at this channel's register contents...
2550          */
2551         msci = &hc->sca->msci[sc->scachan];
2552         got_st3 = SRC_GET8(hc->sca_base, msci->st3);
2553
2554         /*
2555          * We want to see if the DCD signal is up (DCD is true if zero)
2556          */
2557         sc->dcd = (got_st3 & SCA_ST3_DCD) == 0;
2558
2559         crit_exit();
2560 }
2561
2562 #endif  /* NETGRAPH */
2563 static void
2564 sr_msci_intr(struct sr_hardc *hc, u_char isr0)
2565 {
2566         kprintf("src%d: SRINTR: MSCI\n", hc->cunit);
2567 }
2568
2569 static void
2570 sr_timer_intr(struct sr_hardc *hc, u_char isr2)
2571 {
2572         kprintf("src%d: SRINTR: TIMER\n", hc->cunit);
2573 }
2574
2575 #ifdef  NETGRAPH
2576 /*****************************************
2577  * Device timeout/watchdog routine.
2578  * called once per second.
2579  * checks to see that if activity was expected, that it hapenned.
2580  * At present we only look to see if expected output was completed.
2581  */
2582 static void
2583 ngsr_watchdog_frame(void * arg)
2584 {
2585         struct sr_softc * sc = arg;
2586         int     speed;
2587
2588         crit_enter();
2589
2590         if (sc->running == 0) {
2591                 crit_enter();
2592                 return; /* if we are not running let timeouts die */
2593         }
2594         /*
2595          * calculate the apparent throughputs
2596          *  XXX a real hack
2597          */
2598
2599         speed = sc->inbytes - sc->lastinbytes;
2600         sc->lastinbytes = sc->inbytes;
2601         if ( sc->inrate < speed )
2602                 sc->inrate = speed;
2603         speed = sc->outbytes - sc->lastoutbytes;
2604         sc->lastoutbytes = sc->outbytes;
2605         if ( sc->outrate < speed )
2606                 sc->outrate = speed;
2607         sc->inlast++;
2608
2609         crit_exit();
2610
2611         if ((sc->inlast > QUITE_A_WHILE)
2612         && (sc->out_deficit > LOTS_OF_PACKETS)) {
2613                 log(LOG_ERR, "sr%d: No response from remote end\n", sc->unit);
2614
2615                 crit_enter();
2616
2617                 sr_down(sc);
2618                 sr_up(sc);
2619                 sc->inlast = sc->out_deficit = 0;
2620
2621                 crit_exit();
2622         } else if ( sc->xmit_busy ) { /* no TX -> no TX timeouts */
2623                 if (sc->out_dog == 0) {
2624                         log(LOG_ERR, "sr%d: Transmit failure.. no clock?\n",
2625                                         sc->unit);
2626
2627                         crit_enter();
2628
2629                         srwatchdog(sc);
2630 #if 0
2631                         sr_down(sc);
2632                         sr_up(sc);
2633 #endif
2634
2635                         crit_exit();
2636
2637                         sc->inlast = sc->out_deficit = 0;
2638                 } else {
2639                         sc->out_dog--;
2640                 }
2641         }
2642         sr_modemck(sc);         /* update the DCD status */
2643         callout_reset(&sc->sr_timer, hz, ngsr_watchdog_frame, sc);
2644 }
2645
2646 /***********************************************************************
2647  * This section contains the methods for the Netgraph interface
2648  ***********************************************************************/
2649 /*
2650  * It is not possible or allowable to create a node of this type.
2651  * If the hardware exists, it will already have created it.
2652  */
2653 static  int
2654 ngsr_constructor(node_p *nodep)
2655 {
2656         return (EINVAL);
2657 }
2658
2659 /*
2660  * give our ok for a hook to be added...
2661  * If we are not running this should kick the device into life.
2662  * The hook's private info points to our stash of info about that
2663  * channel.
2664  */
2665 static int
2666 ngsr_newhook(node_p node, hook_p hook, const char *name)
2667 {
2668         struct sr_softc *       sc = node->private;
2669
2670         /*
2671          * check if it's our friend the debug hook
2672          */
2673         if (strcmp(name, NG_SR_HOOK_DEBUG) == 0) {
2674                 hook->private = NULL; /* paranoid */
2675                 sc->debug_hook = hook;
2676                 return (0);
2677         }
2678
2679         /*
2680          * Check for raw mode hook.
2681          */
2682         if (strcmp(name, NG_SR_HOOK_RAW) != 0) {
2683                 return (EINVAL);
2684         }
2685         hook->private = sc;
2686         sc->hook = hook;
2687         sc->datahooks++;
2688         sr_up(sc);
2689         return (0);
2690 }
2691
2692 /*
2693  * incoming messages.
2694  * Just respond to the generic TEXT_STATUS message
2695  */
2696 static  int
2697 ngsr_rcvmsg(node_p node,
2698         struct ng_mesg *msg, const char *retaddr, struct ng_mesg **resp)
2699 {
2700         struct sr_softc *       sc;
2701         int error = 0;
2702
2703         sc = node->private;
2704         switch (msg->header.typecookie) {
2705             case        NG_SR_COOKIE:
2706                 error = EINVAL;
2707                 break;
2708             case        NGM_GENERIC_COOKIE:
2709                 switch(msg->header.cmd) {
2710                     case NGM_TEXT_STATUS: {
2711                             char        *arg;
2712                             int pos = 0;
2713                             int resplen = sizeof(struct ng_mesg) + 512;
2714                             MALLOC(*resp, struct ng_mesg *, resplen,
2715                                         M_NETGRAPH, M_INTWAIT | M_ZERO);
2716                             if (*resp == NULL) {
2717                                 error = ENOMEM;
2718                                 break;
2719                             }
2720                             arg = (*resp)->data;
2721
2722                             /*
2723                              * Put in the throughput information.
2724                              */
2725                             pos = ksprintf(arg, "%ld bytes in, %ld bytes out\n"
2726                             "highest rate seen: %ld B/S in, %ld B/S out\n",
2727                             sc->inbytes, sc->outbytes,
2728                             sc->inrate, sc->outrate);
2729                             pos += ksprintf(arg + pos,
2730                                 "%ld output errors\n",
2731                                 sc->oerrors);
2732                             pos += ksprintf(arg + pos,
2733                                 "ierrors = %ld, %ld, %ld, %ld, %ld, %ld\n",
2734                                 sc->ierrors[0],
2735                                 sc->ierrors[1],
2736                                 sc->ierrors[2],
2737                                 sc->ierrors[3],
2738                                 sc->ierrors[4],
2739                                 sc->ierrors[5]);
2740
2741                             (*resp)->header.version = NG_VERSION;
2742                             (*resp)->header.arglen = strlen(arg) + 1;
2743                             (*resp)->header.token = msg->header.token;
2744                             (*resp)->header.typecookie = NG_SR_COOKIE;
2745                             (*resp)->header.cmd = msg->header.cmd;
2746                             strlcpy((*resp)->header.cmdstr, "status",
2747                                         NG_CMDSTRSIZ);
2748                         }
2749                         break;
2750                     default:
2751                         error = EINVAL;
2752                         break;
2753                     }
2754                 break;
2755             default:
2756                 error = EINVAL;
2757                 break;
2758         }
2759         kfree(msg, M_NETGRAPH);
2760         return (error);
2761 }
2762
2763 /*
2764  * get data from another node and transmit it to the correct channel
2765  */
2766 static  int
2767 ngsr_rcvdata(hook_p hook, struct mbuf *m, meta_p meta)
2768 {
2769         int error = 0;
2770         struct sr_softc * sc = hook->node->private;
2771         struct ifqueue  *xmitq_p;
2772
2773         /*
2774          * data doesn't come in from just anywhere (e.g control hook)
2775          */
2776         if ( hook->private == NULL) {
2777                 error = ENETDOWN;
2778                 goto bad;
2779         }
2780
2781         /*
2782          * Now queue the data for when it can be sent
2783          */
2784         if (meta && meta->priority > 0) {
2785                 xmitq_p = (&sc->xmitq_hipri);
2786         } else {
2787                 xmitq_p = (&sc->xmitq);
2788         }
2789
2790         crit_enter();
2791
2792         if (IF_QFULL(xmitq_p)) {
2793                 IF_DROP(xmitq_p);
2794
2795                 crit_exit();
2796
2797                 error = ENOBUFS;
2798                 goto bad;
2799         }
2800         IF_ENQUEUE(xmitq_p, m);
2801         srstart(sc);
2802
2803         crit_exit();
2804
2805         return (0);
2806
2807 bad:
2808         /*
2809          * It was an error case.
2810          * check if we need to free the mbuf, and then return the error
2811          */
2812         NG_FREE_DATA(m, meta);
2813         return (error);
2814 }
2815
2816 /*
2817  * do local shutdown processing..
2818  * this node will refuse to go away, unless the hardware says to..
2819  * don't unref the node, or remove our name. just clear our links up.
2820  */
2821 static  int
2822 ngsr_rmnode(node_p node)
2823 {
2824         struct sr_softc * sc = node->private;
2825
2826         sr_down(sc);
2827         ng_cutlinks(node);
2828         node->flags &= ~NG_INVALID; /* bounce back to life */
2829         return (0);
2830 }
2831
2832 /* already linked */
2833 static  int
2834 ngsr_connect(hook_p hook)
2835 {
2836         /* be really amiable and just say "YUP that's OK by me! " */
2837         return (0);
2838 }
2839
2840 /*
2841  * notify on hook disconnection (destruction)
2842  *
2843  * Invalidate the private data associated with this dlci.
2844  * For this type, removal of the last link resets tries to destroy the node.
2845  * As the device still exists, the shutdown method will not actually
2846  * destroy the node, but reset the device and leave it 'fresh' :)
2847  *
2848  * The node removal code will remove all references except that owned by the
2849  * driver.
2850  */
2851 static  int
2852 ngsr_disconnect(hook_p hook)
2853 {
2854         struct sr_softc * sc = hook->node->private;
2855         /*
2856          * If it's the data hook, then free resources etc.
2857          */
2858         if (hook->private) {
2859                 crit_enter();
2860
2861                 sc->datahooks--;
2862                 if (sc->datahooks == 0)
2863                         sr_down(sc);
2864
2865                 crit_exit();
2866         } else {
2867                 sc->debug_hook = NULL;
2868         }
2869         return (0);
2870 }
2871
2872 /*
2873  * called during bootup
2874  * or LKM loading to put this type into the list of known modules
2875  */
2876 static void
2877 ngsr_init(void *ignored)
2878 {
2879         if (ng_newtype(&typestruct))
2880                 kprintf("ngsr install failed\n");
2881         ngsr_done_init = 1;
2882 }
2883 #endif /* NETGRAPH */
2884
2885 /*
2886  ********************************* END ************************************
2887  */