1 /* $FreeBSD: src/sys/dev/isp/isp_pci.c,v 1.78.2.4 2002/10/11 18:50:53 mjacob Exp $ */
3 * PCI specific probe and attach routines for Qlogic ISP SCSI adapters.
6 * Copyright (c) 1997, 1998, 1999, 2000, 2001 by Matthew Jacob
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice immediately at the beginning of the file, without modification,
13 * this list of conditions, and the following disclaimer.
14 * 2. The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
21 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 #include <sys/param.h>
31 #include <sys/systm.h>
32 #include <sys/kernel.h>
33 #include <sys/module.h>
36 #include <pci/pcireg.h>
37 #include <pci/pcivar.h>
39 #include <machine/bus_memio.h>
40 #include <machine/bus_pio.h>
41 #include <machine/bus.h>
42 #include <machine/resource.h>
44 #include <sys/malloc.h>
46 #include <dev/isp/isp_freebsd.h>
48 static u_int16_t isp_pci_rd_reg(struct ispsoftc *, int);
49 static void isp_pci_wr_reg(struct ispsoftc *, int, u_int16_t);
50 static u_int16_t isp_pci_rd_reg_1080(struct ispsoftc *, int);
51 static void isp_pci_wr_reg_1080(struct ispsoftc *, int, u_int16_t);
53 isp_pci_rd_isr(struct ispsoftc *, u_int16_t *, u_int16_t *, u_int16_t *);
55 isp_pci_rd_isr_2300(struct ispsoftc *, u_int16_t *, u_int16_t *, u_int16_t *);
56 static int isp_pci_mbxdma(struct ispsoftc *);
58 isp_pci_dmasetup(struct ispsoftc *, XS_T *, ispreq_t *, u_int16_t *, u_int16_t);
60 isp_pci_dmateardown(struct ispsoftc *, XS_T *, u_int16_t);
62 static void isp_pci_reset1(struct ispsoftc *);
63 static void isp_pci_dumpregs(struct ispsoftc *, const char *);
65 static struct ispmdvec mdvec = {
76 BIU_BURST_ENABLE|BIU_PCI_CONF1_FIFO_64
79 static struct ispmdvec mdvec_1080 = {
90 BIU_BURST_ENABLE|BIU_PCI_CONF1_FIFO_64
93 static struct ispmdvec mdvec_12160 = {
104 BIU_BURST_ENABLE|BIU_PCI_CONF1_FIFO_64
107 static struct ispmdvec mdvec_2100 = {
119 static struct ispmdvec mdvec_2200 = {
131 static struct ispmdvec mdvec_2300 = {
143 #ifndef PCIM_CMD_INVEN
144 #define PCIM_CMD_INVEN 0x10
146 #ifndef PCIM_CMD_BUSMASTEREN
147 #define PCIM_CMD_BUSMASTEREN 0x0004
149 #ifndef PCIM_CMD_PERRESPEN
150 #define PCIM_CMD_PERRESPEN 0x0040
152 #ifndef PCIM_CMD_SEREN
153 #define PCIM_CMD_SEREN 0x0100
157 #define PCIR_COMMAND 0x04
160 #ifndef PCIR_CACHELNSZ
161 #define PCIR_CACHELNSZ 0x0c
164 #ifndef PCIR_LATTIMER
165 #define PCIR_LATTIMER 0x0d
169 #define PCIR_ROMADDR 0x30
172 #ifndef PCI_VENDOR_QLOGIC
173 #define PCI_VENDOR_QLOGIC 0x1077
176 #ifndef PCI_PRODUCT_QLOGIC_ISP1020
177 #define PCI_PRODUCT_QLOGIC_ISP1020 0x1020
180 #ifndef PCI_PRODUCT_QLOGIC_ISP1080
181 #define PCI_PRODUCT_QLOGIC_ISP1080 0x1080
184 #ifndef PCI_PRODUCT_QLOGIC_ISP10160
185 #define PCI_PRODUCT_QLOGIC_ISP10160 0x1016
188 #ifndef PCI_PRODUCT_QLOGIC_ISP12160
189 #define PCI_PRODUCT_QLOGIC_ISP12160 0x1216
192 #ifndef PCI_PRODUCT_QLOGIC_ISP1240
193 #define PCI_PRODUCT_QLOGIC_ISP1240 0x1240
196 #ifndef PCI_PRODUCT_QLOGIC_ISP1280
197 #define PCI_PRODUCT_QLOGIC_ISP1280 0x1280
200 #ifndef PCI_PRODUCT_QLOGIC_ISP2100
201 #define PCI_PRODUCT_QLOGIC_ISP2100 0x2100
204 #ifndef PCI_PRODUCT_QLOGIC_ISP2200
205 #define PCI_PRODUCT_QLOGIC_ISP2200 0x2200
208 #ifndef PCI_PRODUCT_QLOGIC_ISP2300
209 #define PCI_PRODUCT_QLOGIC_ISP2300 0x2300
212 #ifndef PCI_PRODUCT_QLOGIC_ISP2312
213 #define PCI_PRODUCT_QLOGIC_ISP2312 0x2312
216 #define PCI_QLOGIC_ISP1020 \
217 ((PCI_PRODUCT_QLOGIC_ISP1020 << 16) | PCI_VENDOR_QLOGIC)
219 #define PCI_QLOGIC_ISP1080 \
220 ((PCI_PRODUCT_QLOGIC_ISP1080 << 16) | PCI_VENDOR_QLOGIC)
222 #define PCI_QLOGIC_ISP10160 \
223 ((PCI_PRODUCT_QLOGIC_ISP10160 << 16) | PCI_VENDOR_QLOGIC)
225 #define PCI_QLOGIC_ISP12160 \
226 ((PCI_PRODUCT_QLOGIC_ISP12160 << 16) | PCI_VENDOR_QLOGIC)
228 #define PCI_QLOGIC_ISP1240 \
229 ((PCI_PRODUCT_QLOGIC_ISP1240 << 16) | PCI_VENDOR_QLOGIC)
231 #define PCI_QLOGIC_ISP1280 \
232 ((PCI_PRODUCT_QLOGIC_ISP1280 << 16) | PCI_VENDOR_QLOGIC)
234 #define PCI_QLOGIC_ISP2100 \
235 ((PCI_PRODUCT_QLOGIC_ISP2100 << 16) | PCI_VENDOR_QLOGIC)
237 #define PCI_QLOGIC_ISP2200 \
238 ((PCI_PRODUCT_QLOGIC_ISP2200 << 16) | PCI_VENDOR_QLOGIC)
240 #define PCI_QLOGIC_ISP2300 \
241 ((PCI_PRODUCT_QLOGIC_ISP2300 << 16) | PCI_VENDOR_QLOGIC)
243 #define PCI_QLOGIC_ISP2312 \
244 ((PCI_PRODUCT_QLOGIC_ISP2312 << 16) | PCI_VENDOR_QLOGIC)
247 * Odd case for some AMI raid cards... We need to *not* attach to this.
249 #define AMI_RAID_SUBVENDOR_ID 0x101e
251 #define IO_MAP_REG 0x10
252 #define MEM_MAP_REG 0x14
254 #define PCI_DFLT_LTNCY 0x40
255 #define PCI_DFLT_LNSZ 0x10
257 static int isp_pci_probe (device_t);
258 static int isp_pci_attach (device_t);
261 struct isp_pcisoftc {
262 struct ispsoftc pci_isp;
264 struct resource * pci_reg;
265 bus_space_tag_t pci_st;
266 bus_space_handle_t pci_sh;
268 int16_t pci_poff[_NREG_BLKS];
272 ispfwfunc *isp_get_firmware_p = NULL;
274 static device_method_t isp_pci_methods[] = {
275 /* Device interface */
276 DEVMETHOD(device_probe, isp_pci_probe),
277 DEVMETHOD(device_attach, isp_pci_attach),
280 static void isp_pci_intr(void *);
282 static driver_t isp_pci_driver = {
283 "isp", isp_pci_methods, sizeof (struct isp_pcisoftc)
285 static devclass_t isp_devclass;
286 DRIVER_MODULE(isp, pci, isp_pci_driver, isp_devclass, 0, 0);
287 MODULE_VERSION(isp, 1);
290 isp_pci_probe(device_t dev)
292 switch ((pci_get_device(dev) << 16) | (pci_get_vendor(dev))) {
293 case PCI_QLOGIC_ISP1020:
294 device_set_desc(dev, "Qlogic ISP 1020/1040 PCI SCSI Adapter");
296 case PCI_QLOGIC_ISP1080:
297 device_set_desc(dev, "Qlogic ISP 1080 PCI SCSI Adapter");
299 case PCI_QLOGIC_ISP1240:
300 device_set_desc(dev, "Qlogic ISP 1240 PCI SCSI Adapter");
302 case PCI_QLOGIC_ISP1280:
303 device_set_desc(dev, "Qlogic ISP 1280 PCI SCSI Adapter");
305 case PCI_QLOGIC_ISP10160:
306 device_set_desc(dev, "Qlogic ISP 10160 PCI SCSI Adapter");
308 case PCI_QLOGIC_ISP12160:
309 if (pci_get_subvendor(dev) == AMI_RAID_SUBVENDOR_ID) {
312 device_set_desc(dev, "Qlogic ISP 12160 PCI SCSI Adapter");
314 case PCI_QLOGIC_ISP2100:
315 device_set_desc(dev, "Qlogic ISP 2100 PCI FC-AL Adapter");
317 case PCI_QLOGIC_ISP2200:
318 device_set_desc(dev, "Qlogic ISP 2200 PCI FC-AL Adapter");
320 case PCI_QLOGIC_ISP2300:
321 device_set_desc(dev, "Qlogic ISP 2300 PCI FC-AL Adapter");
323 case PCI_QLOGIC_ISP2312:
324 device_set_desc(dev, "Qlogic ISP 2312 PCI FC-AL Adapter");
329 if (device_get_unit(dev) == 0 && bootverbose) {
330 printf("Qlogic ISP Driver, FreeBSD Version %d.%d, "
331 "Core Version %d.%d\n",
332 ISP_PLATFORM_VERSION_MAJOR, ISP_PLATFORM_VERSION_MINOR,
333 ISP_CORE_VERSION_MAJOR, ISP_CORE_VERSION_MINOR);
336 * XXXX: Here is where we might load the f/w module
337 * XXXX: (or increase a reference count to it).
343 isp_pci_attach(device_t dev)
345 struct resource *regs, *irq;
346 int unit, bitmap, rtp, rgd, iqd, m1, m2, isp_debug;
347 u_int32_t data, cmd, linesz, psize, basetype;
348 struct isp_pcisoftc *pcs;
349 struct ispsoftc *isp = NULL;
350 struct ispmdvec *mdvp;
355 * Figure out if we're supposed to skip this one.
357 unit = device_get_unit(dev);
358 if (getenv_int("isp_disable", &bitmap)) {
359 if (bitmap & (1 << unit)) {
360 device_printf(dev, "not configuring\n");
362 * But return '0' to preserve HBA numbering.
368 pcs = malloc(sizeof (struct isp_pcisoftc), M_DEVBUF, M_NOWAIT);
370 device_printf(dev, "cannot allocate softc\n");
373 bzero(pcs, sizeof (struct isp_pcisoftc));
376 * Figure out which we should try first - memory mapping or i/o mapping?
380 m2 = PCIM_CMD_PORTEN;
382 m1 = PCIM_CMD_PORTEN;
386 if (getenv_int("isp_mem_map", &bitmap)) {
387 if (bitmap & (1 << unit)) {
389 m2 = PCIM_CMD_PORTEN;
393 if (getenv_int("isp_io_map", &bitmap)) {
394 if (bitmap & (1 << unit)) {
395 m1 = PCIM_CMD_PORTEN;
400 linesz = PCI_DFLT_LNSZ;
404 cmd = pci_read_config(dev, PCIR_COMMAND, 1);
406 rtp = (m1 == PCIM_CMD_MEMEN)? SYS_RES_MEMORY : SYS_RES_IOPORT;
407 rgd = (m1 == PCIM_CMD_MEMEN)? MEM_MAP_REG : IO_MAP_REG;
408 regs = bus_alloc_resource(dev, rtp, &rgd, 0, ~0, 1, RF_ACTIVE);
410 if (regs == NULL && (cmd & m2)) {
411 rtp = (m2 == PCIM_CMD_MEMEN)? SYS_RES_MEMORY : SYS_RES_IOPORT;
412 rgd = (m2 == PCIM_CMD_MEMEN)? MEM_MAP_REG : IO_MAP_REG;
413 regs = bus_alloc_resource(dev, rtp, &rgd, 0, ~0, 1, RF_ACTIVE);
416 device_printf(dev, "unable to map any ports\n");
420 device_printf(dev, "using %s space register mapping\n",
421 (rgd == IO_MAP_REG)? "I/O" : "Memory");
424 pcs->pci_st = rman_get_bustag(regs);
425 pcs->pci_sh = rman_get_bushandle(regs);
427 pcs->pci_poff[BIU_BLOCK >> _BLK_REG_SHFT] = BIU_REGS_OFF;
428 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS_OFF;
429 pcs->pci_poff[SXP_BLOCK >> _BLK_REG_SHFT] = PCI_SXP_REGS_OFF;
430 pcs->pci_poff[RISC_BLOCK >> _BLK_REG_SHFT] = PCI_RISC_REGS_OFF;
431 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] = DMA_REGS_OFF;
433 basetype = ISP_HA_SCSI_UNKNOWN;
434 psize = sizeof (sdparam);
435 lim = BUS_SPACE_MAXSIZE_32BIT;
436 if (pci_get_devid(dev) == PCI_QLOGIC_ISP1020) {
438 basetype = ISP_HA_SCSI_UNKNOWN;
439 psize = sizeof (sdparam);
440 lim = BUS_SPACE_MAXSIZE_24BIT;
442 if (pci_get_devid(dev) == PCI_QLOGIC_ISP1080) {
444 basetype = ISP_HA_SCSI_1080;
445 psize = sizeof (sdparam);
446 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] =
447 ISP1080_DMA_REGS_OFF;
449 if (pci_get_devid(dev) == PCI_QLOGIC_ISP1240) {
451 basetype = ISP_HA_SCSI_1240;
452 psize = 2 * sizeof (sdparam);
453 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] =
454 ISP1080_DMA_REGS_OFF;
456 if (pci_get_devid(dev) == PCI_QLOGIC_ISP1280) {
458 basetype = ISP_HA_SCSI_1280;
459 psize = 2 * sizeof (sdparam);
460 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] =
461 ISP1080_DMA_REGS_OFF;
463 if (pci_get_devid(dev) == PCI_QLOGIC_ISP10160) {
465 basetype = ISP_HA_SCSI_10160;
466 psize = sizeof (sdparam);
467 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] =
468 ISP1080_DMA_REGS_OFF;
470 if (pci_get_devid(dev) == PCI_QLOGIC_ISP12160) {
472 basetype = ISP_HA_SCSI_12160;
473 psize = 2 * sizeof (sdparam);
474 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] =
475 ISP1080_DMA_REGS_OFF;
477 if (pci_get_devid(dev) == PCI_QLOGIC_ISP2100) {
479 basetype = ISP_HA_FC_2100;
480 psize = sizeof (fcparam);
481 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] =
482 PCI_MBOX_REGS2100_OFF;
483 if (pci_get_revid(dev) < 3) {
485 * XXX: Need to get the actual revision
486 * XXX: number of the 2100 FB. At any rate,
487 * XXX: lower cache line size for early revision
493 if (pci_get_devid(dev) == PCI_QLOGIC_ISP2200) {
495 basetype = ISP_HA_FC_2200;
496 psize = sizeof (fcparam);
497 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] =
498 PCI_MBOX_REGS2100_OFF;
500 if (pci_get_devid(dev) == PCI_QLOGIC_ISP2300) {
502 basetype = ISP_HA_FC_2300;
503 psize = sizeof (fcparam);
504 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] =
505 PCI_MBOX_REGS2300_OFF;
507 if (pci_get_devid(dev) == PCI_QLOGIC_ISP2312) {
509 basetype = ISP_HA_FC_2312;
510 psize = sizeof (fcparam);
511 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] =
512 PCI_MBOX_REGS2300_OFF;
515 isp->isp_param = malloc(psize, M_DEVBUF, M_NOWAIT);
516 if (isp->isp_param == NULL) {
517 device_printf(dev, "cannot allocate parameter data\n");
520 bzero(isp->isp_param, psize);
521 isp->isp_mdvec = mdvp;
522 isp->isp_type = basetype;
523 isp->isp_revision = pci_get_revid(dev);
524 #ifdef ISP_TARGET_MODE
525 isp->isp_role = ISP_ROLE_BOTH;
527 isp->isp_role = ISP_DEFAULT_ROLES;
533 * Try and find firmware for this device.
536 if (isp_get_firmware_p) {
537 int device = (int) pci_get_device(dev);
538 #ifdef ISP_TARGET_MODE
539 (*isp_get_firmware_p)(0, 1, device, &mdvp->dv_ispfw);
541 (*isp_get_firmware_p)(0, 0, device, &mdvp->dv_ispfw);
546 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER
549 cmd |= PCIM_CMD_SEREN | PCIM_CMD_PERRESPEN |
550 PCIM_CMD_BUSMASTEREN | PCIM_CMD_INVEN;
551 if (IS_2300(isp)) { /* per QLogic errata */
552 cmd &= ~PCIM_CMD_INVEN;
556 * Can't tell if ROM will hang on 'ABOUT FIRMWARE' command.
558 isp->isp_touched = 1;
561 pci_write_config(dev, PCIR_COMMAND, cmd, 1);
564 * Make sure the Cache Line Size register is set sensibly.
566 data = pci_read_config(dev, PCIR_CACHELNSZ, 1);
567 if (data != linesz) {
568 data = PCI_DFLT_LNSZ;
569 isp_prt(isp, ISP_LOGCONFIG, "set PCI line size to %d", data);
570 pci_write_config(dev, PCIR_CACHELNSZ, data, 1);
574 * Make sure the Latency Timer is sane.
576 data = pci_read_config(dev, PCIR_LATTIMER, 1);
577 if (data < PCI_DFLT_LTNCY) {
578 data = PCI_DFLT_LTNCY;
579 isp_prt(isp, ISP_LOGCONFIG, "set PCI latency to %d", data);
580 pci_write_config(dev, PCIR_LATTIMER, data, 1);
584 * Make sure we've disabled the ROM.
586 data = pci_read_config(dev, PCIR_ROMADDR, 4);
588 pci_write_config(dev, PCIR_ROMADDR, data, 4);
591 irq = bus_alloc_resource(dev, SYS_RES_IRQ, &iqd, 0, ~0,
592 1, RF_ACTIVE | RF_SHAREABLE);
594 device_printf(dev, "could not allocate interrupt\n");
598 if (getenv_int("isp_no_fwload", &bitmap)) {
599 if (bitmap & (1 << unit))
600 isp->isp_confopts |= ISP_CFG_NORELOAD;
602 if (getenv_int("isp_fwload", &bitmap)) {
603 if (bitmap & (1 << unit))
604 isp->isp_confopts &= ~ISP_CFG_NORELOAD;
606 if (getenv_int("isp_no_nvram", &bitmap)) {
607 if (bitmap & (1 << unit))
608 isp->isp_confopts |= ISP_CFG_NONVRAM;
610 if (getenv_int("isp_nvram", &bitmap)) {
611 if (bitmap & (1 << unit))
612 isp->isp_confopts &= ~ISP_CFG_NONVRAM;
614 if (getenv_int("isp_fcduplex", &bitmap)) {
615 if (bitmap & (1 << unit))
616 isp->isp_confopts |= ISP_CFG_FULL_DUPLEX;
618 if (getenv_int("isp_no_fcduplex", &bitmap)) {
619 if (bitmap & (1 << unit))
620 isp->isp_confopts &= ~ISP_CFG_FULL_DUPLEX;
622 if (getenv_int("isp_nport", &bitmap)) {
623 if (bitmap & (1 << unit))
624 isp->isp_confopts |= ISP_CFG_NPORT;
628 * Because the resource_*_value functions can neither return
629 * 64 bit integer values, nor can they be directly coerced
630 * to interpret the right hand side of the assignment as
631 * you want them to interpret it, we have to force WWN
632 * hint replacement to specify WWN strings with a leading
633 * 'w' (e..g w50000000aaaa0001). Sigh.
635 if (getenv_quad("isp_portwwn", &wwn)) {
636 isp->isp_osinfo.default_port_wwn = wwn;
637 isp->isp_confopts |= ISP_CFG_OWNWWPN;
639 if (isp->isp_osinfo.default_port_wwn == 0) {
640 isp->isp_osinfo.default_port_wwn = 0x400000007F000009ull;
643 if (getenv_quad("isp_nodewwn", &wwn)) {
644 isp->isp_osinfo.default_node_wwn = wwn;
645 isp->isp_confopts |= ISP_CFG_OWNWWNN;
647 if (isp->isp_osinfo.default_node_wwn == 0) {
648 isp->isp_osinfo.default_node_wwn = 0x400000007F000009ull;
652 (void) getenv_int("isp_debug", &isp_debug);
653 if (bus_setup_intr(dev, irq, INTR_TYPE_CAM, isp_pci_intr,
655 device_printf(dev, "could not setup interrupt\n");
659 #ifdef ISP_FW_CRASH_DUMP
661 if (getenv_int("isp_fw_dump_enable", &bitmap)) {
662 if (bitmap & (1 << unit) {
665 amt = QLA2200_RISC_IMAGE_DUMP_SIZE;
666 } else if (IS_23XX(isp)) {
667 amt = QLA2300_RISC_IMAGE_DUMP_SIZE;
670 FCPARAM(isp)->isp_dump_data =
671 malloc(amt, M_DEVBUF, M_WAITOK);
672 bzero(FCPARAM(isp)->isp_dump_data, amt);
675 "f/w crash dumps not supported for card\n");
682 isp->isp_port = pci_get_function(dev);
686 * Set up logging levels.
689 isp->isp_dblev = isp_debug;
691 isp->isp_dblev = ISP_LOGWARN|ISP_LOGERR;
694 isp->isp_dblev |= ISP_LOGCONFIG|ISP_LOGINFO;
697 * Make sure we're in reset state.
702 if (isp->isp_state != ISP_RESETSTATE) {
707 if (isp->isp_state != ISP_INITSTATE) {
708 /* If we're a Fibre Channel Card, we allow deferred attach */
716 if (isp->isp_state != ISP_RUNSTATE) {
717 /* If we're a Fibre Channel Card, we allow deferred attach */
725 * XXXX: Here is where we might unload the f/w module
726 * XXXX: (or decrease the reference count to it).
733 if (pcs && pcs->ih) {
734 (void) bus_teardown_intr(dev, irq, pcs->ih);
738 (void) bus_release_resource(dev, SYS_RES_IRQ, iqd, irq);
743 (void) bus_release_resource(dev, rtp, rgd, regs);
747 if (pcs->pci_isp.isp_param)
748 free(pcs->pci_isp.isp_param, M_DEVBUF);
753 * XXXX: Here is where we might unload the f/w module
754 * XXXX: (or decrease the reference count to it).
760 isp_pci_intr(void *arg)
762 struct ispsoftc *isp = arg;
763 u_int16_t isr, sema, mbox;
767 if (ISP_READ_ISR(isp, &isr, &sema, &mbox) == 0) {
770 int iok = isp->isp_osinfo.intsok;
771 isp->isp_osinfo.intsok = 0;
772 isp_intr(isp, isr, sema, mbox);
773 isp->isp_osinfo.intsok = iok;
779 #define IspVirt2Off(a, x) \
780 (((struct isp_pcisoftc *)a)->pci_poff[((x) & _BLK_REG_MASK) >> \
781 _BLK_REG_SHFT] + ((x) & 0xff))
783 #define BXR2(pcs, off) \
784 bus_space_read_2(pcs->pci_st, pcs->pci_sh, off)
785 #define BXW2(pcs, off, v) \
786 bus_space_write_2(pcs->pci_st, pcs->pci_sh, off, v)
790 isp_pci_rd_debounced(struct ispsoftc *isp, int off, u_int16_t *rp)
792 struct isp_pcisoftc *pcs = (struct isp_pcisoftc *) isp;
793 u_int16_t val0, val1;
797 val0 = BXR2(pcs, IspVirt2Off(isp, off));
798 val1 = BXR2(pcs, IspVirt2Off(isp, off));
799 } while (val0 != val1 && ++i < 1000);
808 isp_pci_rd_isr(struct ispsoftc *isp, u_int16_t *isrp,
809 u_int16_t *semap, u_int16_t *mbp)
811 struct isp_pcisoftc *pcs = (struct isp_pcisoftc *) isp;
815 if (isp_pci_rd_debounced(isp, BIU_ISR, &isr)) {
818 if (isp_pci_rd_debounced(isp, BIU_SEMA, &sema)) {
822 isr = BXR2(pcs, IspVirt2Off(isp, BIU_ISR));
823 sema = BXR2(pcs, IspVirt2Off(isp, BIU_SEMA));
825 isp_prt(isp, ISP_LOGDEBUG3, "ISR 0x%x SEMA 0x%x", isr, sema);
826 isr &= INT_PENDING_MASK(isp);
827 sema &= BIU_SEMA_LOCK;
828 if (isr == 0 && sema == 0) {
832 if ((*semap = sema) != 0) {
834 if (isp_pci_rd_debounced(isp, OUTMAILBOX0, mbp)) {
838 *mbp = BXR2(pcs, IspVirt2Off(isp, OUTMAILBOX0));
845 isp_pci_rd_isr_2300(struct ispsoftc *isp, u_int16_t *isrp,
846 u_int16_t *semap, u_int16_t *mbox0p)
848 struct isp_pcisoftc *pcs = (struct isp_pcisoftc *) isp;
851 if (!(BXR2(pcs, IspVirt2Off(isp, BIU_ISR) & BIU2100_ISR_RISC_INT))) {
855 r2hisr = bus_space_read_4(pcs->pci_st, pcs->pci_sh,
856 IspVirt2Off(pcs, BIU_R2HSTSLO));
857 isp_prt(isp, ISP_LOGDEBUG3, "RISC2HOST ISR 0x%x", r2hisr);
858 if ((r2hisr & BIU_R2HST_INTR) == 0) {
862 switch (r2hisr & BIU_R2HST_ISTAT_MASK) {
863 case ISPR2HST_ROM_MBX_OK:
864 case ISPR2HST_ROM_MBX_FAIL:
865 case ISPR2HST_MBX_OK:
866 case ISPR2HST_MBX_FAIL:
867 case ISPR2HST_ASYNC_EVENT:
868 *isrp = r2hisr & 0xffff;
869 *mbox0p = (r2hisr >> 16);
872 case ISPR2HST_RIO_16:
873 *isrp = r2hisr & 0xffff;
874 *mbox0p = ASYNC_RIO1;
878 *isrp = r2hisr & 0xffff;
879 *mbox0p = ASYNC_CMD_CMPLT;
882 case ISPR2HST_FPOST_CTIO:
883 *isrp = r2hisr & 0xffff;
884 *mbox0p = ASYNC_CTIO_DONE;
887 case ISPR2HST_RSPQ_UPDATE:
888 *isrp = r2hisr & 0xffff;
898 isp_pci_rd_reg(struct ispsoftc *isp, int regoff)
901 struct isp_pcisoftc *pcs = (struct isp_pcisoftc *) isp;
904 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
906 * We will assume that someone has paused the RISC processor.
908 oldconf = BXR2(pcs, IspVirt2Off(isp, BIU_CONF1));
909 BXW2(pcs, IspVirt2Off(isp, BIU_CONF1),
910 oldconf | BIU_PCI_CONF1_SXP);
912 rv = BXR2(pcs, IspVirt2Off(isp, regoff));
913 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
914 BXW2(pcs, IspVirt2Off(isp, BIU_CONF1), oldconf);
920 isp_pci_wr_reg(struct ispsoftc *isp, int regoff, u_int16_t val)
922 struct isp_pcisoftc *pcs = (struct isp_pcisoftc *) isp;
925 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
927 * We will assume that someone has paused the RISC processor.
929 oldconf = BXR2(pcs, IspVirt2Off(isp, BIU_CONF1));
930 BXW2(pcs, IspVirt2Off(isp, BIU_CONF1),
931 oldconf | BIU_PCI_CONF1_SXP);
933 BXW2(pcs, IspVirt2Off(isp, regoff), val);
934 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
935 BXW2(pcs, IspVirt2Off(isp, BIU_CONF1), oldconf);
940 isp_pci_rd_reg_1080(struct ispsoftc *isp, int regoff)
942 u_int16_t rv, oc = 0;
943 struct isp_pcisoftc *pcs = (struct isp_pcisoftc *) isp;
945 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK ||
946 (regoff & _BLK_REG_MASK) == (SXP_BLOCK|SXP_BANK1_SELECT)) {
949 * We will assume that someone has paused the RISC processor.
951 oc = BXR2(pcs, IspVirt2Off(isp, BIU_CONF1));
952 tc = oc & ~BIU_PCI1080_CONF1_DMA;
953 if (regoff & SXP_BANK1_SELECT)
954 tc |= BIU_PCI1080_CONF1_SXP1;
956 tc |= BIU_PCI1080_CONF1_SXP0;
957 BXW2(pcs, IspVirt2Off(isp, BIU_CONF1), tc);
958 } else if ((regoff & _BLK_REG_MASK) == DMA_BLOCK) {
959 oc = BXR2(pcs, IspVirt2Off(isp, BIU_CONF1));
960 BXW2(pcs, IspVirt2Off(isp, BIU_CONF1),
961 oc | BIU_PCI1080_CONF1_DMA);
963 rv = BXR2(pcs, IspVirt2Off(isp, regoff));
965 BXW2(pcs, IspVirt2Off(isp, BIU_CONF1), oc);
971 isp_pci_wr_reg_1080(struct ispsoftc *isp, int regoff, u_int16_t val)
973 struct isp_pcisoftc *pcs = (struct isp_pcisoftc *) isp;
976 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK ||
977 (regoff & _BLK_REG_MASK) == (SXP_BLOCK|SXP_BANK1_SELECT)) {
980 * We will assume that someone has paused the RISC processor.
982 oc = BXR2(pcs, IspVirt2Off(isp, BIU_CONF1));
983 tc = oc & ~BIU_PCI1080_CONF1_DMA;
984 if (regoff & SXP_BANK1_SELECT)
985 tc |= BIU_PCI1080_CONF1_SXP1;
987 tc |= BIU_PCI1080_CONF1_SXP0;
988 BXW2(pcs, IspVirt2Off(isp, BIU_CONF1), tc);
989 } else if ((regoff & _BLK_REG_MASK) == DMA_BLOCK) {
990 oc = BXR2(pcs, IspVirt2Off(isp, BIU_CONF1));
991 BXW2(pcs, IspVirt2Off(isp, BIU_CONF1),
992 oc | BIU_PCI1080_CONF1_DMA);
994 BXW2(pcs, IspVirt2Off(isp, regoff), val);
996 BXW2(pcs, IspVirt2Off(isp, BIU_CONF1), oc);
1002 struct ispsoftc *isp;
1006 static void imc(void *, bus_dma_segment_t *, int, int);
1009 imc(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1011 struct imush *imushp = (struct imush *) arg;
1013 imushp->error = error;
1015 struct ispsoftc *isp =imushp->isp;
1016 bus_addr_t addr = segs->ds_addr;
1018 isp->isp_rquest_dma = addr;
1019 addr += ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(isp));
1020 isp->isp_result_dma = addr;
1022 addr += ISP_QUEUE_SIZE(RESULT_QUEUE_LEN(isp));
1023 FCPARAM(isp)->isp_scdma = addr;
1029 * Should be BUS_SPACE_MAXSIZE, but MAXPHYS is larger than BUS_SPACE_MAXSIZE
1031 #define ISP_NSEGS ((MAXPHYS / PAGE_SIZE) + 1)
1034 isp_pci_mbxdma(struct ispsoftc *isp)
1036 struct isp_pcisoftc *pcs = (struct isp_pcisoftc *)isp;
1040 bus_size_t alim, slim;
1044 * Already been here? If so, leave...
1046 if (isp->isp_rquest) {
1050 #ifdef ISP_DAC_SUPPORTED
1051 alim = BUS_SPACE_UNRESTRICTED;
1053 alim = BUS_SPACE_MAXADDR_32BIT;
1055 if (IS_ULTRA2(isp) || IS_FC(isp) || IS_1240(isp)) {
1056 slim = BUS_SPACE_MAXADDR_32BIT;
1058 slim = BUS_SPACE_MAXADDR_24BIT;
1062 if (bus_dma_tag_create(NULL, 1, slim+1, alim, alim,
1063 NULL, NULL, BUS_SPACE_MAXSIZE, ISP_NSEGS, slim, 0, &pcs->dmat)) {
1064 isp_prt(isp, ISP_LOGERR, "could not create master dma tag");
1070 len = sizeof (XS_T **) * isp->isp_maxcmds;
1071 isp->isp_xflist = (XS_T **) malloc(len, M_DEVBUF, M_WAITOK | M_ZERO);
1072 if (isp->isp_xflist == NULL) {
1073 isp_prt(isp, ISP_LOGERR, "cannot alloc xflist array");
1077 len = sizeof (bus_dmamap_t) * isp->isp_maxcmds;
1078 pcs->dmaps = (bus_dmamap_t *) malloc(len, M_DEVBUF, M_WAITOK);
1079 if (pcs->dmaps == NULL) {
1080 isp_prt(isp, ISP_LOGERR, "can't alloc dma map storage");
1081 free(isp->isp_xflist, M_DEVBUF);
1087 * Allocate and map the request, result queues, plus FC scratch area.
1089 len = ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(isp));
1090 len += ISP_QUEUE_SIZE(RESULT_QUEUE_LEN(isp));
1092 len += ISP2100_SCRLEN;
1095 ns = (len / PAGE_SIZE) + 1;
1096 if (bus_dma_tag_create(pcs->dmat, QENTRY_LEN, slim+1, alim, alim,
1097 NULL, NULL, len, ns, slim, 0, &isp->isp_cdmat)) {
1098 isp_prt(isp, ISP_LOGERR,
1099 "cannot create a dma tag for control spaces");
1100 free(pcs->dmaps, M_DEVBUF);
1101 free(isp->isp_xflist, M_DEVBUF);
1106 if (bus_dmamem_alloc(isp->isp_cdmat, (void **)&base, BUS_DMA_NOWAIT,
1107 &isp->isp_cdmap) != 0) {
1108 isp_prt(isp, ISP_LOGERR,
1109 "cannot allocate %d bytes of CCB memory", len);
1110 bus_dma_tag_destroy(isp->isp_cdmat);
1111 free(isp->isp_xflist, M_DEVBUF);
1112 free(pcs->dmaps, M_DEVBUF);
1117 for (i = 0; i < isp->isp_maxcmds; i++) {
1118 error = bus_dmamap_create(pcs->dmat, 0, &pcs->dmaps[i]);
1120 isp_prt(isp, ISP_LOGERR,
1121 "error %d creating per-cmd DMA maps", error);
1123 bus_dmamap_destroy(pcs->dmat, pcs->dmaps[i]);
1131 bus_dmamap_load(isp->isp_cdmat, isp->isp_cdmap, base, len, imc, &im, 0);
1133 isp_prt(isp, ISP_LOGERR,
1134 "error %d loading dma map for control areas", im.error);
1138 isp->isp_rquest = base;
1139 base += ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(isp));
1140 isp->isp_result = base;
1142 base += ISP_QUEUE_SIZE(RESULT_QUEUE_LEN(isp));
1143 FCPARAM(isp)->isp_scratch = base;
1149 bus_dmamem_free(isp->isp_cdmat, base, isp->isp_cdmap);
1150 bus_dma_tag_destroy(isp->isp_cdmat);
1151 free(isp->isp_xflist, M_DEVBUF);
1152 free(pcs->dmaps, M_DEVBUF);
1154 isp->isp_rquest = NULL;
1159 struct ispsoftc *isp;
1167 #define MUSHERR_NOQENTRIES -2
1169 #ifdef ISP_TARGET_MODE
1171 * We need to handle DMA for target mode differently from initiator mode.
1173 * DMA mapping and construction and submission of CTIO Request Entries
1174 * and rendevous for completion are very tightly coupled because we start
1175 * out by knowing (per platform) how much data we have to move, but we
1176 * don't know, up front, how many DMA mapping segments will have to be used
1177 * cover that data, so we don't know how many CTIO Request Entries we
1178 * will end up using. Further, for performance reasons we may want to
1179 * (on the last CTIO for Fibre Channel), send status too (if all went well).
1181 * The standard vector still goes through isp_pci_dmasetup, but the callback
1182 * for the DMA mapping routines comes here instead with the whole transfer
1183 * mapped and a pointer to a partially filled in already allocated request
1184 * queue entry. We finish the job.
1186 static void tdma_mk(void *, bus_dma_segment_t *, int, int);
1187 static void tdma_mkfc(void *, bus_dma_segment_t *, int, int);
1189 #define STATUS_WITH_DATA 1
1192 tdma_mk(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
1195 struct ccb_scsiio *csio;
1196 struct ispsoftc *isp;
1197 struct isp_pcisoftc *pcs;
1199 ct_entry_t *cto, *qe;
1200 u_int8_t scsi_status;
1201 u_int16_t curi, nxti, handle;
1204 int nth_ctio, nctios, send_status;
1206 mp = (mush_t *) arg;
1213 csio = mp->cmd_token;
1215 curi = isp->isp_reqidx;
1216 qe = (ct_entry_t *) ISP_QUEUE_ENTRY(isp->isp_rquest, curi);
1219 cto->ct_seg_count = 0;
1220 cto->ct_header.rqs_entry_count = 1;
1221 MEMZERO(cto->ct_dataseg, sizeof(cto->ct_dataseg));
1224 cto->ct_header.rqs_seqno = 1;
1225 isp_prt(isp, ISP_LOGTDEBUG1,
1226 "CTIO[%x] lun%d iid%d tag %x flgs %x sts %x ssts %x res %d",
1227 cto->ct_fwhandle, csio->ccb_h.target_lun, cto->ct_iid,
1228 cto->ct_tag_val, cto->ct_flags, cto->ct_status,
1229 cto->ct_scsi_status, cto->ct_resid);
1230 ISP_TDQE(isp, "tdma_mk[no data]", curi, cto);
1231 isp_put_ctio(isp, cto, qe);
1235 nctios = nseg / ISP_RQDSEG;
1236 if (nseg % ISP_RQDSEG) {
1241 * Save syshandle, and potentially any SCSI status, which we'll
1242 * reinsert on the last CTIO we're going to send.
1245 handle = cto->ct_syshandle;
1246 cto->ct_syshandle = 0;
1247 cto->ct_header.rqs_seqno = 0;
1248 send_status = (cto->ct_flags & CT_SENDSTATUS) != 0;
1251 sflags = cto->ct_flags & (CT_SENDSTATUS | CT_CCINCR);
1252 cto->ct_flags &= ~(CT_SENDSTATUS | CT_CCINCR);
1254 * Preserve residual.
1256 resid = cto->ct_resid;
1259 * Save actual SCSI status.
1261 scsi_status = cto->ct_scsi_status;
1263 #ifndef STATUS_WITH_DATA
1264 sflags |= CT_NO_DATA;
1266 * We can't do a status at the same time as a data CTIO, so
1267 * we need to synthesize an extra CTIO at this level.
1272 sflags = scsi_status = resid = 0;
1276 cto->ct_scsi_status = 0;
1278 pcs = (struct isp_pcisoftc *)isp;
1279 dp = &pcs->dmaps[isp_handle_index(handle)];
1280 if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) {
1281 bus_dmamap_sync(pcs->dmat, *dp, BUS_DMASYNC_PREREAD);
1283 bus_dmamap_sync(pcs->dmat, *dp, BUS_DMASYNC_PREWRITE);
1288 for (nth_ctio = 0; nth_ctio < nctios; nth_ctio++) {
1295 if (seglim > ISP_RQDSEG)
1296 seglim = ISP_RQDSEG;
1298 for (seg = 0; seg < seglim; seg++, nseg--) {
1300 * Unlike normal initiator commands, we don't
1301 * do any swizzling here.
1303 cto->ct_dataseg[seg].ds_count = dm_segs->ds_len;
1304 cto->ct_dataseg[seg].ds_base = dm_segs->ds_addr;
1305 cto->ct_xfrlen += dm_segs->ds_len;
1308 cto->ct_seg_count = seg;
1311 * This case should only happen when we're sending an
1312 * extra CTIO with final status.
1314 if (send_status == 0) {
1315 isp_prt(isp, ISP_LOGWARN,
1316 "tdma_mk ran out of segments");
1323 * At this point, the fields ct_lun, ct_iid, ct_tagval,
1324 * ct_tagtype, and ct_timeout have been carried over
1325 * unchanged from what our caller had set.
1327 * The dataseg fields and the seg_count fields we just got
1328 * through setting. The data direction we've preserved all
1329 * along and only clear it if we're now sending status.
1332 if (nth_ctio == nctios - 1) {
1334 * We're the last in a sequence of CTIOs, so mark
1335 * this CTIO and save the handle to the CCB such that
1336 * when this CTIO completes we can free dma resources
1337 * and do whatever else we need to do to finish the
1338 * rest of the command. We *don't* give this to the
1339 * firmware to work on- the caller will do that.
1342 cto->ct_syshandle = handle;
1343 cto->ct_header.rqs_seqno = 1;
1346 cto->ct_scsi_status = scsi_status;
1347 cto->ct_flags |= sflags;
1348 cto->ct_resid = resid;
1351 isp_prt(isp, ISP_LOGTDEBUG1,
1352 "CTIO[%x] lun%d iid %d tag %x ct_flags %x "
1353 "scsi status %x resid %d",
1354 cto->ct_fwhandle, csio->ccb_h.target_lun,
1355 cto->ct_iid, cto->ct_tag_val, cto->ct_flags,
1356 cto->ct_scsi_status, cto->ct_resid);
1358 isp_prt(isp, ISP_LOGTDEBUG1,
1359 "CTIO[%x] lun%d iid%d tag %x ct_flags 0x%x",
1360 cto->ct_fwhandle, csio->ccb_h.target_lun,
1361 cto->ct_iid, cto->ct_tag_val,
1364 isp_put_ctio(isp, cto, qe);
1365 ISP_TDQE(isp, "last tdma_mk", curi, cto);
1367 MEMORYBARRIER(isp, SYNC_REQUEST,
1371 ct_entry_t *oqe = qe;
1374 * Make sure syshandle fields are clean
1376 cto->ct_syshandle = 0;
1377 cto->ct_header.rqs_seqno = 0;
1379 isp_prt(isp, ISP_LOGTDEBUG1,
1380 "CTIO[%x] lun%d for ID%d ct_flags 0x%x",
1381 cto->ct_fwhandle, csio->ccb_h.target_lun,
1382 cto->ct_iid, cto->ct_flags);
1388 ISP_QUEUE_ENTRY(isp->isp_rquest, nxti);
1389 nxti = ISP_NXT_QENTRY(nxti, RQUEST_QUEUE_LEN(isp));
1390 if (nxti == mp->optr) {
1391 isp_prt(isp, ISP_LOGTDEBUG0,
1392 "Queue Overflow in tdma_mk");
1393 mp->error = MUSHERR_NOQENTRIES;
1398 * Now that we're done with the old CTIO,
1399 * flush it out to the request queue.
1401 ISP_TDQE(isp, "dma_tgt_fc", curi, cto);
1402 isp_put_ctio(isp, cto, oqe);
1403 if (nth_ctio != 0) {
1404 MEMORYBARRIER(isp, SYNC_REQUEST, curi,
1407 curi = ISP_NXT_QENTRY(curi, RQUEST_QUEUE_LEN(isp));
1410 * Reset some fields in the CTIO so we can reuse
1411 * for the next one we'll flush to the request
1414 cto->ct_header.rqs_entry_type = RQSTYPE_CTIO;
1415 cto->ct_header.rqs_entry_count = 1;
1416 cto->ct_header.rqs_flags = 0;
1418 cto->ct_scsi_status = 0;
1421 cto->ct_seg_count = 0;
1422 MEMZERO(cto->ct_dataseg, sizeof(cto->ct_dataseg));
1429 * We don't have to do multiple CTIOs here. Instead, we can just do
1430 * continuation segments as needed. This greatly simplifies the code
1431 * improves performance.
1435 tdma_mkfc(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
1438 struct ccb_scsiio *csio;
1439 struct ispsoftc *isp;
1440 ct2_entry_t *cto, *qe;
1441 u_int16_t curi, nxti;
1444 mp = (mush_t *) arg;
1451 csio = mp->cmd_token;
1454 curi = isp->isp_reqidx;
1455 qe = (ct2_entry_t *) ISP_QUEUE_ENTRY(isp->isp_rquest, curi);
1458 if ((cto->ct_flags & CT2_FLAG_MMASK) != CT2_FLAG_MODE1) {
1459 isp_prt(isp, ISP_LOGWARN,
1460 "dma2_tgt_fc, a status CTIO2 without MODE1 "
1461 "set (0x%x)", cto->ct_flags);
1466 * We preserve ct_lun, ct_iid, ct_rxid. We set the data
1467 * flags to NO DATA and clear relative offset flags.
1468 * We preserve the ct_resid and the response area.
1470 cto->ct_header.rqs_seqno = 1;
1471 cto->ct_seg_count = 0;
1473 isp_prt(isp, ISP_LOGTDEBUG1,
1474 "CTIO2[%x] lun %d->iid%d flgs 0x%x sts 0x%x ssts "
1475 "0x%x res %d", cto->ct_rxid, csio->ccb_h.target_lun,
1476 cto->ct_iid, cto->ct_flags, cto->ct_status,
1477 cto->rsp.m1.ct_scsi_status, cto->ct_resid);
1478 isp_put_ctio2(isp, cto, qe);
1479 ISP_TDQE(isp, "dma2_tgt_fc[no data]", curi, qe);
1483 if ((cto->ct_flags & CT2_FLAG_MMASK) != CT2_FLAG_MODE0) {
1484 isp_prt(isp, ISP_LOGERR,
1485 "dma2_tgt_fc, a data CTIO2 without MODE0 set "
1486 "(0x%x)", cto->ct_flags);
1495 * Set up the CTIO2 data segments.
1497 for (segcnt = 0; cto->ct_seg_count < ISP_RQDSEG_T2 && segcnt < nseg;
1498 cto->ct_seg_count++, segcnt++) {
1499 cto->rsp.m0.ct_dataseg[cto->ct_seg_count].ds_base =
1500 dm_segs[segcnt].ds_addr;
1501 cto->rsp.m0.ct_dataseg[cto->ct_seg_count].ds_count =
1502 dm_segs[segcnt].ds_len;
1503 cto->rsp.m0.ct_xfrlen += dm_segs[segcnt].ds_len;
1504 isp_prt(isp, ISP_LOGTDEBUG1, "isp_send_ctio2: ent0[%d]0x%x:%d",
1505 cto->ct_seg_count, dm_segs[segcnt].ds_addr,
1506 dm_segs[segcnt].ds_len);
1509 while (segcnt < nseg) {
1512 ispcontreq_t local, *crq = &local, *qep;
1514 qep = (ispcontreq_t *) ISP_QUEUE_ENTRY(isp->isp_rquest, nxti);
1516 nxti = ISP_NXT_QENTRY(curip, RQUEST_QUEUE_LEN(isp));
1517 if (nxti == mp->optr) {
1519 isp_prt(isp, ISP_LOGTDEBUG0,
1520 "tdma_mkfc: request queue overflow");
1521 mp->error = MUSHERR_NOQENTRIES;
1524 cto->ct_header.rqs_entry_count++;
1525 MEMZERO((void *)crq, sizeof (*crq));
1526 crq->req_header.rqs_entry_count = 1;
1527 crq->req_header.rqs_entry_type = RQSTYPE_DATASEG;
1528 for (seg = 0; segcnt < nseg && seg < ISP_CDSEG;
1530 crq->req_dataseg[seg].ds_base = dm_segs[segcnt].ds_addr;
1531 crq->req_dataseg[seg].ds_count = dm_segs[segcnt].ds_len;
1532 isp_prt(isp, ISP_LOGTDEBUG1,
1533 "isp_send_ctio2: ent%d[%d]%x:%u",
1534 cto->ct_header.rqs_entry_count-1, seg,
1535 dm_segs[segcnt].ds_addr, dm_segs[segcnt].ds_len);
1536 cto->rsp.m0.ct_xfrlen += dm_segs[segcnt].ds_len;
1537 cto->ct_seg_count++;
1539 MEMORYBARRIER(isp, SYNC_REQUEST, curip, QENTRY_LEN);
1540 isp_put_cont_req(isp, crq, qep);
1541 ISP_TDQE(isp, "cont entry", curi, qep);
1545 * No do final twiddling for the CTIO itself.
1547 cto->ct_header.rqs_seqno = 1;
1548 isp_prt(isp, ISP_LOGTDEBUG1,
1549 "CTIO2[%x] lun %d->iid%d flgs 0x%x sts 0x%x ssts 0x%x resid %d",
1550 cto->ct_rxid, csio->ccb_h.target_lun, (int) cto->ct_iid,
1551 cto->ct_flags, cto->ct_status, cto->rsp.m1.ct_scsi_status,
1553 isp_put_ctio2(isp, cto, qe);
1554 ISP_TDQE(isp, "last dma2_tgt_fc", curi, qe);
1559 static void dma2(void *, bus_dma_segment_t *, int, int);
1562 dma2(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
1565 struct ispsoftc *isp;
1566 struct ccb_scsiio *csio;
1567 struct isp_pcisoftc *pcs;
1569 bus_dma_segment_t *eseg;
1571 int seglim, datalen;
1574 mp = (mush_t *) arg;
1581 isp_prt(mp->isp, ISP_LOGERR, "bad segment count (%d)", nseg);
1585 csio = mp->cmd_token;
1588 pcs = (struct isp_pcisoftc *)mp->isp;
1589 dp = &pcs->dmaps[isp_handle_index(rq->req_handle)];
1592 if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) {
1593 bus_dmamap_sync(pcs->dmat, *dp, BUS_DMASYNC_PREREAD);
1595 bus_dmamap_sync(pcs->dmat, *dp, BUS_DMASYNC_PREWRITE);
1598 datalen = XS_XFRLEN(csio);
1601 * We're passed an initial partially filled in entry that
1602 * has most fields filled in except for data transfer
1605 * Our job is to fill in the initial request queue entry and
1606 * then to start allocating and filling in continuation entries
1607 * until we've covered the entire transfer.
1611 seglim = ISP_RQDSEG_T2;
1612 ((ispreqt2_t *)rq)->req_totalcnt = datalen;
1613 if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) {
1614 ((ispreqt2_t *)rq)->req_flags |= REQFLAG_DATA_IN;
1616 ((ispreqt2_t *)rq)->req_flags |= REQFLAG_DATA_OUT;
1619 if (csio->cdb_len > 12) {
1622 seglim = ISP_RQDSEG;
1624 if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) {
1625 rq->req_flags |= REQFLAG_DATA_IN;
1627 rq->req_flags |= REQFLAG_DATA_OUT;
1631 eseg = dm_segs + nseg;
1633 while (datalen != 0 && rq->req_seg_count < seglim && dm_segs != eseg) {
1635 ispreqt2_t *rq2 = (ispreqt2_t *)rq;
1636 rq2->req_dataseg[rq2->req_seg_count].ds_base =
1638 rq2->req_dataseg[rq2->req_seg_count].ds_count =
1641 rq->req_dataseg[rq->req_seg_count].ds_base =
1643 rq->req_dataseg[rq->req_seg_count].ds_count =
1646 datalen -= dm_segs->ds_len;
1647 rq->req_seg_count++;
1651 while (datalen > 0 && dm_segs != eseg) {
1653 ispcontreq_t local, *crq = &local, *cqe;
1655 cqe = (ispcontreq_t *) ISP_QUEUE_ENTRY(isp->isp_rquest, nxti);
1657 nxti = ISP_NXT_QENTRY(onxti, RQUEST_QUEUE_LEN(isp));
1658 if (nxti == mp->optr) {
1659 isp_prt(isp, ISP_LOGDEBUG0, "Request Queue Overflow++");
1660 mp->error = MUSHERR_NOQENTRIES;
1663 rq->req_header.rqs_entry_count++;
1664 MEMZERO((void *)crq, sizeof (*crq));
1665 crq->req_header.rqs_entry_count = 1;
1666 crq->req_header.rqs_entry_type = RQSTYPE_DATASEG;
1669 while (datalen > 0 && seglim < ISP_CDSEG && dm_segs != eseg) {
1670 crq->req_dataseg[seglim].ds_base =
1672 crq->req_dataseg[seglim].ds_count =
1674 rq->req_seg_count++;
1677 datalen -= dm_segs->ds_len;
1679 isp_put_cont_req(isp, crq, cqe);
1680 MEMORYBARRIER(isp, SYNC_REQUEST, onxti, QENTRY_LEN);
1686 isp_pci_dmasetup(struct ispsoftc *isp, struct ccb_scsiio *csio, ispreq_t *rq,
1687 u_int16_t *nxtip, u_int16_t optr)
1689 struct isp_pcisoftc *pcs = (struct isp_pcisoftc *)isp;
1691 bus_dmamap_t *dp = NULL;
1693 void (*eptr)(void *, bus_dma_segment_t *, int, int);
1695 qep = (ispreq_t *) ISP_QUEUE_ENTRY(isp->isp_rquest, isp->isp_reqidx);
1696 #ifdef ISP_TARGET_MODE
1697 if (csio->ccb_h.func_code == XPT_CONT_TARGET_IO) {
1703 if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_NONE ||
1704 (csio->dxfer_len == 0)) {
1707 mp->cmd_token = csio;
1708 mp->rq = rq; /* really a ct_entry_t or ct2_entry_t */
1712 (*eptr)(mp, NULL, 0, 0);
1720 if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_NONE ||
1721 (csio->dxfer_len == 0)) {
1722 rq->req_seg_count = 1;
1727 * Do a virtual grapevine step to collect info for
1728 * the callback dma allocation that we have to use...
1732 mp->cmd_token = csio;
1738 if ((csio->ccb_h.flags & CAM_SCATTER_VALID) == 0) {
1739 if ((csio->ccb_h.flags & CAM_DATA_PHYS) == 0) {
1741 dp = &pcs->dmaps[isp_handle_index(rq->req_handle)];
1743 error = bus_dmamap_load(pcs->dmat, *dp,
1744 csio->data_ptr, csio->dxfer_len, eptr, mp, 0);
1745 if (error == EINPROGRESS) {
1746 bus_dmamap_unload(pcs->dmat, *dp);
1748 isp_prt(isp, ISP_LOGERR,
1749 "deferred dma allocation not supported");
1750 } else if (error && mp->error == 0) {
1752 isp_prt(isp, ISP_LOGERR,
1753 "error %d in dma mapping code", error);
1759 /* Pointer to physical buffer */
1760 struct bus_dma_segment seg;
1761 seg.ds_addr = (bus_addr_t)csio->data_ptr;
1762 seg.ds_len = csio->dxfer_len;
1763 (*eptr)(mp, &seg, 1, 0);
1766 struct bus_dma_segment *segs;
1768 if ((csio->ccb_h.flags & CAM_DATA_PHYS) != 0) {
1769 isp_prt(isp, ISP_LOGERR,
1770 "Physical segment pointers unsupported");
1772 } else if ((csio->ccb_h.flags & CAM_SG_LIST_PHYS) == 0) {
1773 isp_prt(isp, ISP_LOGERR,
1774 "Virtual segment addresses unsupported");
1777 /* Just use the segments provided */
1778 segs = (struct bus_dma_segment *) csio->data_ptr;
1779 (*eptr)(mp, segs, csio->sglist_cnt, 0);
1783 int retval = CMD_COMPLETE;
1784 if (mp->error == MUSHERR_NOQENTRIES) {
1785 retval = CMD_EAGAIN;
1786 } else if (mp->error == EFBIG) {
1787 XS_SETERR(csio, CAM_REQ_TOO_BIG);
1788 } else if (mp->error == EINVAL) {
1789 XS_SETERR(csio, CAM_REQ_INVALID);
1791 XS_SETERR(csio, CAM_UNREC_HBA_ERROR);
1796 switch (rq->req_header.rqs_entry_type) {
1797 case RQSTYPE_REQUEST:
1798 isp_put_request(isp, rq, qep);
1800 case RQSTYPE_CMDONLY:
1801 isp_put_extended_request(isp, (ispextreq_t *)rq,
1802 (ispextreq_t *)qep);
1805 isp_put_request_t2(isp, (ispreqt2_t *) rq, (ispreqt2_t *) qep);
1808 return (CMD_QUEUED);
1812 isp_pci_dmateardown(struct ispsoftc *isp, XS_T *xs, u_int16_t handle)
1814 struct isp_pcisoftc *pcs = (struct isp_pcisoftc *)isp;
1815 bus_dmamap_t *dp = &pcs->dmaps[isp_handle_index(handle)];
1816 if ((xs->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) {
1817 bus_dmamap_sync(pcs->dmat, *dp, BUS_DMASYNC_POSTREAD);
1819 bus_dmamap_sync(pcs->dmat, *dp, BUS_DMASYNC_POSTWRITE);
1821 bus_dmamap_unload(pcs->dmat, *dp);
1826 isp_pci_reset1(struct ispsoftc *isp)
1828 /* Make sure the BIOS is disabled */
1829 isp_pci_wr_reg(isp, HCCR, PCI_HCCR_CMD_BIOS);
1830 /* and enable interrupts */
1835 isp_pci_dumpregs(struct ispsoftc *isp, const char *msg)
1837 struct isp_pcisoftc *pcs = (struct isp_pcisoftc *)isp;
1839 printf("%s: %s\n", device_get_nameunit(isp->isp_dev), msg);
1841 printf("%s:\n", device_get_nameunit(isp->isp_dev));
1843 printf(" biu_conf1=%x", ISP_READ(isp, BIU_CONF1));
1845 printf(" biu_csr=%x", ISP_READ(isp, BIU2100_CSR));
1846 printf(" biu_icr=%x biu_isr=%x biu_sema=%x ", ISP_READ(isp, BIU_ICR),
1847 ISP_READ(isp, BIU_ISR), ISP_READ(isp, BIU_SEMA));
1848 printf("risc_hccr=%x\n", ISP_READ(isp, HCCR));
1852 ISP_WRITE(isp, HCCR, HCCR_CMD_PAUSE);
1853 printf(" cdma_conf=%x cdma_sts=%x cdma_fifostat=%x\n",
1854 ISP_READ(isp, CDMA_CONF), ISP_READ(isp, CDMA_STATUS),
1855 ISP_READ(isp, CDMA_FIFO_STS));
1856 printf(" ddma_conf=%x ddma_sts=%x ddma_fifostat=%x\n",
1857 ISP_READ(isp, DDMA_CONF), ISP_READ(isp, DDMA_STATUS),
1858 ISP_READ(isp, DDMA_FIFO_STS));
1859 printf(" sxp_int=%x sxp_gross=%x sxp(scsi_ctrl)=%x\n",
1860 ISP_READ(isp, SXP_INTERRUPT),
1861 ISP_READ(isp, SXP_GROSS_ERR),
1862 ISP_READ(isp, SXP_PINS_CTRL));
1863 ISP_WRITE(isp, HCCR, HCCR_CMD_RELEASE);
1865 printf(" mbox regs: %x %x %x %x %x\n",
1866 ISP_READ(isp, OUTMAILBOX0), ISP_READ(isp, OUTMAILBOX1),
1867 ISP_READ(isp, OUTMAILBOX2), ISP_READ(isp, OUTMAILBOX3),
1868 ISP_READ(isp, OUTMAILBOX4));
1869 printf(" PCI Status Command/Status=%x\n",
1870 pci_read_config(pcs->pci_dev, PCIR_COMMAND, 1));