1 /* $OpenBSD: if_txp.c,v 1.48 2001/06/27 06:34:50 kjc Exp $ */
2 /* $FreeBSD: src/sys/dev/txp/if_txp.c,v 1.4.2.4 2001/12/14 19:50:43 jlemon Exp $ */
3 /* $DragonFly: src/sys/dev/netif/txp/if_txp.c,v 1.43 2007/08/14 13:30:35 sephe Exp $ */
7 * Jason L. Wright <jason@thought.net>, Theo de Raadt, and
8 * Aaron Campbell <aaron@monkey.org>. All rights reserved.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by Jason L. Wright,
21 * Theo de Raadt and Aaron Campbell.
22 * 4. Neither the name of the author nor the names of any co-contributors
23 * may be used to endorse or promote products derived from this software
24 * without specific prior written permission.
26 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
27 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
28 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
36 * THE POSSIBILITY OF SUCH DAMAGE.
40 * Driver for 3c990 (Typhoon) Ethernet ASIC
43 #include <sys/param.h>
44 #include <sys/systm.h>
45 #include <sys/sockio.h>
47 #include <sys/malloc.h>
48 #include <sys/kernel.h>
49 #include <sys/socket.h>
50 #include <sys/serialize.h>
53 #include <sys/thread2.h>
56 #include <net/ifq_var.h>
57 #include <net/if_arp.h>
58 #include <net/ethernet.h>
59 #include <net/if_dl.h>
60 #include <net/if_types.h>
61 #include <net/vlan/if_vlan_var.h>
63 #include <netinet/in.h>
64 #include <netinet/in_systm.h>
65 #include <netinet/in_var.h>
66 #include <netinet/ip.h>
67 #include <netinet/if_ether.h>
68 #include <sys/in_cksum.h>
70 #include <net/if_media.h>
74 #include <vm/vm.h> /* for vtophys */
75 #include <vm/pmap.h> /* for vtophys */
77 #include "../mii_layer/mii.h"
78 #include "../mii_layer/miivar.h"
80 #include <bus/pci/pcidevs.h>
81 #include <bus/pci/pcireg.h>
82 #include <bus/pci/pcivar.h>
84 #define TXP_USEIOSPACE
85 #define __STRICT_ALIGNMENT
87 #include "if_txpreg.h"
91 * Various supported device vendors/types and their names.
93 static struct txp_type txp_devs[] = {
94 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CR990TX95,
95 "3Com 3cR990-TX-95 Etherlink with 3XP Processor" },
96 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CR990TX97,
97 "3Com 3cR990-TX-97 Etherlink with 3XP Processor" },
98 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C990B,
99 "3Com 3cR990B-TXM Etherlink with 3XP Processor" },
100 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CR990SVR95,
101 "3Com 3cR990-SRV-95 Etherlink Server with 3XP Processor" },
102 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CR990SVR97,
103 "3Com 3cR990-SRV-97 Etherlink Server with 3XP Processor" },
104 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C990BSVR,
105 "3Com 3cR990B-SRV Etherlink Server with 3XP Processor" },
109 static int txp_probe (device_t);
110 static int txp_attach (device_t);
111 static int txp_detach (device_t);
112 static void txp_intr (void *);
113 static void txp_tick (void *);
114 static int txp_shutdown (device_t);
115 static int txp_ioctl (struct ifnet *, u_long, caddr_t, struct ucred *);
116 static void txp_start (struct ifnet *);
117 static void txp_stop (struct txp_softc *);
118 static void txp_init (void *);
119 static void txp_watchdog (struct ifnet *);
121 static void txp_release_resources (device_t);
122 static int txp_chip_init (struct txp_softc *);
123 static int txp_reset_adapter (struct txp_softc *);
124 static int txp_download_fw (struct txp_softc *);
125 static int txp_download_fw_wait (struct txp_softc *);
126 static int txp_download_fw_section (struct txp_softc *,
127 struct txp_fw_section_header *, int);
128 static int txp_alloc_rings (struct txp_softc *);
129 static int txp_rxring_fill (struct txp_softc *);
130 static void txp_rxring_empty (struct txp_softc *);
131 static void txp_set_filter (struct txp_softc *);
133 static int txp_cmd_desc_numfree (struct txp_softc *);
134 static int txp_command (struct txp_softc *, u_int16_t, u_int16_t, u_int32_t,
135 u_int32_t, u_int16_t *, u_int32_t *, u_int32_t *, int);
136 static int txp_command2 (struct txp_softc *, u_int16_t, u_int16_t,
137 u_int32_t, u_int32_t, struct txp_ext_desc *, u_int8_t,
138 struct txp_rsp_desc **, int);
139 static int txp_response (struct txp_softc *, u_int32_t, u_int16_t, u_int16_t,
140 struct txp_rsp_desc **);
141 static void txp_rsp_fixup (struct txp_softc *, struct txp_rsp_desc *,
142 struct txp_rsp_desc *);
143 static void txp_capabilities (struct txp_softc *);
145 static void txp_ifmedia_sts (struct ifnet *, struct ifmediareq *);
146 static int txp_ifmedia_upd (struct ifnet *);
148 static void txp_show_descriptor (void *);
150 static void txp_tx_reclaim (struct txp_softc *, struct txp_tx_ring *);
151 static void txp_rxbuf_reclaim (struct txp_softc *);
152 static void txp_rx_reclaim (struct txp_softc *, struct txp_rx_ring *);
154 #ifdef TXP_USEIOSPACE
155 #define TXP_RES SYS_RES_IOPORT
156 #define TXP_RID TXP_PCI_LOIO
158 #define TXP_RES SYS_RES_MEMORY
159 #define TXP_RID TXP_PCI_LOMEM
162 static device_method_t txp_methods[] = {
163 /* Device interface */
164 DEVMETHOD(device_probe, txp_probe),
165 DEVMETHOD(device_attach, txp_attach),
166 DEVMETHOD(device_detach, txp_detach),
167 DEVMETHOD(device_shutdown, txp_shutdown),
171 static driver_t txp_driver = {
174 sizeof(struct txp_softc)
177 static devclass_t txp_devclass;
179 DECLARE_DUMMY_MODULE(if_txp);
180 DRIVER_MODULE(if_txp, pci, txp_driver, txp_devclass, 0, 0);
183 txp_probe(device_t dev)
188 vid = pci_get_vendor(dev);
189 did = pci_get_device(dev);
191 for (t = txp_devs; t->txp_name != NULL; ++t) {
192 if ((vid == t->txp_vid) && (did == t->txp_did)) {
193 device_set_desc(dev, t->txp_name);
202 txp_attach(device_t dev)
204 struct txp_softc *sc;
208 uint8_t enaddr[ETHER_ADDR_LEN];
211 sc = device_get_softc(dev);
212 callout_init(&sc->txp_stat_timer);
214 ifp = &sc->sc_arpcom.ac_if;
215 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
217 pci_enable_busmaster(dev);
220 sc->sc_res = bus_alloc_resource_any(dev, TXP_RES, &rid, RF_ACTIVE);
222 if (sc->sc_res == NULL) {
223 device_printf(dev, "couldn't map ports/memory\n");
227 sc->sc_bt = rman_get_bustag(sc->sc_res);
228 sc->sc_bh = rman_get_bushandle(sc->sc_res);
230 /* Allocate interrupt */
232 sc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
233 RF_SHAREABLE | RF_ACTIVE);
235 if (sc->sc_irq == NULL) {
236 device_printf(dev, "couldn't map interrupt\n");
241 if (txp_chip_init(sc)) {
246 sc->sc_fwbuf = contigmalloc(32768, M_DEVBUF,
247 M_WAITOK, 0, 0xffffffff, PAGE_SIZE, 0);
248 error = txp_download_fw(sc);
249 contigfree(sc->sc_fwbuf, 32768, M_DEVBUF);
255 sc->sc_ldata = contigmalloc(sizeof(struct txp_ldata), M_DEVBUF,
256 M_WAITOK, 0, 0xffffffff, PAGE_SIZE, 0);
257 bzero(sc->sc_ldata, sizeof(struct txp_ldata));
259 if (txp_alloc_rings(sc)) {
264 if (txp_command(sc, TXP_CMD_MAX_PKT_SIZE_WRITE, TXP_MAX_PKTLEN, 0, 0,
265 NULL, NULL, NULL, 1)) {
270 if (txp_command(sc, TXP_CMD_STATION_ADDRESS_READ, 0, 0, 0,
271 &p1, &p2, NULL, 1)) {
278 enaddr[0] = ((uint8_t *)&p1)[1];
279 enaddr[1] = ((uint8_t *)&p1)[0];
280 enaddr[2] = ((uint8_t *)&p2)[3];
281 enaddr[3] = ((uint8_t *)&p2)[2];
282 enaddr[4] = ((uint8_t *)&p2)[1];
283 enaddr[5] = ((uint8_t *)&p2)[0];
285 ifmedia_init(&sc->sc_ifmedia, 0, txp_ifmedia_upd, txp_ifmedia_sts);
286 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T, 0, NULL);
287 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T|IFM_HDX, 0, NULL);
288 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T|IFM_FDX, 0, NULL);
289 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX, 0, NULL);
290 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX|IFM_HDX, 0, NULL);
291 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX|IFM_FDX, 0, NULL);
292 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_AUTO, 0, NULL);
294 sc->sc_xcvr = TXP_XCVR_AUTO;
295 txp_command(sc, TXP_CMD_XCVR_SELECT, TXP_XCVR_AUTO, 0, 0,
296 NULL, NULL, NULL, 0);
297 ifmedia_set(&sc->sc_ifmedia, IFM_ETHER|IFM_AUTO);
300 ifp->if_mtu = ETHERMTU;
301 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
302 ifp->if_ioctl = txp_ioctl;
303 ifp->if_start = txp_start;
304 ifp->if_watchdog = txp_watchdog;
305 ifp->if_init = txp_init;
306 ifp->if_baudrate = 100000000;
307 ifq_set_maxlen(&ifp->if_snd, TX_ENTRIES);
308 ifq_set_ready(&ifp->if_snd);
309 ifp->if_hwassist = 0;
310 txp_capabilities(sc);
312 ether_ifattach(ifp, enaddr, NULL);
314 error = bus_setup_intr(dev, sc->sc_irq, INTR_NETSAFE,
315 txp_intr, sc, &sc->sc_intrhand,
318 device_printf(dev, "couldn't set up irq\n");
326 txp_release_resources(dev);
331 txp_detach(device_t dev)
333 struct txp_softc *sc = device_get_softc(dev);
334 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
337 lwkt_serialize_enter(ifp->if_serializer);
341 bus_teardown_intr(dev, sc->sc_irq, sc->sc_intrhand);
343 lwkt_serialize_exit(ifp->if_serializer);
345 ifmedia_removeall(&sc->sc_ifmedia);
348 for (i = 0; i < RXBUF_ENTRIES; i++)
349 kfree(sc->sc_rxbufs[i].rb_sd, M_DEVBUF);
351 txp_release_resources(dev);
357 txp_release_resources(device_t dev)
359 struct txp_softc *sc;
361 sc = device_get_softc(dev);
363 if (sc->sc_irq != NULL)
364 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq);
366 if (sc->sc_res != NULL)
367 bus_release_resource(dev, TXP_RES, TXP_RID, sc->sc_res);
369 if (sc->sc_ldata != NULL)
370 contigfree(sc->sc_ldata, sizeof(struct txp_ldata), M_DEVBUF);
376 txp_chip_init(struct txp_softc *sc)
378 /* disable interrupts */
379 WRITE_REG(sc, TXP_IER, 0);
380 WRITE_REG(sc, TXP_IMR,
381 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT |
382 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
385 /* ack all interrupts */
386 WRITE_REG(sc, TXP_ISR, TXP_INT_RESERVED | TXP_INT_LATCH |
387 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 |
388 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT |
389 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
390 TXP_INT_A2H_3 | TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0);
392 if (txp_reset_adapter(sc))
395 /* disable interrupts */
396 WRITE_REG(sc, TXP_IER, 0);
397 WRITE_REG(sc, TXP_IMR,
398 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT |
399 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
402 /* ack all interrupts */
403 WRITE_REG(sc, TXP_ISR, TXP_INT_RESERVED | TXP_INT_LATCH |
404 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 |
405 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT |
406 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
407 TXP_INT_A2H_3 | TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0);
413 txp_reset_adapter(struct txp_softc *sc)
418 WRITE_REG(sc, TXP_SRR, TXP_SRR_ALL);
420 WRITE_REG(sc, TXP_SRR, 0);
422 /* Should wait max 6 seconds */
423 for (i = 0; i < 6000; i++) {
424 r = READ_REG(sc, TXP_A2H_0);
425 if (r == STAT_WAITING_FOR_HOST_REQUEST)
430 if (r != STAT_WAITING_FOR_HOST_REQUEST) {
431 if_printf(&sc->sc_arpcom.ac_if, "reset hung\n");
439 txp_download_fw(struct txp_softc *sc)
441 struct txp_fw_file_header *fileheader;
442 struct txp_fw_section_header *secthead;
444 u_int32_t r, i, ier, imr;
446 ier = READ_REG(sc, TXP_IER);
447 WRITE_REG(sc, TXP_IER, ier | TXP_INT_A2H_0);
449 imr = READ_REG(sc, TXP_IMR);
450 WRITE_REG(sc, TXP_IMR, imr | TXP_INT_A2H_0);
452 for (i = 0; i < 10000; i++) {
453 r = READ_REG(sc, TXP_A2H_0);
454 if (r == STAT_WAITING_FOR_HOST_REQUEST)
458 if (r != STAT_WAITING_FOR_HOST_REQUEST) {
459 if_printf(&sc->sc_arpcom.ac_if,
460 "not waiting for host request\n");
465 WRITE_REG(sc, TXP_ISR, TXP_INT_A2H_0);
467 fileheader = (struct txp_fw_file_header *)tc990image;
468 if (bcmp("TYPHOON", fileheader->magicid, sizeof(fileheader->magicid))) {
469 if_printf(&sc->sc_arpcom.ac_if, "fw invalid magic\n");
473 /* Tell boot firmware to get ready for image */
474 WRITE_REG(sc, TXP_H2A_1, fileheader->addr);
475 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_RUNTIME_IMAGE);
477 if (txp_download_fw_wait(sc)) {
478 if_printf(&sc->sc_arpcom.ac_if, "fw wait failed, initial\n");
482 secthead = (struct txp_fw_section_header *)(((u_int8_t *)tc990image) +
483 sizeof(struct txp_fw_file_header));
485 for (sect = 0; sect < fileheader->nsections; sect++) {
486 if (txp_download_fw_section(sc, secthead, sect))
488 secthead = (struct txp_fw_section_header *)
489 (((u_int8_t *)secthead) + secthead->nbytes +
493 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_DOWNLOAD_COMPLETE);
495 for (i = 0; i < 10000; i++) {
496 r = READ_REG(sc, TXP_A2H_0);
497 if (r == STAT_WAITING_FOR_BOOT)
501 if (r != STAT_WAITING_FOR_BOOT) {
502 if_printf(&sc->sc_arpcom.ac_if, "not waiting for boot\n");
506 WRITE_REG(sc, TXP_IER, ier);
507 WRITE_REG(sc, TXP_IMR, imr);
513 txp_download_fw_wait(struct txp_softc *sc)
517 for (i = 0; i < 10000; i++) {
518 r = READ_REG(sc, TXP_ISR);
519 if (r & TXP_INT_A2H_0)
524 if (!(r & TXP_INT_A2H_0)) {
525 if_printf(&sc->sc_arpcom.ac_if, "fw wait failed comm0\n");
529 WRITE_REG(sc, TXP_ISR, TXP_INT_A2H_0);
531 r = READ_REG(sc, TXP_A2H_0);
532 if (r != STAT_WAITING_FOR_SEGMENT) {
533 if_printf(&sc->sc_arpcom.ac_if, "fw not waiting for segment\n");
540 txp_download_fw_section(struct txp_softc *sc,
541 struct txp_fw_section_header *sect, int sectnum)
548 /* Skip zero length sections */
549 if (sect->nbytes == 0)
552 /* Make sure we aren't past the end of the image */
553 rseg = ((u_int8_t *)sect) - ((u_int8_t *)tc990image);
554 if (rseg >= sizeof(tc990image)) {
555 if_printf(&sc->sc_arpcom.ac_if, "fw invalid section address, "
556 "section %d\n", sectnum);
560 /* Make sure this section doesn't go past the end */
561 rseg += sect->nbytes;
562 if (rseg >= sizeof(tc990image)) {
563 if_printf(&sc->sc_arpcom.ac_if, "fw truncated section %d\n",
568 bcopy(((u_int8_t *)sect) + sizeof(*sect), sc->sc_fwbuf, sect->nbytes);
569 dma = vtophys(sc->sc_fwbuf);
572 * dummy up mbuf and verify section checksum
575 m.m_next = m.m_nextpkt = NULL;
576 m.m_len = sect->nbytes;
577 m.m_data = sc->sc_fwbuf;
579 csum = in_cksum(&m, sect->nbytes);
580 if (csum != sect->cksum) {
581 if_printf(&sc->sc_arpcom.ac_if, "fw section %d, bad "
582 "cksum (expected 0x%x got 0x%x)\n",
583 sectnum, sect->cksum, csum);
588 WRITE_REG(sc, TXP_H2A_1, sect->nbytes);
589 WRITE_REG(sc, TXP_H2A_2, sect->cksum);
590 WRITE_REG(sc, TXP_H2A_3, sect->addr);
591 WRITE_REG(sc, TXP_H2A_4, 0);
592 WRITE_REG(sc, TXP_H2A_5, dma & 0xffffffff);
593 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_SEGMENT_AVAILABLE);
595 if (txp_download_fw_wait(sc)) {
596 if_printf(&sc->sc_arpcom.ac_if, "fw wait failed, "
597 "section %d\n", sectnum);
608 struct txp_softc *sc = vsc;
609 struct txp_hostvar *hv = sc->sc_hostvar;
612 /* mask all interrupts */
613 WRITE_REG(sc, TXP_IMR, TXP_INT_RESERVED | TXP_INT_SELF |
614 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 |
615 TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0 |
616 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
617 TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | TXP_INT_LATCH);
619 isr = READ_REG(sc, TXP_ISR);
621 WRITE_REG(sc, TXP_ISR, isr);
623 if ((*sc->sc_rxhir.r_roff) != (*sc->sc_rxhir.r_woff))
624 txp_rx_reclaim(sc, &sc->sc_rxhir);
625 if ((*sc->sc_rxlor.r_roff) != (*sc->sc_rxlor.r_woff))
626 txp_rx_reclaim(sc, &sc->sc_rxlor);
628 if (hv->hv_rx_buf_write_idx == hv->hv_rx_buf_read_idx)
629 txp_rxbuf_reclaim(sc);
631 if (sc->sc_txhir.r_cnt && (sc->sc_txhir.r_cons !=
632 TXP_OFFSET2IDX(*(sc->sc_txhir.r_off))))
633 txp_tx_reclaim(sc, &sc->sc_txhir);
635 if (sc->sc_txlor.r_cnt && (sc->sc_txlor.r_cons !=
636 TXP_OFFSET2IDX(*(sc->sc_txlor.r_off))))
637 txp_tx_reclaim(sc, &sc->sc_txlor);
639 isr = READ_REG(sc, TXP_ISR);
642 /* unmask all interrupts */
643 WRITE_REG(sc, TXP_IMR, TXP_INT_A2H_3);
645 txp_start(&sc->sc_arpcom.ac_if);
651 txp_rx_reclaim(struct txp_softc *sc, struct txp_rx_ring *r)
653 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
654 struct txp_rx_desc *rxd;
656 struct txp_swdesc *sd = NULL;
657 u_int32_t roff, woff;
661 rxd = r->r_desc + (roff / sizeof(struct txp_rx_desc));
663 while (roff != woff) {
665 if (rxd->rx_flags & RX_FLAGS_ERROR) {
666 if_printf(ifp, "error 0x%x\n", rxd->rx_stat);
671 /* retrieve stashed pointer */
677 m->m_pkthdr.len = m->m_len = rxd->rx_len;
679 #ifdef __STRICT_ALIGNMENT
682 * XXX Nice chip, except it won't accept "off by 2"
683 * buffers, so we're force to copy. Supposedly
684 * this will be fixed in a newer firmware rev
685 * and this will be temporary.
689 MGETHDR(mnew, MB_DONTWAIT, MT_DATA);
694 if (m->m_len > (MHLEN - 2)) {
695 MCLGET(mnew, MB_DONTWAIT);
696 if (!(mnew->m_flags & M_EXT)) {
702 mnew->m_pkthdr.rcvif = ifp;
704 mnew->m_pkthdr.len = mnew->m_len = m->m_len;
705 m_copydata(m, 0, m->m_pkthdr.len, mtod(mnew, caddr_t));
711 if (rxd->rx_stat & RX_STAT_IPCKSUMBAD)
712 m->m_pkthdr.csum_flags |= CSUM_IP_CHECKED;
713 else if (rxd->rx_stat & RX_STAT_IPCKSUMGOOD)
714 m->m_pkthdr.csum_flags |=
715 CSUM_IP_CHECKED|CSUM_IP_VALID;
717 if ((rxd->rx_stat & RX_STAT_TCPCKSUMGOOD) ||
718 (rxd->rx_stat & RX_STAT_UDPCKSUMGOOD)) {
719 m->m_pkthdr.csum_flags |=
720 CSUM_DATA_VALID|CSUM_PSEUDO_HDR|
721 CSUM_FRAG_NOT_CHECKED;
722 m->m_pkthdr.csum_data = 0xffff;
725 lwkt_serialize_enter(ifp->if_serializer);
726 if (rxd->rx_stat & RX_STAT_VLAN)
727 VLAN_INPUT_TAG(m, htons(rxd->rx_vlan >> 16));
729 ifp->if_input(ifp, m);
730 lwkt_serialize_exit(ifp->if_serializer);
734 roff += sizeof(struct txp_rx_desc);
735 if (roff == (RX_ENTRIES * sizeof(struct txp_rx_desc))) {
749 txp_rxbuf_reclaim(struct txp_softc *sc)
751 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
752 struct txp_hostvar *hv = sc->sc_hostvar;
753 struct txp_rxbuf_desc *rbd;
754 struct txp_swdesc *sd;
757 if (!(ifp->if_flags & IFF_RUNNING))
760 i = sc->sc_rxbufprod;
761 rbd = sc->sc_rxbufs + i;
765 if (sd->sd_mbuf != NULL)
768 MGETHDR(sd->sd_mbuf, MB_DONTWAIT, MT_DATA);
769 if (sd->sd_mbuf == NULL)
772 MCLGET(sd->sd_mbuf, MB_DONTWAIT);
773 if ((sd->sd_mbuf->m_flags & M_EXT) == 0)
775 sd->sd_mbuf->m_pkthdr.rcvif = ifp;
776 sd->sd_mbuf->m_pkthdr.len = sd->sd_mbuf->m_len = MCLBYTES;
778 rbd->rb_paddrlo = vtophys(mtod(sd->sd_mbuf, vm_offset_t))
782 hv->hv_rx_buf_write_idx = TXP_IDX2OFFSET(i);
784 if (++i == RXBUF_ENTRIES) {
791 sc->sc_rxbufprod = i;
796 m_freem(sd->sd_mbuf);
802 * Reclaim mbufs and entries from a transmit ring.
805 txp_tx_reclaim(struct txp_softc *sc, struct txp_tx_ring *r)
807 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
808 u_int32_t idx = TXP_OFFSET2IDX(*(r->r_off));
809 u_int32_t cons = r->r_cons, cnt = r->r_cnt;
810 struct txp_tx_desc *txd = r->r_desc + cons;
811 struct txp_swdesc *sd = sc->sc_txd + cons;
814 while (cons != idx) {
818 if ((txd->tx_flags & TX_FLAGS_TYPE_M) ==
819 TX_FLAGS_TYPE_DATA) {
828 ifp->if_flags &= ~IFF_OACTIVE;
830 if (++cons == TX_ENTRIES) {
849 txp_shutdown(device_t dev)
851 struct txp_softc *sc;
854 sc = device_get_softc(dev);
855 ifp = &sc->sc_arpcom.ac_if;
856 lwkt_serialize_enter(ifp->if_serializer);
858 /* mask all interrupts */
859 WRITE_REG(sc, TXP_IMR,
860 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT |
861 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
864 txp_command(sc, TXP_CMD_TX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 0);
865 txp_command(sc, TXP_CMD_RX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 0);
866 txp_command(sc, TXP_CMD_HALT, 0, 0, 0, NULL, NULL, NULL, 0);
868 lwkt_serialize_exit(ifp->if_serializer);
873 txp_alloc_rings(struct txp_softc *sc)
875 struct txp_boot_record *boot;
876 struct txp_ldata *ld;
881 boot = &ld->txp_boot;
887 bzero(&ld->txp_hostvar, sizeof(struct txp_hostvar));
888 boot->br_hostvar_lo = vtophys(&ld->txp_hostvar);
889 boot->br_hostvar_hi = 0;
890 sc->sc_hostvar = (struct txp_hostvar *)&ld->txp_hostvar;
892 /* hi priority tx ring */
893 boot->br_txhipri_lo = vtophys(&ld->txp_txhiring);
894 boot->br_txhipri_hi = 0;
895 boot->br_txhipri_siz = TX_ENTRIES * sizeof(struct txp_tx_desc);
896 sc->sc_txhir.r_reg = TXP_H2A_1;
897 sc->sc_txhir.r_desc = (struct txp_tx_desc *)&ld->txp_txhiring;
898 sc->sc_txhir.r_cons = sc->sc_txhir.r_prod = sc->sc_txhir.r_cnt = 0;
899 sc->sc_txhir.r_off = &sc->sc_hostvar->hv_tx_hi_desc_read_idx;
901 /* lo priority tx ring */
902 boot->br_txlopri_lo = vtophys(&ld->txp_txloring);
903 boot->br_txlopri_hi = 0;
904 boot->br_txlopri_siz = TX_ENTRIES * sizeof(struct txp_tx_desc);
905 sc->sc_txlor.r_reg = TXP_H2A_3;
906 sc->sc_txlor.r_desc = (struct txp_tx_desc *)&ld->txp_txloring;
907 sc->sc_txlor.r_cons = sc->sc_txlor.r_prod = sc->sc_txlor.r_cnt = 0;
908 sc->sc_txlor.r_off = &sc->sc_hostvar->hv_tx_lo_desc_read_idx;
910 /* high priority rx ring */
911 boot->br_rxhipri_lo = vtophys(&ld->txp_rxhiring);
912 boot->br_rxhipri_hi = 0;
913 boot->br_rxhipri_siz = RX_ENTRIES * sizeof(struct txp_rx_desc);
914 sc->sc_rxhir.r_desc = (struct txp_rx_desc *)&ld->txp_rxhiring;
915 sc->sc_rxhir.r_roff = &sc->sc_hostvar->hv_rx_hi_read_idx;
916 sc->sc_rxhir.r_woff = &sc->sc_hostvar->hv_rx_hi_write_idx;
918 /* low priority rx ring */
919 boot->br_rxlopri_lo = vtophys(&ld->txp_rxloring);
920 boot->br_rxlopri_hi = 0;
921 boot->br_rxlopri_siz = RX_ENTRIES * sizeof(struct txp_rx_desc);
922 sc->sc_rxlor.r_desc = (struct txp_rx_desc *)&ld->txp_rxloring;
923 sc->sc_rxlor.r_roff = &sc->sc_hostvar->hv_rx_lo_read_idx;
924 sc->sc_rxlor.r_woff = &sc->sc_hostvar->hv_rx_lo_write_idx;
927 bzero(&ld->txp_cmdring, sizeof(struct txp_cmd_desc) * CMD_ENTRIES);
928 boot->br_cmd_lo = vtophys(&ld->txp_cmdring);
930 boot->br_cmd_siz = CMD_ENTRIES * sizeof(struct txp_cmd_desc);
931 sc->sc_cmdring.base = (struct txp_cmd_desc *)&ld->txp_cmdring;
932 sc->sc_cmdring.size = CMD_ENTRIES * sizeof(struct txp_cmd_desc);
933 sc->sc_cmdring.lastwrite = 0;
936 bzero(&ld->txp_rspring, sizeof(struct txp_rsp_desc) * RSP_ENTRIES);
937 boot->br_resp_lo = vtophys(&ld->txp_rspring);
938 boot->br_resp_hi = 0;
939 boot->br_resp_siz = CMD_ENTRIES * sizeof(struct txp_rsp_desc);
940 sc->sc_rspring.base = (struct txp_rsp_desc *)&ld->txp_rspring;
941 sc->sc_rspring.size = RSP_ENTRIES * sizeof(struct txp_rsp_desc);
942 sc->sc_rspring.lastwrite = 0;
944 /* receive buffer ring */
945 boot->br_rxbuf_lo = vtophys(&ld->txp_rxbufs);
946 boot->br_rxbuf_hi = 0;
947 boot->br_rxbuf_siz = RXBUF_ENTRIES * sizeof(struct txp_rxbuf_desc);
948 sc->sc_rxbufs = (struct txp_rxbuf_desc *)&ld->txp_rxbufs;
950 for (i = 0; i < RXBUF_ENTRIES; i++) {
951 struct txp_swdesc *sd;
952 if (sc->sc_rxbufs[i].rb_sd != NULL)
954 sc->sc_rxbufs[i].rb_sd = kmalloc(sizeof(struct txp_swdesc),
956 if (sc->sc_rxbufs[i].rb_sd == NULL)
958 sd = sc->sc_rxbufs[i].rb_sd;
961 sc->sc_rxbufprod = 0;
964 bzero(&ld->txp_zero, sizeof(u_int32_t));
965 boot->br_zero_lo = vtophys(&ld->txp_zero);
966 boot->br_zero_hi = 0;
968 /* See if it's waiting for boot, and try to boot it */
969 for (i = 0; i < 10000; i++) {
970 r = READ_REG(sc, TXP_A2H_0);
971 if (r == STAT_WAITING_FOR_BOOT)
976 if (r != STAT_WAITING_FOR_BOOT) {
977 if_printf(&sc->sc_arpcom.ac_if, "not waiting for boot\n");
981 WRITE_REG(sc, TXP_H2A_2, 0);
982 WRITE_REG(sc, TXP_H2A_1, vtophys(sc->sc_boot));
983 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_REGISTER_BOOT_RECORD);
985 /* See if it booted */
986 for (i = 0; i < 10000; i++) {
987 r = READ_REG(sc, TXP_A2H_0);
988 if (r == STAT_RUNNING)
992 if (r != STAT_RUNNING) {
993 if_printf(&sc->sc_arpcom.ac_if, "fw not running\n");
997 /* Clear TX and CMD ring write registers */
998 WRITE_REG(sc, TXP_H2A_1, TXP_BOOTCMD_NULL);
999 WRITE_REG(sc, TXP_H2A_2, TXP_BOOTCMD_NULL);
1000 WRITE_REG(sc, TXP_H2A_3, TXP_BOOTCMD_NULL);
1001 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_NULL);
1007 txp_ioctl(struct ifnet *ifp, u_long command, caddr_t data, struct ucred *cr)
1009 struct txp_softc *sc = ifp->if_softc;
1010 struct ifreq *ifr = (struct ifreq *)data;
1015 if (ifp->if_flags & IFF_UP) {
1018 if (ifp->if_flags & IFF_RUNNING)
1025 * Multicast list has changed; set the hardware
1026 * filter accordingly.
1033 error = ifmedia_ioctl(ifp, ifr, &sc->sc_ifmedia, command);
1036 error = ether_ioctl(ifp, command, data);
1043 txp_rxring_fill(struct txp_softc *sc)
1047 struct txp_swdesc *sd;
1049 ifp = &sc->sc_arpcom.ac_if;
1051 for (i = 0; i < RXBUF_ENTRIES; i++) {
1052 sd = sc->sc_rxbufs[i].rb_sd;
1053 MGETHDR(sd->sd_mbuf, MB_DONTWAIT, MT_DATA);
1054 if (sd->sd_mbuf == NULL)
1057 MCLGET(sd->sd_mbuf, MB_DONTWAIT);
1058 if ((sd->sd_mbuf->m_flags & M_EXT) == 0) {
1059 m_freem(sd->sd_mbuf);
1062 sd->sd_mbuf->m_pkthdr.len = sd->sd_mbuf->m_len = MCLBYTES;
1063 sd->sd_mbuf->m_pkthdr.rcvif = ifp;
1065 sc->sc_rxbufs[i].rb_paddrlo =
1066 vtophys(mtod(sd->sd_mbuf, vm_offset_t));
1067 sc->sc_rxbufs[i].rb_paddrhi = 0;
1070 sc->sc_hostvar->hv_rx_buf_write_idx = (RXBUF_ENTRIES - 1) *
1071 sizeof(struct txp_rxbuf_desc);
1077 txp_rxring_empty(struct txp_softc *sc)
1080 struct txp_swdesc *sd;
1082 if (sc->sc_rxbufs == NULL)
1085 for (i = 0; i < RXBUF_ENTRIES; i++) {
1086 if (&sc->sc_rxbufs[i] == NULL)
1088 sd = sc->sc_rxbufs[i].rb_sd;
1091 if (sd->sd_mbuf != NULL) {
1092 m_freem(sd->sd_mbuf);
1103 struct txp_softc *sc;
1109 ifp = &sc->sc_arpcom.ac_if;
1111 if (ifp->if_flags & IFF_RUNNING)
1116 txp_command(sc, TXP_CMD_MAX_PKT_SIZE_WRITE, TXP_MAX_PKTLEN, 0, 0,
1117 NULL, NULL, NULL, 1);
1119 /* Set station address. */
1120 ((u_int8_t *)&p1)[1] = sc->sc_arpcom.ac_enaddr[0];
1121 ((u_int8_t *)&p1)[0] = sc->sc_arpcom.ac_enaddr[1];
1122 ((u_int8_t *)&p2)[3] = sc->sc_arpcom.ac_enaddr[2];
1123 ((u_int8_t *)&p2)[2] = sc->sc_arpcom.ac_enaddr[3];
1124 ((u_int8_t *)&p2)[1] = sc->sc_arpcom.ac_enaddr[4];
1125 ((u_int8_t *)&p2)[0] = sc->sc_arpcom.ac_enaddr[5];
1126 txp_command(sc, TXP_CMD_STATION_ADDRESS_WRITE, p1, p2, 0,
1127 NULL, NULL, NULL, 1);
1131 txp_rxring_fill(sc);
1133 txp_command(sc, TXP_CMD_TX_ENABLE, 0, 0, 0, NULL, NULL, NULL, 1);
1134 txp_command(sc, TXP_CMD_RX_ENABLE, 0, 0, 0, NULL, NULL, NULL, 1);
1136 WRITE_REG(sc, TXP_IER, TXP_INT_RESERVED | TXP_INT_SELF |
1137 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 |
1138 TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0 |
1139 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
1140 TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | TXP_INT_LATCH);
1141 WRITE_REG(sc, TXP_IMR, TXP_INT_A2H_3);
1143 ifp->if_flags |= IFF_RUNNING;
1144 ifp->if_flags &= ~IFF_OACTIVE;
1147 callout_reset(&sc->txp_stat_timer, hz, txp_tick, sc);
1153 struct txp_softc *sc = vsc;
1154 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
1155 struct txp_rsp_desc *rsp = NULL;
1156 struct txp_ext_desc *ext;
1158 lwkt_serialize_enter(ifp->if_serializer);
1159 txp_rxbuf_reclaim(sc);
1161 if (txp_command2(sc, TXP_CMD_READ_STATISTICS, 0, 0, 0, NULL, 0,
1164 if (rsp->rsp_numdesc != 6)
1166 if (txp_command(sc, TXP_CMD_CLEAR_STATISTICS, 0, 0, 0,
1167 NULL, NULL, NULL, 1))
1169 ext = (struct txp_ext_desc *)(rsp + 1);
1171 ifp->if_ierrors += ext[3].ext_2 + ext[3].ext_3 + ext[3].ext_4 +
1172 ext[4].ext_1 + ext[4].ext_4;
1173 ifp->if_oerrors += ext[0].ext_1 + ext[1].ext_1 + ext[1].ext_4 +
1175 ifp->if_collisions += ext[0].ext_2 + ext[0].ext_3 + ext[1].ext_2 +
1177 ifp->if_opackets += rsp->rsp_par2;
1178 ifp->if_ipackets += ext[2].ext_3;
1182 kfree(rsp, M_DEVBUF);
1184 callout_reset(&sc->txp_stat_timer, hz, txp_tick, sc);
1185 lwkt_serialize_exit(ifp->if_serializer);
1189 txp_start(struct ifnet *ifp)
1191 struct txp_softc *sc = ifp->if_softc;
1192 struct txp_tx_ring *r = &sc->sc_txhir;
1193 struct txp_tx_desc *txd;
1194 struct txp_frag_desc *fxd;
1195 struct mbuf *m, *m0;
1196 struct txp_swdesc *sd;
1197 u_int32_t firstprod, firstcnt, prod, cnt;
1200 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
1207 m = ifq_poll(&ifp->if_snd);
1214 sd = sc->sc_txd + prod;
1217 if ((TX_ENTRIES - cnt) < 4)
1220 txd = r->r_desc + prod;
1222 txd->tx_flags = TX_FLAGS_TYPE_DATA;
1223 txd->tx_numdesc = 0;
1229 if (++prod == TX_ENTRIES)
1232 if (++cnt >= (TX_ENTRIES - 4))
1235 if ((m->m_flags & (M_PROTO1|M_PKTHDR)) == (M_PROTO1|M_PKTHDR) &&
1236 m->m_pkthdr.rcvif != NULL) {
1237 ifv = m->m_pkthdr.rcvif->if_softc;
1238 txd->tx_pflags = TX_PFLAGS_VLAN |
1239 (htons(ifv->ifv_tag) << TX_PFLAGS_VLANTAG_S);
1242 if (m->m_pkthdr.csum_flags & CSUM_IP)
1243 txd->tx_pflags |= TX_PFLAGS_IPCKSUM;
1246 if (m->m_pkthdr.csum_flags & CSUM_TCP)
1247 txd->tx_pflags |= TX_PFLAGS_TCPCKSUM;
1248 if (m->m_pkthdr.csum_flags & CSUM_UDP)
1249 txd->tx_pflags |= TX_PFLAGS_UDPCKSUM;
1252 fxd = (struct txp_frag_desc *)(r->r_desc + prod);
1253 for (m0 = m; m0 != NULL; m0 = m0->m_next) {
1256 if (++cnt >= (TX_ENTRIES - 4))
1261 fxd->frag_flags = FRAG_FLAGS_TYPE_FRAG;
1262 fxd->frag_rsvd1 = 0;
1263 fxd->frag_len = m0->m_len;
1264 fxd->frag_addrlo = vtophys(mtod(m0, vm_offset_t));
1265 fxd->frag_addrhi = 0;
1266 fxd->frag_rsvd2 = 0;
1268 if (++prod == TX_ENTRIES) {
1269 fxd = (struct txp_frag_desc *)r->r_desc;
1278 ifq_dequeue(&ifp->if_snd, m);
1280 WRITE_REG(sc, r->r_reg, TXP_IDX2OFFSET(prod));
1288 ifp->if_flags |= IFF_OACTIVE;
1289 r->r_prod = firstprod;
1290 r->r_cnt = firstcnt;
1295 * Handle simple commands sent to the typhoon
1298 txp_command(struct txp_softc *sc, u_int16_t id, u_int16_t in1, u_int32_t in2,
1299 u_int32_t in3, u_int16_t *out1, u_int32_t *out2, u_int32_t *out3,
1302 struct txp_rsp_desc *rsp = NULL;
1304 if (txp_command2(sc, id, in1, in2, in3, NULL, 0, &rsp, wait))
1311 *out1 = rsp->rsp_par1;
1313 *out2 = rsp->rsp_par2;
1315 *out3 = rsp->rsp_par3;
1316 kfree(rsp, M_DEVBUF);
1321 txp_command2(struct txp_softc *sc, u_int16_t id, u_int16_t in1, u_int32_t in2,
1322 u_int32_t in3, struct txp_ext_desc *in_extp, u_int8_t in_extn,
1323 struct txp_rsp_desc **rspp, int wait)
1325 struct txp_hostvar *hv = sc->sc_hostvar;
1326 struct txp_cmd_desc *cmd;
1327 struct txp_ext_desc *ext;
1331 if (txp_cmd_desc_numfree(sc) < (in_extn + 1)) {
1332 if_printf(&sc->sc_arpcom.ac_if, "no free cmd descriptors\n");
1336 idx = sc->sc_cmdring.lastwrite;
1337 cmd = (struct txp_cmd_desc *)(((u_int8_t *)sc->sc_cmdring.base) + idx);
1338 bzero(cmd, sizeof(*cmd));
1340 cmd->cmd_numdesc = in_extn;
1341 cmd->cmd_seq = seq = sc->sc_seq++;
1343 cmd->cmd_par1 = in1;
1344 cmd->cmd_par2 = in2;
1345 cmd->cmd_par3 = in3;
1346 cmd->cmd_flags = CMD_FLAGS_TYPE_CMD |
1347 (wait ? CMD_FLAGS_RESP : 0) | CMD_FLAGS_VALID;
1349 idx += sizeof(struct txp_cmd_desc);
1350 if (idx == sc->sc_cmdring.size)
1353 for (i = 0; i < in_extn; i++) {
1354 ext = (struct txp_ext_desc *)(((u_int8_t *)sc->sc_cmdring.base) + idx);
1355 bcopy(in_extp, ext, sizeof(struct txp_ext_desc));
1357 idx += sizeof(struct txp_cmd_desc);
1358 if (idx == sc->sc_cmdring.size)
1362 sc->sc_cmdring.lastwrite = idx;
1364 WRITE_REG(sc, TXP_H2A_2, sc->sc_cmdring.lastwrite);
1369 for (i = 0; i < 10000; i++) {
1370 idx = hv->hv_resp_read_idx;
1371 if (idx != hv->hv_resp_write_idx) {
1373 if (txp_response(sc, idx, id, seq, rspp))
1380 if (i == 1000 || (*rspp) == NULL) {
1381 if_printf(&sc->sc_arpcom.ac_if, "0x%x command failed\n", id);
1389 txp_response(struct txp_softc *sc, u_int32_t ridx, u_int16_t id, u_int16_t seq,
1390 struct txp_rsp_desc **rspp)
1392 struct txp_hostvar *hv = sc->sc_hostvar;
1393 struct txp_rsp_desc *rsp;
1395 while (ridx != hv->hv_resp_write_idx) {
1396 rsp = (struct txp_rsp_desc *)(((u_int8_t *)sc->sc_rspring.base) + ridx);
1398 if (id == rsp->rsp_id && rsp->rsp_seq == seq) {
1399 *rspp = (struct txp_rsp_desc *)kmalloc(
1400 sizeof(struct txp_rsp_desc) * (rsp->rsp_numdesc + 1),
1401 M_DEVBUF, M_INTWAIT);
1402 if ((*rspp) == NULL)
1404 txp_rsp_fixup(sc, rsp, *rspp);
1408 if (rsp->rsp_flags & RSP_FLAGS_ERROR) {
1409 if_printf(&sc->sc_arpcom.ac_if, "response error!\n");
1410 txp_rsp_fixup(sc, rsp, NULL);
1411 ridx = hv->hv_resp_read_idx;
1415 switch (rsp->rsp_id) {
1416 case TXP_CMD_CYCLE_STATISTICS:
1417 case TXP_CMD_MEDIA_STATUS_READ:
1419 case TXP_CMD_HELLO_RESPONSE:
1420 if_printf(&sc->sc_arpcom.ac_if, "hello\n");
1423 if_printf(&sc->sc_arpcom.ac_if, "unknown id(0x%x)\n",
1427 txp_rsp_fixup(sc, rsp, NULL);
1428 ridx = hv->hv_resp_read_idx;
1429 hv->hv_resp_read_idx = ridx;
1436 txp_rsp_fixup(struct txp_softc *sc, struct txp_rsp_desc *rsp,
1437 struct txp_rsp_desc *dst)
1439 struct txp_rsp_desc *src = rsp;
1440 struct txp_hostvar *hv = sc->sc_hostvar;
1443 ridx = hv->hv_resp_read_idx;
1445 for (i = 0; i < rsp->rsp_numdesc + 1; i++) {
1447 bcopy(src, dst++, sizeof(struct txp_rsp_desc));
1448 ridx += sizeof(struct txp_rsp_desc);
1449 if (ridx == sc->sc_rspring.size) {
1450 src = sc->sc_rspring.base;
1454 sc->sc_rspring.lastwrite = hv->hv_resp_read_idx = ridx;
1457 hv->hv_resp_read_idx = ridx;
1461 txp_cmd_desc_numfree(struct txp_softc *sc)
1463 struct txp_hostvar *hv = sc->sc_hostvar;
1464 struct txp_boot_record *br = sc->sc_boot;
1465 u_int32_t widx, ridx, nfree;
1467 widx = sc->sc_cmdring.lastwrite;
1468 ridx = hv->hv_cmd_read_idx;
1471 /* Ring is completely free */
1472 nfree = br->br_cmd_siz - sizeof(struct txp_cmd_desc);
1475 nfree = br->br_cmd_siz -
1476 (widx - ridx + sizeof(struct txp_cmd_desc));
1478 nfree = ridx - widx - sizeof(struct txp_cmd_desc);
1481 return (nfree / sizeof(struct txp_cmd_desc));
1485 txp_stop(struct txp_softc *sc)
1489 ifp = &sc->sc_arpcom.ac_if;
1491 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1493 callout_stop(&sc->txp_stat_timer);
1495 txp_command(sc, TXP_CMD_TX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 1);
1496 txp_command(sc, TXP_CMD_RX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 1);
1498 txp_rxring_empty(sc);
1504 txp_watchdog(struct ifnet *ifp)
1510 txp_ifmedia_upd(struct ifnet *ifp)
1512 struct txp_softc *sc = ifp->if_softc;
1513 struct ifmedia *ifm = &sc->sc_ifmedia;
1516 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
1519 if (IFM_SUBTYPE(ifm->ifm_media) == IFM_10_T) {
1520 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1521 new_xcvr = TXP_XCVR_10_FDX;
1523 new_xcvr = TXP_XCVR_10_HDX;
1524 } else if (IFM_SUBTYPE(ifm->ifm_media) == IFM_100_TX) {
1525 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1526 new_xcvr = TXP_XCVR_100_FDX;
1528 new_xcvr = TXP_XCVR_100_HDX;
1529 } else if (IFM_SUBTYPE(ifm->ifm_media) == IFM_AUTO) {
1530 new_xcvr = TXP_XCVR_AUTO;
1535 if (sc->sc_xcvr == new_xcvr)
1538 txp_command(sc, TXP_CMD_XCVR_SELECT, new_xcvr, 0, 0,
1539 NULL, NULL, NULL, 0);
1540 sc->sc_xcvr = new_xcvr;
1546 txp_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
1548 struct txp_softc *sc = ifp->if_softc;
1549 struct ifmedia *ifm = &sc->sc_ifmedia;
1550 u_int16_t bmsr, bmcr, anlpar;
1552 ifmr->ifm_status = IFM_AVALID;
1553 ifmr->ifm_active = IFM_ETHER;
1555 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMSR, 0,
1556 &bmsr, NULL, NULL, 1))
1558 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMSR, 0,
1559 &bmsr, NULL, NULL, 1))
1562 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMCR, 0,
1563 &bmcr, NULL, NULL, 1))
1566 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_ANLPAR, 0,
1567 &anlpar, NULL, NULL, 1))
1570 if (bmsr & BMSR_LINK)
1571 ifmr->ifm_status |= IFM_ACTIVE;
1573 if (bmcr & BMCR_ISO) {
1574 ifmr->ifm_active |= IFM_NONE;
1575 ifmr->ifm_status = 0;
1579 if (bmcr & BMCR_LOOP)
1580 ifmr->ifm_active |= IFM_LOOP;
1582 if (bmcr & BMCR_AUTOEN) {
1583 if ((bmsr & BMSR_ACOMP) == 0) {
1584 ifmr->ifm_active |= IFM_NONE;
1588 if (anlpar & ANLPAR_T4)
1589 ifmr->ifm_active |= IFM_100_T4;
1590 else if (anlpar & ANLPAR_TX_FD)
1591 ifmr->ifm_active |= IFM_100_TX|IFM_FDX;
1592 else if (anlpar & ANLPAR_TX)
1593 ifmr->ifm_active |= IFM_100_TX;
1594 else if (anlpar & ANLPAR_10_FD)
1595 ifmr->ifm_active |= IFM_10_T|IFM_FDX;
1596 else if (anlpar & ANLPAR_10)
1597 ifmr->ifm_active |= IFM_10_T;
1599 ifmr->ifm_active |= IFM_NONE;
1601 ifmr->ifm_active = ifm->ifm_cur->ifm_media;
1605 ifmr->ifm_active |= IFM_NONE;
1606 ifmr->ifm_status &= ~IFM_AVALID;
1611 txp_show_descriptor(void *d)
1613 struct txp_cmd_desc *cmd = d;
1614 struct txp_rsp_desc *rsp = d;
1615 struct txp_tx_desc *txd = d;
1616 struct txp_frag_desc *frgd = d;
1618 switch (cmd->cmd_flags & CMD_FLAGS_TYPE_M) {
1619 case CMD_FLAGS_TYPE_CMD:
1620 /* command descriptor */
1621 kprintf("[cmd flags 0x%x num %d id %d seq %d par1 0x%x par2 0x%x par3 0x%x]\n",
1622 cmd->cmd_flags, cmd->cmd_numdesc, cmd->cmd_id, cmd->cmd_seq,
1623 cmd->cmd_par1, cmd->cmd_par2, cmd->cmd_par3);
1625 case CMD_FLAGS_TYPE_RESP:
1626 /* response descriptor */
1627 kprintf("[rsp flags 0x%x num %d id %d seq %d par1 0x%x par2 0x%x par3 0x%x]\n",
1628 rsp->rsp_flags, rsp->rsp_numdesc, rsp->rsp_id, rsp->rsp_seq,
1629 rsp->rsp_par1, rsp->rsp_par2, rsp->rsp_par3);
1631 case CMD_FLAGS_TYPE_DATA:
1632 /* data header (assuming tx for now) */
1633 kprintf("[data flags 0x%x num %d totlen %d addr 0x%x/0x%x pflags 0x%x]",
1634 txd->tx_flags, txd->tx_numdesc, txd->tx_totlen,
1635 txd->tx_addrlo, txd->tx_addrhi, txd->tx_pflags);
1637 case CMD_FLAGS_TYPE_FRAG:
1638 /* fragment descriptor */
1639 kprintf("[frag flags 0x%x rsvd1 0x%x len %d addr 0x%x/0x%x rsvd2 0x%x]",
1640 frgd->frag_flags, frgd->frag_rsvd1, frgd->frag_len,
1641 frgd->frag_addrlo, frgd->frag_addrhi, frgd->frag_rsvd2);
1644 kprintf("[unknown(%x) flags 0x%x num %d id %d seq %d par1 0x%x par2 0x%x par3 0x%x]\n",
1645 cmd->cmd_flags & CMD_FLAGS_TYPE_M,
1646 cmd->cmd_flags, cmd->cmd_numdesc, cmd->cmd_id, cmd->cmd_seq,
1647 cmd->cmd_par1, cmd->cmd_par2, cmd->cmd_par3);
1654 txp_set_filter(struct txp_softc *sc)
1656 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
1658 struct ifmultiaddr *ifma;
1660 if (ifp->if_flags & IFF_PROMISC) {
1661 filter = TXP_RXFILT_PROMISC;
1665 filter = TXP_RXFILT_DIRECT;
1667 if (ifp->if_flags & IFF_BROADCAST)
1668 filter |= TXP_RXFILT_BROADCAST;
1670 if (ifp->if_flags & IFF_ALLMULTI) {
1671 filter |= TXP_RXFILT_ALLMULTI;
1673 uint32_t hashbit, hash[2];
1676 hash[0] = hash[1] = 0;
1678 LIST_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
1679 if (ifma->ifma_addr->sa_family != AF_LINK)
1683 hashbit = (uint16_t)(ether_crc32_be(
1684 LLADDR((struct sockaddr_dl *)ifma->ifma_addr),
1685 ETHER_ADDR_LEN) & (64 - 1));
1686 hash[hashbit / 32] |= (1 << hashbit % 32);
1690 filter |= TXP_RXFILT_HASHMULTI;
1691 txp_command(sc, TXP_CMD_MCAST_HASH_MASK_WRITE,
1692 2, hash[0], hash[1], NULL, NULL, NULL, 0);
1697 txp_command(sc, TXP_CMD_RX_FILTER_WRITE, filter, 0, 0,
1698 NULL, NULL, NULL, 1);
1702 txp_capabilities(struct txp_softc *sc)
1704 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
1705 struct txp_rsp_desc *rsp = NULL;
1706 struct txp_ext_desc *ext;
1708 if (txp_command2(sc, TXP_CMD_OFFLOAD_READ, 0, 0, 0, NULL, 0, &rsp, 1))
1711 if (rsp->rsp_numdesc != 1)
1713 ext = (struct txp_ext_desc *)(rsp + 1);
1715 sc->sc_tx_capability = ext->ext_1 & OFFLOAD_MASK;
1716 sc->sc_rx_capability = ext->ext_2 & OFFLOAD_MASK;
1717 ifp->if_capabilities = 0;
1719 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_VLAN) {
1720 sc->sc_tx_capability |= OFFLOAD_VLAN;
1721 sc->sc_rx_capability |= OFFLOAD_VLAN;
1722 ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING;
1727 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_IPSEC) {
1728 sc->sc_tx_capability |= OFFLOAD_IPSEC;
1729 sc->sc_rx_capability |= OFFLOAD_IPSEC;
1730 ifp->if_capabilities |= IFCAP_IPSEC;
1734 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_IPCKSUM) {
1735 sc->sc_tx_capability |= OFFLOAD_IPCKSUM;
1736 sc->sc_rx_capability |= OFFLOAD_IPCKSUM;
1737 ifp->if_capabilities |= IFCAP_HWCSUM;
1738 ifp->if_hwassist |= CSUM_IP;
1741 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_TCPCKSUM) {
1743 sc->sc_tx_capability |= OFFLOAD_TCPCKSUM;
1745 sc->sc_rx_capability |= OFFLOAD_TCPCKSUM;
1746 ifp->if_capabilities |= IFCAP_HWCSUM;
1749 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_UDPCKSUM) {
1751 sc->sc_tx_capability |= OFFLOAD_UDPCKSUM;
1753 sc->sc_rx_capability |= OFFLOAD_UDPCKSUM;
1754 ifp->if_capabilities |= IFCAP_HWCSUM;
1756 ifp->if_capenable = ifp->if_capabilities;
1758 if (txp_command(sc, TXP_CMD_OFFLOAD_WRITE, 0,
1759 sc->sc_tx_capability, sc->sc_rx_capability, NULL, NULL, NULL, 1))
1764 kfree(rsp, M_DEVBUF);