kernel tree reorganization stage 1: Major cvs repository work (not logged as
[dragonfly.git] / sys / i386 / i386 / machdep.c
CommitLineData
984263bc
MD
1/*-
2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
1f2de5d4 39 * $DragonFly: src/sys/i386/i386/Attic/machdep.c,v 1.32 2003/08/07 21:17:22 dillon Exp $
984263bc
MD
40 */
41
1f2de5d4
MD
42#include "use_apm.h"
43#include "use_ether.h"
44#include "use_npx.h"
45#include "use_isa.h"
984263bc
MD
46#include "opt_atalk.h"
47#include "opt_compat.h"
48#include "opt_cpu.h"
49#include "opt_ddb.h"
50#include "opt_directio.h"
51#include "opt_inet.h"
52#include "opt_ipx.h"
53#include "opt_maxmem.h"
54#include "opt_msgbuf.h"
55#include "opt_perfmon.h"
56#include "opt_swap.h"
57#include "opt_user_ldt.h"
58#include "opt_userconfig.h"
59
60#include <sys/param.h>
61#include <sys/systm.h>
62#include <sys/sysproto.h>
63#include <sys/signalvar.h>
64#include <sys/kernel.h>
65#include <sys/linker.h>
66#include <sys/malloc.h>
67#include <sys/proc.h>
68#include <sys/buf.h>
69#include <sys/reboot.h>
70#include <sys/callout.h>
71#include <sys/mbuf.h>
72#include <sys/msgbuf.h>
73#include <sys/sysent.h>
74#include <sys/sysctl.h>
75#include <sys/vmmeter.h>
76#include <sys/bus.h>
77
78#include <vm/vm.h>
79#include <vm/vm_param.h>
80#include <sys/lock.h>
81#include <vm/vm_kern.h>
82#include <vm/vm_object.h>
83#include <vm/vm_page.h>
84#include <vm/vm_map.h>
85#include <vm/vm_pager.h>
86#include <vm/vm_extern.h>
87
4b5f931b
MD
88#include <sys/thread2.h>
89
984263bc
MD
90#include <sys/user.h>
91#include <sys/exec.h>
92#include <sys/cons.h>
93
94#include <ddb/ddb.h>
95
984263bc
MD
96#include <machine/cpu.h>
97#include <machine/reg.h>
98#include <machine/clock.h>
99#include <machine/specialreg.h>
100#include <machine/bootinfo.h>
101#include <machine/ipl.h>
102#include <machine/md_var.h>
103#include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
85100692 104#include <machine/globaldata.h> /* CPU_prvspace */
984263bc
MD
105#ifdef SMP
106#include <machine/smp.h>
984263bc
MD
107#endif
108#ifdef PERFMON
109#include <machine/perfmon.h>
110#endif
111#include <machine/cputypes.h>
112
113#ifdef OLD_BUS_ARCH
1f2de5d4 114#include <bus/isa/i386/isa_device.h>
984263bc
MD
115#endif
116#include <i386/isa/intr_machdep.h>
1f2de5d4 117#include <bus/isa/rtc.h>
984263bc
MD
118#include <machine/vm86.h>
119#include <sys/random.h>
120#include <sys/ptrace.h>
121#include <machine/sigframe.h>
122
123extern void init386 __P((int first));
124extern void dblfault_handler __P((void));
125
126extern void printcpuinfo(void); /* XXX header file */
127extern void finishidentcpu(void);
128extern void panicifcpuunsupported(void);
129extern void initializecpu(void);
130
131static void cpu_startup __P((void *));
642a6e88 132#ifndef CPU_DISABLE_SSE
984263bc
MD
133static void set_fpregs_xmm __P((struct save87 *, struct savexmm *));
134static void fill_fpregs_xmm __P((struct savexmm *, struct save87 *));
642a6e88 135#endif /* CPU_DISABLE_SSE */
984263bc
MD
136#ifdef DIRECTIO
137extern void ffs_rawread_setup(void);
138#endif /* DIRECTIO */
8a8d5d85 139static void init_locks(void);
984263bc
MD
140
141SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
142
143static MALLOC_DEFINE(M_MBUF, "mbuf", "mbuf");
144
145int _udatasel, _ucodesel;
146u_int atdevbase;
147
148#if defined(SWTCH_OPTIM_STATS)
149extern int swtch_optim_stats;
150SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
151 CTLFLAG_RD, &swtch_optim_stats, 0, "");
152SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
153 CTLFLAG_RD, &tlb_flush_count, 0, "");
154#endif
155
156#ifdef PC98
157static int ispc98 = 1;
158#else
159static int ispc98 = 0;
160#endif
161SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, "");
162
163int physmem = 0;
164int cold = 1;
165
166static int
167sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
168{
169 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
170 return (error);
171}
172
173SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
174 0, 0, sysctl_hw_physmem, "IU", "");
175
176static int
177sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
178{
179 int error = sysctl_handle_int(oidp, 0,
12e4aaff 180 ctob(physmem - vmstats.v_wire_count), req);
984263bc
MD
181 return (error);
182}
183
184SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
185 0, 0, sysctl_hw_usermem, "IU", "");
186
187static int
188sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
189{
190 int error = sysctl_handle_int(oidp, 0,
191 i386_btop(avail_end - avail_start), req);
192 return (error);
193}
194
195SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
196 0, 0, sysctl_hw_availpages, "I", "");
197
198static int
199sysctl_machdep_msgbuf(SYSCTL_HANDLER_ARGS)
200{
201 int error;
202
203 /* Unwind the buffer, so that it's linear (possibly starting with
204 * some initial nulls).
205 */
206 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr+msgbufp->msg_bufr,
207 msgbufp->msg_size-msgbufp->msg_bufr,req);
208 if(error) return(error);
209 if(msgbufp->msg_bufr>0) {
210 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr,
211 msgbufp->msg_bufr,req);
212 }
213 return(error);
214}
215
216SYSCTL_PROC(_machdep, OID_AUTO, msgbuf, CTLTYPE_STRING|CTLFLAG_RD,
217 0, 0, sysctl_machdep_msgbuf, "A","Contents of kernel message buffer");
218
219static int msgbuf_clear;
220
221static int
222sysctl_machdep_msgbuf_clear(SYSCTL_HANDLER_ARGS)
223{
224 int error;
225 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
226 req);
227 if (!error && req->newptr) {
228 /* Clear the buffer and reset write pointer */
229 bzero(msgbufp->msg_ptr,msgbufp->msg_size);
230 msgbufp->msg_bufr=msgbufp->msg_bufx=0;
231 msgbuf_clear=0;
232 }
233 return (error);
234}
235
236SYSCTL_PROC(_machdep, OID_AUTO, msgbuf_clear, CTLTYPE_INT|CTLFLAG_RW,
237 &msgbuf_clear, 0, sysctl_machdep_msgbuf_clear, "I",
238 "Clear kernel message buffer");
239
240int bootverbose = 0, Maxmem = 0;
241long dumplo;
242
243vm_offset_t phys_avail[10];
244
245/* must be 2 less so 0 0 can signal end of chunks */
246#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2)
247
248static vm_offset_t buffer_sva, buffer_eva;
249vm_offset_t clean_sva, clean_eva;
250static vm_offset_t pager_sva, pager_eva;
251static struct trapframe proc0_tf;
252
253static void
254cpu_startup(dummy)
255 void *dummy;
256{
c9faf524
RG
257 unsigned i;
258 caddr_t v;
984263bc
MD
259 vm_offset_t maxaddr;
260 vm_size_t size = 0;
261 int firstaddr;
262 vm_offset_t minaddr;
263
264 if (boothowto & RB_VERBOSE)
265 bootverbose++;
266
267 /*
268 * Good {morning,afternoon,evening,night}.
269 */
270 printf("%s", version);
271 startrtclock();
272 printcpuinfo();
273 panicifcpuunsupported();
274#ifdef PERFMON
275 perfmon_init();
276#endif
277 printf("real memory = %u (%uK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024);
278 /*
279 * Display any holes after the first chunk of extended memory.
280 */
281 if (bootverbose) {
282 int indx;
283
284 printf("Physical memory chunk(s):\n");
285 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
286 unsigned int size1 = phys_avail[indx + 1] - phys_avail[indx];
287
288 printf("0x%08x - 0x%08x, %u bytes (%u pages)\n",
289 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
290 size1 / PAGE_SIZE);
291 }
292 }
293
294 /*
295 * Calculate callout wheel size
296 */
297 for (callwheelsize = 1, callwheelbits = 0;
298 callwheelsize < ncallout;
299 callwheelsize <<= 1, ++callwheelbits)
300 ;
301 callwheelmask = callwheelsize - 1;
302
303 /*
304 * Allocate space for system data structures.
305 * The first available kernel virtual address is in "v".
306 * As pages of kernel virtual memory are allocated, "v" is incremented.
307 * As pages of memory are allocated and cleared,
308 * "firstaddr" is incremented.
309 * An index into the kernel page table corresponding to the
310 * virtual memory address maintained in "v" is kept in "mapaddr".
311 */
312
313 /*
314 * Make two passes. The first pass calculates how much memory is
315 * needed and allocates it. The second pass assigns virtual
316 * addresses to the various data structures.
317 */
318 firstaddr = 0;
319again:
320 v = (caddr_t)firstaddr;
321
322#define valloc(name, type, num) \
323 (name) = (type *)v; v = (caddr_t)((name)+(num))
324#define valloclim(name, type, num, lim) \
325 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
326
327 valloc(callout, struct callout, ncallout);
328 valloc(callwheel, struct callout_tailq, callwheelsize);
329
330 /*
331 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
332 * For the first 64MB of ram nominally allocate sufficient buffers to
333 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
334 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
335 * the buffer cache we limit the eventual kva reservation to
336 * maxbcache bytes.
337 *
338 * factor represents the 1/4 x ram conversion.
339 */
340 if (nbuf == 0) {
341 int factor = 4 * BKVASIZE / 1024;
342 int kbytes = physmem * (PAGE_SIZE / 1024);
343
344 nbuf = 50;
345 if (kbytes > 4096)
346 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
347 if (kbytes > 65536)
348 nbuf += (kbytes - 65536) * 2 / (factor * 5);
349 if (maxbcache && nbuf > maxbcache / BKVASIZE)
350 nbuf = maxbcache / BKVASIZE;
351 }
352
353 /*
354 * Do not allow the buffer_map to be more then 1/2 the size of the
355 * kernel_map.
356 */
357 if (nbuf > (kernel_map->max_offset - kernel_map->min_offset) /
358 (BKVASIZE * 2)) {
359 nbuf = (kernel_map->max_offset - kernel_map->min_offset) /
360 (BKVASIZE * 2);
361 printf("Warning: nbufs capped at %d\n", nbuf);
362 }
363
364 nswbuf = max(min(nbuf/4, 256), 16);
365#ifdef NSWBUF_MIN
366 if (nswbuf < NSWBUF_MIN)
367 nswbuf = NSWBUF_MIN;
368#endif
369#ifdef DIRECTIO
370 ffs_rawread_setup();
371#endif
372
373 valloc(swbuf, struct buf, nswbuf);
374 valloc(buf, struct buf, nbuf);
375 v = bufhashinit(v);
376
377 /*
378 * End of first pass, size has been calculated so allocate memory
379 */
380 if (firstaddr == 0) {
381 size = (vm_size_t)(v - firstaddr);
382 firstaddr = (int)kmem_alloc(kernel_map, round_page(size));
383 if (firstaddr == 0)
384 panic("startup: no room for tables");
385 goto again;
386 }
387
388 /*
389 * End of second pass, addresses have been assigned
390 */
391 if ((vm_size_t)(v - firstaddr) != size)
392 panic("startup: table size inconsistency");
393
394 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva,
395 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
396 buffer_map = kmem_suballoc(clean_map, &buffer_sva, &buffer_eva,
397 (nbuf*BKVASIZE));
398 buffer_map->system_map = 1;
399 pager_map = kmem_suballoc(clean_map, &pager_sva, &pager_eva,
400 (nswbuf*MAXPHYS) + pager_map_size);
401 pager_map->system_map = 1;
402 exec_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr,
403 (16*(ARG_MAX+(PAGE_SIZE*3))));
404
405 /*
406 * Finally, allocate mbuf pool. Since mclrefcnt is an off-size
407 * we use the more space efficient malloc in place of kmem_alloc.
408 */
409 {
410 vm_offset_t mb_map_size;
411
412 mb_map_size = nmbufs * MSIZE + nmbclusters * MCLBYTES;
413 mb_map_size = roundup2(mb_map_size, max(MCLBYTES, PAGE_SIZE));
414 mclrefcnt = malloc(mb_map_size / MCLBYTES, M_MBUF, M_NOWAIT);
415 bzero(mclrefcnt, mb_map_size / MCLBYTES);
416 mb_map = kmem_suballoc(kmem_map, (vm_offset_t *)&mbutl, &maxaddr,
417 mb_map_size);
418 mb_map->system_map = 1;
419 }
420
421 /*
422 * Initialize callouts
423 */
424 SLIST_INIT(&callfree);
425 for (i = 0; i < ncallout; i++) {
426 callout_init(&callout[i]);
427 callout[i].c_flags = CALLOUT_LOCAL_ALLOC;
428 SLIST_INSERT_HEAD(&callfree, &callout[i], c_links.sle);
429 }
430
431 for (i = 0; i < callwheelsize; i++) {
432 TAILQ_INIT(&callwheel[i]);
433 }
434
435#if defined(USERCONFIG)
436 userconfig();
437 cninit(); /* the preferred console may have changed */
438#endif
439
12e4aaff
MD
440 printf("avail memory = %u (%uK bytes)\n", ptoa(vmstats.v_free_count),
441 ptoa(vmstats.v_free_count) / 1024);
984263bc
MD
442
443 /*
444 * Set up buffers, so they can be used to read disk labels.
445 */
446 bufinit();
447 vm_pager_bufferinit();
448
449#ifdef SMP
450 /*
451 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
452 */
453 mp_start(); /* fire up the APs and APICs */
454 mp_announce();
455#endif /* SMP */
456 cpu_setregs();
457}
458
984263bc
MD
459/*
460 * Send an interrupt to process.
461 *
462 * Stack is set up to allow sigcode stored
463 * at top to call routine, followed by kcall
464 * to sigreturn routine below. After sigreturn
465 * resets the signal mask, the stack, and the
466 * frame pointer, it returns to the user
467 * specified pc, psl.
468 */
469static void
470osendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
471{
c9faf524
RG
472 struct proc *p = curproc;
473 struct trapframe *regs;
474 struct osigframe *fp;
984263bc
MD
475 struct osigframe sf;
476 struct sigacts *psp = p->p_sigacts;
477 int oonstack;
478
479 regs = p->p_md.md_regs;
480 oonstack = (p->p_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
481
482 /* Allocate and validate space for the signal handler context. */
483 if ((p->p_flag & P_ALTSTACK) && !oonstack &&
484 SIGISMEMBER(psp->ps_sigonstack, sig)) {
485 fp = (struct osigframe *)(p->p_sigstk.ss_sp +
486 p->p_sigstk.ss_size - sizeof(struct osigframe));
487 p->p_sigstk.ss_flags |= SS_ONSTACK;
488 }
489 else
490 fp = (struct osigframe *)regs->tf_esp - 1;
491
492 /* Translate the signal if appropriate */
493 if (p->p_sysent->sv_sigtbl) {
494 if (sig <= p->p_sysent->sv_sigsize)
495 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
496 }
497
498 /* Build the argument list for the signal handler. */
499 sf.sf_signum = sig;
500 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc;
501 if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) {
502 /* Signal handler installed with SA_SIGINFO. */
503 sf.sf_arg2 = (register_t)&fp->sf_siginfo;
504 sf.sf_siginfo.si_signo = sig;
505 sf.sf_siginfo.si_code = code;
506 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher;
507 }
508 else {
509 /* Old FreeBSD-style arguments. */
510 sf.sf_arg2 = code;
511 sf.sf_addr = regs->tf_err;
512 sf.sf_ahu.sf_handler = catcher;
513 }
514
515 /* save scratch registers */
516 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax;
517 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx;
518 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx;
519 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx;
520 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi;
521 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi;
522 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs;
523 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds;
524 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss;
525 sf.sf_siginfo.si_sc.sc_es = regs->tf_es;
526 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs;
527 sf.sf_siginfo.si_sc.sc_gs = rgs();
528 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp;
529
530 /* Build the signal context to be used by sigreturn. */
531 sf.sf_siginfo.si_sc.sc_onstack = oonstack;
532 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask);
533 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp;
534 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp;
535 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip;
536 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags;
537 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno;
538 sf.sf_siginfo.si_sc.sc_err = regs->tf_err;
539
540 /*
541 * If we're a vm86 process, we want to save the segment registers.
542 * We also change eflags to be our emulated eflags, not the actual
543 * eflags.
544 */
545 if (regs->tf_eflags & PSL_VM) {
546 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
b7c628e4 547 struct vm86_kernel *vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
984263bc
MD
548
549 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs;
550 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs;
551 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es;
552 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds;
553
554 if (vm86->vm86_has_vme == 0)
555 sf.sf_siginfo.si_sc.sc_ps =
556 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP))
557 | (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
558 /* see sendsig for comment */
559 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
560 }
561
562 /* Copy the sigframe out to the user's stack. */
563 if (copyout(&sf, fp, sizeof(struct osigframe)) != 0) {
564 /*
565 * Something is wrong with the stack pointer.
566 * ...Kill the process.
567 */
568 sigexit(p, SIGILL);
569 }
570
571 regs->tf_esp = (int)fp;
572 regs->tf_eip = PS_STRINGS - szosigcode;
573 regs->tf_eflags &= ~PSL_T;
574 regs->tf_cs = _ucodesel;
575 regs->tf_ds = _udatasel;
576 regs->tf_es = _udatasel;
577 regs->tf_fs = _udatasel;
578 load_gs(_udatasel);
579 regs->tf_ss = _udatasel;
580}
581
582void
583sendsig(catcher, sig, mask, code)
584 sig_t catcher;
585 int sig;
586 sigset_t *mask;
587 u_long code;
588{
589 struct proc *p = curproc;
590 struct trapframe *regs;
591 struct sigacts *psp = p->p_sigacts;
592 struct sigframe sf, *sfp;
593 int oonstack;
594
595 if (SIGISMEMBER(psp->ps_osigset, sig)) {
596 osendsig(catcher, sig, mask, code);
597 return;
598 }
599
600 regs = p->p_md.md_regs;
601 oonstack = (p->p_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
602
603 /* save user context */
604 bzero(&sf, sizeof(struct sigframe));
605 sf.sf_uc.uc_sigmask = *mask;
606 sf.sf_uc.uc_stack = p->p_sigstk;
607 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
608 sf.sf_uc.uc_mcontext.mc_gs = rgs();
609 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(struct trapframe));
610
611 /* Allocate and validate space for the signal handler context. */
612 if ((p->p_flag & P_ALTSTACK) != 0 && !oonstack &&
613 SIGISMEMBER(psp->ps_sigonstack, sig)) {
614 sfp = (struct sigframe *)(p->p_sigstk.ss_sp +
615 p->p_sigstk.ss_size - sizeof(struct sigframe));
616 p->p_sigstk.ss_flags |= SS_ONSTACK;
617 }
618 else
619 sfp = (struct sigframe *)regs->tf_esp - 1;
620
621 /* Translate the signal is appropriate */
622 if (p->p_sysent->sv_sigtbl) {
623 if (sig <= p->p_sysent->sv_sigsize)
624 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
625 }
626
627 /* Build the argument list for the signal handler. */
628 sf.sf_signum = sig;
629 sf.sf_ucontext = (register_t)&sfp->sf_uc;
630 if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) {
631 /* Signal handler installed with SA_SIGINFO. */
632 sf.sf_siginfo = (register_t)&sfp->sf_si;
633 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
634
635 /* fill siginfo structure */
636 sf.sf_si.si_signo = sig;
637 sf.sf_si.si_code = code;
638 sf.sf_si.si_addr = (void*)regs->tf_err;
639 }
640 else {
641 /* Old FreeBSD-style arguments. */
642 sf.sf_siginfo = code;
643 sf.sf_addr = regs->tf_err;
644 sf.sf_ahu.sf_handler = catcher;
645 }
646
647 /*
648 * If we're a vm86 process, we want to save the segment registers.
649 * We also change eflags to be our emulated eflags, not the actual
650 * eflags.
651 */
652 if (regs->tf_eflags & PSL_VM) {
653 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
b7c628e4 654 struct vm86_kernel *vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
984263bc
MD
655
656 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
657 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
658 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
659 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
660
661 if (vm86->vm86_has_vme == 0)
662 sf.sf_uc.uc_mcontext.mc_eflags =
663 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
664 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
665
666 /*
667 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
668 * syscalls made by the signal handler. This just avoids
669 * wasting time for our lazy fixup of such faults. PSL_NT
670 * does nothing in vm86 mode, but vm86 programs can set it
671 * almost legitimately in probes for old cpu types.
672 */
673 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
674 }
675
676 /*
677 * Copy the sigframe out to the user's stack.
678 */
679 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
680 /*
681 * Something is wrong with the stack pointer.
682 * ...Kill the process.
683 */
684 sigexit(p, SIGILL);
685 }
686
687 regs->tf_esp = (int)sfp;
688 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
689 regs->tf_eflags &= ~PSL_T;
690 regs->tf_cs = _ucodesel;
691 regs->tf_ds = _udatasel;
692 regs->tf_es = _udatasel;
693 regs->tf_fs = _udatasel;
694 load_gs(_udatasel);
695 regs->tf_ss = _udatasel;
696}
697
698/*
41c20dac
MD
699 * osigreturn_args(struct osigcontext *sigcntxp)
700 *
984263bc
MD
701 * System call to cleanup state after a signal
702 * has been taken. Reset signal mask and
703 * stack state from context left by sendsig (above).
704 * Return to previous pc and psl as specified by
705 * context left by sendsig. Check carefully to
706 * make sure that the user has not modified the
707 * state to gain improper privileges.
708 */
709#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
710#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
711
712int
41c20dac 713osigreturn(struct osigreturn_args *uap)
984263bc 714{
41c20dac
MD
715 struct proc *p = curproc;
716 struct osigcontext *scp;
717 struct trapframe *regs = p->p_md.md_regs;
984263bc
MD
718 int eflags;
719
720 scp = uap->sigcntxp;
721
722 if (!useracc((caddr_t)scp, sizeof (struct osigcontext), VM_PROT_READ))
723 return(EFAULT);
724
725 eflags = scp->sc_ps;
726 if (eflags & PSL_VM) {
727 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
728 struct vm86_kernel *vm86;
729
730 /*
731 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
732 * set up the vm86 area, and we can't enter vm86 mode.
733 */
b7c628e4 734 if (p->p_thread->td_pcb->pcb_ext == 0)
984263bc 735 return (EINVAL);
b7c628e4 736 vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
984263bc
MD
737 if (vm86->vm86_inited == 0)
738 return (EINVAL);
739
740 /* go back to user mode if both flags are set */
741 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
742 trapsignal(p, SIGBUS, 0);
743
744 if (vm86->vm86_has_vme) {
745 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
746 (eflags & VME_USERCHANGE) | PSL_VM;
747 } else {
748 vm86->vm86_eflags = eflags; /* save VIF, VIP */
749 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM;
750 }
751 tf->tf_vm86_ds = scp->sc_ds;
752 tf->tf_vm86_es = scp->sc_es;
753 tf->tf_vm86_fs = scp->sc_fs;
754 tf->tf_vm86_gs = scp->sc_gs;
755 tf->tf_ds = _udatasel;
756 tf->tf_es = _udatasel;
757 tf->tf_fs = _udatasel;
758 } else {
759 /*
760 * Don't allow users to change privileged or reserved flags.
761 */
762 /*
763 * XXX do allow users to change the privileged flag PSL_RF.
764 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
765 * should sometimes set it there too. tf_eflags is kept in
766 * the signal context during signal handling and there is no
767 * other place to remember it, so the PSL_RF bit may be
768 * corrupted by the signal handler without us knowing.
769 * Corruption of the PSL_RF bit at worst causes one more or
770 * one less debugger trap, so allowing it is fairly harmless.
771 */
772 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
773 return(EINVAL);
774 }
775
776 /*
777 * Don't allow users to load a valid privileged %cs. Let the
778 * hardware check for invalid selectors, excess privilege in
779 * other selectors, invalid %eip's and invalid %esp's.
780 */
781 if (!CS_SECURE(scp->sc_cs)) {
782 trapsignal(p, SIGBUS, T_PROTFLT);
783 return(EINVAL);
784 }
785 regs->tf_ds = scp->sc_ds;
786 regs->tf_es = scp->sc_es;
787 regs->tf_fs = scp->sc_fs;
788 }
789
790 /* restore scratch registers */
791 regs->tf_eax = scp->sc_eax;
792 regs->tf_ebx = scp->sc_ebx;
793 regs->tf_ecx = scp->sc_ecx;
794 regs->tf_edx = scp->sc_edx;
795 regs->tf_esi = scp->sc_esi;
796 regs->tf_edi = scp->sc_edi;
797 regs->tf_cs = scp->sc_cs;
798 regs->tf_ss = scp->sc_ss;
799 regs->tf_isp = scp->sc_isp;
800
801 if (scp->sc_onstack & 01)
802 p->p_sigstk.ss_flags |= SS_ONSTACK;
803 else
804 p->p_sigstk.ss_flags &= ~SS_ONSTACK;
805
806 SIGSETOLD(p->p_sigmask, scp->sc_mask);
807 SIG_CANTMASK(p->p_sigmask);
808 regs->tf_ebp = scp->sc_fp;
809 regs->tf_esp = scp->sc_sp;
810 regs->tf_eip = scp->sc_pc;
811 regs->tf_eflags = eflags;
812 return(EJUSTRETURN);
813}
814
41c20dac
MD
815/*
816 * sigreturn(ucontext_t *sigcntxp)
817 */
984263bc 818int
41c20dac 819sigreturn(struct sigreturn_args *uap)
984263bc 820{
41c20dac 821 struct proc *p = curproc;
984263bc
MD
822 struct trapframe *regs;
823 ucontext_t *ucp;
824 int cs, eflags;
825
826 ucp = uap->sigcntxp;
827
828 if (!useracc((caddr_t)ucp, sizeof(struct osigcontext), VM_PROT_READ))
829 return (EFAULT);
830 if (((struct osigcontext *)ucp)->sc_trapno == 0x01d516)
41c20dac 831 return (osigreturn((struct osigreturn_args *)uap));
984263bc
MD
832
833 /*
834 * Since ucp is not an osigcontext but a ucontext_t, we have to
835 * check again if all of it is accessible. A ucontext_t is
836 * much larger, so instead of just checking for the pointer
837 * being valid for the size of an osigcontext, now check for
838 * it being valid for a whole, new-style ucontext_t.
839 */
840 if (!useracc((caddr_t)ucp, sizeof(ucontext_t), VM_PROT_READ))
841 return (EFAULT);
842
843 regs = p->p_md.md_regs;
844 eflags = ucp->uc_mcontext.mc_eflags;
845
846 if (eflags & PSL_VM) {
847 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
848 struct vm86_kernel *vm86;
849
850 /*
851 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
852 * set up the vm86 area, and we can't enter vm86 mode.
853 */
b7c628e4 854 if (p->p_thread->td_pcb->pcb_ext == 0)
984263bc 855 return (EINVAL);
b7c628e4 856 vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
984263bc
MD
857 if (vm86->vm86_inited == 0)
858 return (EINVAL);
859
860 /* go back to user mode if both flags are set */
861 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
862 trapsignal(p, SIGBUS, 0);
863
864 if (vm86->vm86_has_vme) {
865 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
866 (eflags & VME_USERCHANGE) | PSL_VM;
867 } else {
868 vm86->vm86_eflags = eflags; /* save VIF, VIP */
869 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM;
870 }
871 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
872 tf->tf_eflags = eflags;
873 tf->tf_vm86_ds = tf->tf_ds;
874 tf->tf_vm86_es = tf->tf_es;
875 tf->tf_vm86_fs = tf->tf_fs;
876 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
877 tf->tf_ds = _udatasel;
878 tf->tf_es = _udatasel;
879 tf->tf_fs = _udatasel;
880 } else {
881 /*
882 * Don't allow users to change privileged or reserved flags.
883 */
884 /*
885 * XXX do allow users to change the privileged flag PSL_RF.
886 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
887 * should sometimes set it there too. tf_eflags is kept in
888 * the signal context during signal handling and there is no
889 * other place to remember it, so the PSL_RF bit may be
890 * corrupted by the signal handler without us knowing.
891 * Corruption of the PSL_RF bit at worst causes one more or
892 * one less debugger trap, so allowing it is fairly harmless.
893 */
894 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
895 printf("sigreturn: eflags = 0x%x\n", eflags);
896 return(EINVAL);
897 }
898
899 /*
900 * Don't allow users to load a valid privileged %cs. Let the
901 * hardware check for invalid selectors, excess privilege in
902 * other selectors, invalid %eip's and invalid %esp's.
903 */
904 cs = ucp->uc_mcontext.mc_cs;
905 if (!CS_SECURE(cs)) {
906 printf("sigreturn: cs = 0x%x\n", cs);
907 trapsignal(p, SIGBUS, T_PROTFLT);
908 return(EINVAL);
909 }
910 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(struct trapframe));
911 }
912
913 if (ucp->uc_mcontext.mc_onstack & 1)
914 p->p_sigstk.ss_flags |= SS_ONSTACK;
915 else
916 p->p_sigstk.ss_flags &= ~SS_ONSTACK;
917
918 p->p_sigmask = ucp->uc_sigmask;
919 SIG_CANTMASK(p->p_sigmask);
920 return(EJUSTRETURN);
921}
922
923/*
924 * Machine dependent boot() routine
925 *
926 * I haven't seen anything to put here yet
927 * Possibly some stuff might be grafted back here from boot()
928 */
929void
930cpu_boot(int howto)
931{
932}
933
934/*
935 * Shutdown the CPU as much as possible
936 */
937void
938cpu_halt(void)
939{
940 for (;;)
941 __asm__ ("hlt");
942}
943
944/*
8ad65e08
MD
945 * cpu_idle() represents the idle LWKT. You cannot return from this function
946 * (unless you want to blow things up!). Instead we look for runnable threads
947 * and loop or halt as appropriate. Giant is not held on entry to the thread.
984263bc 948 *
26a0694b 949 * The main loop is entered with a critical section held, we must release
a2a5ad0d
MD
950 * the critical section before doing anything else. lwkt_switch() will
951 * check for pending interrupts due to entering and exiting its own
952 * critical section.
26a0694b 953 *
a2a5ad0d
MD
954 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI
955 * to wake a HLTed cpu up. However, there are cases where the idlethread
956 * will be entered with the possibility that no IPI will occur and in such
957 * cases lwkt_switch() sets TDF_IDLE_NOHLT.
984263bc 958 */
96728c05 959static int cpu_idle_hlt = 1;
984263bc
MD
960SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
961 &cpu_idle_hlt, 0, "Idle loop HLT enable");
962
963void
964cpu_idle(void)
965{
a2a5ad0d
MD
966 struct thread *td = curthread;
967
26a0694b 968 crit_exit();
a2a5ad0d 969 KKASSERT(td->td_pri < TDPRI_CRIT);
8ad65e08 970 for (;;) {
a2a5ad0d
MD
971 /*
972 * See if there are any LWKTs ready to go.
973 */
8ad65e08 974 lwkt_switch();
a2a5ad0d
MD
975
976 /*
977 * If we are going to halt call splz unconditionally after
978 * CLIing to catch any interrupt races. Note that we are
979 * at SPL0 and interrupts are enabled.
980 */
981 if (cpu_idle_hlt && !lwkt_runnable() &&
982 (td->td_flags & TDF_IDLE_NOHLT) == 0) {
8ad65e08
MD
983 /*
984 * We must guarentee that hlt is exactly the instruction
985 * following the sti.
986 */
a2a5ad0d
MD
987 __asm __volatile("cli");
988 splz();
8ad65e08
MD
989 __asm __volatile("sti; hlt");
990 } else {
a2a5ad0d 991 td->td_flags &= ~TDF_IDLE_NOHLT;
8ad65e08
MD
992 __asm __volatile("sti");
993 }
984263bc
MD
994 }
995}
996
997/*
998 * Clear registers on exec
999 */
1000void
1001setregs(p, entry, stack, ps_strings)
1002 struct proc *p;
1003 u_long entry;
1004 u_long stack;
1005 u_long ps_strings;
1006{
1007 struct trapframe *regs = p->p_md.md_regs;
b7c628e4 1008 struct pcb *pcb = p->p_thread->td_pcb;
984263bc
MD
1009
1010 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
1011 pcb->pcb_gs = _udatasel;
1012 load_gs(_udatasel);
1013
1014#ifdef USER_LDT
1015 /* was i386_user_cleanup() in NetBSD */
1016 user_ldt_free(pcb);
1017#endif
1018
1019 bzero((char *)regs, sizeof(struct trapframe));
1020 regs->tf_eip = entry;
1021 regs->tf_esp = stack;
1022 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
1023 regs->tf_ss = _udatasel;
1024 regs->tf_ds = _udatasel;
1025 regs->tf_es = _udatasel;
1026 regs->tf_fs = _udatasel;
1027 regs->tf_cs = _ucodesel;
1028
1029 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
1030 regs->tf_ebx = ps_strings;
1031
1032 /*
1033 * Reset the hardware debug registers if they were in use.
1034 * They won't have any meaning for the newly exec'd process.
1035 */
1036 if (pcb->pcb_flags & PCB_DBREGS) {
1037 pcb->pcb_dr0 = 0;
1038 pcb->pcb_dr1 = 0;
1039 pcb->pcb_dr2 = 0;
1040 pcb->pcb_dr3 = 0;
1041 pcb->pcb_dr6 = 0;
1042 pcb->pcb_dr7 = 0;
b7c628e4 1043 if (pcb == curthread->td_pcb) {
984263bc
MD
1044 /*
1045 * Clear the debug registers on the running
1046 * CPU, otherwise they will end up affecting
1047 * the next process we switch to.
1048 */
1049 reset_dbregs();
1050 }
1051 pcb->pcb_flags &= ~PCB_DBREGS;
1052 }
1053
1054 /*
1055 * Initialize the math emulator (if any) for the current process.
1056 * Actually, just clear the bit that says that the emulator has
1057 * been initialized. Initialization is delayed until the process
1058 * traps to the emulator (if it is done at all) mainly because
1059 * emulators don't provide an entry point for initialization.
1060 */
b7c628e4 1061 p->p_thread->td_pcb->pcb_flags &= ~FP_SOFTFP;
984263bc
MD
1062
1063 /*
1064 * Arrange to trap the next npx or `fwait' instruction (see npx.c
1065 * for why fwait must be trapped at least if there is an npx or an
1066 * emulator). This is mainly to handle the case where npx0 is not
1067 * configured, since the npx routines normally set up the trap
1068 * otherwise. It should be done only at boot time, but doing it
1069 * here allows modifying `npx_exists' for testing the emulator on
1070 * systems with an npx.
1071 */
1072 load_cr0(rcr0() | CR0_MP | CR0_TS);
1073
1074#if NNPX > 0
1075 /* Initialize the npx (if any) for the current process. */
1076 npxinit(__INITIAL_NPXCW__);
1077#endif
1078
90b9818c
MD
1079 /*
1080 * note: linux emulator needs edx to be 0x0 on entry, which is
1081 * handled in execve simply by leaving the return value(s) 0.
1082 */
984263bc
MD
1083}
1084
1085void
1086cpu_setregs(void)
1087{
1088 unsigned int cr0;
1089
1090 cr0 = rcr0();
1091 cr0 |= CR0_NE; /* Done by npxinit() */
1092 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1093#ifdef I386_CPU
1094 if (cpu_class != CPUCLASS_386)
1095#endif
1096 cr0 |= CR0_WP | CR0_AM;
1097 load_cr0(cr0);
1098 load_gs(_udatasel);
1099}
1100
1101static int
1102sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1103{
1104 int error;
1105 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1106 req);
1107 if (!error && req->newptr)
1108 resettodr();
1109 return (error);
1110}
1111
1112SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1113 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1114
1115SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1116 CTLFLAG_RW, &disable_rtc_set, 0, "");
1117
1118SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1119 CTLFLAG_RD, &bootinfo, bootinfo, "");
1120
1121SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1122 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1123
1124extern u_long bootdev; /* not a dev_t - encoding is different */
1125SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1126 CTLFLAG_RD, &bootdev, 0, "Boot device (not in dev_t format)");
1127
1128/*
1129 * Initialize 386 and configure to run kernel
1130 */
1131
1132/*
1133 * Initialize segments & interrupt table
1134 */
1135
1136int _default_ldt;
1137union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1138static struct gate_descriptor idt0[NIDT];
1139struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1140union descriptor ldt[NLDT]; /* local descriptor table */
17a9f566
MD
1141
1142/* table descriptors - used to load tables by cpu */
984263bc 1143struct region_descriptor r_gdt, r_idt;
984263bc 1144
984263bc
MD
1145#if defined(I586_CPU) && !defined(NO_F00F_HACK)
1146extern int has_f00f_bug;
1147#endif
1148
1149static struct i386tss dblfault_tss;
1150static char dblfault_stack[PAGE_SIZE];
1151
1152extern struct user *proc0paddr;
1153
1154
1155/* software prototypes -- in more palatable form */
1156struct soft_segment_descriptor gdt_segs[] = {
1157/* GNULL_SEL 0 Null Descriptor */
1158{ 0x0, /* segment base address */
1159 0x0, /* length */
1160 0, /* segment type */
1161 0, /* segment descriptor priority level */
1162 0, /* segment descriptor present */
1163 0, 0,
1164 0, /* default 32 vs 16 bit size */
1165 0 /* limit granularity (byte/page units)*/ },
1166/* GCODE_SEL 1 Code Descriptor for kernel */
1167{ 0x0, /* segment base address */
1168 0xfffff, /* length - all address space */
1169 SDT_MEMERA, /* segment type */
1170 0, /* segment descriptor priority level */
1171 1, /* segment descriptor present */
1172 0, 0,
1173 1, /* default 32 vs 16 bit size */
1174 1 /* limit granularity (byte/page units)*/ },
1175/* GDATA_SEL 2 Data Descriptor for kernel */
1176{ 0x0, /* segment base address */
1177 0xfffff, /* length - all address space */
1178 SDT_MEMRWA, /* segment type */
1179 0, /* segment descriptor priority level */
1180 1, /* segment descriptor present */
1181 0, 0,
1182 1, /* default 32 vs 16 bit size */
1183 1 /* limit granularity (byte/page units)*/ },
1184/* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
1185{ 0x0, /* segment base address */
1186 0xfffff, /* length - all address space */
1187 SDT_MEMRWA, /* segment type */
1188 0, /* segment descriptor priority level */
1189 1, /* segment descriptor present */
1190 0, 0,
1191 1, /* default 32 vs 16 bit size */
1192 1 /* limit granularity (byte/page units)*/ },
1193/* GPROC0_SEL 4 Proc 0 Tss Descriptor */
1194{
1195 0x0, /* segment base address */
1196 sizeof(struct i386tss)-1,/* length - all address space */
1197 SDT_SYS386TSS, /* segment type */
1198 0, /* segment descriptor priority level */
1199 1, /* segment descriptor present */
1200 0, 0,
1201 0, /* unused - default 32 vs 16 bit size */
1202 0 /* limit granularity (byte/page units)*/ },
1203/* GLDT_SEL 5 LDT Descriptor */
1204{ (int) ldt, /* segment base address */
1205 sizeof(ldt)-1, /* length - all address space */
1206 SDT_SYSLDT, /* segment type */
1207 SEL_UPL, /* segment descriptor priority level */
1208 1, /* segment descriptor present */
1209 0, 0,
1210 0, /* unused - default 32 vs 16 bit size */
1211 0 /* limit granularity (byte/page units)*/ },
1212/* GUSERLDT_SEL 6 User LDT Descriptor per process */
1213{ (int) ldt, /* segment base address */
1214 (512 * sizeof(union descriptor)-1), /* length */
1215 SDT_SYSLDT, /* segment type */
1216 0, /* segment descriptor priority level */
1217 1, /* segment descriptor present */
1218 0, 0,
1219 0, /* unused - default 32 vs 16 bit size */
1220 0 /* limit granularity (byte/page units)*/ },
1221/* GTGATE_SEL 7 Null Descriptor - Placeholder */
1222{ 0x0, /* segment base address */
1223 0x0, /* length - all address space */
1224 0, /* segment type */
1225 0, /* segment descriptor priority level */
1226 0, /* segment descriptor present */
1227 0, 0,
1228 0, /* default 32 vs 16 bit size */
1229 0 /* limit granularity (byte/page units)*/ },
1230/* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1231{ 0x400, /* segment base address */
1232 0xfffff, /* length */
1233 SDT_MEMRWA, /* segment type */
1234 0, /* segment descriptor priority level */
1235 1, /* segment descriptor present */
1236 0, 0,
1237 1, /* default 32 vs 16 bit size */
1238 1 /* limit granularity (byte/page units)*/ },
1239/* GPANIC_SEL 9 Panic Tss Descriptor */
1240{ (int) &dblfault_tss, /* segment base address */
1241 sizeof(struct i386tss)-1,/* length - all address space */
1242 SDT_SYS386TSS, /* segment type */
1243 0, /* segment descriptor priority level */
1244 1, /* segment descriptor present */
1245 0, 0,
1246 0, /* unused - default 32 vs 16 bit size */
1247 0 /* limit granularity (byte/page units)*/ },
1248/* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1249{ 0, /* segment base address (overwritten) */
1250 0xfffff, /* length */
1251 SDT_MEMERA, /* segment type */
1252 0, /* segment descriptor priority level */
1253 1, /* segment descriptor present */
1254 0, 0,
1255 0, /* default 32 vs 16 bit size */
1256 1 /* limit granularity (byte/page units)*/ },
1257/* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1258{ 0, /* segment base address (overwritten) */
1259 0xfffff, /* length */
1260 SDT_MEMERA, /* segment type */
1261 0, /* segment descriptor priority level */
1262 1, /* segment descriptor present */
1263 0, 0,
1264 0, /* default 32 vs 16 bit size */
1265 1 /* limit granularity (byte/page units)*/ },
1266/* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1267{ 0, /* segment base address (overwritten) */
1268 0xfffff, /* length */
1269 SDT_MEMRWA, /* segment type */
1270 0, /* segment descriptor priority level */
1271 1, /* segment descriptor present */
1272 0, 0,
1273 1, /* default 32 vs 16 bit size */
1274 1 /* limit granularity (byte/page units)*/ },
1275/* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1276{ 0, /* segment base address (overwritten) */
1277 0xfffff, /* length */
1278 SDT_MEMRWA, /* segment type */
1279 0, /* segment descriptor priority level */
1280 1, /* segment descriptor present */
1281 0, 0,
1282 0, /* default 32 vs 16 bit size */
1283 1 /* limit granularity (byte/page units)*/ },
1284/* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1285{ 0, /* segment base address (overwritten) */
1286 0xfffff, /* length */
1287 SDT_MEMRWA, /* segment type */
1288 0, /* segment descriptor priority level */
1289 1, /* segment descriptor present */
1290 0, 0,
1291 0, /* default 32 vs 16 bit size */
1292 1 /* limit granularity (byte/page units)*/ },
1293};
1294
1295static struct soft_segment_descriptor ldt_segs[] = {
1296 /* Null Descriptor - overwritten by call gate */
1297{ 0x0, /* segment base address */
1298 0x0, /* length - all address space */
1299 0, /* segment type */
1300 0, /* segment descriptor priority level */
1301 0, /* segment descriptor present */
1302 0, 0,
1303 0, /* default 32 vs 16 bit size */
1304 0 /* limit granularity (byte/page units)*/ },
1305 /* Null Descriptor - overwritten by call gate */
1306{ 0x0, /* segment base address */
1307 0x0, /* length - all address space */
1308 0, /* segment type */
1309 0, /* segment descriptor priority level */
1310 0, /* segment descriptor present */
1311 0, 0,
1312 0, /* default 32 vs 16 bit size */
1313 0 /* limit granularity (byte/page units)*/ },
1314 /* Null Descriptor - overwritten by call gate */
1315{ 0x0, /* segment base address */
1316 0x0, /* length - all address space */
1317 0, /* segment type */
1318 0, /* segment descriptor priority level */
1319 0, /* segment descriptor present */
1320 0, 0,
1321 0, /* default 32 vs 16 bit size */
1322 0 /* limit granularity (byte/page units)*/ },
1323 /* Code Descriptor for user */
1324{ 0x0, /* segment base address */
1325 0xfffff, /* length - all address space */
1326 SDT_MEMERA, /* segment type */
1327 SEL_UPL, /* segment descriptor priority level */
1328 1, /* segment descriptor present */
1329 0, 0,
1330 1, /* default 32 vs 16 bit size */
1331 1 /* limit granularity (byte/page units)*/ },
1332 /* Null Descriptor - overwritten by call gate */
1333{ 0x0, /* segment base address */
1334 0x0, /* length - all address space */
1335 0, /* segment type */
1336 0, /* segment descriptor priority level */
1337 0, /* segment descriptor present */
1338 0, 0,
1339 0, /* default 32 vs 16 bit size */
1340 0 /* limit granularity (byte/page units)*/ },
1341 /* Data Descriptor for user */
1342{ 0x0, /* segment base address */
1343 0xfffff, /* length - all address space */
1344 SDT_MEMRWA, /* segment type */
1345 SEL_UPL, /* segment descriptor priority level */
1346 1, /* segment descriptor present */
1347 0, 0,
1348 1, /* default 32 vs 16 bit size */
1349 1 /* limit granularity (byte/page units)*/ },
1350};
1351
1352void
1353setidt(idx, func, typ, dpl, selec)
1354 int idx;
1355 inthand_t *func;
1356 int typ;
1357 int dpl;
1358 int selec;
1359{
1360 struct gate_descriptor *ip;
1361
1362 ip = idt + idx;
1363 ip->gd_looffset = (int)func;
1364 ip->gd_selector = selec;
1365 ip->gd_stkcpy = 0;
1366 ip->gd_xx = 0;
1367 ip->gd_type = typ;
1368 ip->gd_dpl = dpl;
1369 ip->gd_p = 1;
1370 ip->gd_hioffset = ((int)func)>>16 ;
1371}
1372
1373#define IDTVEC(name) __CONCAT(X,name)
1374
1375extern inthand_t
1376 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1377 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1378 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1379 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
a64ba182
MD
1380 IDTVEC(xmm), IDTVEC(syscall);
1381extern inthand_t
1382 IDTVEC(int0x80_syscall), IDTVEC(int0x81_syscall);
984263bc
MD
1383
1384void
1385sdtossd(sd, ssd)
1386 struct segment_descriptor *sd;
1387 struct soft_segment_descriptor *ssd;
1388{
1389 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1390 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1391 ssd->ssd_type = sd->sd_type;
1392 ssd->ssd_dpl = sd->sd_dpl;
1393 ssd->ssd_p = sd->sd_p;
1394 ssd->ssd_def32 = sd->sd_def32;
1395 ssd->ssd_gran = sd->sd_gran;
1396}
1397
1398#define PHYSMAP_SIZE (2 * 8)
1399
1400/*
1401 * Populate the (physmap) array with base/bound pairs describing the
1402 * available physical memory in the system, then test this memory and
1403 * build the phys_avail array describing the actually-available memory.
1404 *
1405 * If we cannot accurately determine the physical memory map, then use
1406 * value from the 0xE801 call, and failing that, the RTC.
1407 *
1408 * Total memory size may be set by the kernel environment variable
1409 * hw.physmem or the compile-time define MAXMEM.
1410 */
1411static void
1412getmemsize(int first)
1413{
1414 int i, physmap_idx, pa_indx;
1415 int hasbrokenint12;
1416 u_int basemem, extmem;
1417 struct vm86frame vmf;
1418 struct vm86context vmc;
1419 vm_offset_t pa, physmap[PHYSMAP_SIZE];
1420 pt_entry_t pte;
1421 const char *cp;
1422 struct {
1423 u_int64_t base;
1424 u_int64_t length;
1425 u_int32_t type;
1426 } *smap;
1427
1428 hasbrokenint12 = 0;
1429 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1430 bzero(&vmf, sizeof(struct vm86frame));
1431 bzero(physmap, sizeof(physmap));
1432 basemem = 0;
1433
1434 /*
1435 * Some newer BIOSes has broken INT 12H implementation which cause
1436 * kernel panic immediately. In this case, we need to scan SMAP
1437 * with INT 15:E820 first, then determine base memory size.
1438 */
1439 if (hasbrokenint12) {
1440 goto int15e820;
1441 }
1442
1443 /*
1444 * Perform "base memory" related probes & setup
1445 */
1446 vm86_intcall(0x12, &vmf);
1447 basemem = vmf.vmf_ax;
1448 if (basemem > 640) {
1449 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1450 basemem);
1451 basemem = 640;
1452 }
1453
1454 /*
1455 * XXX if biosbasemem is now < 640, there is a `hole'
1456 * between the end of base memory and the start of
1457 * ISA memory. The hole may be empty or it may
1458 * contain BIOS code or data. Map it read/write so
1459 * that the BIOS can write to it. (Memory from 0 to
1460 * the physical end of the kernel is mapped read-only
1461 * to begin with and then parts of it are remapped.
1462 * The parts that aren't remapped form holes that
1463 * remain read-only and are unused by the kernel.
1464 * The base memory area is below the physical end of
1465 * the kernel and right now forms a read-only hole.
1466 * The part of it from PAGE_SIZE to
1467 * (trunc_page(biosbasemem * 1024) - 1) will be
1468 * remapped and used by the kernel later.)
1469 *
1470 * This code is similar to the code used in
1471 * pmap_mapdev, but since no memory needs to be
1472 * allocated we simply change the mapping.
1473 */
1474 for (pa = trunc_page(basemem * 1024);
1475 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1476 pte = (pt_entry_t)vtopte(pa + KERNBASE);
1477 *pte = pa | PG_RW | PG_V;
1478 }
1479
1480 /*
1481 * if basemem != 640, map pages r/w into vm86 page table so
1482 * that the bios can scribble on it.
1483 */
1484 pte = (pt_entry_t)vm86paddr;
1485 for (i = basemem / 4; i < 160; i++)
1486 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1487
1488int15e820:
1489 /*
1490 * map page 1 R/W into the kernel page table so we can use it
1491 * as a buffer. The kernel will unmap this page later.
1492 */
1493 pte = (pt_entry_t)vtopte(KERNBASE + (1 << PAGE_SHIFT));
1494 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1495
1496 /*
1497 * get memory map with INT 15:E820
1498 */
1499#define SMAPSIZ sizeof(*smap)
1500#define SMAP_SIG 0x534D4150 /* 'SMAP' */
1501
1502 vmc.npages = 0;
1503 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1504 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1505
1506 physmap_idx = 0;
1507 vmf.vmf_ebx = 0;
1508 do {
1509 vmf.vmf_eax = 0xE820;
1510 vmf.vmf_edx = SMAP_SIG;
1511 vmf.vmf_ecx = SMAPSIZ;
1512 i = vm86_datacall(0x15, &vmf, &vmc);
1513 if (i || vmf.vmf_eax != SMAP_SIG)
1514 break;
1515 if (boothowto & RB_VERBOSE)
1516 printf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1517 smap->type,
1518 *(u_int32_t *)((char *)&smap->base + 4),
1519 (u_int32_t)smap->base,
1520 *(u_int32_t *)((char *)&smap->length + 4),
1521 (u_int32_t)smap->length);
1522
1523 if (smap->type != 0x01)
1524 goto next_run;
1525
1526 if (smap->length == 0)
1527 goto next_run;
1528
1529 if (smap->base >= 0xffffffff) {
1530 printf("%uK of memory above 4GB ignored\n",
1531 (u_int)(smap->length / 1024));
1532 goto next_run;
1533 }
1534
1535 for (i = 0; i <= physmap_idx; i += 2) {
1536 if (smap->base < physmap[i + 1]) {
1537 if (boothowto & RB_VERBOSE)
1538 printf(
1539 "Overlapping or non-montonic memory region, ignoring second region\n");
1540 goto next_run;
1541 }
1542 }
1543
1544 if (smap->base == physmap[physmap_idx + 1]) {
1545 physmap[physmap_idx + 1] += smap->length;
1546 goto next_run;
1547 }
1548
1549 physmap_idx += 2;
1550 if (physmap_idx == PHYSMAP_SIZE) {
1551 printf(
1552 "Too many segments in the physical address map, giving up\n");
1553 break;
1554 }
1555 physmap[physmap_idx] = smap->base;
1556 physmap[physmap_idx + 1] = smap->base + smap->length;
1557next_run:
1558 } while (vmf.vmf_ebx != 0);
1559
1560 /*
1561 * Perform "base memory" related probes & setup based on SMAP
1562 */
1563 if (basemem == 0) {
1564 for (i = 0; i <= physmap_idx; i += 2) {
1565 if (physmap[i] == 0x00000000) {
1566 basemem = physmap[i + 1] / 1024;
1567 break;
1568 }
1569 }
1570
1571 if (basemem == 0) {
1572 basemem = 640;
1573 }
1574
1575 if (basemem > 640) {
1576 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1577 basemem);
1578 basemem = 640;
1579 }
1580
1581 for (pa = trunc_page(basemem * 1024);
1582 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1583 pte = (pt_entry_t)vtopte(pa + KERNBASE);
1584 *pte = pa | PG_RW | PG_V;
1585 }
1586
1587 pte = (pt_entry_t)vm86paddr;
1588 for (i = basemem / 4; i < 160; i++)
1589 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1590 }
1591
1592 if (physmap[1] != 0)
1593 goto physmap_done;
1594
1595 /*
1596 * If we failed above, try memory map with INT 15:E801
1597 */
1598 vmf.vmf_ax = 0xE801;
1599 if (vm86_intcall(0x15, &vmf) == 0) {
1600 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1601 } else {
1602#if 0
1603 vmf.vmf_ah = 0x88;
1604 vm86_intcall(0x15, &vmf);
1605 extmem = vmf.vmf_ax;
1606#else
1607 /*
1608 * Prefer the RTC value for extended memory.
1609 */
1610 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1611#endif
1612 }
1613
1614 /*
1615 * Special hack for chipsets that still remap the 384k hole when
1616 * there's 16MB of memory - this really confuses people that
1617 * are trying to use bus mastering ISA controllers with the
1618 * "16MB limit"; they only have 16MB, but the remapping puts
1619 * them beyond the limit.
1620 *
1621 * If extended memory is between 15-16MB (16-17MB phys address range),
1622 * chop it to 15MB.
1623 */
1624 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1625 extmem = 15 * 1024;
1626
1627 physmap[0] = 0;
1628 physmap[1] = basemem * 1024;
1629 physmap_idx = 2;
1630 physmap[physmap_idx] = 0x100000;
1631 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1632
1633physmap_done:
1634 /*
1635 * Now, physmap contains a map of physical memory.
1636 */
1637
1638#ifdef SMP
17a9f566 1639 /* make hole for AP bootstrap code YYY */
984263bc
MD
1640 physmap[1] = mp_bootaddress(physmap[1] / 1024);
1641
1642 /* look for the MP hardware - needed for apic addresses */
1643 mp_probe();
1644#endif
1645
1646 /*
1647 * Maxmem isn't the "maximum memory", it's one larger than the
1648 * highest page of the physical address space. It should be
1649 * called something like "Maxphyspage". We may adjust this
1650 * based on ``hw.physmem'' and the results of the memory test.
1651 */
1652 Maxmem = atop(physmap[physmap_idx + 1]);
1653
1654#ifdef MAXMEM
1655 Maxmem = MAXMEM / 4;
1656#endif
1657
1658 /*
1659 * hw.maxmem is a size in bytes; we also allow k, m, and g suffixes
1660 * for the appropriate modifiers. This overrides MAXMEM.
1661 */
1662 if ((cp = getenv("hw.physmem")) != NULL) {
1663 u_int64_t AllowMem, sanity;
1664 char *ep;
1665
1666 sanity = AllowMem = strtouq(cp, &ep, 0);
1667 if ((ep != cp) && (*ep != 0)) {
1668 switch(*ep) {
1669 case 'g':
1670 case 'G':
1671 AllowMem <<= 10;
1672 case 'm':
1673 case 'M':
1674 AllowMem <<= 10;
1675 case 'k':
1676 case 'K':
1677 AllowMem <<= 10;
1678 break;
1679 default:
1680 AllowMem = sanity = 0;
1681 }
1682 if (AllowMem < sanity)
1683 AllowMem = 0;
1684 }
1685 if (AllowMem == 0)
1686 printf("Ignoring invalid memory size of '%s'\n", cp);
1687 else
1688 Maxmem = atop(AllowMem);
1689 }
1690
1691 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1692 (boothowto & RB_VERBOSE))
1693 printf("Physical memory use set to %uK\n", Maxmem * 4);
1694
1695 /*
1696 * If Maxmem has been increased beyond what the system has detected,
1697 * extend the last memory segment to the new limit.
1698 */
1699 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1700 physmap[physmap_idx + 1] = ptoa(Maxmem);
1701
1702 /* call pmap initialization to make new kernel address space */
1703 pmap_bootstrap(first, 0);
1704
1705 /*
1706 * Size up each available chunk of physical memory.
1707 */
1708 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1709 pa_indx = 0;
1710 phys_avail[pa_indx++] = physmap[0];
1711 phys_avail[pa_indx] = physmap[0];
1712#if 0
1713 pte = (pt_entry_t)vtopte(KERNBASE);
1714#else
1715 pte = (pt_entry_t)CMAP1;
1716#endif
1717
1718 /*
1719 * physmap is in bytes, so when converting to page boundaries,
1720 * round up the start address and round down the end address.
1721 */
1722 for (i = 0; i <= physmap_idx; i += 2) {
1723 vm_offset_t end;
1724
1725 end = ptoa(Maxmem);
1726 if (physmap[i + 1] < end)
1727 end = trunc_page(physmap[i + 1]);
1728 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1729 int tmp, page_bad;
1730#if 0
1731 int *ptr = 0;
1732#else
1733 int *ptr = (int *)CADDR1;
1734#endif
1735
1736 /*
1737 * block out kernel memory as not available.
1738 */
1739 if (pa >= 0x100000 && pa < first)
1740 continue;
1741
1742 page_bad = FALSE;
1743
1744 /*
1745 * map page into kernel: valid, read/write,non-cacheable
1746 */
1747 *pte = pa | PG_V | PG_RW | PG_N;
1748 invltlb();
1749
1750 tmp = *(int *)ptr;
1751 /*
1752 * Test for alternating 1's and 0's
1753 */
1754 *(volatile int *)ptr = 0xaaaaaaaa;
1755 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1756 page_bad = TRUE;
1757 }
1758 /*
1759 * Test for alternating 0's and 1's
1760 */
1761 *(volatile int *)ptr = 0x55555555;
1762 if (*(volatile int *)ptr != 0x55555555) {
1763 page_bad = TRUE;
1764 }
1765 /*
1766 * Test for all 1's
1767 */
1768 *(volatile int *)ptr = 0xffffffff;
1769 if (*(volatile int *)ptr != 0xffffffff) {
1770 page_bad = TRUE;
1771 }
1772 /*
1773 * Test for all 0's
1774 */
1775 *(volatile int *)ptr = 0x0;
1776 if (*(volatile int *)ptr != 0x0) {
1777 page_bad = TRUE;
1778 }
1779 /*
1780 * Restore original value.
1781 */
1782 *(int *)ptr = tmp;
1783
1784 /*
1785 * Adjust array of valid/good pages.
1786 */
1787 if (page_bad == TRUE) {
1788 continue;
1789 }
1790 /*
1791 * If this good page is a continuation of the
1792 * previous set of good pages, then just increase
1793 * the end pointer. Otherwise start a new chunk.
1794 * Note that "end" points one higher than end,
1795 * making the range >= start and < end.
1796 * If we're also doing a speculative memory
1797 * test and we at or past the end, bump up Maxmem
1798 * so that we keep going. The first bad page
1799 * will terminate the loop.
1800 */
1801 if (phys_avail[pa_indx] == pa) {
1802 phys_avail[pa_indx] += PAGE_SIZE;
1803 } else {
1804 pa_indx++;
1805 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1806 printf("Too many holes in the physical address space, giving up\n");
1807 pa_indx--;
1808 break;
1809 }
1810 phys_avail[pa_indx++] = pa; /* start */
1811 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1812 }
1813 physmem++;
1814 }
1815 }
1816 *pte = 0;
1817 invltlb();
1818
1819 /*
1820 * XXX
1821 * The last chunk must contain at least one page plus the message
1822 * buffer to avoid complicating other code (message buffer address
1823 * calculation, etc.).
1824 */
1825 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1826 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1827 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1828 phys_avail[pa_indx--] = 0;
1829 phys_avail[pa_indx--] = 0;
1830 }
1831
1832 Maxmem = atop(phys_avail[pa_indx]);
1833
1834 /* Trim off space for the message buffer. */
1835 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1836
1837 avail_end = phys_avail[pa_indx];
1838}
1839
1840void
17a9f566 1841init386(int first)
984263bc
MD
1842{
1843 struct gate_descriptor *gdp;
1844 int gsel_tss, metadata_missing, off, x;
85100692 1845 struct mdglobaldata *gd;
984263bc
MD
1846
1847 /*
1848 * Prevent lowering of the ipl if we call tsleep() early.
1849 */
85100692 1850 gd = &CPU_prvspace[0].mdglobaldata;
8a8d5d85 1851 bzero(gd, sizeof(*gd));
984263bc 1852
85100692 1853 gd->mi.gd_curthread = &thread0;
984263bc
MD
1854
1855 atdevbase = ISA_HOLE_START + KERNBASE;
1856
1857 metadata_missing = 0;
1858 if (bootinfo.bi_modulep) {
1859 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1860 preload_bootstrap_relocate(KERNBASE);
1861 } else {
1862 metadata_missing = 1;
1863 }
1864 if (bootinfo.bi_envp)
1865 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1866
4e8e646b
MD
1867 /* start with one cpu */
1868 ncpus = 1;
984263bc
MD
1869 /* Init basic tunables, hz etc */
1870 init_param1();
1871
1872 /*
1873 * make gdt memory segments, the code segment goes up to end of the
1874 * page with etext in it, the data segment goes to the end of
1875 * the address space
1876 */
1877 /*
1878 * XXX text protection is temporarily (?) disabled. The limit was
1879 * i386_btop(round_page(etext)) - 1.
1880 */
1881 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1882 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
17a9f566 1883
984263bc
MD
1884 gdt_segs[GPRIV_SEL].ssd_limit =
1885 atop(sizeof(struct privatespace) - 1);
8ad65e08 1886 gdt_segs[GPRIV_SEL].ssd_base = (int) &CPU_prvspace[0];
984263bc 1887 gdt_segs[GPROC0_SEL].ssd_base =
85100692 1888 (int) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
17a9f566 1889
85100692 1890 gd->mi.gd_prvspace = &CPU_prvspace[0];
17a9f566 1891
84b592ba
MD
1892 /*
1893 * Note: on both UP and SMP curthread must be set non-NULL
1894 * early in the boot sequence because the system assumes
1895 * that 'curthread' is never NULL.
1896 */
984263bc
MD
1897
1898 for (x = 0; x < NGDT; x++) {
1899#ifdef BDE_DEBUGGER
1900 /* avoid overwriting db entries with APM ones */
1901 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
1902 continue;
1903#endif
1904 ssdtosd(&gdt_segs[x], &gdt[x].sd);
1905 }
1906
1907 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1908 r_gdt.rd_base = (int) gdt;
1909 lgdt(&r_gdt);
1910
73e4f7b9
MD
1911 mi_gdinit(&gd->mi, 0);
1912 cpu_gdinit(gd, 0);
1913 lwkt_init_thread(&thread0, proc0paddr, 0, &gd->mi);
1914 lwkt_set_comm(&thread0, "thread0");
1915 proc0.p_addr = (void *)thread0.td_kstack;
1916 proc0.p_thread = &thread0;
a2a5ad0d 1917 proc0.p_flag |= P_CP_RELEASED; /* early set. See also init_main.c */
d9eea1a5 1918 thread0.td_flags |= TDF_RUNNING;
73e4f7b9
MD
1919 thread0.td_proc = &proc0;
1920 thread0.td_switch = cpu_heavy_switch; /* YYY eventually LWKT */
1921 safepri = thread0.td_cpl = SWI_MASK | HWI_MASK;
1922
984263bc
MD
1923 /* make ldt memory segments */
1924 /*
1925 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it
1926 * should be spelled ...MAX_USER...
1927 */
1928 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1929 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1930 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
1931 ssdtosd(&ldt_segs[x], &ldt[x].sd);
1932
1933 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
1934 lldt(_default_ldt);
1935#ifdef USER_LDT
17a9f566 1936 gd->gd_currentldt = _default_ldt;
984263bc 1937#endif
8a8d5d85
MD
1938 /* spinlocks and the BGL */
1939 init_locks();
984263bc
MD
1940
1941 /* exceptions */
1942 for (x = 0; x < NIDT; x++)
1943 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1944 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1945 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1946 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1947 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1948 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1949 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1950 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1951 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1952 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
1953 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1954 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1955 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1956 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1957 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1958 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1959 setidt(15, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1960 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1961 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1962 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1963 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1964 setidt(0x80, &IDTVEC(int0x80_syscall),
1965 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
a64ba182
MD
1966 setidt(0x81, &IDTVEC(int0x81_syscall),
1967 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
984263bc
MD
1968
1969 r_idt.rd_limit = sizeof(idt0) - 1;
1970 r_idt.rd_base = (int) idt;
1971 lidt(&r_idt);
1972
1973 /*
1974 * Initialize the console before we print anything out.
1975 */
1976 cninit();
1977
1978 if (metadata_missing)
1979 printf("WARNING: loader(8) metadata is missing!\n");
1980
984263bc
MD
1981#if NISA >0
1982 isa_defaultirq();
1983#endif
1984 rand_initialize();
1985
1986#ifdef DDB
1987 kdb_init();
1988 if (boothowto & RB_KDB)
1989 Debugger("Boot flags requested debugger");
1990#endif
1991
1992 finishidentcpu(); /* Final stage of CPU initialization */
1993 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1994 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1995 initializecpu(); /* Initialize CPU registers */
1996
b7c628e4
MD
1997 /*
1998 * make an initial tss so cpu can get interrupt stack on syscall!
1999 * The 16 bytes is to save room for a VM86 context.
2000 */
17a9f566
MD
2001 gd->gd_common_tss.tss_esp0 = (int) thread0.td_pcb - 16;
2002 gd->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
984263bc 2003 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
17a9f566
MD
2004 gd->gd_tss_gdt = &gdt[GPROC0_SEL].sd;
2005 gd->gd_common_tssd = *gd->gd_tss_gdt;
85100692 2006 gd->gd_common_tss.tss_ioopt = (sizeof gd->gd_common_tss) << 16;
984263bc
MD
2007 ltr(gsel_tss);
2008
2009 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2010 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
2011 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2012 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2013 dblfault_tss.tss_cr3 = (int)IdlePTD;
2014 dblfault_tss.tss_eip = (int) dblfault_handler;
2015 dblfault_tss.tss_eflags = PSL_KERNEL;
2016 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2017 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2018 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2019 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2020 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2021
2022 vm86_initialize();
2023 getmemsize(first);
2024 init_param2(physmem);
2025
2026 /* now running on new page tables, configured,and u/iom is accessible */
2027
2028 /* Map the message buffer. */
2029 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
2030 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
2031
2032 msgbufinit(msgbufp, MSGBUF_SIZE);
2033
2034 /* make a call gate to reenter kernel with */
2035 gdp = &ldt[LSYS5CALLS_SEL].gd;
2036
2037 x = (int) &IDTVEC(syscall);
2038 gdp->gd_looffset = x++;
2039 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2040 gdp->gd_stkcpy = 1;
2041 gdp->gd_type = SDT_SYS386CGT;
2042 gdp->gd_dpl = SEL_UPL;
2043 gdp->gd_p = 1;
2044 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
2045
2046 /* XXX does this work? */
2047 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2048 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2049
2050 /* transfer to user mode */
2051
2052 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
2053 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
2054
2055 /* setup proc 0's pcb */
b7c628e4
MD
2056 thread0.td_pcb->pcb_flags = 0;
2057 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; /* should already be setup */
b7c628e4 2058 thread0.td_pcb->pcb_ext = 0;
984263bc
MD
2059 proc0.p_md.md_regs = &proc0_tf;
2060}
2061
8ad65e08 2062/*
17a9f566
MD
2063 * Initialize machine-dependant portions of the global data structure.
2064 * Note that the global data area and cpu0's idlestack in the private
2065 * data space were allocated in locore.
ef0fdad1
MD
2066 *
2067 * Note: the idlethread's cpl is 0
73e4f7b9
MD
2068 *
2069 * WARNING! Called from early boot, 'mycpu' may not work yet.
8ad65e08
MD
2070 */
2071void
85100692 2072cpu_gdinit(struct mdglobaldata *gd, int cpu)
8ad65e08
MD
2073{
2074 char *sp;
8ad65e08 2075
7d0bac62 2076 if (cpu)
a2a5ad0d 2077 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
17a9f566 2078
85100692 2079 sp = gd->mi.gd_prvspace->idlestack;
a2a5ad0d
MD
2080 lwkt_init_thread(&gd->mi.gd_idlethread, sp, 0, &gd->mi);
2081 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
2082 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
2083 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
2084 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
8ad65e08
MD
2085}
2086
12e4aaff
MD
2087struct globaldata *
2088globaldata_find(int cpu)
2089{
2090 KKASSERT(cpu >= 0 && cpu < ncpus);
2091 return(&CPU_prvspace[cpu].mdglobaldata.mi);
2092}
2093
984263bc
MD
2094#if defined(I586_CPU) && !defined(NO_F00F_HACK)
2095static void f00f_hack(void *unused);
2096SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
2097
2098static void
17a9f566
MD
2099f00f_hack(void *unused)
2100{
984263bc 2101 struct gate_descriptor *new_idt;
984263bc
MD
2102 vm_offset_t tmp;
2103
2104 if (!has_f00f_bug)
2105 return;
2106
2107 printf("Intel Pentium detected, installing workaround for F00F bug\n");
2108
2109 r_idt.rd_limit = sizeof(idt0) - 1;
2110
2111 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
2112 if (tmp == 0)
2113 panic("kmem_alloc returned 0");
2114 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
2115 panic("kmem_alloc returned non-page-aligned memory");
2116 /* Put the first seven entries in the lower page */
2117 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
2118 bcopy(idt, new_idt, sizeof(idt0));
2119 r_idt.rd_base = (int)new_idt;
2120 lidt(&r_idt);
2121 idt = new_idt;
2122 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
2123 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2124 panic("vm_map_protect failed");
2125 return;
2126}
2127#endif /* defined(I586_CPU) && !NO_F00F_HACK */
2128
2129int
2130ptrace_set_pc(p, addr)
2131 struct proc *p;
2132 unsigned long addr;
2133{
2134 p->p_md.md_regs->tf_eip = addr;
2135 return (0);
2136}
2137
2138int
2139ptrace_single_step(p)
2140 struct proc *p;
2141{
2142 p->p_md.md_regs->tf_eflags |= PSL_T;
2143 return (0);
2144}
2145
2146int ptrace_read_u_check(p, addr, len)
2147 struct proc *p;
2148 vm_offset_t addr;
2149 size_t len;
2150{
2151 vm_offset_t gap;
2152
2153 if ((vm_offset_t) (addr + len) < addr)
2154 return EPERM;
2155 if ((vm_offset_t) (addr + len) <= sizeof(struct user))
2156 return 0;
2157
2158 gap = (char *) p->p_md.md_regs - (char *) p->p_addr;
2159
2160 if ((vm_offset_t) addr < gap)
2161 return EPERM;
2162 if ((vm_offset_t) (addr + len) <=
2163 (vm_offset_t) (gap + sizeof(struct trapframe)))
2164 return 0;
2165 return EPERM;
2166}
2167
2168int ptrace_write_u(p, off, data)
2169 struct proc *p;
2170 vm_offset_t off;
2171 long data;
2172{
2173 struct trapframe frame_copy;
2174 vm_offset_t min;
2175 struct trapframe *tp;
2176
2177 /*
2178 * Privileged kernel state is scattered all over the user area.
2179 * Only allow write access to parts of regs and to fpregs.
2180 */
2181 min = (char *)p->p_md.md_regs - (char *)p->p_addr;
2182 if (off >= min && off <= min + sizeof(struct trapframe) - sizeof(int)) {
2183 tp = p->p_md.md_regs;
2184 frame_copy = *tp;
2185 *(int *)((char *)&frame_copy + (off - min)) = data;
2186 if (!EFL_SECURE(frame_copy.tf_eflags, tp->tf_eflags) ||
2187 !CS_SECURE(frame_copy.tf_cs))
2188 return (EINVAL);
2189 *(int*)((char *)p->p_addr + off) = data;
2190 return (0);
2191 }
b7c628e4
MD
2192
2193 /*
2194 * The PCB is at the end of the user area YYY
2195 */
2196 min = (char *)p->p_thread->td_pcb - (char *)p->p_addr;
2197 min += offsetof(struct pcb, pcb_save);
984263bc
MD
2198 if (off >= min && off <= min + sizeof(union savefpu) - sizeof(int)) {
2199 *(int*)((char *)p->p_addr + off) = data;
2200 return (0);
2201 }
2202 return (EFAULT);
2203}
2204
2205int
2206fill_regs(p, regs)
2207 struct proc *p;
2208 struct reg *regs;
2209{
2210 struct pcb *pcb;
2211 struct trapframe *tp;
2212
2213 tp = p->p_md.md_regs;
2214 regs->r_fs = tp->tf_fs;
2215 regs->r_es = tp->tf_es;
2216 regs->r_ds = tp->tf_ds;
2217 regs->r_edi = tp->tf_edi;
2218 regs->r_esi = tp->tf_esi;
2219 regs->r_ebp = tp->tf_ebp;
2220 regs->r_ebx = tp->tf_ebx;
2221 regs->r_edx = tp->tf_edx;
2222 regs->r_ecx = tp->tf_ecx;
2223 regs->r_eax = tp->tf_eax;
2224 regs->r_eip = tp->tf_eip;
2225 regs->r_cs = tp->tf_cs;
2226 regs->r_eflags = tp->tf_eflags;
2227 regs->r_esp = tp->tf_esp;
2228 regs->r_ss = tp->tf_ss;
b7c628e4 2229 pcb = p->p_thread->td_pcb;
984263bc
MD
2230 regs->r_gs = pcb->pcb_gs;
2231 return (0);
2232}
2233
2234int
2235set_regs(p, regs)
2236 struct proc *p;
2237 struct reg *regs;
2238{
2239 struct pcb *pcb;
2240 struct trapframe *tp;
2241
2242 tp = p->p_md.md_regs;
2243 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2244 !CS_SECURE(regs->r_cs))
2245 return (EINVAL);
2246 tp->tf_fs = regs->r_fs;
2247 tp->tf_es = regs->r_es;
2248 tp->tf_ds = regs->r_ds;
2249 tp->tf_edi = regs->r_edi;
2250 tp->tf_esi = regs->r_esi;
2251 tp->tf_ebp = regs->r_ebp;
2252 tp->tf_ebx = regs->r_ebx;
2253 tp->tf_edx = regs->r_edx;
2254 tp->tf_ecx = regs->r_ecx;
2255 tp->tf_eax = regs->r_eax;
2256 tp->tf_eip = regs->r_eip;
2257 tp->tf_cs = regs->r_cs;
2258 tp->tf_eflags = regs->r_eflags;
2259 tp->tf_esp = regs->r_esp;
2260 tp->tf_ss = regs->r_ss;
b7c628e4 2261 pcb = p->p_thread->td_pcb;
984263bc
MD
2262 pcb->pcb_gs = regs->r_gs;
2263 return (0);
2264}
2265
642a6e88 2266#ifndef CPU_DISABLE_SSE
984263bc
MD
2267static void
2268fill_fpregs_xmm(sv_xmm, sv_87)
2269 struct savexmm *sv_xmm;
2270 struct save87 *sv_87;
2271{
c9faf524
RG
2272 struct env87 *penv_87 = &sv_87->sv_env;
2273 struct envxmm *penv_xmm = &sv_xmm->sv_env;
984263bc
MD
2274 int i;
2275
2276 /* FPU control/status */
2277 penv_87->en_cw = penv_xmm->en_cw;
2278 penv_87->en_sw = penv_xmm->en_sw;
2279 penv_87->en_tw = penv_xmm->en_tw;
2280 penv_87->en_fip = penv_xmm->en_fip;
2281 penv_87->en_fcs = penv_xmm->en_fcs;
2282 penv_87->en_opcode = penv_xmm->en_opcode;
2283 penv_87->en_foo = penv_xmm->en_foo;
2284 penv_87->en_fos = penv_xmm->en_fos;
2285
2286 /* FPU registers */
2287 for (i = 0; i < 8; ++i)
2288 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2289
2290 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
2291}
2292
2293static void
2294set_fpregs_xmm(sv_87, sv_xmm)
2295 struct save87 *sv_87;
2296 struct savexmm *sv_xmm;
2297{
c9faf524
RG
2298 struct env87 *penv_87 = &sv_87->sv_env;
2299 struct envxmm *penv_xmm = &sv_xmm->sv_env;
984263bc
MD
2300 int i;
2301
2302 /* FPU control/status */
2303 penv_xmm->en_cw = penv_87->en_cw;
2304 penv_xmm->en_sw = penv_87->en_sw;
2305 penv_xmm->en_tw = penv_87->en_tw;
2306 penv_xmm->en_fip = penv_87->en_fip;
2307 penv_xmm->en_fcs = penv_87->en_fcs;
2308 penv_xmm->en_opcode = penv_87->en_opcode;
2309 penv_xmm->en_foo = penv_87->en_foo;
2310 penv_xmm->en_fos = penv_87->en_fos;
2311
2312 /* FPU registers */
2313 for (i = 0; i < 8; ++i)
2314 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2315
2316 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2317}
642a6e88 2318#endif /* CPU_DISABLE_SSE */
984263bc
MD
2319
2320int
2321fill_fpregs(p, fpregs)
2322 struct proc *p;
2323 struct fpreg *fpregs;
2324{
642a6e88 2325#ifndef CPU_DISABLE_SSE
984263bc 2326 if (cpu_fxsr) {
b7c628e4 2327 fill_fpregs_xmm(&p->p_thread->td_pcb->pcb_save.sv_xmm,
984263bc
MD
2328 (struct save87 *)fpregs);
2329 return (0);
2330 }
642a6e88 2331#endif /* CPU_DISABLE_SSE */
b7c628e4 2332 bcopy(&p->p_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
984263bc
MD
2333 return (0);
2334}
2335
2336int
2337set_fpregs(p, fpregs)
2338 struct proc *p;
2339 struct fpreg *fpregs;
2340{
642a6e88 2341#ifndef CPU_DISABLE_SSE
984263bc
MD
2342 if (cpu_fxsr) {
2343 set_fpregs_xmm((struct save87 *)fpregs,
b7c628e4 2344 &p->p_thread->td_pcb->pcb_save.sv_xmm);
984263bc
MD
2345 return (0);
2346 }
642a6e88 2347#endif /* CPU_DISABLE_SSE */
b7c628e4 2348 bcopy(fpregs, &p->p_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
984263bc
MD
2349 return (0);
2350}
2351
2352int
2353fill_dbregs(p, dbregs)
2354 struct proc *p;
2355 struct dbreg *dbregs;
2356{
2357 struct pcb *pcb;
2358
2359 if (p == NULL) {
2360 dbregs->dr0 = rdr0();
2361 dbregs->dr1 = rdr1();
2362 dbregs->dr2 = rdr2();
2363 dbregs->dr3 = rdr3();
2364 dbregs->dr4 = rdr4();
2365 dbregs->dr5 = rdr5();
2366 dbregs->dr6 = rdr6();
2367 dbregs->dr7 = rdr7();
2368 }
2369 else {
b7c628e4 2370 pcb = p->p_thread->td_pcb;
984263bc
MD
2371 dbregs->dr0 = pcb->pcb_dr0;
2372 dbregs->dr1 = pcb->pcb_dr1;
2373 dbregs->dr2 = pcb->pcb_dr2;
2374 dbregs->dr3 = pcb->pcb_dr3;
2375 dbregs->dr4 = 0;
2376 dbregs->dr5 = 0;
2377 dbregs->dr6 = pcb->pcb_dr6;
2378 dbregs->dr7 = pcb->pcb_dr7;
2379 }
2380 return (0);
2381}
2382
2383int
2384set_dbregs(p, dbregs)
2385 struct proc *p;
2386 struct dbreg *dbregs;
2387{
2388 struct pcb *pcb;
2389 int i;
2390 u_int32_t mask1, mask2;
2391
2392 if (p == NULL) {
2393 load_dr0(dbregs->dr0);
2394 load_dr1(dbregs->dr1);
2395 load_dr2(dbregs->dr2);
2396 load_dr3(dbregs->dr3);
2397 load_dr4(dbregs->dr4);
2398 load_dr5(dbregs->dr5);
2399 load_dr6(dbregs->dr6);
2400 load_dr7(dbregs->dr7);
2401 }
2402 else {
2403 /*
2404 * Don't let an illegal value for dr7 get set. Specifically,
2405 * check for undefined settings. Setting these bit patterns
2406 * result in undefined behaviour and can lead to an unexpected
2407 * TRCTRAP.
2408 */
2409 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2410 i++, mask1 <<= 2, mask2 <<= 2)
2411 if ((dbregs->dr7 & mask1) == mask2)
2412 return (EINVAL);
2413
b7c628e4 2414 pcb = p->p_thread->td_pcb;
984263bc
MD
2415
2416 /*
2417 * Don't let a process set a breakpoint that is not within the
2418 * process's address space. If a process could do this, it
2419 * could halt the system by setting a breakpoint in the kernel
2420 * (if ddb was enabled). Thus, we need to check to make sure
2421 * that no breakpoints are being enabled for addresses outside
2422 * process's address space, unless, perhaps, we were called by
2423 * uid 0.
2424 *
2425 * XXX - what about when the watched area of the user's
2426 * address space is written into from within the kernel
2427 * ... wouldn't that still cause a breakpoint to be generated
2428 * from within kernel mode?
2429 */
2430
dadab5e9 2431 if (suser_cred(p->p_ucred, 0) != 0) {
984263bc
MD
2432 if (dbregs->dr7 & 0x3) {
2433 /* dr0 is enabled */
2434 if (dbregs->dr0 >= VM_MAXUSER_ADDRESS)
2435 return (EINVAL);
2436 }
2437
2438 if (dbregs->dr7 & (0x3<<2)) {
2439 /* dr1 is enabled */
2440 if (dbregs->dr1 >= VM_MAXUSER_ADDRESS)
2441 return (EINVAL);
2442 }
2443
2444 if (dbregs->dr7 & (0x3<<4)) {
2445 /* dr2 is enabled */
2446 if (dbregs->dr2 >= VM_MAXUSER_ADDRESS)
2447 return (EINVAL);
2448 }
2449
2450 if (dbregs->dr7 & (0x3<<6)) {
2451 /* dr3 is enabled */
2452 if (dbregs->dr3 >= VM_MAXUSER_ADDRESS)
2453 return (EINVAL);
2454 }
2455 }
2456
2457 pcb->pcb_dr0 = dbregs->dr0;
2458 pcb->pcb_dr1 = dbregs->dr1;
2459 pcb->pcb_dr2 = dbregs->dr2;
2460 pcb->pcb_dr3 = dbregs->dr3;
2461 pcb->pcb_dr6 = dbregs->dr6;
2462 pcb->pcb_dr7 = dbregs->dr7;
2463
2464 pcb->pcb_flags |= PCB_DBREGS;
2465 }
2466
2467 return (0);
2468}
2469
2470/*
2471 * Return > 0 if a hardware breakpoint has been hit, and the
2472 * breakpoint was in user space. Return 0, otherwise.
2473 */
2474int
2475user_dbreg_trap(void)
2476{
2477 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2478 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2479 int nbp; /* number of breakpoints that triggered */
2480 caddr_t addr[4]; /* breakpoint addresses */
2481 int i;
2482
2483 dr7 = rdr7();
2484 if ((dr7 & 0x000000ff) == 0) {
2485 /*
2486 * all GE and LE bits in the dr7 register are zero,
2487 * thus the trap couldn't have been caused by the
2488 * hardware debug registers
2489 */
2490 return 0;
2491 }
2492
2493 nbp = 0;
2494 dr6 = rdr6();
2495 bp = dr6 & 0x0000000f;
2496
2497 if (!bp) {
2498 /*
2499 * None of the breakpoint bits are set meaning this
2500 * trap was not caused by any of the debug registers
2501 */
2502 return 0;
2503 }
2504
2505 /*
2506 * at least one of the breakpoints were hit, check to see
2507 * which ones and if any of them are user space addresses
2508 */
2509
2510 if (bp & 0x01) {
2511 addr[nbp++] = (caddr_t)rdr0();
2512 }
2513 if (bp & 0x02) {
2514 addr[nbp++] = (caddr_t)rdr1();
2515 }
2516 if (bp & 0x04) {
2517 addr[nbp++] = (caddr_t)rdr2();
2518 }
2519 if (bp & 0x08) {
2520 addr[nbp++] = (caddr_t)rdr3();
2521 }
2522
2523 for (i=0; i<nbp; i++) {
2524 if (addr[i] <
2525 (caddr_t)VM_MAXUSER_ADDRESS) {
2526 /*
2527 * addr[i] is in user space
2528 */
2529 return nbp;
2530 }
2531 }
2532
2533 /*
2534 * None of the breakpoints are in user space.
2535 */
2536 return 0;
2537}
2538
2539
2540#ifndef DDB
2541void
2542Debugger(const char *msg)
2543{
2544 printf("Debugger(\"%s\") called.\n", msg);
2545}
2546#endif /* no DDB */
2547
2548#include <sys/disklabel.h>
2549
2550/*
2551 * Determine the size of the transfer, and make sure it is
2552 * within the boundaries of the partition. Adjust transfer
2553 * if needed, and signal errors or early completion.
2554 */
2555int
2556bounds_check_with_label(struct buf *bp, struct disklabel *lp, int wlabel)
2557{
2558 struct partition *p = lp->d_partitions + dkpart(bp->b_dev);
2559 int labelsect = lp->d_partitions[0].p_offset;
2560 int maxsz = p->p_size,
2561 sz = (bp->b_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT;
2562
2563 /* overwriting disk label ? */
2564 /* XXX should also protect bootstrap in first 8K */
2565 if (bp->b_blkno + p->p_offset <= LABELSECTOR + labelsect &&
2566#if LABELSECTOR != 0
2567 bp->b_blkno + p->p_offset + sz > LABELSECTOR + labelsect &&
2568#endif
2569 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2570 bp->b_error = EROFS;
2571 goto bad;
2572 }
2573
2574#if defined(DOSBBSECTOR) && defined(notyet)
2575 /* overwriting master boot record? */
2576 if (bp->b_blkno + p->p_offset <= DOSBBSECTOR &&
2577 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2578 bp->b_error = EROFS;
2579 goto bad;
2580 }
2581#endif
2582
2583 /* beyond partition? */
2584 if (bp->b_blkno < 0 || bp->b_blkno + sz > maxsz) {
2585 /* if exactly at end of disk, return an EOF */
2586 if (bp->b_blkno == maxsz) {
2587 bp->b_resid = bp->b_bcount;
2588 return(0);
2589 }
2590 /* or truncate if part of it fits */
2591 sz = maxsz - bp->b_blkno;
2592 if (sz <= 0) {
2593 bp->b_error = EINVAL;
2594 goto bad;
2595 }
2596 bp->b_bcount = sz << DEV_BSHIFT;
2597 }
2598
2599 bp->b_pblkno = bp->b_blkno + p->p_offset;
2600 return(1);
2601
2602bad:
2603 bp->b_flags |= B_ERROR;
2604 return(-1);
2605}
2606
2607#ifdef DDB
2608
2609/*
2610 * Provide inb() and outb() as functions. They are normally only
2611 * available as macros calling inlined functions, thus cannot be
2612 * called inside DDB.
2613 *
2614 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2615 */
2616
2617#undef inb
2618#undef outb
2619
2620/* silence compiler warnings */
2621u_char inb(u_int);
2622void outb(u_int, u_char);
2623
2624u_char
2625inb(u_int port)
2626{
2627 u_char data;
2628 /*
2629 * We use %%dx and not %1 here because i/o is done at %dx and not at
2630 * %edx, while gcc generates inferior code (movw instead of movl)
2631 * if we tell it to load (u_short) port.
2632 */
2633 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2634 return (data);
2635}
2636
2637void
2638outb(u_int port, u_char data)
2639{
2640 u_char al;
2641 /*
2642 * Use an unnecessary assignment to help gcc's register allocator.
2643 * This make a large difference for gcc-1.40 and a tiny difference
2644 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2645 * best results. gcc-2.6.0 can't handle this.
2646 */
2647 al = data;
2648 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2649}
2650
2651#endif /* DDB */
8a8d5d85
MD
2652
2653
2654
2655#include "opt_cpu.h"
2656#include "opt_htt.h"
2657#include "opt_user_ldt.h"
2658
2659
2660/*
2661 * initialize all the SMP locks
2662 */
2663
2664/* critical region around IO APIC, apic_imen */
2665struct spinlock imen_spinlock;
2666
2667/* Make FAST_INTR() routines sequential */
2668struct spinlock fast_intr_spinlock;
2669
2670/* critical region for old style disable_intr/enable_intr */
2671struct spinlock mpintr_spinlock;
2672
2673/* critical region around INTR() routines */
2674struct spinlock intr_spinlock;
2675
2676/* lock region used by kernel profiling */
2677struct spinlock mcount_spinlock;
2678
2679/* locks com (tty) data/hardware accesses: a FASTINTR() */
2680struct spinlock com_spinlock;
2681
2682/* locks kernel printfs */
2683struct spinlock cons_spinlock;
2684
2685/* lock regions around the clock hardware */
2686struct spinlock clock_spinlock;
2687
2688/* lock around the MP rendezvous */
2689struct spinlock smp_rv_spinlock;
2690
2691static void
2692init_locks(void)
2693{
2694 /*
2695 * mp_lock = 0; BSP already owns the MP lock
2696 */
2697 /*
2698 * Get the initial mp_lock with a count of 1 for the BSP.
2699 * This uses a LOGICAL cpu ID, ie BSP == 0.
2700 */
2701#ifdef SMP
2702 cpu_get_initial_mplock();
2703#endif
2704 spin_lock_init(&mcount_spinlock);
2705 spin_lock_init(&fast_intr_spinlock);
2706 spin_lock_init(&intr_spinlock);
2707 spin_lock_init(&mpintr_spinlock);
2708 spin_lock_init(&imen_spinlock);
2709 spin_lock_init(&smp_rv_spinlock);
2710 spin_lock_init(&com_spinlock);
2711 spin_lock_init(&clock_spinlock);
2712 spin_lock_init(&cons_spinlock);
2713}
2714