Another terrible hack to leave interrupts disabled until the USB bus
[dragonfly.git] / sys / bus / usb / ohci_pci.c
CommitLineData
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1/*-
2 * Copyright (c) 1998 The NetBSD Foundation, Inc.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to The NetBSD Foundation
6 * by Lennart Augustsson (augustss@carlstedt.se) at
7 * Carlstedt Research & Technology.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the NetBSD
20 * Foundation, Inc. and its contributors.
21 * 4. Neither the name of The NetBSD Foundation nor the names of its
22 * contributors may be used to endorse or promote products derived
23 * from this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
26 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 *
37 * $FreeBSD: src/sys/dev/usb/ohci_pci.c,v 1.38 2003/12/22 15:18:46 shiba Exp $
3d583874 38 * $DragonFly: src/sys/bus/usb/ohci_pci.c,v 1.3 2005/06/10 18:33:04 dillon Exp $
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39 */
40
41/*
42 * USB Open Host Controller driver.
43 *
44 * OHCI spec: http://www.intel.com/design/usb/ohci11d.pdf
45 */
46
47/* The low level controller code for OHCI has been split into
48 * PCI probes and OHCI specific code. This was done to facilitate the
49 * sharing of code between *BSD's
50 */
51
52#include "opt_bus.h"
53
54#include <sys/param.h>
55#include <sys/systm.h>
56#include <sys/kernel.h>
57#include <sys/module.h>
58#include <sys/bus.h>
59#include <sys/queue.h>
60#include <machine/bus.h>
61#include <sys/rman.h>
62#include <machine/resource.h>
63
64#include <bus/pci/pcivar.h>
65#include <bus/pci/pcireg.h>
66
67#include <bus/usb/usb.h>
68#include <bus/usb/usbdi.h>
69#include <bus/usb/usbdivar.h>
70#include <bus/usb/usb_mem.h>
71
72#include <bus/usb/ohcireg.h>
73#include <bus/usb/ohcivar.h>
74
75#define PCI_OHCI_VENDORID_ACERLABS 0x10b9
76#define PCI_OHCI_VENDORID_AMD 0x1022
77#define PCI_OHCI_VENDORID_APPLE 0x106b
78#define PCI_OHCI_VENDORID_CMDTECH 0x1095
79#define PCI_OHCI_VENDORID_NEC 0x1033
80#define PCI_OHCI_VENDORID_NVIDIA 0x12D2
81#define PCI_OHCI_VENDORID_NVIDIA2 0x10DE
82#define PCI_OHCI_VENDORID_OPTI 0x1045
83#define PCI_OHCI_VENDORID_SIS 0x1039
84
85#define PCI_OHCI_DEVICEID_ALADDIN_V 0x523710b9
86static const char *ohci_device_aladdin_v = "AcerLabs M5237 (Aladdin-V) USB controller";
87
88#define PCI_OHCI_DEVICEID_AMD756 0x740c1022
89static const char *ohci_device_amd756 = "AMD-756 USB Controller";
90
91#define PCI_OHCI_DEVICEID_AMD766 0x74141022
92static const char *ohci_device_amd766 = "AMD-766 USB Controller";
93
94#define PCI_OHCI_DEVICEID_FIRELINK 0xc8611045
95static const char *ohci_device_firelink = "OPTi 82C861 (FireLink) USB controller";
96
97#define PCI_OHCI_DEVICEID_NEC 0x00351033
98static const char *ohci_device_nec = "NEC uPD 9210 USB controller";
99
100#define PCI_OHCI_DEVICEID_NFORCE3 0x00d710de
101static const char *ohci_device_nforce3 = "nVidia nForce3 USB Controller";
102
103#define PCI_OHCI_DEVICEID_USB0670 0x06701095
104static const char *ohci_device_usb0670 = "CMD Tech 670 (USB0670) USB controller";
105
106#define PCI_OHCI_DEVICEID_USB0673 0x06731095
107static const char *ohci_device_usb0673 = "CMD Tech 673 (USB0673) USB controller";
108
109#define PCI_OHCI_DEVICEID_SIS5571 0x70011039
110static const char *ohci_device_sis5571 = "SiS 5571 USB controller";
111
112#define PCI_OHCI_DEVICEID_KEYLARGO 0x0019106b
113static const char *ohci_device_keylargo = "Apple KeyLargo USB controller";
114
115static const char *ohci_device_generic = "OHCI (generic) USB controller";
116
117#define PCI_OHCI_BASE_REG 0x10
118
119
120static int ohci_pci_attach(device_t self);
121static int ohci_pci_detach(device_t self);
122static int ohci_pci_suspend(device_t self);
123static int ohci_pci_resume(device_t self);
124
125static int
126ohci_pci_suspend(device_t self)
127{
128 ohci_softc_t *sc = device_get_softc(self);
129 int err;
130
131 err = bus_generic_suspend(self);
132 if (err)
133 return err;
134 ohci_power(PWR_SUSPEND, sc);
135
136 return 0;
137}
138
139static int
140ohci_pci_resume(device_t self)
141{
142 ohci_softc_t *sc = device_get_softc(self);
143 u_int32_t reg, int_line;
144
145 if (pci_get_powerstate(self) != PCI_POWERSTATE_D0) {
146 device_printf(self, "chip is in D%d mode "
147 "-- setting to D0\n", pci_get_powerstate(self));
148 reg = pci_read_config(self, PCI_CBMEM, 4);
149 int_line = pci_read_config(self, PCIR_INTLINE, 4);
150 pci_set_powerstate(self, PCI_POWERSTATE_D0);
151 pci_write_config(self, PCI_CBMEM, reg, 4);
152 pci_write_config(self, PCIR_INTLINE, int_line, 4);
153 }
154
155 ohci_power(PWR_RESUME, sc);
156 bus_generic_resume(self);
157
158 return 0;
159}
160
161static const char *
162ohci_pci_match(device_t self)
163{
164 u_int32_t device_id = pci_get_devid(self);
165
166 switch (device_id) {
167 case PCI_OHCI_DEVICEID_ALADDIN_V:
168 return (ohci_device_aladdin_v);
169 case PCI_OHCI_DEVICEID_AMD756:
170 return (ohci_device_amd756);
171 case PCI_OHCI_DEVICEID_AMD766:
172 return (ohci_device_amd766);
173 case PCI_OHCI_DEVICEID_USB0670:
174 return (ohci_device_usb0670);
175 case PCI_OHCI_DEVICEID_USB0673:
176 return (ohci_device_usb0673);
177 case PCI_OHCI_DEVICEID_FIRELINK:
178 return (ohci_device_firelink);
179 case PCI_OHCI_DEVICEID_NEC:
180 return (ohci_device_nec);
181 case PCI_OHCI_DEVICEID_NFORCE3:
182 return (ohci_device_nforce3);
183 case PCI_OHCI_DEVICEID_SIS5571:
184 return (ohci_device_sis5571);
185 case PCI_OHCI_DEVICEID_KEYLARGO:
186 return (ohci_device_keylargo);
187 default:
188 if (pci_get_class(self) == PCIC_SERIALBUS
189 && pci_get_subclass(self) == PCIS_SERIALBUS_USB
190 && pci_get_progif(self) == PCI_INTERFACE_OHCI) {
191 return (ohci_device_generic);
192 }
193 }
194
195 return NULL; /* dunno */
196}
197
198static int
199ohci_pci_probe(device_t self)
200{
201 const char *desc = ohci_pci_match(self);
202
203 if (desc) {
204 device_set_desc(self, desc);
205 return 0;
206 } else {
207 return ENXIO;
208 }
209}
210
211static int
212ohci_pci_attach(device_t self)
213{
214 ohci_softc_t *sc = device_get_softc(self);
215 int err;
216 int rid;
217
218 /* XXX where does it say so in the spec? */
219 sc->sc_bus.usbrev = USBREV_1_0;
220
221 pci_enable_busmaster(self);
222
223 rid = PCI_CBMEM;
224 sc->io_res = bus_alloc_resource(self, SYS_RES_MEMORY, &rid,
225 0, ~0, 1, RF_ACTIVE);
226 if (!sc->io_res) {
227 device_printf(self, "Could not map memory\n");
228 return ENXIO;
229 }
230 sc->iot = rman_get_bustag(sc->io_res);
231 sc->ioh = rman_get_bushandle(sc->io_res);
232
233 rid = 0;
234 sc->irq_res = bus_alloc_resource(self, SYS_RES_IRQ, &rid, 0, ~0, 1,
235 RF_SHAREABLE | RF_ACTIVE);
236 if (sc->irq_res == NULL) {
237 device_printf(self, "Could not allocate irq\n");
238 ohci_pci_detach(self);
239 return ENXIO;
240 }
241 sc->sc_bus.bdev = device_add_child(self, "usb", -1);
242 if (!sc->sc_bus.bdev) {
243 device_printf(self, "Could not add USB device\n");
244 ohci_pci_detach(self);
245 return ENOMEM;
246 }
247 device_set_ivars(sc->sc_bus.bdev, sc);
248
249 /* ohci_pci_match will never return NULL if ohci_pci_probe succeeded */
250 device_set_desc(sc->sc_bus.bdev, ohci_pci_match(self));
251 switch (pci_get_vendor(self)) {
252 case PCI_OHCI_VENDORID_ACERLABS:
253 sprintf(sc->sc_vendor, "AcerLabs");
254 break;
255 case PCI_OHCI_VENDORID_AMD:
256 sprintf(sc->sc_vendor, "AMD");
257 break;
258 case PCI_OHCI_VENDORID_APPLE:
259 sprintf(sc->sc_vendor, "Apple");
260 break;
261 case PCI_OHCI_VENDORID_CMDTECH:
262 sprintf(sc->sc_vendor, "CMDTECH");
263 break;
264 case PCI_OHCI_VENDORID_NEC:
265 sprintf(sc->sc_vendor, "NEC");
266 break;
267 case PCI_OHCI_VENDORID_NVIDIA:
268 case PCI_OHCI_VENDORID_NVIDIA2:
269 sprintf(sc->sc_vendor, "nVidia");
270 break;
271 case PCI_OHCI_VENDORID_OPTI:
272 sprintf(sc->sc_vendor, "OPTi");
273 break;
274 case PCI_OHCI_VENDORID_SIS:
275 sprintf(sc->sc_vendor, "SiS");
276 break;
277 default:
278 if (bootverbose)
279 device_printf(self, "(New OHCI DeviceId=0x%08x)\n",
280 pci_get_devid(self));
281 sprintf(sc->sc_vendor, "(0x%04x)", pci_get_vendor(self));
282 }
283
284 err = bus_setup_intr(self, sc->irq_res, INTR_TYPE_BIO,
e9cb6d99 285 (driver_intr_t *) ohci_intr, sc, &sc->ih, NULL);
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286 if (err) {
287 device_printf(self, "Could not setup irq, %d\n", err);
288 sc->ih = NULL;
289 ohci_pci_detach(self);
290 return ENXIO;
291 }
292 err = ohci_init(sc);
293 if (!err)
294 err = device_probe_and_attach(sc->sc_bus.bdev);
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295 if (err) {
296 device_printf(self, "USB init failed\n");
297 ohci_pci_detach(self);
298 return EIO;
299 }
3d583874 300 ohci_init_intrs(sc);
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301 return 0;
302}
303
304static int
305ohci_pci_detach(device_t self)
306{
307 ohci_softc_t *sc = device_get_softc(self);
308
309 /*
310 * XXX this code is not yet fit to be used as detach for the OHCI
311 * controller
312 */
313
314 /*
315 * disable interrupts that might have been switched on in ohci_init
316 */
317 if (sc->iot && sc->ioh)
318 bus_space_write_4(sc->iot, sc->ioh,
319 OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
320
321 if (sc->irq_res && sc->ih) {
322 int err = bus_teardown_intr(self, sc->irq_res, sc->ih);
323
324 if (err)
325 /* XXX or should we panic? */
326 device_printf(self, "Could not tear down irq, %d\n",
327 err);
328 sc->ih = NULL;
329 }
330 if (sc->sc_bus.bdev) {
331 device_delete_child(self, sc->sc_bus.bdev);
332 sc->sc_bus.bdev = NULL;
333 }
334 if (sc->irq_res) {
335 bus_release_resource(self, SYS_RES_IRQ, 0, sc->irq_res);
336 sc->irq_res = NULL;
337 }
338 if (sc->io_res) {
339 bus_release_resource(self, SYS_RES_MEMORY, PCI_CBMEM, sc->io_res);
340 sc->io_res = NULL;
341 sc->iot = 0;
342 sc->ioh = 0;
343 }
344 return 0;
345}
346
347static device_method_t ohci_methods[] = {
348 /* Device interface */
349 DEVMETHOD(device_probe, ohci_pci_probe),
350 DEVMETHOD(device_attach, ohci_pci_attach),
351 DEVMETHOD(device_suspend, ohci_pci_suspend),
352 DEVMETHOD(device_resume, ohci_pci_resume),
353 DEVMETHOD(device_shutdown, bus_generic_shutdown),
354
355 /* Bus interface */
356 DEVMETHOD(bus_print_child, bus_generic_print_child),
357
358 {0, 0}
359};
360
361static driver_t ohci_driver = {
362 "ohci",
363 ohci_methods,
364 sizeof(ohci_softc_t),
365};
366
367static devclass_t ohci_devclass;
368
369DRIVER_MODULE(ohci, pci, ohci_driver, ohci_devclass, 0, 0);
370DRIVER_MODULE(ohci, cardbus, ohci_driver, ohci_devclass, 0, 0);