Rip out bad spl manipulating junk from mpt and clean it up.
[dragonfly.git] / sys / dev / disk / mpt / mpt_pci.c
CommitLineData
984263bc 1/* $FreeBSD: src/sys/dev/mpt/mpt_pci.c,v 1.3.2.3 2002/09/24 21:37:25 mjacob Exp $ */
89a61e18 2/* $DragonFly: src/sys/dev/disk/mpt/mpt_pci.c,v 1.5 2005/06/16 15:48:59 dillon Exp $ */
984263bc
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3/*
4 * PCI specific probe and attach routines for LSI '909 FC adapters.
5 * FreeBSD Version.
6 *
7 * Copyright (c) 2000, 2001 by Greg Ansley
8 * Partially derived from Matt Jacob's ISP driver.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice immediately at the beginning of the file, without modification,
15 * this list of conditions, and the following disclaimer.
16 * 2. The name of the author may not be used to endorse or promote products
17 * derived from this software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
30 */
31/*
32 * Additional Copyright (c) 2002 by Matthew Jacob under same license.
33 */
34
35#include <sys/param.h>
36#include <sys/systm.h>
37#include <sys/kernel.h>
38#include <sys/module.h>
39#include <sys/bus.h>
40
1f2de5d4
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41#include <bus/pci/pcireg.h>
42#include <bus/pci/pcivar.h>
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43
44#include <machine/bus_memio.h>
45#include <machine/bus_pio.h>
46#include <machine/bus.h>
47#include <machine/resource.h>
48#include <sys/rman.h>
49#include <sys/malloc.h>
50
1f2de5d4 51#include "mpt_freebsd.h"
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52
53#ifndef PCI_VENDOR_LSI
54#define PCI_VENDOR_LSI 0x1000
55#endif
56
57#ifndef PCI_PRODUCT_LSI_FC909
58#define PCI_PRODUCT_LSI_FC909 0x0620
59#endif
60
61#ifndef PCI_PRODUCT_LSI_FC909A
62#define PCI_PRODUCT_LSI_FC909A 0x0621
63#endif
64
65#ifndef PCI_PRODUCT_LSI_FC919
66#define PCI_PRODUCT_LSI_FC919 0x0624
67#endif
68
69#ifndef PCI_PRODUCT_LSI_FC929
70#define PCI_PRODUCT_LSI_FC929 0x0622
71#endif
72
73#ifndef PCI_PRODUCT_LSI_1030
74#define PCI_PRODUCT_LSI_1030 0x0030
75#endif
76
77#ifndef PCIM_CMD_SERRESPEN
78#define PCIM_CMD_SERRESPEN 0x0100
79#endif
80
81
82
83#define MEM_MAP_REG 0x14
84#define MEM_MAP_SRAM 0x1C
85
86static int mpt_probe(device_t);
87static int mpt_attach(device_t);
88static void mpt_free_bus_resources(mpt_softc_t *mpt);
89static int mpt_detach(device_t);
90static int mpt_shutdown(device_t);
91static int mpt_dma_mem_alloc(mpt_softc_t *mpt);
92static void mpt_dma_mem_free(mpt_softc_t *mpt);
93static void mpt_read_config_regs(mpt_softc_t *mpt);
94static void mpt_pci_intr(void *);
95
96static device_method_t mpt_methods[] = {
97 /* Device interface */
98 DEVMETHOD(device_probe, mpt_probe),
99 DEVMETHOD(device_attach, mpt_attach),
100 DEVMETHOD(device_detach, mpt_detach),
101 DEVMETHOD(device_shutdown, mpt_shutdown),
102 { 0, 0 }
103};
104
105static driver_t mpt_driver = {
106 "mpt", mpt_methods, sizeof (mpt_softc_t)
107};
108static devclass_t mpt_devclass;
109DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, 0, 0);
110MODULE_VERSION(mpt, 1);
111
112int
113mpt_intr(void *dummy)
114{
115 int nrepl = 0;
116 u_int32_t reply;
117 mpt_softc_t *mpt = (mpt_softc_t *)dummy;
118
119 if ((mpt_read(mpt, MPT_OFFSET_INTR_STATUS) & MPT_INTR_REPLY_READY) == 0)
120 return (0);
121 reply = mpt_pop_reply_queue(mpt);
122 while (reply != MPT_REPLY_EMPTY) {
123 nrepl++;
124 if (mpt->verbose > 1) {
125 if ((reply & MPT_CONTEXT_REPLY) != 0) {
126 /* Address reply; IOC has something to say */
127 mpt_print_reply(MPT_REPLY_PTOV(mpt, reply));
128 } else {
129 /* Context reply ; all went well */
130 device_printf(mpt->dev,
131 "context %u reply OK\n", reply);
132 }
133 }
134 mpt_done(mpt, reply);
135 reply = mpt_pop_reply_queue(mpt);
136 }
137 return (nrepl != 0);
138}
139
140static int
141mpt_probe(device_t dev)
142{
143 char *desc;
144
145 if (pci_get_vendor(dev) != PCI_VENDOR_LSI)
146 return (ENXIO);
147
148 switch ((pci_get_device(dev) & ~1)) {
149 case PCI_PRODUCT_LSI_FC909:
150 desc = "LSILogic FC909 FC Adapter";
151 break;
152 case PCI_PRODUCT_LSI_FC909A:
153 desc = "LSILogic FC909A FC Adapter";
154 break;
155 case PCI_PRODUCT_LSI_FC919:
156 desc = "LSILogic FC919 FC Adapter";
157 break;
158 case PCI_PRODUCT_LSI_FC929:
159 desc = "LSILogic FC929 FC Adapter";
160 break;
161 case PCI_PRODUCT_LSI_1030:
162 desc = "LSILogic 1030 Ultra4 Adapter";
163 break;
164 default:
165 return (ENXIO);
166 }
167
168 device_set_desc(dev, desc);
169 return (0);
170}
171
172#ifdef RELENG_4
173static void
174mpt_set_options(mpt_softc_t *mpt)
175{
176 int bitmap;
177
178 bitmap = 0;
179 if (getenv_int("mpt_disable", &bitmap)) {
180 if (bitmap & (1 << mpt->unit)) {
181 mpt->disabled = 1;
182 }
183 }
184
185 bitmap = 0;
186 if (getenv_int("mpt_debug", &bitmap)) {
187 if (bitmap & (1 << mpt->unit)) {
188 mpt->verbose = 2;
189 }
190 }
191
192}
193#else
194static void
195mpt_set_options(mpt_softc_t *mpt)
196{
197 int tval;
198
199 tval = 0;
200 if (resource_int_value(device_get_name(mpt->dev),
201 device_get_unit(mpt->dev), "disable", &tval) == 0 && tval != 0) {
202 mpt->disabled = 1;
203 }
204 tval = 0;
205 if (resource_int_value(device_get_name(mpt->dev),
206 device_get_unit(mpt->dev), "debug", &tval) == 0 && tval != 0) {
207 mpt->verbose += tval;
208 }
209}
210#endif
211
212
213static void
214mpt_link_peer(mpt_softc_t *mpt)
215{
216 mpt_softc_t *mpt2;
217
218 if (mpt->unit == 0) {
219 return;
220 }
221
222 /*
223 * XXX: depends on probe order
224 */
225 mpt2 = (mpt_softc_t *) devclass_get_softc(mpt_devclass, mpt->unit-1);
226
227 if (mpt2 == NULL) {
228 return;
229 }
230 if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) {
231 return;
232 }
233 if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) {
234 return;
235 }
236 mpt->mpt2 = mpt2;
237 mpt2->mpt2 = mpt;
238 if (mpt->verbose) {
239 device_printf(mpt->dev, "linking with peer (mpt%d)\n",
240 device_get_unit(mpt2->dev));
241 }
242}
243
244
245static int
246mpt_attach(device_t dev)
247{
248 int iqd;
249 u_int32_t data, cmd;
250 mpt_softc_t *mpt;
251
252 /* Allocate the softc structure */
253 mpt = (mpt_softc_t*) device_get_softc(dev);
254 if (mpt == NULL) {
255 device_printf(dev, "cannot allocate softc\n");
256 return (ENOMEM);
257 }
258 bzero(mpt, sizeof (mpt_softc_t));
259 switch ((pci_get_device(dev) & ~1)) {
260 case PCI_PRODUCT_LSI_FC909:
261 case PCI_PRODUCT_LSI_FC909A:
262 case PCI_PRODUCT_LSI_FC919:
263 case PCI_PRODUCT_LSI_FC929:
264 mpt->is_fc = 1;
265 break;
266 default:
267 break;
268 }
269 mpt->dev = dev;
270 mpt->unit = device_get_unit(dev);
271 mpt_set_options(mpt);
272 mpt->verbose += (bootverbose != 0)? 1 : 0;
273
274 /* Make sure memory access decoders are enabled */
275 cmd = pci_read_config(dev, PCIR_COMMAND, 2);
276 if ((cmd & PCIM_CMD_MEMEN) == 0) {
277 device_printf(dev, "Memory accesses disabled");
278 goto bad;
279 }
280
281 /*
282 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set.
283 */
284 cmd |=
285 PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN |
286 PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN;
287 pci_write_config(dev, PCIR_COMMAND, cmd, 2);
288
289 /*
290 * Make sure we've disabled the ROM.
291 */
292 data = pci_read_config(dev, PCIR_BIOS, 4);
293 data &= ~1;
294 pci_write_config(dev, PCIR_BIOS, data, 4);
295
296
297 /*
298 * Is this part a dual?
299 * If so, link with our partner (around yet)
300 */
301 if ((pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC929 ||
302 (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_1030) {
303 mpt_link_peer(mpt);
304 }
305
306 /* Set up the memory regions */
307 /* Allocate kernel virtual memory for the 9x9's Mem0 region */
308 mpt->pci_reg_id = MEM_MAP_REG;
309 mpt->pci_reg = bus_alloc_resource(dev, SYS_RES_MEMORY,
310 &mpt->pci_reg_id, 0, ~0, 0, RF_ACTIVE);
311 if (mpt->pci_reg == NULL) {
312 device_printf(dev, "unable to map any ports\n");
313 goto bad;
314 }
315 mpt->pci_st = rman_get_bustag(mpt->pci_reg);
316 mpt->pci_sh = rman_get_bushandle(mpt->pci_reg);
317 /* Get the Physical Address */
318 mpt->pci_pa = rman_get_start(mpt->pci_reg);
319
320 /* Get a handle to the interrupt */
321 iqd = 0;
322 mpt->pci_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &iqd, 0, ~0,
323 1, RF_ACTIVE | RF_SHAREABLE);
324 if (mpt->pci_irq == NULL) {
325 device_printf(dev, "could not allocate interrupt\n");
326 goto bad;
327 }
328
329 /* Register the interrupt handler */
330 if (bus_setup_intr(dev, mpt->pci_irq, MPT_IFLAGS, mpt_pci_intr,
e9cb6d99 331 mpt, &mpt->ih, NULL)) {
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332 device_printf(dev, "could not setup interrupt\n");
333 goto bad;
334 }
335
336 MPT_LOCK_SETUP(mpt);
337
338 /* Disable interrupts at the part */
339 mpt_disable_ints(mpt);
340
341 /* Allocate dma memory */
342 if (mpt_dma_mem_alloc(mpt)) {
343 device_printf(dev, "Could not allocate DMA memory\n");
344 goto bad;
345 }
346
347 /*
348 * Save the PCI config register values
349 *
350 * Hard resets are known to screw up the BAR for diagnostic
351 * memory accesses (Mem1).
352 *
353 * Using Mem1 is known to make the chip stop responding to
354 * configuration space transfers, so we need to save it now
355 */
356
357 mpt_read_config_regs(mpt);
358
359 /* Initialize the hardware */
360 if (mpt->disabled == 0) {
361 MPT_LOCK(mpt);
362 if (mpt_init(mpt, MPT_DB_INIT_HOST) != 0) {
363 MPT_UNLOCK(mpt);
364 goto bad;
365 }
366
367 /*
368 * Attach to CAM
369 */
984263bc 370 mpt_cam_attach(mpt);
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371 MPT_UNLOCK(mpt);
372 }
373
374 return (0);
375
376bad:
377 mpt_dma_mem_free(mpt);
378 mpt_free_bus_resources(mpt);
379
380 /*
381 * but return zero to preserve unit numbering
382 */
383 return (0);
384}
385
386/*
387 * Free bus resources
388 */
389static void
390mpt_free_bus_resources(mpt_softc_t *mpt)
391{
392 if (mpt->ih) {
393 bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih);
394 mpt->ih = 0;
395 }
396
397 if (mpt->pci_irq) {
398 bus_release_resource(mpt->dev, SYS_RES_IRQ, 0, mpt->pci_irq);
399 mpt->pci_irq = 0;
400 }
401
402 if (mpt->pci_reg) {
403 bus_release_resource(mpt->dev, SYS_RES_MEMORY, mpt->pci_reg_id,
404 mpt->pci_reg);
405 mpt->pci_reg = 0;
406 }
407 MPT_LOCK_DESTROY(mpt);
408}
409
410
411/*
412 * Disconnect ourselves from the system.
413 */
414static int
415mpt_detach(device_t dev)
416{
417 mpt_softc_t *mpt;
418 mpt = (mpt_softc_t*) device_get_softc(dev);
419
420 device_printf(mpt->dev,"mpt_detach!\n");
421
422 if (mpt) {
423 mpt_disable_ints(mpt);
424 mpt_cam_detach(mpt);
425 mpt_reset(mpt);
426 mpt_dma_mem_free(mpt);
427 mpt_free_bus_resources(mpt);
428 }
429 return(0);
430}
431
432
433/*
434 * Disable the hardware
435 */
436static int
437mpt_shutdown(device_t dev)
438{
439 mpt_softc_t *mpt;
440 mpt = (mpt_softc_t*) device_get_softc(dev);
441
442 if (mpt) {
443 mpt_reset(mpt);
444 }
445 return(0);
446}
447
448
449struct imush {
450 mpt_softc_t *mpt;
451 int error;
452 u_int32_t phys;
453};
454
455static void
456mpt_map_rquest(void *arg, bus_dma_segment_t *segs, int nseg, int error)
457{
458 struct imush *imushp = (struct imush *) arg;
459 imushp->error = error;
460 imushp->phys = segs->ds_addr;
461}
462
463
464static int
465mpt_dma_mem_alloc(mpt_softc_t *mpt)
466{
467 int i, error;
468 u_char *vptr;
469 u_int32_t pptr, end;
470 size_t len;
471 struct imush im;
472 device_t dev = mpt->dev;
473
474 /* Check if we alreay have allocated the reply memory */
475 if (mpt->reply_phys != NULL) {
476 return 0;
477 }
478
479 len = sizeof (request_t *) * MPT_REQ_MEM_SIZE(mpt);
480#ifdef RELENG_4
481 mpt->request_pool = (request_t *) malloc(len, M_DEVBUF, M_WAITOK);
482 if (mpt->request_pool == NULL) {
483 device_printf(dev, "cannot allocate request pool\n");
484 return (1);
485 }
486 bzero(mpt->request_pool, len);
487#else
488 mpt->request_pool = (request_t *)
489 malloc(len, M_DEVBUF, M_WAITOK | M_ZERO);
490 if (mpt->request_pool == NULL) {
491 device_printf(dev, "cannot allocate request pool\n");
492 return (1);
493 }
494#endif
495
496 /*
497 * Create a dma tag for this device
498 *
499 * Align at page boundaries, limit to 32-bit addressing
500 * (The chip supports 64-bit addressing, but this driver doesn't)
501 */
502 if (bus_dma_tag_create(NULL, PAGE_SIZE, 0, BUS_SPACE_MAXADDR_32BIT,
503 BUS_SPACE_MAXADDR, NULL, NULL, BUS_SPACE_MAXSIZE_32BIT,
504 BUS_SPACE_MAXSIZE_32BIT, BUS_SPACE_UNRESTRICTED, 0,
505 &mpt->parent_dmat) != 0) {
506 device_printf(dev, "cannot create parent dma tag\n");
507 return (1);
508 }
509
510 /* Create a child tag for reply buffers */
511 if (bus_dma_tag_create(mpt->parent_dmat, PAGE_SIZE,
512 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
513 NULL, NULL, PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0,
514 &mpt->reply_dmat) != 0) {
515 device_printf(dev, "cannot create a dma tag for replies\n");
516 return (1);
517 }
518
519 /* Allocate some DMA accessable memory for replies */
520 if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply,
521 BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) {
522 device_printf(dev, "cannot allocate %d bytes of reply memory\n",
523 PAGE_SIZE);
524 return (1);
525 }
526
527 im.mpt = mpt;
528 im.error = 0;
529
530 /* Load and lock it into "bus space" */
531 bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply,
532 PAGE_SIZE, mpt_map_rquest, &im, 0);
533
534 if (im.error) {
535 device_printf(dev,
536 "error %d loading dma map for DMA reply queue\n", im.error);
537 return (1);
538 }
539 mpt->reply_phys = im.phys;
540
541 /* Create a child tag for data buffers */
542 if (bus_dma_tag_create(mpt->parent_dmat, PAGE_SIZE,
543 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
544 NULL, NULL, MAXBSIZE, MPT_SGL_MAX, BUS_SPACE_MAXSIZE_32BIT, 0,
545 &mpt->buffer_dmat) != 0) {
546 device_printf(dev,
547 "cannot create a dma tag for data buffers\n");
548 return (1);
549 }
550
551 /* Create a child tag for request buffers */
552 if (bus_dma_tag_create(mpt->parent_dmat, PAGE_SIZE,
553 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
554 NULL, NULL, MPT_REQ_MEM_SIZE(mpt), 1, BUS_SPACE_MAXSIZE_32BIT, 0,
555 &mpt->request_dmat) != 0) {
556 device_printf(dev, "cannot create a dma tag for requests\n");
557 return (1);
558 }
559
560 /* Allocate some DMA accessable memory for requests */
561 if (bus_dmamem_alloc(mpt->request_dmat, (void **)&mpt->request,
562 BUS_DMA_NOWAIT, &mpt->request_dmap) != 0) {
563 device_printf(dev,
564 "cannot allocate %d bytes of request memory\n",
565 MPT_REQ_MEM_SIZE(mpt));
566 return (1);
567 }
568
569 im.mpt = mpt;
570 im.error = 0;
571
572 /* Load and lock it into "bus space" */
573 bus_dmamap_load(mpt->request_dmat, mpt->request_dmap, mpt->request,
574 MPT_REQ_MEM_SIZE(mpt), mpt_map_rquest, &im, 0);
575
576 if (im.error) {
577 device_printf(dev,
578 "error %d loading dma map for DMA request queue\n",
579 im.error);
580 return (1);
581 }
582 mpt->request_phys = im.phys;
583
584 i = 0;
585 pptr = mpt->request_phys;
586 vptr = mpt->request;
587 end = pptr + MPT_REQ_MEM_SIZE(mpt);
588 while(pptr < end) {
589 request_t *req = &mpt->request_pool[i];
590 req->index = i++;
591
592 /* Store location of Request Data */
593 req->req_pbuf = pptr;
594 req->req_vbuf = vptr;
595
596 pptr += MPT_REQUEST_AREA;
597 vptr += MPT_REQUEST_AREA;
598
599 req->sense_pbuf = (pptr - MPT_SENSE_SIZE);
600 req->sense_vbuf = (vptr - MPT_SENSE_SIZE);
601
602 error = bus_dmamap_create(mpt->buffer_dmat, 0, &req->dmap);
603 if (error) {
604 device_printf(dev,
605 "error %d creating per-cmd DMA maps\n", error);
606 return (1);
607 }
608 }
609 return (0);
610}
611
612
613
614/* Deallocate memory that was allocated by mpt_dma_mem_alloc
615 */
616static void
617mpt_dma_mem_free(mpt_softc_t *mpt)
618{
619 int i;
620
621 /* Make sure we aren't double destroying */
622 if (mpt->reply_dmat == 0) {
623 if (mpt->verbose)
624 device_printf(mpt->dev,"Already released dma memory\n");
625 return;
626 }
627
628 for (i = 0; i < MPT_MAX_REQUESTS(mpt); i++) {
629 bus_dmamap_destroy(mpt->buffer_dmat, mpt->request_pool[i].dmap);
630 }
631 bus_dmamap_unload(mpt->request_dmat, mpt->request_dmap);
632 bus_dmamem_free(mpt->request_dmat, mpt->request, mpt->request_dmap);
633 bus_dma_tag_destroy(mpt->request_dmat);
634 bus_dma_tag_destroy(mpt->buffer_dmat);
635 bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap);
636 bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap);
637 bus_dma_tag_destroy(mpt->reply_dmat);
638 bus_dma_tag_destroy(mpt->parent_dmat);
639 mpt->reply_dmat = 0;
640 free(mpt->request_pool, M_DEVBUF);
641 mpt->request_pool = 0;
642
643}
644
645
646
647/* Reads modifiable (via PCI transactions) config registers */
648static void
649mpt_read_config_regs(mpt_softc_t *mpt)
650{
651 mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2);
652 mpt->pci_cfg.LatencyTimer_LineSize =
653 pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2);
654 mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_MAPS, 4);
655 mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_MAPS+0x4, 4);
656 mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_MAPS+0x8, 4);
657 mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_MAPS+0xC, 4);
658 mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_MAPS+0x10, 4);
659 mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4);
660 mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1);
661 mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4);
662}
663
664/* Sets modifiable config registers */
665void
666mpt_set_config_regs(mpt_softc_t *mpt)
667{
668 u_int32_t val;
669
670#define MPT_CHECK(reg, offset, size) \
671 val = pci_read_config(mpt->dev, offset, size); \
672 if (mpt->pci_cfg.reg != val) { \
673 device_printf(mpt->dev, \
674 "Restoring " #reg " to 0x%X from 0x%X\n", \
675 mpt->pci_cfg.reg, val); \
676 }
677
678 if (mpt->verbose) {
679 MPT_CHECK(Command, PCIR_COMMAND, 2);
680 MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2);
681 MPT_CHECK(IO_BAR, PCIR_MAPS, 4);
682 MPT_CHECK(Mem0_BAR[0], PCIR_MAPS+0x4, 4);
683 MPT_CHECK(Mem0_BAR[1], PCIR_MAPS+0x8, 4);
684 MPT_CHECK(Mem1_BAR[0], PCIR_MAPS+0xC, 4);
685 MPT_CHECK(Mem1_BAR[1], PCIR_MAPS+0x10, 4);
686 MPT_CHECK(ROM_BAR, PCIR_BIOS, 4);
687 MPT_CHECK(IntLine, PCIR_INTLINE, 1);
688 MPT_CHECK(PMCSR, 0x44, 4);
689 }
690#undef MPT_CHECK
691
692 pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2);
693 pci_write_config(mpt->dev, PCIR_CACHELNSZ,
694 mpt->pci_cfg.LatencyTimer_LineSize, 2);
695 pci_write_config(mpt->dev, PCIR_MAPS, mpt->pci_cfg.IO_BAR, 4);
696 pci_write_config(mpt->dev, PCIR_MAPS+0x4, mpt->pci_cfg.Mem0_BAR[0], 4);
697 pci_write_config(mpt->dev, PCIR_MAPS+0x8, mpt->pci_cfg.Mem0_BAR[1], 4);
698 pci_write_config(mpt->dev, PCIR_MAPS+0xC, mpt->pci_cfg.Mem1_BAR[0], 4);
699 pci_write_config(mpt->dev, PCIR_MAPS+0x10, mpt->pci_cfg.Mem1_BAR[1], 4);
700 pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4);
701 pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1);
702 pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4);
703}
704
705static void
706mpt_pci_intr(void *arg)
707{
708 mpt_softc_t *mpt = arg;
709 MPT_LOCK(mpt);
710 (void) mpt_intr(mpt);
711 MPT_UNLOCK(mpt);
712}