kernel: Fix LINT too.
[dragonfly.git] / sys / dev / serial / stl / stallion.c
<
CommitLineData
984263bc
MD
1/*****************************************************************************/
2
3/*
4 * stallion.c -- stallion multiport serial driver.
5 *
6 * Copyright (c) 1995-1996 Greg Ungerer (gerg@stallion.oz.au).
7 * All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by Greg Ungerer.
20 * 4. Neither the name of the author nor the names of any co-contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * SUCH DAMAGE.
35 *
36 * $FreeBSD: src/sys/i386/isa/stallion.c,v 1.39.2.2 2001/08/30 12:29:57 murray Exp $
37 */
38
39/*****************************************************************************/
40
41#define TTYDEFCHARS 1
42
43#include "opt_compat.h"
44
45#include <sys/param.h>
9f621687 46#include <sys/bus.h>
984263bc
MD
47#include <sys/systm.h>
48#include <sys/kernel.h>
49#include <sys/malloc.h>
50#include <sys/tty.h>
51#include <sys/proc.h>
895c1f85 52#include <sys/priv.h>
984263bc
MD
53#include <sys/conf.h>
54#include <sys/fcntl.h>
8d77660e 55#include <sys/thread2.h>
db75f6aa
SW
56#include <dev/serial/stl/scd1400.h>
57#include <dev/serial/stl/sc26198.h>
984263bc
MD
58#include <machine/comstats.h>
59
1f2de5d4
MD
60#include <bus/pci/pcivar.h>
61#include <bus/pci/pcireg.h>
984263bc
MD
62
63#undef STLDEBUG
64
65/*****************************************************************************/
66
984263bc
MD
67/*
68 * Define different board types. At the moment I have only declared
69 * those boards that this driver supports. But I will use the standard
70 * "assigned" board numbers. In the future this driver will support
71 * some of the other Stallion boards. Currently supported boards are
72 * abbreviated as EIO = EasyIO and ECH = EasyConnection 8/32.
73 */
74#define BRD_EASYIO 20
75#define BRD_ECH 21
76#define BRD_ECHMC 22
77#define BRD_ECHPCI 26
78#define BRD_ECH64PCI 27
79#define BRD_EASYIOPCI 28
80
984263bc
MD
81/*****************************************************************************/
82
83/*
84 * Define important driver limitations.
85 */
86#define STL_MAXBRDS 8
87#define STL_MAXPANELS 4
88#define STL_MAXBANKS 8
89#define STL_PORTSPERPANEL 16
90#define STL_PORTSPERBRD 64
91
92/*
93 * Define the important minor number break down bits. These have been
9a7c6212 94 * chosen to be "compatible" with the standard sio driver minor numbers.
984263bc
MD
95 * Extra high bits are used to distinguish between boards.
96 */
97#define STL_CALLOUTDEV 0x80
98#define STL_CTRLLOCK 0x40
99#define STL_CTRLINIT 0x20
100#define STL_CTRLDEV (STL_CTRLLOCK | STL_CTRLINIT)
101
102#define STL_MEMDEV 0x07000000
103
104#define STL_DEFSPEED TTYDEF_SPEED
105#define STL_DEFCFLAG (CS8 | CREAD | HUPCL)
106
107/*
108 * I haven't really decided (or measured) what buffer sizes give
109 * a good balance between performance and memory usage. These seem
110 * to work pretty well...
111 */
112#define STL_RXBUFSIZE 2048
113#define STL_TXBUFSIZE 2048
114
115#define STL_TXBUFLOW (STL_TXBUFSIZE / 4)
116#define STL_RXBUFHIGH (3 * STL_RXBUFSIZE / 4)
117
118/*****************************************************************************/
119
120/*
121 * Define our local driver identity first. Set up stuff to deal with
122 * all the local structures required by a serial tty driver.
123 */
124static const char stl_drvname[] = "stl";
125static const char stl_longdrvname[] = "Stallion Multiport Serial Driver";
126static const char stl_drvversion[] = "2.0.0";
984263bc
MD
127
128static int stl_nrbrds = 0;
129static int stl_doingtimeout = 0;
79b066dc 130static struct callout stl_poll_ch;
984263bc
MD
131
132static const char __file__[] = /*__FILE__*/ "stallion.c";
133
134/*
135 * Define global stats structures. Not used often, and can be
136 * re-used for each stats call.
137 */
138static combrd_t stl_brdstats;
139static comstats_t stl_comstats;
140
141/*****************************************************************************/
142
143/*
144 * Define a set of structures to hold all the board/panel/port info
145 * for our ports. These will be dynamically allocated as required.
146 */
147
148/*
149 * Define a ring queue structure for each port. This will hold the
150 * TX data waiting to be output. Characters are fed into this buffer
151 * from the line discipline (or even direct from user space!) and
152 * then fed into the UARTs during interrupts. Will use a clasic ring
153 * queue here for this. The good thing about this type of ring queue
154 * is that the head and tail pointers can be updated without interrupt
155 * protection - since "write" code only needs to change the head, and
156 * interrupt code only needs to change the tail.
157 */
158typedef struct {
159 char *buf;
160 char *endbuf;
161 char *head;
162 char *tail;
163} stlrq_t;
164
165/*
166 * Port, panel and board structures to hold status info about each.
167 * The board structure contains pointers to structures for each panel
168 * connected to it, and in turn each panel structure contains pointers
169 * for each port structure for each port on that panel. Note that
170 * the port structure also contains the board and panel number that it
171 * is associated with, this makes it (fairly) easy to get back to the
172 * board/panel info for a port. Also note that the tty struct is at
173 * the top of the structure, this is important, since the code uses
174 * this fact to get the port struct pointer from the tty struct
175 * pointer!
176 */
177typedef struct stlport {
178 struct tty tty;
179 int portnr;
180 int panelnr;
181 int brdnr;
182 int ioaddr;
183 int uartaddr;
184 int pagenr;
185 int callout;
186 int brklen;
187 int dtrwait;
188 int dotimestamp;
189 int waitopens;
190 int hotchar;
191 void *uartp;
192 unsigned int state;
193 unsigned int hwid;
194 unsigned int sigs;
195 unsigned int rxignoremsk;
196 unsigned int rxmarkmsk;
197 unsigned int crenable;
198 unsigned int imr;
199 unsigned long clk;
200 struct termios initintios;
201 struct termios initouttios;
202 struct termios lockintios;
203 struct termios lockouttios;
204 struct timeval timestamp;
205 comstats_t stats;
206 stlrq_t tx;
207 stlrq_t rx;
208 stlrq_t rxstatus;
79b066dc 209 struct callout dtr_ch;
984263bc
MD
210} stlport_t;
211
212typedef struct stlpanel {
213 int panelnr;
214 int brdnr;
215 int pagenr;
216 int nrports;
217 int iobase;
218 unsigned int hwid;
219 unsigned int ackmask;
220 void (*isr)(struct stlpanel *panelp, unsigned int iobase);
221 void *uartp;
222 stlport_t *ports[STL_PORTSPERPANEL];
223} stlpanel_t;
224
225typedef struct stlbrd {
226 int brdnr;
227 int brdtype;
228 int unitid;
229 int state;
230 int nrpanels;
231 int nrports;
232 int nrbnks;
233 int irq;
234 int irqtype;
235 unsigned int ioaddr1;
236 unsigned int ioaddr2;
237 unsigned int iostatus;
238 unsigned int ioctrl;
239 unsigned int ioctrlval;
240 unsigned int hwid;
241 unsigned long clk;
242 void (*isr)(struct stlbrd *brdp);
243 unsigned int bnkpageaddr[STL_MAXBANKS];
244 unsigned int bnkstataddr[STL_MAXBANKS];
245 stlpanel_t *bnk2panel[STL_MAXBANKS];
246 stlpanel_t *panels[STL_MAXPANELS];
247 stlport_t *ports[STL_PORTSPERBRD];
248} stlbrd_t;
249
250static stlbrd_t *stl_brds[STL_MAXBRDS];
251
252/*
253 * Per board state flags. Used with the state field of the board struct.
254 * Not really much here yet!
255 */
256#define BRD_FOUND 0x1
257
258/*
259 * Define the port structure state flags. These set of flags are
260 * modified at interrupt time - so setting and reseting them needs
261 * to be atomic.
262 */
263#define ASY_TXLOW 0x1
264#define ASY_RXDATA 0x2
265#define ASY_DCDCHANGE 0x4
266#define ASY_DTRWAIT 0x8
267#define ASY_RTSFLOW 0x10
268#define ASY_RTSFLOWMODE 0x20
269#define ASY_CTSFLOWMODE 0x40
270#define ASY_TXFLOWED 0x80
271#define ASY_TXBUSY 0x100
272#define ASY_TXEMPTY 0x200
273
274#define ASY_ACTIVE (ASY_TXLOW | ASY_RXDATA | ASY_DCDCHANGE)
275
276/*
277 * Define an array of board names as printable strings. Handy for
278 * referencing boards when printing trace and stuff.
279 */
280static char *stl_brdnames[] = {
2038fb68
SW
281 NULL,
282 NULL,
283 NULL,
284 NULL,
285 NULL,
286 NULL,
287 NULL,
288 NULL,
289 NULL,
290 NULL,
291 NULL,
292 NULL,
293 NULL,
294 NULL,
295 NULL,
296 NULL,
297 NULL,
298 NULL,
299 NULL,
300 NULL,
984263bc
MD
301 "EasyIO",
302 "EC8/32-AT",
303 "EC8/32-MC",
2038fb68
SW
304 NULL,
305 NULL,
306 NULL,
984263bc
MD
307 "EC8/32-PCI",
308 "EC8/64-PCI",
309 "EasyIO-PCI",
310};
311
312/*****************************************************************************/
313
314/*
315 * Hardware ID bits for the EasyIO and ECH boards. These defines apply
316 * to the directly accessable io ports of these boards (not the cd1400
317 * uarts - they are in scd1400.h).
318 */
319#define EIO_8PORTRS 0x04
320#define EIO_4PORTRS 0x05
321#define EIO_8PORTDI 0x00
322#define EIO_8PORTM 0x06
323#define EIO_MK3 0x03
324#define EIO_IDBITMASK 0x07
325
326#define EIO_BRDMASK 0xf0
327#define ID_BRD4 0x10
328#define ID_BRD8 0x20
329#define ID_BRD16 0x30
330
331#define EIO_INTRPEND 0x08
332#define EIO_INTEDGE 0x00
333#define EIO_INTLEVEL 0x08
334
335#define ECH_ID 0xa0
336#define ECH_IDBITMASK 0xe0
337#define ECH_BRDENABLE 0x08
338#define ECH_BRDDISABLE 0x00
339#define ECH_INTENABLE 0x01
340#define ECH_INTDISABLE 0x00
341#define ECH_INTLEVEL 0x02
342#define ECH_INTEDGE 0x00
343#define ECH_INTRPEND 0x01
344#define ECH_BRDRESET 0x01
345
346#define ECHMC_INTENABLE 0x01
347#define ECHMC_BRDRESET 0x02
348
349#define ECH_PNLSTATUS 2
350#define ECH_PNL16PORT 0x20
351#define ECH_PNLIDMASK 0x07
352#define ECH_PNLXPID 0x40
353#define ECH_PNLINTRPEND 0x80
354#define ECH_ADDR2MASK 0x1e0
355
356#define EIO_CLK 25000000
357#define EIO_CLK8M 20000000
358#define ECH_CLK EIO_CLK
359
360/*
361 * Define the PCI vendor and device ID for Stallion PCI boards.
362 */
363#define STL_PCINSVENDID 0x100b
364#define STL_PCINSDEVID 0xd001
365
366#define STL_PCIVENDID 0x124d
367#define STL_PCI32DEVID 0x0000
368#define STL_PCI64DEVID 0x0002
369#define STL_PCIEIODEVID 0x0003
370
371#define STL_PCIBADCLASS 0x0101
372
373typedef struct stlpcibrd {
374 unsigned short vendid;
375 unsigned short devid;
376 int brdtype;
377} stlpcibrd_t;
378
379static stlpcibrd_t stl_pcibrds[] = {
380 { STL_PCIVENDID, STL_PCI64DEVID, BRD_ECH64PCI },
381 { STL_PCIVENDID, STL_PCIEIODEVID, BRD_EASYIOPCI },
382 { STL_PCIVENDID, STL_PCI32DEVID, BRD_ECHPCI },
383 { STL_PCINSVENDID, STL_PCINSDEVID, BRD_ECHPCI },
384};
385
b370aff7 386static int stl_nrpcibrds = NELEM(stl_pcibrds);
984263bc
MD
387
388/*****************************************************************************/
389
390/*
391 * Define the vector mapping bits for the programmable interrupt board
392 * hardware. These bits encode the interrupt for the board to use - it
393 * is software selectable (except the EIO-8M).
394 */
395static unsigned char stl_vecmap[] = {
396 0xff, 0xff, 0xff, 0x04, 0x06, 0x05, 0xff, 0x07,
397 0xff, 0xff, 0x00, 0x02, 0x01, 0xff, 0xff, 0x03
398};
399
400/*
401 * Set up enable and disable macros for the ECH boards. They require
402 * the secondary io address space to be activated and deactivated.
403 * This way all ECH boards can share their secondary io region.
404 * If this is an ECH-PCI board then also need to set the page pointer
405 * to point to the correct page.
406 */
407#define BRDENABLE(brdnr,pagenr) \
408 if (stl_brds[(brdnr)]->brdtype == BRD_ECH) \
409 outb(stl_brds[(brdnr)]->ioctrl, \
410 (stl_brds[(brdnr)]->ioctrlval | ECH_BRDENABLE));\
411 else if (stl_brds[(brdnr)]->brdtype == BRD_ECHPCI) \
412 outb(stl_brds[(brdnr)]->ioctrl, (pagenr));
413
414#define BRDDISABLE(brdnr) \
415 if (stl_brds[(brdnr)]->brdtype == BRD_ECH) \
416 outb(stl_brds[(brdnr)]->ioctrl, \
417 (stl_brds[(brdnr)]->ioctrlval | ECH_BRDDISABLE));
418
419/*
420 * Define some spare buffer space for un-wanted received characters.
421 */
422static char stl_unwanted[SC26198_RXFIFOSIZE];
423
424/*****************************************************************************/
425
426/*
427 * Define macros to extract a brd and port number from a minor number.
428 * This uses the extended minor number range in the upper 2 bytes of
429 * the device number. This gives us plenty of minor numbers to play
430 * with...
431 */
432#define MKDEV2BRD(m) ((minor(m) & 0x00700000) >> 20)
433#define MKDEV2PORT(m) ((minor(m) & 0x1f) | ((minor(m) & 0x00010000) >> 11))
434
435/*
436 * Define some handy local macros...
437 */
438#ifndef MIN
439#define MIN(a,b) (((a) <= (b)) ? (a) : (b))
440#endif
441
442/*****************************************************************************/
443
444/*
445 * Declare all those functions in this driver! First up is the set of
446 * externally visible functions.
447 */
448
e6f626a1
SW
449static d_open_t stlopen;
450static d_close_t stlclose;
451static d_ioctl_t stlioctl;
984263bc
MD
452
453/*
454 * Internal function prototypes.
455 */
b13267a5 456static stlport_t *stl_dev2port(cdev_t dev);
984263bc
MD
457static int stl_findfreeunit(void);
458static int stl_rawopen(stlport_t *portp);
459static int stl_rawclose(stlport_t *portp);
460static void stl_flush(stlport_t *portp, int flag);
461static int stl_param(struct tty *tp, struct termios *tiosp);
462static void stl_start(struct tty *tp);
463static void stl_stop(struct tty *tp, int);
464static void stl_ttyoptim(stlport_t *portp, struct termios *tiosp);
465static void stl_dotimeout(void);
466static void stl_poll(void *arg);
467static void stl_rxprocess(stlport_t *portp);
468static void stl_flowcontrol(stlport_t *portp, int hw, int sw);
469static void stl_dtrwakeup(void *arg);
470static int stl_brdinit(stlbrd_t *brdp);
471static int stl_initeio(stlbrd_t *brdp);
472static int stl_initech(stlbrd_t *brdp);
473static int stl_initports(stlbrd_t *brdp, stlpanel_t *panelp);
474static void stl_eiointr(stlbrd_t *brdp);
475static void stl_echatintr(stlbrd_t *brdp);
476static void stl_echmcaintr(stlbrd_t *brdp);
477static void stl_echpciintr(stlbrd_t *brdp);
478static void stl_echpci64intr(stlbrd_t *brdp);
b13267a5 479static int stl_memioctl(cdev_t dev, unsigned long cmd, caddr_t data,
fef8985e 480 int flag);
984263bc
MD
481static int stl_getbrdstats(caddr_t data);
482static int stl_getportstats(stlport_t *portp, caddr_t data);
483static int stl_clrportstats(stlport_t *portp, caddr_t data);
484static stlport_t *stl_getport(int brdnr, int panelnr, int portnr);
1b51b0fa 485static void stlintr(void *);
984263bc 486
984263bc
MD
487static const char *stlpciprobe(pcici_t tag, pcidi_t type);
488static void stlpciattach(pcici_t tag, int unit);
489static void stlpciintr(void * arg);
984263bc
MD
490
491/*
492 * CD1400 uart specific handling functions.
493 */
494static void stl_cd1400setreg(stlport_t *portp, int regnr, int value);
495static int stl_cd1400getreg(stlport_t *portp, int regnr);
496static int stl_cd1400updatereg(stlport_t *portp, int regnr, int value);
497static int stl_cd1400panelinit(stlbrd_t *brdp, stlpanel_t *panelp);
498static void stl_cd1400portinit(stlbrd_t *brdp, stlpanel_t *panelp, stlport_t *portp);
499static int stl_cd1400setport(stlport_t *portp, struct termios *tiosp);
500static int stl_cd1400getsignals(stlport_t *portp);
501static void stl_cd1400setsignals(stlport_t *portp, int dtr, int rts);
502static void stl_cd1400ccrwait(stlport_t *portp);
503static void stl_cd1400enablerxtx(stlport_t *portp, int rx, int tx);
504static void stl_cd1400startrxtx(stlport_t *portp, int rx, int tx);
505static void stl_cd1400disableintrs(stlport_t *portp);
506static void stl_cd1400sendbreak(stlport_t *portp, long len);
507static void stl_cd1400sendflow(stlport_t *portp, int hw, int sw);
508static int stl_cd1400datastate(stlport_t *portp);
509static void stl_cd1400flush(stlport_t *portp, int flag);
510static __inline void stl_cd1400txisr(stlpanel_t *panelp, int ioaddr);
511static void stl_cd1400rxisr(stlpanel_t *panelp, int ioaddr);
512static void stl_cd1400mdmisr(stlpanel_t *panelp, int ioaddr);
513static void stl_cd1400eiointr(stlpanel_t *panelp, unsigned int iobase);
514static void stl_cd1400echintr(stlpanel_t *panelp, unsigned int iobase);
515
516/*
517 * SC26198 uart specific handling functions.
518 */
519static void stl_sc26198setreg(stlport_t *portp, int regnr, int value);
520static int stl_sc26198getreg(stlport_t *portp, int regnr);
521static int stl_sc26198updatereg(stlport_t *portp, int regnr, int value);
522static int stl_sc26198getglobreg(stlport_t *portp, int regnr);
523static int stl_sc26198panelinit(stlbrd_t *brdp, stlpanel_t *panelp);
524static void stl_sc26198portinit(stlbrd_t *brdp, stlpanel_t *panelp, stlport_t *portp);
525static int stl_sc26198setport(stlport_t *portp, struct termios *tiosp);
526static int stl_sc26198getsignals(stlport_t *portp);
527static void stl_sc26198setsignals(stlport_t *portp, int dtr, int rts);
528static void stl_sc26198enablerxtx(stlport_t *portp, int rx, int tx);
529static void stl_sc26198startrxtx(stlport_t *portp, int rx, int tx);
530static void stl_sc26198disableintrs(stlport_t *portp);
531static void stl_sc26198sendbreak(stlport_t *portp, long len);
532static void stl_sc26198sendflow(stlport_t *portp, int hw, int sw);
533static int stl_sc26198datastate(stlport_t *portp);
534static void stl_sc26198flush(stlport_t *portp, int flag);
535static void stl_sc26198txunflow(stlport_t *portp);
536static void stl_sc26198wait(stlport_t *portp);
537static void stl_sc26198intr(stlpanel_t *panelp, unsigned int iobase);
538static void stl_sc26198txisr(stlport_t *port);
539static void stl_sc26198rxisr(stlport_t *port, unsigned int iack);
540static void stl_sc26198rxgoodchars(stlport_t *portp);
541static void stl_sc26198rxbadchars(stlport_t *portp);
542static void stl_sc26198otherisr(stlport_t *port, unsigned int iack);
543
544/*****************************************************************************/
545
546/*
547 * Generic UART support structure.
548 */
549typedef struct uart {
550 int (*panelinit)(stlbrd_t *brdp, stlpanel_t *panelp);
551 void (*portinit)(stlbrd_t *brdp, stlpanel_t *panelp, stlport_t *portp);
552 int (*setport)(stlport_t *portp, struct termios *tiosp);
553 int (*getsignals)(stlport_t *portp);
554 void (*setsignals)(stlport_t *portp, int dtr, int rts);
555 void (*enablerxtx)(stlport_t *portp, int rx, int tx);
556 void (*startrxtx)(stlport_t *portp, int rx, int tx);
557 void (*disableintrs)(stlport_t *portp);
558 void (*sendbreak)(stlport_t *portp, long len);
559 void (*sendflow)(stlport_t *portp, int hw, int sw);
560 void (*flush)(stlport_t *portp, int flag);
561 int (*datastate)(stlport_t *portp);
562 void (*intr)(stlpanel_t *panelp, unsigned int iobase);
563} uart_t;
564
565/*
566 * Define some macros to make calling these functions nice and clean.
567 */
568#define stl_panelinit (* ((uart_t *) panelp->uartp)->panelinit)
569#define stl_portinit (* ((uart_t *) portp->uartp)->portinit)
570#define stl_setport (* ((uart_t *) portp->uartp)->setport)
571#define stl_getsignals (* ((uart_t *) portp->uartp)->getsignals)
572#define stl_setsignals (* ((uart_t *) portp->uartp)->setsignals)
573#define stl_enablerxtx (* ((uart_t *) portp->uartp)->enablerxtx)
574#define stl_startrxtx (* ((uart_t *) portp->uartp)->startrxtx)
575#define stl_disableintrs (* ((uart_t *) portp->uartp)->disableintrs)
576#define stl_sendbreak (* ((uart_t *) portp->uartp)->sendbreak)
577#define stl_sendflow (* ((uart_t *) portp->uartp)->sendflow)
578#define stl_uartflush (* ((uart_t *) portp->uartp)->flush)
579#define stl_datastate (* ((uart_t *) portp->uartp)->datastate)
580
581/*****************************************************************************/
582
583/*
584 * CD1400 UART specific data initialization.
585 */
586static uart_t stl_cd1400uart = {
587 stl_cd1400panelinit,
588 stl_cd1400portinit,
589 stl_cd1400setport,
590 stl_cd1400getsignals,
591 stl_cd1400setsignals,
592 stl_cd1400enablerxtx,
593 stl_cd1400startrxtx,
594 stl_cd1400disableintrs,
595 stl_cd1400sendbreak,
596 stl_cd1400sendflow,
597 stl_cd1400flush,
598 stl_cd1400datastate,
599 stl_cd1400eiointr
600};
601
602/*
603 * Define the offsets within the register bank of a cd1400 based panel.
604 * These io address offsets are common to the EasyIO board as well.
605 */
606#define EREG_ADDR 0
607#define EREG_DATA 4
608#define EREG_RXACK 5
609#define EREG_TXACK 6
610#define EREG_MDACK 7
611
612#define EREG_BANKSIZE 8
613
614#define CD1400_CLK 25000000
615#define CD1400_CLK8M 20000000
616
617/*
618 * Define the cd1400 baud rate clocks. These are used when calculating
619 * what clock and divisor to use for the required baud rate. Also
620 * define the maximum baud rate allowed, and the default base baud.
621 */
622static int stl_cd1400clkdivs[] = {
623 CD1400_CLK0, CD1400_CLK1, CD1400_CLK2, CD1400_CLK3, CD1400_CLK4
624};
625
626/*
627 * Define the maximum baud rate of the cd1400 devices.
628 */
629#define CD1400_MAXBAUD 230400
630
631/*****************************************************************************/
632
633/*
634 * SC26198 UART specific data initization.
635 */
636static uart_t stl_sc26198uart = {
637 stl_sc26198panelinit,
638 stl_sc26198portinit,
639 stl_sc26198setport,
640 stl_sc26198getsignals,
641 stl_sc26198setsignals,
642 stl_sc26198enablerxtx,
643 stl_sc26198startrxtx,
644 stl_sc26198disableintrs,
645 stl_sc26198sendbreak,
646 stl_sc26198sendflow,
647 stl_sc26198flush,
648 stl_sc26198datastate,
649 stl_sc26198intr
650};
651
652/*
653 * Define the offsets within the register bank of a sc26198 based panel.
654 */
655#define XP_DATA 0
656#define XP_ADDR 1
657#define XP_MODID 2
658#define XP_STATUS 2
659#define XP_IACK 3
660
661#define XP_BANKSIZE 4
662
663/*
664 * Define the sc26198 baud rate table. Offsets within the table
665 * represent the actual baud rate selector of sc26198 registers.
666 */
667static unsigned int sc26198_baudtable[] = {
668 50, 75, 150, 200, 300, 450, 600, 900, 1200, 1800, 2400, 3600,
669 4800, 7200, 9600, 14400, 19200, 28800, 38400, 57600, 115200,
670 230400, 460800
671};
672
b370aff7 673#define SC26198_NRBAUDS NELEM(sc26198_baudtable)
984263bc
MD
674
675/*
676 * Define the maximum baud rate of the sc26198 devices.
677 */
678#define SC26198_MAXBAUD 460800
679
680/*****************************************************************************/
681
984263bc
MD
682/*
683 * Declare the driver pci structure.
684 */
685static unsigned long stl_count;
686
687static struct pci_device stlpcidriver = {
688 "stl",
689 stlpciprobe,
690 stlpciattach,
691 &stl_count,
692 NULL,
693};
694
695COMPAT_PCI_DRIVER (stlpci, stlpcidriver);
696
984263bc
MD
697/*****************************************************************************/
698
984263bc
MD
699/*
700 * FreeBSD-2.2+ kernel linkage.
701 */
702
703#define CDEV_MAJOR 72
fef8985e 704static struct dev_ops stl_ops = {
88abd8b5 705 { "stl", 0, D_TTY },
fef8985e
MD
706 .d_open = stlopen,
707 .d_close = stlclose,
708 .d_read = ttyread,
709 .d_write = ttywrite,
710 .d_ioctl = stlioctl,
a32446b7
MD
711 .d_kqfilter = ttykqfilter,
712 .d_revoke = ttyrevoke
984263bc
MD
713};
714
715static void stl_drvinit(void *unused)
716{
984263bc
MD
717}
718
719SYSINIT(sidev,SI_SUB_DRIVERS,SI_ORDER_MIDDLE+CDEV_MAJOR,stl_drvinit,NULL)
720
984263bc
MD
721/*****************************************************************************/
722
723/*
724 * Find an available internal board number (unit number). The problem
725 * is that the same unit numbers can be assigned to different boards
726 * detected during the ISA and PCI initialization phases.
727 */
728
ce63e0fa 729static int stl_findfreeunit(void)
984263bc
MD
730{
731 int i;
732
733 for (i = 0; (i < STL_MAXBRDS); i++)
2038fb68 734 if (stl_brds[i] == NULL)
984263bc
MD
735 break;
736 return((i >= STL_MAXBRDS) ? -1 : i);
737}
738
739/*****************************************************************************/
740
984263bc
MD
741/*
742 * Probe specifically for the PCI boards. We need to be a little
743 * carefull here, since it looks sort like a Nat Semi IDE chip...
744 */
745
746static const char *stlpciprobe(pcici_t tag, pcidi_t type)
747{
748 unsigned long class;
749 int i, brdtype;
750
752b2d38 751#ifdef STLDEBUG
e3869ec7 752 kprintf("stlpciprobe(tag=%x,type=%x)\n", (int) &tag, (int) type);
984263bc
MD
753#endif
754
755 brdtype = 0;
756 for (i = 0; (i < stl_nrpcibrds); i++) {
757 if (((type & 0xffff) == stl_pcibrds[i].vendid) &&
758 (((type >> 16) & 0xffff) == stl_pcibrds[i].devid)) {
759 brdtype = stl_pcibrds[i].brdtype;
760 break;
761 }
762 }
763
764 if (brdtype == 0)
2038fb68 765 return(NULL);
984263bc
MD
766
767 class = pci_conf_read(tag, PCI_CLASS_REG);
768 if ((class & PCI_CLASS_MASK) == PCI_CLASS_MASS_STORAGE)
2038fb68 769 return(NULL);
984263bc
MD
770
771 return(stl_brdnames[brdtype]);
772}
773
774/*****************************************************************************/
775
776/*
777 * Allocate resources for and initialize the specified PCI board.
778 */
779
780void stlpciattach(pcici_t tag, int unit)
781{
782 stlbrd_t *brdp;
783 unsigned int bar[4];
784 unsigned int id;
785 int i;
786 int boardnr, portnr, minor_dev;
787
752b2d38 788#ifdef STLDEBUG
e3869ec7 789 kprintf("stlpciattach(tag=%x,unit=%x)\n", (int) &tag, unit);
984263bc
MD
790#endif
791
efda3bd0 792 brdp = kmalloc(sizeof(stlbrd_t), M_TTYS, M_WAITOK | M_ZERO);
984263bc
MD
793
794 if ((unit < 0) || (unit > STL_MAXBRDS)) {
e3869ec7 795 kprintf("STALLION: bad PCI board unit number=%d\n", unit);
984263bc
MD
796 return;
797 }
798
799/*
800 * Allocate us a new driver unique unit number.
801 */
802 if ((brdp->brdnr = stl_findfreeunit()) < 0) {
e3869ec7 803 kprintf("STALLION: too many boards found, max=%d\n",
984263bc
MD
804 STL_MAXBRDS);
805 return;
806 }
807 if (brdp->brdnr >= stl_nrbrds)
808 stl_nrbrds = brdp->brdnr + 1;
809
810/*
811 * Determine what type of PCI board this is...
812 */
813 id = (unsigned int) pci_conf_read(tag, 0x0);
814 for (i = 0; (i < stl_nrpcibrds); i++) {
815 if (((id & 0xffff) == stl_pcibrds[i].vendid) &&
816 (((id >> 16) & 0xffff) == stl_pcibrds[i].devid)) {
817 brdp->brdtype = stl_pcibrds[i].brdtype;
818 break;
819 }
820 }
821
822 if (i >= stl_nrpcibrds) {
e3869ec7 823 kprintf("STALLION: probed PCI board unknown type=%x\n", id);
984263bc
MD
824 return;
825 }
826
827 for (i = 0; (i < 4); i++)
828 bar[i] = (unsigned int) pci_conf_read(tag, 0x10 + (i * 4)) &
829 0xfffc;
830
831 switch (brdp->brdtype) {
832 case BRD_ECH64PCI:
833 brdp->ioaddr1 = bar[1];
834 brdp->ioaddr2 = bar[2];
835 break;
836 case BRD_EASYIOPCI:
837 brdp->ioaddr1 = bar[2];
838 brdp->ioaddr2 = bar[1];
839 break;
840 case BRD_ECHPCI:
841 brdp->ioaddr1 = bar[1];
842 brdp->ioaddr2 = bar[0];
843 break;
844 default:
e3869ec7 845 kprintf("STALLION: unknown PCI board type=%d\n", brdp->brdtype);
984263bc
MD
846 return;
847 break;
848 }
849
850 brdp->unitid = brdp->brdnr; /* PCI units auto-assigned */
851 brdp->irq = ((int) pci_conf_read(tag, 0x3c)) & 0xff;
852 brdp->irqtype = 0;
3641b7ca 853 if (pci_map_int(tag, stlpciintr, NULL) == 0) {
e3869ec7 854 kprintf("STALLION: failed to map interrupt irq=%d for unit=%d\n",
984263bc
MD
855 brdp->irq, brdp->brdnr);
856 return;
857 }
858
859 stl_brdinit(brdp);
860
861 /* register devices for DEVFS */
862 boardnr = brdp->brdnr;
fef8985e 863 make_dev(&stl_ops, boardnr + 0x1000000, UID_ROOT, GID_WHEEL,
984263bc
MD
864 0600, "staliomem%d", boardnr);
865
866 for (portnr = 0, minor_dev = boardnr * 0x100000;
867 portnr < 32; portnr++, minor_dev++) {
868 /* hw ports */
fef8985e 869 make_dev(&stl_ops, minor_dev,
984263bc
MD
870 UID_ROOT, GID_WHEEL, 0600,
871 "ttyE%d", portnr + (boardnr * 64));
fef8985e 872 make_dev(&stl_ops, minor_dev + 32,
984263bc
MD
873 UID_ROOT, GID_WHEEL, 0600,
874 "ttyiE%d", portnr + (boardnr * 64));
fef8985e 875 make_dev(&stl_ops, minor_dev + 64,
984263bc
MD
876 UID_ROOT, GID_WHEEL, 0600,
877 "ttylE%d", portnr + (boardnr * 64));
fef8985e 878 make_dev(&stl_ops, minor_dev + 128,
984263bc
MD
879 UID_ROOT, GID_WHEEL, 0600,
880 "cue%d", portnr + (boardnr * 64));
fef8985e 881 make_dev(&stl_ops, minor_dev + 160,
984263bc
MD
882 UID_ROOT, GID_WHEEL, 0600,
883 "cuie%d", portnr + (boardnr * 64));
fef8985e 884 make_dev(&stl_ops, minor_dev + 192,
984263bc
MD
885 UID_ROOT, GID_WHEEL, 0600,
886 "cule%d", portnr + (boardnr * 64));
887
888 /* sw ports */
fef8985e 889 make_dev(&stl_ops, minor_dev + 0x10000,
984263bc
MD
890 UID_ROOT, GID_WHEEL, 0600,
891 "ttyE%d", portnr + (boardnr * 64) + 32);
fef8985e 892 make_dev(&stl_ops, minor_dev + 32 + 0x10000,
984263bc
MD
893 UID_ROOT, GID_WHEEL, 0600,
894 "ttyiE%d", portnr + (boardnr * 64) + 32);
fef8985e 895 make_dev(&stl_ops, minor_dev + 64 + 0x10000,
984263bc
MD
896 UID_ROOT, GID_WHEEL, 0600,
897 "ttylE%d", portnr + (boardnr * 64) + 32);
fef8985e 898 make_dev(&stl_ops, minor_dev + 128 + 0x10000,
984263bc
MD
899 UID_ROOT, GID_WHEEL, 0600,
900 "cue%d", portnr + (boardnr * 64) + 32);
fef8985e 901 make_dev(&stl_ops, minor_dev + 160 + 0x10000,
984263bc
MD
902 UID_ROOT, GID_WHEEL, 0600,
903 "cuie%d", portnr + (boardnr * 64) + 32);
fef8985e 904 make_dev(&stl_ops, minor_dev + 192 + 0x10000,
984263bc
MD
905 UID_ROOT, GID_WHEEL, 0600,
906 "cule%d", portnr + (boardnr * 64) + 32);
907 }
908}
909
984263bc
MD
910/*****************************************************************************/
911
e6f626a1 912static int stlopen(struct dev_open_args *ap)
984263bc 913{
b13267a5 914 cdev_t dev = ap->a_head.a_dev;
984263bc
MD
915 struct tty *tp;
916 stlport_t *portp;
8d77660e 917 int error, callout;
984263bc 918
752b2d38 919#ifdef STLDEBUG
e3869ec7 920 kprintf("stlopen(dev=%x,flag=%x,mode=%x,p=%x)\n", (int) dev, flag,
984263bc
MD
921 mode, (int) p);
922#endif
923
924/*
925 * Firstly check if the supplied device number is a valid device.
926 */
927 if (minor(dev) & STL_MEMDEV)
928 return(0);
929
930 portp = stl_dev2port(dev);
2038fb68 931 if (portp == NULL)
984263bc
MD
932 return(ENXIO);
933 if (minor(dev) & STL_CTRLDEV)
934 return(0);
935 tp = &portp->tty;
936 dev->si_tty = tp;
937 callout = minor(dev) & STL_CALLOUTDEV;
938 error = 0;
939
8d77660e 940 crit_enter();
984263bc
MD
941
942stlopen_restart:
943/*
944 * Wait here for the DTR drop timeout period to expire.
945 */
946 while (portp->state & ASY_DTRWAIT) {
377d4740 947 error = tsleep(&portp->dtrwait, PCATCH, "stldtr", 0);
984263bc
MD
948 if (error)
949 goto stlopen_end;
950 }
951
952/*
953 * We have a valid device, so now we check if it is already open.
954 * If not then initialize the port hardware and set up the tty
955 * struct as required.
956 */
957 if ((tp->t_state & TS_ISOPEN) == 0) {
958 tp->t_oproc = stl_start;
959 tp->t_stop = stl_stop;
960 tp->t_param = stl_param;
961 tp->t_dev = dev;
962 tp->t_termios = callout ? portp->initouttios :
963 portp->initintios;
964 stl_rawopen(portp);
965 ttsetwater(tp);
966 if ((portp->sigs & TIOCM_CD) || callout)
967 (*linesw[tp->t_line].l_modem)(tp, 1);
968 } else {
969 if (callout) {
970 if (portp->callout == 0) {
971 error = EBUSY;
972 goto stlopen_end;
973 }
974 } else {
975 if (portp->callout != 0) {
fef8985e 976 if (ap->a_oflags & O_NONBLOCK) {
984263bc
MD
977 error = EBUSY;
978 goto stlopen_end;
979 }
980 error = tsleep(&portp->callout,
377d4740 981 PCATCH, "stlcall", 0);
984263bc
MD
982 if (error)
983 goto stlopen_end;
984 goto stlopen_restart;
985 }
986 }
895c1f85 987 if ((tp->t_state & TS_XCLUDE) && priv_check_cred(ap->a_cred, PRIV_ROOT, 0)) {
984263bc
MD
988 error = EBUSY;
989 goto stlopen_end;
990 }
991 }
992
993/*
994 * If this port is not the callout device and we do not have carrier
995 * then we need to sleep, waiting for it to be asserted.
996 */
997 if (((tp->t_state & TS_CARR_ON) == 0) && !callout &&
998 ((tp->t_cflag & CLOCAL) == 0) &&
fef8985e 999 ((ap->a_oflags & O_NONBLOCK) == 0)) {
984263bc 1000 portp->waitopens++;
377d4740 1001 error = tsleep(TSA_CARR_ON(tp), PCATCH, "stldcd", 0);
984263bc
MD
1002 portp->waitopens--;
1003 if (error)
1004 goto stlopen_end;
1005 goto stlopen_restart;
1006 }
1007
1008/*
1009 * Open the line discipline.
1010 */
1011 error = (*linesw[tp->t_line].l_open)(dev, tp);
1012 stl_ttyoptim(portp, &tp->t_termios);
1013 if ((tp->t_state & TS_ISOPEN) && callout)
1014 portp->callout = 1;
1015
1016/*
1017 * If for any reason we get to here and the port is not actually
1018 * open then close of the physical hardware - no point leaving it
1019 * active when the open failed...
1020 */
1021stlopen_end:
8d77660e 1022 crit_exit();
984263bc
MD
1023 if (((tp->t_state & TS_ISOPEN) == 0) && (portp->waitopens == 0))
1024 stl_rawclose(portp);
1025
1026 return(error);
1027}
1028
1029/*****************************************************************************/
1030
e6f626a1 1031static int stlclose(struct dev_close_args *ap)
984263bc 1032{
b13267a5 1033 cdev_t dev = ap->a_head.a_dev;
984263bc
MD
1034 struct tty *tp;
1035 stlport_t *portp;
984263bc 1036
752b2d38 1037#ifdef STLDEBUG
e3869ec7 1038 kprintf("stlclose(dev=%s,flag=%x,mode=%x,p=%p)\n", devtoname(dev),
984263bc
MD
1039 flag, mode, (void *) p);
1040#endif
1041
1042 if (minor(dev) & STL_MEMDEV)
1043 return(0);
1044 if (minor(dev) & STL_CTRLDEV)
1045 return(0);
1046
1047 portp = stl_dev2port(dev);
2038fb68 1048 if (portp == NULL)
984263bc
MD
1049 return(ENXIO);
1050 tp = &portp->tty;
1051
8d77660e 1052 crit_enter();
fef8985e 1053 (*linesw[tp->t_line].l_close)(tp, ap->a_fflag);
984263bc
MD
1054 stl_ttyoptim(portp, &tp->t_termios);
1055 stl_rawclose(portp);
1056 ttyclose(tp);
8d77660e 1057 crit_exit();
984263bc
MD
1058 return(0);
1059}
1060
1061/*****************************************************************************/
1062
e6f626a1 1063static void stl_stop(struct tty *tp, int rw)
984263bc 1064{
752b2d38 1065#ifdef STLDEBUG
e3869ec7 1066 kprintf("stl_stop(tp=%x,rw=%x)\n", (int) tp, rw);
984263bc
MD
1067#endif
1068
1069 stl_flush((stlport_t *) tp, rw);
1070}
1071
984263bc
MD
1072/*****************************************************************************/
1073
e6f626a1 1074static int stlioctl(struct dev_ioctl_args *ap)
984263bc 1075{
b13267a5 1076 cdev_t dev = ap->a_head.a_dev;
fef8985e
MD
1077 u_long cmd = ap->a_cmd;
1078 caddr_t data = ap->a_data;
984263bc
MD
1079 struct termios *newtios, *localtios;
1080 struct tty *tp;
1081 stlport_t *portp;
8d77660e 1082 int error, i;
984263bc 1083
752b2d38 1084#ifdef STLDEBUG
e3869ec7 1085 kprintf("stlioctl(dev=%s,cmd=%lx,data=%p,flag=%x)\n",
fef8985e 1086 devtoname(dev), cmd, (void *) data, ap->a_fflag);
984263bc
MD
1087#endif
1088
1089 if (minor(dev) & STL_MEMDEV)
fef8985e 1090 return(stl_memioctl(dev, cmd, data, ap->a_fflag));
984263bc
MD
1091
1092 portp = stl_dev2port(dev);
2038fb68 1093 if (portp == NULL)
984263bc
MD
1094 return(ENODEV);
1095 tp = &portp->tty;
1096 error = 0;
1097
1098/*
1099 * First up handle ioctls on the control devices.
1100 */
1101 if (minor(dev) & STL_CTRLDEV) {
1102 if ((minor(dev) & STL_CTRLDEV) == STL_CTRLINIT)
1103 localtios = (minor(dev) & STL_CALLOUTDEV) ?
1104 &portp->initouttios : &portp->initintios;
1105 else if ((minor(dev) & STL_CTRLDEV) == STL_CTRLLOCK)
1106 localtios = (minor(dev) & STL_CALLOUTDEV) ?
1107 &portp->lockouttios : &portp->lockintios;
1108 else
1109 return(ENODEV);
1110
1111 switch (cmd) {
1112 case TIOCSETA:
895c1f85 1113 if ((error = priv_check_cred(ap->a_cred, PRIV_ROOT, 0)) == 0)
984263bc
MD
1114 *localtios = *((struct termios *) data);
1115 break;
1116 case TIOCGETA:
1117 *((struct termios *) data) = *localtios;
1118 break;
1119 case TIOCGETD:
1120 *((int *) data) = TTYDISC;
1121 break;
1122 case TIOCGWINSZ:
1123 bzero(data, sizeof(struct winsize));
1124 break;
1125 default:
1126 error = ENOTTY;
1127 break;
1128 }
1129 return(error);
1130 }
1131
1132/*
9a7c6212 1133 * Deal with 4.3 compatibility issues if we have too...
984263bc 1134 */
d88b9605 1135#if defined(COMPAT_43)
984263bc
MD
1136 if (1) {
1137 struct termios tios;
1138 unsigned long oldcmd;
1139
1140 tios = tp->t_termios;
1141 oldcmd = cmd;
1142 if ((error = ttsetcompat(tp, &cmd, data, &tios)))
1143 return(error);
1144 if (cmd != oldcmd)
1145 data = (caddr_t) &tios;
1146 }
1147#endif
1148
1149/*
1150 * Carry out some pre-cmd processing work first...
1151 * Hmmm, not so sure we want this, disable for now...
1152 */
1153 if ((cmd == TIOCSETA) || (cmd == TIOCSETAW) || (cmd == TIOCSETAF)) {
1154 newtios = (struct termios *) data;
1155 localtios = (minor(dev) & STL_CALLOUTDEV) ?
1156 &portp->lockouttios : &portp->lockintios;
1157
1158 newtios->c_iflag = (tp->t_iflag & localtios->c_iflag) |
1159 (newtios->c_iflag & ~localtios->c_iflag);
1160 newtios->c_oflag = (tp->t_oflag & localtios->c_oflag) |
1161 (newtios->c_oflag & ~localtios->c_oflag);
1162 newtios->c_cflag = (tp->t_cflag & localtios->c_cflag) |
1163 (newtios->c_cflag & ~localtios->c_cflag);
1164 newtios->c_lflag = (tp->t_lflag & localtios->c_lflag) |
1165 (newtios->c_lflag & ~localtios->c_lflag);
1166 for (i = 0; (i < NCCS); i++) {
1167 if (localtios->c_cc[i] != 0)
1168 newtios->c_cc[i] = tp->t_cc[i];
1169 }
1170 if (localtios->c_ispeed != 0)
1171 newtios->c_ispeed = tp->t_ispeed;
1172 if (localtios->c_ospeed != 0)
1173 newtios->c_ospeed = tp->t_ospeed;
1174 }
1175
1176/*
1177 * Call the line discipline and the common command processing to
1178 * process this command (if they can).
1179 */
fef8985e
MD
1180 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data,
1181 ap->a_fflag, ap->a_cred);
984263bc
MD
1182 if (error != ENOIOCTL)
1183 return(error);
1184
8d77660e 1185 crit_enter();
fef8985e 1186 error = ttioctl(tp, cmd, data, ap->a_fflag);
984263bc
MD
1187 stl_ttyoptim(portp, &tp->t_termios);
1188 if (error != ENOIOCTL) {
8d77660e 1189 crit_exit();
984263bc
MD
1190 return(error);
1191 }
1192
1193 error = 0;
1194
1195/*
1196 * Process local commands here. These are all commands that only we
1197 * can take care of (they all rely on actually doing something special
1198 * to the actual hardware).
1199 */
1200 switch (cmd) {
1201 case TIOCSBRK:
1202 stl_sendbreak(portp, -1);
1203 break;
1204 case TIOCCBRK:
1205 stl_sendbreak(portp, -2);
1206 break;
1207 case TIOCSDTR:
1208 stl_setsignals(portp, 1, -1);
1209 break;
1210 case TIOCCDTR:
1211 stl_setsignals(portp, 0, -1);
1212 break;
1213 case TIOCMSET:
1214 i = *((int *) data);
1215 stl_setsignals(portp, ((i & TIOCM_DTR) ? 1 : 0),
1216 ((i & TIOCM_RTS) ? 1 : 0));
1217 break;
1218 case TIOCMBIS:
1219 i = *((int *) data);
1220 stl_setsignals(portp, ((i & TIOCM_DTR) ? 1 : -1),
1221 ((i & TIOCM_RTS) ? 1 : -1));
1222 break;
1223 case TIOCMBIC:
1224 i = *((int *) data);
1225 stl_setsignals(portp, ((i & TIOCM_DTR) ? 0 : -1),
1226 ((i & TIOCM_RTS) ? 0 : -1));
1227 break;
1228 case TIOCMGET:
1229 *((int *) data) = (stl_getsignals(portp) | TIOCM_LE);
1230 break;
1231 case TIOCMSDTRWAIT:
895c1f85 1232 if ((error = priv_check_cred(ap->a_cred, PRIV_ROOT, 0)) == 0)
984263bc
MD
1233 portp->dtrwait = *((int *) data) * hz / 100;
1234 break;
1235 case TIOCMGDTRWAIT:
1236 *((int *) data) = portp->dtrwait * 100 / hz;
1237 break;
1238 case TIOCTIMESTAMP:
1239 portp->dotimestamp = 1;
1240 *((struct timeval *) data) = portp->timestamp;
1241 break;
1242 default:
1243 error = ENOTTY;
1244 break;
1245 }
8d77660e 1246 crit_exit();
984263bc
MD
1247
1248 return(error);
1249}
1250/*****************************************************************************/
1251
1252/*
1253 * Convert the specified minor device number into a port struct
1254 * pointer. Return NULL if the device number is not a valid port.
1255 */
1256
e6f626a1 1257static stlport_t *stl_dev2port(cdev_t dev)
984263bc
MD
1258{
1259 stlbrd_t *brdp;
1260
1261 brdp = stl_brds[MKDEV2BRD(dev)];
2038fb68
SW
1262 if (brdp == NULL)
1263 return(NULL);
984263bc
MD
1264 return(brdp->ports[MKDEV2PORT(dev)]);
1265}
1266
1267/*****************************************************************************/
1268
1269/*
1270 * Initialize the port hardware. This involves enabling the transmitter
1271 * and receiver, setting the port configuration, and setting the initial
1272 * signal state.
1273 */
1274
1275static int stl_rawopen(stlport_t *portp)
1276{
752b2d38 1277#ifdef STLDEBUG
e3869ec7 1278 kprintf("stl_rawopen(portp=%p): brdnr=%d panelnr=%d portnr=%d\n",
984263bc
MD
1279 (void *) portp, portp->brdnr, portp->panelnr, portp->portnr);
1280#endif
1281
1282 stl_setport(portp, &portp->tty.t_termios);
1283 portp->sigs = stl_getsignals(portp);
1284 stl_setsignals(portp, 1, 1);
1285 stl_enablerxtx(portp, 1, 1);
1286 stl_startrxtx(portp, 1, 0);
1287 return(0);
1288}
1289
1290/*****************************************************************************/
1291
1292/*
1293 * Shutdown the hardware of a port. Disable its transmitter and
1294 * receiver, and maybe drop signals if appropriate.
1295 */
1296
1297static int stl_rawclose(stlport_t *portp)
1298{
1299 struct tty *tp;
1300
752b2d38 1301#ifdef STLDEBUG
e3869ec7 1302 kprintf("stl_rawclose(portp=%p): brdnr=%d panelnr=%d portnr=%d\n",
984263bc
MD
1303 (void *) portp, portp->brdnr, portp->panelnr, portp->portnr);
1304#endif
1305
1306 tp = &portp->tty;
1307 stl_disableintrs(portp);
1308 stl_enablerxtx(portp, 0, 0);
1309 stl_flush(portp, (FWRITE | FREAD));
1310 if (tp->t_cflag & HUPCL) {
1311 stl_setsignals(portp, 0, 0);
1312 if (portp->dtrwait != 0) {
1313 portp->state |= ASY_DTRWAIT;
79b066dc
MD
1314 callout_reset(&portp->dtr_ch, portp->dtrwait,
1315 stl_dtrwakeup, portp);
984263bc
MD
1316 }
1317 }
1318 portp->callout = 0;
1319 portp->brklen = 0;
1320 portp->state &= ~(ASY_ACTIVE | ASY_RTSFLOW);
1321 wakeup(&portp->callout);
1322 wakeup(TSA_CARR_ON(tp));
1323 return(0);
1324}
1325
1326/*****************************************************************************/
1327
1328/*
1329 * Clear the DTR waiting flag, and wake up any sleepers waiting for
1330 * DTR wait period to finish.
1331 */
1332
1333static void stl_dtrwakeup(void *arg)
1334{
1335 stlport_t *portp;
1336
1337 portp = (stlport_t *) arg;
1338 portp->state &= ~ASY_DTRWAIT;
1339 wakeup(&portp->dtrwait);
1340}
1341
1342/*****************************************************************************/
1343
1344/*
1345 * Start (or continue) the transfer of TX data on this port. If the
1346 * port is not currently busy then load up the interrupt ring queue
1347 * buffer and kick of the transmitter. If the port is running low on
1348 * TX data then refill the ring queue. This routine is also used to
1349 * activate input flow control!
1350 */
1351
1352static void stl_start(struct tty *tp)
1353{
1354 stlport_t *portp;
1355 unsigned int len, stlen;
1356 char *head, *tail;
8d77660e 1357 int count;
984263bc
MD
1358
1359 portp = (stlport_t *) tp;
1360
752b2d38 1361#ifdef STLDEBUG
e3869ec7 1362 kprintf("stl_start(tp=%x): brdnr=%d portnr=%d\n", (int) tp,
984263bc
MD
1363 portp->brdnr, portp->portnr);
1364#endif
1365
8d77660e 1366 crit_enter();
984263bc
MD
1367
1368/*
1369 * Check if the ports input has been blocked, and take appropriate action.
1370 * Not very often do we really need to do anything, so make it quick.
1371 */
1372 if (tp->t_state & TS_TBLOCK) {
1373 if ((portp->state & ASY_RTSFLOWMODE) &&
1374 ((portp->state & ASY_RTSFLOW) == 0))
1375 stl_flowcontrol(portp, 0, -1);
1376 } else {
1377 if (portp->state & ASY_RTSFLOW)
1378 stl_flowcontrol(portp, 1, -1);
1379 }
1380
984263bc 1381 if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP)) {
8d77660e 1382 crit_exit();
984263bc
MD
1383 return;
1384 }
1385
1386/*
1387 * Copy data from the clists into the interrupt ring queue. This will
1388 * require at most 2 copys... What we do is calculate how many chars
1389 * can fit into the ring queue, and how many can fit in 1 copy. If after
1390 * the first copy there is still more room then do the second copy.
1391 * The beauty of this type of ring queue is that we do not need to
1392 * spl protect our-selves, since we only ever update the head pointer,
1393 * and the interrupt routine only ever updates the tail pointer.
1394 */
1395 if (tp->t_outq.c_cc != 0) {
1396 head = portp->tx.head;
1397 tail = portp->tx.tail;
1398 if (head >= tail) {
1399 len = STL_TXBUFSIZE - (head - tail) - 1;
1400 stlen = portp->tx.endbuf - head;
1401 } else {
1402 len = tail - head - 1;
1403 stlen = len;
1404 }
1405
1406 if (len > 0) {
1407 stlen = MIN(len, stlen);
1408 count = q_to_b(&tp->t_outq, head, stlen);
1409 len -= count;
1410 head += count;
1411 if (head >= portp->tx.endbuf) {
1412 head = portp->tx.buf;
1413 if (len > 0) {
1414 stlen = q_to_b(&tp->t_outq, head, len);
1415 head += stlen;
1416 count += stlen;
1417 }
1418 }
1419 portp->tx.head = head;
1420 if (count > 0)
1421 stl_startrxtx(portp, -1, 1);
1422 }
1423
1424/*
1425 * If we sent something, make sure we are called again.
1426 */
1427 tp->t_state |= TS_BUSY;
1428 }
1429
984263bc
MD
1430/*
1431 * Do any writer wakeups.
1432 */
1433 ttwwakeup(tp);
984263bc 1434
8d77660e 1435 crit_exit();
984263bc
MD
1436}
1437
1438/*****************************************************************************/
1439
1440static void stl_flush(stlport_t *portp, int flag)
1441{
1442 char *head, *tail;
8d77660e 1443 int len;
984263bc 1444
752b2d38 1445#ifdef STLDEBUG
e3869ec7 1446 kprintf("stl_flush(portp=%x,flag=%x)\n", (int) portp, flag);
984263bc
MD
1447#endif
1448
2038fb68 1449 if (portp == NULL)
984263bc
MD
1450 return;
1451
8d77660e 1452 crit_enter();
984263bc
MD
1453
1454 if (flag & FWRITE) {
1455 stl_uartflush(portp, FWRITE);
1456 portp->tx.tail = portp->tx.head;
1457 }
1458
1459/*
1460 * The only thing to watch out for when flushing the read side is
1461 * the RX status buffer. The interrupt code relys on the status
1462 * bytes as being zeroed all the time (it does not bother setting
1463 * a good char status to 0, it expects that it already will be).
1464 * We also need to un-flow the RX channel if flow control was
1465 * active.
1466 */
1467 if (flag & FREAD) {
1468 head = portp->rx.head;
1469 tail = portp->rx.tail;
1470 if (head != tail) {
1471 if (head >= tail) {
1472 len = head - tail;
1473 } else {
1474 len = portp->rx.endbuf - tail;
1475 bzero(portp->rxstatus.buf,
1476 (head - portp->rx.buf));
1477 }
1478 bzero((tail + STL_RXBUFSIZE), len);
1479 portp->rx.tail = head;
1480 }
1481
1482 if ((portp->state & ASY_RTSFLOW) &&
1483 ((portp->tty.t_state & TS_TBLOCK) == 0))
1484 stl_flowcontrol(portp, 1, -1);
1485 }
1486
8d77660e 1487 crit_exit();
984263bc
MD
1488}
1489
1490/*****************************************************************************/
1491
1492/*
1493 * Interrupt handler for host based boards. Interrupts for all boards
1494 * are vectored through here.
1495 */
1496
477d3c1c 1497void stlintr(void *arg)
984263bc
MD
1498{
1499 stlbrd_t *brdp;
1500 int i;
1501
752b2d38 1502#ifdef STLDEBUG
e3869ec7 1503 kprintf("stlintr(unit=%d)\n", (int)arg);
984263bc
MD
1504#endif
1505
1506 for (i = 0; (i < stl_nrbrds); i++) {
2038fb68 1507 if ((brdp = stl_brds[i]) == NULL)
984263bc
MD
1508 continue;
1509 if (brdp->state == 0)
1510 continue;
1511 (* brdp->isr)(brdp);
1512 }
1513}
1514
1515/*****************************************************************************/
1516
984263bc
MD
1517static void stlpciintr(void *arg)
1518{
60233e58 1519 stlintr(NULL);
984263bc
MD
1520}
1521
984263bc
MD
1522/*****************************************************************************/
1523
1524/*
1525 * Interrupt service routine for EasyIO boards.
1526 */
1527
1528static void stl_eiointr(stlbrd_t *brdp)
1529{
1530 stlpanel_t *panelp;
1531 int iobase;
1532
752b2d38 1533#ifdef STLDEBUG
e3869ec7 1534 kprintf("stl_eiointr(brdp=%p)\n", brdp);
984263bc
MD
1535#endif
1536
00ceae26 1537 panelp = brdp->panels[0];
984263bc
MD
1538 iobase = panelp->iobase;
1539 while (inb(brdp->iostatus) & EIO_INTRPEND)
1540 (* panelp->isr)(panelp, iobase);
1541}
1542
1543/*
1544 * Interrupt service routine for ECH-AT board types.
1545 */
1546
1547static void stl_echatintr(stlbrd_t *brdp)
1548{
1549 stlpanel_t *panelp;
1550 unsigned int ioaddr;
1551 int bnknr;
1552
1553 outb(brdp->ioctrl, (brdp->ioctrlval | ECH_BRDENABLE));
1554
1555 while (inb(brdp->iostatus) & ECH_INTRPEND) {
1556 for (bnknr = 0; (bnknr < brdp->nrbnks); bnknr++) {
1557 ioaddr = brdp->bnkstataddr[bnknr];
1558 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1559 panelp = brdp->bnk2panel[bnknr];
1560 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1561 }
1562 }
1563 }
1564
1565 outb(brdp->ioctrl, (brdp->ioctrlval | ECH_BRDDISABLE));
1566}
1567
1568/*****************************************************************************/
1569
1570/*
1571 * Interrupt service routine for ECH-MCA board types.
1572 */
1573
1574static void stl_echmcaintr(stlbrd_t *brdp)
1575{
1576 stlpanel_t *panelp;
1577 unsigned int ioaddr;
1578 int bnknr;
1579
1580 while (inb(brdp->iostatus) & ECH_INTRPEND) {
1581 for (bnknr = 0; (bnknr < brdp->nrbnks); bnknr++) {
1582 ioaddr = brdp->bnkstataddr[bnknr];
1583 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1584 panelp = brdp->bnk2panel[bnknr];
1585 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1586 }
1587 }
1588 }
1589}
1590
1591/*****************************************************************************/
1592
1593/*
1594 * Interrupt service routine for ECH-PCI board types.
1595 */
1596
1597static void stl_echpciintr(stlbrd_t *brdp)
1598{
1599 stlpanel_t *panelp;
1600 unsigned int ioaddr;
1601 int bnknr, recheck;
1602
752b2d38 1603#ifdef STLDEBUG
e3869ec7 1604 kprintf("stl_echpciintr(brdp=%x)\n", (int) brdp);
984263bc
MD
1605#endif
1606
1607 for (;;) {
1608 recheck = 0;
1609 for (bnknr = 0; (bnknr < brdp->nrbnks); bnknr++) {
1610 outb(brdp->ioctrl, brdp->bnkpageaddr[bnknr]);
1611 ioaddr = brdp->bnkstataddr[bnknr];
1612 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1613 panelp = brdp->bnk2panel[bnknr];
1614 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1615 recheck++;
1616 }
1617 }
1618 if (! recheck)
1619 break;
1620 }
1621}
1622
1623/*****************************************************************************/
1624
1625/*
1626 * Interrupt service routine for EC8/64-PCI board types.
1627 */
1628
1629static void stl_echpci64intr(stlbrd_t *brdp)
1630{
1631 stlpanel_t *panelp;
1632 unsigned int ioaddr;
1633 int bnknr;
1634
752b2d38 1635#ifdef STLDEBUG
e3869ec7 1636 kprintf("stl_echpci64intr(brdp=%p)\n", brdp);
984263bc
MD
1637#endif
1638
1639 while (inb(brdp->ioctrl) & 0x1) {
1640 for (bnknr = 0; (bnknr < brdp->nrbnks); bnknr++) {
1641 ioaddr = brdp->bnkstataddr[bnknr];
752b2d38 1642#ifdef STLDEBUG
e3869ec7 1643 kprintf(" --> ioaddr=%x status=%x(%x)\n", ioaddr, inb(ioaddr) & ECH_PNLINTRPEND, inb(ioaddr));
984263bc
MD
1644#endif
1645 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1646 panelp = brdp->bnk2panel[bnknr];
1647 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1648 }
1649 }
1650 }
1651}
1652
1653/*****************************************************************************/
1654
1655/*
1656 * If we haven't scheduled a timeout then do it, some port needs high
1657 * level processing.
1658 */
1659
ce63e0fa 1660static void stl_dotimeout(void)
984263bc 1661{
752b2d38 1662#ifdef STLDEBUG
e3869ec7 1663 kprintf("stl_dotimeout()\n");
984263bc 1664#endif
984263bc 1665 if (stl_doingtimeout == 0) {
79b066dc
MD
1666 if ((stl_poll_ch.c_flags & CALLOUT_DID_INIT) == 0)
1667 callout_init(&stl_poll_ch);
1668 callout_reset(&stl_poll_ch, 1, stl_poll, NULL);
984263bc
MD
1669 stl_doingtimeout++;
1670 }
1671}
1672
1673/*****************************************************************************/
1674
1675/*
1676 * Service "software" level processing. Too slow or painfull to be done
1677 * at real hardware interrupt time. This way we might also be able to
1678 * do some service on other waiting ports as well...
1679 */
1680
1681static void stl_poll(void *arg)
1682{
1683 stlbrd_t *brdp;
1684 stlport_t *portp;
1685 struct tty *tp;
8d77660e 1686 int brdnr, portnr, rearm;
984263bc 1687
752b2d38 1688#ifdef STLDEBUG
e3869ec7 1689 kprintf("stl_poll()\n");
984263bc
MD
1690#endif
1691
1692 stl_doingtimeout = 0;
1693 rearm = 0;
1694
8d77660e 1695 crit_enter();
984263bc 1696 for (brdnr = 0; (brdnr < stl_nrbrds); brdnr++) {
2038fb68 1697 if ((brdp = stl_brds[brdnr]) == NULL)
984263bc
MD
1698 continue;
1699 for (portnr = 0; (portnr < brdp->nrports); portnr++) {
2038fb68 1700 if ((portp = brdp->ports[portnr]) == NULL)
984263bc
MD
1701 continue;
1702 if ((portp->state & ASY_ACTIVE) == 0)
1703 continue;
1704 tp = &portp->tty;
1705
1706 if (portp->state & ASY_RXDATA)
1707 stl_rxprocess(portp);
1708 if (portp->state & ASY_DCDCHANGE) {
1709 portp->state &= ~ASY_DCDCHANGE;
1710 portp->sigs = stl_getsignals(portp);
1711 (*linesw[tp->t_line].l_modem)(tp,
1712 (portp->sigs & TIOCM_CD));
1713 }
1714 if (portp->state & ASY_TXEMPTY) {
1715 if (stl_datastate(portp) == 0) {
1716 portp->state &= ~ASY_TXEMPTY;
1717 tp->t_state &= ~TS_BUSY;
1718 (*linesw[tp->t_line].l_start)(tp);
1719 }
1720 }
1721 if (portp->state & ASY_TXLOW) {
1722 portp->state &= ~ASY_TXLOW;
1723 (*linesw[tp->t_line].l_start)(tp);
1724 }
1725
1726 if (portp->state & ASY_ACTIVE)
1727 rearm++;
1728 }
1729 }
8d77660e 1730 crit_exit();
984263bc
MD
1731
1732 if (rearm)
1733 stl_dotimeout();
1734}
1735
1736/*****************************************************************************/
1737
1738/*
1739 * Process the RX data that has been buffered up in the RX ring queue.
1740 */
1741
1742static void stl_rxprocess(stlport_t *portp)
1743{
1744 struct tty *tp;
1745 unsigned int len, stlen, lostlen;
1746 char *head, *tail;
1747 char status;
1748 int ch;
1749
752b2d38 1750#ifdef STLDEBUG
e3869ec7 1751 kprintf("stl_rxprocess(portp=%x): brdnr=%d portnr=%d\n", (int) portp,
984263bc
MD
1752 portp->brdnr, portp->portnr);
1753#endif
1754
1755 tp = &portp->tty;
1756 portp->state &= ~ASY_RXDATA;
1757
1758 if ((tp->t_state & TS_ISOPEN) == 0) {
1759 stl_flush(portp, FREAD);
1760 return;
1761 }
1762
1763/*
1764 * Calculate the amount of data in the RX ring queue. Also calculate
1765 * the largest single copy size...
1766 */
1767 head = portp->rx.head;
1768 tail = portp->rx.tail;
1769 if (head >= tail) {
1770 len = head - tail;
1771 stlen = len;
1772 } else {
1773 len = STL_RXBUFSIZE - (tail - head);
1774 stlen = portp->rx.endbuf - tail;
1775 }
1776
1777 if (tp->t_state & TS_CAN_BYPASS_L_RINT) {
1778 if (len > 0) {
1779 if (((tp->t_rawq.c_cc + len) >= TTYHOG) &&
1780 ((portp->state & ASY_RTSFLOWMODE) ||
1781 (tp->t_iflag & IXOFF)) &&
1782 ((tp->t_state & TS_TBLOCK) == 0)) {
1783 ch = TTYHOG - tp->t_rawq.c_cc - 1;
1784 len = (ch > 0) ? ch : 0;
1785 stlen = MIN(stlen, len);
1786 ttyblock(tp);
1787 }
1788 lostlen = b_to_q(tail, stlen, &tp->t_rawq);
1789 tail += stlen;
1790 len -= stlen;
1791 if (tail >= portp->rx.endbuf) {
1792 tail = portp->rx.buf;
1793 lostlen += b_to_q(tail, len, &tp->t_rawq);
1794 tail += len;
1795 }
1796 portp->stats.rxlost += lostlen;
1797 ttwakeup(tp);
1798 portp->rx.tail = tail;
1799 }
1800 } else {
1801 while (portp->rx.tail != head) {
1802 ch = (unsigned char) *(portp->rx.tail);
1803 status = *(portp->rx.tail + STL_RXBUFSIZE);
1804 if (status) {
1805 *(portp->rx.tail + STL_RXBUFSIZE) = 0;
1806 if (status & ST_BREAK)
1807 ch |= TTY_BI;
1808 if (status & ST_FRAMING)
1809 ch |= TTY_FE;
1810 if (status & ST_PARITY)
1811 ch |= TTY_PE;
1812 if (status & ST_OVERRUN)
1813 ch |= TTY_OE;
1814 }
1815 (*linesw[tp->t_line].l_rint)(ch, tp);
1816 if (portp->rx.tail == head)
1817 break;
1818
1819 if (++(portp->rx.tail) >= portp->rx.endbuf)
1820 portp->rx.tail = portp->rx.buf;
1821 }
1822 }
1823
1824 if (head != portp->rx.tail)
1825 portp->state |= ASY_RXDATA;
1826
1827/*
1828 * If we were flow controled then maybe the buffer is low enough that
1829 * we can re-activate it.
1830 */
1831 if ((portp->state & ASY_RTSFLOW) && ((tp->t_state & TS_TBLOCK) == 0))
1832 stl_flowcontrol(portp, 1, -1);
1833}
1834
1835/*****************************************************************************/
1836
1837static int stl_param(struct tty *tp, struct termios *tiosp)
1838{
1839 stlport_t *portp;
1840
1841 portp = (stlport_t *) tp;
2038fb68 1842 if (portp == NULL)
984263bc
MD
1843 return(ENODEV);
1844
1845 return(stl_setport(portp, tiosp));
1846}
1847
1848/*****************************************************************************/
1849
1850/*
1851 * Action the flow control as required. The hw and sw args inform the
1852 * routine what flow control methods it should try.
1853 */
1854
1855static void stl_flowcontrol(stlport_t *portp, int hw, int sw)
1856{
1857 unsigned char *head, *tail;
1858 int len, hwflow;
1859
752b2d38 1860#ifdef STLDEBUG
e3869ec7 1861 kprintf("stl_flowcontrol(portp=%x,hw=%d,sw=%d)\n", (int) portp, hw, sw);
984263bc
MD
1862#endif
1863
1864 hwflow = -1;
1865
1866 if (portp->state & ASY_RTSFLOWMODE) {
1867 if (hw == 0) {
1868 if ((portp->state & ASY_RTSFLOW) == 0)
1869 hwflow = 0;
1870 } else if (hw > 0) {
1871 if (portp->state & ASY_RTSFLOW) {
1872 head = portp->rx.head;
1873 tail = portp->rx.tail;
1874 len = (head >= tail) ? (head - tail) :
1875 (STL_RXBUFSIZE - (tail - head));
1876 if (len < STL_RXBUFHIGH)
1877 hwflow = 1;
1878 }
1879 }
1880 }
1881
1882/*
1883 * We have worked out what to do, if anything. So now apply it to the
1884 * UART port.
1885 */
1886 stl_sendflow(portp, hwflow, sw);
1887}
1888
1889/*****************************************************************************/
1890
1891/*
1892 * Enable l_rint processing bypass mode if tty modes allow it.
1893 */
1894
1895static void stl_ttyoptim(stlport_t *portp, struct termios *tiosp)
1896{
1897 struct tty *tp;
1898
1899 tp = &portp->tty;
1900 if (((tiosp->c_iflag &
1901 (ICRNL | IGNCR | IMAXBEL | INLCR | ISTRIP)) == 0) &&
1902 (((tiosp->c_iflag & BRKINT) == 0) || (tiosp->c_iflag & IGNBRK)) &&
1903 (((tiosp->c_iflag & PARMRK) == 0) ||
1904 ((tiosp->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK))) &&
1905 ((tiosp->c_lflag & (ECHO | ICANON | IEXTEN | ISIG | PENDIN)) ==0) &&
1906 (linesw[tp->t_line].l_rint == ttyinput))
1907 tp->t_state |= TS_CAN_BYPASS_L_RINT;
1908 else
1909 tp->t_state &= ~TS_CAN_BYPASS_L_RINT;
1910 portp->hotchar = linesw[tp->t_line].l_hotchar;
1911}
1912
1913/*****************************************************************************/
1914
1915/*
1916 * Try and find and initialize all the ports on a panel. We don't care
1917 * what sort of board these ports are on - since the port io registers
1918 * are almost identical when dealing with ports.
1919 */
1920
1921static int stl_initports(stlbrd_t *brdp, stlpanel_t *panelp)
1922{
1923 stlport_t *portp;
984263bc
MD
1924 int i, j;
1925
752b2d38 1926#ifdef STLDEBUG
e3869ec7 1927 kprintf("stl_initports(panelp=%x)\n", (int) panelp);
984263bc
MD
1928#endif
1929
984263bc
MD
1930/*
1931 * All UART's are initialized if found. Now go through and setup
1932 * each ports data structures. Also initialize each individual
1933 * UART port.
1934 */
1935 for (i = 0; (i < panelp->nrports); i++) {
efda3bd0 1936 portp = kmalloc(sizeof(stlport_t), M_TTYS, M_WAITOK | M_ZERO);
984263bc
MD
1937
1938 portp->portnr = i;
1939 portp->brdnr = panelp->brdnr;
1940 portp->panelnr = panelp->panelnr;
1941 portp->uartp = panelp->uartp;
1942 portp->clk = brdp->clk;
1943 panelp->ports[i] = portp;
1944
1945 j = STL_TXBUFSIZE + (2 * STL_RXBUFSIZE);
efda3bd0 1946 portp->tx.buf = kmalloc(j, M_TTYS, M_WAITOK);
984263bc
MD
1947 portp->tx.endbuf = portp->tx.buf + STL_TXBUFSIZE;
1948 portp->tx.head = portp->tx.buf;
1949 portp->tx.tail = portp->tx.buf;
1950 portp->rx.buf = portp->tx.buf + STL_TXBUFSIZE;
1951 portp->rx.endbuf = portp->rx.buf + STL_RXBUFSIZE;
1952 portp->rx.head = portp->rx.buf;
1953 portp->rx.tail = portp->rx.buf;
1954 portp->rxstatus.buf = portp->rx.buf + STL_RXBUFSIZE;
1955 portp->rxstatus.endbuf = portp->rxstatus.buf + STL_RXBUFSIZE;
1956 portp->rxstatus.head = portp->rxstatus.buf;
1957 portp->rxstatus.tail = portp->rxstatus.buf;
1958 bzero(portp->rxstatus.head, STL_RXBUFSIZE);
1959
1960 portp->initintios.c_ispeed = STL_DEFSPEED;
1961 portp->initintios.c_ospeed = STL_DEFSPEED;
1962 portp->initintios.c_cflag = STL_DEFCFLAG;
1963 portp->initintios.c_iflag = 0;
1964 portp->initintios.c_oflag = 0;
1965 portp->initintios.c_lflag = 0;
1966 bcopy(&ttydefchars[0], &portp->initintios.c_cc[0],
1967 sizeof(portp->initintios.c_cc));
1968 portp->initouttios = portp->initintios;
1969 portp->dtrwait = 3 * hz;
79b066dc 1970 callout_init(&portp->dtr_ch);
984263bc
MD
1971
1972 stl_portinit(brdp, panelp, portp);
1973 }
1974
1975 return(0);
1976}
1977
1978/*****************************************************************************/
1979
1980/*
1981 * Try to find and initialize an EasyIO board.
1982 */
1983
1984static int stl_initeio(stlbrd_t *brdp)
1985{
1986 stlpanel_t *panelp;
1987 unsigned int status;
1988
752b2d38 1989#ifdef STLDEBUG
e3869ec7 1990 kprintf("stl_initeio(brdp=%x)\n", (int) brdp);
984263bc
MD
1991#endif
1992
1993 brdp->ioctrl = brdp->ioaddr1 + 1;
1994 brdp->iostatus = brdp->ioaddr1 + 2;
1995 brdp->clk = EIO_CLK;
1996 brdp->isr = stl_eiointr;
1997
1998 status = inb(brdp->iostatus);
1999 switch (status & EIO_IDBITMASK) {
2000 case EIO_8PORTM:
2001 brdp->clk = EIO_CLK8M;
2002 /* fall thru */
2003 case EIO_8PORTRS:
2004 case EIO_8PORTDI:
2005 brdp->nrports = 8;
2006 break;
2007 case EIO_4PORTRS:
2008 brdp->nrports = 4;
2009 break;
2010 case EIO_MK3:
2011 switch (status & EIO_BRDMASK) {
2012 case ID_BRD4:
2013 brdp->nrports = 4;
2014 break;
2015 case ID_BRD8:
2016 brdp->nrports = 8;
2017 break;
2018 case ID_BRD16:
2019 brdp->nrports = 16;
2020 break;
2021 default:
2022 return(ENODEV);
2023 }
2024 brdp->ioctrl++;
2025 break;
2026 default:
2027 return(ENODEV);
2028 }
2029
2030 if (brdp->brdtype == BRD_EASYIOPCI) {
2031 outb((brdp->ioaddr2 + 0x4c), 0x41);
2032 } else {
2033/*
2034 * Check that the supplied IRQ is good and then use it to setup the
2035 * programmable interrupt bits on EIO board. Also set the edge/level
2036 * triggered interrupt bit.
2037 */
2038 if ((brdp->irq < 0) || (brdp->irq > 15) ||
2039 (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) {
e3869ec7 2040 kprintf("STALLION: invalid irq=%d for brd=%d\n",
984263bc
MD
2041 brdp->irq, brdp->brdnr);
2042 return(EINVAL);
2043 }
2044 outb(brdp->ioctrl, (stl_vecmap[brdp->irq] |
2045 ((brdp->irqtype) ? EIO_INTLEVEL : EIO_INTEDGE)));
2046 }
2047
efda3bd0 2048 panelp = kmalloc(sizeof(stlpanel_t), M_TTYS, M_WAITOK | M_ZERO);
984263bc
MD
2049 panelp->brdnr = brdp->brdnr;
2050 panelp->panelnr = 0;
2051 panelp->nrports = brdp->nrports;
2052 panelp->iobase = brdp->ioaddr1;
2053 panelp->hwid = status;
2054 if ((status & EIO_IDBITMASK) == EIO_MK3) {
2055 panelp->uartp = (void *) &stl_sc26198uart;
2056 panelp->isr = stl_sc26198intr;
2057 } else {
2058 panelp->uartp = (void *) &stl_cd1400uart;
2059 panelp->isr = stl_cd1400eiointr;
2060 }
2061 brdp->panels[0] = panelp;
2062 brdp->nrpanels = 1;
2063 brdp->hwid = status;
2064 brdp->state |= BRD_FOUND;
2065 return(0);
2066}
2067
2068/*****************************************************************************/
2069
2070/*
2071 * Try to find an ECH board and initialize it. This code is capable of
2072 * dealing with all types of ECH board.
2073 */
2074
2075static int stl_initech(stlbrd_t *brdp)
2076{
2077 stlpanel_t *panelp;
2078 unsigned int status, nxtid;
2079 int panelnr, ioaddr, banknr, i;
2080
752b2d38 2081#ifdef STLDEBUG
e3869ec7 2082 kprintf("stl_initech(brdp=%x)\n", (int) brdp);
984263bc
MD
2083#endif
2084
2085/*
2086 * Set up the initial board register contents for boards. This varys a
2087 * bit between the different board types. So we need to handle each
2088 * separately. Also do a check that the supplied IRQ is good.
2089 */
2090 switch (brdp->brdtype) {
2091
2092 case BRD_ECH:
2093 brdp->isr = stl_echatintr;
2094 brdp->ioctrl = brdp->ioaddr1 + 1;
2095 brdp->iostatus = brdp->ioaddr1 + 1;
2096 status = inb(brdp->iostatus);
2097 if ((status & ECH_IDBITMASK) != ECH_ID)
2098 return(ENODEV);
2099 brdp->hwid = status;
2100
2101 if ((brdp->irq < 0) || (brdp->irq > 15) ||
2102 (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) {
e3869ec7 2103 kprintf("STALLION: invalid irq=%d for brd=%d\n",
984263bc
MD
2104 brdp->irq, brdp->brdnr);
2105 return(EINVAL);
2106 }
2107 status = ((brdp->ioaddr2 & ECH_ADDR2MASK) >> 1);
2108 status |= (stl_vecmap[brdp->irq] << 1);
2109 outb(brdp->ioaddr1, (status | ECH_BRDRESET));
2110 brdp->ioctrlval = ECH_INTENABLE |
2111 ((brdp->irqtype) ? ECH_INTLEVEL : ECH_INTEDGE);
2112 outb(brdp->ioctrl, (brdp->ioctrlval | ECH_BRDENABLE));
2113 outb(brdp->ioaddr1, status);
2114 break;
2115
2116 case BRD_ECHMC:
2117 brdp->isr = stl_echmcaintr;
2118 brdp->ioctrl = brdp->ioaddr1 + 0x20;
2119 brdp->iostatus = brdp->ioctrl;
2120 status = inb(brdp->iostatus);
2121 if ((status & ECH_IDBITMASK) != ECH_ID)
2122 return(ENODEV);
2123 brdp->hwid = status;
2124
2125 if ((brdp->irq < 0) || (brdp->irq > 15) ||
2126 (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) {
e3869ec7 2127 kprintf("STALLION: invalid irq=%d for brd=%d\n",
984263bc
MD
2128 brdp->irq, brdp->brdnr);
2129 return(EINVAL);
2130 }
2131 outb(brdp->ioctrl, ECHMC_BRDRESET);
2132 outb(brdp->ioctrl, ECHMC_INTENABLE);
2133 break;
2134
2135 case BRD_ECHPCI:
2136 brdp->isr = stl_echpciintr;
2137 brdp->ioctrl = brdp->ioaddr1 + 2;
2138 break;
2139
2140 case BRD_ECH64PCI:
2141 brdp->isr = stl_echpci64intr;
2142 brdp->ioctrl = brdp->ioaddr2 + 0x40;
2143 outb((brdp->ioaddr1 + 0x4c), 0x43);
2144 break;
2145
2146 default:
e3869ec7 2147 kprintf("STALLION: unknown board type=%d\n", brdp->brdtype);
984263bc
MD
2148 break;
2149 }
2150
2151 brdp->clk = ECH_CLK;
2152
2153/*
2154 * Scan through the secondary io address space looking for panels.
2155 * As we find'em allocate and initialize panel structures for each.
2156 */
2157 ioaddr = brdp->ioaddr2;
2158 panelnr = 0;
2159 nxtid = 0;
2160 banknr = 0;
2161
2162 for (i = 0; (i < STL_MAXPANELS); i++) {
2163 if (brdp->brdtype == BRD_ECHPCI) {
2164 outb(brdp->ioctrl, nxtid);
2165 ioaddr = brdp->ioaddr2;
2166 }
2167 status = inb(ioaddr + ECH_PNLSTATUS);
2168 if ((status & ECH_PNLIDMASK) != nxtid)
2169 break;
efda3bd0 2170 panelp = kmalloc(sizeof(stlpanel_t), M_TTYS, M_WAITOK | M_ZERO);
984263bc
MD
2171 panelp->brdnr = brdp->brdnr;
2172 panelp->panelnr = panelnr;
2173 panelp->iobase = ioaddr;
2174 panelp->pagenr = nxtid;
2175 panelp->hwid = status;
2176 brdp->bnk2panel[banknr] = panelp;
2177 brdp->bnkpageaddr[banknr] = nxtid;
2178 brdp->bnkstataddr[banknr++] = ioaddr + ECH_PNLSTATUS;
2179
2180 if (status & ECH_PNLXPID) {
2181 panelp->uartp = (void *) &stl_sc26198uart;
2182 panelp->isr = stl_sc26198intr;
2183 if (status & ECH_PNL16PORT) {
2184 panelp->nrports = 16;
2185 brdp->bnk2panel[banknr] = panelp;
2186 brdp->bnkpageaddr[banknr] = nxtid;
2187 brdp->bnkstataddr[banknr++] = ioaddr + 4 +
2188 ECH_PNLSTATUS;
2189 } else {
2190 panelp->nrports = 8;
2191 }
2192 } else {
2193 panelp->uartp = (void *) &stl_cd1400uart;
2194 panelp->isr = stl_cd1400echintr;
2195 if (status & ECH_PNL16PORT) {
2196 panelp->nrports = 16;
2197 panelp->ackmask = 0x80;
2198 if (brdp->brdtype != BRD_ECHPCI)
2199 ioaddr += EREG_BANKSIZE;
2200 brdp->bnk2panel[banknr] = panelp;
2201 brdp->bnkpageaddr[banknr] = ++nxtid;
2202 brdp->bnkstataddr[banknr++] = ioaddr +
2203 ECH_PNLSTATUS;
2204 } else {
2205 panelp->nrports = 8;
2206 panelp->ackmask = 0xc0;
2207 }
2208 }
2209
2210 nxtid++;
2211 ioaddr += EREG_BANKSIZE;
2212 brdp->nrports += panelp->nrports;
2213 brdp->panels[panelnr++] = panelp;
2214 if ((brdp->brdtype == BRD_ECH) || (brdp->brdtype == BRD_ECHMC)){
2215 if (ioaddr >= (brdp->ioaddr2 + 0x20)) {
e3869ec7 2216 kprintf("STALLION: too many ports attached "
984263bc
MD
2217 "to board %d, remove last module\n",
2218 brdp->brdnr);
2219 break;
2220 }
2221 }
2222 }
2223
2224 brdp->nrpanels = panelnr;
2225 brdp->nrbnks = banknr;
2226 if (brdp->brdtype == BRD_ECH)
2227 outb(brdp->ioctrl, (brdp->ioctrlval | ECH_BRDDISABLE));
2228
2229 brdp->state |= BRD_FOUND;
2230 return(0);
2231}
2232
2233/*****************************************************************************/
2234
2235/*
2236 * Initialize and configure the specified board. This firstly probes
2237 * for the board, if it is found then the board is initialized and
2238 * then all its ports are initialized as well.
2239 */
2240
2241static int stl_brdinit(stlbrd_t *brdp)
2242{
2243 stlpanel_t *panelp;
2244 int i, j, k;
2245
752b2d38 2246#ifdef STLDEBUG
e3869ec7 2247 kprintf("stl_brdinit(brdp=%x): unit=%d type=%d io1=%x io2=%x irq=%d\n",
984263bc
MD
2248 (int) brdp, brdp->brdnr, brdp->brdtype, brdp->ioaddr1,
2249 brdp->ioaddr2, brdp->irq);
2250#endif
2251
2252 switch (brdp->brdtype) {
2253 case BRD_EASYIO:
2254 case BRD_EASYIOPCI:
2255 stl_initeio(brdp);
2256 break;
2257 case BRD_ECH:
2258 case BRD_ECHMC:
2259 case BRD_ECHPCI:
2260 case BRD_ECH64PCI:
2261 stl_initech(brdp);
2262 break;
2263 default:
e3869ec7 2264 kprintf("STALLION: unit=%d is unknown board type=%d\n",
984263bc
MD
2265 brdp->brdnr, brdp->brdtype);
2266 return(ENODEV);
2267 }
2268
2269 stl_brds[brdp->brdnr] = brdp;
2270 if ((brdp->state & BRD_FOUND) == 0) {
2271#if 0
e3869ec7 2272 kprintf("STALLION: %s board not found, unit=%d io=%x irq=%d\n",
984263bc
MD
2273 stl_brdnames[brdp->brdtype], brdp->brdnr,
2274 brdp->ioaddr1, brdp->irq);
2275#endif
2276 return(ENODEV);
2277 }
2278
2279 for (i = 0, k = 0; (i < STL_MAXPANELS); i++) {
2280 panelp = brdp->panels[i];
2038fb68 2281 if (panelp != NULL) {
984263bc
MD
2282 stl_initports(brdp, panelp);
2283 for (j = 0; (j < panelp->nrports); j++)
2284 brdp->ports[k++] = panelp->ports[j];
2285 }
2286 }
2287
e3869ec7 2288 kprintf("stl%d: %s (driver version %s) unit=%d nrpanels=%d nrports=%d\n",
984263bc
MD
2289 brdp->unitid, stl_brdnames[brdp->brdtype], stl_drvversion,
2290 brdp->brdnr, brdp->nrpanels, brdp->nrports);
2291 return(0);
2292}
2293
2294/*****************************************************************************/
2295
2296/*
2297 * Return the board stats structure to user app.
2298 */
2299
2300static int stl_getbrdstats(caddr_t data)
2301{
2302 stlbrd_t *brdp;
2303 stlpanel_t *panelp;
2304 int i;
2305
2306 stl_brdstats = *((combrd_t *) data);
2307 if (stl_brdstats.brd >= STL_MAXBRDS)
2308 return(-ENODEV);
2309 brdp = stl_brds[stl_brdstats.brd];
2038fb68 2310 if (brdp == NULL)
984263bc
MD
2311 return(-ENODEV);
2312
2313 bzero(&stl_brdstats, sizeof(combrd_t));
2314 stl_brdstats.brd = brdp->brdnr;
2315 stl_brdstats.type = brdp->brdtype;
2316 stl_brdstats.hwid = brdp->hwid;
2317 stl_brdstats.state = brdp->state;
2318 stl_brdstats.ioaddr = brdp->ioaddr1;
2319 stl_brdstats.ioaddr2 = brdp->ioaddr2;
2320 stl_brdstats.irq = brdp->irq;
2321 stl_brdstats.nrpanels = brdp->nrpanels;
2322 stl_brdstats.nrports = brdp->nrports;
2323 for (i = 0; (i < brdp->nrpanels); i++) {
2324 panelp = brdp->panels[i];
2325 stl_brdstats.panels[i].panel = i;
2326 stl_brdstats.panels[i].hwid = panelp->hwid;
2327 stl_brdstats.panels[i].nrports = panelp->nrports;
2328 }
2329
fc6d0222 2330 *((combrd_t *) data) = stl_brdstats;
984263bc
MD
2331 return(0);
2332}
2333
2334/*****************************************************************************/
2335
2336/*
2337 * Resolve the referenced port number into a port struct pointer.
2338 */
2339
2340static stlport_t *stl_getport(int brdnr, int panelnr, int portnr)
2341{
2342 stlbrd_t *brdp;
2343 stlpanel_t *panelp;
2344
2345 if ((brdnr < 0) || (brdnr >= STL_MAXBRDS))
2038fb68 2346 return(NULL);
984263bc 2347 brdp = stl_brds[brdnr];
2038fb68
SW
2348 if (brdp == NULL)
2349 return(NULL);
984263bc 2350 if ((panelnr < 0) || (panelnr >= brdp->nrpanels))
2038fb68 2351 return(NULL);
984263bc 2352 panelp = brdp->panels[panelnr];
2038fb68
SW
2353 if (panelp == NULL)
2354 return(NULL);
984263bc 2355 if ((portnr < 0) || (portnr >= panelp->nrports))
2038fb68 2356 return(NULL);
984263bc
MD
2357 return(panelp->ports[portnr]);
2358}
2359
2360/*****************************************************************************/
2361
2362/*
2363 * Return the port stats structure to user app. A NULL port struct
2364 * pointer passed in means that we need to find out from the app
2365 * what port to get stats for (used through board control device).
2366 */
2367
2368static int stl_getportstats(stlport_t *portp, caddr_t data)
2369{
2370 unsigned char *head, *tail;
2371
2038fb68 2372 if (portp == NULL) {
984263bc
MD
2373 stl_comstats = *((comstats_t *) data);
2374 portp = stl_getport(stl_comstats.brd, stl_comstats.panel,
2375 stl_comstats.port);
2038fb68 2376 if (portp == NULL)
984263bc
MD
2377 return(-ENODEV);
2378 }
2379
2380 portp->stats.state = portp->state;
2381 /*portp->stats.flags = portp->flags;*/
2382 portp->stats.hwid = portp->hwid;
2383 portp->stats.ttystate = portp->tty.t_state;
2384 portp->stats.cflags = portp->tty.t_cflag;
2385 portp->stats.iflags = portp->tty.t_iflag;
2386 portp->stats.oflags = portp->tty.t_oflag;
2387 portp->stats.lflags = portp->tty.t_lflag;
2388
2389 head = portp->tx.head;
2390 tail = portp->tx.tail;
2391 portp->stats.txbuffered = ((head >= tail) ? (head - tail) :
2392 (STL_TXBUFSIZE - (tail - head)));
2393
2394 head = portp->rx.head;
2395 tail = portp->rx.tail;
2396 portp->stats.rxbuffered = (head >= tail) ? (head - tail) :
2397 (STL_RXBUFSIZE - (tail - head));
2398
2399 portp->stats.signals = (unsigned long) stl_getsignals(portp);
2400
2401 *((comstats_t *) data) = portp->stats;
2402 return(0);
2403}
2404
2405/*****************************************************************************/
2406
2407/*
2408 * Clear the port stats structure. We also return it zeroed out...
2409 */
2410
2411static int stl_clrportstats(stlport_t *portp, caddr_t data)
2412{
2038fb68 2413 if (portp == NULL) {
984263bc
MD
2414 stl_comstats = *((comstats_t *) data);
2415 portp = stl_getport(stl_comstats.brd, stl_comstats.panel,
2416 stl_comstats.port);
2038fb68 2417 if (portp == NULL)
984263bc
MD
2418 return(ENODEV);
2419 }
2420
2421 bzero(&portp->stats, sizeof(comstats_t));
2422 portp->stats.brd = portp->brdnr;
2423 portp->stats.panel = portp->panelnr;
2424 portp->stats.port = portp->portnr;
2425 *((comstats_t *) data) = stl_comstats;
2426 return(0);
2427}
2428
2429/*****************************************************************************/
2430
2431/*
2432 * The "staliomem" device is used for stats collection in this driver.
2433 */
2434
b13267a5 2435static int stl_memioctl(cdev_t dev, unsigned long cmd, caddr_t data, int flag)
984263bc
MD
2436{
2437 int rc;
2438
752b2d38 2439#ifdef STLDEBUG
e3869ec7 2440 kprintf("stl_memioctl(dev=%s,cmd=%lx,data=%p,flag=%x)\n",
984263bc
MD
2441 devtoname(dev), cmd, (void *) data, flag);
2442#endif
2443
2444 rc = 0;
2445
2446 switch (cmd) {
2447 case COM_GETPORTSTATS:
2038fb68 2448 rc = stl_getportstats(NULL, data);
984263bc
MD
2449 break;
2450 case COM_CLRPORTSTATS:
2038fb68 2451 rc = stl_clrportstats(NULL, data);
984263bc
MD
2452 break;
2453 case COM_GETBRDSTATS:
2454 rc = stl_getbrdstats(data);
2455 break;
2456 default:
2457 rc = ENOTTY;
2458 break;
2459 }
2460
2461 return(rc);
2462}
2463
2464/*****************************************************************************/
2465
2466/*****************************************************************************/
2467/* CD1400 UART CODE */
2468/*****************************************************************************/
2469
2470/*
2471 * These functions get/set/update the registers of the cd1400 UARTs.
2472 * Access to the cd1400 registers is via an address/data io port pair.
2473 */
2474
2475static int stl_cd1400getreg(stlport_t *portp, int regnr)
2476{
2477 outb(portp->ioaddr, (regnr + portp->uartaddr));
2478 return(inb(portp->ioaddr + EREG_DATA));
2479}
2480
2481/*****************************************************************************/
2482
2483static void stl_cd1400setreg(stlport_t *portp, int regnr, int value)
2484{
2485 outb(portp->ioaddr, (regnr + portp->uartaddr));
2486 outb((portp->ioaddr + EREG_DATA), value);
2487}
2488
2489/*****************************************************************************/
2490
2491static int stl_cd1400updatereg(stlport_t *portp, int regnr, int value)
2492{
2493 outb(portp->ioaddr, (regnr + portp->uartaddr));
2494 if (inb(portp->ioaddr + EREG_DATA) != value) {
2495 outb((portp->ioaddr + EREG_DATA), value);
2496 return(1);
2497 }
2498 return(0);
2499}
2500
2501/*****************************************************************************/
2502
2503static void stl_cd1400flush(stlport_t *portp, int flag)
2504{
984263bc 2505
752b2d38 2506#ifdef STLDEBUG
e3869ec7 2507 kprintf("stl_cd1400flush(portp=%x,flag=%x)\n", (int) portp, flag);
984263bc
MD
2508#endif
2509
2038fb68 2510 if (portp == NULL)
984263bc
MD
2511 return;
2512
8d77660e 2513 crit_enter();
984263bc
MD
2514
2515 if (flag & FWRITE) {
2516 BRDENABLE(portp->brdnr, portp->pagenr);
2517 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
2518 stl_cd1400ccrwait(portp);
2519 stl_cd1400setreg(portp, CCR, CCR_TXFLUSHFIFO);
2520 stl_cd1400ccrwait(portp);
2521 BRDDISABLE(portp->brdnr);
2522 }
2523
2524 if (flag & FREAD) {
2525 /* Hmmm */
2526 }
2527
8d77660e 2528 crit_exit();
984263bc
MD
2529}
2530
2531/*****************************************************************************/
2532
2533static void stl_cd1400ccrwait(stlport_t *portp)
2534{
2535 int i;
2536
2537 for (i = 0; (i < CCR_MAXWAIT); i++) {
2538 if (stl_cd1400getreg(portp, CCR) == 0)
2539 return;
2540 }
2541
e3869ec7 2542 kprintf("stl%d: cd1400 device not responding, panel=%d port=%d\n",
984263bc
MD
2543 portp->brdnr, portp->panelnr, portp->portnr);
2544}
2545
2546/*****************************************************************************/
2547
2548/*
2549 * Transmit interrupt handler. This has gotta be fast! Handling TX
2550 * chars is pretty simple, stuff as many as possible from the TX buffer
2551 * into the cd1400 FIFO. Must also handle TX breaks here, since they
2552 * are embedded as commands in the data stream. Oh no, had to use a goto!
2553 */
2554
2555static __inline void stl_cd1400txisr(stlpanel_t *panelp, int ioaddr)
2556{
984263bc
MD
2557 stlport_t *portp;
2558 unsigned char ioack, srer;
2559 char *head, *tail;
2560 int len, stlen;
2561
752b2d38 2562#ifdef STLDEBUG
e3869ec7 2563 kprintf("stl_cd1400txisr(panelp=%x,ioaddr=%x)\n", (int) panelp, ioaddr);
984263bc
MD
2564#endif
2565
2566 ioack = inb(ioaddr + EREG_TXACK);
2567 if (((ioack & panelp->ackmask) != 0) ||
2568 ((ioack & ACK_TYPMASK) != ACK_TYPTX)) {
e3869ec7 2569 kprintf("STALLION: bad TX interrupt ack value=%x\n",
984263bc
MD
2570 ioack);
2571 return;
2572 }
2573 portp = panelp->ports[(ioack >> 3)];
984263bc
MD
2574
2575/*
2576 * Unfortunately we need to handle breaks in the data stream, since
2577 * this is the only way to generate them on the cd1400. Do it now if
2578 * a break is to be sent. Some special cases here: brklen is -1 then
2579 * start sending an un-timed break, if brklen is -2 then stop sending
2580 * an un-timed break, if brklen is -3 then we have just sent an
2581 * un-timed break and do not want any data to go out, if brklen is -4
2582 * then a break has just completed so clean up the port settings.
2583 */
2584 if (portp->brklen != 0) {
2585 if (portp->brklen >= -1) {
2586 outb(ioaddr, (TDR + portp->uartaddr));
2587 outb((ioaddr + EREG_DATA), ETC_CMD);
2588 outb((ioaddr + EREG_DATA), ETC_STARTBREAK);
2589 if (portp->brklen > 0) {
2590 outb((ioaddr + EREG_DATA), ETC_CMD);
2591 outb((ioaddr + EREG_DATA), ETC_DELAY);
2592 outb((ioaddr + EREG_DATA), portp->brklen);
2593 outb((ioaddr + EREG_DATA), ETC_CMD);
2594 outb((ioaddr + EREG_DATA), ETC_STOPBREAK);
2595 portp->brklen = -4;
2596 } else {
2597 portp->brklen = -3;
2598 }
2599 } else if (portp->brklen == -2) {
2600 outb(ioaddr, (TDR + portp->uartaddr));
2601 outb((ioaddr + EREG_DATA), ETC_CMD);
2602 outb((ioaddr + EREG_DATA), ETC_STOPBREAK);
2603 portp->brklen = -4;
2604 } else if (portp->brklen == -3) {
2605 outb(ioaddr, (SRER + portp->uartaddr));
2606 srer = inb(ioaddr + EREG_DATA);
2607 srer &= ~(SRER_TXDATA | SRER_TXEMPTY);
2608 outb((ioaddr + EREG_DATA), srer);
2609 } else {
2610 outb(ioaddr, (COR2 + portp->uartaddr));
2611 outb((ioaddr + EREG_DATA),
2612 (inb(ioaddr + EREG_DATA) & ~COR2_ETC));
2613 portp->brklen = 0;
2614 }
2615 goto stl_txalldone;
2616 }
2617
2618 head = portp->tx.head;
2619 tail = portp->tx.tail;
2620 len = (head >= tail) ? (head - tail) : (STL_TXBUFSIZE - (tail - head));
2621 if ((len == 0) || ((len < STL_TXBUFLOW) &&
2622 ((portp->state & ASY_TXLOW) == 0))) {
2623 portp->state |= ASY_TXLOW;
2624 stl_dotimeout();
2625 }
2626
2627 if (len == 0) {
2628 outb(ioaddr, (SRER + portp->uartaddr));
2629 srer = inb(ioaddr + EREG_DATA);
2630 if (srer & SRER_TXDATA) {
2631 srer = (srer & ~SRER_TXDATA) | SRER_TXEMPTY;
2632 } else {
2633 srer &= ~(SRER_TXDATA | SRER_TXEMPTY);
2634 portp->state |= ASY_TXEMPTY;
2635 portp->state &= ~ASY_TXBUSY;
2636 }
2637 outb((ioaddr + EREG_DATA), srer);
2638 } else {
2639 len = MIN(len, CD1400_TXFIFOSIZE);
2640 portp->stats.txtotal += len;
2641 stlen = MIN(len, (portp->tx.endbuf - tail));
2642 outb(ioaddr, (TDR + portp->uartaddr));
2643 outsb((ioaddr + EREG_DATA), tail, stlen);
2644 len -= stlen;
2645 tail += stlen;
2646 if (tail >= portp->tx.endbuf)
2647 tail = portp->tx.buf;
2648 if (len > 0) {
2649 outsb((ioaddr + EREG_DATA), tail, len);
2650 tail += len;
2651 }
2652 portp->tx.tail = tail;
2653 }
2654
2655stl_txalldone:
2656 outb(ioaddr, (EOSRR + portp->uartaddr));
2657 outb((ioaddr + EREG_DATA), 0);
2658}
2659
2660/*****************************************************************************/
2661
2662/*
2663 * Receive character interrupt handler. Determine if we have good chars
2664 * or bad chars and then process appropriately.
2665 */
2666
2667static __inline void stl_cd1400rxisr(stlpanel_t *panelp, int ioaddr)
2668{
2669 stlport_t *portp;
2670 struct tty *tp;
2671 unsigned int ioack, len, buflen, stlen;
2672 unsigned char status;
2673 char ch;
2674 char *head, *tail;
2675
752b2d38 2676#ifdef STLDEBUG
e3869ec7 2677 kprintf("stl_cd1400rxisr(panelp=%x,ioaddr=%x)\n", (int) panelp, ioaddr);
984263bc
MD
2678#endif
2679
2680 ioack = inb(ioaddr + EREG_RXACK);
2681 if ((ioack & panelp->ackmask) != 0) {
e3869ec7 2682 kprintf("STALLION: bad RX interrupt ack value=%x\n", ioack);
984263bc
MD
2683 return;
2684 }
2685 portp = panelp->ports[(ioack >> 3)];
2686 tp = &portp->tty;
2687
2688/*
2689 * First up, calculate how much room there is in the RX ring queue.
2690 * We also want to keep track of the longest possible copy length,
2691 * this has to allow for the wrapping of the ring queue.
2692 */
2693 head = portp->rx.head;
2694 tail = portp->rx.tail;
2695 if (head >= tail) {
2696 buflen = STL_RXBUFSIZE - (head - tail) - 1;
2697 stlen = portp->rx.endbuf - head;
2698 } else {
2699 buflen = tail - head - 1;
2700 stlen = buflen;
2701 }
2702
2703/*
2704 * Check if the input buffer is near full. If so then we should take
2705 * some flow control action... It is very easy to do hardware and
2706 * software flow control from here since we have the port selected on
2707 * the UART.
2708 */
2709 if (buflen <= (STL_RXBUFSIZE - STL_RXBUFHIGH)) {
2710 if (((portp->state & ASY_RTSFLOW) == 0) &&
2711 (portp->state & ASY_RTSFLOWMODE)) {
2712 portp->state |= ASY_RTSFLOW;
2713 stl_cd1400setreg(portp, MCOR1,
2714 (stl_cd1400getreg(portp, MCOR1) & 0xf0));
2715 stl_cd1400setreg(portp, MSVR2, 0);
2716 portp->stats.rxrtsoff++;
2717 }
2718 }
2719
2720/*
2721 * OK we are set, process good data... If the RX ring queue is full
2722 * just chuck the chars - don't leave them in the UART.
2723 */
2724 if ((ioack & ACK_TYPMASK) == ACK_TYPRXGOOD) {
2725 outb(ioaddr, (RDCR + portp->uartaddr));
2726 len = inb(ioaddr + EREG_DATA);
2727 if (buflen == 0) {
2728 outb(ioaddr, (RDSR + portp->uartaddr));
2729 insb((ioaddr + EREG_DATA), &stl_unwanted[0], len);
2730 portp->stats.rxlost += len;
2731 portp->stats.rxtotal += len;
2732 } else {
2733 len = MIN(len, buflen);
2734 portp->stats.rxtotal += len;
2735 stlen = MIN(len, stlen);
2736 if (len > 0) {
2737 outb(ioaddr, (RDSR + portp->uartaddr));
2738 insb((ioaddr + EREG_DATA), head, stlen);
2739 head += stlen;
2740 if (head >= portp->rx.endbuf) {
2741 head = portp->rx.buf;
2742 len -= stlen;
2743 insb((ioaddr + EREG_DATA), head, len);
2744 head += len;
2745 }
2746 }
2747 }
2748 } else if ((ioack & ACK_TYPMASK) == ACK_TYPRXBAD) {
2749 outb(ioaddr, (RDSR + portp->uartaddr));
2750 status = inb(ioaddr + EREG_DATA);
2751 ch = inb(ioaddr + EREG_DATA);
2752 if (status & ST_BREAK)
2753 portp->stats.rxbreaks++;
2754 if (status & ST_FRAMING)
2755 portp->stats.rxframing++;
2756 if (status & ST_PARITY)
2757 portp->stats.rxparity++;
2758 if (status & ST_OVERRUN)
2759 portp->stats.rxoverrun++;
2760 if (status & ST_SCHARMASK) {
2761 if ((status & ST_SCHARMASK) == ST_SCHAR1)
2762 portp->stats.txxon++;
2763 if ((status & ST_SCHARMASK) == ST_SCHAR2)
2764 portp->stats.txxoff++;
2765 goto stl_rxalldone;
2766 }
2767 if ((portp->rxignoremsk & status) == 0) {
2768 if ((tp->t_state & TS_CAN_BYPASS_L_RINT) &&
2769 ((status & ST_FRAMING) ||
2770 ((status & ST_PARITY) && (tp->t_iflag & INPCK))))
2771 ch = 0;
2772 if ((portp->rxmarkmsk & status) == 0)
2773 status = 0;
2774 *(head + STL_RXBUFSIZE) = status;
2775 *head++ = ch;
2776 if (head >= portp->rx.endbuf)
2777 head = portp->rx.buf;
2778 }
2779 } else {
e3869ec7 2780 kprintf("STALLION: bad RX interrupt ack value=%x\n", ioack);
984263bc
MD
2781 return;
2782 }
2783
2784 portp->rx.head = head;
2785 portp->state |= ASY_RXDATA;
2786 stl_dotimeout();
2787
2788stl_rxalldone:
2789 outb(ioaddr, (EOSRR + portp->uartaddr));
2790 outb((ioaddr + EREG_DATA), 0);
2791}
2792
2793/*****************************************************************************/
2794
2795/*
2796 * Modem interrupt handler. The is called when the modem signal line
2797 * (DCD) has changed state.
2798 */
2799
2800static __inline void stl_cd1400mdmisr(stlpanel_t *panelp, int ioaddr)
2801{
2802 stlport_t *portp;
2803 unsigned int ioack;
2804 unsigned char misr;
2805
752b2d38 2806#ifdef STLDEBUG
e3869ec7 2807 kprintf("stl_cd1400mdmisr(panelp=%x,ioaddr=%x)\n", (int) panelp, ioaddr);
984263bc
MD
2808#endif
2809
2810 ioack = inb(ioaddr + EREG_MDACK);
2811 if (((ioack & panelp->ackmask) != 0) ||
2812 ((ioack & ACK_TYPMASK) != ACK_TYPMDM)) {
e3869ec7 2813 kprintf("STALLION: bad MODEM interrupt ack value=%x\n", ioack);
984263bc
MD
2814 return;
2815 }
2816 portp = panelp->ports[(ioack >> 3)];
2817
2818 outb(ioaddr, (MISR + portp->uartaddr));
2819 misr = inb(ioaddr + EREG_DATA);
2820 if (misr & MISR_DCD) {
2821 portp->state |= ASY_DCDCHANGE;
2822 portp->stats.modem++;
2823 stl_dotimeout();
2824 }
2825
2826 outb(ioaddr, (EOSRR + portp->uartaddr));
2827 outb((ioaddr + EREG_DATA), 0);
2828}
2829
2830/*****************************************************************************/
2831
2832/*
2833 * Interrupt service routine for cd1400 EasyIO boards.
2834 */
2835
2836static void stl_cd1400eiointr(stlpanel_t *panelp, unsigned int iobase)
2837{
2838 unsigned char svrtype;
2839
752b2d38 2840#ifdef STLDEBUG
e3869ec7 2841 kprintf("stl_cd1400eiointr(panelp=%x,iobase=%x)\n", (int) panelp,
984263bc
MD
2842 iobase);
2843#endif
2844
2845 outb(iobase, SVRR);
2846 svrtype = inb(iobase + EREG_DATA);
2847 if (panelp->nrports > 4) {
2848 outb(iobase, (SVRR + 0x80));
2849 svrtype |= inb(iobase + EREG_DATA);
2850 }
752b2d38 2851#ifdef STLDEBUG
e3869ec7 2852kprintf("stl_cd1400eiointr(panelp=%x,iobase=%x): svrr=%x\n", (int) panelp, iobase, svrtype);
984263bc
MD
2853#endif
2854
2855 if (svrtype & SVRR_RX)
2856 stl_cd1400rxisr(panelp, iobase);
2857 else if (svrtype & SVRR_TX)
2858 stl_cd1400txisr(panelp, iobase);
2859 else if (svrtype & SVRR_MDM)
2860 stl_cd1400mdmisr(panelp, iobase);
2861}
2862
2863/*****************************************************************************/
2864
2865/*
2866 * Interrupt service routine for cd1400 panels.
2867 */
2868
2869static void stl_cd1400echintr(stlpanel_t *panelp, unsigned int iobase)
2870{
2871 unsigned char svrtype;
2872
752b2d38 2873#ifdef STLDEBUG
e3869ec7 2874 kprintf("stl_cd1400echintr(panelp=%x,iobase=%x)\n", (int) panelp,
984263bc
MD
2875 iobase);
2876#endif
2877
2878 outb(iobase, SVRR);
2879 svrtype = inb(iobase + EREG_DATA);
2880 outb(iobase, (SVRR + 0x80));
2881 svrtype |= inb(iobase + EREG_DATA);
2882 if (svrtype & SVRR_RX)
2883 stl_cd1400rxisr(panelp, iobase);
2884 else if (svrtype & SVRR_TX)
2885 stl_cd1400txisr(panelp, iobase);
2886 else if (svrtype & SVRR_MDM)
2887 stl_cd1400mdmisr(panelp, iobase);
2888}
2889
2890/*****************************************************************************/
2891
2892/*
2893 * Set up the cd1400 registers for a port based on the termios port
2894 * settings.
2895 */
2896
2897static int stl_cd1400setport(stlport_t *portp, struct termios *tiosp)
2898{
2899 unsigned int clkdiv;
2900 unsigned char cor1, cor2, cor3;
2901 unsigned char cor4, cor5, ccr;
2902 unsigned char srer, sreron, sreroff;
2903 unsigned char mcor1, mcor2, rtpr;
2904 unsigned char clk, div;
984263bc 2905
752b2d38 2906#ifdef STLDEBUG
e3869ec7 2907 kprintf("stl_cd1400setport(portp=%x,tiosp=%x): brdnr=%d portnr=%d\n",
984263bc
MD
2908 (int) portp, (int) tiosp, portp->brdnr, portp->portnr);
2909#endif
2910
2911 cor1 = 0;
2912 cor2 = 0;
2913 cor3 = 0;
2914 cor4 = 0;
2915 cor5 = 0;
2916 ccr = 0;
2917 rtpr = 0;
2918 clk = 0;
2919 div = 0;
2920 mcor1 = 0;
2921 mcor2 = 0;
2922 sreron = 0;
2923 sreroff = 0;
2924
2925/*
2926 * Set up the RX char ignore mask with those RX error types we
2927 * can ignore. We could have used some special modes of the cd1400
2928 * UART to help, but it is better this way because we can keep stats
2929 * on the number of each type of RX exception event.
2930 */
2931 portp->rxignoremsk = 0;
2932 if (tiosp->c_iflag & IGNPAR)
2933 portp->rxignoremsk |= (ST_PARITY | ST_FRAMING | ST_OVERRUN);
2934 if (tiosp->c_iflag & IGNBRK)
2935 portp->rxignoremsk |= ST_BREAK;
2936
2937 portp->rxmarkmsk = ST_OVERRUN;
2938 if (tiosp->c_iflag & (INPCK | PARMRK))
2939 portp->rxmarkmsk |= (ST_PARITY | ST_FRAMING);
2940 if (tiosp->c_iflag & BRKINT)
2941 portp->rxmarkmsk |= ST_BREAK;
2942
2943/*
2944 * Go through the char size, parity and stop bits and set all the
2945 * option registers appropriately.
2946 */
2947 switch (tiosp->c_cflag & CSIZE) {
2948 case CS5:
2949 cor1 |= COR1_CHL5;
2950 break;
2951 case CS6:
2952 cor1 |= COR1_CHL6;
2953 break;
2954 case CS7:
2955 cor1 |= COR1_CHL7;
2956 break;
2957 default:
2958 cor1 |= COR1_CHL8;
2959 break;
2960 }
2961
2962 if (tiosp->c_cflag & CSTOPB)
2963 cor1 |= COR1_STOP2;
2964 else
2965 cor1 |= COR1_STOP1;
2966
2967 if (tiosp->c_cflag & PARENB) {
2968 if (tiosp->c_cflag & PARODD)
2969 cor1 |= (COR1_PARENB | COR1_PARODD);
2970 else
2971 cor1 |= (COR1_PARENB | COR1_PAREVEN);
2972 } else {
2973 cor1 |= COR1_PARNONE;
2974 }
2975
2976/*
2977 * Set the RX FIFO threshold at 6 chars. This gives a bit of breathing
2978 * space for hardware flow control and the like. This should be set to
2979 * VMIN. Also here we will set the RX data timeout to 10ms - this should
2980 * really be based on VTIME...
2981 */
2982 cor3 |= FIFO_RXTHRESHOLD;
2983 rtpr = 2;
2984
2985/*
2986 * Calculate the baud rate timers. For now we will just assume that
2987 * the input and output baud are the same. Could have used a baud
2988 * table here, but this way we can generate virtually any baud rate
2989 * we like!
2990 */
2991 if (tiosp->c_ispeed == 0)
2992 tiosp->c_ispeed = tiosp->c_ospeed;
2993 if ((tiosp->c_ospeed < 0) || (tiosp->c_ospeed > CD1400_MAXBAUD))
2994 return(EINVAL);
2995
2996 if (tiosp->c_ospeed > 0) {
2997 for (clk = 0; (clk < CD1400_NUMCLKS); clk++) {
2998 clkdiv = ((portp->clk / stl_cd1400clkdivs[clk]) /
2999 tiosp->c_ospeed);
3000 if (clkdiv < 0x100)
3001 break;
3002 }
3003 div = (unsigned char) clkdiv;
3004 }
3005
3006/*
3007 * Check what form of modem signaling is required and set it up.
3008 */
3009 if ((tiosp->c_cflag & CLOCAL) == 0) {
3010 mcor1 |= MCOR1_DCD;
3011 mcor2 |= MCOR2_DCD;
3012 sreron |= SRER_MODEM;
3013 }
3014
3015/*
3016 * Setup cd1400 enhanced modes if we can. In particular we want to
3017 * handle as much of the flow control as possbile automatically. As
3018 * well as saving a few CPU cycles it will also greatly improve flow
3019 * control reliablilty.
3020 */
3021 if (tiosp->c_iflag & IXON) {
3022 cor2 |= COR2_TXIBE;
3023 cor3 |= COR3_SCD12;
3024 if (tiosp->c_iflag & IXANY)
3025 cor2 |= COR2_IXM;
3026 }
3027
3028 if (tiosp->c_cflag & CCTS_OFLOW)
3029 cor2 |= COR2_CTSAE;
3030 if (tiosp->c_cflag & CRTS_IFLOW)
3031 mcor1 |= FIFO_RTSTHRESHOLD;
3032
3033/*
3034 * All cd1400 register values calculated so go through and set them
3035 * all up.
3036 */
752b2d38 3037#ifdef STLDEBUG
e3869ec7 3038 kprintf("SETPORT: portnr=%d panelnr=%d brdnr=%d\n", portp->portnr,
984263bc 3039 portp->panelnr, portp->brdnr);
e3869ec7 3040 kprintf(" cor1=%x cor2=%x cor3=%x cor4=%x cor5=%x\n", cor1, cor2,
984263bc 3041 cor3, cor4, cor5);
e3869ec7 3042 kprintf(" mcor1=%x mcor2=%x rtpr=%x sreron=%x sreroff=%x\n",
984263bc 3043 mcor1, mcor2, rtpr, sreron, sreroff);
e3869ec7
SW
3044 kprintf(" tcor=%x tbpr=%x rcor=%x rbpr=%x\n", clk, div, clk, div);
3045 kprintf(" schr1=%x schr2=%x schr3=%x schr4=%x\n",
984263bc
MD
3046 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP], tiosp->c_cc[VSTART],
3047 tiosp->c_cc[VSTOP]);
3048#endif
3049
8d77660e 3050 crit_enter();
984263bc
MD
3051 BRDENABLE(portp->brdnr, portp->pagenr);
3052 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x3));
3053 srer = stl_cd1400getreg(portp, SRER);
3054 stl_cd1400setreg(portp, SRER, 0);
3055 ccr += stl_cd1400updatereg(portp, COR1, cor1);
3056 ccr += stl_cd1400updatereg(portp, COR2, cor2);
3057 ccr += stl_cd1400updatereg(portp, COR3, cor3);
3058 if (ccr) {
3059 stl_cd1400ccrwait(portp);
3060 stl_cd1400setreg(portp, CCR, CCR_CORCHANGE);
3061 }
3062 stl_cd1400setreg(portp, COR4, cor4);
3063 stl_cd1400setreg(portp, COR5, cor5);
3064 stl_cd1400setreg(portp, MCOR1, mcor1);
3065 stl_cd1400setreg(portp, MCOR2, mcor2);
3066 if (tiosp->c_ospeed == 0) {
3067 stl_cd1400setreg(portp, MSVR1, 0);
3068 } else {
3069 stl_cd1400setreg(portp, MSVR1, MSVR1_DTR);
3070 stl_cd1400setreg(portp, TCOR, clk);
3071 stl_cd1400setreg(portp, TBPR, div);
3072 stl_cd1400setreg(portp, RCOR, clk);
3073 stl_cd1400setreg(portp, RBPR, div);
3074 }
3075 stl_cd1400setreg(portp, SCHR1, tiosp->c_cc[VSTART]);
3076 stl_cd1400setreg(portp, SCHR2, tiosp->c_cc[VSTOP]);
3077 stl_cd1400setreg(portp, SCHR3, tiosp->c_cc[VSTART]);
3078 stl_cd1400setreg(portp, SCHR4, tiosp->c_cc[VSTOP]);
3079 stl_cd1400setreg(portp, RTPR, rtpr);
3080 mcor1 = stl_cd1400getreg(portp, MSVR1);
3081 if (mcor1 & MSVR1_DCD)
3082 portp->sigs |= TIOCM_CD;
3083 else
3084 portp->sigs &= ~TIOCM_CD;
3085 stl_cd1400setreg(portp, SRER, ((srer & ~sreroff) | sreron));
3086 BRDDISABLE(portp->brdnr);
3087 portp->state &= ~(ASY_RTSFLOWMODE | ASY_CTSFLOWMODE);
3088 portp->state |= ((tiosp->c_cflag & CRTS_IFLOW) ? ASY_RTSFLOWMODE : 0);
3089 portp->state |= ((tiosp->c_cflag & CCTS_OFLOW) ? ASY_CTSFLOWMODE : 0);
3090 stl_ttyoptim(portp, tiosp);
8d77660e 3091 crit_exit();
984263bc
MD
3092
3093 return(0);
3094}
3095
3096/*****************************************************************************/
3097
3098/*
3099 * Action the flow control as required. The hw and sw args inform the
3100 * routine what flow control methods it should try.
3101 */
3102
3103static void stl_cd1400sendflow(stlport_t *portp, int hw, int sw)
3104{
984263bc 3105
752b2d38 3106#ifdef STLDEBUG
e3869ec7 3107 kprintf("stl_cd1400sendflow(portp=%x,hw=%d,sw=%d)\n",
984263bc
MD
3108 (int) portp, hw, sw);
3109#endif
3110
8d77660e 3111 crit_enter();
984263bc
MD
3112 BRDENABLE(portp->brdnr, portp->pagenr);
3113 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3114
3115 if (sw >= 0) {
3116 stl_cd1400ccrwait(portp);
3117 if (sw) {
3118 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR2);
3119 portp->stats.rxxoff++;
3120 } else {
3121 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR1);
3122 portp->stats.rxxon++;
3123 }
3124 stl_cd1400ccrwait(portp);
3125 }
3126
3127 if (hw == 0) {
3128 portp->state |= ASY_RTSFLOW;
3129 stl_cd1400setreg(portp, MCOR1,
3130 (stl_cd1400getreg(portp, MCOR1) & 0xf0));
3131 stl_cd1400setreg(portp, MSVR2, 0);
3132 portp->stats.rxrtsoff++;
3133 } else if (hw > 0) {
3134 portp->state &= ~ASY_RTSFLOW;
3135 stl_cd1400setreg(portp, MSVR2, MSVR2_RTS);
3136 stl_cd1400setreg(portp, MCOR1,
3137 (stl_cd1400getreg(portp, MCOR1) | FIFO_RTSTHRESHOLD));
3138 portp->stats.rxrtson++;
3139 }
3140
3141 BRDDISABLE(portp->brdnr);
8d77660e 3142 crit_exit();
984263bc
MD
3143}
3144
3145/*****************************************************************************/
3146
3147/*
3148 * Return the current state of data flow on this port. This is only
3149 * really interresting when determining if data has fully completed
3150 * transmission or not... This is easy for the cd1400, it accurately
3151 * maintains the busy port flag.
3152 */
3153
3154static int stl_cd1400datastate(stlport_t *portp)
3155{
752b2d38 3156#ifdef STLDEBUG
e3869ec7 3157 kprintf("stl_cd1400datastate(portp=%x)\n", (int) portp);
984263bc
MD
3158#endif
3159
2038fb68 3160 if (portp == NULL)
984263bc
MD
3161 return(0);
3162
3163 return((portp->state & ASY_TXBUSY) ? 1 : 0);
3164}
3165
3166/*****************************************************************************/
3167
3168/*
3169 * Set the state of the DTR and RTS signals. Got to do some extra
3170 * work here to deal hardware flow control.
3171 */
3172
3173static void stl_cd1400setsignals(stlport_t *portp, int dtr, int rts)
3174{
3175 unsigned char msvr1, msvr2;
984263bc 3176
752b2d38 3177#ifdef STLDEBUG
e3869ec7 3178 kprintf("stl_cd1400setsignals(portp=%x,dtr=%d,rts=%d)\n", (int) portp,
984263bc
MD
3179 dtr, rts);
3180#endif
3181
3182 msvr1 = 0;
3183 msvr2 = 0;
3184 if (dtr > 0)
3185 msvr1 = MSVR1_DTR;
3186 if (rts > 0)
3187 msvr2 = MSVR2_RTS;
3188
8d77660e 3189 crit_enter();
984263bc
MD
3190 BRDENABLE(portp->brdnr, portp->pagenr);
3191 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3192 if (rts >= 0) {
3193 if (portp->tty.t_cflag & CRTS_IFLOW) {
3194 if (rts == 0) {
3195 stl_cd1400setreg(portp, MCOR1,
3196 (stl_cd1400getreg(portp, MCOR1) & 0xf0));
3197 portp->stats.rxrtsoff++;
3198 } else {
3199 stl_cd1400setreg(portp, MCOR1,
3200 (stl_cd1400getreg(portp, MCOR1) |
3201 FIFO_RTSTHRESHOLD));
3202 portp->stats.rxrtson++;
3203 }
3204 }
3205 stl_cd1400setreg(portp, MSVR2, msvr2);
3206 }
3207 if (dtr >= 0)
3208 stl_cd1400setreg(portp, MSVR1, msvr1);
3209 BRDDISABLE(portp->brdnr);
8d77660e 3210 crit_exit();
984263bc
MD
3211}
3212
3213/*****************************************************************************/
3214
3215/*
3216 * Get the state of the signals.
3217 */
3218
3219static int stl_cd1400getsignals(stlport_t *portp)
3220{
3221 unsigned char msvr1, msvr2;
8d77660e 3222 int sigs;
984263bc 3223
752b2d38 3224#ifdef STLDEBUG
e3869ec7 3225 kprintf("stl_cd1400getsignals(portp=%x)\n", (int) portp);
984263bc
MD
3226#endif
3227
8d77660e 3228 crit_enter();
984263bc
MD
3229 BRDENABLE(portp->brdnr, portp->pagenr);
3230 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x3));
3231 msvr1 = stl_cd1400getreg(portp, MSVR1);
3232 msvr2 = stl_cd1400getreg(portp, MSVR2);
3233 BRDDISABLE(portp->brdnr);
8d77660e 3234 crit_exit();
984263bc
MD
3235
3236 sigs = 0;
3237 sigs |= (msvr1 & MSVR1_DCD) ? TIOCM_CD : 0;
3238 sigs |= (msvr1 & MSVR1_CTS) ? TIOCM_CTS : 0;
3239 sigs |= (msvr1 & MSVR1_DTR) ? TIOCM_DTR : 0;
3240 sigs |= (msvr2 & MSVR2_RTS) ? TIOCM_RTS : 0;
3241#if 0
3242 sigs |= (msvr1 & MSVR1_RI) ? TIOCM_RI : 0;
3243 sigs |= (msvr1 & MSVR1_DSR) ? TIOCM_DSR : 0;
3244#else
3245 sigs |= TIOCM_DSR;
3246#endif
3247 return(sigs);
3248}
3249
3250/*****************************************************************************/
3251
3252/*
3253 * Enable or disable the Transmitter and/or Receiver.
3254 */
3255
3256static void stl_cd1400enablerxtx(stlport_t *portp, int rx, int tx)
3257{
3258 unsigned char ccr;
984263bc 3259
752b2d38 3260#ifdef STLDEBUG
e3869ec7 3261 kprintf("stl_cd1400enablerxtx(portp=%x,rx=%d,tx=%d)\n",
984263bc
MD
3262 (int) portp, rx, tx);
3263#endif
3264
3265 ccr = 0;
3266 if (tx == 0)
3267 ccr |= CCR_TXDISABLE;
3268 else if (tx > 0)
3269 ccr |= CCR_TXENABLE;
3270 if (rx == 0)
3271 ccr |= CCR_RXDISABLE;
3272 else if (rx > 0)
3273 ccr |= CCR_RXENABLE;
3274
8d77660e 3275 crit_enter();
984263bc
MD
3276 BRDENABLE(portp->brdnr, portp->pagenr);
3277 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3278 stl_cd1400ccrwait(portp);
3279 stl_cd1400setreg(portp, CCR, ccr);
3280 stl_cd1400ccrwait(portp);
3281 BRDDISABLE(portp->brdnr);
8d77660e 3282 crit_exit();
984263bc
MD
3283}
3284
3285/*****************************************************************************/
3286
3287/*
3288 * Start or stop the Transmitter and/or Receiver.
3289 */
3290
3291static void stl_cd1400startrxtx(stlport_t *portp, int rx, int tx)
3292{
3293 unsigned char sreron, sreroff;
984263bc 3294
752b2d38 3295#ifdef STLDEBUG
e3869ec7 3296 kprintf("stl_cd1400startrxtx(portp=%x,rx=%d,tx=%d)\n",
984263bc
MD
3297 (int) portp, rx, tx);
3298#endif
3299
3300 sreron = 0;
3301 sreroff = 0;
3302 if (tx == 0)
3303 sreroff |= (SRER_TXDATA | SRER_TXEMPTY);
3304 else if (tx == 1)
3305 sreron |= SRER_TXDATA;
3306 else if (tx >= 2)
3307 sreron |= SRER_TXEMPTY;
3308 if (rx == 0)
3309 sreroff |= SRER_RXDATA;
3310 else if (rx > 0)
3311 sreron |= SRER_RXDATA;
3312
8d77660e 3313 crit_enter();
984263bc
MD
3314 BRDENABLE(portp->brdnr, portp->pagenr);
3315 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x3));
3316 stl_cd1400setreg(portp, SRER,
3317 ((stl_cd1400getreg(portp, SRER) & ~sreroff) | sreron));
3318 BRDDISABLE(portp->brdnr);
3319 if (tx > 0) {
3320 portp->state |= ASY_TXBUSY;
3321 portp->tty.t_state |= TS_BUSY;
3322 }
8d77660e 3323 crit_exit();
984263bc
MD
3324}
3325
3326/*****************************************************************************/
3327
3328/*
3329 * Disable all interrupts from this port.
3330 */
3331
3332static void stl_cd1400disableintrs(stlport_t *portp)
3333{
984263bc 3334
752b2d38 3335#ifdef STLDEBUG
e3869ec7 3336 kprintf("stl_cd1400disableintrs(portp=%x)\n", (int) portp);
984263bc
MD
3337#endif
3338
8d77660e 3339 crit_enter();
984263bc
MD
3340 BRDENABLE(portp->brdnr, portp->pagenr);
3341 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x3));
3342 stl_cd1400setreg(portp, SRER, 0);
3343 BRDDISABLE(portp->brdnr);
8d77660e 3344 crit_exit();
984263bc
MD
3345}
3346
3347/*****************************************************************************/
3348
3349static void stl_cd1400sendbreak(stlport_t *portp, long len)
3350{
984263bc 3351
752b2d38 3352#ifdef STLDEBUG
e3869ec7 3353 kprintf("stl_cd1400sendbreak(portp=%x,len=%d)\n", (int) portp,
984263bc
MD
3354 (int) len);
3355#endif
3356
8d77660e 3357 crit_enter();
984263bc
MD
3358 BRDENABLE(portp->brdnr, portp->pagenr);
3359 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x3));
3360 stl_cd1400setreg(portp, COR2,
3361 (stl_cd1400getreg(portp, COR2) | COR2_ETC));
3362 stl_cd1400setreg(portp, SRER,
3363 ((stl_cd1400getreg(portp, SRER) & ~SRER_TXDATA) |
3364 SRER_TXEMPTY));
3365 BRDDISABLE(portp->brdnr);
3366 if (len > 0) {
3367 len = len / 5;
3368 portp->brklen = (len > 255) ? 255 : len;
3369 } else {
3370 portp->brklen = len;
3371 }
8d77660e 3372 crit_exit();
984263bc
MD
3373 portp->stats.txbreaks++;
3374}
3375
3376/*****************************************************************************/
3377
3378/*
3379 * Try and find and initialize all the ports on a panel. We don't care
3380 * what sort of board these ports are on - since the port io registers
3381 * are almost identical when dealing with ports.
3382 */
3383
3384static void stl_cd1400portinit(stlbrd_t *brdp, stlpanel_t *panelp, stlport_t *portp)
3385{
752b2d38 3386#ifdef STLDEBUG
e3869ec7 3387 kprintf("stl_cd1400portinit(brdp=%x,panelp=%x,portp=%x)\n",
984263bc
MD
3388 (int) brdp, (int) panelp, (int) portp);
3389#endif
3390
2038fb68
SW
3391 if ((brdp == NULL) || (panelp == NULL) ||
3392 (portp == NULL))
984263bc
MD
3393 return;
3394
3395 portp->ioaddr = panelp->iobase + (((brdp->brdtype == BRD_ECHPCI) ||
3396 (portp->portnr < 8)) ? 0 : EREG_BANKSIZE);
3397 portp->uartaddr = (portp->portnr & 0x04) << 5;
3398 portp->pagenr = panelp->pagenr + (portp->portnr >> 3);
3399
3400 BRDENABLE(portp->brdnr, portp->pagenr);
3401 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x3));
3402 stl_cd1400setreg(portp, LIVR, (portp->portnr << 3));
3403 portp->hwid = stl_cd1400getreg(portp, GFRCR);
3404 BRDDISABLE(portp->brdnr);
3405}
3406
3407/*****************************************************************************/
3408
3409/*
3410 * Inbitialize the UARTs in a panel. We don't care what sort of board
3411 * these ports are on - since the port io registers are almost
3412 * identical when dealing with ports.
3413 */
3414
3415static int stl_cd1400panelinit(stlbrd_t *brdp, stlpanel_t *panelp)
3416{
3417 unsigned int gfrcr;
3418 int chipmask, i, j;
3419 int nrchips, uartaddr, ioaddr;
3420
752b2d38 3421#ifdef STLDEBUG
e3869ec7 3422 kprintf("stl_cd1400panelinit(brdp=%x,panelp=%x)\n", (int) brdp,
984263bc
MD
3423 (int) panelp);
3424#endif
3425
3426 BRDENABLE(panelp->brdnr, panelp->pagenr);
3427
3428/*
3429 * Check that each chip is present and started up OK.
3430 */
3431 chipmask = 0;
3432 nrchips = panelp->nrports / CD1400_PORTS;
3433 for (i = 0; (i < nrchips); i++) {
3434 if (brdp->brdtype == BRD_ECHPCI) {
3435 outb((panelp->pagenr + (i >> 1)), brdp->ioctrl);
3436 ioaddr = panelp->iobase;
3437 } else {
3438 ioaddr = panelp->iobase + (EREG_BANKSIZE * (i >> 1));
3439 }
3440 uartaddr = (i & 0x01) ? 0x080 : 0;
3441 outb(ioaddr, (GFRCR + uartaddr));
3442 outb((ioaddr + EREG_DATA), 0);
3443 outb(ioaddr, (CCR + uartaddr));
3444 outb((ioaddr + EREG_DATA), CCR_RESETFULL);
3445 outb((ioaddr + EREG_DATA), CCR_RESETFULL);
3446 outb(ioaddr, (GFRCR + uartaddr));
3447 for (j = 0; (j < CCR_MAXWAIT); j++) {
3448 if ((gfrcr = inb(ioaddr + EREG_DATA)) != 0)
3449 break;
3450 }
3451 if ((j >= CCR_MAXWAIT) || (gfrcr < 0x40) || (gfrcr > 0x60)) {
e3869ec7 3452 kprintf("STALLION: cd1400 not responding, "
984263bc
MD
3453 "board=%d panel=%d chip=%d\n", panelp->brdnr,
3454 panelp->panelnr, i);
3455 continue;
3456 }
3457 chipmask |= (0x1 << i);
3458 outb(ioaddr, (PPR + uartaddr));
3459 outb((ioaddr + EREG_DATA), PPR_SCALAR);
3460 }
3461
3462
3463 BRDDISABLE(panelp->brdnr);
3464 return(chipmask);
3465}
3466
3467/*****************************************************************************/
3468/* SC26198 HARDWARE FUNCTIONS */
3469/*****************************************************************************/
3470
3471/*
3472 * These functions get/set/update the registers of the sc26198 UARTs.
3473 * Access to the sc26198 registers is via an address/data io port pair.
3474 * (Maybe should make this inline...)
3475 */
3476
3477static int stl_sc26198getreg(stlport_t *portp, int regnr)
3478{
3479 outb((portp->ioaddr + XP_ADDR), (regnr | portp->uartaddr));
3480 return(inb(portp->ioaddr + XP_DATA));
3481}
3482
3483static void stl_sc26198setreg(stlport_t *portp, int regnr, int value)
3484{
3485 outb((portp->ioaddr + XP_ADDR), (regnr | portp->uartaddr));
3486 outb((portp->ioaddr + XP_DATA), value);
3487}
3488
3489static int stl_sc26198updatereg(stlport_t *portp, int regnr, int value)
3490{
3491 outb((portp->ioaddr + XP_ADDR), (regnr | portp->uartaddr));
3492 if (inb(portp->ioaddr + XP_DATA) != value) {
3493 outb((portp->ioaddr + XP_DATA), value);
3494 return(1);
3495 }
3496 return(0);
3497}
3498
3499/*****************************************************************************/
3500
3501/*
3502 * Functions to get and set the sc26198 global registers.
3503 */
3504
3505static int stl_sc26198getglobreg(stlport_t *portp, int regnr)
3506{
3507 outb((portp->ioaddr + XP_ADDR), regnr);
3508 return(inb(portp->ioaddr + XP_DATA));
3509}
3510
3511#if 0
3512static void stl_sc26198setglobreg(stlport_t *portp, int regnr, int value)
3513{
3514 outb((portp->ioaddr + XP_ADDR), regnr);
3515 outb((portp->ioaddr + XP_DATA), value);
3516}
3517#endif
3518
3519/*****************************************************************************/
3520
3521/*
3522 * Inbitialize the UARTs in a panel. We don't care what sort of board
3523 * these ports are on - since the port io registers are almost
3524 * identical when dealing with ports.
3525 */
3526
3527static int stl_sc26198panelinit(stlbrd_t *brdp, stlpanel_t *panelp)
3528{
3529 int chipmask, i;
3530 int nrchips, ioaddr;
3531
752b2d38 3532#ifdef STLDEBUG
e3869ec7 3533 kprintf("stl_sc26198panelinit(brdp=%x,panelp=%x)\n", (int) brdp,
984263bc
MD
3534 (int) panelp);
3535#endif
3536
3537 BRDENABLE(panelp->brdnr, panelp->pagenr);
3538
3539/*
3540 * Check that each chip is present and started up OK.
3541 */
3542 chipmask = 0;
3543 nrchips = (panelp->nrports + 4) / SC26198_PORTS;
3544 if (brdp->brdtype == BRD_ECHPCI)
3545 outb(brdp->ioctrl, panelp->pagenr);
3546
3547 for (i = 0; (i < nrchips); i++) {
3548 ioaddr = panelp->iobase + (i * 4);
3549 outb((ioaddr + XP_ADDR), SCCR);
3550 outb((ioaddr + XP_DATA), CR_RESETALL);
3551 outb((ioaddr + XP_ADDR), TSTR);
3552 if (inb(ioaddr + XP_DATA) != 0) {
e3869ec7 3553 kprintf("STALLION: sc26198 not responding, "
984263bc
MD
3554 "board=%d panel=%d chip=%d\n", panelp->brdnr,
3555 panelp->panelnr, i);
3556 continue;
3557 }
3558 chipmask |= (0x1 << i);
3559 outb((ioaddr + XP_ADDR), GCCR);
3560 outb((ioaddr + XP_DATA), GCCR_IVRTYPCHANACK);
3561 outb((ioaddr + XP_ADDR), WDTRCR);
3562 outb((ioaddr + XP_DATA), 0xff);
3563 }
3564
3565 BRDDISABLE(panelp->brdnr);
3566 return(chipmask);
3567}
3568
3569/*****************************************************************************/
3570
3571/*
3572 * Initialize hardware specific port registers.
3573 */
3574
3575static void stl_sc26198portinit(stlbrd_t *brdp, stlpanel_t *panelp, stlport_t *portp)
3576{
752b2d38 3577#ifdef STLDEBUG
e3869ec7 3578 kprintf("stl_sc26198portinit(brdp=%x,panelp=%x,portp=%x)\n",
984263bc
MD
3579 (int) brdp, (int) panelp, (int) portp);
3580#endif
3581
2038fb68
SW
3582 if ((brdp == NULL) || (panelp == NULL) ||
3583 (portp == NULL))
984263bc
MD
3584 return;
3585
3586 portp->ioaddr = panelp->iobase + ((portp->portnr < 8) ? 0 : 4);
3587 portp->uartaddr = (portp->portnr & 0x07) << 4;
3588 portp->pagenr = panelp->pagenr;
3589 portp->hwid = 0x1;
3590
3591 BRDENABLE(portp->brdnr, portp->pagenr);
3592 stl_sc26198setreg(portp, IOPCR, IOPCR_SETSIGS);
3593 BRDDISABLE(portp->brdnr);
3594}
3595
3596/*****************************************************************************/
3597
3598/*
3599 * Set up the sc26198 registers for a port based on the termios port
3600 * settings.
3601 */
3602
3603static int stl_sc26198setport(stlport_t *portp, struct termios *tiosp)
3604{
3605 unsigned char mr0, mr1, mr2, clk;
3606 unsigned char imron, imroff, iopr, ipr;
984263bc 3607