Silence warnings about unhandled enum values.
[dragonfly.git] / sys / dev / raid / amr / amr.c
CommitLineData
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1/*-
2 * Copyright (c) 1999,2000 Michael Smith
3 * Copyright (c) 2000 BSDi
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 * Copyright (c) 2002 Eric Moore
28 * Copyright (c) 2002 LSI Logic Corporation
29 * All rights reserved.
30 *
31 * Redistribution and use in source and binary forms, with or without
32 * modification, are permitted provided that the following conditions
33 * are met:
34 * 1. Redistributions of source code must retain the above copyright
35 * notice, this list of conditions and the following disclaimer.
36 * 2. Redistributions in binary form must reproduce the above copyright
37 * notice, this list of conditions and the following disclaimer in the
38 * documentation and/or other materials provided with the distribution.
39 * 3. The party using or redistributing the source code and binary forms
40 * agrees to the disclaimer below and the terms and conditions set forth
41 * herein.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
44 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
45 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
46 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
47 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
48 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
49 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
50 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
51 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
52 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
53 * SUCH DAMAGE.
54 *
55 * $FreeBSD: src/sys/dev/amr/amr.c,v 1.7.2.13 2003/01/15 13:41:18 emoore Exp $
d0600478 56 * $DragonFly: src/sys/dev/raid/amr/amr.c,v 1.28 2008/09/16 14:08:48 swildner Exp $
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57 */
58
59/*
60 * Driver for the AMI MegaRaid family of controllers.
61 */
62
63#include <sys/param.h>
64#include <sys/systm.h>
65#include <sys/malloc.h>
66#include <sys/kernel.h>
67
1f2de5d4 68#include "amr_compat.h"
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69#include <sys/bus.h>
70#include <sys/conf.h>
71#include <sys/devicestat.h>
72#include <sys/disk.h>
73#include <sys/stat.h>
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74#include <sys/rman.h>
75
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76#include <bus/pci/pcireg.h>
77#include <bus/pci/pcivar.h>
984263bc 78
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79#include "amrio.h"
80#include "amrreg.h"
81#include "amrvar.h"
984263bc 82#define AMR_DEFINE_TABLES
1f2de5d4 83#include "amr_tables.h"
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84
85#define AMR_CDEV_MAJOR 132
86
87static d_open_t amr_open;
88static d_close_t amr_close;
89static d_ioctl_t amr_ioctl;
90
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91static struct dev_ops amr_ops = {
92 { "amr", AMR_CDEV_MAJOR, 0 },
93 .d_open = amr_open,
94 .d_close = amr_close,
95 .d_ioctl = amr_ioctl
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96};
97
98/*
99 * Initialisation, bus interface.
100 */
101static void amr_startup(void *arg);
102
103/*
104 * Command wrappers
105 */
106static int amr_query_controller(struct amr_softc *sc);
107static void *amr_enquiry(struct amr_softc *sc, size_t bufsize,
108 u_int8_t cmd, u_int8_t cmdsub, u_int8_t cmdqual);
109static void amr_completeio(struct amr_command *ac);
110static int amr_support_ext_cdb(struct amr_softc *sc);
111
112/*
113 * Command buffer allocation.
114 */
115static void amr_alloccmd_cluster(struct amr_softc *sc);
116static void amr_freecmd_cluster(struct amr_command_cluster *acc);
117
118/*
119 * Command processing.
120 */
121static int amr_bio_command(struct amr_softc *sc, struct amr_command **acp);
122static int amr_wait_command(struct amr_command *ac);
123static int amr_getslot(struct amr_command *ac);
124static void amr_mapcmd(struct amr_command *ac);
125static void amr_unmapcmd(struct amr_command *ac);
126static int amr_start(struct amr_command *ac);
127static void amr_complete(void *context, int pending);
128
129/*
130 * Status monitoring
131 */
132static void amr_periodic(void *data);
133
134/*
135 * Interface-specific shims
136 */
137static int amr_quartz_submit_command(struct amr_softc *sc);
138static int amr_quartz_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave);
139static int amr_quartz_poll_command(struct amr_command *ac);
140
141static int amr_std_submit_command(struct amr_softc *sc);
142static int amr_std_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave);
143static int amr_std_poll_command(struct amr_command *ac);
144static void amr_std_attach_mailbox(struct amr_softc *sc);
145
146#ifdef AMR_BOARD_INIT
147static int amr_quartz_init(struct amr_softc *sc);
148static int amr_std_init(struct amr_softc *sc);
149#endif
150
151/*
152 * Debugging
153 */
154static void amr_describe_controller(struct amr_softc *sc);
155#ifdef AMR_DEBUG
156#if 0
157static void amr_printcommand(struct amr_command *ac);
158#endif
159#endif
160
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161DECLARE_DUMMY_MODULE(amr);
162
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163/********************************************************************************
164 ********************************************************************************
165 Inline Glue
166 ********************************************************************************
167 ********************************************************************************/
168
169/********************************************************************************
170 ********************************************************************************
171 Public Interfaces
172 ********************************************************************************
173 ********************************************************************************/
174
175/********************************************************************************
176 * Initialise the controller and softc.
177 */
178int
179amr_attach(struct amr_softc *sc)
180{
181
182 debug_called(1);
183
184 /*
185 * Initialise per-controller queues.
186 */
187 TAILQ_INIT(&sc->amr_completed);
188 TAILQ_INIT(&sc->amr_freecmds);
189 TAILQ_INIT(&sc->amr_cmd_clusters);
190 TAILQ_INIT(&sc->amr_ready);
191 bioq_init(&sc->amr_bioq);
192
42cdd4ab 193#if defined(__FreeBSD__) && __FreeBSD_version >= 500005
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194 /*
195 * Initialise command-completion task.
196 */
197 TASK_INIT(&sc->amr_task_complete, 0, amr_complete, sc);
198#endif
199
200 debug(2, "queue init done");
201
202 /*
203 * Configure for this controller type.
204 */
205 if (AMR_IS_QUARTZ(sc)) {
206 sc->amr_submit_command = amr_quartz_submit_command;
207 sc->amr_get_work = amr_quartz_get_work;
208 sc->amr_poll_command = amr_quartz_poll_command;
209 } else {
210 sc->amr_submit_command = amr_std_submit_command;
211 sc->amr_get_work = amr_std_get_work;
212 sc->amr_poll_command = amr_std_poll_command;
fc6d0222 213 amr_std_attach_mailbox(sc);
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214 }
215
216#ifdef AMR_BOARD_INIT
217 if ((AMR_IS_QUARTZ(sc) ? amr_quartz_init(sc) : amr_std_init(sc))))
218 return(ENXIO);
219#endif
220
221 /*
222 * Quiz controller for features and limits.
223 */
224 if (amr_query_controller(sc))
225 return(ENXIO);
226
227 debug(2, "controller query complete");
228
229 /*
230 * Attach our 'real' SCSI channels to CAM.
231 */
232 if (amr_cam_attach(sc))
233 return(ENXIO);
234 debug(2, "CAM attach done");
235
236 /*
237 * Create the control device.
238 */
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239 dev_ops_add(&amr_ops, -1, device_get_unit(sc->amr_dev));
240 sc->amr_dev_t = make_dev(&amr_ops, device_get_unit(sc->amr_dev),
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241 UID_ROOT, GID_OPERATOR, S_IRUSR | S_IWUSR,
242 "amr%d", device_get_unit(sc->amr_dev));
984263bc 243 sc->amr_dev_t->si_drv1 = sc;
e4c9c0c8 244 reference_dev(sc->amr_dev_t);
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245
246 /*
247 * Schedule ourselves to bring the controller up once interrupts are
248 * available.
249 */
250 bzero(&sc->amr_ich, sizeof(struct intr_config_hook));
251 sc->amr_ich.ich_func = amr_startup;
252 sc->amr_ich.ich_arg = sc;
a1e26a0c 253 sc->amr_ich.ich_desc = "amr";
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254 if (config_intrhook_establish(&sc->amr_ich) != 0) {
255 device_printf(sc->amr_dev, "can't establish configuration hook\n");
256 return(ENOMEM);
257 }
258
259 /*
260 * Print a little information about the controller.
261 */
262 amr_describe_controller(sc);
263
264 debug(2, "attach complete");
265 return(0);
266}
267
268/********************************************************************************
269 * Locate disk resources and attach children to them.
270 */
271static void
272amr_startup(void *arg)
273{
274 struct amr_softc *sc = (struct amr_softc *)arg;
275 struct amr_logdrive *dr;
276 int i, error;
277
278 debug_called(1);
0cdb68f0 279 callout_init(&sc->amr_timeout);
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280
281 /* pull ourselves off the intrhook chain */
282 config_intrhook_disestablish(&sc->amr_ich);
283
284 /* get up-to-date drive information */
285 if (amr_query_controller(sc)) {
286 device_printf(sc->amr_dev, "can't scan controller for drives\n");
287 return;
288 }
289
290 /* iterate over available drives */
291 for (i = 0, dr = &sc->amr_drive[0]; (i < AMR_MAXLD) && (dr->al_size != 0xffffffff); i++, dr++) {
292 /* are we already attached to this drive? */
293 if (dr->al_disk == 0) {
294 /* generate geometry information */
295 if (dr->al_size > 0x200000) { /* extended translation? */
296 dr->al_heads = 255;
297 dr->al_sectors = 63;
298 } else {
299 dr->al_heads = 64;
300 dr->al_sectors = 32;
301 }
302 dr->al_cylinders = dr->al_size / (dr->al_heads * dr->al_sectors);
303
304 dr->al_disk = device_add_child(sc->amr_dev, NULL, -1);
305 if (dr->al_disk == 0)
306 device_printf(sc->amr_dev, "device_add_child failed\n");
307 device_set_ivars(dr->al_disk, dr);
308 }
309 }
310
311 if ((error = bus_generic_attach(sc->amr_dev)) != 0)
312 device_printf(sc->amr_dev, "bus_generic_attach returned %d\n", error);
313
314 /* mark controller back up */
315 sc->amr_state &= ~AMR_STATE_SHUTDOWN;
316
317 /* interrupts will be enabled before we do anything more */
318 sc->amr_state |= AMR_STATE_INTEN;
319
320 /*
321 * Start the timeout routine.
322 */
9087698d 323/* callout_reset(&sc->amr_timeout, hz, amr_periodic, sc); */
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324
325 return;
326}
327
328/*******************************************************************************
329 * Free resources associated with a controller instance
330 */
331void
332amr_free(struct amr_softc *sc)
333{
334 struct amr_command_cluster *acc;
335
336 /* detach from CAM */
337 amr_cam_detach(sc);
338
339 /* cancel status timeout */
0cdb68f0 340 callout_stop(&sc->amr_timeout);
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341
342 /* throw away any command buffers */
343 while ((acc = TAILQ_FIRST(&sc->amr_cmd_clusters)) != NULL) {
344 TAILQ_REMOVE(&sc->amr_cmd_clusters, acc, acc_link);
345 amr_freecmd_cluster(acc);
346 }
347
348 /* destroy control device */
b13267a5 349 if( sc->amr_dev_t != (cdev_t)NULL)
984263bc 350 destroy_dev(sc->amr_dev_t);
fef8985e 351 dev_ops_remove(&amr_ops, -1, device_get_unit(sc->amr_dev));
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352}
353
354/*******************************************************************************
355 * Receive a bio structure from a child device and queue it on a particular
356 * disk resource, then poke the disk resource to start as much work as it can.
357 */
358int
359amr_submit_bio(struct amr_softc *sc, struct bio *bio)
360{
361 debug_called(2);
362
363 amr_enqueue_bio(sc, bio);
364 amr_startio(sc);
365 return(0);
366}
367
368/********************************************************************************
369 * Accept an open operation on the control device.
370 */
371static int
fef8985e 372amr_open(struct dev_open_args *ap)
984263bc 373{
b13267a5 374 cdev_t dev = ap->a_head.a_dev;
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375 int unit = minor(dev);
376 struct amr_softc *sc = devclass_get_softc(devclass_find("amr"), unit);
377
378 debug_called(1);
379
380 sc->amr_state |= AMR_STATE_OPEN;
381 return(0);
382}
383
384/********************************************************************************
385 * Accept the last close on the control device.
386 */
387static int
fef8985e 388amr_close(struct dev_close_args *ap)
984263bc 389{
b13267a5 390 cdev_t dev = ap->a_head.a_dev;
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391 int unit = minor(dev);
392 struct amr_softc *sc = devclass_get_softc(devclass_find("amr"), unit);
393
394 debug_called(1);
395
396 sc->amr_state &= ~AMR_STATE_OPEN;
397 return (0);
398}
399
400/********************************************************************************
401 * Handle controller-specific control operations.
402 */
403static int
fef8985e 404amr_ioctl(struct dev_ioctl_args *ap)
984263bc 405{
b13267a5 406 cdev_t dev = ap->a_head.a_dev;
984263bc 407 struct amr_softc *sc = (struct amr_softc *)dev->si_drv1;
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408 int *arg = (int *)ap->a_data;
409 struct amr_user_ioctl *au = (struct amr_user_ioctl *)ap->a_data;
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410 struct amr_command *ac;
411 struct amr_mailbox_ioctl *mbi;
fef8985e 412 struct amr_passthrough *apt;
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413 void *dp;
414 int error;
415
416 debug_called(1);
417
418 error = 0;
419 dp = NULL;
fef8985e 420 apt = NULL;
984263bc 421 ac = NULL;
fef8985e 422 switch(ap->a_cmd) {
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423
424 case AMR_IO_VERSION:
425 debug(1, "AMR_IO_VERSION");
426 *arg = AMR_IO_VERSION_NUMBER;
427 break;
428
429 case AMR_IO_COMMAND:
430 debug(1, "AMR_IO_COMMAND 0x%x", au->au_cmd[0]);
431 /* handle inbound data buffer */
432 if (au->au_length != 0) {
978400d3 433 dp = kmalloc(au->au_length, M_DEVBUF, M_WAITOK);
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434 if ((error = copyin(au->au_buffer, dp, au->au_length)) != 0)
435 break;
436 debug(2, "copyin %ld bytes from %p -> %p", au->au_length, au->au_buffer, dp);
437 }
438
439 if ((ac = amr_alloccmd(sc)) == NULL) {
440 error = ENOMEM;
441 break;
442 }
443
444 /* handle SCSI passthrough command */
445 if (au->au_cmd[0] == AMR_CMD_PASS) {
978400d3 446 apt = kmalloc(sizeof(*apt), M_DEVBUF, M_WAITOK | M_ZERO);
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447
448 /* copy cdb */
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449 apt->ap_cdb_length = au->au_cmd[2];
450 bcopy(&au->au_cmd[3], &apt->ap_cdb[0], apt->ap_cdb_length);
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451
452 /* build passthrough */
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453 apt->ap_timeout = au->au_cmd[apt->ap_cdb_length + 3] & 0x07;
454 apt->ap_ars = (au->au_cmd[apt->ap_cdb_length + 3] & 0x08) ? 1 : 0;
455 apt->ap_islogical = (au->au_cmd[apt->ap_cdb_length + 3] & 0x80) ? 1 : 0;
456 apt->ap_logical_drive_no = au->au_cmd[apt->ap_cdb_length + 4];
457 apt->ap_channel = au->au_cmd[apt->ap_cdb_length + 5];
458 apt->ap_scsi_id = au->au_cmd[apt->ap_cdb_length + 6];
459 apt->ap_request_sense_length = 14;
460 apt->ap_data_transfer_length = au->au_length;
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461 /* XXX what about the request-sense area? does the caller want it? */
462
463 /* build command */
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464 ac->ac_data = apt;
465 ac->ac_length = sizeof(*apt);
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466 ac->ac_flags |= AMR_CMD_DATAOUT;
467 ac->ac_ccb_data = dp;
468 ac->ac_ccb_length = au->au_length;
469 if (au->au_direction & AMR_IO_READ)
470 ac->ac_flags |= AMR_CMD_CCB_DATAIN;
471 if (au->au_direction & AMR_IO_WRITE)
472 ac->ac_flags |= AMR_CMD_CCB_DATAOUT;
473
474 ac->ac_mailbox.mb_command = AMR_CMD_PASS;
475
476 } else {
477 /* direct command to controller */
478 mbi = (struct amr_mailbox_ioctl *)&ac->ac_mailbox;
479
480 /* copy pertinent mailbox items */
481 mbi->mb_command = au->au_cmd[0];
482 mbi->mb_channel = au->au_cmd[1];
483 mbi->mb_param = au->au_cmd[2];
484 mbi->mb_pad[0] = au->au_cmd[3];
485 mbi->mb_drive = au->au_cmd[4];
486
487 /* build the command */
488 ac->ac_data = dp;
489 ac->ac_length = au->au_length;
490 if (au->au_direction & AMR_IO_READ)
491 ac->ac_flags |= AMR_CMD_DATAIN;
492 if (au->au_direction & AMR_IO_WRITE)
493 ac->ac_flags |= AMR_CMD_DATAOUT;
494 }
495
496 /* run the command */
497 if ((error = amr_wait_command(ac)) != 0)
498 break;
499
500 /* copy out data and set status */
501 if (au->au_length != 0)
502 error = copyout(dp, au->au_buffer, au->au_length);
503 debug(2, "copyout %ld bytes from %p -> %p", au->au_length, dp, au->au_buffer);
504 if (dp != NULL)
505 debug(2, "%16d", (int)dp);
506 au->au_status = ac->ac_status;
507 break;
508
509 default:
510 debug(1, "unknown ioctl 0x%lx", cmd);
511 error = ENOIOCTL;
512 break;
513 }
514
515 if (dp != NULL)
efda3bd0 516 kfree(dp, M_DEVBUF);
fef8985e 517 if (apt != NULL)
efda3bd0 518 kfree(apt, M_DEVBUF);
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519 if (ac != NULL)
520 amr_releasecmd(ac);
521 return(error);
522}
523
524/********************************************************************************
525 ********************************************************************************
526 Status Monitoring
527 ********************************************************************************
528 ********************************************************************************/
529
530/********************************************************************************
531 * Perform a periodic check of the controller status
532 */
533static void
534amr_periodic(void *data)
535{
536 struct amr_softc *sc = (struct amr_softc *)data;
537
538 debug_called(2);
539
540 /* XXX perform periodic status checks here */
541
542 /* compensate for missed interrupts */
543 amr_done(sc);
544
545 /* reschedule */
0cdb68f0 546 callout_reset(&sc->amr_timeout, hz, amr_periodic, sc);
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547}
548
549/********************************************************************************
550 ********************************************************************************
551 Command Wrappers
552 ********************************************************************************
553 ********************************************************************************/
554
555/********************************************************************************
556 * Interrogate the controller for the operational parameters we require.
557 */
558static int
559amr_query_controller(struct amr_softc *sc)
560{
561 struct amr_enquiry3 *aex;
562 struct amr_prodinfo *ap;
563 struct amr_enquiry *ae;
564 int ldrv;
565
566 /*
567 * If we haven't found the real limit yet, let us have a couple of commands in
568 * order to be able to probe.
569 */
570 if (sc->amr_maxio == 0)
571 sc->amr_maxio = 2;
572
573 /*
574 * Greater than 10 byte cdb support
575 */
576 sc->support_ext_cdb = amr_support_ext_cdb(sc);
577
578 if(sc->support_ext_cdb) {
579 debug(2,"supports extended CDBs.");
580 }
581
582 /*
583 * Try to issue an ENQUIRY3 command
584 */
585 if ((aex = amr_enquiry(sc, 2048, AMR_CMD_CONFIG, AMR_CONFIG_ENQ3,
586 AMR_CONFIG_ENQ3_SOLICITED_FULL)) != NULL) {
587
588 /*
589 * Fetch current state of logical drives.
590 */
591 for (ldrv = 0; ldrv < aex->ae_numldrives; ldrv++) {
592 sc->amr_drive[ldrv].al_size = aex->ae_drivesize[ldrv];
593 sc->amr_drive[ldrv].al_state = aex->ae_drivestate[ldrv];
594 sc->amr_drive[ldrv].al_properties = aex->ae_driveprop[ldrv];
595 debug(2, " drive %d: %d state %x properties %x\n", ldrv, sc->amr_drive[ldrv].al_size,
596 sc->amr_drive[ldrv].al_state, sc->amr_drive[ldrv].al_properties);
597 }
efda3bd0 598 kfree(aex, M_DEVBUF);
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599
600 /*
601 * Get product info for channel count.
602 */
603 if ((ap = amr_enquiry(sc, 2048, AMR_CMD_CONFIG, AMR_CONFIG_PRODUCT_INFO, 0)) == NULL) {
604 device_printf(sc->amr_dev, "can't obtain product data from controller\n");
605 return(1);
606 }
607 sc->amr_maxdrives = 40;
608 sc->amr_maxchan = ap->ap_nschan;
609 sc->amr_maxio = ap->ap_maxio;
610 sc->amr_type |= AMR_TYPE_40LD;
efda3bd0 611 kfree(ap, M_DEVBUF);
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612
613 } else {
614
615 /* failed, try the 8LD ENQUIRY commands */
616 if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_EXT_ENQUIRY2, 0, 0)) == NULL) {
617 if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_ENQUIRY, 0, 0)) == NULL) {
618 device_printf(sc->amr_dev, "can't obtain configuration data from controller\n");
619 return(1);
620 }
621 ae->ae_signature = 0;
622 }
623
624 /*
625 * Fetch current state of logical drives.
626 */
627 for (ldrv = 0; ldrv < ae->ae_ldrv.al_numdrives; ldrv++) {
628 sc->amr_drive[ldrv].al_size = ae->ae_ldrv.al_size[ldrv];
629 sc->amr_drive[ldrv].al_state = ae->ae_ldrv.al_state[ldrv];
630 sc->amr_drive[ldrv].al_properties = ae->ae_ldrv.al_properties[ldrv];
631 debug(2, " drive %d: %d state %x properties %x\n", ldrv, sc->amr_drive[ldrv].al_size,
632 sc->amr_drive[ldrv].al_state, sc->amr_drive[ldrv].al_properties);
633 }
634
635 sc->amr_maxdrives = 8;
636 sc->amr_maxchan = ae->ae_adapter.aa_channels;
637 sc->amr_maxio = ae->ae_adapter.aa_maxio;
efda3bd0 638 kfree(ae, M_DEVBUF);
984263bc
MD
639 }
640
641 /*
642 * Mark remaining drives as unused.
643 */
644 for (; ldrv < AMR_MAXLD; ldrv++)
645 sc->amr_drive[ldrv].al_size = 0xffffffff;
646
647 /*
648 * Cap the maximum number of outstanding I/Os. AMI's Linux driver doesn't trust
649 * the controller's reported value, and lockups have been seen when we do.
650 */
651 sc->amr_maxio = imin(sc->amr_maxio, AMR_LIMITCMD);
652
653 return(0);
654}
655
656/********************************************************************************
657 * Run a generic enquiry-style command.
658 */
659static void *
660amr_enquiry(struct amr_softc *sc, size_t bufsize, u_int8_t cmd, u_int8_t cmdsub, u_int8_t cmdqual)
661{
662 struct amr_command *ac;
663 void *result;
664 u_int8_t *mbox;
665 int error;
666
667 debug_called(1);
668
669 error = 1;
670 result = NULL;
671
672 /* get ourselves a command buffer */
673 if ((ac = amr_alloccmd(sc)) == NULL)
674 goto out;
675 /* allocate the response structure */
efda3bd0 676 result = kmalloc(bufsize, M_DEVBUF, M_INTWAIT);
984263bc
MD
677 /* set command flags */
678 ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAOUT;
679
680 /* point the command at our data */
681 ac->ac_data = result;
682 ac->ac_length = bufsize;
683
684 /* build the command proper */
685 mbox = (u_int8_t *)&ac->ac_mailbox; /* XXX want a real structure for this? */
686 mbox[0] = cmd;
687 mbox[2] = cmdsub;
688 mbox[3] = cmdqual;
689
690 /* can't assume that interrupts are going to work here, so play it safe */
691 if (sc->amr_poll_command(ac))
692 goto out;
693 error = ac->ac_status;
694
695 out:
696 if (ac != NULL)
697 amr_releasecmd(ac);
698 if ((error != 0) && (result != NULL)) {
efda3bd0 699 kfree(result, M_DEVBUF);
984263bc
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700 result = NULL;
701 }
702 return(result);
703}
704
705/********************************************************************************
706 * Flush the controller's internal cache, return status.
707 */
708int
709amr_flush(struct amr_softc *sc)
710{
711 struct amr_command *ac;
712 int error;
713
714 /* get ourselves a command buffer */
715 error = 1;
716 if ((ac = amr_alloccmd(sc)) == NULL)
717 goto out;
718 /* set command flags */
719 ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAOUT;
720
721 /* build the command proper */
722 ac->ac_mailbox.mb_command = AMR_CMD_FLUSH;
723
724 /* we have to poll, as the system may be going down or otherwise damaged */
725 if (sc->amr_poll_command(ac))
726 goto out;
727 error = ac->ac_status;
728
729 out:
730 if (ac != NULL)
731 amr_releasecmd(ac);
732 return(error);
733}
734
735/********************************************************************************
736 * Detect extented cdb >> greater than 10 byte cdb support
737 * returns '1' means this support exist
738 * returns '0' means this support doesn't exist
739 */
740static int
741amr_support_ext_cdb(struct amr_softc *sc)
742{
743 struct amr_command *ac;
744 u_int8_t *mbox;
745 int error;
746
747 /* get ourselves a command buffer */
748 error = 0;
749 if ((ac = amr_alloccmd(sc)) == NULL)
750 goto out;
751 /* set command flags */
752 ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAOUT;
753
754 /* build the command proper */
755 mbox = (u_int8_t *)&ac->ac_mailbox; /* XXX want a real structure for this? */
756 mbox[0] = 0xA4;
757 mbox[2] = 0x16;
758
759
760 /* we have to poll, as the system may be going down or otherwise damaged */
761 if (sc->amr_poll_command(ac))
762 goto out;
763 if( ac->ac_status == AMR_STATUS_SUCCESS ) {
764 error = 1;
765 }
766
767out:
768 if (ac != NULL)
769 amr_releasecmd(ac);
770 return(error);
771}
772
773/********************************************************************************
774 * Try to find I/O work for the controller from one or more of the work queues.
775 *
776 * We make the assumption that if the controller is not ready to take a command
777 * at some given time, it will generate an interrupt at some later time when
778 * it is.
779 */
780void
781amr_startio(struct amr_softc *sc)
782{
783 struct amr_command *ac;
784
785 /* spin until something prevents us from doing any work */
786 for (;;) {
787
788 /* try to get a ready command */
789 ac = amr_dequeue_ready(sc);
790
791 /* if that failed, build a command from a bio */
792 if (ac == NULL)
793 (void)amr_bio_command(sc, &ac);
794
795 /* if that failed, build a command from a ccb */
796 if (ac == NULL)
797 (void)amr_cam_command(sc, &ac);
798
799 /* if we don't have anything to do, give up */
800 if (ac == NULL)
801 break;
802
803 /* try to give the command to the controller; if this fails save it for later and give up */
804 if (amr_start(ac)) {
805 debug(2, "controller busy, command deferred");
806 amr_requeue_ready(ac); /* XXX schedule retry very soon? */
807 break;
808 }
809 }
810}
811
812/********************************************************************************
813 * Handle completion of an I/O command.
814 */
815static void
816amr_completeio(struct amr_command *ac)
817{
818 struct amr_softc *sc = ac->ac_sc;
819
820 if (ac->ac_status != AMR_STATUS_SUCCESS) { /* could be more verbose here? */
81b5c339
MD
821 ac->ac_bio->bio_buf->b_error = EIO;
822 ac->ac_bio->bio_buf->b_flags |= B_ERROR;
984263bc
MD
823
824 device_printf(sc->amr_dev, "I/O error - 0x%x\n", ac->ac_status);
825/* amr_printcommand(ac);*/
826 }
827 amrd_intr(ac->ac_bio);
828 amr_releasecmd(ac);
829}
830
831/********************************************************************************
832 ********************************************************************************
833 Command Processing
834 ********************************************************************************
835 ********************************************************************************/
836
837/********************************************************************************
838 * Convert a bio off the top of the bio queue into a command.
839 */
840static int
841amr_bio_command(struct amr_softc *sc, struct amr_command **acp)
842{
843 struct amr_command *ac;
844 struct amrd_softc *amrd;
845 struct bio *bio;
846 int error;
847 int blkcount;
848 int driveno;
849 int cmd;
e0fc5693 850 u_int64_t lba;
984263bc
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851
852 ac = NULL;
853 error = 0;
854
855 /* get a bio to work on */
856 if ((bio = amr_dequeue_bio(sc)) == NULL)
857 goto out;
858
859 /* get a command */
860 if ((ac = amr_alloccmd(sc)) == NULL) {
861 error = ENOMEM;
862 goto out;
863 }
864
865 /* connect the bio to the command */
866 ac->ac_complete = amr_completeio;
867 ac->ac_bio = bio;
81b5c339
MD
868 ac->ac_data = bio->bio_buf->b_data;
869 ac->ac_length = bio->bio_buf->b_bcount;
b106cb48 870
d0600478 871 switch (bio->bio_buf->b_cmd) {
b106cb48 872 case BUF_CMD_READ:
984263bc
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873 ac->ac_flags |= AMR_CMD_DATAIN;
874 cmd = AMR_CMD_LREAD;
b106cb48
MD
875 break;
876 case BUF_CMD_WRITE:
984263bc
MD
877 ac->ac_flags |= AMR_CMD_DATAOUT;
878 cmd = AMR_CMD_LWRITE;
b106cb48
MD
879 break;
880 case BUF_CMD_FLUSH:
881 ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAOUT;
882 cmd = AMR_CMD_FLUSH;
883 break;
d0600478
SW
884 default:
885 cmd = 0;
886 break;
984263bc 887 }
81b5c339 888 amrd = (struct amrd_softc *)bio->bio_driver_info;
984263bc 889 driveno = amrd->amrd_drive - sc->amr_drive;
81b5c339 890 blkcount = (bio->bio_buf->b_bcount + AMR_BLKSIZE - 1) / AMR_BLKSIZE;
b106cb48 891
54078292 892 lba = bio->bio_offset / AMR_BLKSIZE;
e0fc5693 893 KKASSERT(lba < 0x100000000ULL);
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894
895 ac->ac_mailbox.mb_command = cmd;
896 ac->ac_mailbox.mb_blkcount = blkcount;
54078292 897 ac->ac_mailbox.mb_lba = lba;
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898 ac->ac_mailbox.mb_drive = driveno;
899 /* we fill in the s/g related data when the command is mapped */
900
54078292 901 if ((lba + blkcount) > sc->amr_drive[driveno].al_size)
e0fc5693 902 device_printf(sc->amr_dev, "I/O beyond end of unit (%lld,%d > %lu)\n",
54078292 903 lba, blkcount,
984263bc
MD
904 (u_long)sc->amr_drive[driveno].al_size);
905
906out:
907 if (error != 0) {
908 if (ac != NULL)
909 amr_releasecmd(ac);
910 if (bio != NULL) /* this breaks ordering... */
911 amr_enqueue_bio(sc, bio);
912 }
913 *acp = ac;
914 return(error);
915}
916
917/********************************************************************************
918 * Take a command, submit it to the controller and sleep until it completes
919 * or fails. Interrupts must be enabled, returns nonzero on error.
920 */
921static int
922amr_wait_command(struct amr_command *ac)
923{
924 int error, count;
925
926 debug_called(1);
927
928 ac->ac_complete = NULL;
929 ac->ac_flags |= AMR_CMD_SLEEP;
930 if ((error = amr_start(ac)) != 0)
931 return(error);
932
933 count = 0;
934 /* XXX better timeout? */
935 while ((ac->ac_flags & AMR_CMD_BUSY) && (count < 30)) {
377d4740 936 tsleep(ac, PCATCH, "amrwcmd", hz);
984263bc
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937 }
938 return(0);
939}
940
941/********************************************************************************
942 * Take a command, submit it to the controller and busy-wait for it to return.
943 * Returns nonzero on error. Can be safely called with interrupts enabled.
944 */
945static int
946amr_std_poll_command(struct amr_command *ac)
947{
948 struct amr_softc *sc = ac->ac_sc;
949 int error, count;
950
951 debug_called(2);
952
953 ac->ac_complete = NULL;
954 if ((error = amr_start(ac)) != 0)
955 return(error);
956
957 count = 0;
958 do {
959 /*
960 * Poll for completion, although the interrupt handler may beat us to it.
961 * Note that the timeout here is somewhat arbitrary.
962 */
963 amr_done(sc);
964 DELAY(1000);
965 } while ((ac->ac_flags & AMR_CMD_BUSY) && (count++ < 1000));
966 if (!(ac->ac_flags & AMR_CMD_BUSY)) {
967 error = 0;
968 } else {
969 /* XXX the slot is now marked permanently busy */
970 error = EIO;
971 device_printf(sc->amr_dev, "polled command timeout\n");
972 }
973 return(error);
974}
975
976/********************************************************************************
977 * Take a command, submit it to the controller and busy-wait for it to return.
978 * Returns nonzero on error. Can be safely called with interrupts enabled.
979 */
980static int
981amr_quartz_poll_command(struct amr_command *ac)
982{
983 struct amr_softc *sc = ac->ac_sc;
984263bc
MD
984 int error,count;
985
986 debug_called(2);
987
988 /* now we have a slot, we can map the command (unmapped in amr_complete) */
989 amr_mapcmd(ac);
990
7f2216bc 991 crit_enter();
984263bc 992
510931cd
HP
993 if (sc->amr_state & AMR_STATE_INTEN) {
994 count=0;
995 while (sc->amr_busyslots) {
996 tsleep(sc, PCATCH, "amrpoll", hz);
997 if(count++>10) {
998 break;
999 }
1000 }
1001
1002 if(sc->amr_busyslots) {
1003 device_printf(sc->amr_dev, "adapter is busy\n");
7f2216bc 1004 crit_exit();
510931cd
HP
1005 amr_unmapcmd(ac);
1006 ac->ac_status=0;
1007 return(1);
1008 }
984263bc
MD
1009 }
1010
1011 bcopy(&ac->ac_mailbox, (void *)(uintptr_t)(volatile void *)sc->amr_mailbox, AMR_MBOX_CMDSIZE);
1012
1013 /* clear the poll/ack fields in the mailbox */
1014 sc->amr_mailbox->mb_ident = 0xFE;
1015 sc->amr_mailbox->mb_nstatus = 0xFF;
1016 sc->amr_mailbox->mb_status = 0xFF;
1017 sc->amr_mailbox->mb_poll = 0;
1018 sc->amr_mailbox->mb_ack = 0;
1019 sc->amr_mailbox->mb_busy = 1;
1020
1021 AMR_QPUT_IDB(sc, sc->amr_mailboxphys | AMR_QIDB_SUBMIT);
1022
1023 while(sc->amr_mailbox->mb_nstatus == 0xFF);
1024 while(sc->amr_mailbox->mb_status == 0xFF);
1025 ac->ac_status=sc->amr_mailbox->mb_status;
1026 error = (ac->ac_status !=AMR_STATUS_SUCCESS) ? 1:0;
1027 while(sc->amr_mailbox->mb_poll != 0x77);
1028 sc->amr_mailbox->mb_poll = 0;
1029 sc->amr_mailbox->mb_ack = 0x77;
1030
1031 /* acknowledge that we have the commands */
1032 AMR_QPUT_IDB(sc, sc->amr_mailboxphys | AMR_QIDB_ACK);
1033 while(AMR_QGET_IDB(sc) & AMR_QIDB_ACK);
1034
7f2216bc 1035 crit_exit();
984263bc
MD
1036
1037 /* unmap the command's data buffer */
1038 amr_unmapcmd(ac);
1039
1040 return(error);
1041}
1042
1043/********************************************************************************
1044 * Get a free command slot for a command if it doesn't already have one.
1045 *
1046 * May be safely called multiple times for a given command.
1047 */
1048static int
1049amr_getslot(struct amr_command *ac)
1050{
1051 struct amr_softc *sc = ac->ac_sc;
7f2216bc 1052 int slot, limit, error;
984263bc
MD
1053
1054 debug_called(3);
1055
1056 /* if the command already has a slot, don't try to give it another one */
1057 if (ac->ac_slot != 0)
1058 return(0);
1059
1060 /* enforce slot usage limit */
1061 limit = (ac->ac_flags & AMR_CMD_PRIORITY) ? sc->amr_maxio : sc->amr_maxio - 4;
1062 if (sc->amr_busyslots > limit)
1063 return(EBUSY);
1064
1065 /*
1066 * Allocate a slot. XXX linear scan is slow
1067 */
1068 error = EBUSY;
7f2216bc 1069 crit_enter();
984263bc
MD
1070 for (slot = 0; slot < sc->amr_maxio; slot++) {
1071 if (sc->amr_busycmd[slot] == NULL) {
1072 sc->amr_busycmd[slot] = ac;
1073 sc->amr_busyslots++;
1074 ac->ac_slot = slot;
1075 error = 0;
1076 break;
1077 }
1078 }
7f2216bc 1079 crit_exit();
984263bc
MD
1080
1081 return(error);
1082}
1083
1084/********************************************************************************
1085 * Map/unmap (ac)'s data in the controller's addressable space as required.
1086 *
1087 * These functions may be safely called multiple times on a given command.
1088 */
1089static void
1090amr_setup_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments, int error)
1091{
1092 struct amr_command *ac = (struct amr_command *)arg;
1093 struct amr_softc *sc = ac->ac_sc;
1094 struct amr_sgentry *sg;
1095 int i;
1096 u_int8_t *sgc;
1097
1098 debug_called(3);
1099
1100 /* get base address of s/g table */
1101 sg = sc->amr_sgtable + (ac->ac_slot * AMR_NSEG);
1102
1103 /* save data physical address */
1104 ac->ac_dataphys = segs[0].ds_addr;
1105
1106 /* for AMR_CMD_CONFIG the s/g count goes elsewhere */
1107 if (ac->ac_mailbox.mb_command == AMR_CMD_CONFIG) {
1108 sgc = &(((struct amr_mailbox_ioctl *)&ac->ac_mailbox)->mb_param);
1109 } else {
1110 sgc = &ac->ac_mailbox.mb_nsgelem;
1111 }
1112
1113 /* decide whether we need to populate the s/g table */
1114 if (nsegments < 2) {
1115 *sgc = 0;
1116 ac->ac_mailbox.mb_nsgelem = 0;
1117 ac->ac_mailbox.mb_physaddr = ac->ac_dataphys;
1118 } else {
1119 ac->ac_mailbox.mb_nsgelem = nsegments;
1120 *sgc = nsegments;
1121 ac->ac_mailbox.mb_physaddr = sc->amr_sgbusaddr + (ac->ac_slot * AMR_NSEG * sizeof(struct amr_sgentry));
1122 for (i = 0; i < nsegments; i++, sg++) {
1123 sg->sg_addr = segs[i].ds_addr;
1124 sg->sg_count = segs[i].ds_len;
1125 }
1126 }
1127}
1128
1129static void
1130amr_setup_ccbmap(void *arg, bus_dma_segment_t *segs, int nsegments, int error)
1131{
1132 struct amr_command *ac = (struct amr_command *)arg;
1133 struct amr_softc *sc = ac->ac_sc;
1134 struct amr_sgentry *sg;
1135 struct amr_passthrough *ap = (struct amr_passthrough *)ac->ac_data;
1136 struct amr_ext_passthrough *aep = (struct amr_ext_passthrough *)ac->ac_data;
1137 int i;
1138
1139 /* get base address of s/g table */
1140 sg = sc->amr_sgtable + (ac->ac_slot * AMR_NSEG);
1141
1142 /* decide whether we need to populate the s/g table */
1143 if( ac->ac_mailbox.mb_command == AMR_CMD_EXTPASS ) {
1144 if (nsegments < 2) {
1145 aep->ap_no_sg_elements = 0;
1146 aep->ap_data_transfer_address = segs[0].ds_addr;
1147 } else {
1148 /* save s/g table information in passthrough */
1149 aep->ap_no_sg_elements = nsegments;
1150 aep->ap_data_transfer_address = sc->amr_sgbusaddr + (ac->ac_slot * AMR_NSEG * sizeof(struct amr_sgentry));
1151 /* populate s/g table (overwrites previous call which mapped the passthrough) */
1152 for (i = 0; i < nsegments; i++, sg++) {
1153 sg->sg_addr = segs[i].ds_addr;
1154 sg->sg_count = segs[i].ds_len;
1155 debug(3, " %d: 0x%x/%d", i, sg->sg_addr, sg->sg_count);
1156 }
1157 }
1158 debug(3, "slot %d %d segments at 0x%x, passthrough at 0x%x", ac->ac_slot,
1159 aep->ap_no_sg_elements, aep->ap_data_transfer_address, ac->ac_dataphys);
1160 } else {
1161 if (nsegments < 2) {
1162 ap->ap_no_sg_elements = 0;
1163 ap->ap_data_transfer_address = segs[0].ds_addr;
1164 } else {
1165 /* save s/g table information in passthrough */
1166 ap->ap_no_sg_elements = nsegments;
1167 ap->ap_data_transfer_address = sc->amr_sgbusaddr + (ac->ac_slot * AMR_NSEG * sizeof(struct amr_sgentry));
1168 /* populate s/g table (overwrites previous call which mapped the passthrough) */
1169 for (i = 0; i < nsegments; i++, sg++) {
1170 sg->sg_addr = segs[i].ds_addr;
1171 sg->sg_count = segs[i].ds_len;
1172 debug(3, " %d: 0x%x/%d", i, sg->sg_addr, sg->sg_count);
1173 }
1174 }
1175 debug(3, "slot %d %d segments at 0x%x, passthrough at 0x%x", ac->ac_slot,
1176 ap->ap_no_sg_elements, ap->ap_data_transfer_address, ac->ac_dataphys);
1177 }
1178}
1179
1180static void
1181amr_mapcmd(struct amr_command *ac)
1182{
1183 struct amr_softc *sc = ac->ac_sc;
1184
1185 debug_called(3);
1186
1187 /* if the command involves data at all, and hasn't been mapped */
1188 if (!(ac->ac_flags & AMR_CMD_MAPPED)) {
1189
1190 if (ac->ac_data != NULL) {
1191 /* map the data buffers into bus space and build the s/g list */
1192 bus_dmamap_load(sc->amr_buffer_dmat, ac->ac_dmamap, ac->ac_data, ac->ac_length,
1193 amr_setup_dmamap, ac, 0);
1194 if (ac->ac_flags & AMR_CMD_DATAIN)
1195 bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_dmamap, BUS_DMASYNC_PREREAD);
1196 if (ac->ac_flags & AMR_CMD_DATAOUT)
1197 bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_dmamap, BUS_DMASYNC_PREWRITE);
1198 }
1199
1200 if (ac->ac_ccb_data != NULL) {
1201 bus_dmamap_load(sc->amr_buffer_dmat, ac->ac_ccb_dmamap, ac->ac_ccb_data, ac->ac_ccb_length,
1202 amr_setup_ccbmap, ac, 0);
1203 if (ac->ac_flags & AMR_CMD_CCB_DATAIN)
1204 bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_ccb_dmamap, BUS_DMASYNC_PREREAD);
1205 if (ac->ac_flags & AMR_CMD_CCB_DATAOUT)
1206 bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_ccb_dmamap, BUS_DMASYNC_PREWRITE);
1207 }
1208 ac->ac_flags |= AMR_CMD_MAPPED;
1209 }
1210}
1211
1212static void
1213amr_unmapcmd(struct amr_command *ac)
1214{
1215 struct amr_softc *sc = ac->ac_sc;
1216
1217 debug_called(3);
1218
1219 /* if the command involved data at all and was mapped */
1220 if (ac->ac_flags & AMR_CMD_MAPPED) {
1221
1222 if (ac->ac_data != NULL) {
1223 if (ac->ac_flags & AMR_CMD_DATAIN)
1224 bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_dmamap, BUS_DMASYNC_POSTREAD);
1225 if (ac->ac_flags & AMR_CMD_DATAOUT)
1226 bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_dmamap, BUS_DMASYNC_POSTWRITE);
1227 bus_dmamap_unload(sc->amr_buffer_dmat, ac->ac_dmamap);
1228 }
1229
1230 if (ac->ac_ccb_data != NULL) {
1231 if (ac->ac_flags & AMR_CMD_CCB_DATAIN)
1232 bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_ccb_dmamap, BUS_DMASYNC_POSTREAD);
1233 if (ac->ac_flags & AMR_CMD_CCB_DATAOUT)
1234 bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_ccb_dmamap, BUS_DMASYNC_POSTWRITE);
1235 bus_dmamap_unload(sc->amr_buffer_dmat, ac->ac_ccb_dmamap);
1236 }
1237 ac->ac_flags &= ~AMR_CMD_MAPPED;
1238 }
1239}
1240
1241/********************************************************************************
1242 * Take a command and give it to the controller, returns 0 if successful, or
1243 * EBUSY if the command should be retried later.
1244 */
1245static int
1246amr_start(struct amr_command *ac)
1247{
1248 struct amr_softc *sc = ac->ac_sc;
7f2216bc 1249 int done, i;
984263bc
MD
1250
1251 debug_called(3);
1252
1253 /* mark command as busy so that polling consumer can tell */
1254 ac->ac_flags |= AMR_CMD_BUSY;
1255
1256 /* get a command slot (freed in amr_done) */
1257 if (amr_getslot(ac))
1258 return(EBUSY);
1259
1260 /* now we have a slot, we can map the command (unmapped in amr_complete) */
1261 amr_mapcmd(ac);
1262
1263 /* mark the new mailbox we are going to copy in as busy */
1264 ac->ac_mailbox.mb_busy = 1;
1265
1266 /* clear the poll/ack fields in the mailbox */
1267 sc->amr_mailbox->mb_poll = 0;
1268 sc->amr_mailbox->mb_ack = 0;
1269
1270 /*
1271 * Save the slot number so that we can locate this command when complete.
1272 * Note that ident = 0 seems to be special, so we don't use it.
1273 */
1274 ac->ac_mailbox.mb_ident = ac->ac_slot + 1;
1275
1276 /*
1277 * Spin waiting for the mailbox, give up after ~1 second. We expect the
1278 * controller to be able to handle our I/O.
1279 *
1280 * XXX perhaps we should wait for less time, and count on the deferred command
1281 * handling to deal with retries?
1282 */
1283 debug(4, "wait for mailbox");
1284 for (i = 10000, done = 0; (i > 0) && !done; i--) {
7f2216bc 1285 crit_enter();
984263bc
MD
1286
1287 /* is the mailbox free? */
1288 if (sc->amr_mailbox->mb_busy == 0) {
1289 debug(4, "got mailbox");
1290 sc->amr_mailbox64->mb64_segment = 0;
1291 bcopy(&ac->ac_mailbox, (void *)(uintptr_t)(volatile void *)sc->amr_mailbox, AMR_MBOX_CMDSIZE);
1292 done = 1;
1293
1294 /* not free, spin waiting */
1295 } else {
1296 debug(4, "busy flag %x\n", sc->amr_mailbox->mb_busy);
1297 /* this is somewhat ugly */
1298 DELAY(100);
1299 }
7f2216bc 1300 crit_exit();
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MD
1301 }
1302
1303 /*
1304 * Now give the command to the controller
1305 */
1306 if (done) {
1307 if (sc->amr_submit_command(sc)) {
1308 /* the controller wasn't ready to take the command, forget that we tried to post it */
1309 sc->amr_mailbox->mb_busy = 0;
1310 return(EBUSY);
1311 }
1312 debug(3, "posted command");
1313 return(0);
1314 }
1315
1316 /*
1317 * The controller wouldn't take the command. Return the command as busy
1318 * so that it is retried later.
1319 */
1320 return(EBUSY);
1321}
1322
1323/********************************************************************************
1324 * Extract one or more completed commands from the controller (sc)
1325 *
1326 * Returns nonzero if any commands on the work queue were marked as completed.
1327 */
1328int
1329amr_done(struct amr_softc *sc)
1330{
1331 struct amr_command *ac;
1332 struct amr_mailbox mbox;
1333 int i, idx, result;
1334
1335 debug_called(3);
1336
1337 /* See if there's anything for us to do */
1338 result = 0;
1339
1340 /* loop collecting completed commands */
1341 for (;;) {
1342 /* poll for a completed command's identifier and status */
1343 if (sc->amr_get_work(sc, &mbox)) {
1344 result = 1;
1345
1346 /* iterate over completed commands in this result */
1347 for (i = 0; i < mbox.mb_nstatus; i++) {
1348 /* get pointer to busy command */
1349 idx = mbox.mb_completed[i] - 1;
1350 ac = sc->amr_busycmd[idx];
1351
1352 /* really a busy command? */
1353 if (ac != NULL) {
1354
1355 /* pull the command from the busy index */
1356 sc->amr_busycmd[idx] = NULL;
1357 sc->amr_busyslots--;
1358
1359 /* save status for later use */
1360 ac->ac_status = mbox.mb_status;
1361 amr_enqueue_completed(ac);
1362 debug(3, "completed command with status %x", mbox.mb_status);
1363 } else {
1364 device_printf(sc->amr_dev, "bad slot %d completed\n", idx);
1365 }
1366 }
1367 } else {
1368 break; /* no work */
1369 }
1370 }
1371
1372 /* if we've completed any commands, try posting some more */
1373 if (result)
1374 amr_startio(sc);
1375
1376 /* handle completion and timeouts */
42cdd4ab 1377#if defined(__FreeBSD__) && __FreeBSD_version >= 500005
984263bc
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1378 if (sc->amr_state & AMR_STATE_INTEN)
1379 taskqueue_enqueue(taskqueue_swi, &sc->amr_task_complete);
1380 else
1381#endif
1382 amr_complete(sc, 0);
1383
1384 return(result);
1385}
1386
1387/********************************************************************************
1388 * Do completion processing on done commands on (sc)
1389 */
1390static void
1391amr_complete(void *context, int pending)
1392{
1393 struct amr_softc *sc = (struct amr_softc *)context;
1394 struct amr_command *ac;
1395
1396 debug_called(3);
1397
1398 /* pull completed commands off the queue */
1399 for (;;) {
1400 ac = amr_dequeue_completed(sc);
1401 if (ac == NULL)
1402 break;
1403
1404 /* unmap the command's data buffer */
1405 amr_unmapcmd(ac);
1406
1407 /* unbusy the command */
1408 ac->ac_flags &= ~AMR_CMD_BUSY;
1409
1410 /*
1411 * Is there a completion handler?
1412 */
1413 if (ac->ac_complete != NULL) {
1414 ac->ac_complete(ac);
1415
1416 /*
1417 * Is someone sleeping on this one?
1418 */
1419 } else if (ac->ac_flags & AMR_CMD_SLEEP) {
1420 wakeup(ac);
1421 }
1422
1423 if(!sc->amr_busyslots) {
1424 wakeup(sc);
1425 }
1426 }
1427}
1428
1429/********************************************************************************
1430 ********************************************************************************
1431 Command Buffer Management
1432 ********************************************************************************
1433 ********************************************************************************/
1434
1435/********************************************************************************
1436 * Get a new command buffer.
1437 *
1438 * This may return NULL in low-memory cases.
1439 *
1440 * If possible, we recycle a command buffer that's been used before.
1441 */
1442struct amr_command *
1443amr_alloccmd(struct amr_softc *sc)
1444{
1445 struct amr_command *ac;
1446
1447 debug_called(3);
1448
1449 ac = amr_dequeue_free(sc);
1450 if (ac == NULL) {
1451 amr_alloccmd_cluster(sc);
1452 ac = amr_dequeue_free(sc);
1453 }
1454 if (ac == NULL)
1455 return(NULL);
1456
1457 /* clear out significant fields */
1458 ac->ac_slot = 0;
1459 ac->ac_status = 0;
1460 bzero(&ac->ac_mailbox, sizeof(struct amr_mailbox));
1461 ac->ac_flags = 0;
1462 ac->ac_bio = NULL;
1463 ac->ac_data = NULL;
1464 ac->ac_ccb_data = NULL;
1465 ac->ac_complete = NULL;
1466 return(ac);
1467}
1468
1469/********************************************************************************
1470 * Release a command buffer for recycling.
1471 */
1472void
1473amr_releasecmd(struct amr_command *ac)
1474{
1475 debug_called(3);
1476
1477 amr_enqueue_free(ac);
1478}
1479
1480/********************************************************************************
1481 * Allocate a new command cluster and initialise it.
1482 */
1483static void
1484amr_alloccmd_cluster(struct amr_softc *sc)
1485{
1486 struct amr_command_cluster *acc;
1487 struct amr_command *ac;
7f2216bc 1488 int i;
984263bc 1489
efda3bd0 1490 acc = kmalloc(AMR_CMD_CLUSTERSIZE, M_DEVBUF, M_INTWAIT);
7f2216bc 1491 crit_enter();
076ae0ab 1492 TAILQ_INSERT_TAIL(&sc->amr_cmd_clusters, acc, acc_link);
7f2216bc 1493 crit_exit();
076ae0ab
MD
1494 for (i = 0; i < AMR_CMD_CLUSTERCOUNT; i++) {
1495 ac = &acc->acc_command[i];
1496 bzero(ac, sizeof(*ac));
1497 ac->ac_sc = sc;
1498 if (!bus_dmamap_create(sc->amr_buffer_dmat, 0, &ac->ac_dmamap) &&
1499 !bus_dmamap_create(sc->amr_buffer_dmat, 0, &ac->ac_ccb_dmamap))
1500 amr_releasecmd(ac);
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1501 }
1502}
1503
1504/********************************************************************************
1505 * Free a command cluster
1506 */
1507static void
1508amr_freecmd_cluster(struct amr_command_cluster *acc)
1509{
1510 struct amr_softc *sc = acc->acc_command[0].ac_sc;
1511 int i;
1512
1513 for (i = 0; i < AMR_CMD_CLUSTERCOUNT; i++)
1514 bus_dmamap_destroy(sc->amr_buffer_dmat, acc->acc_command[i].ac_dmamap);
efda3bd0 1515 kfree(acc, M_DEVBUF);
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MD
1516}
1517
1518/********************************************************************************
1519 ********************************************************************************
1520 Interface-specific Shims
1521 ********************************************************************************
1522 ********************************************************************************/
1523
1524/********************************************************************************
1525 * Tell the controller that the mailbox contains a valid command
1526 */
1527static int
1528amr_quartz_submit_command(struct amr_softc *sc)
1529{
1530 debug_called(3);
1531
1532 if (AMR_QGET_IDB(sc) & AMR_QIDB_SUBMIT)
1533 return(EBUSY);
1534 AMR_QPUT_IDB(sc, sc->amr_mailboxphys | AMR_QIDB_SUBMIT);
1535 return(0);
1536}
1537
1538static int
1539amr_std_submit_command(struct amr_softc *sc)
1540{
1541 debug_called(3);
1542
1543 if (AMR_SGET_MBSTAT(sc) & AMR_SMBOX_BUSYFLAG)
1544 return(EBUSY);
1545 AMR_SPOST_COMMAND(sc);
1546 return(0);
1547}
1548
1549/********************************************************************************
1550 * Claim any work that the controller has completed; acknowledge completion,
1551 * save details of the completion in (mbsave)
1552 */
1553static int
1554amr_quartz_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave)
1555{
7f2216bc 1556 int worked;
984263bc
MD
1557 u_int32_t outd;
1558
1559 debug_called(3);
1560
1561 worked = 0;
7f2216bc 1562 crit_enter();
984263bc
MD
1563
1564 /* work waiting for us? */
1565 if ((outd = AMR_QGET_ODB(sc)) == AMR_QODB_READY) {
1566
1567 /* save mailbox, which contains a list of completed commands */
1568 bcopy((void *)(uintptr_t)(volatile void *)sc->amr_mailbox, mbsave, sizeof(*mbsave));
1569
1570 /* acknowledge interrupt */
1571 AMR_QPUT_ODB(sc, AMR_QODB_READY);
1572
1573 /* acknowledge that we have the commands */
1574 AMR_QPUT_IDB(sc, sc->amr_mailboxphys | AMR_QIDB_ACK);
1575
1576#ifndef AMR_QUARTZ_GOFASTER
1577 /*
1578 * This waits for the controller to notice that we've taken the
1579 * command from it. It's very inefficient, and we shouldn't do it,
1580 * but if we remove this code, we stop completing commands under
1581 * load.
1582 *
1583 * Peter J says we shouldn't do this. The documentation says we
1584 * should. Who is right?
1585 */
1586 while(AMR_QGET_IDB(sc) & AMR_QIDB_ACK)
1587 ; /* XXX aiee! what if it dies? */
1588#endif
1589
1590 worked = 1; /* got some work */
1591 }
1592
7f2216bc 1593 crit_exit();
984263bc
MD
1594 return(worked);
1595}
1596
1597static int
1598amr_std_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave)
1599{
7f2216bc 1600 int worked;
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MD
1601 u_int8_t istat;
1602
1603 debug_called(3);
1604
1605 worked = 0;
7f2216bc 1606 crit_enter();
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MD
1607
1608 /* check for valid interrupt status */
1609 istat = AMR_SGET_ISTAT(sc);
1610 if ((istat & AMR_SINTR_VALID) != 0) {
1611 AMR_SPUT_ISTAT(sc, istat); /* ack interrupt status */
1612
1613 /* save mailbox, which contains a list of completed commands */
1614 bcopy((void *)(uintptr_t)(volatile void *)sc->amr_mailbox, mbsave, sizeof(*mbsave));
1615
1616 AMR_SACK_INTERRUPT(sc); /* acknowledge we have the mailbox */
1617 worked = 1;
1618 }
1619
7f2216bc 1620 crit_exit();
984263bc
MD
1621 return(worked);
1622}
1623
1624/********************************************************************************
1625 * Notify the controller of the mailbox location.
1626 */
1627static void
1628amr_std_attach_mailbox(struct amr_softc *sc)
1629{
1630
1631 /* program the mailbox physical address */
1632 AMR_SBYTE_SET(sc, AMR_SMBOX_0, sc->amr_mailboxphys & 0xff);
1633 AMR_SBYTE_SET(sc, AMR_SMBOX_1, (sc->amr_mailboxphys >> 8) & 0xff);
1634 AMR_SBYTE_SET(sc, AMR_SMBOX_2, (sc->amr_mailboxphys >> 16) & 0xff);
1635 AMR_SBYTE_SET(sc, AMR_SMBOX_3, (sc->amr_mailboxphys >> 24) & 0xff);
1636 AMR_SBYTE_SET(sc, AMR_SMBOX_ENABLE, AMR_SMBOX_ADDR);
1637
1638 /* clear any outstanding interrupt and enable interrupts proper */
1639 AMR_SACK_INTERRUPT(sc);
1640 AMR_SENABLE_INTR(sc);
1641}
1642
1643#ifdef AMR_BOARD_INIT
1644/********************************************************************************
1645 * Initialise the controller
1646 */
1647static int
1648amr_quartz_init(struct amr_softc *sc)
1649{
1650 int status, ostatus;
1651
1652 device_printf(sc->amr_dev, "initial init status %x\n", AMR_QGET_INITSTATUS(sc));
1653
1654 AMR_QRESET(sc);
1655
1656 ostatus = 0xff;
1657 while ((status = AMR_QGET_INITSTATUS(sc)) != AMR_QINIT_DONE) {
1658 if (status != ostatus) {
1659 device_printf(sc->amr_dev, "(%x) %s\n", status, amr_describe_code(amr_table_qinit, status));
1660 ostatus = status;
1661 }
1662 switch (status) {
1663 case AMR_QINIT_NOMEM:
1664 return(ENOMEM);
1665
1666 case AMR_QINIT_SCAN:
1667 /* XXX we could print channel/target here */
1668 break;
1669 }
1670 }
1671 return(0);
1672}
1673
1674static int
1675amr_std_init(struct amr_softc *sc)
1676{
1677 int status, ostatus;
1678
1679 device_printf(sc->amr_dev, "initial init status %x\n", AMR_SGET_INITSTATUS(sc));
1680
1681 AMR_SRESET(sc);
1682
1683 ostatus = 0xff;
1684 while ((status = AMR_SGET_INITSTATUS(sc)) != AMR_SINIT_DONE) {
1685 if (status != ostatus) {
1686 device_printf(sc->amr_dev, "(%x) %s\n", status, amr_describe_code(amr_table_sinit, status));
1687 ostatus = status;
1688 }
1689 switch (status) {
1690 case AMR_SINIT_NOMEM:
1691 return(ENOMEM);
1692
1693 case AMR_SINIT_INPROG:
1694 /* XXX we could print channel/target here? */
1695 break;
1696 }
1697 }
1698 return(0);
1699}
1700#endif
1701
1702/********************************************************************************
1703 ********************************************************************************
1704 Debugging
1705 ********************************************************************************
1706 ********************************************************************************/
1707
1708/********************************************************************************
1709 * Identify the controller and print some information about it.
1710 */
1711static void
1712amr_describe_controller(struct amr_softc *sc)
1713{
1714 struct amr_prodinfo *ap;
1715 struct amr_enquiry *ae;
1716 char *prod;
1717
1718 /*
1719 * Try to get 40LD product info, which tells us what the card is labelled as.
1720 */
1721 if ((ap = amr_enquiry(sc, 2048, AMR_CMD_CONFIG, AMR_CONFIG_PRODUCT_INFO, 0)) != NULL) {
1722 device_printf(sc->amr_dev, "<LSILogic %.80s> Firmware %.16s, BIOS %.16s, %dMB RAM\n",
1723 ap->ap_product, ap->ap_firmware, ap->ap_bios,
1724 ap->ap_memsize);
1725
efda3bd0 1726 kfree(ap, M_DEVBUF);
984263bc
MD
1727 return;
1728 }
1729
1730 /*
1731 * Try 8LD extended ENQUIRY to get controller signature, and use lookup table.
1732 */
1733 if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_EXT_ENQUIRY2, 0, 0)) != NULL) {
1734 prod = amr_describe_code(amr_table_adaptertype, ae->ae_signature);
1735
1736 } else if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_ENQUIRY, 0, 0)) != NULL) {
1737
1738 /*
1739 * Try to work it out based on the PCI signatures.
1740 */
1741 switch (pci_get_device(sc->amr_dev)) {
1742 case 0x9010:
1743 prod = "Series 428";
1744 break;
1745 case 0x9060:
1746 prod = "Series 434";
1747 break;
1748 default:
1749 prod = "unknown controller";
1750 break;
1751 }
1752 } else {
f3ac3f0c
SW
1753 device_printf(sc->amr_dev, "<unsupported controller>\n");
1754 return;
984263bc
MD
1755 }
1756
1757 /*
1758 * HP NetRaid controllers have a special encoding of the firmware and
1759 * BIOS versions. The AMI version seems to have it as strings whereas
1760 * the HP version does it with a leading uppercase character and two
1761 * binary numbers.
1762 */
1763
1764 if(ae->ae_adapter.aa_firmware[2] >= 'A' &&
1765 ae->ae_adapter.aa_firmware[2] <= 'Z' &&
1766 ae->ae_adapter.aa_firmware[1] < ' ' &&
1767 ae->ae_adapter.aa_firmware[0] < ' ' &&
1768 ae->ae_adapter.aa_bios[2] >= 'A' &&
1769 ae->ae_adapter.aa_bios[2] <= 'Z' &&
1770 ae->ae_adapter.aa_bios[1] < ' ' &&
1771 ae->ae_adapter.aa_bios[0] < ' ') {
1772
1773 /* this looks like we have an HP NetRaid version of the MegaRaid */
1774
1775 if(ae->ae_signature == AMR_SIG_438) {
1776 /* the AMI 438 is a NetRaid 3si in HP-land */
1777 prod = "HP NetRaid 3si";
1778 }
1779
1780 device_printf(sc->amr_dev, "<%s> Firmware %c.%02d.%02d, BIOS %c.%02d.%02d, %dMB RAM\n",
1781 prod, ae->ae_adapter.aa_firmware[2],
1782 ae->ae_adapter.aa_firmware[1],
1783 ae->ae_adapter.aa_firmware[0],
1784 ae->ae_adapter.aa_bios[2],
1785 ae->ae_adapter.aa_bios[1],
1786 ae->ae_adapter.aa_bios[0],
1787 ae->ae_adapter.aa_memorysize);
1788 } else {
1789 device_printf(sc->amr_dev, "<%s> Firmware %.4s, BIOS %.4s, %dMB RAM\n",
1790 prod, ae->ae_adapter.aa_firmware, ae->ae_adapter.aa_bios,
1791 ae->ae_adapter.aa_memorysize);
1792 }
efda3bd0 1793 kfree(ae, M_DEVBUF);
984263bc
MD
1794}
1795
510931cd 1796int
e0fc5693 1797amr_dump_blocks(struct amr_softc *sc, int unit, u_int64_t lba, void *data, int blks)
510931cd
HP
1798{
1799
1800 struct amr_command *ac;
1801 int error = 1;
1802
1803 debug_called(1);
1804
1805 sc->amr_state &= ~AMR_STATE_INTEN;
1806
1807 /* get ourselves a command buffer */
1808 if ((ac = amr_alloccmd(sc)) == NULL)
1809 goto out;
1810 /* set command flags */
1811 ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAOUT;
1812
1813 /* point the command at our data */
1814 ac->ac_data = data;
1815 ac->ac_length = blks * AMR_BLKSIZE;
1816
1817 /* build the command proper */
1818 ac->ac_mailbox.mb_command = AMR_CMD_LWRITE;
1819 ac->ac_mailbox.mb_blkcount = blks;
1820 ac->ac_mailbox.mb_lba = lba;
1821 ac->ac_mailbox.mb_drive = unit;
1822
1823 /* can't assume that interrupts are going to work here, so play it safe */
1824 if (sc->amr_poll_command(ac))
1825 goto out;
1826 error = ac->ac_status;
1827
1828 out:
1829 if (ac != NULL)
1830 amr_releasecmd(ac);
1831
1832 sc->amr_state |= AMR_STATE_INTEN;
1833
1834 return (error);
1835}
1836
1837
984263bc
MD
1838#ifdef AMR_DEBUG
1839/********************************************************************************
1840 * Print the command (ac) in human-readable format
1841 */
1842#if 0
1843static void
1844amr_printcommand(struct amr_command *ac)
1845{
1846 struct amr_softc *sc = ac->ac_sc;
1847 struct amr_sgentry *sg;
1848 int i;
1849
1850 device_printf(sc->amr_dev, "cmd %x ident %d drive %d\n",
1851 ac->ac_mailbox.mb_command, ac->ac_mailbox.mb_ident, ac->ac_mailbox.mb_drive);
1852 device_printf(sc->amr_dev, "blkcount %d lba %d\n",
1853 ac->ac_mailbox.mb_blkcount, ac->ac_mailbox.mb_lba);
1854 device_printf(sc->amr_dev, "virtaddr %p length %lu\n", ac->ac_data, (unsigned long)ac->ac_length);
1855 device_printf(sc->amr_dev, "sg physaddr %08x nsg %d\n",
1856 ac->ac_mailbox.mb_physaddr, ac->ac_mailbox.mb_nsgelem);
1857 device_printf(sc->amr_dev, "ccb %p bio %p\n", ac->ac_ccb_data, ac->ac_bio);
1858
1859 /* get base address of s/g table */
1860 sg = sc->amr_sgtable + (ac->ac_slot * AMR_NSEG);
1861 for (i = 0; i < ac->ac_mailbox.mb_nsgelem; i++, sg++)
1862 device_printf(sc->amr_dev, " %x/%d\n", sg->sg_addr, sg->sg_count);
1863}
1864#endif
1865#endif