more header changes for amd64 port; the pc64 building infrastructure
[dragonfly.git] / sys / platform / pc64 / amd64 / busdma_machdep.c
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1/*
2 * Copyright (c) 1997, 1998 Justin T. Gibbs.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions, and the following disclaimer,
10 * without modification, immediately at the beginning of the file.
11 * 2. The name of the author may not be used to endorse or promote products
12 * derived from this software without specific prior written permission.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
18 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD: src/sys/i386/i386/busdma_machdep.c,v 1.16.2.2 2003/01/23 00:55:27 scottl Exp $
27 * $DragonFly: src/sys/platform/pc64/amd64/busdma_machdep.c,v 1.1 2007/09/23 04:29:31 yanyh Exp $
28 * $DragonFly: src/sys/platform/pc64/amd64/busdma_machdep.c,v 1.1 2007/09/23 04:29:31 yanyh Exp $
29 */
30
31#include <sys/param.h>
32#include <sys/systm.h>
33#include <sys/malloc.h>
34#include <sys/mbuf.h>
35#include <sys/uio.h>
36#include <sys/thread2.h>
37#include <sys/bus_dma.h>
38
39#include <vm/vm.h>
40#include <vm/vm_page.h>
41
42/* XXX needed for to access pmap to convert per-proc virtual to physical */
43#include <sys/proc.h>
44#include <sys/lock.h>
45#include <vm/vm_map.h>
46
47#include <machine/md_var.h>
48
49#define MAX_BPAGES 128
50
51struct bus_dma_tag {
52 bus_dma_tag_t parent;
53 bus_size_t alignment;
54 bus_size_t boundary;
55 bus_addr_t lowaddr;
56 bus_addr_t highaddr;
57 bus_dma_filter_t *filter;
58 void *filterarg;
59 bus_size_t maxsize;
60 u_int nsegments;
61 bus_size_t maxsegsz;
62 int flags;
63 int ref_count;
64 int map_count;
65 bus_dma_segment_t *segments;
66};
67
68struct bounce_page {
69 vm_offset_t vaddr; /* kva of bounce buffer */
70 bus_addr_t busaddr; /* Physical address */
71 vm_offset_t datavaddr; /* kva of client data */
72 bus_size_t datacount; /* client data count */
73 STAILQ_ENTRY(bounce_page) links;
74};
75
76int busdma_swi_pending;
77
78static STAILQ_HEAD(bp_list, bounce_page) bounce_page_list;
79static int free_bpages;
80static int reserved_bpages;
81static int active_bpages;
82static int total_bpages;
83static bus_addr_t bounce_lowaddr = BUS_SPACE_MAXADDR;
84
85struct bus_dmamap {
86 struct bp_list bpages;
87 int pagesneeded;
88 int pagesreserved;
89 bus_dma_tag_t dmat;
90 void *buf; /* unmapped buffer pointer */
91 bus_size_t buflen; /* unmapped buffer length */
92 bus_dmamap_callback_t *callback;
93 void *callback_arg;
94 STAILQ_ENTRY(bus_dmamap) links;
95};
96
97static STAILQ_HEAD(, bus_dmamap) bounce_map_waitinglist;
98static STAILQ_HEAD(, bus_dmamap) bounce_map_callbacklist;
99static struct bus_dmamap nobounce_dmamap;
100
101static int alloc_bounce_pages(bus_dma_tag_t dmat, u_int numpages);
102static int reserve_bounce_pages(bus_dma_tag_t dmat, bus_dmamap_t map);
103static bus_addr_t add_bounce_page(bus_dma_tag_t dmat, bus_dmamap_t map,
104 vm_offset_t vaddr, bus_size_t size);
105static void free_bounce_page(bus_dma_tag_t dmat, struct bounce_page *bpage);
106static __inline int run_filter(bus_dma_tag_t dmat, bus_addr_t paddr);
107
108static __inline int
109run_filter(bus_dma_tag_t dmat, bus_addr_t paddr)
110{
111 int retval;
112
113 retval = 0;
114 do {
115 if (paddr > dmat->lowaddr
116 && paddr <= dmat->highaddr
117 && (dmat->filter == NULL
118 || (*dmat->filter)(dmat->filterarg, paddr) != 0))
119 retval = 1;
120
121 dmat = dmat->parent;
122 } while (retval == 0 && dmat != NULL);
123 return (retval);
124}
125
126#define BUS_DMA_MIN_ALLOC_COMP BUS_DMA_BUS4
127/*
128 * Allocate a device specific dma_tag.
129 */
130int
131bus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment,
132 bus_size_t boundary, bus_addr_t lowaddr,
133 bus_addr_t highaddr, bus_dma_filter_t *filter,
134 void *filterarg, bus_size_t maxsize, int nsegments,
135 bus_size_t maxsegsz, int flags, bus_dma_tag_t *dmat)
136{
137 bus_dma_tag_t newtag;
138 int error = 0;
139
140 /* Return a NULL tag on failure */
141 *dmat = NULL;
142
143 newtag = kmalloc(sizeof(*newtag), M_DEVBUF, M_INTWAIT);
144
145 newtag->parent = parent;
146 newtag->alignment = alignment;
147 newtag->boundary = boundary;
148 newtag->lowaddr = trunc_page((vm_paddr_t)lowaddr) + (PAGE_SIZE - 1);
149 newtag->highaddr = trunc_page((vm_paddr_t)highaddr) + (PAGE_SIZE - 1);
150 newtag->filter = filter;
151 newtag->filterarg = filterarg;
152 newtag->maxsize = maxsize;
153 newtag->nsegments = nsegments;
154 newtag->maxsegsz = maxsegsz;
155 newtag->flags = flags;
156 newtag->ref_count = 1; /* Count ourself */
157 newtag->map_count = 0;
158 newtag->segments = NULL;
159
160 /* Take into account any restrictions imposed by our parent tag */
161 if (parent != NULL) {
162 newtag->lowaddr = MIN(parent->lowaddr, newtag->lowaddr);
163 newtag->highaddr = MAX(parent->highaddr, newtag->highaddr);
164 /*
165 * XXX Not really correct??? Probably need to honor boundary
166 * all the way up the inheritence chain.
167 */
168 newtag->boundary = MAX(parent->boundary, newtag->boundary);
169 if (newtag->filter == NULL) {
170 /*
171 * Short circuit looking at our parent directly
172 * since we have encapsulated all of its information
173 */
174 newtag->filter = parent->filter;
175 newtag->filterarg = parent->filterarg;
176 newtag->parent = parent->parent;
177 }
178 if (newtag->parent != NULL) {
179 parent->ref_count++;
180 }
181 }
182
183 if (newtag->lowaddr < ptoa(Maxmem) &&
184 (flags & BUS_DMA_ALLOCNOW) != 0) {
185 /* Must bounce */
186
187 if (lowaddr > bounce_lowaddr) {
188 /*
189 * Go through the pool and kill any pages
190 * that don't reside below lowaddr.
191 */
192 panic("bus_dma_tag_create: page reallocation "
193 "not implemented");
194 }
195 if (ptoa(total_bpages) < maxsize) {
196 int pages;
197
198 pages = atop(maxsize) - total_bpages;
199
200 /* Add pages to our bounce pool */
201 if (alloc_bounce_pages(newtag, pages) < pages)
202 error = ENOMEM;
203 }
204 /* Performed initial allocation */
205 newtag->flags |= BUS_DMA_MIN_ALLOC_COMP;
206 }
207
208 if (error != 0) {
209 kfree(newtag, M_DEVBUF);
210 } else {
211 *dmat = newtag;
212 }
213 return (error);
214}
215
216int
217bus_dma_tag_destroy(bus_dma_tag_t dmat)
218{
219 if (dmat != NULL) {
220
221 if (dmat->map_count != 0)
222 return (EBUSY);
223
224 while (dmat != NULL) {
225 bus_dma_tag_t parent;
226
227 parent = dmat->parent;
228 dmat->ref_count--;
229 if (dmat->ref_count == 0) {
230 if (dmat->segments != NULL)
231 kfree(dmat->segments, M_DEVBUF);
232 kfree(dmat, M_DEVBUF);
233 /*
234 * Last reference count, so
235 * release our reference
236 * count on our parent.
237 */
238 dmat = parent;
239 } else
240 dmat = NULL;
241 }
242 }
243 return (0);
244}
245
246/*
247 * Allocate a handle for mapping from kva/uva/physical
248 * address space into bus device space.
249 */
250int
251bus_dmamap_create(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp)
252{
253 int error;
254
255 error = 0;
256
257 if (dmat->segments == NULL) {
258 KKASSERT(dmat->nsegments && dmat->nsegments < 16384);
259 dmat->segments = kmalloc(sizeof(bus_dma_segment_t) *
260 dmat->nsegments, M_DEVBUF, M_INTWAIT);
261 }
262
263 if (dmat->lowaddr < ptoa(Maxmem)) {
264 /* Must bounce */
265 int maxpages;
266
267 *mapp = kmalloc(sizeof(**mapp), M_DEVBUF, M_INTWAIT);
268 if (*mapp == NULL) {
269 return (ENOMEM);
270 } else {
271 /* Initialize the new map */
272 bzero(*mapp, sizeof(**mapp));
273 STAILQ_INIT(&((*mapp)->bpages));
274 }
275 /*
276 * Attempt to add pages to our pool on a per-instance
277 * basis up to a sane limit.
278 */
279 maxpages = MIN(MAX_BPAGES, Maxmem - atop(dmat->lowaddr));
280 if ((dmat->flags & BUS_DMA_MIN_ALLOC_COMP) == 0
281 || (dmat->map_count > 0
282 && total_bpages < maxpages)) {
283 int pages;
284
285 if (dmat->lowaddr > bounce_lowaddr) {
286 /*
287 * Go through the pool and kill any pages
288 * that don't reside below lowaddr.
289 */
290 panic("bus_dmamap_create: page reallocation "
291 "not implemented");
292 }
293 pages = atop(dmat->maxsize);
294 pages = MIN(maxpages - total_bpages, pages);
295 error = alloc_bounce_pages(dmat, pages);
296
297 if ((dmat->flags & BUS_DMA_MIN_ALLOC_COMP) == 0) {
298 if (error == 0)
299 dmat->flags |= BUS_DMA_MIN_ALLOC_COMP;
300 } else {
301 error = 0;
302 }
303 }
304 } else {
305 *mapp = NULL;
306 }
307 if (error == 0)
308 dmat->map_count++;
309 return (error);
310}
311
312/*
313 * Destroy a handle for mapping from kva/uva/physical
314 * address space into bus device space.
315 */
316int
317bus_dmamap_destroy(bus_dma_tag_t dmat, bus_dmamap_t map)
318{
319 if (map != NULL) {
320 if (STAILQ_FIRST(&map->bpages) != NULL)
321 return (EBUSY);
322 kfree(map, M_DEVBUF);
323 }
324 dmat->map_count--;
325 return (0);
326}
327
328
329/*
330 * Allocate a piece of memory that can be efficiently mapped into
331 * bus device space based on the constraints lited in the dma tag.
332 *
333 * mapp is degenerate. By definition this allocation should not require
334 * bounce buffers so do not allocate a dma map.
335 */
336int
337bus_dmamem_alloc(bus_dma_tag_t dmat, void** vaddr, int flags,
338 bus_dmamap_t *mapp)
339{
340 int mflags;
341 /* If we succeed, no mapping/bouncing will be required */
342 *mapp = NULL;
343
344 if (dmat->segments == NULL) {
345 KKASSERT(dmat->nsegments < 16384);
346 dmat->segments = kmalloc(sizeof(bus_dma_segment_t) *
347 dmat->nsegments, M_DEVBUF, M_INTWAIT);
348 }
349
350 if (flags & BUS_DMA_NOWAIT)
351 mflags = M_NOWAIT;
352 else
353 mflags = M_WAITOK;
354 if (flags & BUS_DMA_ZERO)
355 mflags |= M_ZERO;
356
357 if ((dmat->maxsize <= PAGE_SIZE) &&
358 dmat->lowaddr >= ptoa(Maxmem)) {
359 *vaddr = kmalloc(dmat->maxsize, M_DEVBUF, mflags);
360 /*
361 * XXX Check whether the allocation crossed a page boundary
362 * and retry with power-of-2 alignment in that case.
363 */
364 if ((((intptr_t)*vaddr) & PAGE_MASK) !=
365 (((intptr_t)*vaddr + dmat->maxsize) & PAGE_MASK)) {
366 size_t size;
367 kfree(*vaddr, M_DEVBUF);
368 /* XXX check for overflow? */
369 for (size = 1; size <= dmat->maxsize; size <<= 1)
370 ;
371 *vaddr = kmalloc(size, M_DEVBUF, mflags);
372 }
373 } else {
374 /*
375 * XXX Use Contigmalloc until it is merged into this facility
376 * and handles multi-seg allocations. Nobody is doing
377 * multi-seg allocations yet though.
378 */
379 *vaddr = contigmalloc(dmat->maxsize, M_DEVBUF, mflags,
380 0ul, dmat->lowaddr, dmat->alignment? dmat->alignment : 1ul,
381 dmat->boundary);
382 }
383 if (*vaddr == NULL)
384 return (ENOMEM);
385 return (0);
386}
387
388/*
389 * Free a piece of memory and it's allociated dmamap, that was allocated
390 * via bus_dmamem_alloc. Make the same choice for free/contigfree.
391 */
392void
393bus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map)
394{
395 /*
396 * dmamem does not need to be bounced, so the map should be
397 * NULL
398 */
399 if (map != NULL)
400 panic("bus_dmamem_free: Invalid map freed\n");
401 if ((dmat->maxsize <= PAGE_SIZE) &&
402 dmat->lowaddr >= ptoa(Maxmem))
403 kfree(vaddr, M_DEVBUF);
404 else
405 contigfree(vaddr, dmat->maxsize, M_DEVBUF);
406}
407
408#define BUS_DMAMAP_NSEGS ((BUS_SPACE_MAXSIZE / PAGE_SIZE) + 1)
409
410/*
411 * Map the buffer buf into bus space using the dmamap map.
412 */
413int
414bus_dmamap_load(bus_dma_tag_t dmat, bus_dmamap_t map, void *buf,
415 bus_size_t buflen, bus_dmamap_callback_t *callback,
416 void *callback_arg, int flags)
417{
418 vm_offset_t vaddr;
419 vm_paddr_t paddr;
420 bus_dma_segment_t *sg;
421 int seg;
422 int error;
423 vm_paddr_t nextpaddr;
424
425 if (map == NULL)
426 map = &nobounce_dmamap;
427
428 error = 0;
429 /*
430 * If we are being called during a callback, pagesneeded will
431 * be non-zero, so we can avoid doing the work twice.
432 */
433 if (dmat->lowaddr < ptoa(Maxmem) &&
434 map->pagesneeded == 0) {
435 vm_offset_t vendaddr;
436
437 /*
438 * Count the number of bounce pages
439 * needed in order to complete this transfer
440 */
441 vaddr = trunc_page((vm_offset_t)buf);
442 vendaddr = (vm_offset_t)buf + buflen;
443
444 while (vaddr < vendaddr) {
445 paddr = pmap_kextract(vaddr);
446 if (run_filter(dmat, paddr) != 0) {
447
448 map->pagesneeded++;
449 }
450 vaddr += PAGE_SIZE;
451 }
452 }
453
454 /* Reserve Necessary Bounce Pages */
455 if (map->pagesneeded != 0) {
456 crit_enter();
457 if (reserve_bounce_pages(dmat, map) != 0) {
458
459 /* Queue us for resources */
460 map->dmat = dmat;
461 map->buf = buf;
462 map->buflen = buflen;
463 map->callback = callback;
464 map->callback_arg = callback_arg;
465
466 STAILQ_INSERT_TAIL(&bounce_map_waitinglist, map, links);
467 crit_exit();
468
469 return (EINPROGRESS);
470 }
471 crit_exit();
472 }
473
474 vaddr = (vm_offset_t)buf;
475 sg = dmat->segments;
476 seg = 1;
477 sg->ds_len = 0;
478
479 nextpaddr = 0;
480 do {
481 bus_size_t size;
482
483 paddr = pmap_kextract(vaddr);
484 size = PAGE_SIZE - (paddr & PAGE_MASK);
485 if (size > buflen)
486 size = buflen;
487
488 if (map->pagesneeded != 0 && run_filter(dmat, paddr)) {
489 paddr = add_bounce_page(dmat, map, vaddr, size);
490 }
491
492 if (sg->ds_len == 0) {
493 sg->ds_addr = paddr;
494 sg->ds_len = size;
495 } else if (paddr == nextpaddr) {
496 sg->ds_len += size;
497 } else {
498 /* Go to the next segment */
499 sg++;
500 seg++;
501 if (seg > dmat->nsegments)
502 break;
503 sg->ds_addr = paddr;
504 sg->ds_len = size;
505 }
506 vaddr += size;
507 nextpaddr = paddr + size;
508 buflen -= size;
509 } while (buflen > 0);
510
511 if (buflen != 0) {
512 kprintf("bus_dmamap_load: Too many segs! buf_len = 0x%lx\n",
513 (u_long)buflen);
514 error = EFBIG;
515 }
516
517 (*callback)(callback_arg, dmat->segments, seg, error);
518
519 return (0);
520}
521
522/*
523 * Utility function to load a linear buffer. lastaddrp holds state
524 * between invocations (for multiple-buffer loads). segp contains
525 * the starting segment on entrace, and the ending segment on exit.
526 * first indicates if this is the first invocation of this function.
527 */
528static int
529_bus_dmamap_load_buffer(bus_dma_tag_t dmat,
530 void *buf, bus_size_t buflen,
531 struct thread *td,
532 int flags,
533 vm_offset_t *lastaddrp,
534 int *segp,
535 int first)
536{
537 bus_dma_segment_t *segs;
538 bus_size_t sgsize;
539 bus_addr_t curaddr, lastaddr, baddr, bmask;
540 vm_offset_t vaddr = (vm_offset_t)buf;
541 int seg;
542 pmap_t pmap;
543
544 if (td->td_proc != NULL)
545 pmap = vmspace_pmap(td->td_proc->p_vmspace);
546 else
547 pmap = NULL;
548
549 segs = dmat->segments;
550 lastaddr = *lastaddrp;
551 bmask = ~(dmat->boundary - 1);
552
553 for (seg = *segp; buflen > 0 ; ) {
554 /*
555 * Get the physical address for this segment.
556 */
557 if (pmap)
558 curaddr = pmap_extract(pmap, vaddr);
559 else
560 curaddr = pmap_kextract(vaddr);
561
562 /*
563 * Compute the segment size, and adjust counts.
564 */
565 sgsize = PAGE_SIZE - ((u_long)curaddr & PAGE_MASK);
566 if (buflen < sgsize)
567 sgsize = buflen;
568
569 /*
570 * Make sure we don't cross any boundaries.
571 */
572 if (dmat->boundary > 0) {
573 baddr = (curaddr + dmat->boundary) & bmask;
574 if (sgsize > (baddr - curaddr))
575 sgsize = (baddr - curaddr);
576 }
577
578 /*
579 * Insert chunk into a segment, coalescing with
580 * previous segment if possible.
581 */
582 if (first) {
583 segs[seg].ds_addr = curaddr;
584 segs[seg].ds_len = sgsize;
585 first = 0;
586 } else {
587 if (curaddr == lastaddr &&
588 (segs[seg].ds_len + sgsize) <= dmat->maxsegsz &&
589 (dmat->boundary == 0 ||
590 (segs[seg].ds_addr & bmask) == (curaddr & bmask)))
591 segs[seg].ds_len += sgsize;
592 else {
593 if (++seg >= dmat->nsegments)
594 break;
595 segs[seg].ds_addr = curaddr;
596 segs[seg].ds_len = sgsize;
597 }
598 }
599
600 lastaddr = curaddr + sgsize;
601 vaddr += sgsize;
602 buflen -= sgsize;
603 }
604
605 *segp = seg;
606 *lastaddrp = lastaddr;
607
608 /*
609 * Did we fit?
610 */
611 return (buflen != 0 ? EFBIG : 0); /* XXX better return value here? */
612}
613
614/*
615 * Like _bus_dmamap_load(), but for mbufs.
616 */
617int
618bus_dmamap_load_mbuf(bus_dma_tag_t dmat, bus_dmamap_t map,
619 struct mbuf *m0,
620 bus_dmamap_callback2_t *callback, void *callback_arg,
621 int flags)
622{
623 int nsegs, error;
624
625 KASSERT(dmat->lowaddr >= ptoa(Maxmem) || map != NULL,
626 ("bus_dmamap_load_mbuf: No support for bounce pages!"));
627 KASSERT(m0->m_flags & M_PKTHDR,
628 ("bus_dmamap_load_mbuf: no packet header"));
629
630 nsegs = 0;
631 error = 0;
632 if (m0->m_pkthdr.len <= dmat->maxsize) {
633 int first = 1;
634 vm_offset_t lastaddr = 0;
635 struct mbuf *m;
636
637 for (m = m0; m != NULL && error == 0; m = m->m_next) {
638 if ( m->m_len == 0 )
639 continue;
640 error = _bus_dmamap_load_buffer(dmat,
641 m->m_data, m->m_len,
642 curthread, flags, &lastaddr,
643 &nsegs, first);
644 first = 0;
645 }
646 } else {
647 error = EINVAL;
648 }
649
650 if (error) {
651 /* force "no valid mappings" in callback */
652 (*callback)(callback_arg, dmat->segments, 0, 0, error);
653 } else {
654 (*callback)(callback_arg, dmat->segments,
655 nsegs+1, m0->m_pkthdr.len, error);
656 }
657 return (error);
658}
659
660/*
661 * Like _bus_dmamap_load(), but for uios.
662 */
663int
664bus_dmamap_load_uio(bus_dma_tag_t dmat, bus_dmamap_t map,
665 struct uio *uio,
666 bus_dmamap_callback2_t *callback, void *callback_arg,
667 int flags)
668{
669 vm_offset_t lastaddr;
670 int nsegs, error, first, i;
671 bus_size_t resid;
672 struct iovec *iov;
673 struct thread *td = NULL;
674
675 KASSERT(dmat->lowaddr >= ptoa(Maxmem) || map != NULL,
676 ("bus_dmamap_load_uio: No support for bounce pages!"));
677
678 resid = uio->uio_resid;
679 iov = uio->uio_iov;
680
681 if (uio->uio_segflg == UIO_USERSPACE) {
682 td = uio->uio_td;
683 KASSERT(td != NULL && td->td_proc != NULL,
684 ("bus_dmamap_load_uio: USERSPACE but no proc"));
685 }
686
687 nsegs = 0;
688 error = 0;
689 first = 1;
690 for (i = 0; i < uio->uio_iovcnt && resid != 0 && !error; i++) {
691 /*
692 * Now at the first iovec to load. Load each iovec
693 * until we have exhausted the residual count.
694 */
695 bus_size_t minlen =
696 resid < iov[i].iov_len ? resid : iov[i].iov_len;
697 caddr_t addr = (caddr_t) iov[i].iov_base;
698
699 error = _bus_dmamap_load_buffer(dmat,
700 addr, minlen,
701 td, flags, &lastaddr, &nsegs, first);
702 first = 0;
703
704 resid -= minlen;
705 }
706
707 if (error) {
708 /* force "no valid mappings" in callback */
709 (*callback)(callback_arg, dmat->segments, 0, 0, error);
710 } else {
711 (*callback)(callback_arg, dmat->segments,
712 nsegs+1, uio->uio_resid, error);
713 }
714 return (error);
715}
716
717/*
718 * Release the mapping held by map.
719 */
720void
721_bus_dmamap_unload(bus_dma_tag_t dmat, bus_dmamap_t map)
722{
723 struct bounce_page *bpage;
724
725 while ((bpage = STAILQ_FIRST(&map->bpages)) != NULL) {
726 STAILQ_REMOVE_HEAD(&map->bpages, links);
727 free_bounce_page(dmat, bpage);
728 }
729}
730
731void
732_bus_dmamap_sync(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dmasync_op_t op)
733{
734 struct bounce_page *bpage;
735
736 if ((bpage = STAILQ_FIRST(&map->bpages)) != NULL) {
737
738 /*
739 * Handle data bouncing. We might also
740 * want to add support for invalidating
741 * the caches on broken hardware
742 */
743 switch (op) {
744 case BUS_DMASYNC_PREWRITE:
745 while (bpage != NULL) {
746 bcopy((void *)bpage->datavaddr,
747 (void *)bpage->vaddr,
748 bpage->datacount);
749 bpage = STAILQ_NEXT(bpage, links);
750 }
751 break;
752
753 case BUS_DMASYNC_POSTREAD:
754 while (bpage != NULL) {
755 bcopy((void *)bpage->vaddr,
756 (void *)bpage->datavaddr,
757 bpage->datacount);
758 bpage = STAILQ_NEXT(bpage, links);
759 }
760 break;
761 case BUS_DMASYNC_PREREAD:
762 case BUS_DMASYNC_POSTWRITE:
763 /* No-ops */
764 break;
765 }
766 }
767}
768
769static int
770alloc_bounce_pages(bus_dma_tag_t dmat, u_int numpages)
771{
772 int count;
773
774 count = 0;
775 if (total_bpages == 0) {
776 STAILQ_INIT(&bounce_page_list);
777 STAILQ_INIT(&bounce_map_waitinglist);
778 STAILQ_INIT(&bounce_map_callbacklist);
779 }
780
781 while (numpages > 0) {
782 struct bounce_page *bpage;
783
784 bpage = (struct bounce_page *)kmalloc(sizeof(*bpage), M_DEVBUF,
785 M_INTWAIT);
786
787 if (bpage == NULL)
788 break;
789 bzero(bpage, sizeof(*bpage));
790 bpage->vaddr = (vm_offset_t)contigmalloc(PAGE_SIZE, M_DEVBUF,
791 M_NOWAIT, 0ul,
792 dmat->lowaddr,
793 PAGE_SIZE,
794 0);
795 if (bpage->vaddr == NULL) {
796 kfree(bpage, M_DEVBUF);
797 break;
798 }
799 bpage->busaddr = pmap_kextract(bpage->vaddr);
800 crit_enter();
801 STAILQ_INSERT_TAIL(&bounce_page_list, bpage, links);
802 total_bpages++;
803 free_bpages++;
804 crit_exit();
805 count++;
806 numpages--;
807 }
808 return (count);
809}
810
811static int
812reserve_bounce_pages(bus_dma_tag_t dmat, bus_dmamap_t map)
813{
814 int pages;
815
816 pages = MIN(free_bpages, map->pagesneeded - map->pagesreserved);
817 free_bpages -= pages;
818 reserved_bpages += pages;
819 map->pagesreserved += pages;
820 pages = map->pagesneeded - map->pagesreserved;
821
822 return (pages);
823}
824
825static bus_addr_t
826add_bounce_page(bus_dma_tag_t dmat, bus_dmamap_t map, vm_offset_t vaddr,
827 bus_size_t size)
828{
829 struct bounce_page *bpage;
830
831 if (map->pagesneeded == 0)
832 panic("add_bounce_page: map doesn't need any pages");
833 map->pagesneeded--;
834
835 if (map->pagesreserved == 0)
836 panic("add_bounce_page: map doesn't need any pages");
837 map->pagesreserved--;
838
839 crit_enter();
840 bpage = STAILQ_FIRST(&bounce_page_list);
841 if (bpage == NULL)
842 panic("add_bounce_page: free page list is empty");
843
844 STAILQ_REMOVE_HEAD(&bounce_page_list, links);
845 reserved_bpages--;
846 active_bpages++;
847 crit_exit();
848
849 bpage->datavaddr = vaddr;
850 bpage->datacount = size;
851 STAILQ_INSERT_TAIL(&(map->bpages), bpage, links);
852 return (bpage->busaddr);
853}
854
855static void
856free_bounce_page(bus_dma_tag_t dmat, struct bounce_page *bpage)
857{
858 struct bus_dmamap *map;
859
860 bpage->datavaddr = 0;
861 bpage->datacount = 0;
862
863 crit_enter();
864 STAILQ_INSERT_HEAD(&bounce_page_list, bpage, links);
865 free_bpages++;
866 active_bpages--;
867 if ((map = STAILQ_FIRST(&bounce_map_waitinglist)) != NULL) {
868 if (reserve_bounce_pages(map->dmat, map) == 0) {
869 panic("free_bounce_pages: uncoded\n");
870#if 0
871 STAILQ_REMOVE_HEAD(&bounce_map_waitinglist, links);
872 STAILQ_INSERT_TAIL(&bounce_map_callbacklist,
873 map, links);
874 busdma_swi_pending = 1;
875 setsoftvm();
876#endif
877 }
878 }
879 crit_exit();
880}
881
882#if 0
883
884void
885busdma_swi(void)
886{
887 struct bus_dmamap *map;
888
889 crit_enter();
890 while ((map = STAILQ_FIRST(&bounce_map_callbacklist)) != NULL) {
891 STAILQ_REMOVE_HEAD(&bounce_map_callbacklist, links);
892 crit_exit();
893 bus_dmamap_load(map->dmat, map, map->buf, map->buflen,
894 map->callback, map->callback_arg, /*flags*/0);
895 crit_enter();
896 }
897 crit_exit();
898}
899
900#endif
901