kernel - Fix rare IPIQ freezes
[dragonfly.git] / sys / kern / lwkt_ipiq.c
CommitLineData
3b6b7bd1 1/*
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2 * Copyright (c) 2003,2004 The DragonFly Project. All rights reserved.
3 *
4 * This code is derived from software contributed to The DragonFly Project
5 * by Matthew Dillon <dillon@backplane.com>
6 *
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7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
8c10bfcf 10 *
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11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
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14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
16 * distribution.
17 * 3. Neither the name of The DragonFly Project nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific, prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
24 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
25 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
27 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
29 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
3b6b7bd1 32 * SUCH DAMAGE.
8c10bfcf 33 *
546f2c66 34 * $DragonFly: src/sys/kern/lwkt_ipiq.c,v 1.27 2008/05/18 20:57:56 nth Exp $
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35 */
36
37/*
38 * This module implements IPI message queueing and the MI portion of IPI
39 * message processing.
40 */
41
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42#include "opt_ddb.h"
43
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44#include <sys/param.h>
45#include <sys/systm.h>
46#include <sys/kernel.h>
47#include <sys/proc.h>
48#include <sys/rtprio.h>
49#include <sys/queue.h>
50#include <sys/thread2.h>
51#include <sys/sysctl.h>
ac72c7f4 52#include <sys/ktr.h>
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53#include <sys/kthread.h>
54#include <machine/cpu.h>
55#include <sys/lock.h>
56#include <sys/caps.h>
57
58#include <vm/vm.h>
59#include <vm/vm_param.h>
60#include <vm/vm_kern.h>
61#include <vm/vm_object.h>
62#include <vm/vm_page.h>
63#include <vm/vm_map.h>
64#include <vm/vm_pager.h>
65#include <vm/vm_extern.h>
66#include <vm/vm_zone.h>
67
68#include <machine/stdarg.h>
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69#include <machine/smp.h>
70#include <machine/atomic.h>
71
3b6b7bd1 72#ifdef SMP
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73static __int64_t ipiq_count; /* total calls to lwkt_send_ipiq*() */
74static __int64_t ipiq_fifofull; /* number of fifo full conditions detected */
75static __int64_t ipiq_avoided; /* interlock with target avoids cpu ipi */
76static __int64_t ipiq_passive; /* passive IPI messages */
77static __int64_t ipiq_cscount; /* number of cpu synchronizations */
78static int ipiq_optimized = 1; /* XXX temporary sysctl */
d5b2d319 79static int ipiq_debug; /* set to 1 for debug */
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80#ifdef PANIC_DEBUG
81static int panic_ipiq_cpu = -1;
82static int panic_ipiq_count = 100;
83#endif
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84#endif
85
3b6b7bd1 86#ifdef SMP
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87SYSCTL_QUAD(_lwkt, OID_AUTO, ipiq_count, CTLFLAG_RW, &ipiq_count, 0,
88 "Number of IPI's sent");
89SYSCTL_QUAD(_lwkt, OID_AUTO, ipiq_fifofull, CTLFLAG_RW, &ipiq_fifofull, 0,
90 "Number of fifo full conditions detected");
91SYSCTL_QUAD(_lwkt, OID_AUTO, ipiq_avoided, CTLFLAG_RW, &ipiq_avoided, 0,
92 "Number of IPI's avoided by interlock with target cpu");
93SYSCTL_QUAD(_lwkt, OID_AUTO, ipiq_passive, CTLFLAG_RW, &ipiq_passive, 0,
94 "Number of passive IPI messages sent");
95SYSCTL_QUAD(_lwkt, OID_AUTO, ipiq_cscount, CTLFLAG_RW, &ipiq_cscount, 0,
96 "Number of cpu synchronizations");
97SYSCTL_INT(_lwkt, OID_AUTO, ipiq_optimized, CTLFLAG_RW, &ipiq_optimized, 0,
98 "");
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99SYSCTL_INT(_lwkt, OID_AUTO, ipiq_debug, CTLFLAG_RW, &ipiq_debug, 0,
100 "");
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101#ifdef PANIC_DEBUG
102SYSCTL_INT(_lwkt, OID_AUTO, panic_ipiq_cpu, CTLFLAG_RW, &panic_ipiq_cpu, 0, "");
103SYSCTL_INT(_lwkt, OID_AUTO, panic_ipiq_count, CTLFLAG_RW, &panic_ipiq_count, 0, "");
104#endif
3b6b7bd1 105
a7adb95a 106#define IPIQ_STRING "func=%p arg1=%p arg2=%d scpu=%d dcpu=%d"
5118bbc4 107#define IPIQ_ARG_SIZE (sizeof(void *) * 2 + sizeof(int) * 3)
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108
109#if !defined(KTR_IPIQ)
110#define KTR_IPIQ KTR_ALL
3b6b7bd1 111#endif
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112KTR_INFO_MASTER(ipiq);
113KTR_INFO(KTR_IPIQ, ipiq, send_norm, 0, IPIQ_STRING, IPIQ_ARG_SIZE);
114KTR_INFO(KTR_IPIQ, ipiq, send_pasv, 1, IPIQ_STRING, IPIQ_ARG_SIZE);
115KTR_INFO(KTR_IPIQ, ipiq, send_nbio, 2, IPIQ_STRING, IPIQ_ARG_SIZE);
116KTR_INFO(KTR_IPIQ, ipiq, send_fail, 3, IPIQ_STRING, IPIQ_ARG_SIZE);
117KTR_INFO(KTR_IPIQ, ipiq, receive, 4, IPIQ_STRING, IPIQ_ARG_SIZE);
d7ed9e5e 118KTR_INFO(KTR_IPIQ, ipiq, sync_start, 5, "cpumask=%08x", sizeof(cpumask_t));
d5b2d319 119KTR_INFO(KTR_IPIQ, ipiq, sync_end, 6, "cpumask=%08x", sizeof(cpumask_t));
866b61fb 120KTR_INFO(KTR_IPIQ, ipiq, cpu_send, 7, IPIQ_STRING, IPIQ_ARG_SIZE);
c92e86f1 121KTR_INFO(KTR_IPIQ, ipiq, send_end, 8, IPIQ_STRING, IPIQ_ARG_SIZE);
ac72c7f4 122
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123#define logipiq(name, func, arg1, arg2, sgd, dgd) \
124 KTR_LOG(ipiq_ ## name, func, arg1, arg2, sgd->gd_cpuid, dgd->gd_cpuid)
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125#define logipiq2(name, arg) \
126 KTR_LOG(ipiq_ ## name, arg)
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127
128#endif /* SMP */
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129
130#ifdef SMP
131
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132static int lwkt_process_ipiq_core(globaldata_t sgd, lwkt_ipiq_t ip,
133 struct intrframe *frame);
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134static void lwkt_cpusync_remote1(lwkt_cpusync_t cs);
135static void lwkt_cpusync_remote2(lwkt_cpusync_t cs);
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136
137/*
138 * Send a function execution request to another cpu. The request is queued
139 * on the cpu<->cpu ipiq matrix. Each cpu owns a unique ipiq FIFO for every
140 * possible target cpu. The FIFO can be written.
141 *
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142 * If the FIFO fills up we have to enable interrupts to avoid an APIC
143 * deadlock and process pending IPIQs while waiting for it to empty.
144 * Otherwise we may soft-deadlock with another cpu whos FIFO is also full.
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145 *
146 * We can safely bump gd_intr_nesting_level because our crit_exit() at the
147 * end will take care of any pending interrupts.
148 *
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149 * The actual hardware IPI is avoided if the target cpu is already processing
150 * the queue from a prior IPI. It is possible to pipeline IPI messages
151 * very quickly between cpus due to the FIFO hysteresis.
152 *
153 * Need not be called from a critical section.
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154 */
155int
b8a98473 156lwkt_send_ipiq3(globaldata_t target, ipifunc3_t func, void *arg1, int arg2)
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157{
158 lwkt_ipiq_t ip;
159 int windex;
160 struct globaldata *gd = mycpu;
161
a7adb95a 162 logipiq(send_norm, func, arg1, arg2, gd, target);
ac72c7f4 163
3b6b7bd1 164 if (target == gd) {
b8a98473 165 func(arg1, arg2, NULL);
c92e86f1 166 logipiq(send_end, func, arg1, arg2, gd, target);
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167 return(0);
168 }
169 crit_enter();
170 ++gd->gd_intr_nesting_level;
171#ifdef INVARIANTS
172 if (gd->gd_intr_nesting_level > 20)
173 panic("lwkt_send_ipiq: TOO HEAVILY NESTED!");
174#endif
f9235b6d 175 KKASSERT(curthread->td_critcount);
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176 ++ipiq_count;
177 ip = &gd->gd_ipiq[target->gd_cpuid];
178
179 /*
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180 * Do not allow the FIFO to become full. Interrupts must be physically
181 * enabled while we liveloop to avoid deadlocking the APIC.
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182 *
183 * The target ipiq may have gotten filled up due to passive IPIs and thus
184 * not be aware that its queue is too full, so be sure to issue an
185 * ipiq interrupt to the target cpu.
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186 */
187 if (ip->ip_windex - ip->ip_rindex > MAXCPUFIFO / 2) {
46d4e165 188#if defined(__i386__)
4c9f5a7f 189 unsigned int eflags = read_eflags();
b2b3ffcd 190#elif defined(__x86_64__)
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JG
191 unsigned long rflags = read_rflags();
192#endif
4c9f5a7f 193
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194 cpu_enable_intr();
195 ++ipiq_fifofull;
cfaeae2a 196 DEBUG_PUSH_INFO("send_ipiq3");
4c9f5a7f 197 while (ip->ip_windex - ip->ip_rindex > MAXCPUFIFO / 4) {
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198 if (atomic_poll_acquire_int(&ip->ip_npoll) || ipiq_optimized == 0) {
199 logipiq(cpu_send, func, arg1, arg2, gd, target);
200 cpu_send_ipiq(target->gd_cpuid);
201 }
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202 KKASSERT(ip->ip_windex - ip->ip_rindex != MAXCPUFIFO - 1);
203 lwkt_process_ipiq();
da0b0e8b 204 cpu_pause();
4c9f5a7f 205 }
cfaeae2a 206 DEBUG_POP_INFO();
46d4e165 207#if defined(__i386__)
4c9f5a7f 208 write_eflags(eflags);
b2b3ffcd 209#elif defined(__x86_64__)
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210 write_rflags(rflags);
211#endif
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212 }
213
214 /*
215 * Queue the new message
3b6b7bd1 216 */
3b6b7bd1 217 windex = ip->ip_windex & MAXCPUFIFO_MASK;
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218 ip->ip_func[windex] = func;
219 ip->ip_arg1[windex] = arg1;
220 ip->ip_arg2[windex] = arg2;
35238fa5 221 cpu_sfence();
3b6b7bd1 222 ++ip->ip_windex;
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223
224 /*
225 * signal the target cpu that there is work pending.
226 */
da0b0e8b 227 if (atomic_poll_acquire_int(&ip->ip_npoll) || ipiq_optimized == 0) {
866b61fb 228 logipiq(cpu_send, func, arg1, arg2, gd, target);
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229 cpu_send_ipiq(target->gd_cpuid);
230 } else {
da0b0e8b 231 ++ipiq_avoided;
4c9f5a7f 232 }
da0b0e8b 233 --gd->gd_intr_nesting_level;
4c9f5a7f 234 crit_exit();
c92e86f1 235 logipiq(send_end, func, arg1, arg2, gd, target);
da0b0e8b 236
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237 return(ip->ip_windex);
238}
239
240/*
241 * Similar to lwkt_send_ipiq() but this function does not actually initiate
242 * the IPI to the target cpu unless the FIFO has become too full, so it is
243 * very fast.
244 *
245 * This function is used for non-critical IPI messages, such as memory
246 * deallocations. The queue will typically be flushed by the target cpu at
247 * the next clock interrupt.
248 *
249 * Need not be called from a critical section.
250 */
251int
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252lwkt_send_ipiq3_passive(globaldata_t target, ipifunc3_t func,
253 void *arg1, int arg2)
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254{
255 lwkt_ipiq_t ip;
256 int windex;
257 struct globaldata *gd = mycpu;
258
259 KKASSERT(target != gd);
260 crit_enter();
261 ++gd->gd_intr_nesting_level;
da0b0e8b 262 logipiq(send_pasv, func, arg1, arg2, gd, target);
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263#ifdef INVARIANTS
264 if (gd->gd_intr_nesting_level > 20)
265 panic("lwkt_send_ipiq: TOO HEAVILY NESTED!");
266#endif
f9235b6d 267 KKASSERT(curthread->td_critcount);
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268 ++ipiq_count;
269 ++ipiq_passive;
270 ip = &gd->gd_ipiq[target->gd_cpuid];
271
272 /*
273 * Do not allow the FIFO to become full. Interrupts must be physically
274 * enabled while we liveloop to avoid deadlocking the APIC.
275 */
3b6b7bd1 276 if (ip->ip_windex - ip->ip_rindex > MAXCPUFIFO / 2) {
46d4e165 277#if defined(__i386__)
3b6b7bd1 278 unsigned int eflags = read_eflags();
b2b3ffcd 279#elif defined(__x86_64__)
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JG
280 unsigned long rflags = read_rflags();
281#endif
4c9f5a7f 282
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283 cpu_enable_intr();
284 ++ipiq_fifofull;
cfaeae2a 285 DEBUG_PUSH_INFO("send_ipiq3_passive");
3b6b7bd1 286 while (ip->ip_windex - ip->ip_rindex > MAXCPUFIFO / 4) {
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287 if (atomic_poll_acquire_int(&ip->ip_npoll) || ipiq_optimized == 0) {
288 logipiq(cpu_send, func, arg1, arg2, gd, target);
289 cpu_send_ipiq(target->gd_cpuid);
290 }
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291 KKASSERT(ip->ip_windex - ip->ip_rindex != MAXCPUFIFO - 1);
292 lwkt_process_ipiq();
da0b0e8b 293 cpu_pause();
3b6b7bd1 294 }
cfaeae2a 295 DEBUG_POP_INFO();
46d4e165 296#if defined(__i386__)
3b6b7bd1 297 write_eflags(eflags);
b2b3ffcd 298#elif defined(__x86_64__)
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299 write_rflags(rflags);
300#endif
3b6b7bd1 301 }
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302
303 /*
304 * Queue the new message
305 */
306 windex = ip->ip_windex & MAXCPUFIFO_MASK;
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307 ip->ip_func[windex] = func;
308 ip->ip_arg1[windex] = arg1;
309 ip->ip_arg2[windex] = arg2;
35238fa5 310 cpu_sfence();
4c9f5a7f 311 ++ip->ip_windex;
3b6b7bd1 312 --gd->gd_intr_nesting_level;
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313
314 /*
315 * Do not signal the target cpu, it will pick up the IPI when it next
316 * polls (typically on the next tick).
317 */
3b6b7bd1 318 crit_exit();
c92e86f1 319 logipiq(send_end, func, arg1, arg2, gd, target);
da0b0e8b 320
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321 return(ip->ip_windex);
322}
323
41a01a4d 324/*
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325 * Send an IPI request without blocking, return 0 on success, ENOENT on
326 * failure. The actual queueing of the hardware IPI may still force us
327 * to spin and process incoming IPIs but that will eventually go away
328 * when we've gotten rid of the other general IPIs.
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329 */
330int
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331lwkt_send_ipiq3_nowait(globaldata_t target, ipifunc3_t func,
332 void *arg1, int arg2)
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333{
334 lwkt_ipiq_t ip;
335 int windex;
336 struct globaldata *gd = mycpu;
337
a7adb95a 338 logipiq(send_nbio, func, arg1, arg2, gd, target);
f9235b6d 339 KKASSERT(curthread->td_critcount);
41a01a4d 340 if (target == gd) {
b8a98473 341 func(arg1, arg2, NULL);
c92e86f1 342 logipiq(send_end, func, arg1, arg2, gd, target);
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343 return(0);
344 }
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345 crit_enter();
346 ++gd->gd_intr_nesting_level;
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347 ++ipiq_count;
348 ip = &gd->gd_ipiq[target->gd_cpuid];
349
ac72c7f4 350 if (ip->ip_windex - ip->ip_rindex >= MAXCPUFIFO * 2 / 3) {
a7adb95a 351 logipiq(send_fail, func, arg1, arg2, gd, target);
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352 --gd->gd_intr_nesting_level;
353 crit_exit();
41a01a4d 354 return(ENOENT);
ac72c7f4 355 }
41a01a4d 356 windex = ip->ip_windex & MAXCPUFIFO_MASK;
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357 ip->ip_func[windex] = func;
358 ip->ip_arg1[windex] = arg1;
359 ip->ip_arg2[windex] = arg2;
35238fa5 360 cpu_sfence();
41a01a4d 361 ++ip->ip_windex;
4c9f5a7f 362
41a01a4d 363 /*
4c9f5a7f 364 * This isn't a passive IPI, we still have to signal the target cpu.
41a01a4d 365 */
da0b0e8b 366 if (atomic_poll_acquire_int(&ip->ip_npoll) || ipiq_optimized == 0) {
866b61fb 367 logipiq(cpu_send, func, arg1, arg2, gd, target);
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368 cpu_send_ipiq(target->gd_cpuid);
369 } else {
da0b0e8b 370 ++ipiq_avoided;
4c9f5a7f 371 }
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372 --gd->gd_intr_nesting_level;
373 crit_exit();
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374
375 logipiq(send_end, func, arg1, arg2, gd, target);
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376 return(0);
377}
378
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379/*
380 * deprecated, used only by fast int forwarding.
381 */
382int
b8a98473 383lwkt_send_ipiq3_bycpu(int dcpu, ipifunc3_t func, void *arg1, int arg2)
3b6b7bd1 384{
b8a98473 385 return(lwkt_send_ipiq3(globaldata_find(dcpu), func, arg1, arg2));
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386}
387
388/*
389 * Send a message to several target cpus. Typically used for scheduling.
390 * The message will not be sent to stopped cpus.
391 */
392int
da23a592 393lwkt_send_ipiq3_mask(cpumask_t mask, ipifunc3_t func, void *arg1, int arg2)
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394{
395 int cpuid;
396 int count = 0;
397
398 mask &= ~stopped_cpus;
399 while (mask) {
da23a592 400 cpuid = BSFCPUMASK(mask);
b8a98473 401 lwkt_send_ipiq3(globaldata_find(cpuid), func, arg1, arg2);
da23a592 402 mask &= ~CPUMASK(cpuid);
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403 ++count;
404 }
405 return(count);
406}
407
408/*
409 * Wait for the remote cpu to finish processing a function.
410 *
411 * YYY we have to enable interrupts and process the IPIQ while waiting
412 * for it to empty or we may deadlock with another cpu. Create a CPU_*()
413 * function to do this! YYY we really should 'block' here.
414 *
415 * MUST be called from a critical section. This routine may be called
416 * from an interrupt (for example, if an interrupt wakes a foreign thread
417 * up).
418 */
419void
420lwkt_wait_ipiq(globaldata_t target, int seq)
421{
422 lwkt_ipiq_t ip;
423 int maxc = 100000000;
424
425 if (target != mycpu) {
426 ip = &mycpu->gd_ipiq[target->gd_cpuid];
427 if ((int)(ip->ip_xindex - seq) < 0) {
46d4e165 428#if defined(__i386__)
3b6b7bd1 429 unsigned int eflags = read_eflags();
b2b3ffcd 430#elif defined(__x86_64__)
46d4e165
JG
431 unsigned long rflags = read_rflags();
432#endif
3b6b7bd1 433 cpu_enable_intr();
cfaeae2a 434 DEBUG_PUSH_INFO("wait_ipiq");
3b6b7bd1 435 while ((int)(ip->ip_xindex - seq) < 0) {
41a01a4d 436 crit_enter();
3b6b7bd1 437 lwkt_process_ipiq();
41a01a4d 438 crit_exit();
3b6b7bd1 439 if (--maxc == 0)
6ea70f76 440 kprintf("LWKT_WAIT_IPIQ WARNING! %d wait %d (%d)\n", mycpu->gd_cpuid, target->gd_cpuid, ip->ip_xindex - seq);
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441 if (maxc < -1000000)
442 panic("LWKT_WAIT_IPIQ");
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443 /*
444 * xindex may be modified by another cpu, use a load fence
445 * to ensure that the loop does not use a speculative value
446 * (which may improve performance).
447 */
448 cpu_lfence();
3b6b7bd1 449 }
cfaeae2a 450 DEBUG_POP_INFO();
46d4e165 451#if defined(__i386__)
3b6b7bd1 452 write_eflags(eflags);
b2b3ffcd 453#elif defined(__x86_64__)
46d4e165
JG
454 write_rflags(rflags);
455#endif
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456 }
457 }
458}
459
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460int
461lwkt_seq_ipiq(globaldata_t target)
462{
463 lwkt_ipiq_t ip;
464
465 ip = &mycpu->gd_ipiq[target->gd_cpuid];
466 return(ip->ip_windex);
467}
468
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469/*
470 * Called from IPI interrupt (like a fast interrupt), which has placed
471 * us in a critical section. The MP lock may or may not be held.
472 * May also be called from doreti or splz, or be reentrantly called
473 * indirectly through the ip_func[] we run.
474 *
475 * There are two versions, one where no interrupt frame is available (when
476 * called from the send code and from splz, and one where an interrupt
477 * frame is available.
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478 *
479 * When the current cpu is mastering a cpusync we do NOT internally loop
480 * on the cpusyncq poll. We also do not re-flag a pending ipi due to
481 * the cpusyncq poll because this can cause doreti/splz to loop internally.
482 * The cpusync master's own loop must be allowed to run to avoid a deadlock.
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483 */
484void
485lwkt_process_ipiq(void)
486{
487 globaldata_t gd = mycpu;
ac72c7f4 488 globaldata_t sgd;
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489 lwkt_ipiq_t ip;
490 int n;
491
da0b0e8b 492 ++gd->gd_processing_ipiq;
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MD
493again:
494 for (n = 0; n < ncpus; ++n) {
495 if (n != gd->gd_cpuid) {
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496 sgd = globaldata_find(n);
497 ip = sgd->gd_ipiq;
3b6b7bd1 498 if (ip != NULL) {
b8a98473 499 while (lwkt_process_ipiq_core(sgd, &ip[gd->gd_cpuid], NULL))
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MD
500 ;
501 }
502 }
503 }
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MD
504 if (lwkt_process_ipiq_core(gd, &gd->gd_cpusyncq, NULL)) {
505 if (gd->gd_curthread->td_cscount == 0)
506 goto again;
507 /* need_ipiq(); do not reflag */
3b6b7bd1 508 }
da0b0e8b 509 --gd->gd_processing_ipiq;
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MD
510}
511
3b6b7bd1 512void
c7eb0589 513lwkt_process_ipiq_frame(struct intrframe *frame)
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MD
514{
515 globaldata_t gd = mycpu;
ac72c7f4 516 globaldata_t sgd;
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517 lwkt_ipiq_t ip;
518 int n;
519
520again:
521 for (n = 0; n < ncpus; ++n) {
522 if (n != gd->gd_cpuid) {
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MD
523 sgd = globaldata_find(n);
524 ip = sgd->gd_ipiq;
3b6b7bd1 525 if (ip != NULL) {
c7eb0589 526 while (lwkt_process_ipiq_core(sgd, &ip[gd->gd_cpuid], frame))
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MD
527 ;
528 }
529 }
530 }
531 if (gd->gd_cpusyncq.ip_rindex != gd->gd_cpusyncq.ip_windex) {
c7eb0589 532 if (lwkt_process_ipiq_core(gd, &gd->gd_cpusyncq, frame)) {
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MD
533 if (gd->gd_curthread->td_cscount == 0)
534 goto again;
da0b0e8b 535 /* need_ipiq(); do not reflag */
0f7a3396 536 }
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MD
537 }
538}
3b6b7bd1 539
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540#if 0
541static int iqticks[SMP_MAXCPU];
542static int iqcount[SMP_MAXCPU];
543#endif
544#if 0
545static int iqterm[SMP_MAXCPU];
546#endif
547
3b6b7bd1 548static int
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549lwkt_process_ipiq_core(globaldata_t sgd, lwkt_ipiq_t ip,
550 struct intrframe *frame)
3b6b7bd1 551{
2de4f77e 552 globaldata_t mygd = mycpu;
3b6b7bd1 553 int ri;
35238fa5 554 int wi;
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MD
555 ipifunc3_t copy_func;
556 void *copy_arg1;
557 int copy_arg2;
35238fa5 558
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559#if 0
560 if (iqticks[mygd->gd_cpuid] != ticks) {
561 iqticks[mygd->gd_cpuid] = ticks;
562 iqcount[mygd->gd_cpuid] = 0;
563 }
564 if (++iqcount[mygd->gd_cpuid] > 3000000) {
565 kprintf("cpu %d ipiq maxed cscount %d spin %d\n",
566 mygd->gd_cpuid,
567 mygd->gd_curthread->td_cscount,
568 mygd->gd_spinlocks_wr);
569 iqcount[mygd->gd_cpuid] = 0;
570#if 0
571 if (++iqterm[mygd->gd_cpuid] > 10)
572 panic("cpu %d ipiq maxed", mygd->gd_cpuid);
573#endif
574 int i;
575 for (i = 0; i < ncpus; ++i) {
576 if (globaldata_find(i)->gd_infomsg)
577 kprintf(" %s", globaldata_find(i)->gd_infomsg);
578 }
579 kprintf("\n");
580 }
581#endif
582
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MD
583 /*
584 * Obtain the current write index, which is modified by a remote cpu.
585 * Issue a load fence to prevent speculative reads of e.g. data written
586 * by the other cpu prior to it updating the index.
587 */
f9235b6d 588 KKASSERT(curthread->td_critcount);
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589 wi = ip->ip_windex;
590 cpu_lfence();
2de4f77e 591 ++mygd->gd_intr_nesting_level;
35238fa5 592
3b6b7bd1 593 /*
562273ea
MD
594 * NOTE: xindex is only updated after we are sure the function has
595 * finished execution. Beware lwkt_process_ipiq() reentrancy!
596 * The function may send an IPI which may block/drain.
d64a7617 597 *
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MD
598 * NOTE: Due to additional IPI operations that the callback function
599 * may make, it is possible for both rindex and windex to advance and
600 * thus for rindex to advance passed our cached windex.
601 *
d5b2d319 602 * NOTE: A load fence is required to prevent speculative loads prior
562273ea 603 * to the loading of ip_rindex. Even though stores might be
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MD
604 * ordered, loads are probably not. A memory fence is required
605 * to prevent reordering of the loads after the ip_rindex update.
3b6b7bd1 606 */
d64a7617 607 while (wi - (ri = ip->ip_rindex) > 0) {
3b6b7bd1 608 ri &= MAXCPUFIFO_MASK;
d5b2d319 609 cpu_lfence();
728f6208 610 copy_func = ip->ip_func[ri];
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MD
611 copy_arg1 = ip->ip_arg1[ri];
612 copy_arg2 = ip->ip_arg2[ri];
d5b2d319 613 cpu_mfence();
728f6208 614 ++ip->ip_rindex;
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MD
615 KKASSERT((ip->ip_rindex & MAXCPUFIFO_MASK) ==
616 ((ri + 1) & MAXCPUFIFO_MASK));
a7adb95a 617 logipiq(receive, copy_func, copy_arg1, copy_arg2, sgd, mycpu);
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MD
618#ifdef INVARIANTS
619 if (ipiq_debug && (ip->ip_rindex & 0xFFFFFF) == 0) {
620 kprintf("cpu %d ipifunc %p %p %d (frame %p)\n",
621 mycpu->gd_cpuid,
622 copy_func, copy_arg1, copy_arg2,
623#if defined(__i386__)
624 (frame ? (void *)frame->if_eip : NULL));
625#elif defined(__amd64__)
626 (frame ? (void *)frame->if_rip : NULL));
627#else
628 NULL);
629#endif
630 }
631#endif
b8a98473 632 copy_func(copy_arg1, copy_arg2, frame);
35238fa5 633 cpu_sfence();
3b6b7bd1 634 ip->ip_xindex = ip->ip_rindex;
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MD
635
636#ifdef PANIC_DEBUG
637 /*
638 * Simulate panics during the processing of an IPI
639 */
640 if (mycpu->gd_cpuid == panic_ipiq_cpu && panic_ipiq_count) {
641 if (--panic_ipiq_count == 0) {
642#ifdef DDB
643 Debugger("PANIC_DEBUG");
644#else
645 panic("PANIC_DEBUG");
646#endif
647 }
648 }
649#endif
3b6b7bd1 650 }
2de4f77e 651 --mygd->gd_intr_nesting_level;
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MD
652
653 /*
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MD
654 * If the queue is empty release ip_npoll to enable the other cpu to
655 * send us an IPI interrupt again.
656 *
657 * Return non-zero if there is still more in the queue. Note that we
658 * must re-check the indexes after potentially releasing ip_npoll. The
659 * caller must loop or otherwise ensure that a loop will occur prior to
660 * blocking.
4c9f5a7f 661 */
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MD
662 if (ip->ip_rindex == ip->ip_windex);
663 atomic_poll_release_int(&ip->ip_npoll);
664 cpu_lfence();
665 return (ip->ip_rindex != ip->ip_windex);
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MD
666}
667
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668static void
669lwkt_sync_ipiq(void *arg)
670{
5a1a2253 671 volatile cpumask_t *cpumask = arg;
6c92c1f2 672
da23a592 673 atomic_clear_cpumask(cpumask, mycpu->gd_cpumask);
6c92c1f2
SZ
674 if (*cpumask == 0)
675 wakeup(cpumask);
676}
677
678void
679lwkt_synchronize_ipiqs(const char *wmesg)
680{
5a1a2253 681 volatile cpumask_t other_cpumask;
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SZ
682
683 other_cpumask = mycpu->gd_other_cpus & smp_active_mask;
5a1a2253
SZ
684 lwkt_send_ipiq_mask(other_cpumask, lwkt_sync_ipiq,
685 __DEVOLATILE(void *, &other_cpumask));
6c92c1f2 686
6c92c1f2 687 while (other_cpumask != 0) {
ae8e83e6 688 tsleep_interlock(&other_cpumask, 0);
6c92c1f2 689 if (other_cpumask != 0)
d9345d3a 690 tsleep(&other_cpumask, PINTERLOCKED, wmesg, 0);
6c92c1f2 691 }
6c92c1f2
SZ
692}
693
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694#endif
695
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696/*
697 * CPU Synchronization Support
5c71a36a 698 *
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699 * lwkt_cpusync_interlock() - Place specified cpus in a quiescent state.
700 * The current cpu is placed in a hard critical
701 * section.
5c71a36a 702 *
d5b2d319
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703 * lwkt_cpusync_deinterlock() - Execute cs_func on specified cpus, including
704 * current cpu if specified, then return.
3b6b7bd1 705 */
3b6b7bd1 706void
d5b2d319 707lwkt_cpusync_simple(cpumask_t mask, cpusync_func_t func, void *arg)
5c71a36a 708{
d5b2d319 709 struct lwkt_cpusync cs;
5c71a36a 710
d5b2d319
MD
711 lwkt_cpusync_init(&cs, mask, func, arg);
712 lwkt_cpusync_interlock(&cs);
713 lwkt_cpusync_deinterlock(&cs);
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MD
714}
715
d5b2d319 716
5c71a36a 717void
d5b2d319 718lwkt_cpusync_interlock(lwkt_cpusync_t cs)
3b6b7bd1 719{
d5b2d319 720#ifdef SMP
0f7a3396 721 globaldata_t gd = mycpu;
d5b2d319 722 cpumask_t mask;
0f7a3396 723
d5b2d319
MD
724 /*
725 * mask acknowledge (cs_mack): 0->mask for stage 1
726 *
727 * mack does not include the current cpu.
728 */
729 mask = cs->cs_mask & gd->gd_other_cpus & smp_active_mask;
730 cs->cs_mack = 0;
731 crit_enter_id("cpusync");
732 if (mask) {
cfaeae2a 733 DEBUG_PUSH_INFO("cpusync_interlock");
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MD
734 ++ipiq_cscount;
735 ++gd->gd_curthread->td_cscount;
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736 lwkt_send_ipiq_mask(mask, (ipifunc1_t)lwkt_cpusync_remote1, cs);
737 logipiq2(sync_start, mask);
738 while (cs->cs_mack != mask) {
0f7a3396 739 lwkt_process_ipiq();
d5b2d319 740 cpu_pause();
0f7a3396 741 }
cfaeae2a 742 DEBUG_POP_INFO();
3b6b7bd1 743 }
d5b2d319
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744#else
745 cs->cs_mack = 0;
0f7a3396 746#endif
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MD
747}
748
749/*
d5b2d319
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750 * Interlocked cpus have executed remote1 and are polling in remote2.
751 * To deinterlock we clear cs_mack and wait for the cpus to execute
752 * the func and set their bit in cs_mack again.
0f7a3396 753 *
3b6b7bd1
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754 */
755void
d5b2d319 756lwkt_cpusync_deinterlock(lwkt_cpusync_t cs)
3b6b7bd1 757{
0f7a3396 758 globaldata_t gd = mycpu;
0f7a3396 759#ifdef SMP
d5b2d319
MD
760 cpumask_t mask;
761
762 /*
763 * mask acknowledge (cs_mack): mack->0->mack for stage 2
764 *
765 * Clearing cpu bits for polling cpus in cs_mack will cause them to
766 * execute stage 2, which executes the cs_func(cs_data) and then sets
767 * their bit in cs_mack again.
768 *
769 * mack does not include the current cpu.
770 */
771 mask = cs->cs_mack;
772 cpu_ccfence();
773 cs->cs_mack = 0;
774 if (cs->cs_func && (cs->cs_mask & gd->gd_cpumask))
775 cs->cs_func(cs->cs_data);
776 if (mask) {
cfaeae2a 777 DEBUG_PUSH_INFO("cpusync_deinterlock");
d5b2d319 778 while (cs->cs_mack != mask) {
0f7a3396 779 lwkt_process_ipiq();
d5b2d319 780 cpu_pause();
0f7a3396 781 }
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MD
782 DEBUG_POP_INFO();
783 /*
784 * cpusyncq ipis may be left queued without the RQF flag set due to
785 * a non-zero td_cscount, so be sure to process any laggards after
786 * decrementing td_cscount.
787 */
0f7a3396 788 --gd->gd_curthread->td_cscount;
d5b2d319
MD
789 lwkt_process_ipiq();
790 logipiq2(sync_end, mask);
3b6b7bd1 791 }
d5b2d319
MD
792 crit_exit_id("cpusync");
793#else
794 if (cs->cs_func && (cs->cs_mask & gd->gd_cpumask))
795 cs->cs_func(cs->cs_data);
0f7a3396 796#endif
3b6b7bd1
MD
797}
798
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799#ifdef SMP
800
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801/*
802 * helper IPI remote messaging function.
803 *
804 * Called on remote cpu when a new cpu synchronization request has been
805 * sent to us. Execute the run function and adjust cs_count, then requeue
806 * the request so we spin on it.
807 */
808static void
d5b2d319 809lwkt_cpusync_remote1(lwkt_cpusync_t cs)
3b6b7bd1 810{
d5b2d319
MD
811 globaldata_t gd = mycpu;
812
813 atomic_set_cpumask(&cs->cs_mack, gd->gd_cpumask);
814 lwkt_cpusync_remote2(cs);
3b6b7bd1
MD
815}
816
817/*
818 * helper IPI remote messaging function.
819 *
820 * Poll for the originator telling us to finish. If it hasn't, requeue
d5b2d319 821 * our request so we spin on it.
3b6b7bd1
MD
822 */
823static void
d5b2d319 824lwkt_cpusync_remote2(lwkt_cpusync_t cs)
3b6b7bd1 825{
d5b2d319
MD
826 globaldata_t gd = mycpu;
827
828 if ((cs->cs_mack & gd->gd_cpumask) == 0) {
829 if (cs->cs_func)
830 cs->cs_func(cs->cs_data);
831 atomic_set_cpumask(&cs->cs_mack, gd->gd_cpumask);
3b6b7bd1 832 } else {
3b6b7bd1
MD
833 lwkt_ipiq_t ip;
834 int wi;
835
836 ip = &gd->gd_cpusyncq;
837 wi = ip->ip_windex & MAXCPUFIFO_MASK;
b8a98473 838 ip->ip_func[wi] = (ipifunc3_t)(ipifunc1_t)lwkt_cpusync_remote2;
d5b2d319 839 ip->ip_arg1[wi] = cs;
b8a98473 840 ip->ip_arg2[wi] = 0;
35238fa5 841 cpu_sfence();
3b6b7bd1 842 ++ip->ip_windex;
37494a7a 843 if (ipiq_debug && (ip->ip_windex & 0xFFFFFF) == 0) {
cfaeae2a
MD
844 kprintf("cpu %d cm=%016jx %016jx f=%p\n",
845 gd->gd_cpuid,
846 (intmax_t)cs->cs_mask, (intmax_t)cs->cs_mack,
847 cs->cs_func);
37494a7a 848 }
3b6b7bd1
MD
849 }
850}
851
3b6b7bd1 852#endif