2 * Copyright (c) 1997, Stefan Esser <se@freebsd.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice unmodified, this list of conditions, and the following
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 * $FreeBSD: src/sys/i386/isa/pcibus.c,v 1.57.2.11 2002/11/13 21:40:40 peter Exp $
27 * $DragonFly: src/sys/bus/pci/i386/pcibus.c,v 1.6 2004/01/15 20:41:57 joerg Exp $
31 #include <sys/param.h>
32 #include <sys/systm.h>
34 #include <sys/kernel.h>
35 #include <sys/malloc.h>
37 #include <bus/pci/pcivar.h>
38 #include <bus/pci/pcireg.h>
39 #include <bus/pci/i386/pcibus.h>
40 #include <bus/isa/isavar.h>
41 #include <bus/pci/i386/pci_cfgreg.h>
42 #include <machine/md_var.h>
43 #include <machine/nexusvar.h>
48 nexus_pcib_maxslots(device_t dev)
54 * Read configuration space register.
57 nexus_pcib_read_config(device_t dev, int bus, int slot, int func,
60 return (pci_cfgregread(bus, slot, func, reg, bytes));
64 nexus_pcib_write_config(device_t dev, int bus, int slot, int func,
65 int reg, u_int32_t data, int bytes)
67 pci_cfgregwrite(bus, slot, func, reg, data, bytes);
70 static devclass_t pcib_devclass;
73 nexus_pcib_is_host_bridge(int bus, int slot, int func,
74 u_int32_t id, u_int8_t class, u_int8_t subclass,
78 static u_int8_t pxb[4]; /* hack for 450nx */
84 s = "Intel 824?? host to PCI bridge";
85 /* XXX This is a guess */
86 /* *busnum = nexus_pcib_read_config(0, bus, slot, func, 0x41, 1); */
90 s = "Intel 82810 (i810 GMCH) Host To Hub bridge";
93 s = "Intel 82810-DC100 (i810-DC100 GMCH) Host To Hub bridge";
96 s = "Intel 82810E (i810E GMCH) Host To Hub bridge";
99 s = "Intel 82443LX (440 LX) host to PCI bridge";
102 s = "Intel 82443BX (440 BX) host to PCI bridge";
105 s = "Intel 82443BX host to PCI bridge (AGP disabled)";
108 s = "Intel 82443MX host to PCI bridge";
111 s = "Intel 82443GX host to PCI bridge";
114 s = "Intel 82443GX host to AGP bridge";
117 s = "Intel 82443GX host to PCI bridge (AGP disabled)";
120 s = "Intel 82454KX/GX (Orion) host to PCI bridge";
121 *busnum = nexus_pcib_read_config(0, bus, slot, func, 0x4a, 1);
125 * For the 450nx chipset, there is a whole bundle of
126 * things pretending to be host bridges. The MIOC will
127 * be seen first and isn't really a pci bridge (the
128 * actual busses are attached to the PXB's). We need to
129 * read the registers of the MIOC to figure out the
130 * bus numbers for the PXB channels.
132 * Since the MIOC doesn't have a pci bus attached, we
133 * pretend it wasn't there.
135 pxb[0] = nexus_pcib_read_config(0, bus, slot, func,
136 0xd0, 1); /* BUSNO[0] */
137 pxb[1] = nexus_pcib_read_config(0, bus, slot, func,
138 0xd1, 1) + 1; /* SUBA[0]+1 */
139 pxb[2] = nexus_pcib_read_config(0, bus, slot, func,
140 0xd3, 1); /* BUSNO[1] */
141 pxb[3] = nexus_pcib_read_config(0, bus, slot, func,
142 0xd4, 1) + 1; /* SUBA[1]+1 */
147 s = "Intel 82454NX PXB#0, Bus#A";
151 s = "Intel 82454NX PXB#0, Bus#B";
155 s = "Intel 82454NX PXB#1, Bus#A";
159 s = "Intel 82454NX PXB#1, Bus#B";
165 s = "Intel 82845 Host to PCI bridge";
168 /* AMD -- vendor 0x1022 */
170 s = "AMD Elan SC520 host to PCI bridge";
172 init_AMD_Elan_sc520();
174 printf("*** WARNING: kernel option CPU_ELAN missing");
175 printf("-- timekeeping may be wrong\n");
179 s = "AMD-751 host to PCI bridge";
182 s = "AMD-761 host to PCI bridge";
185 /* SiS -- vendor 0x1039 */
196 s = "SiS 5591 host to PCI bridge";
199 s = "SiS 5591 host to AGP bridge";
202 /* VLSI -- vendor 0x1004 */
204 s = "VLSI 82C592 Host to PCI bridge";
207 /* XXX Here is MVP3, I got the datasheet but NO M/B to test it */
208 /* totally. Please let me know if anything wrong. -F */
209 /* XXX need info on the MVP3 -- any takers? */
211 s = "VIA 82C598MVP (Apollo MVP3) host bridge";
214 /* AcerLabs -- vendor 0x10b9 */
215 /* Funny : The datasheet told me vendor id is "10b8",sub-vendor */
216 /* id is '10b9" but the register always shows "10b9". -Foxfair */
218 s = "AcerLabs M1541 (Aladdin-V) PCI host bridge";
221 /* OPTi -- vendor 0x1045 */
223 s = "OPTi 82C700 host to PCI bridge";
226 s = "OPTi 82C822 host to PCI Bridge";
229 /* ServerWorks -- vendor 0x1166 */
231 s = "ServerWorks NB6536 2.0HE host to PCI bridge";
232 *busnum = nexus_pcib_read_config(0, bus, slot, func, 0x44, 1);
238 s = "ServerWorks host to PCI bridge";
239 *busnum = nexus_pcib_read_config(0, bus, slot, func, 0x44, 1);
243 s = "ServerWorks NB6635 3.0LE host to PCI bridge";
244 *busnum = nexus_pcib_read_config(0, bus, slot, func, 0x44, 1);
248 s = "ServerWorks CIOB30 host to PCI bridge";
249 *busnum = nexus_pcib_read_config(0, bus, slot, func, 0x44, 1);
252 /* XXX unknown chipset, but working */
256 s = "ServerWorks host to PCI bridge(unknown chipset)";
257 *busnum = nexus_pcib_read_config(0, bus, slot, func, 0x44, 1);
260 /* Integrated Micro Solutions -- vendor 0x10e0 */
262 s = "Integrated Micro Solutions VL Bridge";
266 if (class == PCIC_BRIDGE && subclass == PCIS_BRIDGE_HOST)
267 s = "Host to PCI bridge";
275 * Scan the first pci bus for host-pci bridges and add pcib instances
276 * to the nexus for each bridge.
279 nexus_pcib_identify(driver_t *driver, device_t parent)
287 devclass_t pci_devclass;
289 if (pci_cfgregopen() == 0)
292 * Check to see if we haven't already had a PCI bus added
293 * via some other means. If we have, bail since otherwise
294 * we're going to end up duplicating it.
296 if ((pci_devclass = devclass_find("pci")) &&
297 devclass_get_device(pci_devclass,0))
302 for (slot = 0; slot <= PCI_SLOTMAX; slot++) {
304 hdrtype = nexus_pcib_read_config(0, bus, slot, func,
306 if (hdrtype & PCIM_MFDEV)
310 for (func = 0; func <= pcifunchigh; func++) {
312 * Read the IDs and class from the device.
315 u_int8_t class, subclass, busnum;
320 id = nexus_pcib_read_config(0, bus, slot, func,
324 class = nexus_pcib_read_config(0, bus, slot, func,
326 subclass = nexus_pcib_read_config(0, bus, slot, func,
329 s = nexus_pcib_is_host_bridge(bus, slot, func,
336 * Check to see if the physical bus has already
337 * been seen. Eg: hybrid 32 and 64 bit host
338 * bridges to the same logical bus.
340 if (device_get_children(parent, &devs, &ndevs) == 0) {
341 for (i = 0; s != NULL && i < ndevs; i++) {
342 if (strcmp(device_get_name(devs[i]),
345 if (nexus_get_pcibus(devs[i]) == busnum)
354 * Add at priority 100 to make sure we
355 * go after any motherboard resources
357 child = BUS_ADD_CHILD(parent, 100,
359 device_set_desc(child, s);
360 nexus_set_pcibus(child, busnum);
363 if (id == 0x12258086)
367 if (found824xx && bus == 0) {
373 * Make sure we add at least one bridge since some old
374 * hardware doesn't actually have a host-pci bridge device.
375 * Note that pci_cfgregopen() thinks we have PCI devices..
380 "nexus_pcib_identify: no bridge found, adding pcib0 anyway\n");
381 child = BUS_ADD_CHILD(parent, 100, "pcib", 0);
382 nexus_set_pcibus(child, 0);
387 nexus_pcib_probe(device_t dev)
389 devclass_t pci_devclass;
391 if (pci_cfgregopen() == 0)
394 * Check to see if we haven't already had a PCI bus added
395 * via some other means. If we have, bail since otherwise
396 * we're going to end up duplicating it.
398 if ((pci_devclass = devclass_find("pci")) &&
399 devclass_get_device(pci_devclass, device_get_unit(dev)))
406 nexus_pcib_attach(device_t dev)
410 child = device_add_child(dev, "pci", device_get_unit(dev));
412 return (bus_generic_attach(dev));
416 nexus_pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
420 *result = nexus_get_pcibus(dev);
427 nexus_pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
431 nexus_set_pcibus(dev, value);
437 /* route interrupt */
440 nexus_pcib_route_interrupt(device_t pcib, device_t dev, int pin)
442 return(pci_cfgintr(pci_get_bus(dev), pci_get_slot(dev), pin,
446 static device_method_t nexus_pcib_methods[] = {
447 /* Device interface */
448 DEVMETHOD(device_identify, nexus_pcib_identify),
449 DEVMETHOD(device_probe, nexus_pcib_probe),
450 DEVMETHOD(device_attach, nexus_pcib_attach),
451 DEVMETHOD(device_shutdown, bus_generic_shutdown),
452 DEVMETHOD(device_suspend, bus_generic_suspend),
453 DEVMETHOD(device_resume, bus_generic_resume),
456 DEVMETHOD(bus_print_child, bus_generic_print_child),
457 DEVMETHOD(bus_read_ivar, nexus_pcib_read_ivar),
458 DEVMETHOD(bus_write_ivar, nexus_pcib_write_ivar),
459 DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource),
460 DEVMETHOD(bus_release_resource, bus_generic_release_resource),
461 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
462 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
463 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
464 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
467 DEVMETHOD(pcib_maxslots, nexus_pcib_maxslots),
468 DEVMETHOD(pcib_read_config, nexus_pcib_read_config),
469 DEVMETHOD(pcib_write_config, nexus_pcib_write_config),
470 DEVMETHOD(pcib_route_interrupt, nexus_pcib_route_interrupt),
475 static driver_t nexus_pcib_driver = {
481 DRIVER_MODULE(pcib, nexus, nexus_pcib_driver, pcib_devclass, 0, 0);
485 * Provide a device to "eat" the host->pci bridges that we dug up above
486 * and stop them showing up twice on the probes. This also stops them
487 * showing up as 'none' in pciconf -l.
490 pci_hostb_probe(device_t dev)
492 if (pci_get_class(dev) == PCIC_BRIDGE &&
493 pci_get_subclass(dev) == PCIS_BRIDGE_HOST) {
494 device_set_desc(dev, "Host to PCI bridge");
502 pci_hostb_attach(device_t dev)
507 static device_method_t pci_hostb_methods[] = {
508 /* Device interface */
509 DEVMETHOD(device_probe, pci_hostb_probe),
510 DEVMETHOD(device_attach, pci_hostb_attach),
511 DEVMETHOD(device_shutdown, bus_generic_shutdown),
512 DEVMETHOD(device_suspend, bus_generic_suspend),
513 DEVMETHOD(device_resume, bus_generic_resume),
517 static driver_t pci_hostb_driver = {
522 static devclass_t pci_hostb_devclass;
524 DRIVER_MODULE(hostb, pci, pci_hostb_driver, pci_hostb_devclass, 0, 0);
528 * Install placeholder to claim the resources owned by the
529 * PCI bus interface. This could be used to extract the
530 * config space registers in the extreme case where the PnP
531 * ID is available and the PCI BIOS isn't, but for now we just
532 * eat the PnP ID and do nothing else.
534 * XXX we should silence this probe, as it will generally confuse
537 static struct isa_pnp_id pcibus_pnp_ids[] = {
538 { 0x030ad041 /* PNP030A */, "PCI Bus" },
543 pcibus_pnp_probe(device_t dev)
547 if ((result = ISA_PNP_PROBE(device_get_parent(dev), dev, pcibus_pnp_ids)) <= 0)
553 pcibus_pnp_attach(device_t dev)
558 static device_method_t pcibus_pnp_methods[] = {
559 /* Device interface */
560 DEVMETHOD(device_probe, pcibus_pnp_probe),
561 DEVMETHOD(device_attach, pcibus_pnp_attach),
562 DEVMETHOD(device_detach, bus_generic_detach),
563 DEVMETHOD(device_shutdown, bus_generic_shutdown),
564 DEVMETHOD(device_suspend, bus_generic_suspend),
565 DEVMETHOD(device_resume, bus_generic_resume),
569 static driver_t pcibus_pnp_driver = {
575 static devclass_t pcibus_pnp_devclass;
577 DRIVER_MODULE(pcibus_pnp, isa, pcibus_pnp_driver, pcibus_pnp_devclass, 0, 0);