2 * Copyright © 1997-2003 by The XFree86 Project, Inc.
3 * Copyright © 2007 Dave Airlie
4 * Copyright © 2007-2008 Intel Corporation
5 * Jesse Barnes <jesse.barnes@intel.com>
6 * Copyright 2005-2006 Luc Verhaegen
7 * Copyright (c) 2001, Andy Ritger aritger@nvidia.com
9 * Permission is hereby granted, free of charge, to any person obtaining a
10 * copy of this software and associated documentation files (the "Software"),
11 * to deal in the Software without restriction, including without limitation
12 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
16 * The above copyright notice and this permission notice shall be included in
17 * all copies or substantial portions of the Software.
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25 * OTHER DEALINGS IN THE SOFTWARE.
27 * Except as contained in this notice, the name of the copyright holder(s)
28 * and author(s) shall not be used in advertising or otherwise to promote
29 * the sale, use or other dealings in this Software without prior written
30 * authorization from the copyright holder(s) and author(s).
32 * $FreeBSD: src/sys/dev/drm2/drm_modes.c,v 1.1 2012/05/22 11:07:44 kib Exp $
36 #include <drm/drm_crtc.h>
38 #define KHZ2PICOS(a) (1000000000UL/(a))
41 * drm_mode_debug_printmodeline - debug print a mode
43 * @mode: mode to print
48 * Describe @mode using DRM_DEBUG.
50 void drm_mode_debug_printmodeline(struct drm_display_mode *mode)
52 DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d "
54 mode->base.id, mode->name, mode->vrefresh, mode->clock,
55 mode->hdisplay, mode->hsync_start,
56 mode->hsync_end, mode->htotal,
57 mode->vdisplay, mode->vsync_start,
58 mode->vsync_end, mode->vtotal, mode->type, mode->flags);
62 * drm_cvt_mode -create a modeline based on CVT algorithm
64 * @hdisplay: hdisplay size
65 * @vdisplay: vdisplay size
66 * @vrefresh : vrefresh rate
67 * @reduced : Whether the GTF calculation is simplified
68 * @interlaced:Whether the interlace is supported
73 * return the modeline based on CVT algorithm
75 * This function is called to generate the modeline based on CVT algorithm
76 * according to the hdisplay, vdisplay, vrefresh.
77 * It is based from the VESA(TM) Coordinated Video Timing Generator by
78 * Graham Loveridge April 9, 2003 available at
79 * http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls
81 * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c.
82 * What I have done is to translate it by using integer calculation.
84 #define HV_FACTOR 1000
85 struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay,
86 int vdisplay, int vrefresh,
87 bool reduced, bool interlaced, bool margins)
89 /* 1) top/bottom margin size (% of height) - default: 1.8, */
90 #define CVT_MARGIN_PERCENTAGE 18
91 /* 2) character cell horizontal granularity (pixels) - default 8 */
92 #define CVT_H_GRANULARITY 8
93 /* 3) Minimum vertical porch (lines) - default 3 */
94 #define CVT_MIN_V_PORCH 3
95 /* 4) Minimum number of vertical back porch lines - default 6 */
96 #define CVT_MIN_V_BPORCH 6
97 /* Pixel Clock step (kHz) */
98 #define CVT_CLOCK_STEP 250
99 struct drm_display_mode *drm_mode;
100 unsigned int vfieldrate, hperiod;
101 int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync;
104 /* allocate the drm_display_mode structure. If failure, we will
107 drm_mode = drm_mode_create(dev);
111 /* the CVT default refresh rate is 60Hz */
115 /* the required field fresh rate */
117 vfieldrate = vrefresh * 2;
119 vfieldrate = vrefresh;
121 /* horizontal pixels */
122 hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY);
124 /* determine the left&right borders */
127 hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
128 hmargin -= hmargin % CVT_H_GRANULARITY;
130 /* find the total active pixels */
131 drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin;
133 /* find the number of lines per field */
135 vdisplay_rnd = vdisplay / 2;
137 vdisplay_rnd = vdisplay;
139 /* find the top & bottom borders */
142 vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
144 drm_mode->vdisplay = vdisplay + 2 * vmargin;
152 /* Determine VSync Width from aspect ratio */
153 if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay))
155 else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay))
157 else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay))
159 else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay))
161 else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay))
167 /* simplify the GTF calculation */
168 /* 4) Minimum time of vertical sync + back porch interval (µs)
172 #define CVT_MIN_VSYNC_BP 550
173 /* 3) Nominal HSync width (% of line period) - default 8 */
174 #define CVT_HSYNC_PERCENTAGE 8
175 unsigned int hblank_percentage;
176 int vsyncandback_porch, vback_porch, hblank;
178 /* estimated the horizontal period */
179 tmp1 = HV_FACTOR * 1000000 -
180 CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate;
181 tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 +
183 hperiod = tmp1 * 2 / (tmp2 * vfieldrate);
185 tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1;
186 /* 9. Find number of lines in sync + backporch */
187 if (tmp1 < (vsync + CVT_MIN_V_PORCH))
188 vsyncandback_porch = vsync + CVT_MIN_V_PORCH;
190 vsyncandback_porch = tmp1;
191 /* 10. Find number of lines in back porch */
192 vback_porch = vsyncandback_porch - vsync;
193 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin +
194 vsyncandback_porch + CVT_MIN_V_PORCH;
195 /* 5) Definition of Horizontal blanking time limitation */
196 /* Gradient (%/kHz) - default 600 */
197 #define CVT_M_FACTOR 600
198 /* Offset (%) - default 40 */
199 #define CVT_C_FACTOR 40
200 /* Blanking time scaling factor - default 128 */
201 #define CVT_K_FACTOR 128
202 /* Scaling factor weighting - default 20 */
203 #define CVT_J_FACTOR 20
204 #define CVT_M_PRIME (CVT_M_FACTOR * CVT_K_FACTOR / 256)
205 #define CVT_C_PRIME ((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \
207 /* 12. Find ideal blanking duty cycle from formula */
208 hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME *
210 /* 13. Blanking time */
211 if (hblank_percentage < 20 * HV_FACTOR)
212 hblank_percentage = 20 * HV_FACTOR;
213 hblank = drm_mode->hdisplay * hblank_percentage /
214 (100 * HV_FACTOR - hblank_percentage);
215 hblank -= hblank % (2 * CVT_H_GRANULARITY);
216 /* 14. find the total pixes per line */
217 drm_mode->htotal = drm_mode->hdisplay + hblank;
218 drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2;
219 drm_mode->hsync_start = drm_mode->hsync_end -
220 (drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100;
221 drm_mode->hsync_start += CVT_H_GRANULARITY -
222 drm_mode->hsync_start % CVT_H_GRANULARITY;
223 /* fill the Vsync values */
224 drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH;
225 drm_mode->vsync_end = drm_mode->vsync_start + vsync;
227 /* Reduced blanking */
228 /* Minimum vertical blanking interval time (µs)- default 460 */
229 #define CVT_RB_MIN_VBLANK 460
230 /* Fixed number of clocks for horizontal sync */
231 #define CVT_RB_H_SYNC 32
232 /* Fixed number of clocks for horizontal blanking */
233 #define CVT_RB_H_BLANK 160
234 /* Fixed number of lines for vertical front porch - default 3*/
235 #define CVT_RB_VFPORCH 3
238 /* 8. Estimate Horizontal period. */
239 tmp1 = HV_FACTOR * 1000000 -
240 CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate;
241 tmp2 = vdisplay_rnd + 2 * vmargin;
242 hperiod = tmp1 / (tmp2 * vfieldrate);
243 /* 9. Find number of lines in vertical blanking */
244 vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1;
245 /* 10. Check if vertical blanking is sufficient */
246 if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH))
247 vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH;
248 /* 11. Find total number of lines in vertical field */
249 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines;
250 /* 12. Find total number of pixels in a line */
251 drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK;
252 /* Fill in HSync values */
253 drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2;
254 drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC;
255 /* Fill in VSync values */
256 drm_mode->vsync_start = drm_mode->vdisplay + CVT_RB_VFPORCH;
257 drm_mode->vsync_end = drm_mode->vsync_start + vsync;
259 /* 15/13. Find pixel clock frequency (kHz for xf86) */
260 drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod;
261 drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP;
262 /* 18/16. Find actual vertical frame frequency */
263 /* ignore - just set the mode flag for interlaced */
265 drm_mode->vtotal *= 2;
266 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
268 /* Fill the mode line name */
269 drm_mode_set_name(drm_mode);
271 drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC |
272 DRM_MODE_FLAG_NVSYNC);
274 drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC |
275 DRM_MODE_FLAG_NHSYNC);
281 * drm_gtf_mode_complex - create the modeline based on full GTF algorithm
284 * @hdisplay :hdisplay size
285 * @vdisplay :vdisplay size
286 * @vrefresh :vrefresh rate.
287 * @interlaced :whether the interlace is supported
288 * @margins :desired margin size
289 * @GTF_[MCKJ] :extended GTF formula parameters
294 * return the modeline based on full GTF algorithm.
296 * GTF feature blocks specify C and J in multiples of 0.5, so we pass them
297 * in here multiplied by two. For a C of 40, pass in 80.
299 struct drm_display_mode *
300 drm_gtf_mode_complex(struct drm_device *dev, int hdisplay, int vdisplay,
301 int vrefresh, bool interlaced, int margins,
302 int GTF_M, int GTF_2C, int GTF_K, int GTF_2J)
303 { /* 1) top/bottom margin size (% of height) - default: 1.8, */
304 #define GTF_MARGIN_PERCENTAGE 18
305 /* 2) character cell horizontal granularity (pixels) - default 8 */
306 #define GTF_CELL_GRAN 8
307 /* 3) Minimum vertical porch (lines) - default 3 */
308 #define GTF_MIN_V_PORCH 1
309 /* width of vsync in lines */
311 /* width of hsync as % of total line */
312 #define H_SYNC_PERCENT 8
313 /* min time of vsync + back porch (microsec) */
314 #define MIN_VSYNC_PLUS_BP 550
315 /* C' and M' are part of the Blanking Duty Cycle computation */
316 #define GTF_C_PRIME ((((GTF_2C - GTF_2J) * GTF_K / 256) + GTF_2J) / 2)
317 #define GTF_M_PRIME (GTF_K * GTF_M / 256)
318 struct drm_display_mode *drm_mode;
319 unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd;
320 int top_margin, bottom_margin;
322 unsigned int hfreq_est;
323 int vsync_plus_bp, vback_porch;
324 unsigned int vtotal_lines, vfieldrate_est, hperiod;
325 unsigned int vfield_rate, vframe_rate;
326 int left_margin, right_margin;
327 unsigned int total_active_pixels, ideal_duty_cycle;
328 unsigned int hblank, total_pixels, pixel_freq;
329 int hsync, hfront_porch, vodd_front_porch_lines;
330 unsigned int tmp1, tmp2;
332 drm_mode = drm_mode_create(dev);
336 /* 1. In order to give correct results, the number of horizontal
337 * pixels requested is first processed to ensure that it is divisible
338 * by the character size, by rounding it to the nearest character
341 hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
342 hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN;
344 /* 2. If interlace is requested, the number of vertical lines assumed
345 * by the calculation must be halved, as the computation calculates
346 * the number of vertical lines per field.
349 vdisplay_rnd = vdisplay / 2;
351 vdisplay_rnd = vdisplay;
353 /* 3. Find the frame rate required: */
355 vfieldrate_rqd = vrefresh * 2;
357 vfieldrate_rqd = vrefresh;
359 /* 4. Find number of lines in Top margin: */
362 top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
364 /* 5. Find number of lines in bottom margin: */
365 bottom_margin = top_margin;
367 /* 6. If interlace is required, then set variable interlace: */
373 /* 7. Estimate the Horizontal frequency */
375 tmp1 = (1000000 - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500;
376 tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) *
378 hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1;
381 /* 8. Find the number of lines in V sync + back porch */
382 /* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */
383 vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000;
384 vsync_plus_bp = (vsync_plus_bp + 500) / 1000;
385 /* 9. Find the number of lines in V back porch alone: */
386 vback_porch = vsync_plus_bp - V_SYNC_RQD;
387 /* 10. Find the total number of lines in Vertical field period: */
388 vtotal_lines = vdisplay_rnd + top_margin + bottom_margin +
389 vsync_plus_bp + GTF_MIN_V_PORCH;
390 /* 11. Estimate the Vertical field frequency: */
391 vfieldrate_est = hfreq_est / vtotal_lines;
392 /* 12. Find the actual horizontal period: */
393 hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines);
395 /* 13. Find the actual Vertical field frequency: */
396 vfield_rate = hfreq_est / vtotal_lines;
397 /* 14. Find the Vertical frame frequency: */
399 vframe_rate = vfield_rate / 2;
401 vframe_rate = vfield_rate;
402 /* 15. Find number of pixels in left margin: */
404 left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
409 /* 16.Find number of pixels in right margin: */
410 right_margin = left_margin;
411 /* 17.Find total number of active pixels in image and left and right */
412 total_active_pixels = hdisplay_rnd + left_margin + right_margin;
413 /* 18.Find the ideal blanking duty cycle from blanking duty cycle */
414 ideal_duty_cycle = GTF_C_PRIME * 1000 -
415 (GTF_M_PRIME * 1000000 / hfreq_est);
416 /* 19.Find the number of pixels in the blanking time to the nearest
417 * double character cell: */
418 hblank = total_active_pixels * ideal_duty_cycle /
419 (100000 - ideal_duty_cycle);
420 hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN);
421 hblank = hblank * 2 * GTF_CELL_GRAN;
422 /* 20.Find total number of pixels: */
423 total_pixels = total_active_pixels + hblank;
424 /* 21.Find pixel clock frequency: */
425 pixel_freq = total_pixels * hfreq_est / 1000;
426 /* Stage 1 computations are now complete; I should really pass
427 * the results to another function and do the Stage 2 computations,
428 * but I only need a few more values so I'll just append the
429 * computations here for now */
430 /* 17. Find the number of pixels in the horizontal sync period: */
431 hsync = H_SYNC_PERCENT * total_pixels / 100;
432 hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
433 hsync = hsync * GTF_CELL_GRAN;
434 /* 18. Find the number of pixels in horizontal front porch period */
435 hfront_porch = hblank / 2 - hsync;
436 /* 36. Find the number of lines in the odd front porch period: */
437 vodd_front_porch_lines = GTF_MIN_V_PORCH ;
439 /* finally, pack the results in the mode struct */
440 drm_mode->hdisplay = hdisplay_rnd;
441 drm_mode->hsync_start = hdisplay_rnd + hfront_porch;
442 drm_mode->hsync_end = drm_mode->hsync_start + hsync;
443 drm_mode->htotal = total_pixels;
444 drm_mode->vdisplay = vdisplay_rnd;
445 drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines;
446 drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD;
447 drm_mode->vtotal = vtotal_lines;
449 drm_mode->clock = pixel_freq;
452 drm_mode->vtotal *= 2;
453 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
456 drm_mode_set_name(drm_mode);
457 if (GTF_M == 600 && GTF_2C == 80 && GTF_K == 128 && GTF_2J == 40)
458 drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC;
460 drm_mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC;
466 * drm_gtf_mode - create the modeline based on GTF algorithm
469 * @hdisplay :hdisplay size
470 * @vdisplay :vdisplay size
471 * @vrefresh :vrefresh rate.
472 * @interlaced :whether the interlace is supported
473 * @margins :whether the margin is supported
478 * return the modeline based on GTF algorithm
480 * This function is to create the modeline based on the GTF algorithm.
481 * Generalized Timing Formula is derived from:
482 * GTF Spreadsheet by Andy Morrish (1/5/97)
483 * available at http://www.vesa.org
485 * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c.
486 * What I have done is to translate it by using integer calculation.
487 * I also refer to the function of fb_get_mode in the file of
488 * drivers/video/fbmon.c
490 * Standard GTF parameters:
496 struct drm_display_mode *
497 drm_gtf_mode(struct drm_device *dev, int hdisplay, int vdisplay, int vrefresh,
498 bool lace, int margins)
500 return drm_gtf_mode_complex(dev, hdisplay, vdisplay, vrefresh, lace,
501 margins, 600, 40 * 2, 128, 20 * 2);
505 * drm_mode_set_name - set the name on a mode
506 * @mode: name will be set in this mode
511 * Set the name of @mode to a standard format.
513 void drm_mode_set_name(struct drm_display_mode *mode)
515 bool interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
517 ksnprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d%s",
518 mode->hdisplay, mode->vdisplay,
519 interlaced ? "i" : "");
523 * drm_mode_list_concat - move modes from one list to another
528 * Caller must ensure both lists are locked.
530 * Move all the modes from @head to @new.
532 void drm_mode_list_concat(struct list_head *head, struct list_head *new)
535 struct list_head *entry, *tmp;
537 list_for_each_safe(entry, tmp, head) {
538 list_move_tail(entry, new);
543 * drm_mode_width - get the width of a mode
549 * Return @mode's width (hdisplay) value.
551 * FIXME: is this needed?
556 int drm_mode_width(struct drm_display_mode *mode)
558 return mode->hdisplay;
563 * drm_mode_height - get the height of a mode
569 * Return @mode's height (vdisplay) value.
571 * FIXME: is this needed?
576 int drm_mode_height(struct drm_display_mode *mode)
578 return mode->vdisplay;
581 /** drm_mode_hsync - get the hsync of a mode
587 * Return @modes's hsync rate in kHz, rounded to the nearest int.
589 int drm_mode_hsync(const struct drm_display_mode *mode)
591 unsigned int calc_val;
596 if (mode->htotal < 0)
599 calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */
600 calc_val += 500; /* round to 1000Hz */
601 calc_val /= 1000; /* truncate to kHz */
607 * drm_mode_vrefresh - get the vrefresh of a mode
613 * Return @mode's vrefresh rate in Hz or calculate it if necessary.
615 * FIXME: why is this needed? shouldn't vrefresh be set already?
618 * Vertical refresh rate. It will be the result of actual value plus 0.5.
619 * If it is 70.288, it will return 70Hz.
620 * If it is 59.6, it will return 60Hz.
622 int drm_mode_vrefresh(const struct drm_display_mode *mode)
625 unsigned int calc_val;
627 if (mode->vrefresh > 0)
628 refresh = mode->vrefresh;
629 else if (mode->htotal > 0 && mode->vtotal > 0) {
631 vtotal = mode->vtotal;
632 /* work out vrefresh the value will be x1000 */
633 calc_val = (mode->clock * 1000);
634 calc_val /= mode->htotal;
635 refresh = (calc_val + vtotal / 2) / vtotal;
637 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
639 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
642 refresh /= mode->vscan;
648 * drm_mode_set_crtcinfo - set CRTC modesetting parameters
650 * @adjust_flags: unused? (FIXME)
655 * Setup the CRTC modesetting parameters for @p, adjusting if necessary.
657 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
659 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN))
662 p->crtc_hdisplay = p->hdisplay;
663 p->crtc_hsync_start = p->hsync_start;
664 p->crtc_hsync_end = p->hsync_end;
665 p->crtc_htotal = p->htotal;
666 p->crtc_hskew = p->hskew;
667 p->crtc_vdisplay = p->vdisplay;
668 p->crtc_vsync_start = p->vsync_start;
669 p->crtc_vsync_end = p->vsync_end;
670 p->crtc_vtotal = p->vtotal;
672 if (p->flags & DRM_MODE_FLAG_INTERLACE) {
673 if (adjust_flags & CRTC_INTERLACE_HALVE_V) {
674 p->crtc_vdisplay /= 2;
675 p->crtc_vsync_start /= 2;
676 p->crtc_vsync_end /= 2;
683 if (p->flags & DRM_MODE_FLAG_DBLSCAN) {
684 p->crtc_vdisplay *= 2;
685 p->crtc_vsync_start *= 2;
686 p->crtc_vsync_end *= 2;
691 p->crtc_vdisplay *= p->vscan;
692 p->crtc_vsync_start *= p->vscan;
693 p->crtc_vsync_end *= p->vscan;
694 p->crtc_vtotal *= p->vscan;
697 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay);
698 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal);
699 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay);
700 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal);
702 p->crtc_hadjusted = false;
703 p->crtc_vadjusted = false;
708 * drm_mode_duplicate - allocate and duplicate an existing mode
709 * @m: mode to duplicate
714 * Just allocate a new mode, copy the existing mode into it, and return
715 * a pointer to it. Used to create new instances of established modes.
717 struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev,
718 const struct drm_display_mode *mode)
720 struct drm_display_mode *nmode;
723 nmode = drm_mode_create(dev);
727 new_id = nmode->base.id;
729 nmode->base.id = new_id;
730 INIT_LIST_HEAD(&nmode->head);
735 * drm_mode_equal - test modes for equality
737 * @mode2: second mode
742 * Check to see if @mode1 and @mode2 are equivalent.
745 * true if the modes are equal, false otherwise.
747 bool drm_mode_equal(struct drm_display_mode *mode1, struct drm_display_mode *mode2)
749 /* do clock check convert to PICOS so fb modes get matched
751 if (mode1->clock && mode2->clock) {
752 if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock))
754 } else if (mode1->clock != mode2->clock)
757 if (mode1->hdisplay == mode2->hdisplay &&
758 mode1->hsync_start == mode2->hsync_start &&
759 mode1->hsync_end == mode2->hsync_end &&
760 mode1->htotal == mode2->htotal &&
761 mode1->hskew == mode2->hskew &&
762 mode1->vdisplay == mode2->vdisplay &&
763 mode1->vsync_start == mode2->vsync_start &&
764 mode1->vsync_end == mode2->vsync_end &&
765 mode1->vtotal == mode2->vtotal &&
766 mode1->vscan == mode2->vscan &&
767 mode1->flags == mode2->flags)
774 * drm_mode_validate_size - make sure modes adhere to size constraints
776 * @mode_list: list of modes to check
777 * @maxX: maximum width
778 * @maxY: maximum height
779 * @maxPitch: max pitch
782 * Caller must hold a lock protecting @mode_list.
784 * The DRM device (@dev) has size and pitch limits. Here we validate the
785 * modes we probed for @dev against those limits and set their status as
788 void drm_mode_validate_size(struct drm_device *dev,
789 struct list_head *mode_list,
790 int maxX, int maxY, int maxPitch)
792 struct drm_display_mode *mode;
794 list_for_each_entry(mode, mode_list, head) {
795 if (maxPitch > 0 && mode->hdisplay > maxPitch)
796 mode->status = MODE_BAD_WIDTH;
798 if (maxX > 0 && mode->hdisplay > maxX)
799 mode->status = MODE_VIRTUAL_X;
801 if (maxY > 0 && mode->vdisplay > maxY)
802 mode->status = MODE_VIRTUAL_Y;
807 * drm_mode_validate_clocks - validate modes against clock limits
809 * @mode_list: list of modes to check
810 * @min: minimum clock rate array
811 * @max: maximum clock rate array
812 * @n_ranges: number of clock ranges (size of arrays)
815 * Caller must hold a lock protecting @mode_list.
817 * Some code may need to check a mode list against the clock limits of the
818 * device in question. This function walks the mode list, testing to make
819 * sure each mode falls within a given range (defined by @min and @max
820 * arrays) and sets @mode->status as needed.
822 void drm_mode_validate_clocks(struct drm_device *dev,
823 struct list_head *mode_list,
824 int *min, int *max, int n_ranges)
826 struct drm_display_mode *mode;
829 list_for_each_entry(mode, mode_list, head) {
831 for (i = 0; i < n_ranges; i++) {
832 if (mode->clock >= min[i] && mode->clock <= max[i]) {
838 mode->status = MODE_CLOCK_RANGE;
843 * drm_mode_prune_invalid - remove invalid modes from mode list
845 * @mode_list: list of modes to check
846 * @verbose: be verbose about it
849 * Caller must hold a lock protecting @mode_list.
851 * Once mode list generation is complete, a caller can use this routine to
852 * remove invalid modes from a mode list. If any of the modes have a
853 * status other than %MODE_OK, they are removed from @mode_list and freed.
855 void drm_mode_prune_invalid(struct drm_device *dev,
856 struct list_head *mode_list, bool verbose)
858 struct drm_display_mode *mode, *t;
860 list_for_each_entry_safe(mode, t, mode_list, head) {
861 if (mode->status != MODE_OK) {
862 list_del(&mode->head);
864 drm_mode_debug_printmodeline(mode);
865 DRM_DEBUG_KMS("Not using %s mode %d\n",
866 mode->name, mode->status);
868 drm_mode_destroy(dev, mode);
874 * drm_mode_compare - compare modes for favorability
876 * @lh_a: list_head for first mode
877 * @lh_b: list_head for second mode
882 * Compare two modes, given by @lh_a and @lh_b, returning a value indicating
886 * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or
887 * positive if @lh_b is better than @lh_a.
889 static int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head *lh_b)
891 struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head);
892 struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head);
895 diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) -
896 ((a->type & DRM_MODE_TYPE_PREFERRED) != 0);
899 diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay;
902 diff = b->clock - a->clock;
907 * drm_mode_sort - sort mode list
908 * @mode_list: list to sort
911 * Caller must hold a lock protecting @mode_list.
913 * Sort @mode_list by favorability, putting good modes first.
915 void drm_mode_sort(struct list_head *mode_list)
917 drm_list_sort(NULL, mode_list, drm_mode_compare);
921 * drm_mode_connector_list_update - update the mode list for the connector
922 * @connector: the connector to update
925 * Caller must hold a lock protecting @mode_list.
927 * This moves the modes from the @connector probed_modes list
928 * to the actual mode list. It compares the probed mode against the current
929 * list and only adds different modes. All modes unverified after this point
930 * will be removed by the prune invalid modes.
932 void drm_mode_connector_list_update(struct drm_connector *connector)
934 struct drm_display_mode *mode;
935 struct drm_display_mode *pmode, *pt;
938 list_for_each_entry_safe(pmode, pt, &connector->probed_modes,
941 /* go through current modes checking for the new probed mode */
942 list_for_each_entry(mode, &connector->modes, head) {
943 if (drm_mode_equal(pmode, mode)) {
945 /* if equal delete the probed mode */
946 mode->status = pmode->status;
947 /* Merge type bits together */
948 mode->type |= pmode->type;
949 list_del(&pmode->head);
950 drm_mode_destroy(connector->dev, pmode);
956 list_move_tail(&pmode->head, &connector->modes);
962 * drm_mode_parse_command_line_for_connector - parse command line for connector
963 * @mode_option - per connector mode option
964 * @connector - connector to parse line for
966 * This parses the connector specific then generic command lines for
967 * modes and options to configure the connector.
969 * This uses the same parameters as the fb modedb.c, except for extra
970 * <xres>x<yres>[M][R][-<bpp>][@<refresh>][i][m][eDd]
972 * enable/enable Digital/disable bit at the end
974 bool drm_mode_parse_command_line_for_connector(const char *mode_option,
975 struct drm_connector *connector,
976 struct drm_cmdline_mode *mode)
979 unsigned int namelen;
980 bool res_specified = false, bpp_specified = false, refresh_specified = false;
981 unsigned int xres = 0, yres = 0, bpp = 32, refresh = 0;
982 bool yres_specified = false, cvt = false, rb = false;
983 bool interlace = false, margins = false, was_digit = false;
985 enum drm_connector_force force = DRM_FORCE_UNSPECIFIED;
989 mode_option = fb_mode_option;
993 mode->specified = false;
998 namelen = strlen(name);
999 for (i = namelen-1; i >= 0; i--) {
1002 if (!refresh_specified && !bpp_specified &&
1003 !yres_specified && !cvt && !rb && was_digit) {
1004 refresh = strtol(&name[i+1], NULL, 10);
1005 refresh_specified = true;
1011 if (!bpp_specified && !yres_specified && !cvt &&
1013 bpp = strtol(&name[i+1], NULL, 10);
1014 bpp_specified = true;
1020 if (!yres_specified && was_digit) {
1021 yres = strtol(&name[i+1], NULL, 10);
1022 yres_specified = true;
1030 if (yres_specified || cvt || was_digit)
1035 if (yres_specified || cvt || rb || was_digit)
1040 if (cvt || yres_specified || was_digit)
1045 if (cvt || yres_specified || was_digit)
1050 if (yres_specified || bpp_specified || refresh_specified ||
1051 was_digit || (force != DRM_FORCE_UNSPECIFIED))
1054 force = DRM_FORCE_ON;
1057 if (yres_specified || bpp_specified || refresh_specified ||
1058 was_digit || (force != DRM_FORCE_UNSPECIFIED))
1061 if ((connector->connector_type != DRM_MODE_CONNECTOR_DVII) &&
1062 (connector->connector_type != DRM_MODE_CONNECTOR_HDMIB))
1063 force = DRM_FORCE_ON;
1065 force = DRM_FORCE_ON_DIGITAL;
1068 if (yres_specified || bpp_specified || refresh_specified ||
1069 was_digit || (force != DRM_FORCE_UNSPECIFIED))
1072 force = DRM_FORCE_OFF;
1079 if (i < 0 && yres_specified) {
1081 xres = strtol(name, &ch, 10);
1082 if ((ch != NULL) && (*ch == 'x'))
1083 res_specified = true;
1086 } else if (!yres_specified && was_digit) {
1087 /* catch mode that begins with digits but has no 'x' */
1092 kprintf("parse error at position %i in video mode '%s'\n",
1094 mode->specified = false;
1098 if (res_specified) {
1099 mode->specified = true;
1104 if (refresh_specified) {
1105 mode->refresh_specified = true;
1106 mode->refresh = refresh;
1109 if (bpp_specified) {
1110 mode->bpp_specified = true;
1115 mode->interlace = interlace;
1116 mode->margins = margins;
1117 mode->force = force;
1122 struct drm_display_mode *
1123 drm_mode_create_from_cmdline_mode(struct drm_device *dev,
1124 struct drm_cmdline_mode *cmd)
1126 struct drm_display_mode *mode;
1129 mode = drm_cvt_mode(dev,
1130 cmd->xres, cmd->yres,
1131 cmd->refresh_specified ? cmd->refresh : 60,
1132 cmd->rb, cmd->interlace,
1135 mode = drm_gtf_mode(dev,
1136 cmd->xres, cmd->yres,
1137 cmd->refresh_specified ? cmd->refresh : 60,
1143 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);