2 * Copyright (c) 1997, Stefan Esser <se@freebsd.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice unmodified, this list of conditions, and the following
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 * $FreeBSD: src/sys/i386/isa/pcibus.c,v 1.57.2.12 2003/08/07 06:19:26 imp Exp $
27 * $DragonFly: src/sys/bus/pci/i386/pcibus.c,v 1.21 2008/09/05 10:39:36 hasso Exp $
33 #include <sys/param.h>
34 #include <sys/systm.h>
36 #include <sys/kernel.h>
37 #include <sys/malloc.h>
38 #include <sys/sysctl.h>
40 #include <bus/pci/pcivar.h>
41 #include <bus/pci/pcireg.h>
43 #include <bus/isa/isavar.h>
44 #include "pci_cfgreg.h"
45 #include <machine/md_var.h>
46 #include <machine/nexusvar.h>
50 static u_int32_t nexus_pcib_read_config(device_t, int, int, int, int, int);
53 * Figure out if a PCI entity is a host bridge, return its name or NULL.
56 nexus_legacypci_is_host_bridge(int bus, int slot, int func,
57 u_int32_t id, u_int8_t class, u_int8_t subclass,
61 static u_int8_t pxb[4]; /* hack for 450nx */
67 s = "Intel 824?? host to PCI bridge";
68 /* XXX This is a guess */
69 /* *busnum = nexus_pcib_read_config(0, bus, slot, func, 0x41, 1); */
73 s = "Intel 82810 (i810 GMCH) Host To Hub bridge";
76 s = "Intel 82810-DC100 (i810-DC100 GMCH) Host To Hub bridge";
79 s = "Intel 82810E (i810E GMCH) Host To Hub bridge";
82 s = "Intel 82443LX (440 LX) host to PCI bridge";
85 s = "Intel 82443BX (440 BX) host to PCI bridge";
88 s = "Intel 82443BX host to PCI bridge (AGP disabled)";
91 s = "Intel 82443MX host to PCI bridge";
94 s = "Intel 82443GX host to PCI bridge";
97 s = "Intel 82443GX host to AGP bridge";
100 s = "Intel 82443GX host to PCI bridge (AGP disabled)";
103 s = "Intel 82454KX/GX (Orion) host to PCI bridge";
104 *busnum = nexus_pcib_read_config(0, bus, slot, func, 0x4a, 1);
108 * For the 450nx chipset, there is a whole bundle of
109 * things pretending to be host bridges. The MIOC will
110 * be seen first and isn't really a pci bridge (the
111 * actual busses are attached to the PXB's). We need to
112 * read the registers of the MIOC to figure out the
113 * bus numbers for the PXB channels.
115 * Since the MIOC doesn't have a pci bus attached, we
116 * pretend it wasn't there.
118 pxb[0] = nexus_pcib_read_config(0, bus, slot, func,
119 0xd0, 1); /* BUSNO[0] */
120 pxb[1] = nexus_pcib_read_config(0, bus, slot, func,
121 0xd1, 1) + 1; /* SUBA[0]+1 */
122 pxb[2] = nexus_pcib_read_config(0, bus, slot, func,
123 0xd3, 1); /* BUSNO[1] */
124 pxb[3] = nexus_pcib_read_config(0, bus, slot, func,
125 0xd4, 1) + 1; /* SUBA[1]+1 */
130 s = "Intel 82454NX PXB#0, Bus#A";
134 s = "Intel 82454NX PXB#0, Bus#B";
138 s = "Intel 82454NX PXB#1, Bus#A";
142 s = "Intel 82454NX PXB#1, Bus#B";
148 s = "Intel 82845 Host to PCI bridge";
151 /* AMD -- vendor 0x1022 */
153 s = "AMD Elan SC520 host to PCI bridge";
155 init_AMD_Elan_sc520();
157 kprintf("*** WARNING: kernel option CPU_ELAN missing");
158 kprintf("-- timekeeping may be wrong\n");
162 s = "AMD-751 host to PCI bridge";
165 s = "AMD-761 host to PCI bridge";
168 /* SiS -- vendor 0x1039 */
179 s = "SiS 5591 host to PCI bridge";
182 s = "SiS 5591 host to AGP bridge";
185 /* VLSI -- vendor 0x1004 */
187 s = "VLSI 82C592 Host to PCI bridge";
190 /* XXX Here is MVP3, I got the datasheet but NO M/B to test it */
191 /* totally. Please let me know if anything wrong. -F */
192 /* XXX need info on the MVP3 -- any takers? */
194 s = "VIA 82C598MVP (Apollo MVP3) host bridge";
197 /* AcerLabs -- vendor 0x10b9 */
198 /* Funny : The datasheet told me vendor id is "10b8",sub-vendor */
199 /* id is '10b9" but the register always shows "10b9". -Foxfair */
201 s = "AcerLabs M1541 (Aladdin-V) PCI host bridge";
204 /* OPTi -- vendor 0x1045 */
206 s = "OPTi 82C700 host to PCI bridge";
209 s = "OPTi 82C822 host to PCI Bridge";
212 /* ServerWorks -- vendor 0x1166 */
214 s = "ServerWorks NB6536 2.0HE host to PCI bridge";
215 *busnum = nexus_pcib_read_config(0, bus, slot, func, 0x44, 1);
224 case 0x010f1014: /* IBM re-badged ServerWorks chipset */
226 s = "ServerWorks host to PCI bridge";
227 *busnum = nexus_pcib_read_config(0, bus, slot, func, 0x44, 1);
231 s = "ServerWorks NB6635 3.0LE host to PCI bridge";
232 *busnum = nexus_pcib_read_config(0, bus, slot, func, 0x44, 1);
236 s = "ServerWorks CIOB30 host to PCI bridge";
237 *busnum = nexus_pcib_read_config(0, bus, slot, func, 0x44, 1);
242 case 0x03021014: /* IBM re-badged ServerWorks chipset */
243 s = "ServerWorks CMIC-HE host to PCI-X bridge";
244 *busnum = nexus_pcib_read_config(0, bus, slot, func, 0x44, 1);
247 /* XXX unknown chipset, but working */
251 s = "ServerWorks host to PCI bridge(unknown chipset)";
252 *busnum = nexus_pcib_read_config(0, bus, slot, func, 0x44, 1);
255 /* Integrated Micro Solutions -- vendor 0x10e0 */
257 s = "Integrated Micro Solutions VL Bridge";
261 if (class == PCIC_BRIDGE && subclass == PCIS_BRIDGE_HOST)
262 s = "Host to PCI bridge";
270 * Identify the existance of the first pci bus and install a child to
271 * nexus if we find it. Use an order of 1 so it gets probed after
272 * any ACPI device installed under nexus. To avoid boot-time confusion,
273 * we do not install any 'pcib' devices at this time.
275 * The identify method coupled with the driver spec of the same name
276 * automatically installs it under the nexus.
279 nexus_legacypci_identify(driver_t *driver, device_t parent)
282 * Basically a static device, there's no point reinstalling it
285 if (device_get_state(parent) == DS_ATTACHED)
287 if (device_get_state(parent) == DS_INPROGRESS)
290 if (pci_cfgregopen() == 0)
293 BUS_ADD_CHILD(parent, parent, 100, "legacypci", 0);
298 * Scan the first pci bus for host-pci bridges and add pcib instances
299 * to the nexus for each bridge.
302 nexus_legacypci_probe(device_t dev)
312 * Do not install any pci busses ('pcib' devices) if the PCI
313 * subsystem has already been claimed by someone else.
315 if (pcib_owner != NULL) {
316 device_printf(dev, "PCI subsystem owned by %s, skipping scan\n",
320 pcib_owner = "legacypci";
322 if (pci_cfgregopen() == 0)
330 for (slot = 0; slot <= PCI_SLOTMAX; slot++) {
332 hdrtype = nexus_pcib_read_config(0, bus, slot, func,
334 if ((hdrtype & ~PCIM_MFDEV) > 2)
336 if (hdrtype & PCIM_MFDEV)
340 for (func = 0; func <= pcifunchigh; func++) {
342 * Read the IDs and class from the device.
345 u_int8_t class, subclass, busnum;
350 id = nexus_pcib_read_config(0, bus, slot, func,
354 class = nexus_pcib_read_config(0, bus, slot, func,
356 subclass = nexus_pcib_read_config(0, bus, slot, func,
359 s = nexus_legacypci_is_host_bridge(bus, slot, func,
366 * Check to see if the physical bus has already
367 * been seen. Eg: hybrid 32 and 64 bit host
368 * bridges to the same logical bus.
370 if (device_get_children(dev, &devs, &ndevs) == 0) {
371 for (i = 0; s != NULL && i < ndevs; i++) {
372 if (strcmp(device_get_name(devs[i]),
375 if (nexus_get_pcibus(devs[i]) == busnum)
384 * Add at priority 100+busnum to keep the scanning
385 * order sane in the boot dmesg output.
387 child = BUS_ADD_CHILD(dev, dev, 100 + busnum,
389 device_set_desc(child, s);
390 nexus_set_pcibus(child, busnum);
393 if (id == 0x12258086)
397 if (found824xx && bus == 0) {
404 * Now that we have installed the main PCI bridges, go
405 * probe and attach each one.
407 bus_generic_attach(dev);
411 * Make sure we add at least one bridge since some old
412 * hardware doesn't actually have a host-pci bridge device.
413 * Note that pci_cfgregopen() thinks we have PCI devices..
417 kprintf("nexus_pcib_identify: no bridge found, "
418 "adding pcib0 anyway\n");
420 child = BUS_ADD_CHILD(dev, dev, 100, "pcib", 0);
421 nexus_set_pcibus(child, 0);
427 nexus_legacypci_attach(device_t dev)
429 bus_generic_attach(dev);
435 SYSCTL_DECL(_hw_pci);
437 static unsigned long legacy_host_mem_start = 0x80000000;
438 /* XXX need TUNABLE_ULONG? */
439 TUNABLE_INT("hw.pci.host_mem_start", (int *)&legacy_host_mem_start);
440 SYSCTL_ULONG(_hw_pci, OID_AUTO, host_mem_start, CTLFLAG_RD,
441 &legacy_host_mem_start, 0x80000000,
442 "Limit the host bridge memory to being above this address. "
444 "set at boot via hw.pci.host_mem_start tunable.");
446 static struct resource *
447 nexus_legacypci_alloc_resource(device_t dev, device_t child, int type, int *rid,
448 u_long start, u_long end, u_long count,
452 * If no memory preference is given, use upper 32MB slot most
453 * bioses use for their memory window. Typically other bridges
454 * before us get in the way to assert their preferences on memory.
455 * Hardcoding like this sucks, so a more MD/MI way needs to be
456 * found to do it. This is typically only used on older laptops
457 * that don't have pci busses behind pci bridge, so assuming > 32MB
460 * However, this can cause problems for other chipsets, so we make
461 * this tunable by hw.pci.host_mem_start.
463 if (type == SYS_RES_MEMORY && start == 0UL && end == ~0UL)
464 start = legacy_host_mem_start;
465 if (type == SYS_RES_IOPORT && start == 0UL && end == ~0UL)
467 return bus_generic_alloc_resource(dev, child, type, rid,
468 start, end, count, flags);
471 #endif /* PCI_MAP_FIXUP */
473 static device_method_t legacypci_methods[] = {
474 /* Device interface */
475 DEVMETHOD(device_identify, nexus_legacypci_identify),
476 DEVMETHOD(device_probe, nexus_legacypci_probe),
477 DEVMETHOD(device_attach, nexus_legacypci_attach),
478 DEVMETHOD(device_shutdown, bus_generic_shutdown),
479 DEVMETHOD(device_suspend, bus_generic_suspend),
480 DEVMETHOD(device_resume, bus_generic_resume),
483 * Bus interface - propogate through to the nexus. Note that
484 * this means devices under us will have nexus ivars.
486 DEVMETHOD(bus_add_child, bus_generic_add_child),
487 DEVMETHOD(bus_print_child, bus_generic_print_child),
488 DEVMETHOD(bus_read_ivar, bus_generic_read_ivar),
489 DEVMETHOD(bus_write_ivar, bus_generic_write_ivar),
491 DEVMETHOD(bus_alloc_resource, nexus_legacypci_alloc_resource),
493 DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource),
495 DEVMETHOD(bus_release_resource, bus_generic_release_resource),
496 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
497 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
498 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
499 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
500 DEVMETHOD(bus_set_resource, bus_generic_set_resource),
501 DEVMETHOD(bus_get_resource, bus_generic_get_resource),
502 DEVMETHOD(bus_delete_resource, bus_generic_delete_resource),
506 static driver_t legacypci_driver = {
512 static devclass_t legacypci_devclass;
514 DRIVER_MODULE(legacypci, nexus, legacypci_driver, legacypci_devclass, 0, 0);
517 * Legacypci Host-Bridge PCI BUS support. The underlying pcib devices
518 * will only exist if we actually control the PCI bus. The actual PCI
519 * bus driver is attached in our attach routine.
521 * There is no identify function because the legacypci placeholder will
522 * have already scanned and added PCIB devices for the host-bridges found.
525 nexus_pcib_maxslots(device_t dev)
531 * Read configuration space register.
534 nexus_pcib_read_config(device_t dev, int bus, int slot, int func,
537 return (pci_cfgregread(bus, slot, func, reg, bytes));
541 * Write configuration space register.
544 nexus_pcib_write_config(device_t dev, int bus, int slot, int func,
545 int reg, u_int32_t data, int bytes)
547 pci_cfgregwrite(bus, slot, func, reg, data, bytes);
551 * Stack a pci device on top of the pci bridge bus device.
554 nexus_pcib_probe(device_t dev)
556 BUS_ADD_CHILD(dev, dev, 0, "pci", device_get_unit(dev));
561 nexus_pcib_attach(device_t dev)
565 error = bus_generic_attach(dev);
569 /* route interrupt */
572 nexus_pcib_route_interrupt(device_t pcib, device_t dev, int pin)
574 return(pci_cfgintr(pci_get_bus(dev), pci_get_slot(dev), pin,
578 static device_method_t nexus_pcib_methods[] = {
579 /* Device interface */
580 DEVMETHOD(device_probe, nexus_pcib_probe),
581 DEVMETHOD(device_attach, nexus_pcib_attach),
582 DEVMETHOD(device_shutdown, bus_generic_shutdown),
583 DEVMETHOD(device_suspend, bus_generic_suspend),
584 DEVMETHOD(device_resume, bus_generic_resume),
587 * Bus interface - propogate through to the nexus. Note
588 * that this means we will get nexus-managed ivars.
590 DEVMETHOD(bus_add_child, bus_generic_add_child),
591 DEVMETHOD(bus_print_child, bus_generic_print_child),
592 DEVMETHOD(bus_read_ivar, bus_generic_read_ivar),
593 DEVMETHOD(bus_write_ivar, bus_generic_write_ivar),
594 DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource),
595 DEVMETHOD(bus_release_resource, bus_generic_release_resource),
596 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
597 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
598 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
599 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
602 DEVMETHOD(pcib_maxslots, nexus_pcib_maxslots),
603 DEVMETHOD(pcib_read_config, nexus_pcib_read_config),
604 DEVMETHOD(pcib_write_config, nexus_pcib_write_config),
605 DEVMETHOD(pcib_route_interrupt, nexus_pcib_route_interrupt),
610 static driver_t nexus_pcib_driver = {
616 static devclass_t pcib_devclass;
618 DRIVER_MODULE(pcib, legacypci, nexus_pcib_driver, pcib_devclass, 0, 0);
622 * Provide a device to "eat" the host->pci bridges that we dug up above
623 * and stop them showing up twice on the probes. This also stops them
624 * showing up as 'none' in pciconf -l.
626 * Return an ultra-low priority so other devices can attach the bus before
629 * XXX may have to disable the registration entirely to support module-loaded
630 * bridges such as agp.ko.
633 pci_hostb_probe(device_t dev)
635 if (pci_get_class(dev) == PCIC_BRIDGE &&
636 pci_get_subclass(dev) == PCIS_BRIDGE_HOST) {
637 device_set_desc(dev, "Host to PCI bridge");
645 pci_hostb_attach(device_t dev)
650 static device_method_t pci_hostb_methods[] = {
651 /* Device interface */
652 DEVMETHOD(device_probe, pci_hostb_probe),
653 DEVMETHOD(device_attach, pci_hostb_attach),
654 DEVMETHOD(device_shutdown, bus_generic_shutdown),
655 DEVMETHOD(device_suspend, bus_generic_suspend),
656 DEVMETHOD(device_resume, bus_generic_resume),
660 static driver_t pci_hostb_driver = {
665 static devclass_t pci_hostb_devclass;
667 DRIVER_MODULE(hostb, pci, pci_hostb_driver, pci_hostb_devclass, 0, 0);
671 * Install placeholder to claim the resources owned by the
672 * PCI bus interface. This could be used to extract the
673 * config space registers in the extreme case where the PnP
674 * ID is available and the PCI BIOS isn't, but for now we just
675 * eat the PnP ID and do nothing else.
677 * XXX we should silence this probe, as it will generally confuse
680 static struct isa_pnp_id pcibus_pnp_ids[] = {
681 { 0x030ad041 /* PNP030A */, "PCI Bus" },
686 pcibus_pnp_probe(device_t dev)
690 if ((result = ISA_PNP_PROBE(device_get_parent(dev), dev, pcibus_pnp_ids)) <= 0)
696 pcibus_pnp_attach(device_t dev)
701 static device_method_t pcibus_pnp_methods[] = {
702 /* Device interface */
703 DEVMETHOD(device_probe, pcibus_pnp_probe),
704 DEVMETHOD(device_attach, pcibus_pnp_attach),
705 DEVMETHOD(device_detach, bus_generic_detach),
706 DEVMETHOD(device_shutdown, bus_generic_shutdown),
707 DEVMETHOD(device_suspend, bus_generic_suspend),
708 DEVMETHOD(device_resume, bus_generic_resume),
712 static driver_t pcibus_pnp_driver = {
718 static devclass_t pcibus_pnp_devclass;
720 DRIVER_MODULE(pcibus_pnp, isa, pcibus_pnp_driver, pcibus_pnp_devclass, 0, 0);