sys/dev/drm/i915/intel_lvds.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *      Eric Anholt <eric@anholt.net>
  26  *      Dave Airlie <airlied@linux.ie>
  27  *      Jesse Barnes <jesse.barnes@intel.com>
  28  */
  29 #include "opt_drm.h"
  30
  31 #include <linux/dmi.h>
  32 #include <linux/i2c.h>
  33 #include <linux/vga_switcheroo.h>
  34 #include <drm/drmP.h>
  35 #include <drm/drm_atomic_helper.h>
  36 #include <drm/drm_crtc.h>
  37 #include <drm/drm_edid.h>
  38 #include "intel_drv.h"
  39 #include <drm/i915_drm.h>
  40 #include "i915_drv.h"
  41
  42 /* Private structure for the integrated LVDS support */
  43 struct intel_lvds_connector {
  44         struct intel_connector base;
  45
  46         struct notifier_block lid_notifier;
  47 };
  48
  49 struct intel_lvds_encoder {
  50         struct intel_encoder base;
  51
  52         bool is_dual_link;
  53         i915_reg_t reg;
  54         u32 a3_power;
  55
  56         struct intel_lvds_connector *attached_connector;
  57 };
  58
  59 static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
  60 {
  61         return container_of(encoder, struct intel_lvds_encoder, base.base);
  62 }
  63
  64 static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
  65 {
  66         return container_of(connector, struct intel_lvds_connector, base.base);
  67 }
  68
  69 static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
  70                                     enum i915_pipe *pipe)
  71 {
  72         struct drm_device *dev = encoder->base.dev;
  73         struct drm_i915_private *dev_priv = dev->dev_private;
  74         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  75         enum intel_display_power_domain power_domain;
  76         u32 tmp;
  77         bool ret;
  78
  79         power_domain = intel_display_port_power_domain(encoder);
  80         if (!intel_display_power_get_if_enabled(dev_priv, power_domain))
  81                 return false;
  82
  83         ret = false;
  84
  85         tmp = I915_READ(lvds_encoder->reg);
  86
  87         if (!(tmp & LVDS_PORT_EN))
  88                 goto out;
  89
  90         if (HAS_PCH_CPT(dev))
  91                 *pipe = PORT_TO_PIPE_CPT(tmp);
  92         else
  93                 *pipe = PORT_TO_PIPE(tmp);
  94
  95         ret = true;
  96
  97 out:
  98         intel_display_power_put(dev_priv, power_domain);
  99
 100         return ret;
 101 }
 102
 103 static void intel_lvds_get_config(struct intel_encoder *encoder,
 104                                   struct intel_crtc_state *pipe_config)
 105 {
 106         struct drm_device *dev = encoder->base.dev;
 107         struct drm_i915_private *dev_priv = dev->dev_private;
 108         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 109         u32 tmp, flags = 0;
 110
 111         tmp = I915_READ(lvds_encoder->reg);
 112         if (tmp & LVDS_HSYNC_POLARITY)
 113                 flags |= DRM_MODE_FLAG_NHSYNC;
 114         else
 115                 flags |= DRM_MODE_FLAG_PHSYNC;
 116         if (tmp & LVDS_VSYNC_POLARITY)
 117                 flags |= DRM_MODE_FLAG_NVSYNC;
 118         else
 119                 flags |= DRM_MODE_FLAG_PVSYNC;
 120
 121         pipe_config->base.adjusted_mode.flags |= flags;
 122
 123         if (INTEL_INFO(dev)->gen < 5)
 124                 pipe_config->gmch_pfit.lvds_border_bits =
 125                         tmp & LVDS_BORDER_ENABLE;
 126
 127         /* gen2/3 store dither state in pfit control, needs to match */
 128         if (INTEL_INFO(dev)->gen < 4) {
 129                 tmp = I915_READ(PFIT_CONTROL);
 130
 131                 pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE;
 132         }
 133
 134         pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock;
 135 }
 136
 137 static void intel_pre_enable_lvds(struct intel_encoder *encoder)
 138 {
 139         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 140         struct drm_device *dev = encoder->base.dev;
 141         struct drm_i915_private *dev_priv = dev->dev_private;
 142         struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
 143         const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
 144         int pipe = crtc->pipe;
 145         u32 temp;
 146
 147         if (HAS_PCH_SPLIT(dev)) {
 148                 assert_fdi_rx_pll_disabled(dev_priv, pipe);
 149                 assert_shared_dpll_disabled(dev_priv,
 150                                             crtc->config->shared_dpll);
 151         } else {
 152                 assert_pll_disabled(dev_priv, pipe);
 153         }
 154
 155         temp = I915_READ(lvds_encoder->reg);
 156         temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
 157
 158         if (HAS_PCH_CPT(dev)) {
 159                 temp &= ~PORT_TRANS_SEL_MASK;
 160                 temp |= PORT_TRANS_SEL_CPT(pipe);
 161         } else {
 162                 if (pipe == 1) {
 163                         temp |= LVDS_PIPEB_SELECT;
 164                 } else {
 165                         temp &= ~LVDS_PIPEB_SELECT;
 166                 }
 167         }
 168
 169         /* set the corresponsding LVDS_BORDER bit */
 170         temp &= ~LVDS_BORDER_ENABLE;
 171         temp |= crtc->config->gmch_pfit.lvds_border_bits;
 172         /* Set the B0-B3 data pairs corresponding to whether we're going to
 173          * set the DPLLs for dual-channel mode or not.
 174          */
 175         if (lvds_encoder->is_dual_link)
 176                 temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
 177         else
 178                 temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
 179
 180         /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
 181          * appropriately here, but we need to look more thoroughly into how
 182          * panels behave in the two modes. For now, let's just maintain the
 183          * value we got from the BIOS.
 184          */
 185          temp &= ~LVDS_A3_POWER_MASK;
 186          temp |= lvds_encoder->a3_power;
 187
 188         /* Set the dithering flag on LVDS as needed, note that there is no
 189          * special lvds dither control bit on pch-split platforms, dithering is
 190          * only controlled through the PIPECONF reg. */
 191         if (INTEL_INFO(dev)->gen == 4) {
 192                 /* Bspec wording suggests that LVDS port dithering only exists
 193                  * for 18bpp panels. */
 194                 if (crtc->config->dither && crtc->config->pipe_bpp == 18)
 195                         temp |= LVDS_ENABLE_DITHER;
 196                 else
 197                         temp &= ~LVDS_ENABLE_DITHER;
 198         }
 199         temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
 200         if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
 201                 temp |= LVDS_HSYNC_POLARITY;
 202         if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
 203                 temp |= LVDS_VSYNC_POLARITY;
 204
 205         I915_WRITE(lvds_encoder->reg, temp);
 206 }
 207
 208 /**
 209  * Sets the power state for the panel.
 210  */
 211 static void intel_enable_lvds(struct intel_encoder *encoder)
 212 {
 213         struct drm_device *dev = encoder->base.dev;
 214         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 215         struct intel_connector *intel_connector =
 216                 &lvds_encoder->attached_connector->base;
 217         struct drm_i915_private *dev_priv = dev->dev_private;
 218         i915_reg_t ctl_reg, stat_reg;
 219
 220         if (HAS_PCH_SPLIT(dev)) {
 221                 ctl_reg = PCH_PP_CONTROL;
 222                 stat_reg = PCH_PP_STATUS;
 223         } else {
 224                 ctl_reg = PP_CONTROL;
 225                 stat_reg = PP_STATUS;
 226         }
 227
 228         I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
 229
 230         I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
 231         POSTING_READ(lvds_encoder->reg);
 232         if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
 233                 DRM_ERROR("timed out waiting for panel to power on\n");
 234
 235         intel_panel_enable_backlight(intel_connector);
 236 }
 237
 238 static void intel_disable_lvds(struct intel_encoder *encoder)
 239 {
 240         struct drm_device *dev = encoder->base.dev;
 241         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 242         struct drm_i915_private *dev_priv = dev->dev_private;
 243         i915_reg_t ctl_reg, stat_reg;
 244
 245         if (HAS_PCH_SPLIT(dev)) {
 246                 ctl_reg = PCH_PP_CONTROL;
 247                 stat_reg = PCH_PP_STATUS;
 248         } else {
 249                 ctl_reg = PP_CONTROL;
 250                 stat_reg = PP_STATUS;
 251         }
 252
 253         I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
 254         if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
 255                 DRM_ERROR("timed out waiting for panel to power off\n");
 256
 257         I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
 258         POSTING_READ(lvds_encoder->reg);
 259 }
 260
 261 static void gmch_disable_lvds(struct intel_encoder *encoder)
 262 {
 263         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 264         struct intel_connector *intel_connector =
 265                 &lvds_encoder->attached_connector->base;
 266
 267         intel_panel_disable_backlight(intel_connector);
 268
 269         intel_disable_lvds(encoder);
 270 }
 271
 272 static void pch_disable_lvds(struct intel_encoder *encoder)
 273 {
 274         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 275         struct intel_connector *intel_connector =
 276                 &lvds_encoder->attached_connector->base;
 277
 278         intel_panel_disable_backlight(intel_connector);
 279 }
 280
 281 static void pch_post_disable_lvds(struct intel_encoder *encoder)
 282 {
 283         intel_disable_lvds(encoder);
 284 }
 285
 286 static enum drm_mode_status
 287 intel_lvds_mode_valid(struct drm_connector *connector,
 288                       struct drm_display_mode *mode)
 289 {
 290         struct intel_connector *intel_connector = to_intel_connector(connector);
 291         struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
 292         int max_pixclk = to_i915(connector->dev)->max_dotclk_freq;
 293
 294         if (mode->hdisplay > fixed_mode->hdisplay)
 295                 return MODE_PANEL;
 296         if (mode->vdisplay > fixed_mode->vdisplay)
 297                 return MODE_PANEL;
 298         if (fixed_mode->clock > max_pixclk)
 299                 return MODE_CLOCK_HIGH;
 300
 301         return MODE_OK;
 302 }
 303
 304 static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
 305                                       struct intel_crtc_state *pipe_config)
 306 {
 307         struct drm_device *dev = intel_encoder->base.dev;
 308         struct intel_lvds_encoder *lvds_encoder =
 309                 to_lvds_encoder(&intel_encoder->base);
 310         struct intel_connector *intel_connector =
 311                 &lvds_encoder->attached_connector->base;
 312         struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
 313         struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);
 314         unsigned int lvds_bpp;
 315
 316         /* Should never happen!! */
 317         if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
 318                 DRM_ERROR("Can't support LVDS on pipe A\n");
 319                 return false;
 320         }
 321
 322         if (lvds_encoder->a3_power == LVDS_A3_POWER_UP)
 323                 lvds_bpp = 8*3;
 324         else
 325                 lvds_bpp = 6*3;
 326
 327         if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) {
 328                 DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
 329                               pipe_config->pipe_bpp, lvds_bpp);
 330                 pipe_config->pipe_bpp = lvds_bpp;
 331         }
 332
 333         /*
 334          * We have timings from the BIOS for the panel, put them in
 335          * to the adjusted mode.  The CRTC will be set up for this mode,
 336          * with the panel scaling set up to source from the H/VDisplay
 337          * of the original mode.
 338          */
 339         intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
 340                                adjusted_mode);
 341
 342         if (HAS_PCH_SPLIT(dev)) {
 343                 pipe_config->has_pch_encoder = true;
 344
 345                 intel_pch_panel_fitting(intel_crtc, pipe_config,
 346                                         intel_connector->panel.fitting_mode);
 347         } else {
 348                 intel_gmch_panel_fitting(intel_crtc, pipe_config,
 349                                          intel_connector->panel.fitting_mode);
 350
 351         }
 352
 353         /*
 354          * XXX: It would be nice to support lower refresh rates on the
 355          * panels to reduce power consumption, and perhaps match the
 356          * user's requested refresh rate.
 357          */
 358
 359         return true;
 360 }
 361
 362 /**
 363  * Detect the LVDS connection.
 364  *
 365  * Since LVDS doesn't have hotlug, we use the lid as a proxy.  Open means
 366  * connected and closed means disconnected.  We also send hotplug events as
 367  * needed, using lid status notification from the input layer.
 368  */
 369 static enum drm_connector_status
 370 intel_lvds_detect(struct drm_connector *connector, bool force)
 371 {
 372         struct drm_device *dev = connector->dev;
 373         enum drm_connector_status status;
 374
 375         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
 376                       connector->base.id, connector->name);
 377
 378         status = intel_panel_detect(dev);
 379         if (status != connector_status_unknown)
 380                 return status;
 381
 382         return connector_status_connected;
 383 }
 384
 385 /**
 386  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
 387  */
 388 static int intel_lvds_get_modes(struct drm_connector *connector)
 389 {
 390         struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
 391         struct drm_device *dev = connector->dev;
 392         struct drm_display_mode *mode;
 393
 394         /* use cached edid if we have one */
 395         if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
 396                 return drm_add_edid_modes(connector, lvds_connector->base.edid);
 397
 398         mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
 399         if (mode == NULL)
 400                 return 0;
 401
 402         drm_mode_probed_add(connector, mode);
 403         return 1;
 404 }
 405
 406 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
 407 {
 408         DRM_INFO("Skipping forced modeset for %s\n", id->ident);
 409         return 1;
 410 }
 411
 412 /* The GPU hangs up on these systems if modeset is performed on LID open */
 413 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
 414         {
 415                 .callback = intel_no_modeset_on_lid_dmi_callback,
 416                 .ident = "Toshiba Tecra A11",
 417                 .matches = {
 418                         DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
 419                         DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
 420                 },
 421         },
 422
 423         { }     /* terminating entry */
 424 };
 425
 426 #if 0
 427 /*
 428  * Lid events. Note the use of 'modeset':
 429  *  - we set it to MODESET_ON_LID_OPEN on lid close,
 430  *    and set it to MODESET_DONE on open
 431  *  - we use it as a "only once" bit (ie we ignore
 432  *    duplicate events where it was already properly set)
 433  *  - the suspend/resume paths will set it to
 434  *    MODESET_SUSPENDED and ignore the lid open event,
 435  *    because they restore the mode ("lid open").
 436  */
 437 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
 438                             void *unused)
 439 {
 440         struct intel_lvds_connector *lvds_connector =
 441                 container_of(nb, struct intel_lvds_connector, lid_notifier);
 442         struct drm_connector *connector = &lvds_connector->base.base;
 443         struct drm_device *dev = connector->dev;
 444         struct drm_i915_private *dev_priv = dev->dev_private;
 445
 446         if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
 447                 return NOTIFY_OK;
 448
 449         mutex_lock(&dev_priv->modeset_restore_lock);
 450         if (dev_priv->modeset_restore == MODESET_SUSPENDED)
 451                 goto exit;
 452         /*
 453          * check and update the status of LVDS connector after receiving
 454          * the LID nofication event.
 455          */
 456         connector->status = connector->funcs->detect(connector, false);
 457
 458         /* Don't force modeset on machines where it causes a GPU lockup */
 459         if (dmi_check_system(intel_no_modeset_on_lid))
 460                 goto exit;
 461         if (!acpi_lid_open()) {
 462                 /* do modeset on next lid open event */
 463                 dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
 464                 goto exit;
 465         }
 466
 467         if (dev_priv->modeset_restore == MODESET_DONE)
 468                 goto exit;
 469
 470         /*
 471          * Some old platform's BIOS love to wreak havoc while the lid is closed.
 472          * We try to detect this here and undo any damage. The split for PCH
 473          * platforms is rather conservative and a bit arbitrary expect that on
 474          * those platforms VGA disabling requires actual legacy VGA I/O access,
 475          * and as part of the cleanup in the hw state restore we also redisable
 476          * the vga plane.
 477          */
 478         if (!HAS_PCH_SPLIT(dev))
 479                 intel_display_resume(dev);
 480
 481         dev_priv->modeset_restore = MODESET_DONE;
 482
 483 exit:
 484         mutex_unlock(&dev_priv->modeset_restore_lock);
 485         return NOTIFY_OK;
 486 }
 487 #endif
 488
 489 /**
 490  * intel_lvds_destroy - unregister and free LVDS structures
 491  * @connector: connector to free
 492  *
 493  * Unregister the DDC bus for this connector then free the driver private
 494  * structure.
 495  */
 496 static void intel_lvds_destroy(struct drm_connector *connector)
 497 {
 498         struct intel_lvds_connector *lvds_connector =
 499                 to_lvds_connector(connector);
 500
 501 #if 0
 502         if (lvds_connector->lid_notifier.notifier_call)
 503                 acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
 504 #endif
 505
 506         if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
 507                 kfree(lvds_connector->base.edid);
 508
 509         intel_panel_fini(&lvds_connector->base.panel);
 510
 511         drm_connector_cleanup(connector);
 512         kfree(connector);
 513 }
 514
 515 static int intel_lvds_set_property(struct drm_connector *connector,
 516                                    struct drm_property *property,
 517                                    uint64_t value)
 518 {
 519         struct intel_connector *intel_connector = to_intel_connector(connector);
 520         struct drm_device *dev = connector->dev;
 521
 522         if (property == dev->mode_config.scaling_mode_property) {
 523                 struct drm_crtc *crtc;
 524
 525                 if (value == DRM_MODE_SCALE_NONE) {
 526                         DRM_DEBUG_KMS("no scaling not supported\n");
 527                         return -EINVAL;
 528                 }
 529
 530                 if (intel_connector->panel.fitting_mode == value) {
 531                         /* the LVDS scaling property is not changed */
 532                         return 0;
 533                 }
 534                 intel_connector->panel.fitting_mode = value;
 535
 536                 crtc = intel_attached_encoder(connector)->base.crtc;
 537                 if (crtc && crtc->state->enable) {
 538                         /*
 539                          * If the CRTC is enabled, the display will be changed
 540                          * according to the new panel fitting mode.
 541                          */
 542                         intel_crtc_restore_mode(crtc);
 543                 }
 544         }
 545
 546         return 0;
 547 }
 548
 549 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
 550         .get_modes = intel_lvds_get_modes,
 551         .mode_valid = intel_lvds_mode_valid,
 552         .best_encoder = intel_best_encoder,
 553 };
 554
 555 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
 556         .dpms = drm_atomic_helper_connector_dpms,
 557         .detect = intel_lvds_detect,
 558         .fill_modes = drm_helper_probe_single_connector_modes,
 559         .set_property = intel_lvds_set_property,
 560         .atomic_get_property = intel_connector_atomic_get_property,
 561         .destroy = intel_lvds_destroy,
 562         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 563         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
 564 };
 565
 566 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
 567         .destroy = intel_encoder_destroy,
 568 };
 569
 570 static int intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
 571 {
 572         DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
 573         return 1;
 574 }
 575
 576 /* These systems claim to have LVDS, but really don't */
 577 static const struct dmi_system_id intel_no_lvds[] = {
 578         {
 579                 .callback = intel_no_lvds_dmi_callback,
 580                 .ident = "Apple Mac Mini (Core series)",
 581                 .matches = {
 582                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 583                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
 584                 },
 585         },
 586         {
 587                 .callback = intel_no_lvds_dmi_callback,
 588                 .ident = "Apple Mac Mini (Core 2 series)",
 589                 .matches = {
 590                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 591                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
 592                 },
 593         },
 594         {
 595                 .callback = intel_no_lvds_dmi_callback,
 596                 .ident = "MSI IM-945GSE-A",
 597                 .matches = {
 598                         DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
 599                         DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
 600                 },
 601         },
 602         {
 603                 .callback = intel_no_lvds_dmi_callback,
 604                 .ident = "Dell Studio Hybrid",
 605                 .matches = {
 606                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 607                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
 608                 },
 609         },
 610         {
 611                 .callback = intel_no_lvds_dmi_callback,
 612                 .ident = "Dell OptiPlex FX170",
 613                 .matches = {
 614                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 615                         DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
 616                 },
 617         },
 618         {
 619                 .callback = intel_no_lvds_dmi_callback,
 620                 .ident = "AOpen Mini PC",
 621                 .matches = {
 622                         DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
 623                         DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
 624                 },
 625         },
 626         {
 627                 .callback = intel_no_lvds_dmi_callback,
 628                 .ident = "AOpen Mini PC MP915",
 629                 .matches = {
 630                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 631                         DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
 632                 },
 633         },
 634         {
 635                 .callback = intel_no_lvds_dmi_callback,
 636                 .ident = "AOpen i915GMm-HFS",
 637                 .matches = {
 638                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 639                         DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
 640                 },
 641         },
 642         {
 643                 .callback = intel_no_lvds_dmi_callback,
 644                 .ident = "AOpen i45GMx-I",
 645                 .matches = {
 646                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 647                         DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
 648                 },
 649         },
 650         {
 651                 .callback = intel_no_lvds_dmi_callback,
 652                 .ident = "Aopen i945GTt-VFA",
 653                 .matches = {
 654                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
 655                 },
 656         },
 657         {
 658                 .callback = intel_no_lvds_dmi_callback,
 659                 .ident = "Clientron U800",
 660                 .matches = {
 661                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
 662                         DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
 663                 },
 664         },
 665         {
 666                 .callback = intel_no_lvds_dmi_callback,
 667                 .ident = "Clientron E830",
 668                 .matches = {
 669                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
 670                         DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
 671                 },
 672         },
 673         {
 674                 .callback = intel_no_lvds_dmi_callback,
 675                 .ident = "Asus EeeBox PC EB1007",
 676                 .matches = {
 677                         DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
 678                         DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
 679                 },
 680         },
 681         {
 682                 .callback = intel_no_lvds_dmi_callback,
 683                 .ident = "Asus AT5NM10T-I",
 684                 .matches = {
 685                         DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
 686                         DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
 687                 },
 688         },
 689         {
 690                 .callback = intel_no_lvds_dmi_callback,
 691                 .ident = "Hewlett-Packard HP t5740",
 692                 .matches = {
 693                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 694                         DMI_MATCH(DMI_PRODUCT_NAME, " t5740"),
 695                 },
 696         },
 697         {
 698                 .callback = intel_no_lvds_dmi_callback,
 699                 .ident = "Hewlett-Packard t5745",
 700                 .matches = {
 701                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 702                         DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
 703                 },
 704         },
 705         {
 706                 .callback = intel_no_lvds_dmi_callback,
 707                 .ident = "Hewlett-Packard st5747",
 708                 .matches = {
 709                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 710                         DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
 711                 },
 712         },
 713         {
 714                 .callback = intel_no_lvds_dmi_callback,
 715                 .ident = "MSI Wind Box DC500",
 716                 .matches = {
 717                         DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
 718                         DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
 719                 },
 720         },
 721         {
 722                 .callback = intel_no_lvds_dmi_callback,
 723                 .ident = "Gigabyte GA-D525TUD",
 724                 .matches = {
 725                         DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
 726                         DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
 727                 },
 728         },
 729         {
 730                 .callback = intel_no_lvds_dmi_callback,
 731                 .ident = "Supermicro X7SPA-H",
 732                 .matches = {
 733                         DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
 734                         DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
 735                 },
 736         },
 737         {
 738                 .callback = intel_no_lvds_dmi_callback,
 739                 .ident = "Fujitsu Esprimo Q900",
 740                 .matches = {
 741                         DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
 742                         DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
 743                 },
 744         },
 745         {
 746                 .callback = intel_no_lvds_dmi_callback,
 747                 .ident = "Intel D410PT",
 748                 .matches = {
 749                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 750                         DMI_MATCH(DMI_BOARD_NAME, "D410PT"),
 751                 },
 752         },
 753         {
 754                 .callback = intel_no_lvds_dmi_callback,
 755                 .ident = "Intel D425KT",
 756                 .matches = {
 757                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 758                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D425KT"),
 759                 },
 760         },
 761         {
 762                 .callback = intel_no_lvds_dmi_callback,
 763                 .ident = "Intel D510MO",
 764                 .matches = {
 765                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 766                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D510MO"),
 767                 },
 768         },
 769         {
 770                 .callback = intel_no_lvds_dmi_callback,
 771                 .ident = "Intel D525MW",
 772                 .matches = {
 773                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 774                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D525MW"),
 775                 },
 776         },
 777
 778         { }     /* terminating entry */
 779 };
 780
 781 static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
 782 {
 783         DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
 784         return 1;
 785 }
 786
 787 static const struct dmi_system_id intel_dual_link_lvds[] = {
 788         {
 789                 .callback = intel_dual_link_lvds_callback,
 790                 .ident = "Apple MacBook Pro 15\" (2010)",
 791                 .matches = {
 792                         DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
 793                         DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro6,2"),
 794                 },
 795         },
 796         {
 797                 .callback = intel_dual_link_lvds_callback,
 798                 .ident = "Apple MacBook Pro 15\" (2011)",
 799                 .matches = {
 800                         DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
 801                         DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
 802                 },
 803         },
 804         {
 805                 .callback = intel_dual_link_lvds_callback,
 806                 .ident = "Apple MacBook Pro 15\" (2012)",
 807                 .matches = {
 808                         DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
 809                         DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro9,1"),
 810                 },
 811         },
 812         { }     /* terminating entry */
 813 };
 814
 815 bool intel_is_dual_link_lvds(struct drm_device *dev)
 816 {
 817         struct intel_encoder *encoder;
 818         struct intel_lvds_encoder *lvds_encoder;
 819
 820         for_each_intel_encoder(dev, encoder) {
 821                 if (encoder->type == INTEL_OUTPUT_LVDS) {
 822                         lvds_encoder = to_lvds_encoder(&encoder->base);
 823
 824                         return lvds_encoder->is_dual_link;
 825                 }
 826         }
 827
 828         return false;
 829 }
 830
 831 static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
 832 {
 833         struct drm_device *dev = lvds_encoder->base.base.dev;
 834         unsigned int val;
 835         struct drm_i915_private *dev_priv = dev->dev_private;
 836
 837         /* use the module option value if specified */
 838         if (i915.lvds_channel_mode > 0)
 839                 return i915.lvds_channel_mode == 2;
 840
 841         /* single channel LVDS is limited to 112 MHz */
 842         if (lvds_encoder->attached_connector->base.panel.fixed_mode->clock
 843             > 112999)
 844                 return true;
 845
 846         if (dmi_check_system(intel_dual_link_lvds))
 847                 return true;
 848
 849         /* BIOS should set the proper LVDS register value at boot, but
 850          * in reality, it doesn't set the value when the lid is closed;
 851          * we need to check "the value to be set" in VBT when LVDS
 852          * register is uninitialized.
 853          */
 854         val = I915_READ(lvds_encoder->reg);
 855         if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
 856                 val = dev_priv->vbt.bios_lvds_val;
 857
 858         return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
 859 }
 860
 861 static bool intel_lvds_supported(struct drm_device *dev)
 862 {
 863         /* With the introduction of the PCH we gained a dedicated
 864          * LVDS presence pin, use it. */
 865         if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
 866                 return true;
 867
 868         /* Otherwise LVDS was only attached to mobile products,
 869          * except for the inglorious 830gm */
 870         if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
 871                 return true;
 872
 873         return false;
 874 }
 875
 876 /**
 877  * intel_lvds_init - setup LVDS connectors on this device
 878  * @dev: drm device
 879  *
 880  * Create the connector, register the LVDS DDC bus, and try to figure out what
 881  * modes we can display on the LVDS panel (if present).
 882  */
 883 void intel_lvds_init(struct drm_device *dev)
 884 {
 885         struct drm_i915_private *dev_priv = dev->dev_private;
 886         struct intel_lvds_encoder *lvds_encoder;
 887         struct intel_encoder *intel_encoder;
 888         struct intel_lvds_connector *lvds_connector;
 889         struct intel_connector *intel_connector;
 890         struct drm_connector *connector;
 891         struct drm_encoder *encoder;
 892         struct drm_display_mode *scan; /* *modes, *bios_mode; */
 893         struct drm_display_mode *fixed_mode = NULL;
 894         struct drm_display_mode *downclock_mode = NULL;
 895         struct edid *edid;
 896         struct drm_crtc *crtc;
 897         i915_reg_t lvds_reg;
 898         u32 lvds;
 899         int pipe;
 900         u8 pin;
 901
 902         /*
 903          * Unlock registers and just leave them unlocked. Do this before
 904          * checking quirk lists to avoid bogus WARNINGs.
 905          */
 906         if (HAS_PCH_SPLIT(dev)) {
 907                 I915_WRITE(PCH_PP_CONTROL,
 908                            I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
 909         } else if (INTEL_INFO(dev_priv)->gen < 5) {
 910                 I915_WRITE(PP_CONTROL,
 911                            I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
 912         }
 913         if (!intel_lvds_supported(dev))
 914                 return;
 915
 916         /* Skip init on machines we know falsely report LVDS */
 917         if (dmi_check_system(intel_no_lvds))
 918                 return;
 919
 920         if (HAS_PCH_SPLIT(dev))
 921                 lvds_reg = PCH_LVDS;
 922         else
 923                 lvds_reg = LVDS;
 924
 925         lvds = I915_READ(lvds_reg);
 926
 927         if (HAS_PCH_SPLIT(dev)) {
 928                 if ((lvds & LVDS_DETECTED) == 0)
 929                         return;
 930                 if (dev_priv->vbt.edp.support) {
 931                         DRM_DEBUG_KMS("disable LVDS for eDP support\n");
 932                         return;
 933                 }
 934         }
 935
 936         pin = GMBUS_PIN_PANEL;
 937         if (!intel_bios_is_lvds_present(dev_priv, &pin)) {
 938                 if ((lvds & LVDS_PORT_EN) == 0) {
 939                         DRM_DEBUG_KMS("LVDS is not present in VBT\n");
 940                         return;
 941                 }
 942                 DRM_DEBUG_KMS("LVDS is not present in VBT, but enabled anyway\n");
 943         }
 944
 945          /* Set the Panel Power On/Off timings if uninitialized. */
 946         if (INTEL_INFO(dev_priv)->gen < 5 &&
 947             I915_READ(PP_ON_DELAYS) == 0 && I915_READ(PP_OFF_DELAYS) == 0) {
 948                 /* Set T2 to 40ms and T5 to 200ms */
 949                 I915_WRITE(PP_ON_DELAYS, 0x019007d0);
 950
 951                 /* Set T3 to 35ms and Tx to 200ms */
 952                 I915_WRITE(PP_OFF_DELAYS, 0x015e07d0);
 953
 954                 DRM_DEBUG_KMS("Panel power timings uninitialized, setting defaults\n");
 955         }
 956
 957         lvds_encoder = kzalloc(sizeof(*lvds_encoder), GFP_KERNEL);
 958         if (!lvds_encoder)
 959                 return;
 960
 961         lvds_connector = kzalloc(sizeof(*lvds_connector), GFP_KERNEL);
 962         if (!lvds_connector) {
 963                 kfree(lvds_encoder);
 964                 return;
 965         }
 966
 967         if (intel_connector_init(&lvds_connector->base) < 0) {
 968                 kfree(lvds_connector);
 969                 kfree(lvds_encoder);
 970                 return;
 971         }
 972
 973         lvds_encoder->attached_connector = lvds_connector;
 974
 975         intel_encoder = &lvds_encoder->base;
 976         encoder = &intel_encoder->base;
 977         intel_connector = &lvds_connector->base;
 978         connector = &intel_connector->base;
 979         drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
 980                            DRM_MODE_CONNECTOR_LVDS);
 981
 982         drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
 983                          DRM_MODE_ENCODER_LVDS, NULL);
 984
 985         intel_encoder->enable = intel_enable_lvds;
 986         intel_encoder->pre_enable = intel_pre_enable_lvds;
 987         intel_encoder->compute_config = intel_lvds_compute_config;
 988         if (HAS_PCH_SPLIT(dev_priv)) {
 989                 intel_encoder->disable = pch_disable_lvds;
 990                 intel_encoder->post_disable = pch_post_disable_lvds;
 991         } else {
 992                 intel_encoder->disable = gmch_disable_lvds;
 993         }
 994         intel_encoder->get_hw_state = intel_lvds_get_hw_state;
 995         intel_encoder->get_config = intel_lvds_get_config;
 996         intel_connector->get_hw_state = intel_connector_get_hw_state;
 997         intel_connector->unregister = intel_connector_unregister;
 998
 999         intel_connector_attach_encoder(intel_connector, intel_encoder);
1000         intel_encoder->type = INTEL_OUTPUT_LVDS;
1001
1002         intel_encoder->cloneable = 0;
1003         if (HAS_PCH_SPLIT(dev))
1004                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
1005         else if (IS_GEN4(dev))
1006                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
1007         else
1008                 intel_encoder->crtc_mask = (1 << 1);
1009
1010         drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
1011         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
1012         connector->interlace_allowed = false;
1013         connector->doublescan_allowed = false;
1014
1015         lvds_encoder->reg = lvds_reg;
1016
1017         /* create the scaling mode property */
1018         drm_mode_create_scaling_mode_property(dev);
1019         drm_object_attach_property(&connector->base,
1020                                       dev->mode_config.scaling_mode_property,
1021                                       DRM_MODE_SCALE_ASPECT);
1022         intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
1023         /*
1024          * LVDS discovery:
1025          * 1) check for EDID on DDC
1026          * 2) check for VBT data
1027          * 3) check to see if LVDS is already on
1028          *    if none of the above, no panel
1029          * 4) make sure lid is open
1030          *    if closed, act like it's not there for now
1031          */
1032
1033         /*
1034          * Attempt to get the fixed panel mode from DDC.  Assume that the
1035          * preferred mode is the right one.
1036          */
1037         mutex_lock(&dev->mode_config.mutex);
1038         if (vga_switcheroo_handler_flags() & VGA_SWITCHEROO_CAN_SWITCH_DDC)
1039                 edid = drm_get_edid_switcheroo(connector,
1040                                     intel_gmbus_get_adapter(dev_priv, pin));
1041         else
1042                 edid = drm_get_edid(connector,
1043                                     intel_gmbus_get_adapter(dev_priv, pin));
1044         if (edid) {
1045                 if (drm_add_edid_modes(connector, edid)) {
1046                         drm_mode_connector_update_edid_property(connector,
1047                                                                 edid);
1048                 } else {
1049                         kfree(edid);
1050                         edid = ERR_PTR(-EINVAL);
1051                 }
1052         } else {
1053                 edid = ERR_PTR(-ENOENT);
1054         }
1055         lvds_connector->base.edid = edid;
1056
1057         if (IS_ERR_OR_NULL(edid)) {
1058                 /* Didn't get an EDID, so
1059                  * Set wide sync ranges so we get all modes
1060                  * handed to valid_mode for checking
1061                  */
1062                 connector->display_info.min_vfreq = 0;
1063                 connector->display_info.max_vfreq = 200;
1064                 connector->display_info.min_hfreq = 0;
1065                 connector->display_info.max_hfreq = 200;
1066         }
1067
1068         list_for_each_entry(scan, &connector->probed_modes, head) {
1069                 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1070                         DRM_DEBUG_KMS("using preferred mode from EDID: ");
1071                         drm_mode_debug_printmodeline(scan);
1072
1073                         fixed_mode = drm_mode_duplicate(dev, scan);
1074                         if (fixed_mode)
1075                                 goto out;
1076                 }
1077         }
1078
1079         /* Failed to get EDID, what about VBT? */
1080         if (dev_priv->vbt.lfp_lvds_vbt_mode) {
1081                 DRM_DEBUG_KMS("using mode from VBT: ");
1082                 drm_mode_debug_printmodeline(dev_priv->vbt.lfp_lvds_vbt_mode);
1083
1084                 fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode);
1085                 if (fixed_mode) {
1086                         fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1087                         connector->display_info.width_mm = fixed_mode->width_mm;
1088                         connector->display_info.height_mm = fixed_mode->height_mm;
1089                         goto out;
1090                 }
1091         }
1092
1093         /*
1094          * If we didn't get EDID, try checking if the panel is already turned
1095          * on.  If so, assume that whatever is currently programmed is the
1096          * correct mode.
1097          */
1098
1099         /* Ironlake: FIXME if still fail, not try pipe mode now */
1100         if (HAS_PCH_SPLIT(dev))
1101                 goto failed;
1102
1103         pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1104         crtc = intel_get_crtc_for_pipe(dev, pipe);
1105
1106         if (crtc && (lvds & LVDS_PORT_EN)) {
1107                 fixed_mode = intel_crtc_mode_get(dev, crtc);
1108                 if (fixed_mode) {
1109                         DRM_DEBUG_KMS("using current (BIOS) mode: ");
1110                         drm_mode_debug_printmodeline(fixed_mode);
1111                         fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1112                         goto out;
1113                 }
1114         }
1115
1116         /* If we still don't have a mode after all that, give up. */
1117         if (!fixed_mode)
1118                 goto failed;
1119
1120 out:
1121         mutex_unlock(&dev->mode_config.mutex);
1122
1123         intel_panel_init(&intel_connector->panel, fixed_mode, downclock_mode);
1124
1125         lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
1126         DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
1127                       lvds_encoder->is_dual_link ? "dual" : "single");
1128
1129         lvds_encoder->a3_power = lvds & LVDS_A3_POWER_MASK;
1130
1131 #if 0
1132         lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
1133         if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
1134                 DRM_DEBUG_KMS("lid notifier registration failed\n");
1135                 lvds_connector->lid_notifier.notifier_call = NULL;
1136         }
1137         drm_connector_register(connector);
1138 #endif
1139
1140         intel_panel_setup_backlight(connector, INVALID_PIPE);
1141
1142         return;
1143
1144 failed:
1145         mutex_unlock(&dev->mode_config.mutex);
1146
1147         DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1148         drm_connector_cleanup(connector);
1149         drm_encoder_cleanup(encoder);
1150         kfree(lvds_encoder);
1151         kfree(lvds_connector);
1152         return;
1153 }