2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
39 * $DragonFly: src/sys/platform/pc32/i386/machdep.c,v 1.57 2004/04/05 19:15:57 dillon Exp $
43 #include "use_ether.h"
46 #include "opt_atalk.h"
47 #include "opt_compat.h"
50 #include "opt_directio.h"
53 #include "opt_maxmem.h"
54 #include "opt_msgbuf.h"
55 #include "opt_perfmon.h"
57 #include "opt_userconfig.h"
59 #include <sys/param.h>
60 #include <sys/systm.h>
61 #include <sys/sysproto.h>
62 #include <sys/signalvar.h>
63 #include <sys/kernel.h>
64 #include <sys/linker.h>
65 #include <sys/malloc.h>
68 #include <sys/reboot.h>
69 #include <sys/callout.h>
71 #include <sys/msgbuf.h>
72 #include <sys/sysent.h>
73 #include <sys/sysctl.h>
74 #include <sys/vmmeter.h>
76 #include <sys/upcall.h>
79 #include <vm/vm_param.h>
81 #include <vm/vm_kern.h>
82 #include <vm/vm_object.h>
83 #include <vm/vm_page.h>
84 #include <vm/vm_map.h>
85 #include <vm/vm_pager.h>
86 #include <vm/vm_extern.h>
88 #include <sys/thread2.h>
96 #include <machine/cpu.h>
97 #include <machine/reg.h>
98 #include <machine/clock.h>
99 #include <machine/specialreg.h>
100 #include <machine/bootinfo.h>
101 #include <machine/ipl.h>
102 #include <machine/md_var.h>
103 #include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
104 #include <machine/globaldata.h> /* CPU_prvspace */
106 #include <machine/smp.h>
109 #include <machine/perfmon.h>
111 #include <machine/cputypes.h>
114 #include <bus/isa/i386/isa_device.h>
116 #include <i386/isa/intr_machdep.h>
117 #include <bus/isa/rtc.h>
118 #include <machine/vm86.h>
119 #include <sys/random.h>
120 #include <sys/ptrace.h>
121 #include <machine/sigframe.h>
123 extern void init386 (int first);
124 extern void dblfault_handler (void);
126 extern void printcpuinfo(void); /* XXX header file */
127 extern void finishidentcpu(void);
128 extern void panicifcpuunsupported(void);
129 extern void initializecpu(void);
131 static void cpu_startup (void *);
132 #ifndef CPU_DISABLE_SSE
133 static void set_fpregs_xmm (struct save87 *, struct savexmm *);
134 static void fill_fpregs_xmm (struct savexmm *, struct save87 *);
135 #endif /* CPU_DISABLE_SSE */
137 extern void ffs_rawread_setup(void);
138 #endif /* DIRECTIO */
139 static void init_locks(void);
141 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
143 static MALLOC_DEFINE(M_MBUF, "mbuf", "mbuf");
145 int _udatasel, _ucodesel;
148 #if defined(SWTCH_OPTIM_STATS)
149 extern int swtch_optim_stats;
150 SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
151 CTLFLAG_RD, &swtch_optim_stats, 0, "");
152 SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
153 CTLFLAG_RD, &tlb_flush_count, 0, "");
157 static int ispc98 = 1;
159 static int ispc98 = 0;
161 SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, "");
167 sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
169 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
173 SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
174 0, 0, sysctl_hw_physmem, "IU", "");
177 sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
179 int error = sysctl_handle_int(oidp, 0,
180 ctob(physmem - vmstats.v_wire_count), req);
184 SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
185 0, 0, sysctl_hw_usermem, "IU", "");
188 sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
190 int error = sysctl_handle_int(oidp, 0,
191 i386_btop(avail_end - avail_start), req);
195 SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
196 0, 0, sysctl_hw_availpages, "I", "");
199 sysctl_machdep_msgbuf(SYSCTL_HANDLER_ARGS)
203 /* Unwind the buffer, so that it's linear (possibly starting with
204 * some initial nulls).
206 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr+msgbufp->msg_bufr,
207 msgbufp->msg_size-msgbufp->msg_bufr,req);
208 if(error) return(error);
209 if(msgbufp->msg_bufr>0) {
210 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr,
211 msgbufp->msg_bufr,req);
216 SYSCTL_PROC(_machdep, OID_AUTO, msgbuf, CTLTYPE_STRING|CTLFLAG_RD,
217 0, 0, sysctl_machdep_msgbuf, "A","Contents of kernel message buffer");
219 static int msgbuf_clear;
222 sysctl_machdep_msgbuf_clear(SYSCTL_HANDLER_ARGS)
225 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
227 if (!error && req->newptr) {
228 /* Clear the buffer and reset write pointer */
229 bzero(msgbufp->msg_ptr,msgbufp->msg_size);
230 msgbufp->msg_bufr=msgbufp->msg_bufx=0;
236 SYSCTL_PROC(_machdep, OID_AUTO, msgbuf_clear, CTLTYPE_INT|CTLFLAG_RW,
237 &msgbuf_clear, 0, sysctl_machdep_msgbuf_clear, "I",
238 "Clear kernel message buffer");
241 vm_paddr_t Maxmem = 0;
244 vm_paddr_t phys_avail[10];
246 /* must be 2 less so 0 0 can signal end of chunks */
247 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2)
249 static vm_offset_t buffer_sva, buffer_eva;
250 vm_offset_t clean_sva, clean_eva;
251 static vm_offset_t pager_sva, pager_eva;
252 static struct trapframe proc0_tf;
265 if (boothowto & RB_VERBOSE)
269 * Good {morning,afternoon,evening,night}.
271 printf("%s", version);
274 panicifcpuunsupported();
278 printf("real memory = %llu (%lluK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024);
280 * Display any holes after the first chunk of extended memory.
285 printf("Physical memory chunk(s):\n");
286 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
287 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
289 printf("0x%08llx - 0x%08llx, %llu bytes (%llu pages)\n",
290 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
296 * Calculate callout wheel size
298 for (callwheelsize = 1, callwheelbits = 0;
299 callwheelsize < ncallout;
300 callwheelsize <<= 1, ++callwheelbits)
302 callwheelmask = callwheelsize - 1;
305 * Allocate space for system data structures.
306 * The first available kernel virtual address is in "v".
307 * As pages of kernel virtual memory are allocated, "v" is incremented.
308 * As pages of memory are allocated and cleared,
309 * "firstaddr" is incremented.
310 * An index into the kernel page table corresponding to the
311 * virtual memory address maintained in "v" is kept in "mapaddr".
315 * Make two passes. The first pass calculates how much memory is
316 * needed and allocates it. The second pass assigns virtual
317 * addresses to the various data structures.
321 v = (caddr_t)firstaddr;
323 #define valloc(name, type, num) \
324 (name) = (type *)v; v = (caddr_t)((name)+(num))
325 #define valloclim(name, type, num, lim) \
326 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
328 valloc(callout, struct callout, ncallout);
329 valloc(callwheel, struct callout_tailq, callwheelsize);
332 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
333 * For the first 64MB of ram nominally allocate sufficient buffers to
334 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
335 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
336 * the buffer cache we limit the eventual kva reservation to
339 * factor represents the 1/4 x ram conversion.
342 int factor = 4 * BKVASIZE / 1024;
343 int kbytes = physmem * (PAGE_SIZE / 1024);
347 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
349 nbuf += (kbytes - 65536) * 2 / (factor * 5);
350 if (maxbcache && nbuf > maxbcache / BKVASIZE)
351 nbuf = maxbcache / BKVASIZE;
355 * Do not allow the buffer_map to be more then 1/2 the size of the
358 if (nbuf > (kernel_map->max_offset - kernel_map->min_offset) /
360 nbuf = (kernel_map->max_offset - kernel_map->min_offset) /
362 printf("Warning: nbufs capped at %d\n", nbuf);
365 nswbuf = max(min(nbuf/4, 256), 16);
367 if (nswbuf < NSWBUF_MIN)
374 valloc(swbuf, struct buf, nswbuf);
375 valloc(buf, struct buf, nbuf);
379 * End of first pass, size has been calculated so allocate memory
381 if (firstaddr == 0) {
382 size = (vm_size_t)(v - firstaddr);
383 firstaddr = (int)kmem_alloc(kernel_map, round_page(size));
385 panic("startup: no room for tables");
390 * End of second pass, addresses have been assigned
392 if ((vm_size_t)(v - firstaddr) != size)
393 panic("startup: table size inconsistency");
395 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva,
396 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
397 buffer_map = kmem_suballoc(clean_map, &buffer_sva, &buffer_eva,
399 buffer_map->system_map = 1;
400 pager_map = kmem_suballoc(clean_map, &pager_sva, &pager_eva,
401 (nswbuf*MAXPHYS) + pager_map_size);
402 pager_map->system_map = 1;
403 exec_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr,
404 (16*(ARG_MAX+(PAGE_SIZE*3))));
407 * Finally, allocate mbuf pool. Since mclrefcnt is an off-size
408 * we use the more space efficient malloc in place of kmem_alloc.
411 vm_offset_t mb_map_size;
413 mb_map_size = nmbufs * MSIZE + nmbclusters * MCLBYTES;
414 mb_map_size = roundup2(mb_map_size, max(MCLBYTES, PAGE_SIZE));
415 mclrefcnt = malloc(mb_map_size / MCLBYTES, M_MBUF, M_WAITOK);
416 bzero(mclrefcnt, mb_map_size / MCLBYTES);
417 mb_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr,
419 mb_map->system_map = 1;
420 mbutl = (void *)mb_map->header.start;
421 mbute = (void *)mb_map->header.end;
425 * Initialize callouts
427 SLIST_INIT(&callfree);
428 for (i = 0; i < ncallout; i++) {
429 callout_init(&callout[i]);
430 callout[i].c_flags = CALLOUT_LOCAL_ALLOC;
431 SLIST_INSERT_HEAD(&callfree, &callout[i], c_links.sle);
434 for (i = 0; i < callwheelsize; i++) {
435 TAILQ_INIT(&callwheel[i]);
438 #if defined(USERCONFIG)
440 cninit(); /* the preferred console may have changed */
443 printf("avail memory = %u (%uK bytes)\n", ptoa(vmstats.v_free_count),
444 ptoa(vmstats.v_free_count) / 1024);
447 * Set up buffers, so they can be used to read disk labels.
450 vm_pager_bufferinit();
454 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
456 mp_start(); /* fire up the APs and APICs */
463 * Send an interrupt to process.
465 * Stack is set up to allow sigcode stored
466 * at top to call routine, followed by kcall
467 * to sigreturn routine below. After sigreturn
468 * resets the signal mask, the stack, and the
469 * frame pointer, it returns to the user
473 sendsig(catcher, sig, mask, code)
479 struct proc *p = curproc;
480 struct trapframe *regs;
481 struct sigacts *psp = p->p_sigacts;
482 struct sigframe sf, *sfp;
485 regs = p->p_md.md_regs;
486 oonstack = (p->p_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
488 /* save user context */
489 bzero(&sf, sizeof(struct sigframe));
490 sf.sf_uc.uc_sigmask = *mask;
491 sf.sf_uc.uc_stack = p->p_sigstk;
492 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
493 sf.sf_uc.uc_mcontext.mc_gs = rgs();
494 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(struct trapframe));
496 /* Allocate and validate space for the signal handler context. */
497 if ((p->p_flag & P_ALTSTACK) != 0 && !oonstack &&
498 SIGISMEMBER(psp->ps_sigonstack, sig)) {
499 sfp = (struct sigframe *)(p->p_sigstk.ss_sp +
500 p->p_sigstk.ss_size - sizeof(struct sigframe));
501 p->p_sigstk.ss_flags |= SS_ONSTACK;
504 sfp = (struct sigframe *)regs->tf_esp - 1;
506 /* Translate the signal is appropriate */
507 if (p->p_sysent->sv_sigtbl) {
508 if (sig <= p->p_sysent->sv_sigsize)
509 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
512 /* Build the argument list for the signal handler. */
514 sf.sf_ucontext = (register_t)&sfp->sf_uc;
515 if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) {
516 /* Signal handler installed with SA_SIGINFO. */
517 sf.sf_siginfo = (register_t)&sfp->sf_si;
518 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
520 /* fill siginfo structure */
521 sf.sf_si.si_signo = sig;
522 sf.sf_si.si_code = code;
523 sf.sf_si.si_addr = (void*)regs->tf_err;
526 /* Old FreeBSD-style arguments. */
527 sf.sf_siginfo = code;
528 sf.sf_addr = regs->tf_err;
529 sf.sf_ahu.sf_handler = catcher;
533 * If we're a vm86 process, we want to save the segment registers.
534 * We also change eflags to be our emulated eflags, not the actual
537 if (regs->tf_eflags & PSL_VM) {
538 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
539 struct vm86_kernel *vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
541 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
542 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
543 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
544 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
546 if (vm86->vm86_has_vme == 0)
547 sf.sf_uc.uc_mcontext.mc_eflags =
548 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
549 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
552 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
553 * syscalls made by the signal handler. This just avoids
554 * wasting time for our lazy fixup of such faults. PSL_NT
555 * does nothing in vm86 mode, but vm86 programs can set it
556 * almost legitimately in probes for old cpu types.
558 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
562 * Copy the sigframe out to the user's stack.
564 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
566 * Something is wrong with the stack pointer.
567 * ...Kill the process.
572 regs->tf_esp = (int)sfp;
573 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
574 regs->tf_eflags &= ~PSL_T;
575 regs->tf_cs = _ucodesel;
576 regs->tf_ds = _udatasel;
577 regs->tf_es = _udatasel;
578 regs->tf_fs = _udatasel;
579 regs->tf_ss = _udatasel;
583 * sigreturn(ucontext_t *sigcntxp)
585 * System call to cleanup state after a signal
586 * has been taken. Reset signal mask and
587 * stack state from context left by sendsig (above).
588 * Return to previous pc and psl as specified by
589 * context left by sendsig. Check carefully to
590 * make sure that the user has not modified the
591 * state to gain improper privileges.
593 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
594 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
597 sigreturn(struct sigreturn_args *uap)
599 struct proc *p = curproc;
600 struct trapframe *regs;
606 if (!useracc((caddr_t)ucp, sizeof(ucontext_t), VM_PROT_READ))
609 regs = p->p_md.md_regs;
610 eflags = ucp->uc_mcontext.mc_eflags;
612 if (eflags & PSL_VM) {
613 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
614 struct vm86_kernel *vm86;
617 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
618 * set up the vm86 area, and we can't enter vm86 mode.
620 if (p->p_thread->td_pcb->pcb_ext == 0)
622 vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
623 if (vm86->vm86_inited == 0)
626 /* go back to user mode if both flags are set */
627 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
628 trapsignal(p, SIGBUS, 0);
630 if (vm86->vm86_has_vme) {
631 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
632 (eflags & VME_USERCHANGE) | PSL_VM;
634 vm86->vm86_eflags = eflags; /* save VIF, VIP */
635 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM;
637 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
638 tf->tf_eflags = eflags;
639 tf->tf_vm86_ds = tf->tf_ds;
640 tf->tf_vm86_es = tf->tf_es;
641 tf->tf_vm86_fs = tf->tf_fs;
642 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
643 tf->tf_ds = _udatasel;
644 tf->tf_es = _udatasel;
645 tf->tf_fs = _udatasel;
648 * Don't allow users to change privileged or reserved flags.
651 * XXX do allow users to change the privileged flag PSL_RF.
652 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
653 * should sometimes set it there too. tf_eflags is kept in
654 * the signal context during signal handling and there is no
655 * other place to remember it, so the PSL_RF bit may be
656 * corrupted by the signal handler without us knowing.
657 * Corruption of the PSL_RF bit at worst causes one more or
658 * one less debugger trap, so allowing it is fairly harmless.
660 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
661 printf("sigreturn: eflags = 0x%x\n", eflags);
666 * Don't allow users to load a valid privileged %cs. Let the
667 * hardware check for invalid selectors, excess privilege in
668 * other selectors, invalid %eip's and invalid %esp's.
670 cs = ucp->uc_mcontext.mc_cs;
671 if (!CS_SECURE(cs)) {
672 printf("sigreturn: cs = 0x%x\n", cs);
673 trapsignal(p, SIGBUS, T_PROTFLT);
676 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(struct trapframe));
679 if (ucp->uc_mcontext.mc_onstack & 1)
680 p->p_sigstk.ss_flags |= SS_ONSTACK;
682 p->p_sigstk.ss_flags &= ~SS_ONSTACK;
684 p->p_sigmask = ucp->uc_sigmask;
685 SIG_CANTMASK(p->p_sigmask);
690 * Stack frame on entry to function. %eax will contain the function vector,
691 * %ecx will contain the function data. flags, ecx, and eax will have
692 * already been pushed on the stack.
703 sendupcall(struct vmupcall *vu, int morepending)
705 struct proc *p = curproc;
706 struct trapframe *regs;
707 struct upcall upcall;
708 struct upc_frame upc_frame;
712 * Get the upcall data structure
714 if (copyin(p->p_upcall, &upcall, sizeof(upcall)) ||
715 copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int))
718 printf("bad upcall address\n");
723 * If the data structure is already marked pending or has a critical
724 * section count, mark the data structure as pending and return
725 * without doing an upcall. vu_pending is left set.
727 if (upcall.upc_pending || crit_count >= vu->vu_pending) {
728 if (upcall.upc_pending < vu->vu_pending) {
729 upcall.upc_pending = vu->vu_pending;
730 copyout(&upcall.upc_pending, &p->p_upcall->upc_pending,
731 sizeof(upcall.upc_pending));
737 * We can run this upcall now, clear vu_pending.
739 * Bump our critical section count and set or clear the
740 * user pending flag depending on whether more upcalls are
741 * pending. The user will be responsible for calling
742 * upc_dispatch(-1) to process remaining upcalls.
745 upcall.upc_pending = morepending;
746 crit_count += TDPRI_CRIT;
747 copyout(&upcall.upc_pending, &p->p_upcall->upc_pending,
748 sizeof(upcall.upc_pending));
749 copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff,
753 * Construct a stack frame and issue the upcall
755 regs = p->p_md.md_regs;
756 upc_frame.eax = regs->tf_eax;
757 upc_frame.ecx = regs->tf_ecx;
758 upc_frame.edx = regs->tf_edx;
759 upc_frame.flags = regs->tf_eflags;
760 upc_frame.oldip = regs->tf_eip;
761 if (copyout(&upc_frame, (void *)(regs->tf_esp - sizeof(upc_frame)),
762 sizeof(upc_frame)) != 0) {
763 printf("bad stack on upcall\n");
765 regs->tf_eax = (register_t)vu->vu_func;
766 regs->tf_ecx = (register_t)vu->vu_data;
767 regs->tf_edx = (register_t)p->p_upcall;
768 regs->tf_eip = (register_t)vu->vu_ctx;
769 regs->tf_esp -= sizeof(upc_frame);
774 * fetchupcall occurs in the context of a system call, which means that
775 * we have to return EJUSTRETURN in order to prevent eax and edx from
776 * being overwritten by the syscall return value.
778 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
779 * and the function pointer in %eax.
782 fetchupcall (struct vmupcall *vu, int morepending, void *rsp)
784 struct upc_frame upc_frame;
786 struct trapframe *regs;
788 struct upcall upcall;
792 regs = p->p_md.md_regs;
794 error = copyout(&morepending, &p->p_upcall->upc_pending, sizeof(int));
798 * This jumps us to the next ready context.
801 error = copyin(p->p_upcall, &upcall, sizeof(upcall));
804 error = copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int));
805 crit_count += TDPRI_CRIT;
807 error = copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff, sizeof(int));
808 regs->tf_eax = (register_t)vu->vu_func;
809 regs->tf_ecx = (register_t)vu->vu_data;
810 regs->tf_edx = (register_t)p->p_upcall;
811 regs->tf_eip = (register_t)vu->vu_ctx;
812 regs->tf_esp = (register_t)rsp;
815 * This returns us to the originally interrupted code.
817 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
818 regs->tf_eax = upc_frame.eax;
819 regs->tf_ecx = upc_frame.ecx;
820 regs->tf_edx = upc_frame.edx;
821 regs->tf_eflags = (regs->tf_eflags & ~PSL_USERCHANGE) |
822 (upc_frame.flags & PSL_USERCHANGE);
823 regs->tf_eip = upc_frame.oldip;
824 regs->tf_esp = (register_t)((char *)rsp + sizeof(upc_frame));
833 * Machine dependent boot() routine
835 * I haven't seen anything to put here yet
836 * Possibly some stuff might be grafted back here from boot()
844 * Shutdown the CPU as much as possible
854 * cpu_idle() represents the idle LWKT. You cannot return from this function
855 * (unless you want to blow things up!). Instead we look for runnable threads
856 * and loop or halt as appropriate. Giant is not held on entry to the thread.
858 * The main loop is entered with a critical section held, we must release
859 * the critical section before doing anything else. lwkt_switch() will
860 * check for pending interrupts due to entering and exiting its own
863 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI
864 * to wake a HLTed cpu up. However, there are cases where the idlethread
865 * will be entered with the possibility that no IPI will occur and in such
866 * cases lwkt_switch() sets TDF_IDLE_NOHLT.
868 static int cpu_idle_hlt = 1;
869 static int cpu_idle_hltcnt;
870 static int cpu_idle_spincnt;
871 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
872 &cpu_idle_hlt, 0, "Idle loop HLT enable");
873 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
874 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
875 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
876 &cpu_idle_spincnt, 0, "Idle loop entry spins");
881 struct thread *td = curthread;
884 KKASSERT(td->td_pri < TDPRI_CRIT);
887 * See if there are any LWKTs ready to go.
892 * If we are going to halt call splz unconditionally after
893 * CLIing to catch any interrupt races. Note that we are
894 * at SPL0 and interrupts are enabled.
896 if (cpu_idle_hlt && !lwkt_runnable() &&
897 (td->td_flags & TDF_IDLE_NOHLT) == 0) {
899 * We must guarentee that hlt is exactly the instruction
902 __asm __volatile("cli");
904 __asm __volatile("sti; hlt");
907 td->td_flags &= ~TDF_IDLE_NOHLT;
909 __asm __volatile("sti");
916 * Clear registers on exec
919 setregs(p, entry, stack, ps_strings)
925 struct trapframe *regs = p->p_md.md_regs;
926 struct pcb *pcb = p->p_thread->td_pcb;
928 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
929 pcb->pcb_gs = _udatasel;
932 /* was i386_user_cleanup() in NetBSD */
935 bzero((char *)regs, sizeof(struct trapframe));
936 regs->tf_eip = entry;
937 regs->tf_esp = stack;
938 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
939 regs->tf_ss = _udatasel;
940 regs->tf_ds = _udatasel;
941 regs->tf_es = _udatasel;
942 regs->tf_fs = _udatasel;
943 regs->tf_cs = _ucodesel;
945 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
946 regs->tf_ebx = ps_strings;
949 * Reset the hardware debug registers if they were in use.
950 * They won't have any meaning for the newly exec'd process.
952 if (pcb->pcb_flags & PCB_DBREGS) {
959 if (pcb == curthread->td_pcb) {
961 * Clear the debug registers on the running
962 * CPU, otherwise they will end up affecting
963 * the next process we switch to.
967 pcb->pcb_flags &= ~PCB_DBREGS;
971 * Initialize the math emulator (if any) for the current process.
972 * Actually, just clear the bit that says that the emulator has
973 * been initialized. Initialization is delayed until the process
974 * traps to the emulator (if it is done at all) mainly because
975 * emulators don't provide an entry point for initialization.
977 p->p_thread->td_pcb->pcb_flags &= ~FP_SOFTFP;
980 * Arrange to trap the next npx or `fwait' instruction (see npx.c
981 * for why fwait must be trapped at least if there is an npx or an
982 * emulator). This is mainly to handle the case where npx0 is not
983 * configured, since the npx routines normally set up the trap
984 * otherwise. It should be done only at boot time, but doing it
985 * here allows modifying `npx_exists' for testing the emulator on
986 * systems with an npx.
988 load_cr0(rcr0() | CR0_MP | CR0_TS);
991 /* Initialize the npx (if any) for the current process. */
992 npxinit(__INITIAL_NPXCW__);
996 * note: linux emulator needs edx to be 0x0 on entry, which is
997 * handled in execve simply by setting the 64 bit syscall
1008 cr0 |= CR0_NE; /* Done by npxinit() */
1009 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1011 if (cpu_class != CPUCLASS_386)
1013 cr0 |= CR0_WP | CR0_AM;
1019 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1022 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1024 if (!error && req->newptr)
1029 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1030 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1032 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1033 CTLFLAG_RW, &disable_rtc_set, 0, "");
1035 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1036 CTLFLAG_RD, &bootinfo, bootinfo, "");
1038 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1039 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1041 extern u_long bootdev; /* not a dev_t - encoding is different */
1042 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1043 CTLFLAG_RD, &bootdev, 0, "Boot device (not in dev_t format)");
1046 * Initialize 386 and configure to run kernel
1050 * Initialize segments & interrupt table
1054 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1055 static struct gate_descriptor idt0[NIDT];
1056 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1057 union descriptor ldt[NLDT]; /* local descriptor table */
1059 /* table descriptors - used to load tables by cpu */
1060 struct region_descriptor r_gdt, r_idt;
1062 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1063 extern int has_f00f_bug;
1066 static struct i386tss dblfault_tss;
1067 static char dblfault_stack[PAGE_SIZE];
1069 extern struct user *proc0paddr;
1072 /* software prototypes -- in more palatable form */
1073 struct soft_segment_descriptor gdt_segs[] = {
1074 /* GNULL_SEL 0 Null Descriptor */
1075 { 0x0, /* segment base address */
1077 0, /* segment type */
1078 0, /* segment descriptor priority level */
1079 0, /* segment descriptor present */
1081 0, /* default 32 vs 16 bit size */
1082 0 /* limit granularity (byte/page units)*/ },
1083 /* GCODE_SEL 1 Code Descriptor for kernel */
1084 { 0x0, /* segment base address */
1085 0xfffff, /* length - all address space */
1086 SDT_MEMERA, /* segment type */
1087 0, /* segment descriptor priority level */
1088 1, /* segment descriptor present */
1090 1, /* default 32 vs 16 bit size */
1091 1 /* limit granularity (byte/page units)*/ },
1092 /* GDATA_SEL 2 Data Descriptor for kernel */
1093 { 0x0, /* segment base address */
1094 0xfffff, /* length - all address space */
1095 SDT_MEMRWA, /* segment type */
1096 0, /* segment descriptor priority level */
1097 1, /* segment descriptor present */
1099 1, /* default 32 vs 16 bit size */
1100 1 /* limit granularity (byte/page units)*/ },
1101 /* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
1102 { 0x0, /* segment base address */
1103 0xfffff, /* length - all address space */
1104 SDT_MEMRWA, /* segment type */
1105 0, /* segment descriptor priority level */
1106 1, /* segment descriptor present */
1108 1, /* default 32 vs 16 bit size */
1109 1 /* limit granularity (byte/page units)*/ },
1110 /* GPROC0_SEL 4 Proc 0 Tss Descriptor */
1112 0x0, /* segment base address */
1113 sizeof(struct i386tss)-1,/* length - all address space */
1114 SDT_SYS386TSS, /* segment type */
1115 0, /* segment descriptor priority level */
1116 1, /* segment descriptor present */
1118 0, /* unused - default 32 vs 16 bit size */
1119 0 /* limit granularity (byte/page units)*/ },
1120 /* GLDT_SEL 5 LDT Descriptor */
1121 { (int) ldt, /* segment base address */
1122 sizeof(ldt)-1, /* length - all address space */
1123 SDT_SYSLDT, /* segment type */
1124 SEL_UPL, /* segment descriptor priority level */
1125 1, /* segment descriptor present */
1127 0, /* unused - default 32 vs 16 bit size */
1128 0 /* limit granularity (byte/page units)*/ },
1129 /* GUSERLDT_SEL 6 User LDT Descriptor per process */
1130 { (int) ldt, /* segment base address */
1131 (512 * sizeof(union descriptor)-1), /* length */
1132 SDT_SYSLDT, /* segment type */
1133 0, /* segment descriptor priority level */
1134 1, /* segment descriptor present */
1136 0, /* unused - default 32 vs 16 bit size */
1137 0 /* limit granularity (byte/page units)*/ },
1138 /* GTGATE_SEL 7 Null Descriptor - Placeholder */
1139 { 0x0, /* segment base address */
1140 0x0, /* length - all address space */
1141 0, /* segment type */
1142 0, /* segment descriptor priority level */
1143 0, /* segment descriptor present */
1145 0, /* default 32 vs 16 bit size */
1146 0 /* limit granularity (byte/page units)*/ },
1147 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1148 { 0x400, /* segment base address */
1149 0xfffff, /* length */
1150 SDT_MEMRWA, /* segment type */
1151 0, /* segment descriptor priority level */
1152 1, /* segment descriptor present */
1154 1, /* default 32 vs 16 bit size */
1155 1 /* limit granularity (byte/page units)*/ },
1156 /* GPANIC_SEL 9 Panic Tss Descriptor */
1157 { (int) &dblfault_tss, /* segment base address */
1158 sizeof(struct i386tss)-1,/* length - all address space */
1159 SDT_SYS386TSS, /* segment type */
1160 0, /* segment descriptor priority level */
1161 1, /* segment descriptor present */
1163 0, /* unused - default 32 vs 16 bit size */
1164 0 /* limit granularity (byte/page units)*/ },
1165 /* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1166 { 0, /* segment base address (overwritten) */
1167 0xfffff, /* length */
1168 SDT_MEMERA, /* segment type */
1169 0, /* segment descriptor priority level */
1170 1, /* segment descriptor present */
1172 0, /* default 32 vs 16 bit size */
1173 1 /* limit granularity (byte/page units)*/ },
1174 /* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1175 { 0, /* segment base address (overwritten) */
1176 0xfffff, /* length */
1177 SDT_MEMERA, /* segment type */
1178 0, /* segment descriptor priority level */
1179 1, /* segment descriptor present */
1181 0, /* default 32 vs 16 bit size */
1182 1 /* limit granularity (byte/page units)*/ },
1183 /* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1184 { 0, /* segment base address (overwritten) */
1185 0xfffff, /* length */
1186 SDT_MEMRWA, /* segment type */
1187 0, /* segment descriptor priority level */
1188 1, /* segment descriptor present */
1190 1, /* default 32 vs 16 bit size */
1191 1 /* limit granularity (byte/page units)*/ },
1192 /* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1193 { 0, /* segment base address (overwritten) */
1194 0xfffff, /* length */
1195 SDT_MEMRWA, /* segment type */
1196 0, /* segment descriptor priority level */
1197 1, /* segment descriptor present */
1199 0, /* default 32 vs 16 bit size */
1200 1 /* limit granularity (byte/page units)*/ },
1201 /* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1202 { 0, /* segment base address (overwritten) */
1203 0xfffff, /* length */
1204 SDT_MEMRWA, /* segment type */
1205 0, /* segment descriptor priority level */
1206 1, /* segment descriptor present */
1208 0, /* default 32 vs 16 bit size */
1209 1 /* limit granularity (byte/page units)*/ },
1212 static struct soft_segment_descriptor ldt_segs[] = {
1213 /* Null Descriptor - overwritten by call gate */
1214 { 0x0, /* segment base address */
1215 0x0, /* length - all address space */
1216 0, /* segment type */
1217 0, /* segment descriptor priority level */
1218 0, /* segment descriptor present */
1220 0, /* default 32 vs 16 bit size */
1221 0 /* limit granularity (byte/page units)*/ },
1222 /* Null Descriptor - overwritten by call gate */
1223 { 0x0, /* segment base address */
1224 0x0, /* length - all address space */
1225 0, /* segment type */
1226 0, /* segment descriptor priority level */
1227 0, /* segment descriptor present */
1229 0, /* default 32 vs 16 bit size */
1230 0 /* limit granularity (byte/page units)*/ },
1231 /* Null Descriptor - overwritten by call gate */
1232 { 0x0, /* segment base address */
1233 0x0, /* length - all address space */
1234 0, /* segment type */
1235 0, /* segment descriptor priority level */
1236 0, /* segment descriptor present */
1238 0, /* default 32 vs 16 bit size */
1239 0 /* limit granularity (byte/page units)*/ },
1240 /* Code Descriptor for user */
1241 { 0x0, /* segment base address */
1242 0xfffff, /* length - all address space */
1243 SDT_MEMERA, /* segment type */
1244 SEL_UPL, /* segment descriptor priority level */
1245 1, /* segment descriptor present */
1247 1, /* default 32 vs 16 bit size */
1248 1 /* limit granularity (byte/page units)*/ },
1249 /* Null Descriptor - overwritten by call gate */
1250 { 0x0, /* segment base address */
1251 0x0, /* length - all address space */
1252 0, /* segment type */
1253 0, /* segment descriptor priority level */
1254 0, /* segment descriptor present */
1256 0, /* default 32 vs 16 bit size */
1257 0 /* limit granularity (byte/page units)*/ },
1258 /* Data Descriptor for user */
1259 { 0x0, /* segment base address */
1260 0xfffff, /* length - all address space */
1261 SDT_MEMRWA, /* segment type */
1262 SEL_UPL, /* segment descriptor priority level */
1263 1, /* segment descriptor present */
1265 1, /* default 32 vs 16 bit size */
1266 1 /* limit granularity (byte/page units)*/ },
1270 setidt(idx, func, typ, dpl, selec)
1277 struct gate_descriptor *ip;
1280 ip->gd_looffset = (int)func;
1281 ip->gd_selector = selec;
1287 ip->gd_hioffset = ((int)func)>>16 ;
1290 #define IDTVEC(name) __CONCAT(X,name)
1293 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1294 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1295 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1296 IDTVEC(page), IDTVEC(mchk), IDTVEC(fpu), IDTVEC(align),
1297 IDTVEC(xmm), IDTVEC(syscall),
1300 IDTVEC(int0x80_syscall), IDTVEC(int0x81_syscall);
1302 #ifdef DEBUG_INTERRUPTS
1303 extern inthand_t *Xrsvdary[256];
1308 struct segment_descriptor *sd;
1309 struct soft_segment_descriptor *ssd;
1311 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1312 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1313 ssd->ssd_type = sd->sd_type;
1314 ssd->ssd_dpl = sd->sd_dpl;
1315 ssd->ssd_p = sd->sd_p;
1316 ssd->ssd_def32 = sd->sd_def32;
1317 ssd->ssd_gran = sd->sd_gran;
1320 #define PHYSMAP_SIZE (2 * 8)
1323 * Populate the (physmap) array with base/bound pairs describing the
1324 * available physical memory in the system, then test this memory and
1325 * build the phys_avail array describing the actually-available memory.
1327 * If we cannot accurately determine the physical memory map, then use
1328 * value from the 0xE801 call, and failing that, the RTC.
1330 * Total memory size may be set by the kernel environment variable
1331 * hw.physmem or the compile-time define MAXMEM.
1334 getmemsize(int first)
1336 int i, physmap_idx, pa_indx;
1338 u_int basemem, extmem;
1339 struct vm86frame vmf;
1340 struct vm86context vmc;
1341 vm_offset_t pa, physmap[PHYSMAP_SIZE];
1351 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1352 bzero(&vmf, sizeof(struct vm86frame));
1353 bzero(physmap, sizeof(physmap));
1357 * Some newer BIOSes has broken INT 12H implementation which cause
1358 * kernel panic immediately. In this case, we need to scan SMAP
1359 * with INT 15:E820 first, then determine base memory size.
1361 if (hasbrokenint12) {
1366 * Perform "base memory" related probes & setup
1368 vm86_intcall(0x12, &vmf);
1369 basemem = vmf.vmf_ax;
1370 if (basemem > 640) {
1371 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1377 * XXX if biosbasemem is now < 640, there is a `hole'
1378 * between the end of base memory and the start of
1379 * ISA memory. The hole may be empty or it may
1380 * contain BIOS code or data. Map it read/write so
1381 * that the BIOS can write to it. (Memory from 0 to
1382 * the physical end of the kernel is mapped read-only
1383 * to begin with and then parts of it are remapped.
1384 * The parts that aren't remapped form holes that
1385 * remain read-only and are unused by the kernel.
1386 * The base memory area is below the physical end of
1387 * the kernel and right now forms a read-only hole.
1388 * The part of it from PAGE_SIZE to
1389 * (trunc_page(biosbasemem * 1024) - 1) will be
1390 * remapped and used by the kernel later.)
1392 * This code is similar to the code used in
1393 * pmap_mapdev, but since no memory needs to be
1394 * allocated we simply change the mapping.
1396 for (pa = trunc_page(basemem * 1024);
1397 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1398 pte = vtopte(pa + KERNBASE);
1399 *pte = pa | PG_RW | PG_V;
1403 * if basemem != 640, map pages r/w into vm86 page table so
1404 * that the bios can scribble on it.
1407 for (i = basemem / 4; i < 160; i++)
1408 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1412 * map page 1 R/W into the kernel page table so we can use it
1413 * as a buffer. The kernel will unmap this page later.
1415 pte = vtopte(KERNBASE + (1 << PAGE_SHIFT));
1416 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1419 * get memory map with INT 15:E820
1421 #define SMAPSIZ sizeof(*smap)
1422 #define SMAP_SIG 0x534D4150 /* 'SMAP' */
1425 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1426 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1431 vmf.vmf_eax = 0xE820;
1432 vmf.vmf_edx = SMAP_SIG;
1433 vmf.vmf_ecx = SMAPSIZ;
1434 i = vm86_datacall(0x15, &vmf, &vmc);
1435 if (i || vmf.vmf_eax != SMAP_SIG)
1437 if (boothowto & RB_VERBOSE)
1438 printf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1440 *(u_int32_t *)((char *)&smap->base + 4),
1441 (u_int32_t)smap->base,
1442 *(u_int32_t *)((char *)&smap->length + 4),
1443 (u_int32_t)smap->length);
1445 if (smap->type != 0x01)
1448 if (smap->length == 0)
1451 if (smap->base >= 0xffffffff) {
1452 printf("%uK of memory above 4GB ignored\n",
1453 (u_int)(smap->length / 1024));
1457 for (i = 0; i <= physmap_idx; i += 2) {
1458 if (smap->base < physmap[i + 1]) {
1459 if (boothowto & RB_VERBOSE)
1461 "Overlapping or non-montonic memory region, ignoring second region\n");
1466 if (smap->base == physmap[physmap_idx + 1]) {
1467 physmap[physmap_idx + 1] += smap->length;
1472 if (physmap_idx == PHYSMAP_SIZE) {
1474 "Too many segments in the physical address map, giving up\n");
1477 physmap[physmap_idx] = smap->base;
1478 physmap[physmap_idx + 1] = smap->base + smap->length;
1480 ; /* fix GCC3.x warning */
1481 } while (vmf.vmf_ebx != 0);
1484 * Perform "base memory" related probes & setup based on SMAP
1487 for (i = 0; i <= physmap_idx; i += 2) {
1488 if (physmap[i] == 0x00000000) {
1489 basemem = physmap[i + 1] / 1024;
1498 if (basemem > 640) {
1499 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1504 for (pa = trunc_page(basemem * 1024);
1505 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1506 pte = vtopte(pa + KERNBASE);
1507 *pte = pa | PG_RW | PG_V;
1511 for (i = basemem / 4; i < 160; i++)
1512 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1515 if (physmap[1] != 0)
1519 * If we failed above, try memory map with INT 15:E801
1521 vmf.vmf_ax = 0xE801;
1522 if (vm86_intcall(0x15, &vmf) == 0) {
1523 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1527 vm86_intcall(0x15, &vmf);
1528 extmem = vmf.vmf_ax;
1531 * Prefer the RTC value for extended memory.
1533 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1538 * Special hack for chipsets that still remap the 384k hole when
1539 * there's 16MB of memory - this really confuses people that
1540 * are trying to use bus mastering ISA controllers with the
1541 * "16MB limit"; they only have 16MB, but the remapping puts
1542 * them beyond the limit.
1544 * If extended memory is between 15-16MB (16-17MB phys address range),
1547 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1551 physmap[1] = basemem * 1024;
1553 physmap[physmap_idx] = 0x100000;
1554 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1558 * Now, physmap contains a map of physical memory.
1562 /* make hole for AP bootstrap code YYY */
1563 physmap[1] = mp_bootaddress(physmap[1] / 1024);
1565 /* look for the MP hardware - needed for apic addresses */
1570 * Maxmem isn't the "maximum memory", it's one larger than the
1571 * highest page of the physical address space. It should be
1572 * called something like "Maxphyspage". We may adjust this
1573 * based on ``hw.physmem'' and the results of the memory test.
1575 Maxmem = atop(physmap[physmap_idx + 1]);
1578 Maxmem = MAXMEM / 4;
1582 * hw.physmem is a size in bytes; we also allow k, m, and g suffixes
1583 * for the appropriate modifiers. This overrides MAXMEM.
1585 if ((cp = getenv("hw.physmem")) != NULL) {
1586 u_int64_t AllowMem, sanity;
1589 sanity = AllowMem = strtouq(cp, &ep, 0);
1590 if ((ep != cp) && (*ep != 0)) {
1603 AllowMem = sanity = 0;
1605 if (AllowMem < sanity)
1609 printf("Ignoring invalid memory size of '%s'\n", cp);
1611 Maxmem = atop(AllowMem);
1614 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1615 (boothowto & RB_VERBOSE))
1616 printf("Physical memory use set to %lluK\n", Maxmem * 4);
1619 * If Maxmem has been increased beyond what the system has detected,
1620 * extend the last memory segment to the new limit.
1622 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1623 physmap[physmap_idx + 1] = ptoa(Maxmem);
1625 /* call pmap initialization to make new kernel address space */
1626 pmap_bootstrap(first, 0);
1629 * Size up each available chunk of physical memory.
1631 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1633 phys_avail[pa_indx++] = physmap[0];
1634 phys_avail[pa_indx] = physmap[0];
1638 * physmap is in bytes, so when converting to page boundaries,
1639 * round up the start address and round down the end address.
1641 for (i = 0; i <= physmap_idx; i += 2) {
1645 if (physmap[i + 1] < end)
1646 end = trunc_page(physmap[i + 1]);
1647 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1652 int *ptr = (int *)CADDR1;
1656 * block out kernel memory as not available.
1658 if (pa >= 0x100000 && pa < first)
1664 * map page into kernel: valid, read/write,non-cacheable
1666 *pte = pa | PG_V | PG_RW | PG_N;
1671 * Test for alternating 1's and 0's
1673 *(volatile int *)ptr = 0xaaaaaaaa;
1674 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1678 * Test for alternating 0's and 1's
1680 *(volatile int *)ptr = 0x55555555;
1681 if (*(volatile int *)ptr != 0x55555555) {
1687 *(volatile int *)ptr = 0xffffffff;
1688 if (*(volatile int *)ptr != 0xffffffff) {
1694 *(volatile int *)ptr = 0x0;
1695 if (*(volatile int *)ptr != 0x0) {
1699 * Restore original value.
1704 * Adjust array of valid/good pages.
1706 if (page_bad == TRUE) {
1710 * If this good page is a continuation of the
1711 * previous set of good pages, then just increase
1712 * the end pointer. Otherwise start a new chunk.
1713 * Note that "end" points one higher than end,
1714 * making the range >= start and < end.
1715 * If we're also doing a speculative memory
1716 * test and we at or past the end, bump up Maxmem
1717 * so that we keep going. The first bad page
1718 * will terminate the loop.
1720 if (phys_avail[pa_indx] == pa) {
1721 phys_avail[pa_indx] += PAGE_SIZE;
1724 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1725 printf("Too many holes in the physical address space, giving up\n");
1729 phys_avail[pa_indx++] = pa; /* start */
1730 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1740 * The last chunk must contain at least one page plus the message
1741 * buffer to avoid complicating other code (message buffer address
1742 * calculation, etc.).
1744 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1745 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1746 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1747 phys_avail[pa_indx--] = 0;
1748 phys_avail[pa_indx--] = 0;
1751 Maxmem = atop(phys_avail[pa_indx]);
1753 /* Trim off space for the message buffer. */
1754 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1756 avail_end = phys_avail[pa_indx];
1768 * 7 Device Not Available (x87)
1770 * 9 Coprocessor Segment overrun (unsupported, reserved)
1772 * 11 Segment not present
1774 * 13 General Protection
1777 * 16 x87 FP Exception pending
1778 * 17 Alignment Check
1780 * 19 SIMD floating point
1782 * 32-255 INTn/external sources
1787 struct gate_descriptor *gdp;
1788 int gsel_tss, metadata_missing, off, x;
1789 struct mdglobaldata *gd;
1792 * Prevent lowering of the ipl if we call tsleep() early.
1794 gd = &CPU_prvspace[0].mdglobaldata;
1795 bzero(gd, sizeof(*gd));
1797 gd->mi.gd_curthread = &thread0;
1799 atdevbase = ISA_HOLE_START + KERNBASE;
1801 metadata_missing = 0;
1802 if (bootinfo.bi_modulep) {
1803 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1804 preload_bootstrap_relocate(KERNBASE);
1806 metadata_missing = 1;
1808 if (bootinfo.bi_envp)
1809 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1812 * start with one cpu. Note: ncpus2_shift and ncpus2_mask are left
1817 /* Init basic tunables, hz etc */
1821 * make gdt memory segments, the code segment goes up to end of the
1822 * page with etext in it, the data segment goes to the end of
1826 * XXX text protection is temporarily (?) disabled. The limit was
1827 * i386_btop(round_page(etext)) - 1.
1829 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1830 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
1832 gdt_segs[GPRIV_SEL].ssd_limit =
1833 atop(sizeof(struct privatespace) - 1);
1834 gdt_segs[GPRIV_SEL].ssd_base = (int) &CPU_prvspace[0];
1835 gdt_segs[GPROC0_SEL].ssd_base =
1836 (int) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
1838 gd->mi.gd_prvspace = &CPU_prvspace[0];
1841 * Note: on both UP and SMP curthread must be set non-NULL
1842 * early in the boot sequence because the system assumes
1843 * that 'curthread' is never NULL.
1846 for (x = 0; x < NGDT; x++) {
1848 /* avoid overwriting db entries with APM ones */
1849 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
1852 ssdtosd(&gdt_segs[x], &gdt[x].sd);
1855 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1856 r_gdt.rd_base = (int) gdt;
1859 mi_gdinit(&gd->mi, 0);
1861 lwkt_init_thread(&thread0, proc0paddr, 0, &gd->mi);
1862 lwkt_set_comm(&thread0, "thread0");
1863 proc0.p_addr = (void *)thread0.td_kstack;
1864 proc0.p_thread = &thread0;
1865 proc0.p_flag |= P_CP_RELEASED; /* early set. See also init_main.c */
1866 varsymset_init(&proc0.p_varsymset, NULL);
1867 thread0.td_flags |= TDF_RUNNING;
1868 thread0.td_proc = &proc0;
1869 thread0.td_switch = cpu_heavy_switch; /* YYY eventually LWKT */
1870 safepri = thread0.td_cpl = SWI_MASK | HWI_MASK;
1872 /* make ldt memory segments */
1874 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it
1875 * should be spelled ...MAX_USER...
1877 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1878 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1879 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
1880 ssdtosd(&ldt_segs[x], &ldt[x].sd);
1882 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
1884 gd->gd_currentldt = _default_ldt;
1885 /* spinlocks and the BGL */
1889 for (x = 0; x < NIDT; x++) {
1890 #ifdef DEBUG_INTERRUPTS
1891 setidt(x, Xrsvdary[x], SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1893 setidt(x, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1896 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1897 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1898 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1899 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1900 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1901 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1902 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1903 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1904 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
1905 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1906 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1907 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1908 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1909 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1910 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1911 setidt(15, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1912 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1913 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1914 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1915 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1916 setidt(0x80, &IDTVEC(int0x80_syscall),
1917 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1918 setidt(0x81, &IDTVEC(int0x81_syscall),
1919 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1921 r_idt.rd_limit = sizeof(idt0) - 1;
1922 r_idt.rd_base = (int) idt;
1926 * Initialize the console before we print anything out.
1930 if (metadata_missing)
1931 printf("WARNING: loader(8) metadata is missing!\n");
1940 if (boothowto & RB_KDB)
1941 Debugger("Boot flags requested debugger");
1944 finishidentcpu(); /* Final stage of CPU initialization */
1945 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1946 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1947 initializecpu(); /* Initialize CPU registers */
1950 * make an initial tss so cpu can get interrupt stack on syscall!
1951 * The 16 bytes is to save room for a VM86 context.
1953 gd->gd_common_tss.tss_esp0 = (int) thread0.td_pcb - 16;
1954 gd->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
1955 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
1956 gd->gd_tss_gdt = &gdt[GPROC0_SEL].sd;
1957 gd->gd_common_tssd = *gd->gd_tss_gdt;
1958 gd->gd_common_tss.tss_ioopt = (sizeof gd->gd_common_tss) << 16;
1961 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
1962 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
1963 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
1964 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
1965 dblfault_tss.tss_cr3 = (int)IdlePTD;
1966 dblfault_tss.tss_eip = (int) dblfault_handler;
1967 dblfault_tss.tss_eflags = PSL_KERNEL;
1968 dblfault_tss.tss_ds = dblfault_tss.tss_es =
1969 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
1970 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
1971 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
1972 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
1976 init_param2(physmem);
1978 /* now running on new page tables, configured,and u/iom is accessible */
1980 /* Map the message buffer. */
1981 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1982 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
1984 msgbufinit(msgbufp, MSGBUF_SIZE);
1986 /* make a call gate to reenter kernel with */
1987 gdp = &ldt[LSYS5CALLS_SEL].gd;
1989 x = (int) &IDTVEC(syscall);
1990 gdp->gd_looffset = x++;
1991 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
1993 gdp->gd_type = SDT_SYS386CGT;
1994 gdp->gd_dpl = SEL_UPL;
1996 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
1998 /* XXX does this work? */
1999 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2000 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2002 /* transfer to user mode */
2004 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
2005 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
2007 /* setup proc 0's pcb */
2008 thread0.td_pcb->pcb_flags = 0;
2009 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; /* should already be setup */
2010 thread0.td_pcb->pcb_ext = 0;
2011 proc0.p_md.md_regs = &proc0_tf;
2015 * Initialize machine-dependant portions of the global data structure.
2016 * Note that the global data area and cpu0's idlestack in the private
2017 * data space were allocated in locore.
2019 * Note: the idlethread's cpl is 0
2021 * WARNING! Called from early boot, 'mycpu' may not work yet.
2024 cpu_gdinit(struct mdglobaldata *gd, int cpu)
2029 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
2031 sp = gd->mi.gd_prvspace->idlestack;
2032 lwkt_init_thread(&gd->mi.gd_idlethread, sp, 0, &gd->mi);
2033 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
2034 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
2035 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
2036 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
2040 globaldata_find(int cpu)
2042 KKASSERT(cpu >= 0 && cpu < ncpus);
2043 return(&CPU_prvspace[cpu].mdglobaldata.mi);
2046 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
2047 static void f00f_hack(void *unused);
2048 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
2051 f00f_hack(void *unused)
2053 struct gate_descriptor *new_idt;
2059 printf("Intel Pentium detected, installing workaround for F00F bug\n");
2061 r_idt.rd_limit = sizeof(idt0) - 1;
2063 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
2065 panic("kmem_alloc returned 0");
2066 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
2067 panic("kmem_alloc returned non-page-aligned memory");
2068 /* Put the first seven entries in the lower page */
2069 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
2070 bcopy(idt, new_idt, sizeof(idt0));
2071 r_idt.rd_base = (int)new_idt;
2074 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
2075 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2076 panic("vm_map_protect failed");
2079 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
2082 ptrace_set_pc(p, addr)
2086 p->p_md.md_regs->tf_eip = addr;
2091 ptrace_single_step(p)
2094 p->p_md.md_regs->tf_eflags |= PSL_T;
2098 int ptrace_read_u_check(p, addr, len)
2105 if ((vm_offset_t) (addr + len) < addr)
2107 if ((vm_offset_t) (addr + len) <= sizeof(struct user))
2110 gap = (char *) p->p_md.md_regs - (char *) p->p_addr;
2112 if ((vm_offset_t) addr < gap)
2114 if ((vm_offset_t) (addr + len) <=
2115 (vm_offset_t) (gap + sizeof(struct trapframe)))
2120 int ptrace_write_u(p, off, data)
2125 struct trapframe frame_copy;
2127 struct trapframe *tp;
2130 * Privileged kernel state is scattered all over the user area.
2131 * Only allow write access to parts of regs and to fpregs.
2133 min = (char *)p->p_md.md_regs - (char *)p->p_addr;
2134 if (off >= min && off <= min + sizeof(struct trapframe) - sizeof(int)) {
2135 tp = p->p_md.md_regs;
2137 *(int *)((char *)&frame_copy + (off - min)) = data;
2138 if (!EFL_SECURE(frame_copy.tf_eflags, tp->tf_eflags) ||
2139 !CS_SECURE(frame_copy.tf_cs))
2141 *(int*)((char *)p->p_addr + off) = data;
2146 * The PCB is at the end of the user area YYY
2148 min = (char *)p->p_thread->td_pcb - (char *)p->p_addr;
2149 min += offsetof(struct pcb, pcb_save);
2150 if (off >= min && off <= min + sizeof(union savefpu) - sizeof(int)) {
2151 *(int*)((char *)p->p_addr + off) = data;
2163 struct trapframe *tp;
2165 tp = p->p_md.md_regs;
2166 regs->r_fs = tp->tf_fs;
2167 regs->r_es = tp->tf_es;
2168 regs->r_ds = tp->tf_ds;
2169 regs->r_edi = tp->tf_edi;
2170 regs->r_esi = tp->tf_esi;
2171 regs->r_ebp = tp->tf_ebp;
2172 regs->r_ebx = tp->tf_ebx;
2173 regs->r_edx = tp->tf_edx;
2174 regs->r_ecx = tp->tf_ecx;
2175 regs->r_eax = tp->tf_eax;
2176 regs->r_eip = tp->tf_eip;
2177 regs->r_cs = tp->tf_cs;
2178 regs->r_eflags = tp->tf_eflags;
2179 regs->r_esp = tp->tf_esp;
2180 regs->r_ss = tp->tf_ss;
2181 pcb = p->p_thread->td_pcb;
2182 regs->r_gs = pcb->pcb_gs;
2192 struct trapframe *tp;
2194 tp = p->p_md.md_regs;
2195 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2196 !CS_SECURE(regs->r_cs))
2198 tp->tf_fs = regs->r_fs;
2199 tp->tf_es = regs->r_es;
2200 tp->tf_ds = regs->r_ds;
2201 tp->tf_edi = regs->r_edi;
2202 tp->tf_esi = regs->r_esi;
2203 tp->tf_ebp = regs->r_ebp;
2204 tp->tf_ebx = regs->r_ebx;
2205 tp->tf_edx = regs->r_edx;
2206 tp->tf_ecx = regs->r_ecx;
2207 tp->tf_eax = regs->r_eax;
2208 tp->tf_eip = regs->r_eip;
2209 tp->tf_cs = regs->r_cs;
2210 tp->tf_eflags = regs->r_eflags;
2211 tp->tf_esp = regs->r_esp;
2212 tp->tf_ss = regs->r_ss;
2213 pcb = p->p_thread->td_pcb;
2214 pcb->pcb_gs = regs->r_gs;
2218 #ifndef CPU_DISABLE_SSE
2220 fill_fpregs_xmm(sv_xmm, sv_87)
2221 struct savexmm *sv_xmm;
2222 struct save87 *sv_87;
2224 struct env87 *penv_87 = &sv_87->sv_env;
2225 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2228 /* FPU control/status */
2229 penv_87->en_cw = penv_xmm->en_cw;
2230 penv_87->en_sw = penv_xmm->en_sw;
2231 penv_87->en_tw = penv_xmm->en_tw;
2232 penv_87->en_fip = penv_xmm->en_fip;
2233 penv_87->en_fcs = penv_xmm->en_fcs;
2234 penv_87->en_opcode = penv_xmm->en_opcode;
2235 penv_87->en_foo = penv_xmm->en_foo;
2236 penv_87->en_fos = penv_xmm->en_fos;
2239 for (i = 0; i < 8; ++i)
2240 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2242 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
2246 set_fpregs_xmm(sv_87, sv_xmm)
2247 struct save87 *sv_87;
2248 struct savexmm *sv_xmm;
2250 struct env87 *penv_87 = &sv_87->sv_env;
2251 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2254 /* FPU control/status */
2255 penv_xmm->en_cw = penv_87->en_cw;
2256 penv_xmm->en_sw = penv_87->en_sw;
2257 penv_xmm->en_tw = penv_87->en_tw;
2258 penv_xmm->en_fip = penv_87->en_fip;
2259 penv_xmm->en_fcs = penv_87->en_fcs;
2260 penv_xmm->en_opcode = penv_87->en_opcode;
2261 penv_xmm->en_foo = penv_87->en_foo;
2262 penv_xmm->en_fos = penv_87->en_fos;
2265 for (i = 0; i < 8; ++i)
2266 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2268 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2270 #endif /* CPU_DISABLE_SSE */
2273 fill_fpregs(p, fpregs)
2275 struct fpreg *fpregs;
2277 #ifndef CPU_DISABLE_SSE
2279 fill_fpregs_xmm(&p->p_thread->td_pcb->pcb_save.sv_xmm,
2280 (struct save87 *)fpregs);
2283 #endif /* CPU_DISABLE_SSE */
2284 bcopy(&p->p_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2289 set_fpregs(p, fpregs)
2291 struct fpreg *fpregs;
2293 #ifndef CPU_DISABLE_SSE
2295 set_fpregs_xmm((struct save87 *)fpregs,
2296 &p->p_thread->td_pcb->pcb_save.sv_xmm);
2299 #endif /* CPU_DISABLE_SSE */
2300 bcopy(fpregs, &p->p_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2305 fill_dbregs(p, dbregs)
2307 struct dbreg *dbregs;
2312 dbregs->dr0 = rdr0();
2313 dbregs->dr1 = rdr1();
2314 dbregs->dr2 = rdr2();
2315 dbregs->dr3 = rdr3();
2316 dbregs->dr4 = rdr4();
2317 dbregs->dr5 = rdr5();
2318 dbregs->dr6 = rdr6();
2319 dbregs->dr7 = rdr7();
2322 pcb = p->p_thread->td_pcb;
2323 dbregs->dr0 = pcb->pcb_dr0;
2324 dbregs->dr1 = pcb->pcb_dr1;
2325 dbregs->dr2 = pcb->pcb_dr2;
2326 dbregs->dr3 = pcb->pcb_dr3;
2329 dbregs->dr6 = pcb->pcb_dr6;
2330 dbregs->dr7 = pcb->pcb_dr7;
2336 set_dbregs(p, dbregs)
2338 struct dbreg *dbregs;
2342 u_int32_t mask1, mask2;
2345 load_dr0(dbregs->dr0);
2346 load_dr1(dbregs->dr1);
2347 load_dr2(dbregs->dr2);
2348 load_dr3(dbregs->dr3);
2349 load_dr4(dbregs->dr4);
2350 load_dr5(dbregs->dr5);
2351 load_dr6(dbregs->dr6);
2352 load_dr7(dbregs->dr7);
2356 * Don't let an illegal value for dr7 get set. Specifically,
2357 * check for undefined settings. Setting these bit patterns
2358 * result in undefined behaviour and can lead to an unexpected
2361 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2362 i++, mask1 <<= 2, mask2 <<= 2)
2363 if ((dbregs->dr7 & mask1) == mask2)
2366 pcb = p->p_thread->td_pcb;
2369 * Don't let a process set a breakpoint that is not within the
2370 * process's address space. If a process could do this, it
2371 * could halt the system by setting a breakpoint in the kernel
2372 * (if ddb was enabled). Thus, we need to check to make sure
2373 * that no breakpoints are being enabled for addresses outside
2374 * process's address space, unless, perhaps, we were called by
2377 * XXX - what about when the watched area of the user's
2378 * address space is written into from within the kernel
2379 * ... wouldn't that still cause a breakpoint to be generated
2380 * from within kernel mode?
2383 if (suser_cred(p->p_ucred, 0) != 0) {
2384 if (dbregs->dr7 & 0x3) {
2385 /* dr0 is enabled */
2386 if (dbregs->dr0 >= VM_MAXUSER_ADDRESS)
2390 if (dbregs->dr7 & (0x3<<2)) {
2391 /* dr1 is enabled */
2392 if (dbregs->dr1 >= VM_MAXUSER_ADDRESS)
2396 if (dbregs->dr7 & (0x3<<4)) {
2397 /* dr2 is enabled */
2398 if (dbregs->dr2 >= VM_MAXUSER_ADDRESS)
2402 if (dbregs->dr7 & (0x3<<6)) {
2403 /* dr3 is enabled */
2404 if (dbregs->dr3 >= VM_MAXUSER_ADDRESS)
2409 pcb->pcb_dr0 = dbregs->dr0;
2410 pcb->pcb_dr1 = dbregs->dr1;
2411 pcb->pcb_dr2 = dbregs->dr2;
2412 pcb->pcb_dr3 = dbregs->dr3;
2413 pcb->pcb_dr6 = dbregs->dr6;
2414 pcb->pcb_dr7 = dbregs->dr7;
2416 pcb->pcb_flags |= PCB_DBREGS;
2423 * Return > 0 if a hardware breakpoint has been hit, and the
2424 * breakpoint was in user space. Return 0, otherwise.
2427 user_dbreg_trap(void)
2429 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2430 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2431 int nbp; /* number of breakpoints that triggered */
2432 caddr_t addr[4]; /* breakpoint addresses */
2436 if ((dr7 & 0x000000ff) == 0) {
2438 * all GE and LE bits in the dr7 register are zero,
2439 * thus the trap couldn't have been caused by the
2440 * hardware debug registers
2447 bp = dr6 & 0x0000000f;
2451 * None of the breakpoint bits are set meaning this
2452 * trap was not caused by any of the debug registers
2458 * at least one of the breakpoints were hit, check to see
2459 * which ones and if any of them are user space addresses
2463 addr[nbp++] = (caddr_t)rdr0();
2466 addr[nbp++] = (caddr_t)rdr1();
2469 addr[nbp++] = (caddr_t)rdr2();
2472 addr[nbp++] = (caddr_t)rdr3();
2475 for (i=0; i<nbp; i++) {
2477 (caddr_t)VM_MAXUSER_ADDRESS) {
2479 * addr[i] is in user space
2486 * None of the breakpoints are in user space.
2494 Debugger(const char *msg)
2496 printf("Debugger(\"%s\") called.\n", msg);
2500 #include <sys/disklabel.h>
2503 * Determine the size of the transfer, and make sure it is
2504 * within the boundaries of the partition. Adjust transfer
2505 * if needed, and signal errors or early completion.
2508 bounds_check_with_label(struct buf *bp, struct disklabel *lp, int wlabel)
2510 struct partition *p = lp->d_partitions + dkpart(bp->b_dev);
2511 int labelsect = lp->d_partitions[0].p_offset;
2512 int maxsz = p->p_size,
2513 sz = (bp->b_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT;
2515 /* overwriting disk label ? */
2516 /* XXX should also protect bootstrap in first 8K */
2517 if (bp->b_blkno + p->p_offset <= LABELSECTOR + labelsect &&
2518 #if LABELSECTOR != 0
2519 bp->b_blkno + p->p_offset + sz > LABELSECTOR + labelsect &&
2521 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2522 bp->b_error = EROFS;
2526 #if defined(DOSBBSECTOR) && defined(notyet)
2527 /* overwriting master boot record? */
2528 if (bp->b_blkno + p->p_offset <= DOSBBSECTOR &&
2529 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2530 bp->b_error = EROFS;
2535 /* beyond partition? */
2536 if (bp->b_blkno < 0 || bp->b_blkno + sz > maxsz) {
2537 /* if exactly at end of disk, return an EOF */
2538 if (bp->b_blkno == maxsz) {
2539 bp->b_resid = bp->b_bcount;
2542 /* or truncate if part of it fits */
2543 sz = maxsz - bp->b_blkno;
2545 bp->b_error = EINVAL;
2548 bp->b_bcount = sz << DEV_BSHIFT;
2551 bp->b_pblkno = bp->b_blkno + p->p_offset;
2555 bp->b_flags |= B_ERROR;
2562 * Provide inb() and outb() as functions. They are normally only
2563 * available as macros calling inlined functions, thus cannot be
2564 * called inside DDB.
2566 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2572 /* silence compiler warnings */
2574 void outb(u_int, u_char);
2581 * We use %%dx and not %1 here because i/o is done at %dx and not at
2582 * %edx, while gcc generates inferior code (movw instead of movl)
2583 * if we tell it to load (u_short) port.
2585 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2590 outb(u_int port, u_char data)
2594 * Use an unnecessary assignment to help gcc's register allocator.
2595 * This make a large difference for gcc-1.40 and a tiny difference
2596 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2597 * best results. gcc-2.6.0 can't handle this.
2600 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2607 #include "opt_cpu.h"
2611 * initialize all the SMP locks
2614 /* critical region around IO APIC, apic_imen */
2615 struct spinlock imen_spinlock;
2617 /* Make FAST_INTR() routines sequential */
2618 struct spinlock fast_intr_spinlock;
2620 /* critical region for old style disable_intr/enable_intr */
2621 struct spinlock mpintr_spinlock;
2623 /* critical region around INTR() routines */
2624 struct spinlock intr_spinlock;
2626 /* lock region used by kernel profiling */
2627 struct spinlock mcount_spinlock;
2629 /* locks com (tty) data/hardware accesses: a FASTINTR() */
2630 struct spinlock com_spinlock;
2632 /* locks kernel printfs */
2633 struct spinlock cons_spinlock;
2635 /* lock regions around the clock hardware */
2636 struct spinlock clock_spinlock;
2638 /* lock around the MP rendezvous */
2639 struct spinlock smp_rv_spinlock;
2645 * mp_lock = 0; BSP already owns the MP lock
2648 * Get the initial mp_lock with a count of 1 for the BSP.
2649 * This uses a LOGICAL cpu ID, ie BSP == 0.
2652 cpu_get_initial_mplock();
2655 spin_lock_init(&mcount_spinlock);
2656 spin_lock_init(&fast_intr_spinlock);
2657 spin_lock_init(&intr_spinlock);
2658 spin_lock_init(&mpintr_spinlock);
2659 spin_lock_init(&imen_spinlock);
2660 spin_lock_init(&smp_rv_spinlock);
2661 spin_lock_init(&com_spinlock);
2662 spin_lock_init(&clock_spinlock);
2663 spin_lock_init(&cons_spinlock);
2665 /* our token pool needs to work early */
2666 lwkt_token_pool_init();