2 * Copyright (c) 1991 The Regents of the University of California.
5 * This code is derived from software contributed to Berkeley by
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
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12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
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17 * must display the following acknowledgement:
18 * This product includes software developed by the University of
19 * California, Berkeley and its contributors.
20 * 4. Neither the name of the University nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 * from: @(#)isa.c 7.2 (Berkeley) 5/13/91
37 * $FreeBSD: src/sys/i386/isa/isa_dma.c,v 1.4.2.1 2000/08/08 19:49:53 peter Exp $
38 * $DragonFly: src/sys/bus/isa/i386/isa_dma.c,v 1.7 2006/01/22 14:03:51 swildner Exp $
42 * code to manage AT bus
44 * 92/08/18 Frank P. MacLachlan (fpm@crash.cts.com):
45 * Fixed uninitialized variable problem and added code to deal
46 * with DMA page boundaries in isa_dmarangecheck(). Fixed word
47 * mode DMA count compution and reorganized DMA setup code in
51 #include <sys/param.h>
52 #include <sys/systm.h>
53 #include <sys/malloc.h>
55 #include <vm/vm_param.h>
59 #include <i386/isa/ic/i8237.h>
62 ** Register definitions for DMA controller 1 (channels 0..3):
64 #define DMA1_CHN(c) (IO_DMA1 + 1*(2*(c))) /* addr reg for channel c */
65 #define DMA1_SMSK (IO_DMA1 + 1*10) /* single mask register */
66 #define DMA1_MODE (IO_DMA1 + 1*11) /* mode register */
67 #define DMA1_FFC (IO_DMA1 + 1*12) /* clear first/last FF */
70 ** Register definitions for DMA controller 2 (channels 4..7):
72 #define DMA2_CHN(c) (IO_DMA2 + 2*(2*(c))) /* addr reg for channel c */
73 #define DMA2_SMSK (IO_DMA2 + 2*10) /* single mask register */
74 #define DMA2_MODE (IO_DMA2 + 2*11) /* mode register */
75 #define DMA2_FFC (IO_DMA2 + 2*12) /* clear first/last FF */
77 static int isa_dmarangecheck (caddr_t va, u_int length, int chan);
79 static caddr_t dma_bouncebuf[8];
80 static u_int dma_bouncebufsize[8];
81 static u_int8_t dma_bounced = 0;
82 static u_int8_t dma_busy = 0; /* Used in isa_dmastart() */
83 static u_int8_t dma_inuse = 0; /* User for acquire/release */
84 static u_int8_t dma_auto_mode = 0;
86 #define VALID_DMA_MASK (7)
88 /* high byte of address is stored in this port for i-th dma channel */
89 static int dmapageport[8] = { 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a };
92 * Setup a DMA channel's bounce buffer.
95 isa_dmainit(int chan, u_int bouncebufsize)
100 if (chan & ~VALID_DMA_MASK)
101 panic("isa_dmainit: channel out of range");
103 if (dma_bouncebuf[chan] != NULL)
104 panic("isa_dmainit: impossible request");
107 dma_bouncebufsize[chan] = bouncebufsize;
109 /* Try malloc() first. It works better if it works. */
110 buf = malloc(bouncebufsize, M_DEVBUF, M_NOWAIT);
112 if (isa_dmarangecheck(buf, bouncebufsize, chan) == 0) {
113 dma_bouncebuf[chan] = buf;
118 buf = contigmalloc(bouncebufsize, M_DEVBUF, M_NOWAIT, 0ul, 0xfffffful,
119 1ul, chan & 4 ? 0x20000ul : 0x10000ul);
121 printf("isa_dmainit(%d, %d) failed\n", chan, bouncebufsize);
123 dma_bouncebuf[chan] = buf;
127 * Register a DMA channel's usage. Usually called from a device driver
128 * in open() or during its initialization.
131 isa_dma_acquire(int chan)
134 if (chan & ~VALID_DMA_MASK)
135 panic("isa_dma_acquire: channel out of range");
138 if (dma_inuse & (1 << chan)) {
139 printf("isa_dma_acquire: channel %d already in use\n", chan);
142 dma_inuse |= (1 << chan);
143 dma_auto_mode &= ~(1 << chan);
149 * Unregister a DMA channel's usage. Usually called from a device driver
150 * during close() or during its shutdown.
153 isa_dma_release(int chan)
156 if (chan & ~VALID_DMA_MASK)
157 panic("isa_dma_release: channel out of range");
159 if ((dma_inuse & (1 << chan)) == 0)
160 printf("isa_dma_release: channel %d not in use\n", chan);
163 if (dma_busy & (1 << chan)) {
164 dma_busy &= ~(1 << chan);
166 * XXX We should also do "dma_bounced &= (1 << chan);"
167 * because we are acting on behalf of isa_dmadone() which
168 * was not called to end the last DMA operation. This does
169 * not matter now, but it may in the future.
173 dma_inuse &= ~(1 << chan);
174 dma_auto_mode &= ~(1 << chan);
178 * isa_dmacascade(): program 8237 DMA controller channel to accept
179 * external dma control by a board.
182 isa_dmacascade(int chan)
185 if (chan & ~VALID_DMA_MASK)
186 panic("isa_dmacascade: channel out of range");
189 /* set dma channel mode, and set dma channel mode */
190 if ((chan & 4) == 0) {
191 outb(DMA1_MODE, DMA37MD_CASCADE | chan);
192 outb(DMA1_SMSK, chan);
194 outb(DMA2_MODE, DMA37MD_CASCADE | (chan & 3));
195 outb(DMA2_SMSK, chan & 3);
200 * isa_dmastart(): program 8237 DMA controller channel, avoid page alignment
201 * problems by using a bounce buffer.
204 isa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan)
211 if (chan & ~VALID_DMA_MASK)
212 panic("isa_dmastart: channel out of range");
214 if ((chan < 4 && nbytes > (1<<16))
215 || (chan >= 4 && (nbytes > (1<<17) || (u_int)addr & 1)))
216 panic("isa_dmastart: impossible request");
218 if ((dma_inuse & (1 << chan)) == 0)
219 printf("isa_dmastart: channel %d not acquired\n", chan);
224 * XXX This should be checked, but drivers like ad1848 only call
225 * isa_dmastart() once because they use Auto DMA mode. If we
226 * leave this in, drivers that do this will print this continuously.
228 if (dma_busy & (1 << chan))
229 printf("isa_dmastart: channel %d busy\n", chan);
232 dma_busy |= (1 << chan);
234 if (isa_dmarangecheck(addr, nbytes, chan)) {
235 if (dma_bouncebuf[chan] == NULL
236 || dma_bouncebufsize[chan] < nbytes)
237 panic("isa_dmastart: bad bounce buffer");
238 dma_bounced |= (1 << chan);
239 newaddr = dma_bouncebuf[chan];
241 /* copy bounce buffer on write */
242 if (!(flags & ISADMA_READ))
243 bcopy(addr, newaddr, nbytes);
247 /* translate to physical */
248 phys = pmap_extract(pmap_kernel(), (vm_offset_t)addr);
250 if (flags & ISADMA_RAW) {
251 dma_auto_mode |= (1 << chan);
253 dma_auto_mode &= ~(1 << chan);
256 if ((chan & 4) == 0) {
258 * Program one of DMA channels 0..3. These are
259 * byte mode channels.
261 /* set dma channel mode, and reset address ff */
263 /* If ISADMA_RAW flag is set, then use autoinitialise mode */
264 if (flags & ISADMA_RAW) {
265 if (flags & ISADMA_READ)
266 outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_WRITE|chan);
268 outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_READ|chan);
271 if (flags & ISADMA_READ)
272 outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan);
274 outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan);
277 /* send start address */
278 waport = DMA1_CHN(chan);
280 outb(waport, phys>>8);
281 outb(dmapageport[chan], phys>>16);
284 outb(waport + 1, --nbytes);
285 outb(waport + 1, nbytes>>8);
288 outb(DMA1_SMSK, chan);
291 * Program one of DMA channels 4..7. These are
292 * word mode channels.
294 /* set dma channel mode, and reset address ff */
296 /* If ISADMA_RAW flag is set, then use autoinitialise mode */
297 if (flags & ISADMA_RAW) {
298 if (flags & ISADMA_READ)
299 outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_WRITE|(chan&3));
301 outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_READ|(chan&3));
304 if (flags & ISADMA_READ)
305 outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|(chan&3));
307 outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_READ|(chan&3));
310 /* send start address */
311 waport = DMA2_CHN(chan - 4);
312 outb(waport, phys>>1);
313 outb(waport, phys>>9);
314 outb(dmapageport[chan], phys>>16);
318 outb(waport + 2, --nbytes);
319 outb(waport + 2, nbytes>>8);
322 outb(DMA2_SMSK, chan & 3);
327 isa_dmadone(int flags, caddr_t addr, int nbytes, int chan)
330 if (chan & ~VALID_DMA_MASK)
331 panic("isa_dmadone: channel out of range");
333 if ((dma_inuse & (1 << chan)) == 0)
334 printf("isa_dmadone: channel %d not acquired\n", chan);
337 if (((dma_busy & (1 << chan)) == 0) &&
338 (dma_auto_mode & (1 << chan)) == 0 )
339 printf("isa_dmadone: channel %d not busy\n", chan);
341 if ((dma_auto_mode & (1 << chan)) == 0)
342 outb(chan & 4 ? DMA2_SMSK : DMA1_SMSK, (chan & 3) | 4);
344 if (dma_bounced & (1 << chan)) {
345 /* copy bounce buffer on read */
346 if (flags & ISADMA_READ)
347 bcopy(dma_bouncebuf[chan], addr, nbytes);
349 dma_bounced &= ~(1 << chan);
351 dma_busy &= ~(1 << chan);
355 * Check for problems with the address range of a DMA transfer
356 * (non-contiguous physical pages, outside of bus address space,
357 * crossing DMA page boundaries).
358 * Return true if special handling needed.
362 isa_dmarangecheck(caddr_t va, u_int length, int chan)
364 vm_paddr_t phys, priorpage = 0;
366 u_int dma_pgmsk = (chan & 4) ? ~(128*1024-1) : ~(64*1024-1);
368 endva = (vm_offset_t)round_page((vm_offset_t)va + length);
369 for (; va < (caddr_t) endva ; va += PAGE_SIZE) {
370 phys = trunc_page(pmap_extract(pmap_kernel(), (vm_offset_t)va));
371 #define ISARAM_END RAM_END
373 panic("isa_dmacheck: no physical page present");
374 if (phys >= ISARAM_END)
377 if (priorpage + PAGE_SIZE != phys)
379 /* check if crossing a DMA page boundary */
380 if (((u_int)priorpage ^ (u_int)phys) & dma_pgmsk)
389 * Query the progress of a transfer on a DMA channel.
391 * To avoid having to interrupt a transfer in progress, we sample
392 * each of the high and low databytes twice, and apply the following
393 * logic to determine the correct count.
395 * Reads are performed with interrupts disabled, thus it is to be
396 * expected that the time between reads is very small. At most
397 * one rollover in the low count byte can be expected within the
398 * four reads that are performed.
400 * There are three gaps in which a rollover can occur :
410 * If a rollover occurs in gap1 or gap2, the low2 value will be
411 * greater than the low1 value. In this case, low2 and high2 are a
412 * corresponding pair.
414 * In any other case, low1 and high1 can be considered to be correct.
416 * The function returns the number of bytes remaining in the transfer,
417 * or -1 if the channel requested is not active.
421 isa_dmastatus(int chan)
425 u_long low1, high1, low2, high2;
427 /* channel active? */
428 if ((dma_inuse & (1 << chan)) == 0) {
429 printf("isa_dmastatus: channel %d not active\n", chan);
434 if (((dma_busy & (1 << chan)) == 0) &&
435 (dma_auto_mode & (1 << chan)) == 0 ) {
436 printf("chan %d not busy\n", chan);
439 if (chan < 4) { /* low DMA controller */
441 waport = DMA1_CHN(chan) + 1;
442 } else { /* high DMA controller */
444 waport = DMA2_CHN(chan - 4) + 2;
447 cpu_disable_intr(); /* YYY *//* no interrupts Mr Jones! */
448 outb(ffport, 0); /* clear register LSB flipflop */
451 outb(ffport, 0); /* clear again */
454 cpu_enable_intr(); /* enable interrupts again */
457 * Now decide if a wrap has tried to skew our results.
458 * Note that after TC, the count will read 0xffff, while we want
459 * to return zero, so we add and then mask to compensate.
462 cnt = (low1 + (high1 << 8) + 1) & 0xffff;
464 cnt = (low2 + (high2 << 8) + 1) & 0xffff;
467 if (chan >= 4) /* high channels move words */
473 * Stop a DMA transfer currently in progress.
476 isa_dmastop(int chan)
478 if ((dma_inuse & (1 << chan)) == 0)
479 printf("isa_dmastop: channel %d not acquired\n", chan);
481 if (((dma_busy & (1 << chan)) == 0) &&
482 ((dma_auto_mode & (1 << chan)) == 0)) {
483 printf("chan %d not busy\n", chan);
487 if ((chan & 4) == 0) {
488 outb(DMA1_SMSK, (chan & 3) | 4 /* disable mask */);
490 outb(DMA2_SMSK, (chan & 3) | 4 /* disable mask */);
492 return(isa_dmastatus(chan));