sys/dev/drm/i915/intel_lvds.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *      Eric Anholt <eric@anholt.net>
  26  *      Dave Airlie <airlied@linux.ie>
  27  *      Jesse Barnes <jesse.barnes@intel.com>
  28  */
  29
  30 #include <linux/dmi.h>
  31 #include <linux/i2c.h>
  32 #include <drm/drmP.h>
  33 #include <drm/drm_atomic_helper.h>
  34 #include <drm/drm_crtc.h>
  35 #include <drm/drm_edid.h>
  36 #include "intel_drv.h"
  37 #include <drm/i915_drm.h>
  38 #include "i915_drv.h"
  39
  40 /* Private structure for the integrated LVDS support */
  41 struct intel_lvds_connector {
  42         struct intel_connector base;
  43
  44         struct notifier_block lid_notifier;
  45 };
  46
  47 struct intel_lvds_encoder {
  48         struct intel_encoder base;
  49
  50         bool is_dual_link;
  51         u32 reg;
  52         u32 a3_power;
  53
  54         struct intel_lvds_connector *attached_connector;
  55 };
  56
  57 static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
  58 {
  59         return container_of(encoder, struct intel_lvds_encoder, base.base);
  60 }
  61
  62 static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
  63 {
  64         return container_of(connector, struct intel_lvds_connector, base.base);
  65 }
  66
  67 static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
  68                                     enum i915_pipe *pipe)
  69 {
  70         struct drm_device *dev = encoder->base.dev;
  71         struct drm_i915_private *dev_priv = dev->dev_private;
  72         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  73         enum intel_display_power_domain power_domain;
  74         u32 tmp;
  75
  76         power_domain = intel_display_port_power_domain(encoder);
  77         if (!intel_display_power_is_enabled(dev_priv, power_domain))
  78                 return false;
  79
  80         tmp = I915_READ(lvds_encoder->reg);
  81
  82         if (!(tmp & LVDS_PORT_EN))
  83                 return false;
  84
  85         if (HAS_PCH_CPT(dev))
  86                 *pipe = PORT_TO_PIPE_CPT(tmp);
  87         else
  88                 *pipe = PORT_TO_PIPE(tmp);
  89
  90         return true;
  91 }
  92
  93 static void intel_lvds_get_config(struct intel_encoder *encoder,
  94                                   struct intel_crtc_state *pipe_config)
  95 {
  96         struct drm_device *dev = encoder->base.dev;
  97         struct drm_i915_private *dev_priv = dev->dev_private;
  98         u32 lvds_reg, tmp, flags = 0;
  99         int dotclock;
 100
 101         if (HAS_PCH_SPLIT(dev))
 102                 lvds_reg = PCH_LVDS;
 103         else
 104                 lvds_reg = LVDS;
 105
 106         tmp = I915_READ(lvds_reg);
 107         if (tmp & LVDS_HSYNC_POLARITY)
 108                 flags |= DRM_MODE_FLAG_NHSYNC;
 109         else
 110                 flags |= DRM_MODE_FLAG_PHSYNC;
 111         if (tmp & LVDS_VSYNC_POLARITY)
 112                 flags |= DRM_MODE_FLAG_NVSYNC;
 113         else
 114                 flags |= DRM_MODE_FLAG_PVSYNC;
 115
 116         pipe_config->base.adjusted_mode.flags |= flags;
 117
 118         /* gen2/3 store dither state in pfit control, needs to match */
 119         if (INTEL_INFO(dev)->gen < 4) {
 120                 tmp = I915_READ(PFIT_CONTROL);
 121
 122                 pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE;
 123         }
 124
 125         dotclock = pipe_config->port_clock;
 126
 127         if (HAS_PCH_SPLIT(dev_priv->dev))
 128                 ironlake_check_encoder_dotclock(pipe_config, dotclock);
 129
 130         pipe_config->base.adjusted_mode.crtc_clock = dotclock;
 131 }
 132
 133 static void intel_pre_enable_lvds(struct intel_encoder *encoder)
 134 {
 135         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 136         struct drm_device *dev = encoder->base.dev;
 137         struct drm_i915_private *dev_priv = dev->dev_private;
 138         struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
 139         const struct drm_display_mode *adjusted_mode =
 140                 &crtc->config->base.adjusted_mode;
 141         int pipe = crtc->pipe;
 142         u32 temp;
 143
 144         if (HAS_PCH_SPLIT(dev)) {
 145                 assert_fdi_rx_pll_disabled(dev_priv, pipe);
 146                 assert_shared_dpll_disabled(dev_priv,
 147                                             intel_crtc_to_shared_dpll(crtc));
 148         } else {
 149                 assert_pll_disabled(dev_priv, pipe);
 150         }
 151
 152         temp = I915_READ(lvds_encoder->reg);
 153         temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
 154
 155         if (HAS_PCH_CPT(dev)) {
 156                 temp &= ~PORT_TRANS_SEL_MASK;
 157                 temp |= PORT_TRANS_SEL_CPT(pipe);
 158         } else {
 159                 if (pipe == 1) {
 160                         temp |= LVDS_PIPEB_SELECT;
 161                 } else {
 162                         temp &= ~LVDS_PIPEB_SELECT;
 163                 }
 164         }
 165
 166         /* set the corresponsding LVDS_BORDER bit */
 167         temp &= ~LVDS_BORDER_ENABLE;
 168         temp |= crtc->config->gmch_pfit.lvds_border_bits;
 169         /* Set the B0-B3 data pairs corresponding to whether we're going to
 170          * set the DPLLs for dual-channel mode or not.
 171          */
 172         if (lvds_encoder->is_dual_link)
 173                 temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
 174         else
 175                 temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
 176
 177         /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
 178          * appropriately here, but we need to look more thoroughly into how
 179          * panels behave in the two modes. For now, let's just maintain the
 180          * value we got from the BIOS.
 181          */
 182          temp &= ~LVDS_A3_POWER_MASK;
 183          temp |= lvds_encoder->a3_power;
 184
 185         /* Set the dithering flag on LVDS as needed, note that there is no
 186          * special lvds dither control bit on pch-split platforms, dithering is
 187          * only controlled through the PIPECONF reg. */
 188         if (INTEL_INFO(dev)->gen == 4) {
 189                 /* Bspec wording suggests that LVDS port dithering only exists
 190                  * for 18bpp panels. */
 191                 if (crtc->config->dither && crtc->config->pipe_bpp == 18)
 192                         temp |= LVDS_ENABLE_DITHER;
 193                 else
 194                         temp &= ~LVDS_ENABLE_DITHER;
 195         }
 196         temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
 197         if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
 198                 temp |= LVDS_HSYNC_POLARITY;
 199         if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
 200                 temp |= LVDS_VSYNC_POLARITY;
 201
 202         I915_WRITE(lvds_encoder->reg, temp);
 203 }
 204
 205 /**
 206  * Sets the power state for the panel.
 207  */
 208 static void intel_enable_lvds(struct intel_encoder *encoder)
 209 {
 210         struct drm_device *dev = encoder->base.dev;
 211         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 212         struct intel_connector *intel_connector =
 213                 &lvds_encoder->attached_connector->base;
 214         struct drm_i915_private *dev_priv = dev->dev_private;
 215         u32 ctl_reg, stat_reg;
 216
 217         if (HAS_PCH_SPLIT(dev)) {
 218                 ctl_reg = PCH_PP_CONTROL;
 219                 stat_reg = PCH_PP_STATUS;
 220         } else {
 221                 ctl_reg = PP_CONTROL;
 222                 stat_reg = PP_STATUS;
 223         }
 224
 225         I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
 226
 227         I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
 228         POSTING_READ(lvds_encoder->reg);
 229         if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
 230                 DRM_ERROR("timed out waiting for panel to power on\n");
 231
 232         intel_panel_enable_backlight(intel_connector);
 233 }
 234
 235 static void intel_disable_lvds(struct intel_encoder *encoder)
 236 {
 237         struct drm_device *dev = encoder->base.dev;
 238         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 239         struct intel_connector *intel_connector =
 240                 &lvds_encoder->attached_connector->base;
 241         struct drm_i915_private *dev_priv = dev->dev_private;
 242         u32 ctl_reg, stat_reg;
 243
 244         if (HAS_PCH_SPLIT(dev)) {
 245                 ctl_reg = PCH_PP_CONTROL;
 246                 stat_reg = PCH_PP_STATUS;
 247         } else {
 248                 ctl_reg = PP_CONTROL;
 249                 stat_reg = PP_STATUS;
 250         }
 251
 252         intel_panel_disable_backlight(intel_connector);
 253
 254         I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
 255         if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
 256                 DRM_ERROR("timed out waiting for panel to power off\n");
 257
 258         I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
 259         POSTING_READ(lvds_encoder->reg);
 260 }
 261
 262 static enum drm_mode_status
 263 intel_lvds_mode_valid(struct drm_connector *connector,
 264                       struct drm_display_mode *mode)
 265 {
 266         struct intel_connector *intel_connector = to_intel_connector(connector);
 267         struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
 268
 269         if (mode->hdisplay > fixed_mode->hdisplay)
 270                 return MODE_PANEL;
 271         if (mode->vdisplay > fixed_mode->vdisplay)
 272                 return MODE_PANEL;
 273
 274         return MODE_OK;
 275 }
 276
 277 static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
 278                                       struct intel_crtc_state *pipe_config)
 279 {
 280         struct drm_device *dev = intel_encoder->base.dev;
 281         struct intel_lvds_encoder *lvds_encoder =
 282                 to_lvds_encoder(&intel_encoder->base);
 283         struct intel_connector *intel_connector =
 284                 &lvds_encoder->attached_connector->base;
 285         struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
 286         struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);
 287         unsigned int lvds_bpp;
 288
 289         /* Should never happen!! */
 290         if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
 291                 DRM_ERROR("Can't support LVDS on pipe A\n");
 292                 return false;
 293         }
 294
 295         if (lvds_encoder->a3_power == LVDS_A3_POWER_UP)
 296                 lvds_bpp = 8*3;
 297         else
 298                 lvds_bpp = 6*3;
 299
 300         if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) {
 301                 DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
 302                               pipe_config->pipe_bpp, lvds_bpp);
 303                 pipe_config->pipe_bpp = lvds_bpp;
 304         }
 305
 306         /*
 307          * We have timings from the BIOS for the panel, put them in
 308          * to the adjusted mode.  The CRTC will be set up for this mode,
 309          * with the panel scaling set up to source from the H/VDisplay
 310          * of the original mode.
 311          */
 312         intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
 313                                adjusted_mode);
 314
 315         if (HAS_PCH_SPLIT(dev)) {
 316                 pipe_config->has_pch_encoder = true;
 317
 318                 intel_pch_panel_fitting(intel_crtc, pipe_config,
 319                                         intel_connector->panel.fitting_mode);
 320         } else {
 321                 intel_gmch_panel_fitting(intel_crtc, pipe_config,
 322                                          intel_connector->panel.fitting_mode);
 323
 324         }
 325
 326         /*
 327          * XXX: It would be nice to support lower refresh rates on the
 328          * panels to reduce power consumption, and perhaps match the
 329          * user's requested refresh rate.
 330          */
 331
 332         return true;
 333 }
 334
 335 /**
 336  * Detect the LVDS connection.
 337  *
 338  * Since LVDS doesn't have hotlug, we use the lid as a proxy.  Open means
 339  * connected and closed means disconnected.  We also send hotplug events as
 340  * needed, using lid status notification from the input layer.
 341  */
 342 static enum drm_connector_status
 343 intel_lvds_detect(struct drm_connector *connector, bool force)
 344 {
 345         struct drm_device *dev = connector->dev;
 346         enum drm_connector_status status;
 347
 348         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
 349                       connector->base.id, connector->name);
 350
 351         status = intel_panel_detect(dev);
 352         if (status != connector_status_unknown)
 353                 return status;
 354
 355         return connector_status_connected;
 356 }
 357
 358 /**
 359  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
 360  */
 361 static int intel_lvds_get_modes(struct drm_connector *connector)
 362 {
 363         struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
 364         struct drm_device *dev = connector->dev;
 365         struct drm_display_mode *mode;
 366
 367         /* use cached edid if we have one */
 368         if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
 369                 return drm_add_edid_modes(connector, lvds_connector->base.edid);
 370
 371         mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
 372         if (mode == NULL)
 373                 return 0;
 374
 375         drm_mode_probed_add(connector, mode);
 376         return 1;
 377 }
 378
 379 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
 380 {
 381         DRM_INFO("Skipping forced modeset for %s\n", id->ident);
 382         return 1;
 383 }
 384
 385 /* The GPU hangs up on these systems if modeset is performed on LID open */
 386 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
 387         {
 388                 .callback = intel_no_modeset_on_lid_dmi_callback,
 389                 .ident = "Toshiba Tecra A11",
 390                 .matches = {
 391                         DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
 392                         DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
 393                 },
 394         },
 395
 396         { }     /* terminating entry */
 397 };
 398
 399 #if 0
 400 /*
 401  * Lid events. Note the use of 'modeset':
 402  *  - we set it to MODESET_ON_LID_OPEN on lid close,
 403  *    and set it to MODESET_DONE on open
 404  *  - we use it as a "only once" bit (ie we ignore
 405  *    duplicate events where it was already properly set)
 406  *  - the suspend/resume paths will set it to
 407  *    MODESET_SUSPENDED and ignore the lid open event,
 408  *    because they restore the mode ("lid open").
 409  */
 410 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
 411                             void *unused)
 412 {
 413         struct intel_lvds_connector *lvds_connector =
 414                 container_of(nb, struct intel_lvds_connector, lid_notifier);
 415         struct drm_connector *connector = &lvds_connector->base.base;
 416         struct drm_device *dev = connector->dev;
 417         struct drm_i915_private *dev_priv = dev->dev_private;
 418
 419         if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
 420                 return NOTIFY_OK;
 421
 422         mutex_lock(&dev_priv->modeset_restore_lock);
 423         if (dev_priv->modeset_restore == MODESET_SUSPENDED)
 424                 goto exit;
 425         /*
 426          * check and update the status of LVDS connector after receiving
 427          * the LID nofication event.
 428          */
 429         connector->status = connector->funcs->detect(connector, false);
 430
 431         /* Don't force modeset on machines where it causes a GPU lockup */
 432         if (dmi_check_system(intel_no_modeset_on_lid))
 433                 goto exit;
 434         if (!acpi_lid_open()) {
 435                 /* do modeset on next lid open event */
 436                 dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
 437                 goto exit;
 438         }
 439
 440         if (dev_priv->modeset_restore == MODESET_DONE)
 441                 goto exit;
 442
 443         /*
 444          * Some old platform's BIOS love to wreak havoc while the lid is closed.
 445          * We try to detect this here and undo any damage. The split for PCH
 446          * platforms is rather conservative and a bit arbitrary expect that on
 447          * those platforms VGA disabling requires actual legacy VGA I/O access,
 448          * and as part of the cleanup in the hw state restore we also redisable
 449          * the vga plane.
 450          */
 451         if (!HAS_PCH_SPLIT(dev)) {
 452                 drm_modeset_lock_all(dev);
 453                 intel_modeset_setup_hw_state(dev, true);
 454                 drm_modeset_unlock_all(dev);
 455         }
 456
 457         dev_priv->modeset_restore = MODESET_DONE;
 458
 459 exit:
 460         mutex_unlock(&dev_priv->modeset_restore_lock);
 461         return NOTIFY_OK;
 462 }
 463 #endif
 464
 465 /**
 466  * intel_lvds_destroy - unregister and free LVDS structures
 467  * @connector: connector to free
 468  *
 469  * Unregister the DDC bus for this connector then free the driver private
 470  * structure.
 471  */
 472 static void intel_lvds_destroy(struct drm_connector *connector)
 473 {
 474         struct intel_lvds_connector *lvds_connector =
 475                 to_lvds_connector(connector);
 476
 477 #if 0
 478         if (lvds_connector->lid_notifier.notifier_call)
 479                 acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
 480 #endif
 481
 482         if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
 483                 kfree(lvds_connector->base.edid);
 484
 485         intel_panel_fini(&lvds_connector->base.panel);
 486
 487         drm_connector_cleanup(connector);
 488         kfree(connector);
 489 }
 490
 491 static int intel_lvds_set_property(struct drm_connector *connector,
 492                                    struct drm_property *property,
 493                                    uint64_t value)
 494 {
 495         struct intel_connector *intel_connector = to_intel_connector(connector);
 496         struct drm_device *dev = connector->dev;
 497
 498         if (property == dev->mode_config.scaling_mode_property) {
 499                 struct drm_crtc *crtc;
 500
 501                 if (value == DRM_MODE_SCALE_NONE) {
 502                         DRM_DEBUG_KMS("no scaling not supported\n");
 503                         return -EINVAL;
 504                 }
 505
 506                 if (intel_connector->panel.fitting_mode == value) {
 507                         /* the LVDS scaling property is not changed */
 508                         return 0;
 509                 }
 510                 intel_connector->panel.fitting_mode = value;
 511
 512                 crtc = intel_attached_encoder(connector)->base.crtc;
 513                 if (crtc && crtc->state->enable) {
 514                         /*
 515                          * If the CRTC is enabled, the display will be changed
 516                          * according to the new panel fitting mode.
 517                          */
 518                         intel_crtc_restore_mode(crtc);
 519                 }
 520         }
 521
 522         return 0;
 523 }
 524
 525 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
 526         .get_modes = intel_lvds_get_modes,
 527         .mode_valid = intel_lvds_mode_valid,
 528         .best_encoder = intel_best_encoder,
 529 };
 530
 531 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
 532         .dpms = intel_connector_dpms,
 533         .detect = intel_lvds_detect,
 534         .fill_modes = drm_helper_probe_single_connector_modes,
 535         .set_property = intel_lvds_set_property,
 536         .atomic_get_property = intel_connector_atomic_get_property,
 537         .destroy = intel_lvds_destroy,
 538         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 539         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
 540 };
 541
 542 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
 543         .destroy = intel_encoder_destroy,
 544 };
 545
 546 static int intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
 547 {
 548         DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
 549         return 1;
 550 }
 551
 552 /* These systems claim to have LVDS, but really don't */
 553 static const struct dmi_system_id intel_no_lvds[] = {
 554         {
 555                 .callback = intel_no_lvds_dmi_callback,
 556                 .ident = "Apple Mac Mini (Core series)",
 557                 .matches = {
 558                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 559                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
 560                 },
 561         },
 562         {
 563                 .callback = intel_no_lvds_dmi_callback,
 564                 .ident = "Apple Mac Mini (Core 2 series)",
 565                 .matches = {
 566                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 567                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
 568                 },
 569         },
 570         {
 571                 .callback = intel_no_lvds_dmi_callback,
 572                 .ident = "MSI IM-945GSE-A",
 573                 .matches = {
 574                         DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
 575                         DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
 576                 },
 577         },
 578         {
 579                 .callback = intel_no_lvds_dmi_callback,
 580                 .ident = "Dell Studio Hybrid",
 581                 .matches = {
 582                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 583                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
 584                 },
 585         },
 586         {
 587                 .callback = intel_no_lvds_dmi_callback,
 588                 .ident = "Dell OptiPlex FX170",
 589                 .matches = {
 590                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 591                         DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
 592                 },
 593         },
 594         {
 595                 .callback = intel_no_lvds_dmi_callback,
 596                 .ident = "AOpen Mini PC",
 597                 .matches = {
 598                         DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
 599                         DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
 600                 },
 601         },
 602         {
 603                 .callback = intel_no_lvds_dmi_callback,
 604                 .ident = "AOpen Mini PC MP915",
 605                 .matches = {
 606                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 607                         DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
 608                 },
 609         },
 610         {
 611                 .callback = intel_no_lvds_dmi_callback,
 612                 .ident = "AOpen i915GMm-HFS",
 613                 .matches = {
 614                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 615                         DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
 616                 },
 617         },
 618         {
 619                 .callback = intel_no_lvds_dmi_callback,
 620                 .ident = "AOpen i45GMx-I",
 621                 .matches = {
 622                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 623                         DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
 624                 },
 625         },
 626         {
 627                 .callback = intel_no_lvds_dmi_callback,
 628                 .ident = "Aopen i945GTt-VFA",
 629                 .matches = {
 630                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
 631                 },
 632         },
 633         {
 634                 .callback = intel_no_lvds_dmi_callback,
 635                 .ident = "Clientron U800",
 636                 .matches = {
 637                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
 638                         DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
 639                 },
 640         },
 641         {
 642                 .callback = intel_no_lvds_dmi_callback,
 643                 .ident = "Clientron E830",
 644                 .matches = {
 645                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
 646                         DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
 647                 },
 648         },
 649         {
 650                 .callback = intel_no_lvds_dmi_callback,
 651                 .ident = "Asus EeeBox PC EB1007",
 652                 .matches = {
 653                         DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
 654                         DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
 655                 },
 656         },
 657         {
 658                 .callback = intel_no_lvds_dmi_callback,
 659                 .ident = "Asus AT5NM10T-I",
 660                 .matches = {
 661                         DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
 662                         DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
 663                 },
 664         },
 665         {
 666                 .callback = intel_no_lvds_dmi_callback,
 667                 .ident = "Hewlett-Packard HP t5740",
 668                 .matches = {
 669                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 670                         DMI_MATCH(DMI_PRODUCT_NAME, " t5740"),
 671                 },
 672         },
 673         {
 674                 .callback = intel_no_lvds_dmi_callback,
 675                 .ident = "Hewlett-Packard t5745",
 676                 .matches = {
 677                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 678                         DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
 679                 },
 680         },
 681         {
 682                 .callback = intel_no_lvds_dmi_callback,
 683                 .ident = "Hewlett-Packard st5747",
 684                 .matches = {
 685                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 686                         DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
 687                 },
 688         },
 689         {
 690                 .callback = intel_no_lvds_dmi_callback,
 691                 .ident = "MSI Wind Box DC500",
 692                 .matches = {
 693                         DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
 694                         DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
 695                 },
 696         },
 697         {
 698                 .callback = intel_no_lvds_dmi_callback,
 699                 .ident = "Gigabyte GA-D525TUD",
 700                 .matches = {
 701                         DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
 702                         DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
 703                 },
 704         },
 705         {
 706                 .callback = intel_no_lvds_dmi_callback,
 707                 .ident = "Supermicro X7SPA-H",
 708                 .matches = {
 709                         DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
 710                         DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
 711                 },
 712         },
 713         {
 714                 .callback = intel_no_lvds_dmi_callback,
 715                 .ident = "Fujitsu Esprimo Q900",
 716                 .matches = {
 717                         DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
 718                         DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
 719                 },
 720         },
 721         {
 722                 .callback = intel_no_lvds_dmi_callback,
 723                 .ident = "Intel D410PT",
 724                 .matches = {
 725                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 726                         DMI_MATCH(DMI_BOARD_NAME, "D410PT"),
 727                 },
 728         },
 729         {
 730                 .callback = intel_no_lvds_dmi_callback,
 731                 .ident = "Intel D425KT",
 732                 .matches = {
 733                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 734                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D425KT"),
 735                 },
 736         },
 737         {
 738                 .callback = intel_no_lvds_dmi_callback,
 739                 .ident = "Intel D510MO",
 740                 .matches = {
 741                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 742                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D510MO"),
 743                 },
 744         },
 745         {
 746                 .callback = intel_no_lvds_dmi_callback,
 747                 .ident = "Intel D525MW",
 748                 .matches = {
 749                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 750                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D525MW"),
 751                 },
 752         },
 753
 754         { }     /* terminating entry */
 755 };
 756
 757 /*
 758  * Enumerate the child dev array parsed from VBT to check whether
 759  * the LVDS is present.
 760  * If it is present, return 1.
 761  * If it is not present, return false.
 762  * If no child dev is parsed from VBT, it assumes that the LVDS is present.
 763  */
 764 static bool lvds_is_present_in_vbt(struct drm_device *dev,
 765                                    u8 *i2c_pin)
 766 {
 767         struct drm_i915_private *dev_priv = dev->dev_private;
 768         int i;
 769
 770         if (!dev_priv->vbt.child_dev_num)
 771                 return true;
 772
 773         for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
 774                 union child_device_config *uchild = dev_priv->vbt.child_dev + i;
 775                 struct old_child_dev_config *child = &uchild->old;
 776
 777                 /* If the device type is not LFP, continue.
 778                  * We have to check both the new identifiers as well as the
 779                  * old for compatibility with some BIOSes.
 780                  */
 781                 if (child->device_type != DEVICE_TYPE_INT_LFP &&
 782                     child->device_type != DEVICE_TYPE_LFP)
 783                         continue;
 784
 785                 if (intel_gmbus_is_valid_pin(dev_priv, child->i2c_pin))
 786                         *i2c_pin = child->i2c_pin;
 787
 788                 /* However, we cannot trust the BIOS writers to populate
 789                  * the VBT correctly.  Since LVDS requires additional
 790                  * information from AIM blocks, a non-zero addin offset is
 791                  * a good indicator that the LVDS is actually present.
 792                  */
 793                 if (child->addin_offset)
 794                         return true;
 795
 796                 /* But even then some BIOS writers perform some black magic
 797                  * and instantiate the device without reference to any
 798                  * additional data.  Trust that if the VBT was written into
 799                  * the OpRegion then they have validated the LVDS's existence.
 800                  */
 801                 if (dev_priv->opregion.vbt)
 802                         return true;
 803         }
 804
 805         return false;
 806 }
 807
 808 static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
 809 {
 810         DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
 811         return 1;
 812 }
 813
 814 static const struct dmi_system_id intel_dual_link_lvds[] = {
 815         {
 816                 .callback = intel_dual_link_lvds_callback,
 817                 .ident = "Apple MacBook Pro 15\" (2010)",
 818                 .matches = {
 819                         DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
 820                         DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro6,2"),
 821                 },
 822         },
 823         {
 824                 .callback = intel_dual_link_lvds_callback,
 825                 .ident = "Apple MacBook Pro 15\" (2011)",
 826                 .matches = {
 827                         DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
 828                         DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
 829                 },
 830         },
 831         {
 832                 .callback = intel_dual_link_lvds_callback,
 833                 .ident = "Apple MacBook Pro 15\" (2012)",
 834                 .matches = {
 835                         DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
 836                         DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro9,1"),
 837                 },
 838         },
 839         { }     /* terminating entry */
 840 };
 841
 842 bool intel_is_dual_link_lvds(struct drm_device *dev)
 843 {
 844         struct intel_encoder *encoder;
 845         struct intel_lvds_encoder *lvds_encoder;
 846
 847         for_each_intel_encoder(dev, encoder) {
 848                 if (encoder->type == INTEL_OUTPUT_LVDS) {
 849                         lvds_encoder = to_lvds_encoder(&encoder->base);
 850
 851                         return lvds_encoder->is_dual_link;
 852                 }
 853         }
 854
 855         return false;
 856 }
 857
 858 static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
 859 {
 860         struct drm_device *dev = lvds_encoder->base.base.dev;
 861         unsigned int val;
 862         struct drm_i915_private *dev_priv = dev->dev_private;
 863
 864         /* use the module option value if specified */
 865         if (i915.lvds_channel_mode > 0)
 866                 return i915.lvds_channel_mode == 2;
 867
 868         /* single channel LVDS is limited to 112 MHz */
 869         if (lvds_encoder->attached_connector->base.panel.fixed_mode->clock
 870             > 112999)
 871                 return true;
 872
 873         if (dmi_check_system(intel_dual_link_lvds))
 874                 return true;
 875
 876         /* BIOS should set the proper LVDS register value at boot, but
 877          * in reality, it doesn't set the value when the lid is closed;
 878          * we need to check "the value to be set" in VBT when LVDS
 879          * register is uninitialized.
 880          */
 881         val = I915_READ(lvds_encoder->reg);
 882         if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
 883                 val = dev_priv->vbt.bios_lvds_val;
 884
 885         return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
 886 }
 887
 888 static bool intel_lvds_supported(struct drm_device *dev)
 889 {
 890         /* With the introduction of the PCH we gained a dedicated
 891          * LVDS presence pin, use it. */
 892         if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
 893                 return true;
 894
 895         /* Otherwise LVDS was only attached to mobile products,
 896          * except for the inglorious 830gm */
 897         if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
 898                 return true;
 899
 900         return false;
 901 }
 902
 903 /**
 904  * intel_lvds_init - setup LVDS connectors on this device
 905  * @dev: drm device
 906  *
 907  * Create the connector, register the LVDS DDC bus, and try to figure out what
 908  * modes we can display on the LVDS panel (if present).
 909  */
 910 void intel_lvds_init(struct drm_device *dev)
 911 {
 912         struct drm_i915_private *dev_priv = dev->dev_private;
 913         struct intel_lvds_encoder *lvds_encoder;
 914         struct intel_encoder *intel_encoder;
 915         struct intel_lvds_connector *lvds_connector;
 916         struct intel_connector *intel_connector;
 917         struct drm_connector *connector;
 918         struct drm_encoder *encoder;
 919         struct drm_display_mode *scan; /* *modes, *bios_mode; */
 920         struct drm_display_mode *fixed_mode = NULL;
 921         struct drm_display_mode *downclock_mode = NULL;
 922         struct edid *edid;
 923         struct drm_crtc *crtc;
 924         u32 lvds;
 925         int pipe;
 926         u8 pin;
 927
 928         /*
 929          * Unlock registers and just leave them unlocked. Do this before
 930          * checking quirk lists to avoid bogus WARNINGs.
 931          */
 932         if (HAS_PCH_SPLIT(dev)) {
 933                 I915_WRITE(PCH_PP_CONTROL,
 934                            I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
 935         } else {
 936                 I915_WRITE(PP_CONTROL,
 937                            I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
 938         }
 939         if (!intel_lvds_supported(dev))
 940                 return;
 941
 942         /* Skip init on machines we know falsely report LVDS */
 943         if (dmi_check_system(intel_no_lvds))
 944                 return;
 945
 946         pin = GMBUS_PIN_PANEL;
 947         if (!lvds_is_present_in_vbt(dev, &pin)) {
 948                 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
 949                 return;
 950         }
 951
 952         if (HAS_PCH_SPLIT(dev)) {
 953                 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
 954                         return;
 955                 if (dev_priv->vbt.edp_support) {
 956                         DRM_DEBUG_KMS("disable LVDS for eDP support\n");
 957                         return;
 958                 }
 959         }
 960
 961         lvds_encoder = kzalloc(sizeof(*lvds_encoder), GFP_KERNEL);
 962         if (!lvds_encoder)
 963                 return;
 964
 965         lvds_connector = kzalloc(sizeof(*lvds_connector), GFP_KERNEL);
 966         if (!lvds_connector) {
 967                 kfree(lvds_encoder);
 968                 return;
 969         }
 970
 971         if (intel_connector_init(&lvds_connector->base) < 0) {
 972                 kfree(lvds_connector);
 973                 kfree(lvds_encoder);
 974                 return;
 975         }
 976
 977         lvds_encoder->attached_connector = lvds_connector;
 978
 979         intel_encoder = &lvds_encoder->base;
 980         encoder = &intel_encoder->base;
 981         intel_connector = &lvds_connector->base;
 982         connector = &intel_connector->base;
 983         drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
 984                            DRM_MODE_CONNECTOR_LVDS);
 985
 986         drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
 987                          DRM_MODE_ENCODER_LVDS);
 988
 989         intel_encoder->enable = intel_enable_lvds;
 990         intel_encoder->pre_enable = intel_pre_enable_lvds;
 991         intel_encoder->compute_config = intel_lvds_compute_config;
 992         intel_encoder->disable = intel_disable_lvds;
 993         intel_encoder->get_hw_state = intel_lvds_get_hw_state;
 994         intel_encoder->get_config = intel_lvds_get_config;
 995         intel_connector->get_hw_state = intel_connector_get_hw_state;
 996         intel_connector->unregister = intel_connector_unregister;
 997
 998         intel_connector_attach_encoder(intel_connector, intel_encoder);
 999         intel_encoder->type = INTEL_OUTPUT_LVDS;
1000
1001         intel_encoder->cloneable = 0;
1002         if (HAS_PCH_SPLIT(dev))
1003                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
1004         else if (IS_GEN4(dev))
1005                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
1006         else
1007                 intel_encoder->crtc_mask = (1 << 1);
1008
1009         drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
1010         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
1011         connector->interlace_allowed = false;
1012         connector->doublescan_allowed = false;
1013
1014         if (HAS_PCH_SPLIT(dev)) {
1015                 lvds_encoder->reg = PCH_LVDS;
1016         } else {
1017                 lvds_encoder->reg = LVDS;
1018         }
1019
1020         /* create the scaling mode property */
1021         drm_mode_create_scaling_mode_property(dev);
1022         drm_object_attach_property(&connector->base,
1023                                       dev->mode_config.scaling_mode_property,
1024                                       DRM_MODE_SCALE_ASPECT);
1025         intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
1026         /*
1027          * LVDS discovery:
1028          * 1) check for EDID on DDC
1029          * 2) check for VBT data
1030          * 3) check to see if LVDS is already on
1031          *    if none of the above, no panel
1032          * 4) make sure lid is open
1033          *    if closed, act like it's not there for now
1034          */
1035
1036         /*
1037          * Attempt to get the fixed panel mode from DDC.  Assume that the
1038          * preferred mode is the right one.
1039          */
1040         mutex_lock(&dev->mode_config.mutex);
1041         edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin));
1042         if (edid) {
1043                 if (drm_add_edid_modes(connector, edid)) {
1044                         drm_mode_connector_update_edid_property(connector,
1045                                                                 edid);
1046                 } else {
1047                         kfree(edid);
1048                         edid = ERR_PTR(-EINVAL);
1049                 }
1050         } else {
1051                 edid = ERR_PTR(-ENOENT);
1052         }
1053         lvds_connector->base.edid = edid;
1054
1055         if (IS_ERR_OR_NULL(edid)) {
1056                 /* Didn't get an EDID, so
1057                  * Set wide sync ranges so we get all modes
1058                  * handed to valid_mode for checking
1059                  */
1060                 connector->display_info.min_vfreq = 0;
1061                 connector->display_info.max_vfreq = 200;
1062                 connector->display_info.min_hfreq = 0;
1063                 connector->display_info.max_hfreq = 200;
1064         }
1065
1066         list_for_each_entry(scan, &connector->probed_modes, head) {
1067                 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1068                         DRM_DEBUG_KMS("using preferred mode from EDID: ");
1069                         drm_mode_debug_printmodeline(scan);
1070
1071                         fixed_mode = drm_mode_duplicate(dev, scan);
1072                         if (fixed_mode) {
1073                                 downclock_mode =
1074                                         intel_find_panel_downclock(dev,
1075                                         fixed_mode, connector);
1076                                 if (downclock_mode != NULL &&
1077                                         i915.lvds_downclock) {
1078                                         /* We found the downclock for LVDS. */
1079                                         dev_priv->lvds_downclock_avail = true;
1080                                         dev_priv->lvds_downclock =
1081                                                 downclock_mode->clock;
1082                                         DRM_DEBUG_KMS("LVDS downclock is found"
1083                                         " in EDID. Normal clock %dKhz, "
1084                                         "downclock %dKhz\n",
1085                                         fixed_mode->clock,
1086                                         dev_priv->lvds_downclock);
1087                                 }
1088                                 goto out;
1089                         }
1090                 }
1091         }
1092
1093         /* Failed to get EDID, what about VBT? */
1094         if (dev_priv->vbt.lfp_lvds_vbt_mode) {
1095                 DRM_DEBUG_KMS("using mode from VBT: ");
1096                 drm_mode_debug_printmodeline(dev_priv->vbt.lfp_lvds_vbt_mode);
1097
1098                 fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode);
1099                 if (fixed_mode) {
1100                         fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1101                         goto out;
1102                 }
1103         }
1104
1105         /*
1106          * If we didn't get EDID, try checking if the panel is already turned
1107          * on.  If so, assume that whatever is currently programmed is the
1108          * correct mode.
1109          */
1110
1111         /* Ironlake: FIXME if still fail, not try pipe mode now */
1112         if (HAS_PCH_SPLIT(dev))
1113                 goto failed;
1114
1115         lvds = I915_READ(LVDS);
1116         pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1117         crtc = intel_get_crtc_for_pipe(dev, pipe);
1118
1119         if (crtc && (lvds & LVDS_PORT_EN)) {
1120                 fixed_mode = intel_crtc_mode_get(dev, crtc);
1121                 if (fixed_mode) {
1122                         DRM_DEBUG_KMS("using current (BIOS) mode: ");
1123                         drm_mode_debug_printmodeline(fixed_mode);
1124                         fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1125                         goto out;
1126                 }
1127         }
1128
1129         /* If we still don't have a mode after all that, give up. */
1130         if (!fixed_mode)
1131                 goto failed;
1132
1133 out:
1134         mutex_unlock(&dev->mode_config.mutex);
1135
1136         intel_panel_init(&intel_connector->panel, fixed_mode, downclock_mode);
1137
1138         lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
1139         DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
1140                       lvds_encoder->is_dual_link ? "dual" : "single");
1141
1142         lvds_encoder->a3_power = I915_READ(lvds_encoder->reg) &
1143                                  LVDS_A3_POWER_MASK;
1144
1145 #if 0
1146         lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
1147         if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
1148                 DRM_DEBUG_KMS("lid notifier registration failed\n");
1149                 lvds_connector->lid_notifier.notifier_call = NULL;
1150         }
1151         drm_connector_register(connector);
1152 #endif
1153
1154         intel_panel_setup_backlight(connector, INVALID_PIPE);
1155
1156         return;
1157
1158 failed:
1159         mutex_unlock(&dev->mode_config.mutex);
1160
1161         DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1162         drm_connector_cleanup(connector);
1163         drm_encoder_cleanup(encoder);
1164         kfree(lvds_encoder);
1165         kfree(lvds_connector);
1166         return;
1167 }