1 /******************************************************************************
7 Copyright (c) 1993 Analog Devices Inc. All rights reserved
9 ******************************************************************************/
10 /* Port offsets from base port for Sound Blaster DSP */
11 #define DSP_PORT_CMSD0 0x00 /* C/MS music voice 1-6 data port, write only */
12 #define DSP_PORT_CMSR0 0x01 /* C/MS music voice 1-6 register port, write only */
13 #define DSP_PORT_CMSD1 0x02 /* C/MS music voice 7-12 data port, write only */
14 #define DSP_PORT_CMSR1 0x03 /* C/MS music voice 7-12 register port, write only */
16 #define DSP_PORT_STATUS 0x04 /* DSP Status bits, read only */
17 #define DSP_PORT_CONTROL 0x04 /* DSP Control bits, write only */
18 #define DSP_PORT_DATA_LSB 0x05 /* Read or write LSB of 16 bit data */
21 #define DSP_PORT_RESET 0x06 /* DSP Reset, write only */
22 #define DSP_PORT_07h 0x07 /* reserved port */
24 #define DSP_PORT_FMD0 0x08 /* FM music data/status port, read/write */
25 #define DSP_PORT_FMR0 0x09 /* FM music data/status port, write only */
27 #define DSP_PORT_RDDATA 0x0A /* DSP Read data, read only reading signals DSP */
28 #define DSP_PORT_0Bh 0x0B /* reserved port */
29 #define DSP_PORT_WRDATA 0x0C /* DSP Write data or command, write */
30 #define DSP_PORT_WRBUSY 0x0C /* DSP Write buffer status (bit 7), read */
31 #define DSP_PORT_0Dh 0x0D /* reserved port */
32 #define DSP_PORT_DATAAVAIL 0x0E /* DSP Data available status (bit 7), read only */
33 #define DSP_PORT_INTERFACE 0x0E /* Sets DMA Channel and Interrupt, write only */
34 #define DSP_PORT_0Fh 0x0F /* reserved port (used on Pro cards) */
36 #define ADDR_MASK 0x003f
38 #define INT_MASK 0xffc7
39 #define INT_3_BITS 0x0008
40 #define INT_5_BITS 0x0010
41 #define INT_7_BITS 0x0018
42 #define INT_9_BITS 0x0020
43 #define INT_10_BITS 0x0028
44 #define INT_11_BITS 0x0030
45 #define INT_12_BITS 0x0038
47 #define GAME_BIT 0x0400
48 #define GAME_BIT_MASK 0xfbff
50 #define INT_TEST_BIT 0x0200
51 #define INT_TEST_PASS 0x0100
52 #define INT_TEST_BIT_MASK 0xFDFF
54 #define DMA_MASK 0xfff8
55 #define DMA_0_BITS 0x0001
56 #define DMA_1_BITS 0x0002
57 #define DMA_3_BITS 0x0003
58 #define DMA_5_BITS 0x0004
59 #define DMA_6_BITS 0x0005
60 #define DMA_7_BITS 0x0006
62 #define DMA_TEST_BIT 0x0080
63 #define DMA_TEST_PASS 0x0040
64 #define DMA_TEST_BIT_MASK 0xFF7F
69 #define DSP_FLAG3 0x10
70 #define DSP_FLAG2 0x08
71 #define DSP_FLAG1 0x80
72 #define DSP_FLAG0 0x40
74 #define PSS_CONFIG 0x10
75 #define PSS_WSS_CONFIG 0x12
76 #define SB_CONFIG 0x14
77 #define MIDI_CONFIG 0x18
78 #define CD_CONFIG 0x16
79 #define UART_CONFIG 0x1a
82 #define PSS_STATUS 0x02
83 #define PSS_CONTROL 0x02
84 #define PSS_ID_VERS 0x04
86 #define PSS_FLAG3 0x0800
87 #define PSS_FLAG2 0x0400
88 #define PSS_FLAG1 0x1000
89 #define PSS_FLAG0 0x0800
91 /*_____ WSS defines */
92 #define WSS_BASE_ADDRESS 0x530
93 #define WSS_CONFIG 0x0
94 #define WSS_VERSION 0x03
100 /*_____ SoundPort register addresses */
102 #define SP_LIN_SOURCE_CTRL 0x00
103 #define SP_RIN_SOURCE_CTRL 0x01
104 #define SP_LIN_GAIN_CTRL 0x10
105 #define SP_RIN_GAIN_CTRL 0x11
106 #define SP_LAUX1_CTRL 0x02
107 #define SP_RAUX1_CTRL 0x03
108 #define SP_LAUX2_CTRL 0x04
109 #define SP_RAUX2_CTRL 0x05
110 #define SP_LOUT_CTRL 0x06
111 #define SP_ROUT_CTRL 0x07
112 #define SP_CLK_FORMAT 0x48
113 #define SP_INT_CONF 0x09
114 #define SP_INT_CONF_MCE 0x49
115 #define SP_PIN_CTRL 0x0a
116 #define SP_TEST_INIT 0x0b
117 #define SP_MISC_CTRL 0x0c
118 #define SP_MIX_CTRL 0x0d
119 #define SP_DMA_UCNT 0x0e
120 #define SP_DMA_LCNT 0x0f
122 /*_____ Gain constants */
125 #define GAIN_1_5 0x01
127 #define GAIN_4_5 0x03
129 #define GAIN_7_5 0x05
131 #define GAIN_10_5 0x07
133 #define GAIN_13_5 0x09
135 #define GAIN_16_5 0x0b
137 #define GAIN_19_5 0x0d
139 #define GAIN_22_5 0x0f
142 /*_____ Attenuation constants */
145 #define ATTEN_1_5 0x01
147 #define ATTEN_4_5 0x03
149 #define ATTEN_7_5 0x05
151 #define ATTEN_10_5 0x07
152 #define ATTEN_12 0x08
153 #define ATTEN_13_5 0x09
154 #define ATTEN_15 0x0a
155 #define ATTEN_16_5 0x0b
156 #define ATTEN_18 0x0c
157 #define ATTEN_19_5 0x0d
158 #define ATTEN_21 0x0e
159 #define ATTEN_22_5 0x0f
162 #define PSS_WRITE_EMPTY 0x8000
164 #define CD_POL_MASK 0xFFBF
165 #define CD_POL_BIT 0x0040
169 /******************************************************************************
175 Copyright (c) 1993 Analog Devices Inc. All rights reserved
177 ******************************************************************************/
178 #define SB_WRITE_FULL 0x80
179 #define SB_READ_FULL 0x80
180 #define SB_WRITE_STATUS 0x0C
181 #define SB_READ_STATUS 0x0E
182 #define SB_READ_DATA 0x0A
183 #define SB_WRITE_DATA 0x0C
185 #define PSS_DATA_REG 0x00
186 #define PSS_STATUS_REG 0x02
187 #define PSS_WRITE_EMPTY 0x8000
188 #define PSS_READ_FULL 0x4000
190 /*_____ 1848 Sound Port bit defines */
192 #define SP_IN_INIT 0x80
193 #define MODE_CHANGE_ENABLE 0x40
194 #define MODE_CHANGE_MASK 0xbf
195 #define TRANSFER_DISABLE 0x20
196 #define TRANSFER_DISABLE_MASK 0xdf
197 #define ADDRESS_MASK 0xf0
199 /*_____ Status bits */
200 #define INTERRUPT_STATUS 0x01
201 #define PLAYBACK_READY 0x02
202 #define PLAYBACK_LEFT 0x04
203 /*_____ pbright is not left */
204 #define PLAYBACK_UPPER 0x08
205 /*_____ bplower is not upper */
207 #define SAMPLE_OVERRUN 0x10
208 #define SAMPLE_UNDERRUN 0x10
209 #define CAPTURE_READY 0x20
210 #define CAPTURE_LEFT 0x40
211 /*_____ cpright is not left */
212 #define CAPTURE_UPPER 0x08
213 /*_____ cplower is not upper */
215 /*_____ Input & Output regs bits */
216 #define LINE_INPUT 0x80
217 #define AUX_INPUT 0x40
218 #define MIC_INPUT 0x80
219 #define MIXED_DAC_INPUT 0xC0
220 #define INPUT_GAIN_MASK 0xf0
221 #define INPUT_MIC_GAIN_ENABLE 0x20
222 #define INPUT_MIC_GAIN_MASK 0xdf
223 #define INPUT_SOURCE_MASK 0x3f
224 #define AUX_INPUT_ATTEN_MASK 0xf0
225 #define AUX_INPUT_MUTE 0x80
226 #define AUX_INPUT_MUTE_MASK 0x7f
227 #define OUTPUT_MUTE 0x80
228 #define OUTPUT_MUTE_MASK 0x7f
229 #define OUTPUT_ATTEN_MASK 0xc0
231 /*_____ Clock and Data format reg bits */
232 #define CLOCK_SELECT_MASK 0xfe
233 #define CLOCK_XTAL2 0x01
234 #define CLOCK_XTAL1 0x00
235 #define CLOCK_FREQ_MASK 0xf1
236 #define STEREO_MONO_MASK 0xef
238 #define AUDIO_MONO 0x00
239 #define LINEAR_COMP_MASK 0xdf
241 #define COMPANDED 0x20
242 #define FORMAT_MASK 0xbf
245 #define TWOS_COMP 0x40
248 /*_____ Interface Configuration reg bits */
249 #define PLAYBACK_ENABLE 0x01
250 #define PLAYBACK_ENABLE_MASK 0xfe
251 #define CAPTURE_ENABLE 0x02
252 #define CAPTURE_ENABLE_MASK 0xfd
253 #define SINGLE_DMA 0x04
254 #define SINGLE_DMA_MASK 0xfb
255 #define DUAL_DMA 0x00
256 #define AUTO_CAL_ENABLE 0x08
257 #define AUTO_CAL_DISABLE_MASK 0xf7
258 #define PLAYBACK_PIO_ENABLE 0x40
259 #define PLAYBACK_DMA_MASK 0xbf
260 #define CAPTURE_PIO_ENABLE 0x80
261 #define CAPTURE_DMA_MASK 0x7f
263 /*_____ Pin control bits */
264 #define INTERRUPT_ENABLE 0x02
265 #define INTERRUPT_MASK 0xfd
267 /*_____ Test and init reg bits */
268 #define OVERRANGE_LEFT_MASK 0xfc
269 #define OVERRANGE_RIGHT_MASK 0xf3
270 #define DATA_REQUEST_STATUS 0x10
271 #define AUTO_CAL_IN_PROG 0x20
272 #define PLAYBACK_UNDERRUN 0x40
273 #define CAPTURE_UNDERRUN 0x80
275 /*_____ Miscellaneous Control reg bits */
278 /*_____ Digital Mix Control reg bits */
279 #define DIGITAL_MIX1_MUTE_MASK 0xfe
280 #define MIX_ATTEN_MASK 0x03
282 /*_____ 1848 Sound Port reg defines */
284 #define SP_LEFT_INPUT_CONTROL 0x0
285 #define SP_RIGHT_INPUT_CONTROL 0x1
286 #define SP_LEFT_AUX1_CONTROL 0x2
287 #define SP_RIGHT_AUX1_CONTROL 0x3
288 #define SP_LEFT_AUX2_CONTROL 0x4
289 #define SP_RIGHT_AUX2_CONTROL 0x5
290 #define SP_LEFT_OUTPUT_CONTROL 0x6
291 #define SP_RIGHT_OUTPUT_CONTROL 0x7
292 #define SP_CLOCK_DATA_FORMAT 0x8
293 #define SP_INTERFACE_CONFIG 0x9
294 #define SP_PIN_CONTROL 0xA
295 #define SP_TEST_AND_INIT 0xB
296 #define SP_MISC_INFO 0xC
297 #define SP_DIGITAL_MIX 0xD
298 #define SP_UPPER_BASE_COUNT 0xE
299 #define SP_LOWER_BASE_COUNT 0xF
301 #define HOST_SP_ADDR (0x534)
302 #define HOST_SP_DATA (0x535)
305 /******************************************************************************
311 Copyright (c) 1993 Analog Devices Inc. All rights reserved
313 ******************************************************************************/
314 /*_____ Phillips control SW defines */
316 /*_____ Settings and ranges */
318 #define VOLUME_MIN (-64)
319 #define VOLUME_RANGE 70
320 #define VOLUME_STEP 2
322 #define BASS_MIN (-12)
324 #define BASS_RANGE 27
325 #define TREBLE_MAX 12
326 #define TREBLE_MIN (-12)
327 #define TREBLE_STEP 2
328 #define TREBLE_RANGE 24
330 #define VOLUME_CONSTANT 252
331 #define BASS_CONSTANT 246
332 #define TREBLE_CONSTANT 246
334 /*_____ Software commands */
335 #define SET_MASTER_COMMAND 0x0010
336 #define MASTER_VOLUME_LEFT 0x0000
337 #define MASTER_VOLUME_RIGHT 0x0100
338 #define MASTER_BASS 0x0200
339 #define MASTER_TREBLE 0x0300
340 #define MASTER_SWITCH 0x0800
342 #define STEREO_MODE 0x00ce
343 #define PSEUDO_MODE 0x00d6
344 #define SPATIAL_MODE 0x00de
345 #define MONO_MODE 0x00c6
348 #define PSS_STEREO 0x00ce
349 #define PSS_PSEUDO 0x00d6
350 #define PSS_SPATIAL 0x00de
351 #define PSS_MONO 0x00c6
353 #define PHILLIPS_VOL_MIN -64
354 #define PHILLIPS_VOL_MAX 6
355 #define PHILLIPS_VOL_DELTA 70
356 #define PHILLIPS_VOL_INITIAL -20
357 #define PHILLIPS_VOL_CONSTANT 252
358 #define PHILLIPS_VOL_STEP 2
359 #define PHILLIPS_BASS_MIN -12
360 #define PHILLIPS_BASS_MAX 15
361 #define PHILLIPS_BASS_DELTA 27
362 #define PHILLIPS_BASS_INITIAL 0
363 #define PHILLIPS_BASS_CONSTANT 246
364 #define PHILLIPS_BASS_STEP 2
365 #define PHILLIPS_TREBLE_MIN -12
366 #define PHILLIPS_TREBLE_MAX 12
367 #define PHILLIPS_TREBLE_DELTA 24
368 #define PHILLIPS_TREBLE_INITIAL 0
369 #define PHILLIPS_TREBLE_CONSTANT 246
370 #define PHILLIPS_TREBLE_STEP 2