2 * Copyright (c) 1990 The Regents of the University of California.
3 * Copyright (c) 2008 The DragonFly Project.
6 * This code is derived from software contributed to Berkeley by
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10 * modification, are permitted provided that the following conditions
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17 * 3. Neither the name of the University nor the names of its contributors
18 * may be used to endorse or promote products derived from this software
19 * without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * from: @(#)npx.h 5.3 (Berkeley) 1/18/91
34 * $FreeBSD: src/sys/i386/include/npx.h,v 1.18.2.1 2001/08/15 01:23:52 peter Exp $
38 * 287/387 NPX Coprocessor Data Structures and Constants
45 #ifndef _SYS_STDINT_H_
46 #include <sys/stdint.h>
49 /* Environment information of floating point unit */
51 int32_t en_cw; /* control word (16bits) */
52 int32_t en_sw; /* status word (16bits) */
53 int32_t en_tw; /* tag word (16bits) */
54 int32_t en_fip; /* floating point instruction pointer */
55 uint16_t en_fcs; /* floating code segment selector */
56 uint16_t en_opcode; /* opcode last executed (11 bits ) */
57 int32_t en_foo; /* floating operand offset */
58 int32_t en_fos; /* floating operand segment selector */
61 /* Contents of each x87 floating point accumulator */
66 /* Floating point context (i386 fnsave/frstor) */
68 struct env87 sv_env; /* floating point control/status */
69 struct fpacc87 sv_ac[8]; /* accumulator contents, 0-7 */
70 uint8_t sv_pad0[4]; /* saved status word (now unused) */
72 * Bogus padding for emulators. Emulators should use their own
73 * struct and arrange to store into this struct (ending here)
74 * before it is inspected for ptracing or for core dumps. Some
75 * emulators overwrite the whole struct. We have no good way of
76 * knowing how much padding to leave. Leave just enough for the
77 * GPL emulator's i387_union (176 bytes total).
83 uint16_t en_cw; /* control word (16bits) */
84 uint16_t en_sw; /* status word (16bits) */
85 uint16_t en_tw; /* tag word (16bits) */
86 uint16_t en_opcode; /* opcode last executed (11 bits) */
87 uint32_t en_fip; /* fp instruction pointer */
88 uint16_t en_fcs; /* fp code segment selector */
89 uint16_t en_pad0; /* padding */
90 uint32_t en_foo; /* fp operand offset */
91 uint16_t en_fos; /* fp operand segment selector */
92 uint16_t en_pad1; /* padding */
93 uint32_t en_mxcsr; /* SSE control/status register */
94 uint32_t en_mxcsr_mask; /* valid bits in mxcsr */
98 uint16_t en_cw; /* control word (16bits) */
99 uint16_t en_sw; /* status word (16bits) */
100 uint8_t en_tw; /* tag word (8bits) */
102 uint16_t en_opcode; /* opcode last executed (11 bits ) */
103 uint64_t en_rip; /* fp instruction pointer */
104 uint64_t en_rdp; /* fp operand pointer */
105 uint32_t en_mxcsr; /* SSE control/status register */
106 uint32_t en_mxcsr_mask; /* valid bits in mxcsr */
109 /* Contents of each SSE extended accumulator */
111 uint8_t xmm_bytes[16];
114 /* Contents of the upper 16 bytes of each AVX extended accumulator */
116 uint8_t ymm_bytes[16];
120 * Floating point context. (i386 fxsave/fxrstor)
121 * savexmm is a 512-byte structure
124 struct envxmm sv_env; /* 32 */
126 struct fpacc87 fp_acc; /* -- 10 */
127 uint8_t fp_pad[6]; /* -- 6 */
128 } sv_fp[8]; /* 128 */
129 struct xmmacc sv_xmm[8]; /* 128 */
130 uint8_t sv_pad[224]; /* 224 (padding) */
131 } __attribute__((aligned(16)));
134 * Floating point context. (amd64 fxsave/fxrstor)
135 * savexmm64 is a 512-byte structure
138 struct envxmm64 sv_env; /* 32 */
140 struct fpacc87 fp_acc;
142 } sv_fp[8]; /* 128 */
143 struct xmmacc sv_xmm[8]; /* 128 */
144 uint8_t sv_pad[224]; /* 224 */
145 } __attribute__((aligned(16)));
147 /* xstate_hdr is a 64-byte structure */
150 uint64_t xstate_xcomp_bv;
151 uint8_t xstate_rsrv0[8];
152 uint8_t xstate_rsrv[40];
154 #define XSTATE_XCOMP_BV_COMPACT (1ULL << 63)
156 /* savexmm_xstate is a 320-byte structure (64 + 256) */
157 struct savexmm_xstate {
158 struct xstate_hdr sx_hd;
159 struct ymmacc sx_ymm[16];
162 /* saveymm is a 832-byte structure (i386) */
164 struct envxmm sv_env; /* 32 */
166 struct fpacc87 fp_acc;
168 } sv_fp[8]; /* 128 */
169 struct xmmacc sv_xmm[16]; /* 256 */
170 uint8_t sv_pad[96]; /* 96 */
171 struct savexmm_xstate sv_xstate; /* 320 */
172 } __attribute__((aligned(64)));
174 /* saveymm64 is a 832-byte structure (amd64) */
176 struct envxmm64 sv_env; /* 32 */
178 struct fpacc87 fp_acc;
180 } sv_fp[8]; /* 128 */
181 struct xmmacc sv_xmm[16]; /* 256 */
182 uint8_t sv_pad[96]; /* 96 */
183 struct savexmm_xstate sv_xstate; /* 320 */
184 } __attribute__((aligned(64)));
188 struct savexmm sv_xmm;
189 struct saveymm sv_ymm;
190 struct savexmm64 sv_xmm64;
191 struct saveymm64 sv_ymm64;
192 char sv_savearea[1024]; /* see mcontext_t */
196 * The hardware default control word for i387's and later coprocessors is
201 * all exceptions masked.
203 * We modify the affine mode bit and precision bits in this to give:
205 * affine mode for 287's (if they work at all) (1 in bitfield 1<<12)
206 * 53-bit precision (2 in bitfield 3<<8)
208 * 64-bit precision often gives bad results with high level languages
209 * because it makes the results of calculations depend on whether
210 * intermediate values are stored in memory or in FPU registers.
212 #define __INITIAL_NPXCW__ 0x127F
214 #define __INITIAL_FPUCW__ 0x037F /* used by libm/arch/x86_64/fenv.c */
215 #define __INITIAL_FPUCW_I386__ 0x127F
216 #define __INITIAL_MXCSR__ 0x1F80 /* used by libm/arch/x86_64/fenv.c */
217 #define __INITIAL_MXCSR_MASK__ 0xFFBF
224 extern uint32_t npx_mxcsr_mask;
226 void npxprobemask (void);
229 void npxsave (union savefpu *addr);
232 #endif /* !_CPU_NPX_H_ */