2 * Copyright © 2006-2007 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
31 #include <linux/dmi.h>
32 #include <linux/i2c.h>
33 #include <linux/vga_switcheroo.h>
35 #include <drm/drm_atomic_helper.h>
36 #include <drm/drm_crtc.h>
37 #include <drm/drm_edid.h>
38 #include "intel_drv.h"
39 #include <drm/i915_drm.h>
42 /* Private structure for the integrated LVDS support */
43 struct intel_lvds_connector {
44 struct intel_connector base;
46 struct notifier_block lid_notifier;
49 struct intel_lvds_encoder {
50 struct intel_encoder base;
56 struct intel_lvds_connector *attached_connector;
59 static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
61 return container_of(encoder, struct intel_lvds_encoder, base.base);
64 static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
66 return container_of(connector, struct intel_lvds_connector, base.base);
69 static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
72 struct drm_device *dev = encoder->base.dev;
73 struct drm_i915_private *dev_priv = dev->dev_private;
74 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
75 enum intel_display_power_domain power_domain;
79 power_domain = intel_display_port_power_domain(encoder);
80 if (!intel_display_power_get_if_enabled(dev_priv, power_domain))
85 tmp = I915_READ(lvds_encoder->reg);
87 if (!(tmp & LVDS_PORT_EN))
91 *pipe = PORT_TO_PIPE_CPT(tmp);
93 *pipe = PORT_TO_PIPE(tmp);
98 intel_display_power_put(dev_priv, power_domain);
103 static void intel_lvds_get_config(struct intel_encoder *encoder,
104 struct intel_crtc_state *pipe_config)
106 struct drm_device *dev = encoder->base.dev;
107 struct drm_i915_private *dev_priv = dev->dev_private;
108 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
111 tmp = I915_READ(lvds_encoder->reg);
112 if (tmp & LVDS_HSYNC_POLARITY)
113 flags |= DRM_MODE_FLAG_NHSYNC;
115 flags |= DRM_MODE_FLAG_PHSYNC;
116 if (tmp & LVDS_VSYNC_POLARITY)
117 flags |= DRM_MODE_FLAG_NVSYNC;
119 flags |= DRM_MODE_FLAG_PVSYNC;
121 pipe_config->base.adjusted_mode.flags |= flags;
123 if (INTEL_INFO(dev)->gen < 5)
124 pipe_config->gmch_pfit.lvds_border_bits =
125 tmp & LVDS_BORDER_ENABLE;
127 /* gen2/3 store dither state in pfit control, needs to match */
128 if (INTEL_INFO(dev)->gen < 4) {
129 tmp = I915_READ(PFIT_CONTROL);
131 pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE;
134 pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock;
137 static void intel_pre_enable_lvds(struct intel_encoder *encoder)
139 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
140 struct drm_device *dev = encoder->base.dev;
141 struct drm_i915_private *dev_priv = dev->dev_private;
142 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
143 const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
144 int pipe = crtc->pipe;
147 if (HAS_PCH_SPLIT(dev)) {
148 assert_fdi_rx_pll_disabled(dev_priv, pipe);
149 assert_shared_dpll_disabled(dev_priv,
150 crtc->config->shared_dpll);
152 assert_pll_disabled(dev_priv, pipe);
155 temp = I915_READ(lvds_encoder->reg);
156 temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
158 if (HAS_PCH_CPT(dev)) {
159 temp &= ~PORT_TRANS_SEL_MASK;
160 temp |= PORT_TRANS_SEL_CPT(pipe);
163 temp |= LVDS_PIPEB_SELECT;
165 temp &= ~LVDS_PIPEB_SELECT;
169 /* set the corresponsding LVDS_BORDER bit */
170 temp &= ~LVDS_BORDER_ENABLE;
171 temp |= crtc->config->gmch_pfit.lvds_border_bits;
172 /* Set the B0-B3 data pairs corresponding to whether we're going to
173 * set the DPLLs for dual-channel mode or not.
175 if (lvds_encoder->is_dual_link)
176 temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
178 temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
180 /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
181 * appropriately here, but we need to look more thoroughly into how
182 * panels behave in the two modes. For now, let's just maintain the
183 * value we got from the BIOS.
185 temp &= ~LVDS_A3_POWER_MASK;
186 temp |= lvds_encoder->a3_power;
188 /* Set the dithering flag on LVDS as needed, note that there is no
189 * special lvds dither control bit on pch-split platforms, dithering is
190 * only controlled through the PIPECONF reg. */
191 if (IS_GEN4(dev_priv)) {
192 /* Bspec wording suggests that LVDS port dithering only exists
193 * for 18bpp panels. */
194 if (crtc->config->dither && crtc->config->pipe_bpp == 18)
195 temp |= LVDS_ENABLE_DITHER;
197 temp &= ~LVDS_ENABLE_DITHER;
199 temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
200 if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
201 temp |= LVDS_HSYNC_POLARITY;
202 if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
203 temp |= LVDS_VSYNC_POLARITY;
205 I915_WRITE(lvds_encoder->reg, temp);
209 * Sets the power state for the panel.
211 static void intel_enable_lvds(struct intel_encoder *encoder)
213 struct drm_device *dev = encoder->base.dev;
214 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
215 struct intel_connector *intel_connector =
216 &lvds_encoder->attached_connector->base;
217 struct drm_i915_private *dev_priv = dev->dev_private;
218 i915_reg_t ctl_reg, stat_reg;
220 if (HAS_PCH_SPLIT(dev)) {
221 ctl_reg = PCH_PP_CONTROL;
222 stat_reg = PCH_PP_STATUS;
224 ctl_reg = PP_CONTROL;
225 stat_reg = PP_STATUS;
228 I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
230 I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
231 POSTING_READ(lvds_encoder->reg);
232 if (intel_wait_for_register(dev_priv, stat_reg, PP_ON, PP_ON, 1000))
233 DRM_ERROR("timed out waiting for panel to power on\n");
235 intel_panel_enable_backlight(intel_connector);
238 static void intel_disable_lvds(struct intel_encoder *encoder)
240 struct drm_device *dev = encoder->base.dev;
241 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
242 struct drm_i915_private *dev_priv = dev->dev_private;
243 i915_reg_t ctl_reg, stat_reg;
245 if (HAS_PCH_SPLIT(dev)) {
246 ctl_reg = PCH_PP_CONTROL;
247 stat_reg = PCH_PP_STATUS;
249 ctl_reg = PP_CONTROL;
250 stat_reg = PP_STATUS;
253 I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
254 if (intel_wait_for_register(dev_priv, stat_reg, PP_ON, 0, 1000))
255 DRM_ERROR("timed out waiting for panel to power off\n");
257 I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
258 POSTING_READ(lvds_encoder->reg);
261 static void gmch_disable_lvds(struct intel_encoder *encoder)
263 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
264 struct intel_connector *intel_connector =
265 &lvds_encoder->attached_connector->base;
267 intel_panel_disable_backlight(intel_connector);
269 intel_disable_lvds(encoder);
272 static void pch_disable_lvds(struct intel_encoder *encoder)
274 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
275 struct intel_connector *intel_connector =
276 &lvds_encoder->attached_connector->base;
278 intel_panel_disable_backlight(intel_connector);
281 static void pch_post_disable_lvds(struct intel_encoder *encoder)
283 intel_disable_lvds(encoder);
286 static enum drm_mode_status
287 intel_lvds_mode_valid(struct drm_connector *connector,
288 struct drm_display_mode *mode)
290 struct intel_connector *intel_connector = to_intel_connector(connector);
291 struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
292 int max_pixclk = to_i915(connector->dev)->max_dotclk_freq;
294 if (mode->hdisplay > fixed_mode->hdisplay)
296 if (mode->vdisplay > fixed_mode->vdisplay)
298 if (fixed_mode->clock > max_pixclk)
299 return MODE_CLOCK_HIGH;
304 static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
305 struct intel_crtc_state *pipe_config)
307 struct drm_device *dev = intel_encoder->base.dev;
308 struct intel_lvds_encoder *lvds_encoder =
309 to_lvds_encoder(&intel_encoder->base);
310 struct intel_connector *intel_connector =
311 &lvds_encoder->attached_connector->base;
312 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
313 struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);
314 unsigned int lvds_bpp;
316 /* Should never happen!! */
317 if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
318 DRM_ERROR("Can't support LVDS on pipe A\n");
322 if (lvds_encoder->a3_power == LVDS_A3_POWER_UP)
327 if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) {
328 DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
329 pipe_config->pipe_bpp, lvds_bpp);
330 pipe_config->pipe_bpp = lvds_bpp;
334 * We have timings from the BIOS for the panel, put them in
335 * to the adjusted mode. The CRTC will be set up for this mode,
336 * with the panel scaling set up to source from the H/VDisplay
337 * of the original mode.
339 intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
342 if (HAS_PCH_SPLIT(dev)) {
343 pipe_config->has_pch_encoder = true;
345 intel_pch_panel_fitting(intel_crtc, pipe_config,
346 intel_connector->panel.fitting_mode);
348 intel_gmch_panel_fitting(intel_crtc, pipe_config,
349 intel_connector->panel.fitting_mode);
354 * XXX: It would be nice to support lower refresh rates on the
355 * panels to reduce power consumption, and perhaps match the
356 * user's requested refresh rate.
363 * Detect the LVDS connection.
365 * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
366 * connected and closed means disconnected. We also send hotplug events as
367 * needed, using lid status notification from the input layer.
369 static enum drm_connector_status
370 intel_lvds_detect(struct drm_connector *connector, bool force)
372 struct drm_device *dev = connector->dev;
373 enum drm_connector_status status;
375 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
376 connector->base.id, connector->name);
378 status = intel_panel_detect(dev);
379 if (status != connector_status_unknown)
382 return connector_status_connected;
386 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
388 static int intel_lvds_get_modes(struct drm_connector *connector)
390 struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
391 struct drm_device *dev = connector->dev;
392 struct drm_display_mode *mode;
394 /* use cached edid if we have one */
395 if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
396 return drm_add_edid_modes(connector, lvds_connector->base.edid);
398 mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
402 drm_mode_probed_add(connector, mode);
407 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
409 DRM_INFO("Skipping forced modeset for %s\n", id->ident);
413 /* The GPU hangs up on these systems if modeset is performed on LID open */
414 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
416 .callback = intel_no_modeset_on_lid_dmi_callback,
417 .ident = "Toshiba Tecra A11",
419 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
420 DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
424 { } /* terminating entry */
430 * Lid events. Note the use of 'modeset':
431 * - we set it to MODESET_ON_LID_OPEN on lid close,
432 * and set it to MODESET_DONE on open
433 * - we use it as a "only once" bit (ie we ignore
434 * duplicate events where it was already properly set)
435 * - the suspend/resume paths will set it to
436 * MODESET_SUSPENDED and ignore the lid open event,
437 * because they restore the mode ("lid open").
439 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
442 struct intel_lvds_connector *lvds_connector =
443 container_of(nb, struct intel_lvds_connector, lid_notifier);
444 struct drm_connector *connector = &lvds_connector->base.base;
445 struct drm_device *dev = connector->dev;
446 struct drm_i915_private *dev_priv = dev->dev_private;
448 if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
451 mutex_lock(&dev_priv->modeset_restore_lock);
452 if (dev_priv->modeset_restore == MODESET_SUSPENDED)
455 * check and update the status of LVDS connector after receiving
456 * the LID nofication event.
458 connector->status = connector->funcs->detect(connector, false);
460 /* Don't force modeset on machines where it causes a GPU lockup */
461 if (dmi_check_system(intel_no_modeset_on_lid))
463 if (!acpi_lid_open()) {
464 /* do modeset on next lid open event */
465 dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
469 if (dev_priv->modeset_restore == MODESET_DONE)
473 * Some old platform's BIOS love to wreak havoc while the lid is closed.
474 * We try to detect this here and undo any damage. The split for PCH
475 * platforms is rather conservative and a bit arbitrary expect that on
476 * those platforms VGA disabling requires actual legacy VGA I/O access,
477 * and as part of the cleanup in the hw state restore we also redisable
480 if (!HAS_PCH_SPLIT(dev))
481 intel_display_resume(dev);
483 dev_priv->modeset_restore = MODESET_DONE;
486 mutex_unlock(&dev_priv->modeset_restore_lock);
492 * intel_lvds_destroy - unregister and free LVDS structures
493 * @connector: connector to free
495 * Unregister the DDC bus for this connector then free the driver private
498 static void intel_lvds_destroy(struct drm_connector *connector)
500 struct intel_lvds_connector *lvds_connector =
501 to_lvds_connector(connector);
504 if (lvds_connector->lid_notifier.notifier_call)
505 acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
508 if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
509 kfree(lvds_connector->base.edid);
511 intel_panel_fini(&lvds_connector->base.panel);
513 drm_connector_cleanup(connector);
517 static int intel_lvds_set_property(struct drm_connector *connector,
518 struct drm_property *property,
521 struct intel_connector *intel_connector = to_intel_connector(connector);
522 struct drm_device *dev = connector->dev;
524 if (property == dev->mode_config.scaling_mode_property) {
525 struct drm_crtc *crtc;
527 if (value == DRM_MODE_SCALE_NONE) {
528 DRM_DEBUG_KMS("no scaling not supported\n");
532 if (intel_connector->panel.fitting_mode == value) {
533 /* the LVDS scaling property is not changed */
536 intel_connector->panel.fitting_mode = value;
538 crtc = intel_attached_encoder(connector)->base.crtc;
539 if (crtc && crtc->state->enable) {
541 * If the CRTC is enabled, the display will be changed
542 * according to the new panel fitting mode.
544 intel_crtc_restore_mode(crtc);
551 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
552 .get_modes = intel_lvds_get_modes,
553 .mode_valid = intel_lvds_mode_valid,
556 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
557 .dpms = drm_atomic_helper_connector_dpms,
558 .detect = intel_lvds_detect,
559 .fill_modes = drm_helper_probe_single_connector_modes,
560 .set_property = intel_lvds_set_property,
561 .atomic_get_property = intel_connector_atomic_get_property,
562 .late_register = intel_connector_register,
563 .early_unregister = intel_connector_unregister,
564 .destroy = intel_lvds_destroy,
565 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
566 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
569 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
570 .destroy = intel_encoder_destroy,
573 static int intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
575 DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
579 /* These systems claim to have LVDS, but really don't */
580 static const struct dmi_system_id intel_no_lvds[] = {
582 .callback = intel_no_lvds_dmi_callback,
583 .ident = "Apple Mac Mini (Core series)",
585 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
586 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
590 .callback = intel_no_lvds_dmi_callback,
591 .ident = "Apple Mac Mini (Core 2 series)",
593 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
594 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
598 .callback = intel_no_lvds_dmi_callback,
599 .ident = "MSI IM-945GSE-A",
601 DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
602 DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
606 .callback = intel_no_lvds_dmi_callback,
607 .ident = "Dell Studio Hybrid",
609 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
610 DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
614 .callback = intel_no_lvds_dmi_callback,
615 .ident = "Dell OptiPlex FX170",
617 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
618 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
622 .callback = intel_no_lvds_dmi_callback,
623 .ident = "AOpen Mini PC",
625 DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
626 DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
630 .callback = intel_no_lvds_dmi_callback,
631 .ident = "AOpen Mini PC MP915",
633 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
634 DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
638 .callback = intel_no_lvds_dmi_callback,
639 .ident = "AOpen i915GMm-HFS",
641 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
642 DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
646 .callback = intel_no_lvds_dmi_callback,
647 .ident = "AOpen i45GMx-I",
649 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
650 DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
654 .callback = intel_no_lvds_dmi_callback,
655 .ident = "Aopen i945GTt-VFA",
657 DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
661 .callback = intel_no_lvds_dmi_callback,
662 .ident = "Clientron U800",
664 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
665 DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
669 .callback = intel_no_lvds_dmi_callback,
670 .ident = "Clientron E830",
672 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
673 DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
677 .callback = intel_no_lvds_dmi_callback,
678 .ident = "Asus EeeBox PC EB1007",
680 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
681 DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
685 .callback = intel_no_lvds_dmi_callback,
686 .ident = "Asus AT5NM10T-I",
688 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
689 DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
693 .callback = intel_no_lvds_dmi_callback,
694 .ident = "Hewlett-Packard HP t5740",
696 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
697 DMI_MATCH(DMI_PRODUCT_NAME, " t5740"),
701 .callback = intel_no_lvds_dmi_callback,
702 .ident = "Hewlett-Packard t5745",
704 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
705 DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
709 .callback = intel_no_lvds_dmi_callback,
710 .ident = "Hewlett-Packard st5747",
712 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
713 DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
717 .callback = intel_no_lvds_dmi_callback,
718 .ident = "MSI Wind Box DC500",
720 DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
721 DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
725 .callback = intel_no_lvds_dmi_callback,
726 .ident = "Gigabyte GA-D525TUD",
728 DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
729 DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
733 .callback = intel_no_lvds_dmi_callback,
734 .ident = "Supermicro X7SPA-H",
736 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
737 DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
741 .callback = intel_no_lvds_dmi_callback,
742 .ident = "Fujitsu Esprimo Q900",
744 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
745 DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
749 .callback = intel_no_lvds_dmi_callback,
750 .ident = "Intel D410PT",
752 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
753 DMI_MATCH(DMI_BOARD_NAME, "D410PT"),
757 .callback = intel_no_lvds_dmi_callback,
758 .ident = "Intel D425KT",
760 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
761 DMI_EXACT_MATCH(DMI_BOARD_NAME, "D425KT"),
765 .callback = intel_no_lvds_dmi_callback,
766 .ident = "Intel D510MO",
768 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
769 DMI_EXACT_MATCH(DMI_BOARD_NAME, "D510MO"),
773 .callback = intel_no_lvds_dmi_callback,
774 .ident = "Intel D525MW",
776 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
777 DMI_EXACT_MATCH(DMI_BOARD_NAME, "D525MW"),
781 { } /* terminating entry */
784 static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
786 DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
790 static const struct dmi_system_id intel_dual_link_lvds[] = {
792 .callback = intel_dual_link_lvds_callback,
793 .ident = "Apple MacBook Pro 15\" (2010)",
795 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
796 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro6,2"),
800 .callback = intel_dual_link_lvds_callback,
801 .ident = "Apple MacBook Pro 15\" (2011)",
803 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
804 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
808 .callback = intel_dual_link_lvds_callback,
809 .ident = "Apple MacBook Pro 15\" (2012)",
811 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
812 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro9,1"),
815 { } /* terminating entry */
818 struct intel_encoder *intel_get_lvds_encoder(struct drm_device *dev)
820 struct intel_encoder *intel_encoder;
822 for_each_intel_encoder(dev, intel_encoder)
823 if (intel_encoder->type == INTEL_OUTPUT_LVDS)
824 return intel_encoder;
829 bool intel_is_dual_link_lvds(struct drm_device *dev)
831 struct intel_encoder *encoder = intel_get_lvds_encoder(dev);
833 return encoder && to_lvds_encoder(&encoder->base)->is_dual_link;
836 static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
838 struct drm_device *dev = lvds_encoder->base.base.dev;
840 struct drm_i915_private *dev_priv = dev->dev_private;
842 /* use the module option value if specified */
843 if (i915.lvds_channel_mode > 0)
844 return i915.lvds_channel_mode == 2;
846 /* single channel LVDS is limited to 112 MHz */
847 if (lvds_encoder->attached_connector->base.panel.fixed_mode->clock
851 if (dmi_check_system(intel_dual_link_lvds))
854 /* BIOS should set the proper LVDS register value at boot, but
855 * in reality, it doesn't set the value when the lid is closed;
856 * we need to check "the value to be set" in VBT when LVDS
857 * register is uninitialized.
859 val = I915_READ(lvds_encoder->reg);
860 if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
861 val = dev_priv->vbt.bios_lvds_val;
863 return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
866 static bool intel_lvds_supported(struct drm_device *dev)
868 /* With the introduction of the PCH we gained a dedicated
869 * LVDS presence pin, use it. */
870 if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
873 /* Otherwise LVDS was only attached to mobile products,
874 * except for the inglorious 830gm */
875 if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
882 * intel_lvds_init - setup LVDS connectors on this device
885 * Create the connector, register the LVDS DDC bus, and try to figure out what
886 * modes we can display on the LVDS panel (if present).
888 void intel_lvds_init(struct drm_device *dev)
890 struct drm_i915_private *dev_priv = dev->dev_private;
891 struct intel_lvds_encoder *lvds_encoder;
892 struct intel_encoder *intel_encoder;
893 struct intel_lvds_connector *lvds_connector;
894 struct intel_connector *intel_connector;
895 struct drm_connector *connector;
896 struct drm_encoder *encoder;
897 struct drm_display_mode *scan; /* *modes, *bios_mode; */
898 struct drm_display_mode *fixed_mode = NULL;
899 struct drm_display_mode *downclock_mode = NULL;
901 struct drm_crtc *crtc;
908 * Unlock registers and just leave them unlocked. Do this before
909 * checking quirk lists to avoid bogus WARNINGs.
911 if (HAS_PCH_SPLIT(dev)) {
912 I915_WRITE(PCH_PP_CONTROL,
913 I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
914 } else if (INTEL_INFO(dev_priv)->gen < 5) {
915 I915_WRITE(PP_CONTROL,
916 I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
918 if (!intel_lvds_supported(dev))
921 /* Skip init on machines we know falsely report LVDS */
922 if (dmi_check_system(intel_no_lvds))
925 if (HAS_PCH_SPLIT(dev))
930 lvds = I915_READ(lvds_reg);
932 if (HAS_PCH_SPLIT(dev)) {
933 if ((lvds & LVDS_DETECTED) == 0)
935 if (dev_priv->vbt.edp.support) {
936 DRM_DEBUG_KMS("disable LVDS for eDP support\n");
941 pin = GMBUS_PIN_PANEL;
942 if (!intel_bios_is_lvds_present(dev_priv, &pin)) {
943 if ((lvds & LVDS_PORT_EN) == 0) {
944 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
947 DRM_DEBUG_KMS("LVDS is not present in VBT, but enabled anyway\n");
950 /* Set the Panel Power On/Off timings if uninitialized. */
951 if (INTEL_INFO(dev_priv)->gen < 5 &&
952 I915_READ(PP_ON_DELAYS) == 0 && I915_READ(PP_OFF_DELAYS) == 0) {
953 /* Set T2 to 40ms and T5 to 200ms */
954 I915_WRITE(PP_ON_DELAYS, 0x019007d0);
956 /* Set T3 to 35ms and Tx to 200ms */
957 I915_WRITE(PP_OFF_DELAYS, 0x015e07d0);
959 DRM_DEBUG_KMS("Panel power timings uninitialized, setting defaults\n");
962 lvds_encoder = kzalloc(sizeof(*lvds_encoder), GFP_KERNEL);
966 lvds_connector = kzalloc(sizeof(*lvds_connector), GFP_KERNEL);
967 if (!lvds_connector) {
972 if (intel_connector_init(&lvds_connector->base) < 0) {
973 kfree(lvds_connector);
978 lvds_encoder->attached_connector = lvds_connector;
980 intel_encoder = &lvds_encoder->base;
981 encoder = &intel_encoder->base;
982 intel_connector = &lvds_connector->base;
983 connector = &intel_connector->base;
984 drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
985 DRM_MODE_CONNECTOR_LVDS);
987 drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
988 DRM_MODE_ENCODER_LVDS, "LVDS");
990 intel_encoder->enable = intel_enable_lvds;
991 intel_encoder->pre_enable = intel_pre_enable_lvds;
992 intel_encoder->compute_config = intel_lvds_compute_config;
993 if (HAS_PCH_SPLIT(dev_priv)) {
994 intel_encoder->disable = pch_disable_lvds;
995 intel_encoder->post_disable = pch_post_disable_lvds;
997 intel_encoder->disable = gmch_disable_lvds;
999 intel_encoder->get_hw_state = intel_lvds_get_hw_state;
1000 intel_encoder->get_config = intel_lvds_get_config;
1001 intel_connector->get_hw_state = intel_connector_get_hw_state;
1003 intel_connector_attach_encoder(intel_connector, intel_encoder);
1004 intel_encoder->type = INTEL_OUTPUT_LVDS;
1006 intel_encoder->cloneable = 0;
1007 if (HAS_PCH_SPLIT(dev))
1008 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
1009 else if (IS_GEN4(dev))
1010 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
1012 intel_encoder->crtc_mask = (1 << 1);
1014 drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
1015 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
1016 connector->interlace_allowed = false;
1017 connector->doublescan_allowed = false;
1019 lvds_encoder->reg = lvds_reg;
1021 /* create the scaling mode property */
1022 drm_mode_create_scaling_mode_property(dev);
1023 drm_object_attach_property(&connector->base,
1024 dev->mode_config.scaling_mode_property,
1025 DRM_MODE_SCALE_ASPECT);
1026 intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
1029 * 1) check for EDID on DDC
1030 * 2) check for VBT data
1031 * 3) check to see if LVDS is already on
1032 * if none of the above, no panel
1033 * 4) make sure lid is open
1034 * if closed, act like it's not there for now
1038 * Attempt to get the fixed panel mode from DDC. Assume that the
1039 * preferred mode is the right one.
1041 mutex_lock(&dev->mode_config.mutex);
1042 if (vga_switcheroo_handler_flags() & VGA_SWITCHEROO_CAN_SWITCH_DDC)
1043 edid = drm_get_edid_switcheroo(connector,
1044 intel_gmbus_get_adapter(dev_priv, pin));
1046 edid = drm_get_edid(connector,
1047 intel_gmbus_get_adapter(dev_priv, pin));
1049 if (drm_add_edid_modes(connector, edid)) {
1050 drm_mode_connector_update_edid_property(connector,
1054 edid = ERR_PTR(-EINVAL);
1057 edid = ERR_PTR(-ENOENT);
1059 lvds_connector->base.edid = edid;
1061 list_for_each_entry(scan, &connector->probed_modes, head) {
1062 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1063 DRM_DEBUG_KMS("using preferred mode from EDID: ");
1064 drm_mode_debug_printmodeline(scan);
1066 fixed_mode = drm_mode_duplicate(dev, scan);
1072 /* Failed to get EDID, what about VBT? */
1073 if (dev_priv->vbt.lfp_lvds_vbt_mode) {
1074 DRM_DEBUG_KMS("using mode from VBT: ");
1075 drm_mode_debug_printmodeline(dev_priv->vbt.lfp_lvds_vbt_mode);
1077 fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode);
1079 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1080 connector->display_info.width_mm = fixed_mode->width_mm;
1081 connector->display_info.height_mm = fixed_mode->height_mm;
1087 * If we didn't get EDID, try checking if the panel is already turned
1088 * on. If so, assume that whatever is currently programmed is the
1092 /* Ironlake: FIXME if still fail, not try pipe mode now */
1093 if (HAS_PCH_SPLIT(dev))
1096 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1097 crtc = intel_get_crtc_for_pipe(dev, pipe);
1099 if (crtc && (lvds & LVDS_PORT_EN)) {
1100 fixed_mode = intel_crtc_mode_get(dev, crtc);
1102 DRM_DEBUG_KMS("using current (BIOS) mode: ");
1103 drm_mode_debug_printmodeline(fixed_mode);
1104 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1109 /* If we still don't have a mode after all that, give up. */
1114 mutex_unlock(&dev->mode_config.mutex);
1116 intel_panel_init(&intel_connector->panel, fixed_mode, downclock_mode);
1117 intel_panel_setup_backlight(connector, INVALID_PIPE);
1119 lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
1120 DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
1121 lvds_encoder->is_dual_link ? "dual" : "single");
1123 lvds_encoder->a3_power = lvds & LVDS_A3_POWER_MASK;
1126 lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
1127 if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
1128 DRM_DEBUG_KMS("lid notifier registration failed\n");
1129 lvds_connector->lid_notifier.notifier_call = NULL;
1131 drm_connector_register(connector);
1137 mutex_unlock(&dev->mode_config.mutex);
1139 DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1140 drm_connector_cleanup(connector);
1141 drm_encoder_cleanup(encoder);
1142 kfree(lvds_encoder);
1143 kfree(lvds_connector);