sys/dev/disk/trm/trm.c

   1 /*
   2  *      O.S   : FreeBSD CAM
   3  *      FILE NAME  : trm.c
   4  *           BY    : C.L. Huang         (ching@tekram.com.tw)
   5  *                   Erich Chen     (erich@tekram.com.tw)
   6  *      Description: Device Driver for Tekram SCSI adapters
   7  *                   DC395U/UW/F ,DC315/U(TRM-S1040)
   8  *                   DC395U2D/U2W(TRM-S2080)
   9  *                   PCI SCSI Bus Master Host Adapter
  10  *                   (SCSI chip set used Tekram ASIC TRM-S1040,TRM-S2080)
  11  */
  12
  13 /*
  14  *      HISTORY:
  15  *
  16  *      REV#    DATE    NAME            DESCRIPTION
  17  *  1.05   05/01/1999  ERICH CHEN  First released for 3.x.x (CAM)
  18  *  1.06   07/29/1999  ERICH CHEN  Modify for NEW PCI
  19  *  1.07   12/12/1999  ERICH CHEN  Modify for 3.3.x ,DCB no free
  20  *  1.08   06/12/2000  ERICH CHEN  Modify for 4.x.x
  21  *  1.09   11/03/2000  ERICH CHEN  Modify for 4.1.R ,new sim
  22  *  1.10   10/10/2001  Oscar Feng  Fixed CAM rescan hang up bug.
  23  *  1.11   10/13/2001  Oscar Feng  Fixed wrong Async speed display bug.
  24  */
  25
  26 /*-
  27  * (C)Copyright 1995-2001 Tekram Technology Co.,Ltd.
  28  *
  29  * Redistribution and use in source and binary forms, with or without
  30  * modification, are permitted provided that the following conditions
  31  * are met:
  32  * 1. Redistributions of source code must retain the above copyright
  33  *    notice, this list of conditions and the following disclaimer.
  34  * 2. Redistributions in binary form must reproduce the above copyright
  35  *    notice, this list of conditions and the following disclaimer in the
  36  *    documentation and/or other materials provided with the distribution.
  37  * 3. The name of the author may not be used to endorse or promote products
  38  *    derived from this software without specific prior written permission.
  39  *
  40  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  41  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  42  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  43  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  44  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  45  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  46  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  47  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  48  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  49  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  50  *
  51  * $FreeBSD: src/sys/dev/trm/trm.c,v 1.2.2.2 2002/12/19 20:34:45 cognet Exp $
  52  * $DragonFly: src/sys/dev/disk/trm/trm.c,v 1.18 2008/05/18 20:30:22 pavalos Exp $
  53  */
  54
  55 /*
  56  * Imported into FreeBSD source repository, and updated to compile under
  57  * FreeBSD-3.0-DEVELOPMENT, by Stefan Esser <se@FreeBSD.Org>, 1996-12-17
  58  */
  59
  60 /*
  61  * Updated to compile under FreeBSD 5.0-CURRENT by Olivier Houchard
  62  * <doginou@ci0.org>, 2002-03-04
  63  */
  64
  65 #include <sys/param.h>
  66
  67 #include <sys/systm.h>
  68 #include <sys/malloc.h>
  69 #include <sys/queue.h>
  70 #if defined(__FreeBSD__) && __FreeBSD_version >= 500000
  71 #include <sys/bio.h>
  72 #endif
  73 #include <sys/buf.h>
  74 #include <sys/bus.h>
  75 #include <sys/kernel.h>
  76 #include <sys/module.h>
  77 #include <sys/thread2.h>
  78
  79 #include <vm/vm.h>
  80 #include <vm/pmap.h>
  81
  82 #include <bus/pci/pcivar.h>
  83 #include <bus/pci/pcireg.h>
  84 #include <sys/rman.h>
  85
  86 #include <bus/cam/cam.h>
  87 #include <bus/cam/cam_ccb.h>
  88 #include <bus/cam/cam_sim.h>
  89 #include <bus/cam/cam_xpt_sim.h>
  90 #include <bus/cam/cam_debug.h>
  91
  92 #include <bus/cam/scsi/scsi_all.h>
  93 #include <bus/cam/scsi/scsi_message.h>
  94
  95 #include "trm.h"
  96
  97 #define trm_reg_read8(reg)      bus_space_read_1(pACB->tag, pACB->bsh, reg)
  98 #define trm_reg_read16(reg)     bus_space_read_2(pACB->tag, pACB->bsh, reg)
  99 #define trm_reg_read32(reg)     bus_space_read_4(pACB->tag, pACB->bsh, reg)
 100 #define trm_reg_write8(value,reg)       bus_space_write_1(pACB->tag, pACB->bsh,\
 101                 reg, value)
 102 #define trm_reg_write16(value,reg)      bus_space_write_2(pACB->tag, pACB->bsh,\
 103                 reg, value)
 104 #define trm_reg_write32(value,reg)      bus_space_write_4(pACB->tag, pACB->bsh,\
 105                 reg, value)
 106
 107 #define PCI_Vendor_ID_TEKRAM    0x1DE1
 108 #define PCI_Device_ID_TRM_S1040 0x0391
 109 #define PCI_DEVICEID_TRMS1040   0x03911DE1
 110 #define PCI_DEVICEID_TRMS2080   0x03921DE1
 111
 112 #ifdef trm_DEBUG1
 113 #define TRM_DPRINTF(fmt, arg...) kprintf("trm: " fmt, ##arg)
 114 #else
 115 #define TRM_DPRINTF(fmt, arg...) {}
 116 #endif /* TRM_DEBUG */
 117
 118 static void     trm_check_eeprom(PNVRAMTYPE pEEpromBuf,PACB pACB);
 119 static void     NVRAM_trm_read_all(PNVRAMTYPE pEEpromBuf,PACB pACB);
 120 static u_int8_t NVRAM_trm_get_data(PACB pACB, u_int8_t bAddr);
 121 static void     NVRAM_trm_write_all(PNVRAMTYPE pEEpromBuf,PACB pACB);
 122 static void     NVRAM_trm_set_data(PACB pACB, u_int8_t bAddr, u_int8_t bData);
 123 static void     NVRAM_trm_write_cmd(PACB pACB, u_int8_t bCmd, u_int8_t bAddr);
 124 static void     NVRAM_trm_wait_30us(PACB pACB);
 125
 126 static void     trm_Interrupt(void *vpACB);
 127 static void     trm_DataOutPhase0(PACB pACB, PSRB pSRB,
 128                                          u_int16_t * pscsi_status);
 129 static void     trm_DataInPhase0(PACB pACB, PSRB pSRB,
 130                                         u_int16_t * pscsi_status);
 131 static void     trm_CommandPhase0(PACB pACB, PSRB pSRB,
 132                                          u_int16_t * pscsi_status);
 133 static void     trm_StatusPhase0(PACB pACB, PSRB pSRB,
 134                                         u_int16_t * pscsi_status);
 135 static void     trm_MsgOutPhase0(PACB pACB, PSRB pSRB,
 136                                         u_int16_t * pscsi_status);
 137 static void     trm_MsgInPhase0(PACB pACB, PSRB pSRB,
 138                                         u_int16_t * pscsi_status);
 139 static void     trm_DataOutPhase1(PACB pACB, PSRB pSRB,
 140                                          u_int16_t * pscsi_status);
 141 static void     trm_DataInPhase1(PACB pACB, PSRB pSRB,
 142                                         u_int16_t * pscsi_status);
 143 static void     trm_CommandPhase1(PACB pACB, PSRB pSRB,
 144                                          u_int16_t * pscsi_status);
 145 static void     trm_StatusPhase1(PACB pACB, PSRB pSRB,
 146                                         u_int16_t * pscsi_status);
 147 static void     trm_MsgOutPhase1(PACB pACB, PSRB pSRB,
 148                                         u_int16_t * pscsi_status);
 149 static void     trm_MsgInPhase1(PACB pACB, PSRB pSRB,
 150                                         u_int16_t * pscsi_status);
 151 static void     trm_Nop0(PACB pACB, PSRB pSRB, u_int16_t * pscsi_status);
 152 static void     trm_Nop1(PACB pACB, PSRB pSRB, u_int16_t * pscsi_status);
 153 static void     trm_SetXferRate(PACB pACB, PSRB pSRB,PDCB pDCB);
 154 static void     trm_DataIO_transfer(PACB pACB, PSRB pSRB, u_int16_t ioDir);
 155 static void     trm_Disconnect(PACB pACB);
 156 static void     trm_Reselect(PACB pACB);
 157 static void     trm_SRBdone(PACB pACB, PDCB pDCB, PSRB pSRB);
 158 static void     trm_DoingSRB_Done(PACB pACB);
 159 static void     trm_ScsiRstDetect(PACB pACB);
 160 static void     trm_ResetSCSIBus(PACB pACB);
 161 static void     trm_RequestSense(PACB pACB, PDCB pDCB, PSRB pSRB);
 162 static void     trm_EnableMsgOutAbort2(PACB pACB, PSRB pSRB);
 163 static void     trm_EnableMsgOutAbort1(PACB pACB, PSRB pSRB);
 164 static void     trm_SendSRB(PACB pACB, PSRB pSRB);
 165 static int      trm_probe(device_t tag);
 166 static int      trm_attach(device_t tag);
 167 static void     trm_reset(PACB pACB);
 168
 169 static u_int16_t        trm_StartSCSI(PACB pACB, PDCB pDCB, PSRB pSRB);
 170
 171 static int      trm_initAdapter(PACB pACB, u_int16_t unit);
 172 static void     trm_initDCB(PACB pACB, PDCB pDCB, u_int16_t unit,
 173                                         u_int32_t i, u_int32_t j);
 174 static int      trm_initSRB(PACB pACB);
 175 static void     trm_initACB(PACB pACB, u_int8_t adaptType, u_int16_t unit);
 176 /* CAM SIM entry points */
 177 #define ccb_trmsrb_ptr spriv_ptr0
 178 #define ccb_trmacb_ptr spriv_ptr1
 179 static void     trm_action(struct cam_sim *psim, union ccb *pccb);
 180 static void     trm_poll(struct cam_sim *psim);
 181
 182
 183 static void * trm_SCSI_phase0[] = {
 184         trm_DataOutPhase0,    /* phase:0 */
 185         trm_DataInPhase0,     /* phase:1 */
 186         trm_CommandPhase0,    /* phase:2 */
 187         trm_StatusPhase0,     /* phase:3 */
 188         trm_Nop0,             /* phase:4 */
 189         trm_Nop1,             /* phase:5 */
 190         trm_MsgOutPhase0,     /* phase:6 */
 191         trm_MsgInPhase0,      /* phase:7 */
 192 };
 193
 194 /*
 195  *
 196  *          stateV = (void *) trm_SCSI_phase1[phase]
 197  *
 198  */
 199 static void * trm_SCSI_phase1[] = {
 200         trm_DataOutPhase1,    /* phase:0 */
 201         trm_DataInPhase1,     /* phase:1 */
 202         trm_CommandPhase1,    /* phase:2 */
 203         trm_StatusPhase1,     /* phase:3 */
 204         trm_Nop0,             /* phase:4 */
 205         trm_Nop1,             /* phase:5 */
 206         trm_MsgOutPhase1,     /* phase:6 */
 207         trm_MsgInPhase1,      /* phase:7 */
 208 };
 209
 210
 211 NVRAMTYPE trm_eepromBuf[TRM_MAX_ADAPTER_NUM];
 212 /*
 213  *Fast20:  000   50ns, 20.0 Mbytes/s
 214  *             001       75ns, 13.3 Mbytes/s
 215  *             010      100ns, 10.0 Mbytes/s
 216  *             011      125ns,  8.0 Mbytes/s
 217  *             100      150ns,  6.6 Mbytes/s
 218  *             101      175ns,  5.7 Mbytes/s
 219  *             110      200ns,  5.0 Mbytes/s
 220  *             111      250ns,  4.0 Mbytes/s
 221  *
 222  *Fast40:  000   25ns, 40.0 Mbytes/s
 223  *             001       50ns, 20.0 Mbytes/s
 224  *             010       75ns, 13.3 Mbytes/s
 225  *             011      100ns, 10.0 Mbytes/s
 226  *             100      125ns,  8.0 Mbytes/s
 227  *             101      150ns,  6.6 Mbytes/s
 228  *             110      175ns,  5.7 Mbytes/s
 229  *             111      200ns,  5.0 Mbytes/s
 230  */
 231                                              /* real period: */
 232 u_int8_t dc395x_clock_period[] = {
 233         12,/*  48  ns 20   MB/sec */
 234         18,/*  72  ns 13.3 MB/sec */
 235         25,/* 100  ns 10.0 MB/sec */
 236         31,/* 124  ns  8.0 MB/sec */
 237         37,/* 148  ns  6.6 MB/sec */
 238         43,/* 172  ns  5.7 MB/sec */
 239         50,/* 200  ns  5.0 MB/sec */
 240         62 /* 248  ns  4.0 MB/sec */
 241 };
 242
 243 u_int8_t dc395u2x_clock_period[]={
 244         10,/*  25  ns 40.0 MB/sec */
 245         12,/*  48  ns 20.0 MB/sec */
 246         18,/*  72  ns 13.3 MB/sec */
 247         25,/* 100  ns 10.0 MB/sec */
 248         31,/* 124  ns  8.0 MB/sec */
 249         37,/* 148  ns  6.6 MB/sec */
 250         43,/* 172  ns  5.7 MB/sec */
 251         50,/* 200  ns  5.0 MB/sec */
 252 };
 253
 254 #define  dc395x_tinfo_period           dc395x_clock_period
 255 #define  dc395u2x_tinfo_period         dc395u2x_clock_period
 256
 257 static PSRB
 258 trm_GetSRB(PACB pACB)
 259 {
 260         PSRB    pSRB;
 261
 262         crit_enter();
 263         pSRB = pACB->pFreeSRB;
 264         if (pSRB) {
 265                 pACB->pFreeSRB = pSRB->pNextSRB;
 266                 pSRB->pNextSRB = NULL;
 267         }
 268         crit_exit();
 269         return (pSRB);
 270 }
 271
 272 static void
 273 trm_RewaitSRB0(PDCB pDCB, PSRB pSRB)
 274 {
 275         PSRB    psrb1;
 276
 277         crit_enter();
 278         if ((psrb1 = pDCB->pWaitingSRB)) {
 279                 pSRB->pNextSRB = psrb1;
 280                 pDCB->pWaitingSRB = pSRB;
 281         } else {
 282                 pSRB->pNextSRB = NULL;
 283                 pDCB->pWaitingSRB = pSRB;
 284                 pDCB->pWaitingLastSRB = pSRB;
 285         }
 286         crit_exit();
 287 }
 288
 289 static void
 290 trm_RewaitSRB(PDCB pDCB, PSRB pSRB)
 291 {
 292         PSRB    psrb1;
 293
 294         crit_enter();
 295         pDCB->GoingSRBCnt--;
 296         psrb1 = pDCB->pGoingSRB;
 297         if (pSRB == psrb1)
 298                 /*
 299                  * if this SRB is GoingSRB
 300                  * remove this SRB from GoingSRB Q
 301                  */
 302                 pDCB->pGoingSRB = psrb1->pNextSRB;
 303         else {
 304                 /*
 305                  * if this SRB is not current GoingSRB
 306                  * remove this SRB from GoingSRB Q
 307                  */
 308                 while (pSRB != psrb1->pNextSRB)
 309                         psrb1 = psrb1->pNextSRB;
 310                 psrb1->pNextSRB = pSRB->pNextSRB;
 311                 if (pSRB == pDCB->pGoingLastSRB)
 312                         pDCB->pGoingLastSRB = psrb1;
 313         }
 314         if ((psrb1 = pDCB->pWaitingSRB)) {
 315                 /*
 316                  * if WaitingSRB Q is not NULL
 317                  * Q back this SRB into WaitingSRB
 318                  */
 319
 320                 pSRB->pNextSRB = psrb1;
 321                 pDCB->pWaitingSRB = pSRB;
 322         } else {
 323                 pSRB->pNextSRB = NULL;
 324                 pDCB->pWaitingSRB = pSRB;
 325                 pDCB->pWaitingLastSRB = pSRB;
 326         }
 327         crit_exit();
 328 }
 329
 330 static void
 331 trm_DoWaitingSRB(PACB pACB)
 332 {
 333         PDCB    ptr, ptr1;
 334         PSRB    pSRB;
 335
 336         crit_enter();
 337         if (!(pACB->pActiveDCB) &&
 338             !(pACB->ACBFlag & (RESET_DETECT+RESET_DONE+RESET_DEV))) {
 339                 ptr = pACB->pDCBRunRobin;
 340                 if (!ptr) {
 341                         ptr = pACB->pLinkDCB;
 342                         pACB->pDCBRunRobin = ptr;
 343                 }
 344                 ptr1 = ptr;
 345                 for (;ptr1 ;) {
 346                         pACB->pDCBRunRobin = ptr1->pNextDCB;
 347                         if (!(ptr1->MaxActiveCommandCnt > ptr1->GoingSRBCnt)
 348                             || !(pSRB = ptr1->pWaitingSRB)) {
 349                                 if (pACB->pDCBRunRobin == ptr)
 350                                         break;
 351                                 ptr1 = ptr1->pNextDCB;
 352                         } else {
 353                                 if (!trm_StartSCSI(pACB, ptr1, pSRB)) {
 354                                 /*
 355                                  * If trm_StartSCSI return 0 :
 356                                  * current interrupt status is interrupt enable
 357                                  * It's said that SCSI processor is unoccupied
 358                                  */
 359                                         ptr1->GoingSRBCnt++;
 360                                         if (ptr1->pWaitingLastSRB == pSRB) {
 361                                                 ptr1->pWaitingSRB = NULL;
 362                                                 ptr1->pWaitingLastSRB = NULL;
 363                                         } else
 364                                                 ptr1->pWaitingSRB = pSRB->pNextSRB;
 365                                         pSRB->pNextSRB = NULL;
 366                                         if (ptr1->pGoingSRB)
 367                                                 ptr1->pGoingLastSRB->pNextSRB = pSRB;
 368                                         else
 369                                                 ptr1->pGoingSRB = pSRB;
 370                                         ptr1->pGoingLastSRB = pSRB;
 371                                 }
 372                                 break;
 373                         }
 374                 }
 375         }
 376         crit_exit();
 377         return;
 378 }
 379
 380 static void
 381 trm_SRBwaiting(PDCB pDCB, PSRB pSRB)
 382 {
 383
 384         if (pDCB->pWaitingSRB) {
 385                 pDCB->pWaitingLastSRB->pNextSRB = pSRB;
 386                 pDCB->pWaitingLastSRB = pSRB;
 387                 pSRB->pNextSRB = NULL;
 388         } else {
 389                 pDCB->pWaitingSRB = pSRB;
 390                 pDCB->pWaitingLastSRB = pSRB;
 391         }
 392 }
 393
 394 static u_int32_t
 395 trm_get_sense_bufaddr(PACB pACB, PSRB pSRB)
 396 {
 397         int offset;
 398
 399         offset = pSRB->TagNumber;
 400         return (pACB->sense_busaddr +
 401             (offset * sizeof(struct scsi_sense_data)));
 402 }
 403
 404 static struct scsi_sense_data *
 405 trm_get_sense_buf(PACB pACB, PSRB pSRB)
 406 {
 407         int offset;
 408
 409         offset = pSRB->TagNumber;
 410         return (&pACB->sense_buffers[offset]);
 411 }
 412 static void
 413 trm_ExecuteSRB(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
 414 {
 415         PACB            pACB;
 416         PSRB            pSRB;
 417         union ccb       *ccb;
 418         u_long          totalxferlen=0;
 419
 420         crit_enter();
 421         pSRB = (PSRB)arg;
 422         ccb = pSRB->pccb;
 423         pACB = (PACB)ccb->ccb_h.ccb_trmacb_ptr;
 424         TRM_DPRINTF("trm_ExecuteSRB..........\n");
 425         if (nseg != 0) {
 426                 PSEG                    psg;
 427                 bus_dma_segment_t       *end_seg;
 428                 bus_dmasync_op_t        op;
 429
 430                 /* Copy the segments into our SG list */
 431                 end_seg = dm_segs + nseg;
 432                 psg = pSRB->pSRBSGL;
 433                 while (dm_segs < end_seg) {
 434                         psg->address = dm_segs->ds_addr;
 435                         psg->length = (u_long)dm_segs->ds_len;
 436                         totalxferlen += dm_segs->ds_len;
 437                         psg++;
 438                         dm_segs++;
 439                 }
 440                 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) {
 441                         op = BUS_DMASYNC_PREREAD;
 442                 } else {
 443                         op = BUS_DMASYNC_PREWRITE;
 444                 }
 445                 bus_dmamap_sync(pACB->buffer_dmat, pSRB->dmamap, op);
 446         }
 447         pSRB->RetryCnt = 0;
 448         pSRB->SRBTotalXferLength = totalxferlen;
 449         pSRB->SRBSGCount = nseg;
 450         pSRB->SRBSGIndex = 0;
 451         pSRB->AdaptStatus = 0;
 452         pSRB->TargetStatus = 0;
 453         pSRB->MsgCnt = 0;
 454         pSRB->SRBStatus = 0;
 455         pSRB->SRBFlag = 0;
 456         pSRB->SRBState = 0;
 457         pSRB->ScsiPhase = PH_BUS_FREE; /* SCSI bus free Phase */
 458
 459         if (ccb->ccb_h.status != CAM_REQ_INPROG) {
 460                 if (nseg != 0)
 461                         bus_dmamap_unload(pACB->buffer_dmat, pSRB->dmamap);
 462                 pSRB->pNextSRB = pACB->pFreeSRB;
 463                 pACB->pFreeSRB = pSRB;
 464                 xpt_done(ccb);
 465                 crit_exit();
 466                 return;
 467         }
 468         ccb->ccb_h.status |= CAM_SIM_QUEUED;
 469 #if 0
 470         /* XXX Need a timeout handler */
 471         callout_reset(&ccb->ccb_h.timeout_ch, (ccb->ccb_h.timeout * hz) / 1000,
 472                       trmtimeout, srb);
 473 #endif
 474         trm_SendSRB(pACB, pSRB);
 475         crit_exit();
 476         return;
 477 }
 478
 479 static void
 480 trm_SendSRB(PACB pACB, PSRB pSRB)
 481 {
 482         PDCB    pDCB;
 483
 484         pDCB = pSRB->pSRBDCB;
 485         if (!(pDCB->MaxActiveCommandCnt > pDCB->GoingSRBCnt) || (pACB->pActiveDCB)
 486             || (pACB->ACBFlag & (RESET_DETECT+RESET_DONE+RESET_DEV))) {
 487                 TRM_DPRINTF("pDCB->MaxCommand=%d \n",pDCB->MaxActiveCommandCnt);
 488                 TRM_DPRINTF("pDCB->GoingSRBCnt=%d \n",pDCB->GoingSRBCnt);
 489                 TRM_DPRINTF("pACB->pActiveDCB=%8x \n",(u_int)pACB->pActiveDCB);
 490                 TRM_DPRINTF("pACB->ACBFlag=%x \n",pACB->ACBFlag);
 491                 trm_SRBwaiting(pDCB, pSRB);
 492                 goto SND_EXIT;
 493         }
 494
 495         if (pDCB->pWaitingSRB) {
 496                 trm_SRBwaiting(pDCB, pSRB);
 497                 pSRB = pDCB->pWaitingSRB;
 498                 pDCB->pWaitingSRB = pSRB->pNextSRB;
 499                 pSRB->pNextSRB = NULL;
 500         }
 501
 502         if (!trm_StartSCSI(pACB, pDCB, pSRB)) {
 503         /*
 504          * If trm_StartSCSI return 0 :
 505          * current interrupt status is interrupt enable
 506          * It's said that SCSI processor is unoccupied
 507          */
 508                 pDCB->GoingSRBCnt++; /* stack waiting SRB*/
 509                 if (pDCB->pGoingSRB) {
 510                         pDCB->pGoingLastSRB->pNextSRB = pSRB;
 511                         pDCB->pGoingLastSRB = pSRB;
 512                 } else {
 513                         pDCB->pGoingSRB = pSRB;
 514                         pDCB->pGoingLastSRB = pSRB;
 515                 }
 516         } else {
 517         /*
 518          * If trm_StartSCSI return 1 :
 519          * current interrupt status is interrupt disreenable
 520          * It's said that SCSI processor has more one SRB need to do
 521          */
 522                 trm_RewaitSRB0(pDCB, pSRB);
 523         }
 524 SND_EXIT:
 525         return;
 526 }
 527
 528
 529 static void
 530 trm_action(struct cam_sim *psim, union ccb *pccb)
 531 {
 532         PACB    pACB;
 533         u_int   target_id,target_lun;
 534
 535         CAM_DEBUG(pccb->ccb_h.path, CAM_DEBUG_TRACE, ("trm_action\n"));
 536
 537         crit_enter();
 538         pACB = (PACB) cam_sim_softc(psim);
 539         target_id  = pccb->ccb_h.target_id;
 540         target_lun = pccb->ccb_h.target_lun;
 541
 542         switch (pccb->ccb_h.func_code) {
 543                 case XPT_NOOP:
 544                         TRM_DPRINTF(" XPT_NOOP \n");
 545                         pccb->ccb_h.status = CAM_REQ_INVALID;
 546                         xpt_done(pccb);
 547                         break;
 548                 /*
 549                  * Execute the requested I/O operation
 550                  */
 551                 case XPT_SCSI_IO: {
 552                         PDCB                    pDCB = NULL;
 553                         PSRB                    pSRB;
 554                         struct ccb_scsiio       *pcsio;
 555
 556                         pcsio = &pccb->csio;
 557                         TRM_DPRINTF(" XPT_SCSI_IO \n");
 558                         TRM_DPRINTF("trm: target_id= %d target_lun= %d \n"
 559                              ,target_id, target_lun);
 560                         TRM_DPRINTF(
 561                             "pACB->scan_devices[target_id][target_lun]= %d \n"
 562                             ,pACB->scan_devices[target_id][target_lun]);
 563                         if ((pccb->ccb_h.status & CAM_STATUS_MASK) !=
 564                             CAM_REQ_INPROG) {
 565                                 xpt_done(pccb);
 566                                 crit_exit();
 567                                 return;
 568                         }
 569                         pDCB = &pACB->DCBarray[target_id][target_lun];
 570                         if (!(pDCB->DCBstatus & DS_IN_QUEUE)) {
 571                                 pACB->scan_devices[target_id][target_lun] = 1;
 572                                 trm_initDCB(pACB, pDCB, pACB->AdapterUnit,
 573                                     target_id, target_lun);
 574                         }
 575                         /*
 576                          * Assign an SRB and connect it with this ccb.
 577                          */
 578                         pSRB = trm_GetSRB(pACB);
 579                         if (!pSRB) {
 580                                 /* Freeze SIMQ */
 581                                 pccb->ccb_h.status = CAM_RESRC_UNAVAIL;
 582                                 xpt_done(pccb);
 583                                 crit_exit();
 584                                 return;
 585                         }
 586                         pSRB->pSRBDCB = pDCB;
 587                         pccb->ccb_h.ccb_trmsrb_ptr = pSRB;
 588                         pccb->ccb_h.ccb_trmacb_ptr = pACB;
 589                         pSRB->pccb = pccb;
 590                         pSRB->ScsiCmdLen = pcsio->cdb_len;
 591                         /*
 592                          * move layer of CAM command block to layer of SCSI
 593                          * Request Block for SCSI processor command doing
 594                          */
 595                         if ((pccb->ccb_h.flags & CAM_CDB_POINTER) != 0) {
 596                                 if ((pccb->ccb_h.flags & CAM_CDB_PHYS) == 0) {
 597                                         bcopy(pcsio->cdb_io.cdb_ptr,pSRB->CmdBlock
 598                                             ,pcsio->cdb_len);
 599                                 } else {
 600                                         pccb->ccb_h.status = CAM_REQ_INVALID;
 601                                         pSRB->pNextSRB = pACB->pFreeSRB;
 602                                         pACB->pFreeSRB=  pSRB;
 603                                         xpt_done(pccb);
 604                                         crit_exit();
 605                                         return;
 606                                 }
 607                         } else
 608                                 bcopy(pcsio->cdb_io.cdb_bytes,
 609                                     pSRB->CmdBlock, pcsio->cdb_len);
 610                         if ((pccb->ccb_h.flags & CAM_DIR_MASK)
 611                             != CAM_DIR_NONE) {
 612                                 if ((pccb->ccb_h.flags &
 613                                       CAM_SCATTER_VALID) == 0) {
 614                                         if ((pccb->ccb_h.flags
 615                                               & CAM_DATA_PHYS) == 0) {
 616                                                 int error;
 617
 618                                                 crit_enter();
 619                                                 error = bus_dmamap_load(
 620                                                     pACB->buffer_dmat,
 621                                                     pSRB->dmamap,
 622                                                     pcsio->data_ptr,
 623                                                     pcsio->dxfer_len,
 624                                                     trm_ExecuteSRB,
 625                                                     pSRB,
 626                                                     0);
 627                                                 if (error == EINPROGRESS) {
 628                                                         xpt_freeze_simq(
 629                                                             pACB->psim,
 630                                                             1);
 631                                                         pccb->ccb_h.status |=
 632                                                           CAM_RELEASE_SIMQ;
 633                                                 }
 634                                                 crit_exit();
 635                                         } else {
 636                                                 struct bus_dma_segment seg;
 637
 638                                                 /* Pointer to physical buffer */
 639                                                 seg.ds_addr =
 640                                                   (bus_addr_t)pcsio->data_ptr;
 641                                                 seg.ds_len = pcsio->dxfer_len;
 642                                                 trm_ExecuteSRB(pSRB, &seg, 1,
 643                                                     0);
 644                                         }
 645                                 } else {
 646                                         /*  CAM_SCATTER_VALID */
 647                                         struct bus_dma_segment *segs;
 648
 649                                         if ((pccb->ccb_h.flags &
 650                                              CAM_SG_LIST_PHYS) == 0 ||
 651                                              (pccb->ccb_h.flags
 652                                              & CAM_DATA_PHYS) != 0) {
 653                                                 pSRB->pNextSRB = pACB->pFreeSRB;
 654                                                 pACB->pFreeSRB = pSRB;
 655                                                 pccb->ccb_h.status =
 656                                                   CAM_PROVIDE_FAIL;
 657                                                 xpt_done(pccb);
 658                                                 crit_exit();
 659                                                 return;
 660                                         }
 661
 662                                         /* cam SG list is physical,
 663                                          *  cam data is virtual
 664                                          */
 665                                         segs = (struct bus_dma_segment *)
 666                                             pcsio->data_ptr;
 667                                         trm_ExecuteSRB(pSRB, segs,
 668                                             pcsio->sglist_cnt, 1);
 669                                 }   /*  CAM_SCATTER_VALID */
 670                         } else
 671                                 trm_ExecuteSRB(pSRB, NULL, 0, 0);
 672                                   }
 673                         break;
 674                 case XPT_GDEV_TYPE:
 675                         TRM_DPRINTF(" XPT_GDEV_TYPE \n");
 676                         pccb->ccb_h.status = CAM_REQ_INVALID;
 677                         xpt_done(pccb);
 678                         break;
 679                 case XPT_GDEVLIST:
 680                         TRM_DPRINTF(" XPT_GDEVLIST \n");
 681                         pccb->ccb_h.status = CAM_REQ_INVALID;
 682                         xpt_done(pccb);
 683                         break;
 684                 /*
 685                  * Path routing inquiry
 686                  * Path Inquiry CCB
 687                  */
 688                 case XPT_PATH_INQ: {
 689                         struct ccb_pathinq *cpi = &pccb->cpi;
 690
 691                         TRM_DPRINTF(" XPT_PATH_INQ \n");
 692                         cpi->version_num = 1;
 693                         cpi->hba_inquiry = PI_SDTR_ABLE|PI_TAG_ABLE|PI_WIDE_16;
 694                         cpi->target_sprt = 0;
 695                         cpi->hba_misc = 0;
 696                         cpi->hba_eng_cnt = 0;
 697                         cpi->max_target = 15 ;
 698                         cpi->max_lun = pACB->max_lun;        /* 7 or 0 */
 699                         cpi->initiator_id = pACB->AdaptSCSIID;
 700                         cpi->bus_id = cam_sim_bus(psim);
 701                         cpi->base_transfer_speed = 3300;
 702                         strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
 703                         strncpy(cpi->hba_vid, "Tekram_TRM", HBA_IDLEN);
 704                         strncpy(cpi->dev_name, cam_sim_name(psim), DEV_IDLEN);
 705                         cpi->unit_number = cam_sim_unit(psim);
 706                         cpi->transport = XPORT_SPI;
 707                         cpi->transport_version = 2;
 708                         cpi->protocol = PROTO_SCSI;
 709                         cpi->protocol_version = SCSI_REV_2;
 710                         cpi->ccb_h.status = CAM_REQ_CMP;
 711                         xpt_done(pccb);
 712                                    }
 713                         break;
 714                 /*
 715                  * Release a frozen SIM queue
 716                  * Release SIM Queue
 717                  */
 718                 case XPT_REL_SIMQ:
 719                         TRM_DPRINTF(" XPT_REL_SIMQ \n");
 720                         pccb->ccb_h.status = CAM_REQ_INVALID;
 721                         xpt_done(pccb);
 722                         break;
 723                 /*
 724                  * Set Asynchronous Callback Parameters
 725                  * Set Asynchronous Callback CCB
 726                  */
 727                 case XPT_SASYNC_CB:
 728                         TRM_DPRINTF(" XPT_SASYNC_CB \n");
 729                         pccb->ccb_h.status = CAM_REQ_INVALID;
 730                         xpt_done(pccb);
 731                         break;
 732                 /*
 733                  * Set device type information
 734                  * Set Device Type CCB
 735                  */
 736                 case XPT_SDEV_TYPE:
 737                         TRM_DPRINTF(" XPT_SDEV_TYPE \n");
 738                         pccb->ccb_h.status = CAM_REQ_INVALID;
 739                         xpt_done(pccb);
 740                         break;
 741                 /*
 742                  * (Re)Scan the SCSI Bus
 743                  * Rescan the given bus, or bus/target/lun
 744                  */
 745                 case XPT_SCAN_BUS:
 746                         TRM_DPRINTF(" XPT_SCAN_BUS \n");
 747                         pccb->ccb_h.status = CAM_REQ_INVALID;
 748                         xpt_done(pccb);
 749                         break;
 750                 /*
 751                  * Get EDT entries matching the given pattern
 752                  */
 753                 case XPT_DEV_MATCH:
 754                         TRM_DPRINTF(" XPT_DEV_MATCH \n");
 755                         pccb->ccb_h.status = CAM_REQ_INVALID;
 756                         xpt_done(pccb);
 757                         break;
 758                 /*
 759                  * Turn on debugging for a bus, target or lun
 760                  */
 761                 case XPT_DEBUG:
 762                         TRM_DPRINTF(" XPT_DEBUG \n");
 763                         pccb->ccb_h.status = CAM_REQ_INVALID;
 764                         xpt_done(pccb);
 765                         break;
 766                         /*
 767                          * XPT_ABORT = 0x10, Abort the specified CCB
 768                          * Abort XPT request CCB
 769                          */
 770                 case XPT_ABORT:
 771                         TRM_DPRINTF(" XPT_ABORT \n");
 772                         pccb->ccb_h.status = CAM_REQ_INVALID;
 773                         xpt_done(pccb);
 774                         break;
 775                 /*
 776                  * Reset the specified SCSI bus
 777                  * Reset SCSI Bus CCB
 778                  */
 779                 case XPT_RESET_BUS: {
 780                         int i;
 781
 782                         TRM_DPRINTF(" XPT_RESET_BUS \n");
 783                         trm_reset(pACB);
 784                         pACB->ACBFlag=0;
 785                         for (i=0; i<500; i++)
 786                                 DELAY(1000);
 787                         pccb->ccb_h.status = CAM_REQ_CMP;
 788                         xpt_done(pccb);
 789                                     }
 790                         break;
 791                 /*
 792                  * Bus Device Reset the specified SCSI device
 793                  * Reset SCSI Device CCB
 794                  */
 795                 case XPT_RESET_DEV:
 796                 /*
 797                  * Don't (yet?) support vendor
 798                  * specific commands.
 799                  */
 800                         TRM_DPRINTF(" XPT_RESET_DEV \n");
 801                         pccb->ccb_h.status = CAM_REQ_INVALID;
 802                         xpt_done(pccb);
 803                         break;
 804                 /*
 805                  * Terminate the I/O process
 806                  * Terminate I/O Process Request CCB
 807                  */
 808                 case XPT_TERM_IO:
 809                         TRM_DPRINTF(" XPT_TERM_IO \n");
 810                         pccb->ccb_h.status = CAM_REQ_INVALID;
 811                         xpt_done(pccb);
 812                         break;
 813                 /*
 814                  * Scan Logical Unit
 815                  */
 816                 case XPT_SCAN_LUN:
 817                         TRM_DPRINTF(" XPT_SCAN_LUN \n");
 818                         pccb->ccb_h.status = CAM_REQ_INVALID;
 819                         xpt_done(pccb);
 820                         break;
 821
 822                 /*
 823                  * Get/Set transfer rate/width/disconnection/tag queueing
 824                  * settings
 825                  * (GET) default/user transfer settings for the target
 826                  */
 827                 case XPT_GET_TRAN_SETTINGS: {
 828                         struct  ccb_trans_settings *cts = &pccb->cts;
 829                         struct  trm_transinfo *tinfo;
 830                         PDCB    pDCB;
 831                         struct ccb_trans_settings_scsi *scsi =
 832                             &cts->proto_specific.scsi;
 833                         struct ccb_trans_settings_spi *spi =
 834                             &cts->xport_specific.spi;
 835
 836                         cts->protocol = PROTO_SCSI;
 837                         cts->protocol_version = SCSI_REV_2;
 838                         cts->transport = XPORT_SPI;
 839                         cts->transport_version = 2;
 840
 841                         TRM_DPRINTF(" XPT_GET_TRAN_SETTINGS \n");
 842                         pDCB = &pACB->DCBarray[target_id][target_lun];
 843                         crit_enter();
 844                         /*
 845                          * disable interrupt
 846                          */
 847                         if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
 848                                 /* current transfer settings */
 849                                 if (pDCB->tinfo.disc_tag & TRM_CUR_DISCENB)
 850                                         spi->flags = CTS_SPI_FLAGS_DISC_ENB;
 851                                 else
 852                                         spi->flags = 0;/* no tag & disconnect */
 853                                 if (pDCB->tinfo.disc_tag & TRM_CUR_TAGENB)
 854                                         scsi->flags |= CTS_SCSI_FLAGS_TAG_ENB;
 855                                 tinfo = &pDCB->tinfo.current;
 856                                 TRM_DPRINTF("CURRENT:  cts->flags= %2x \n",
 857                                     cts->flags);
 858                         } else {
 859                           /* default(user) transfer settings */
 860                                 if (pDCB->tinfo.disc_tag & TRM_USR_DISCENB)
 861                                         spi->flags = CTS_SPI_FLAGS_DISC_ENB;
 862                                 else
 863                                         spi->flags = 0;
 864                                 if (pDCB->tinfo.disc_tag & TRM_USR_TAGENB)
 865                                         scsi->flags |= CTS_SCSI_FLAGS_TAG_ENB;
 866                                 tinfo = &pDCB->tinfo.user;
 867                                 TRM_DPRINTF("USER: cts->flags= %2x \n",
 868                                         cts->flags);
 869                         }
 870                         spi->sync_period = tinfo->period;
 871                         spi->sync_offset = tinfo->offset;
 872                         spi->bus_width   = tinfo->width;
 873                         TRM_DPRINTF("pDCB->SyncPeriod: %d  \n",
 874                                 pDCB->SyncPeriod);
 875                         TRM_DPRINTF("period: %d  \n", tinfo->period);
 876                         TRM_DPRINTF("offset: %d  \n", tinfo->offset);
 877                         TRM_DPRINTF("width: %d  \n", tinfo->width);
 878
 879                         crit_exit();
 880                         spi->valid = CTS_SPI_VALID_SYNC_RATE |
 881                             CTS_SPI_VALID_SYNC_OFFSET |
 882                             CTS_SPI_VALID_BUS_WIDTH |
 883                             CTS_SPI_VALID_DISC;
 884                         scsi->valid = CTS_SCSI_VALID_TQ;
 885                         pccb->ccb_h.status = CAM_REQ_CMP;
 886                         xpt_done(pccb);
 887                                             }
 888                         break;
 889                 /*
 890                  * Get/Set transfer rate/width/disconnection/tag queueing
 891                  * settings
 892                  * (Set) transfer rate/width negotiation settings
 893                  */
 894                 case XPT_SET_TRAN_SETTINGS: {
 895                         struct  ccb_trans_settings *cts =  &pccb->cts;
 896                         u_int   update_type;
 897                         PDCB    pDCB;
 898                         struct ccb_trans_settings_scsi *scsi =
 899                             &cts->proto_specific.scsi;
 900                         struct ccb_trans_settings_spi *spi =
 901                             &cts->xport_specific.spi;
 902
 903                         TRM_DPRINTF(" XPT_SET_TRAN_SETTINGS \n");
 904                         update_type = 0;
 905                         if (cts->type == CTS_TYPE_CURRENT_SETTINGS)
 906                                 update_type |= TRM_TRANS_GOAL;
 907                         if (cts->type == CTS_TYPE_USER_SETTINGS)
 908                                 update_type |= TRM_TRANS_USER;
 909                         crit_enter();
 910                         pDCB = &pACB->DCBarray[target_id][target_lun];
 911
 912                         if ((spi->valid & CTS_SPI_VALID_DISC) != 0) {
 913                           /*ccb disc enables */
 914                                 if (update_type & TRM_TRANS_GOAL) {
 915                                         if ((spi->flags & CTS_SPI_FLAGS_DISC_ENB)
 916                                             != 0)
 917                                                 pDCB->tinfo.disc_tag
 918                                                     |= TRM_CUR_DISCENB;
 919                                         else
 920                                                 pDCB->tinfo.disc_tag &=
 921                                                     ~TRM_CUR_DISCENB;
 922                                 }
 923                                 if (update_type & TRM_TRANS_USER) {
 924                                         if ((spi->flags & CTS_SPI_FLAGS_DISC_ENB)
 925                                             != 0)
 926                                                 pDCB->tinfo.disc_tag
 927                                                     |= TRM_USR_DISCENB;
 928                                         else
 929                                                 pDCB->tinfo.disc_tag &=
 930                                                     ~TRM_USR_DISCENB;
 931                                 }
 932                         }
 933                         if ((scsi->valid & CTS_SCSI_VALID_TQ) != 0) {
 934                           /* if ccb tag q active */
 935                                 if (update_type & TRM_TRANS_GOAL) {
 936                                         if ((scsi->flags & CTS_SCSI_FLAGS_TAG_ENB)
 937                                             != 0)
 938                                                 pDCB->tinfo.disc_tag |=
 939                                                     TRM_CUR_TAGENB;
 940                                         else
 941                                                 pDCB->tinfo.disc_tag &=
 942                                                     ~TRM_CUR_TAGENB;
 943                                 }
 944                                 if (update_type & TRM_TRANS_USER) {
 945                                         if ((scsi->flags & CTS_SCSI_FLAGS_TAG_ENB)
 946                                             != 0)
 947                                                 pDCB->tinfo.disc_tag |=
 948                                                     TRM_USR_TAGENB;
 949                                         else
 950                                                 pDCB->tinfo.disc_tag &=
 951                                                     ~TRM_USR_TAGENB;
 952                                 }
 953                         }
 954                         /* Minimum sync period factor   */
 955
 956                         if ((spi->valid & CTS_SPI_VALID_SYNC_RATE) != 0) {
 957                                 /* if ccb sync active */
 958                                 /* TRM-S1040 MinSyncPeriod = 4 clocks/byte */
 959                                 if ((spi->sync_period != 0) &&
 960                                     (spi->sync_period < 125))
 961                                         spi->sync_period = 125;
 962                                 /* 1/(125*4) minsync 2 MByte/sec */
 963                                 if ((spi->valid & CTS_SPI_VALID_SYNC_OFFSET)
 964                                     != 0) {
 965                                         if (spi->sync_offset == 0)
 966                                                 spi->sync_period = 0;
 967                                         /* TRM-S1040 MaxSyncOffset = 15 bytes*/
 968                                         if (spi->sync_offset > 15)
 969                                                 spi->sync_offset = 15;
 970                                 }
 971                         }
 972                         if ((update_type & TRM_TRANS_USER) != 0) {
 973                                 pDCB->tinfo.user.period = spi->sync_period;
 974                                 pDCB->tinfo.user.offset = spi->sync_offset;
 975                                 pDCB->tinfo.user.width  = spi->bus_width;
 976                         }
 977                         if ((update_type & TRM_TRANS_GOAL) != 0) {
 978                                 pDCB->tinfo.goal.period = spi->sync_period;
 979                                 pDCB->tinfo.goal.offset = spi->sync_offset;
 980                                 pDCB->tinfo.goal.width  = spi->bus_width;
 981                         }
 982                         crit_exit();
 983                         pccb->ccb_h.status = CAM_REQ_CMP;
 984                         xpt_done(pccb);
 985                         break;
 986                                             }
 987                 /*
 988                  * Calculate the geometry parameters for a device give
 989                  * the sector size and volume size.
 990                  */
 991                 case XPT_CALC_GEOMETRY:
 992                         TRM_DPRINTF(" XPT_CALC_GEOMETRY \n");
 993                         cam_calc_geometry(&pccb->ccg, /*extended*/1);
 994                         xpt_done(pccb);
 995                         break;
 996                 case XPT_ENG_INQ:
 997                         TRM_DPRINTF(" XPT_ENG_INQ \n");
 998                         pccb->ccb_h.status = CAM_REQ_INVALID;
 999                         xpt_done(pccb);
1000                         break;
1001                 /*
1002                  * HBA execute engine request
1003                  * This structure must match SCSIIO size
1004                  */
1005                 case XPT_ENG_EXEC:
1006                         TRM_DPRINTF(" XPT_ENG_EXEC \n");
1007                         pccb->ccb_h.status = CAM_REQ_INVALID;
1008                         xpt_done(pccb);
1009                         break;
1010                 /*
1011                  * XPT_EN_LUN = 0x30, Enable LUN as a target
1012                  * Target mode structures.
1013                  */
1014                 case XPT_EN_LUN:
1015                 /*
1016                  * Don't (yet?) support vendor
1017                  * specific commands.
1018                  */
1019                         TRM_DPRINTF(" XPT_EN_LUN \n");
1020                         pccb->ccb_h.status = CAM_REQ_INVALID;
1021                         xpt_done(pccb);
1022                         break;
1023                 /*
1024                 * Execute target I/O request
1025                 */
1026                 case XPT_TARGET_IO:
1027                 /*
1028                  * Don't (yet?) support vendor
1029                  * specific commands.
1030                  */
1031                         TRM_DPRINTF(" XPT_TARGET_IO \n");
1032                         pccb->ccb_h.status = CAM_REQ_INVALID;
1033                         xpt_done(pccb);
1034                         break;
1035                 /*
1036                  * Accept Host Target Mode CDB
1037                  */
1038                 case XPT_ACCEPT_TARGET_IO:
1039                 /*
1040                  * Don't (yet?) support vendor
1041                  * specific commands.
1042                  */
1043                         TRM_DPRINTF(" XPT_ACCEPT_TARGET_IO \n");
1044                         pccb->ccb_h.status = CAM_REQ_INVALID;
1045                         xpt_done(pccb);
1046                         break;
1047                 /*
1048                  * Continue Host Target I/O Connection
1049                  */
1050                 case XPT_CONT_TARGET_IO:
1051                 /*
1052                  * Don't (yet?) support vendor
1053                  * specific commands.
1054                  */
1055                         TRM_DPRINTF(" XPT_CONT_TARGET_IO \n");
1056                         pccb->ccb_h.status = CAM_REQ_INVALID;
1057                         xpt_done(pccb);
1058                         break;
1059                 /*
1060                  * Notify Host Target driver of event
1061                  */
1062                 case XPT_IMMED_NOTIFY:
1063                         TRM_DPRINTF(" XPT_IMMED_NOTIFY \n");
1064                         pccb->ccb_h.status = CAM_REQ_INVALID;
1065                         xpt_done(pccb);
1066                         break;
1067                 /*
1068                  * Acknowledgement of event
1069                  */
1070                 case XPT_NOTIFY_ACK:
1071                         TRM_DPRINTF(" XPT_NOTIFY_ACK \n");
1072                         pccb->ccb_h.status = CAM_REQ_INVALID;
1073                         xpt_done(pccb);
1074                         break;
1075                 /*
1076                  * XPT_VUNIQUE = 0x80
1077                  */
1078                 case XPT_VUNIQUE:
1079                         pccb->ccb_h.status = CAM_REQ_INVALID;
1080                         xpt_done(pccb);
1081                         break;
1082                 default:
1083                         pccb->ccb_h.status = CAM_REQ_INVALID;
1084                         xpt_done(pccb);
1085                         break;
1086         }
1087         crit_exit();
1088 }
1089
1090 static void
1091 trm_poll(struct cam_sim *psim)
1092 {
1093         trm_Interrupt(cam_sim_softc(psim));
1094 }
1095
1096 static void
1097 trm_ResetDevParam(PACB pACB)
1098 {
1099         PDCB            pDCB, pdcb;
1100         PNVRAMTYPE      pEEpromBuf;
1101         u_int8_t        PeriodIndex;
1102
1103         pDCB = pACB->pLinkDCB;
1104         if (pDCB == NULL)
1105                 return;
1106         pdcb = pDCB;
1107         do {
1108                 pDCB->SyncMode  &= ~(SYNC_NEGO_DONE+ WIDE_NEGO_DONE);
1109                 pDCB->SyncPeriod = 0;
1110                 pDCB->SyncOffset = 0;
1111                 pEEpromBuf = &trm_eepromBuf[pACB->AdapterUnit];
1112                 pDCB->DevMode =
1113                   pEEpromBuf->NvramTarget[pDCB->TargetID].NvmTarCfg0;
1114                 pDCB->AdpMode = pEEpromBuf->NvramChannelCfg;
1115                 PeriodIndex =
1116                    pEEpromBuf->NvramTarget[pDCB->TargetID].NvmTarPeriod & 0x07;
1117                 if (pACB->AdaptType == 1) /* is U2? */
1118                         pDCB->MaxNegoPeriod = dc395u2x_clock_period[PeriodIndex];
1119                 else
1120                         pDCB->MaxNegoPeriod = dc395x_clock_period[PeriodIndex];
1121                 if ((pDCB->DevMode & NTC_DO_WIDE_NEGO) &&
1122                     (pACB->Config & HCC_WIDE_CARD))
1123                         pDCB->SyncMode |= WIDE_NEGO_ENABLE;
1124                 pDCB = pDCB->pNextDCB;
1125         }
1126         while (pdcb != pDCB);
1127 }
1128
1129 static void
1130 trm_RecoverSRB(PACB pACB)
1131 {
1132         PDCB            pDCB, pdcb;
1133         PSRB            psrb, psrb2;
1134         u_int16_t       cnt, i;
1135
1136         pDCB = pACB->pLinkDCB;
1137         if (pDCB == NULL)
1138                 return;
1139         pdcb = pDCB;
1140         do {
1141                 cnt = pdcb->GoingSRBCnt;
1142                 psrb = pdcb->pGoingSRB;
1143                 for (i = 0; i < cnt; i++) {
1144                         psrb2 = psrb;
1145                         psrb = psrb->pNextSRB;
1146                         if (pdcb->pWaitingSRB) {
1147                                 psrb2->pNextSRB = pdcb->pWaitingSRB;
1148                                 pdcb->pWaitingSRB = psrb2;
1149                         } else {
1150                                 pdcb->pWaitingSRB = psrb2;
1151                                 pdcb->pWaitingLastSRB = psrb2;
1152                                 psrb2->pNextSRB = NULL;
1153                         }
1154                 }
1155                 pdcb->GoingSRBCnt = 0;
1156                 pdcb->pGoingSRB = NULL;
1157                 pdcb = pdcb->pNextDCB;
1158         }
1159         while (pdcb != pDCB);
1160 }
1161
1162 static void
1163 trm_reset(PACB pACB)
1164 {
1165         u_int16_t       i;
1166
1167         TRM_DPRINTF("trm: RESET");
1168         crit_enter();
1169         trm_reg_write8(0x00, TRMREG_DMA_INTEN);
1170         trm_reg_write8(0x00, TRMREG_SCSI_INTEN);
1171
1172         trm_ResetSCSIBus(pACB);
1173         for (i = 0; i < 500; i++)
1174                 DELAY(1000);
1175         trm_reg_write8(0x7F, TRMREG_SCSI_INTEN);
1176         /* Enable DMA interrupt */
1177         trm_reg_write8(EN_SCSIINTR, TRMREG_DMA_INTEN);
1178         /* Clear DMA FIFO */
1179         trm_reg_write8(CLRXFIFO, TRMREG_DMA_CONTROL);
1180         /* Clear SCSI FIFO */
1181         trm_reg_write16(DO_CLRFIFO,TRMREG_SCSI_CONTROL);
1182         trm_ResetDevParam(pACB);
1183         trm_DoingSRB_Done(pACB);
1184         pACB->pActiveDCB = NULL;
1185         pACB->ACBFlag = 0;/* RESET_DETECT, RESET_DONE ,RESET_DEV */
1186         trm_DoWaitingSRB(pACB);
1187         /* Tell the XPT layer that a bus reset occured    */
1188         if (pACB->ppath != NULL)
1189                 xpt_async(AC_BUS_RESET, pACB->ppath, NULL);
1190         crit_exit();
1191         return;
1192 }
1193
1194 static u_int16_t
1195 trm_StartSCSI(PACB pACB, PDCB pDCB, PSRB pSRB)
1196 {
1197         u_int16_t       return_code;
1198         u_int8_t        scsicommand, i,command,identify_message;
1199         u_int8_t *      ptr;
1200         union  ccb      *pccb;
1201         struct ccb_scsiio *pcsio;
1202
1203         pccb  = pSRB->pccb;
1204         pcsio = &pccb->csio;
1205
1206         trm_reg_write8(pACB->AdaptSCSIID, TRMREG_SCSI_HOSTID);
1207         trm_reg_write8(pDCB->TargetID, TRMREG_SCSI_TARGETID);
1208         trm_reg_write8(pDCB->SyncPeriod, TRMREG_SCSI_SYNC);
1209         trm_reg_write8(pDCB->SyncOffset, TRMREG_SCSI_OFFSET);
1210         pSRB->ScsiPhase = PH_BUS_FREE;/* initial phase */
1211         /* Flush FIFO */
1212         trm_reg_write16(DO_CLRFIFO, TRMREG_SCSI_CONTROL);
1213
1214         identify_message = pDCB->IdentifyMsg;
1215
1216         if ((pSRB->CmdBlock[0] == INQUIRY) ||
1217             (pSRB->CmdBlock[0] == REQUEST_SENSE) ||
1218             (pSRB->SRBFlag & AUTO_REQSENSE)) {
1219                 if (((pDCB->SyncMode & WIDE_NEGO_ENABLE) &&
1220                       !(pDCB->SyncMode & WIDE_NEGO_DONE))
1221                 || ((pDCB->SyncMode & SYNC_NEGO_ENABLE) &&
1222                   !(pDCB->SyncMode & SYNC_NEGO_DONE))) {
1223                         if (!(pDCB->IdentifyMsg & 7) ||
1224                             (pSRB->CmdBlock[0] != INQUIRY)) {
1225                                 scsicommand = SCMD_SEL_ATNSTOP;
1226                                 pSRB->SRBState = SRB_MSGOUT;
1227                                 goto polling;
1228                         }
1229                 }
1230         /*
1231         * Send identify message
1232         */
1233                 trm_reg_write8((identify_message & 0xBF) ,TRMREG_SCSI_FIFO);
1234                 scsicommand = SCMD_SEL_ATN;
1235                 pSRB->SRBState = SRB_START_;
1236         } else {
1237                 /* not inquiry,request sense,auto request sense */
1238                 /*
1239                  * Send identify message
1240                  */
1241                 trm_reg_write8(identify_message,TRMREG_SCSI_FIFO);
1242                 scsicommand = SCMD_SEL_ATN;
1243                 pSRB->SRBState = SRB_START_;
1244                 if (pDCB->SyncMode & EN_TAG_QUEUING) {
1245                   /* Send Tag message */
1246                         trm_reg_write8(MSG_SIMPLE_QTAG, TRMREG_SCSI_FIFO);
1247                         trm_reg_write8(pSRB->TagNumber, TRMREG_SCSI_FIFO);
1248                         scsicommand = SCMD_SEL_ATN3;
1249                 }
1250         }
1251 polling:
1252         /*
1253          *       Send CDB ..command block .........
1254          */
1255         if (pSRB->SRBFlag & AUTO_REQSENSE) {
1256                 trm_reg_write8(REQUEST_SENSE, TRMREG_SCSI_FIFO);
1257                 trm_reg_write8((pDCB->IdentifyMsg << 5), TRMREG_SCSI_FIFO);
1258                 trm_reg_write8(0, TRMREG_SCSI_FIFO);
1259                 trm_reg_write8(0, TRMREG_SCSI_FIFO);
1260                 trm_reg_write8(pcsio->sense_len, TRMREG_SCSI_FIFO);
1261                 trm_reg_write8(0, TRMREG_SCSI_FIFO);
1262         } else {
1263                 ptr = (u_int8_t *) pSRB->CmdBlock;
1264                 for (i = 0; i < pSRB->ScsiCmdLen ; i++) {
1265                         command = *ptr++;
1266                         trm_reg_write8(command,TRMREG_SCSI_FIFO);
1267                 }
1268         }
1269         if (trm_reg_read16(TRMREG_SCSI_STATUS) & SCSIINTERRUPT) {
1270             /*
1271              * If trm_StartSCSI return 1 :
1272              * current interrupt status is interrupt disreenable
1273              * It's said that SCSI processor has more one SRB need to do,
1274              * SCSI processor has been occupied by one SRB.
1275              */
1276                 pSRB->SRBState = SRB_READY;
1277                 return_code = 1;
1278         } else {
1279           /*
1280            * If trm_StartSCSI return 0 :
1281            * current interrupt status is interrupt enable
1282            * It's said that SCSI processor is unoccupied
1283            */
1284                 pSRB->ScsiPhase  = SCSI_NOP1; /* SCSI bus free Phase */
1285                 pACB->pActiveDCB = pDCB;
1286                 pDCB->pActiveSRB = pSRB;
1287                 return_code = 0;
1288                 trm_reg_write16(DO_DATALATCH | DO_HWRESELECT,
1289                     TRMREG_SCSI_CONTROL);/* it's important for atn stop*/
1290                 /*
1291                  * SCSI cammand
1292                  */
1293                 trm_reg_write8(scsicommand,TRMREG_SCSI_COMMAND);
1294         }
1295         return (return_code);
1296 }
1297
1298 static void
1299 trm_Interrupt(void *vpACB)
1300 {
1301         PACB            pACB;
1302         PDCB            pDCB;
1303         PSRB            pSRB;
1304         u_int16_t       phase;
1305         void            (*stateV)(PACB, PSRB, u_int16_t *);
1306         u_int16_t       scsi_status=0;
1307         u_int8_t        scsi_intstatus;
1308
1309         pACB = vpACB;
1310
1311         scsi_status = trm_reg_read16(TRMREG_SCSI_STATUS);
1312         if (!(scsi_status & SCSIINTERRUPT)) {
1313                 TRM_DPRINTF("trm_Interrupt: TRMREG_SCSI_STATUS scsi_status = NULL ,return......");
1314                 return;
1315         }
1316         TRM_DPRINTF("scsi_status=%2x,",scsi_status);
1317
1318         scsi_intstatus = trm_reg_read8(TRMREG_SCSI_INTSTATUS);
1319
1320         TRM_DPRINTF("scsi_intstatus=%2x,",scsi_intstatus);
1321
1322         if (scsi_intstatus & (INT_SELTIMEOUT | INT_DISCONNECT)) {
1323                 trm_Disconnect(pACB);
1324                 return;
1325         }
1326
1327         if (scsi_intstatus & INT_RESELECTED) {
1328                 trm_Reselect(pACB);
1329                 return;
1330         }
1331         if (scsi_intstatus & INT_SCSIRESET) {
1332                 trm_ScsiRstDetect(pACB);
1333                 return;
1334         }
1335
1336         if (scsi_intstatus & (INT_BUSSERVICE | INT_CMDDONE)) {
1337                 pDCB = pACB->pActiveDCB;
1338                 KASSERT(pDCB != NULL, ("no active DCB"));
1339                 pSRB = pDCB->pActiveSRB;
1340                 if (pDCB->DCBFlag & ABORT_DEV_)
1341                                 trm_EnableMsgOutAbort1(pACB, pSRB);
1342                 phase = (u_int16_t) pSRB->ScsiPhase;  /* phase: */
1343                 stateV = (void *) trm_SCSI_phase0[phase];
1344                 stateV(pACB, pSRB, &scsi_status);
1345                 pSRB->ScsiPhase = scsi_status & PHASEMASK;
1346                 /* phase:0,1,2,3,4,5,6,7 */
1347                 phase = (u_int16_t) scsi_status & PHASEMASK;
1348                 stateV = (void *) trm_SCSI_phase1[phase];
1349                 stateV(pACB, pSRB, &scsi_status);
1350         }
1351 }
1352
1353 static void
1354 trm_MsgOutPhase0(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
1355 {
1356
1357         if (pSRB->SRBState & (SRB_UNEXPECT_RESEL+SRB_ABORT_SENT))
1358                 *pscsi_status = PH_BUS_FREE;
1359         /*.. initial phase*/
1360 }
1361
1362 static void
1363 trm_MsgOutPhase1(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
1364 {
1365         u_int8_t        bval;
1366         u_int16_t       i, cnt;
1367         u_int8_t *      ptr;
1368         PDCB            pDCB;
1369
1370         trm_reg_write16(DO_CLRFIFO, TRMREG_SCSI_CONTROL);
1371         pDCB = pACB->pActiveDCB;
1372         if (!(pSRB->SRBState & SRB_MSGOUT)) {
1373                 cnt = pSRB->MsgCnt;
1374                 if (cnt) {
1375                         ptr = (u_int8_t *) pSRB->MsgOutBuf;
1376                         for (i = 0; i < cnt; i++) {
1377                                 trm_reg_write8(*ptr, TRMREG_SCSI_FIFO);
1378                                 ptr++;
1379                         }
1380                         pSRB->MsgCnt = 0;
1381                         if ((pDCB->DCBFlag & ABORT_DEV_) &&
1382                             (pSRB->MsgOutBuf[0] == MSG_ABORT)) {
1383                                 pSRB->SRBState = SRB_ABORT_SENT;
1384                         }
1385                 } else {
1386                         bval = MSG_ABORT;
1387                         if ((pSRB->CmdBlock[0] == INQUIRY) ||
1388                                         (pSRB->CmdBlock[0] == REQUEST_SENSE) ||
1389                                         (pSRB->SRBFlag & AUTO_REQSENSE)) {
1390                                 if (pDCB->SyncMode & SYNC_NEGO_ENABLE) {
1391                                         goto  mop1;
1392                                 }
1393                         }
1394                         trm_reg_write8(bval, TRMREG_SCSI_FIFO);
1395                 }
1396         } else {
1397 mop1:   /* message out phase */
1398                 if (!(pSRB->SRBState & SRB_DO_WIDE_NEGO)
1399                     && (pDCB->SyncMode & WIDE_NEGO_ENABLE)) {
1400                   /*
1401                    * WIDE DATA TRANSFER REQUEST code (03h)
1402                    */
1403                         pDCB->SyncMode &= ~(SYNC_NEGO_DONE | EN_ATN_STOP);
1404                         trm_reg_write8((pDCB->IdentifyMsg & 0xBF),
1405                             TRMREG_SCSI_FIFO);
1406                         trm_reg_write8(MSG_EXTENDED,TRMREG_SCSI_FIFO);
1407                         /* (01h) */
1408                         trm_reg_write8(2,TRMREG_SCSI_FIFO);
1409                         /* Message length (02h) */
1410                         trm_reg_write8(3,TRMREG_SCSI_FIFO);
1411                         /* wide data xfer (03h) */
1412                         trm_reg_write8(1,TRMREG_SCSI_FIFO);
1413                         /* width:0(8bit),1(16bit),2(32bit) */
1414                         pSRB->SRBState |= SRB_DO_WIDE_NEGO;
1415                 } else if (!(pSRB->SRBState & SRB_DO_SYNC_NEGO)
1416                     && (pDCB->SyncMode & SYNC_NEGO_ENABLE)) {
1417                   /*
1418                    * SYNCHRONOUS DATA TRANSFER REQUEST code (01h)
1419                    */
1420                         if (!(pDCB->SyncMode & WIDE_NEGO_DONE))
1421                                 trm_reg_write8((pDCB->IdentifyMsg & 0xBF),
1422                                                 TRMREG_SCSI_FIFO);
1423                         trm_reg_write8(MSG_EXTENDED,TRMREG_SCSI_FIFO);
1424                   /* (01h) */
1425                         trm_reg_write8(3,TRMREG_SCSI_FIFO);
1426                   /* Message length (03h) */
1427                         trm_reg_write8(1,TRMREG_SCSI_FIFO);
1428                   /* SYNCHRONOUS DATA TRANSFER REQUEST code (01h) */
1429                         trm_reg_write8(pDCB->MaxNegoPeriod,TRMREG_SCSI_FIFO);
1430                   /* Transfer peeriod factor */
1431                         trm_reg_write8((pACB->AdaptType == 1) ? 31 : 15,
1432                             TRMREG_SCSI_FIFO);
1433                   /* REQ/ACK offset */
1434                         pSRB->SRBState |= SRB_DO_SYNC_NEGO;
1435                 }
1436         }
1437         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1438         /* it's important for atn stop */
1439         /*
1440          * SCSI cammand
1441          */
1442         trm_reg_write8(SCMD_FIFO_OUT, TRMREG_SCSI_COMMAND);
1443 }
1444
1445 static void
1446 trm_CommandPhase0(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
1447 {
1448
1449 }
1450
1451 static void
1452 trm_CommandPhase1(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
1453 {
1454         PDCB                    pDCB;
1455         u_int8_t *              ptr;
1456         u_int16_t               i, cnt;
1457         union  ccb              *pccb;
1458         struct ccb_scsiio       *pcsio;
1459
1460         pccb  = pSRB->pccb;
1461         pcsio = &pccb->csio;
1462
1463         trm_reg_write16(DO_CLRATN | DO_CLRFIFO , TRMREG_SCSI_CONTROL);
1464         if (!(pSRB->SRBFlag & AUTO_REQSENSE)) {
1465                 cnt = (u_int16_t) pSRB->ScsiCmdLen;
1466                 ptr = (u_int8_t *) pSRB->CmdBlock;
1467                 for (i = 0; i < cnt; i++) {
1468                         trm_reg_write8(*ptr, TRMREG_SCSI_FIFO);
1469                         ptr++;
1470                 }
1471         } else {
1472                 trm_reg_write8(REQUEST_SENSE, TRMREG_SCSI_FIFO);
1473                 pDCB = pACB->pActiveDCB;
1474                 /* target id */
1475                 trm_reg_write8((pDCB->IdentifyMsg << 5), TRMREG_SCSI_FIFO);
1476                 trm_reg_write8(0, TRMREG_SCSI_FIFO);
1477                 trm_reg_write8(0, TRMREG_SCSI_FIFO);
1478                 /* sizeof(struct scsi_sense_data) */
1479                 trm_reg_write8(pcsio->sense_len, TRMREG_SCSI_FIFO);
1480                 trm_reg_write8(0, TRMREG_SCSI_FIFO);
1481         }
1482         pSRB->SRBState = SRB_COMMAND;
1483         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1484         /* it's important for atn stop*/
1485         /*
1486          * SCSI cammand
1487          */
1488         trm_reg_write8(SCMD_FIFO_OUT, TRMREG_SCSI_COMMAND);
1489 }
1490
1491 static void
1492 trm_DataOutPhase0(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
1493 {
1494         PDCB            pDCB;
1495         u_int8_t        TempDMAstatus,SGIndexTemp;
1496         u_int16_t       scsi_status;
1497         PSEG            pseg;
1498         u_long          TempSRBXferredLength,dLeftCounter=0;
1499
1500         pDCB = pSRB->pSRBDCB;
1501         scsi_status = *pscsi_status;
1502
1503         if (!(pSRB->SRBState & SRB_XFERPAD)) {
1504                 if (scsi_status & PARITYERROR)
1505                         pSRB->SRBStatus |= PARITY_ERROR;
1506                 if (!(scsi_status & SCSIXFERDONE)) {
1507                   /*
1508                    * when data transfer from DMA FIFO to SCSI FIFO
1509                    * if there was some data left in SCSI FIFO
1510                    */
1511                         dLeftCounter = (u_long)
1512                           (trm_reg_read8(TRMREG_SCSI_FIFOCNT) & 0x3F);
1513                         if (pDCB->SyncPeriod & WIDE_SYNC) {
1514                           /*
1515                            * if WIDE scsi SCSI FIFOCNT unit is word
1516                            * so need to * 2
1517                            */
1518                                 dLeftCounter <<= 1;
1519                         }
1520                 }
1521                 /*
1522                  * caculate all the residue data that not yet tranfered
1523                  * SCSI transfer counter + left in SCSI FIFO data
1524                  *
1525                  * .....TRM_SCSI_COUNTER (24bits)
1526                  * The counter always decrement by one for every SCSI byte
1527                  *transfer.
1528                  * .....TRM_SCSI_FIFOCNT (5bits)
1529                  * The counter is SCSI FIFO offset counter
1530                  */
1531                 dLeftCounter += trm_reg_read32(TRMREG_SCSI_COUNTER);
1532                 if (dLeftCounter == 1) {
1533                         dLeftCounter = 0;
1534                         trm_reg_write16(DO_CLRFIFO,TRMREG_SCSI_CONTROL);
1535                 }
1536                 if ((dLeftCounter == 0) ||
1537                     (scsi_status & SCSIXFERCNT_2_ZERO)) {
1538                         TempDMAstatus = trm_reg_read8(TRMREG_DMA_STATUS);
1539                         while (!(TempDMAstatus & DMAXFERCOMP)) {
1540                                 TempDMAstatus =
1541                                   trm_reg_read8(TRMREG_DMA_STATUS);
1542                         }
1543                         pSRB->SRBTotalXferLength = 0;
1544                 } else {
1545                   /* Update SG list             */
1546                   /*
1547                    * if transfer not yet complete
1548                    * there were some data residue in SCSI FIFO or
1549                    * SCSI transfer counter not empty
1550                    */
1551                         if (pSRB->SRBTotalXferLength != dLeftCounter) {
1552                           /*
1553                            * data that had transferred length
1554                            */
1555                                 TempSRBXferredLength =
1556                                   pSRB->SRBTotalXferLength - dLeftCounter;
1557                                 /*
1558                                  * next time to be transferred length
1559                                  */
1560                                 pSRB->SRBTotalXferLength = dLeftCounter;
1561                                 /*
1562                                  * parsing from last time disconnect SRBSGIndex
1563                                  */
1564                                 pseg =
1565                                   pSRB->pSRBSGL + pSRB->SRBSGIndex;
1566                                 for (SGIndexTemp = pSRB->SRBSGIndex;
1567                                     SGIndexTemp < pSRB->SRBSGCount;
1568                                     SGIndexTemp++) {
1569                                         /*
1570                                          * find last time which SG transfer be
1571                                          * disconnect
1572                                          */
1573                                         if (TempSRBXferredLength >=
1574                                             pseg->length)
1575                                                 TempSRBXferredLength -=
1576                                                   pseg->length;
1577                                         else {
1578                                           /*
1579                                            * update last time disconnected SG
1580                                            * list
1581                                            */
1582                                                 pseg->length -=
1583                                                   TempSRBXferredLength;
1584                                                 /* residue data length  */
1585                                                 pseg->address +=
1586                                                   TempSRBXferredLength;
1587                                                 /* residue data pointer */
1588                                                 pSRB->SRBSGIndex = SGIndexTemp;
1589                                                 break;
1590                                         }
1591                                         pseg++;
1592                                 }
1593                         }
1594                 }
1595         }
1596         trm_reg_write8(STOPDMAXFER ,TRMREG_DMA_CONTROL);
1597 }
1598
1599
1600 static void
1601 trm_DataOutPhase1(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
1602 {
1603         u_int16_t       ioDir;
1604         /*
1605          * do prepare befor transfer when data out phase
1606          */
1607
1608         ioDir = XFERDATAOUT;
1609         trm_DataIO_transfer(pACB, pSRB, ioDir);
1610 }
1611
1612 static void
1613 trm_DataInPhase0(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
1614 {
1615         u_int8_t        TempDMAstatus, SGIndexTemp;
1616         u_int16_t       scsi_status;
1617         PSEG            pseg;
1618         u_long          TempSRBXferredLength,dLeftCounter = 0;
1619
1620         scsi_status = *pscsi_status;
1621         if (!(pSRB->SRBState & SRB_XFERPAD)) {
1622                 if (scsi_status & PARITYERROR)
1623                         pSRB->SRBStatus |= PARITY_ERROR;
1624                 dLeftCounter += trm_reg_read32(TRMREG_SCSI_COUNTER);
1625                 if ((dLeftCounter == 0) || (scsi_status & SCSIXFERCNT_2_ZERO)) {
1626                         TempDMAstatus = trm_reg_read8(TRMREG_DMA_STATUS);
1627                         while (!(TempDMAstatus & DMAXFERCOMP))
1628                                 TempDMAstatus = trm_reg_read8(TRMREG_DMA_STATUS);
1629                         pSRB->SRBTotalXferLength = 0;
1630                 } else {
1631                   /*
1632                    * parsing the case:
1633                    * when a transfer not yet complete
1634                    * but be disconnected by uper layer
1635                    * if transfer not yet complete
1636                    * there were some data residue in SCSI FIFO or
1637                    * SCSI transfer counter not empty
1638                    */
1639                   if (pSRB->SRBTotalXferLength != dLeftCounter) {
1640                                 /*
1641                                  * data that had transferred length
1642                                  */
1643                         TempSRBXferredLength =
1644                           pSRB->SRBTotalXferLength - dLeftCounter;
1645                                 /*
1646                                  * next time to be transferred length
1647                                  */
1648                         pSRB->SRBTotalXferLength = dLeftCounter;
1649                                 /*
1650                                  * parsing from last time disconnect SRBSGIndex
1651                                  */
1652                         pseg = pSRB->pSRBSGL + pSRB->SRBSGIndex;
1653                         for (SGIndexTemp = pSRB->SRBSGIndex;
1654                             SGIndexTemp < pSRB->SRBSGCount;
1655                             SGIndexTemp++) {
1656                           /*
1657                            * find last time which SG transfer be disconnect
1658                            */
1659                                 if (TempSRBXferredLength >= pseg->length)
1660                                         TempSRBXferredLength -= pseg->length;
1661                                 else {
1662                                   /*
1663                                    * update last time disconnected SG list
1664                                    */
1665                                         pseg->length -= TempSRBXferredLength;
1666                                         /* residue data length  */
1667                                         pseg->address += TempSRBXferredLength;
1668                                         /* residue data pointer */
1669                                         pSRB->SRBSGIndex = SGIndexTemp;
1670                                         break;
1671                                 }
1672                                 pseg++;
1673                         }
1674                   }
1675                 }
1676         }
1677 }
1678
1679 static void
1680 trm_DataInPhase1(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
1681 {
1682         u_int16_t       ioDir;
1683         /*
1684          * do prepare befor transfer when data in phase
1685          */
1686
1687         ioDir = XFERDATAIN;
1688         trm_DataIO_transfer(pACB, pSRB, ioDir);
1689 }
1690
1691 static void
1692 trm_DataIO_transfer(PACB pACB, PSRB pSRB, u_int16_t ioDir)
1693 {
1694         u_int8_t        bval;
1695         PDCB            pDCB;
1696
1697         pDCB = pSRB->pSRBDCB;
1698         if (pSRB->SRBSGIndex < pSRB->SRBSGCount) {
1699                 if (pSRB->SRBTotalXferLength != 0) {
1700                         /*
1701                          * load what physical address of Scatter/Gather list
1702                          table want to be transfer
1703                          */
1704                         TRM_DPRINTF(" SG->address=%8x \n",pSRB->pSRBSGL->address);
1705                         TRM_DPRINTF(" SG->length=%8x \n",pSRB->pSRBSGL->length);
1706                         TRM_DPRINTF(" pDCB->SyncPeriod=%x \n",pDCB->SyncPeriod);
1707                         TRM_DPRINTF(" pSRB->pSRBSGL=%8x \n",(unsigned int)pSRB->pSRBSGL);
1708                         TRM_DPRINTF(" pSRB->SRBSGPhyAddr=%8x \n",pSRB->SRBSGPhyAddr);
1709                         TRM_DPRINTF(" pSRB->SRBSGIndex=%d \n",pSRB->SRBSGIndex);
1710                         TRM_DPRINTF(" pSRB->SRBSGCount=%d \n",pSRB->SRBSGCount);
1711                         TRM_DPRINTF(" pSRB->SRBTotalXferLength=%d \n",pSRB->SRBTotalXferLength);
1712
1713                         pSRB->SRBState = SRB_DATA_XFER;
1714                         trm_reg_write32(0, TRMREG_DMA_XHIGHADDR);
1715                         trm_reg_write32(
1716                             (pSRB->SRBSGPhyAddr +
1717                              ((u_long)pSRB->SRBSGIndex << 3)),
1718                             TRMREG_DMA_XLOWADDR);
1719                         /*
1720                          * load how many bytes in the Scatter/Gather
1721                          * list table
1722                          */
1723                         trm_reg_write32(
1724                             ((u_long)(pSRB->SRBSGCount - pSRB->SRBSGIndex) << 3),
1725                             TRMREG_DMA_XCNT);
1726                         /*
1727                          * load total transfer length (24bits) max value
1728                          * 16Mbyte
1729                          */
1730                         trm_reg_write32(pSRB->SRBTotalXferLength,
1731                             TRMREG_SCSI_COUNTER);
1732                         /* Start DMA transfer */
1733                         trm_reg_write16(ioDir, TRMREG_DMA_COMMAND);
1734                         /* Start SCSI transfer */
1735                         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1736                         /* it's important for atn stop */
1737                         /*
1738                          * SCSI cammand
1739                          */
1740                         bval = (ioDir == XFERDATAOUT) ?
1741                           SCMD_DMA_OUT : SCMD_DMA_IN;
1742                         trm_reg_write8(bval, TRMREG_SCSI_COMMAND);
1743                 } else {
1744                   /* xfer pad */
1745                         if (pSRB->SRBSGCount) {
1746                                 pSRB->AdaptStatus = H_OVER_UNDER_RUN;
1747                                 pSRB->SRBStatus |= OVER_RUN;
1748                         }
1749                         if (pDCB->SyncPeriod & WIDE_SYNC)
1750                                 trm_reg_write32(2,TRMREG_SCSI_COUNTER);
1751                         else
1752                                 trm_reg_write32(1,TRMREG_SCSI_COUNTER);
1753                         if (ioDir == XFERDATAOUT)
1754                                 trm_reg_write16(0, TRMREG_SCSI_FIFO);
1755                         else
1756                                 trm_reg_read16(TRMREG_SCSI_FIFO);
1757                         pSRB->SRBState |= SRB_XFERPAD;
1758                         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1759                         /* it's important for atn stop */
1760                         /*
1761                          * SCSI cammand
1762                          */
1763                         bval = (ioDir == XFERDATAOUT) ?
1764                           SCMD_FIFO_OUT : SCMD_FIFO_IN;
1765                         trm_reg_write8(bval, TRMREG_SCSI_COMMAND);
1766                 }
1767         }
1768 }
1769
1770 static void
1771 trm_StatusPhase0(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
1772 {
1773
1774         pSRB->TargetStatus = trm_reg_read8(TRMREG_SCSI_FIFO);
1775         pSRB->SRBState = SRB_COMPLETED;
1776         *pscsi_status = PH_BUS_FREE;
1777         /*.. initial phase*/
1778         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1779         /* it's important for atn stop */
1780         /*
1781          * SCSI cammand
1782          */
1783         trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
1784 }
1785
1786
1787
1788 static void
1789 trm_StatusPhase1(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
1790 {
1791
1792         if (trm_reg_read16(TRMREG_DMA_COMMAND) & 0x0001) {
1793                 if (!(trm_reg_read8(TRMREG_SCSI_FIFOCNT) & 0x40))
1794                         trm_reg_write16(DO_CLRFIFO, TRMREG_SCSI_CONTROL);
1795                 if (!(trm_reg_read16(TRMREG_DMA_FIFOCNT) & 0x8000))
1796                         trm_reg_write8(CLRXFIFO, TRMREG_DMA_CONTROL);
1797         } else {
1798                 if (!(trm_reg_read16(TRMREG_DMA_FIFOCNT) & 0x8000))
1799                         trm_reg_write8(CLRXFIFO, TRMREG_DMA_CONTROL);
1800                 if (!(trm_reg_read8(TRMREG_SCSI_FIFOCNT) & 0x40))
1801                         trm_reg_write16(DO_CLRFIFO, TRMREG_SCSI_CONTROL);
1802         }
1803         pSRB->SRBState = SRB_STATUS;
1804         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1805         /* it's important for atn stop */
1806         /*
1807          * SCSI cammand
1808          */
1809         trm_reg_write8(SCMD_COMP, TRMREG_SCSI_COMMAND);
1810 }
1811
1812 /*
1813  *scsiiom
1814  *       trm_MsgInPhase0: one of trm_SCSI_phase0[] vectors
1815  *            stateV = (void *) trm_SCSI_phase0[phase]
1816  *                         if phase =7
1817  * extended message codes:
1818  *
1819  *   code        description
1820  *
1821  *    02h        Reserved
1822  *    00h        MODIFY DATA  POINTER
1823  *    01h        SYNCHRONOUS DATA TRANSFER REQUEST
1824  *    03h        WIDE DATA TRANSFER REQUEST
1825  * 04h - 7Fh     Reserved
1826  * 80h - FFh     Vendor specific
1827  *
1828  */
1829
1830 static void
1831 trm_MsgInPhase0(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
1832 {
1833         u_int8_t        message_in_code,bIndex,message_in_tag_id;
1834         PDCB            pDCB;
1835         PSRB            pSRBTemp;
1836
1837         pDCB = pACB->pActiveDCB;
1838
1839         message_in_code = trm_reg_read8(TRMREG_SCSI_FIFO);
1840         if (!(pSRB->SRBState & SRB_EXTEND_MSGIN)) {
1841                 if (message_in_code == MSG_DISCONNECT) {
1842                         pSRB->SRBState = SRB_DISCONNECT;
1843                         *pscsi_status = PH_BUS_FREE; /* .. initial phase */
1844                         /* it's important for atn stop */
1845                         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1846                         /*
1847                          * SCSI command
1848                          */
1849                         trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
1850                         return;
1851                 } else if (message_in_code == MSG_SAVE_PTR) {
1852                         *pscsi_status = PH_BUS_FREE; /* .. initial phase */
1853                         /* it's important for atn stop */
1854                         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1855                         /*
1856                          * SCSI command
1857                          */
1858                         trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
1859                         return;
1860                 } else if ((message_in_code == MSG_EXTENDED) ||
1861                     ((message_in_code >= MSG_SIMPLE_QTAG) &&
1862                      (message_in_code <= MSG_ORDER_QTAG))) {
1863                         pSRB->SRBState |= SRB_EXTEND_MSGIN;
1864                         pSRB->MsgInBuf[0] = message_in_code;
1865                         /* extended message      (01h) */
1866                         pSRB->MsgCnt = 1;
1867                         pSRB->pMsgPtr = &pSRB->MsgInBuf[1];
1868                         /* extended message length (n) */
1869                         *pscsi_status = PH_BUS_FREE; /* .. initial phase */
1870                         /* it's important for atn stop */
1871                         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1872                         /*
1873                          * SCSI command
1874                          */
1875                         trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
1876                         return;
1877                 } else if (message_in_code == MSG_REJECT_) {
1878                         /* Reject message */
1879                         if (pDCB->SyncMode & WIDE_NEGO_ENABLE) {
1880                           /* do wide nego reject */
1881                                 pDCB = pSRB->pSRBDCB;
1882                                 pDCB->SyncMode |= WIDE_NEGO_DONE;
1883                                 pDCB->SyncMode &= ~(SYNC_NEGO_DONE |
1884                                     EN_ATN_STOP | WIDE_NEGO_ENABLE);
1885                                 pSRB->SRBState &= ~(SRB_DO_WIDE_NEGO+SRB_MSGIN);
1886                                 if ((pDCB->SyncMode & SYNC_NEGO_ENABLE)
1887                                     && !(pDCB->SyncMode & SYNC_NEGO_DONE)) {
1888                                   /* Set ATN, in case ATN was clear */
1889                                         pSRB->SRBState |= SRB_MSGOUT;
1890                                         trm_reg_write16(
1891                                             DO_SETATN,
1892                                             TRMREG_SCSI_CONTROL);
1893                                 } else {
1894                                   /* Clear ATN */
1895                                         trm_reg_write16(
1896                                             DO_CLRATN,
1897                                             TRMREG_SCSI_CONTROL);
1898                                 }
1899                         } else if (pDCB->SyncMode & SYNC_NEGO_ENABLE) {
1900                           /* do sync nego reject */
1901                                 trm_reg_write16(DO_CLRATN,TRMREG_SCSI_CONTROL);
1902                                 if (pSRB->SRBState & SRB_DO_SYNC_NEGO) {
1903                                         pDCB = pSRB->pSRBDCB;
1904                                         pDCB->SyncMode &=
1905                                           ~(SYNC_NEGO_ENABLE+SYNC_NEGO_DONE);
1906                                         pDCB->SyncPeriod = 0;
1907                                         pDCB->SyncOffset = 0;
1908                                         /*
1909                                          *
1910                                          *   program SCSI control register
1911                                          *
1912                                          */
1913                                         trm_reg_write8(pDCB->SyncPeriod,
1914                                             TRMREG_SCSI_SYNC);
1915                                         trm_reg_write8(pDCB->SyncOffset,
1916                                             TRMREG_SCSI_OFFSET);
1917                                         trm_SetXferRate(pACB,pSRB,pDCB);
1918                                 }
1919                         }
1920                         *pscsi_status = PH_BUS_FREE; /* .. initial phase */
1921                         /* it's important for atn stop */
1922                         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1923                         /*
1924                          * SCSI command
1925                          */
1926                         trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
1927                         return;
1928                 } else if (message_in_code == MSG_IGNOREWIDE) {
1929                         trm_reg_write32(1, TRMREG_SCSI_COUNTER);
1930                         trm_reg_read8(TRMREG_SCSI_FIFO);
1931                         *pscsi_status = PH_BUS_FREE; /* .. initial phase */
1932                         /* it's important for atn stop */
1933                         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1934                         /*
1935                          * SCSI command
1936                          */
1937                         trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
1938                         return;
1939                 } else {
1940                   /* Restore data pointer message */
1941                   /* Save data pointer message    */
1942                   /* Completion message           */
1943                   /* NOP message                  */
1944                         *pscsi_status = PH_BUS_FREE; /* .. initial phase */
1945                         /* it's important for atn stop */
1946                         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
1947                         /*
1948                          * SCSI command
1949                          */
1950                         trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
1951                         return;
1952                 }
1953         } else {
1954           /*
1955            * Parsing incomming extented messages
1956            */
1957                 *pSRB->pMsgPtr = message_in_code;
1958                 pSRB->MsgCnt++;
1959                 pSRB->pMsgPtr++;
1960                 TRM_DPRINTF("pSRB->MsgInBuf[0]=%2x \n ",pSRB->MsgInBuf[0]);
1961                 TRM_DPRINTF("pSRB->MsgInBuf[1]=%2x \n ",pSRB->MsgInBuf[1]);
1962                 TRM_DPRINTF("pSRB->MsgInBuf[2]=%2x \n ",pSRB->MsgInBuf[2]);
1963                 TRM_DPRINTF("pSRB->MsgInBuf[3]=%2x \n ",pSRB->MsgInBuf[3]);
1964                 TRM_DPRINTF("pSRB->MsgInBuf[4]=%2x \n ",pSRB->MsgInBuf[4]);
1965                 if ((pSRB->MsgInBuf[0] >= MSG_SIMPLE_QTAG)
1966                     && (pSRB->MsgInBuf[0] <= MSG_ORDER_QTAG)) {
1967                   /*
1968                    * is QUEUE tag message :
1969                    *
1970                    * byte 0:
1971                    * HEAD    QUEUE TAG (20h)
1972                    * ORDERED QUEUE TAG (21h)
1973                    * SIMPLE  QUEUE TAG (22h)
1974                    * byte 1:
1975                    * Queue tag (00h - FFh)
1976                    */
1977                         if (pSRB->MsgCnt == 2) {
1978                                 pSRB->SRBState = 0;
1979                                 message_in_tag_id = pSRB->MsgInBuf[1];
1980                                 pSRB = pDCB->pGoingSRB;
1981                                 pSRBTemp = pDCB->pGoingLastSRB;
1982                                 if (pSRB) {
1983                                         for (;;) {
1984                                                 if (pSRB->TagNumber !=
1985                                                     message_in_tag_id) {
1986                                                         if (pSRB == pSRBTemp) {
1987                                                                 goto  mingx0;
1988                                                         }
1989                                                         pSRB = pSRB->pNextSRB;
1990                                                 } else
1991                                                         break;
1992                                         }
1993                                         if (pDCB->DCBFlag & ABORT_DEV_) {
1994                                                 pSRB->SRBState = SRB_ABORT_SENT;
1995                                                 trm_EnableMsgOutAbort1(
1996                                                     pACB, pSRB);
1997                                         }
1998                                         if (!(pSRB->SRBState & SRB_DISCONNECT)) {
1999                                                 TRM_DPRINTF("SRB not yet disconnect........ \n ");
2000                                                 goto  mingx0;
2001                                         }
2002                                         pDCB->pActiveSRB = pSRB;
2003                                         pSRB->SRBState = SRB_DATA_XFER;
2004                                 } else {
2005 mingx0:
2006                                         pSRB = &pACB->TmpSRB;
2007                                         pSRB->SRBState = SRB_UNEXPECT_RESEL;
2008                                         pDCB->pActiveSRB = pSRB;
2009                                         pSRB->MsgOutBuf[0] = MSG_ABORT_TAG;
2010                                         trm_EnableMsgOutAbort2(
2011                                             pACB,
2012                                             pSRB);
2013                                 }
2014                         }
2015                         *pscsi_status = PH_BUS_FREE;
2016                         /* .. initial phase */
2017                         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
2018                         /* it's important for atn stop */
2019                         /*
2020                          * SCSI command
2021                          */
2022                         trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
2023                         return;
2024                 } else if ((pSRB->MsgInBuf[0] == MSG_EXTENDED) &&
2025                     (pSRB->MsgInBuf[2] == 3) && (pSRB->MsgCnt == 4)) {
2026                   /*
2027                    * is Wide data xfer Extended message :
2028                    * ======================================
2029                    * WIDE DATA TRANSFER REQUEST
2030                    * ======================================
2031                    * byte 0 :  Extended message (01h)
2032                    * byte 1 :  Extended message length (02h)
2033                    * byte 2 :  WIDE DATA TRANSFER code (03h)
2034                    * byte 3 :  Transfer width exponent
2035                    */
2036                         pDCB = pSRB->pSRBDCB;
2037                         pSRB->SRBState &= ~(SRB_EXTEND_MSGIN+SRB_DO_WIDE_NEGO);
2038                         if ((pSRB->MsgInBuf[1] != 2)) {
2039                           /* Length is wrong, reject it  */
2040                                 pDCB->SyncMode &=
2041                                   ~(WIDE_NEGO_ENABLE+WIDE_NEGO_DONE);
2042                                 pSRB->MsgCnt = 1;
2043                                 pSRB->MsgInBuf[0] = MSG_REJECT_;
2044                                 trm_reg_write16(DO_SETATN, TRMREG_SCSI_CONTROL);
2045                                 *pscsi_status = PH_BUS_FREE; /* .. initial phase */
2046                                 /* it's important for atn stop */
2047                                 trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
2048                                 /*
2049                                  * SCSI command
2050                                  */
2051                                 trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
2052                                 return;
2053                         }
2054                         if (pDCB->SyncMode & WIDE_NEGO_ENABLE) {
2055                           /* Do wide negoniation */
2056                                 if (pSRB->MsgInBuf[3] > 2) {
2057                                   /* > 32 bit   */
2058                                   /* reject_msg: */
2059                                         pDCB->SyncMode &=
2060                                           ~(WIDE_NEGO_ENABLE+WIDE_NEGO_DONE);
2061                                         pSRB->MsgCnt = 1;
2062                                         pSRB->MsgInBuf[0] = MSG_REJECT_;
2063                                         trm_reg_write16(DO_SETATN,
2064                                             TRMREG_SCSI_CONTROL);
2065                                         *pscsi_status = PH_BUS_FREE; /* .. initial phase */
2066                                         /* it's important for atn stop */
2067                                         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
2068                                         /*
2069                                          * SCSI command
2070                                          */
2071                                         trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
2072                                         return;
2073                                 }
2074                                 if (pSRB->MsgInBuf[3] == 2) {
2075                                         pSRB->MsgInBuf[3] = 1;
2076                                         /* do 16 bits   */
2077                                 } else {
2078                                         if (!(pDCB->SyncMode
2079                                               & WIDE_NEGO_DONE)) {
2080                                                 pSRB->SRBState &=
2081                                                   ~(SRB_DO_WIDE_NEGO+SRB_MSGIN);
2082                                                 pDCB->SyncMode |=
2083                                                   WIDE_NEGO_DONE;
2084                                                 pDCB->SyncMode &=
2085                                                   ~(SYNC_NEGO_DONE |
2086                                                       EN_ATN_STOP |
2087                                                       WIDE_NEGO_ENABLE);
2088                                                 if (pSRB->MsgInBuf[3] != 0) {
2089                                                   /* is Wide data xfer */
2090                                                         pDCB->SyncPeriod |=
2091                                                           WIDE_SYNC;
2092                                                         pDCB->tinfo.current.width
2093                                                           = MSG_EXT_WDTR_BUS_16_BIT;
2094                                                         pDCB->tinfo.goal.width
2095                                                           = MSG_EXT_WDTR_BUS_16_BIT;
2096                                                 }
2097                                         }
2098                                 }
2099                         } else
2100                                 pSRB->MsgInBuf[3] = 0;
2101                         pSRB->SRBState |= SRB_MSGOUT;
2102                         trm_reg_write16(DO_SETATN,TRMREG_SCSI_CONTROL);
2103                         *pscsi_status = PH_BUS_FREE; /* .. initial phase */
2104                         /* it's important for atn stop */
2105                         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
2106                         /*
2107                          * SCSI command
2108                          */
2109                         trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
2110                         return;
2111                 } else if ((pSRB->MsgInBuf[0] == MSG_EXTENDED) &&
2112                     (pSRB->MsgInBuf[2] == 1) && (pSRB->MsgCnt == 5)) {
2113                         /*
2114                          * is 8bit transfer Extended message :
2115                          * =================================
2116                          * SYNCHRONOUS DATA TRANSFER REQUEST
2117                          * =================================
2118                          * byte 0 :  Extended message (01h)
2119                          * byte 1 :  Extended message length (03)
2120                          * byte 2 :  SYNCHRONOUS DATA TRANSFER code (01h)
2121                          * byte 3 :  Transfer period factor
2122                          * byte 4 :  REQ/ACK offset
2123                          */
2124                         pSRB->SRBState &= ~(SRB_EXTEND_MSGIN+SRB_DO_SYNC_NEGO);
2125                         if ((pSRB->MsgInBuf[1] != 3) ||
2126                             (pSRB->MsgInBuf[2] != 1)) {
2127                           /* reject_msg: */
2128                                 pSRB->MsgCnt = 1;
2129                                 pSRB->MsgInBuf[0] = MSG_REJECT_;
2130                                 trm_reg_write16(DO_SETATN, TRMREG_SCSI_CONTROL);
2131                                 *pscsi_status = PH_BUS_FREE;
2132                                 /* .. initial phase */
2133                                 trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
2134                                 /* it's important for atn stop */
2135                                 /*
2136                                  * SCSI cammand
2137                                  */
2138                                 trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
2139                                 return;
2140                         } else if (!(pSRB->MsgInBuf[3]) || !(pSRB->MsgInBuf[4])) {
2141                                 /* set async */
2142                                 pDCB = pSRB->pSRBDCB;
2143                                 /* disable sync & sync nego */
2144                                 pDCB->SyncMode &=
2145                                   ~(SYNC_NEGO_ENABLE+SYNC_NEGO_DONE);
2146                                 pDCB->SyncPeriod = 0;
2147                                 pDCB->SyncOffset = 0;
2148                                 pDCB->tinfo.goal.period = 0;
2149                                 pDCB->tinfo.goal.offset = 0;
2150                                 pDCB->tinfo.current.period = 0;
2151                                 pDCB->tinfo.current.offset = 0;
2152                                 pDCB->tinfo.current.width =
2153                                   MSG_EXT_WDTR_BUS_8_BIT;
2154                                 /*
2155                                  *
2156                                  *   program SCSI control register
2157                                  *
2158                                  */
2159                                 trm_reg_write8(pDCB->SyncPeriod,TRMREG_SCSI_SYNC);
2160                                 trm_reg_write8(pDCB->SyncOffset,TRMREG_SCSI_OFFSET);
2161                                 trm_SetXferRate(pACB,pSRB,pDCB);
2162                                 *pscsi_status = PH_BUS_FREE;
2163                                 /* .. initial phase */
2164                                 trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
2165                                 /* it's important for atn stop */
2166                                 /*
2167                                  * SCSI cammand
2168                                  */
2169                                 trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
2170                                 return;
2171                         } else {
2172                                 /* set sync */
2173                                 pDCB = pSRB->pSRBDCB;
2174                                 pDCB->SyncMode |=
2175                                   SYNC_NEGO_ENABLE+SYNC_NEGO_DONE;
2176                                 pDCB->MaxNegoPeriod = pSRB->MsgInBuf[3];
2177                                 /* Transfer period factor */
2178                                 pDCB->SyncOffset = pSRB->MsgInBuf[4];
2179                                 /* REQ/ACK offset */
2180                                 if (pACB->AdaptType == 1) {
2181                                         for(bIndex = 0; bIndex < 7; bIndex++) {
2182                                                 if (pSRB->MsgInBuf[3] <=
2183                                            dc395u2x_clock_period[bIndex]) {
2184                                             pDCB->tinfo.goal.period =
2185                                                 dc395u2x_tinfo_period[bIndex];
2186                                             pDCB->tinfo.current.period =
2187                                                 dc395u2x_tinfo_period[bIndex];
2188                                         pDCB->tinfo.goal.offset =
2189                                             pDCB->SyncOffset;
2190                                         pDCB->tinfo.current.offset =
2191                                             pDCB->SyncOffset;
2192                                         pDCB->SyncPeriod |= (bIndex|LVDS_SYNC);
2193                                         break;
2194                                                 }
2195                                         }
2196                                 } else {
2197                                         for(bIndex = 0; bIndex < 7; bIndex++) {
2198                                                 if (pSRB->MsgInBuf[3] <=
2199                                                  dc395x_clock_period[bIndex]) {
2200                                                    pDCB->tinfo.goal.period =
2201                                                 dc395x_tinfo_period[bIndex];
2202                                                    pDCB->tinfo.current.period =
2203                                                 dc395x_tinfo_period[bIndex];
2204                                                    pDCB->tinfo.goal.offset =
2205                                                 pDCB->SyncOffset;
2206                                                    pDCB->tinfo.current.offset =
2207                                                        pDCB->SyncOffset;
2208                                                    pDCB->SyncPeriod |=
2209                                                        (bIndex|ALT_SYNC);
2210                                                    break;
2211                                                 }
2212                                         }
2213                                 }
2214                                 /*
2215                                  *
2216                                  *   program SCSI control register
2217                                  *
2218                                  */
2219                                 trm_reg_write8(pDCB->SyncPeriod,
2220                                     TRMREG_SCSI_SYNC);
2221                                 trm_reg_write8(pDCB->SyncOffset,
2222                                     TRMREG_SCSI_OFFSET);
2223                                 trm_SetXferRate(pACB,pSRB,pDCB);
2224                                 *pscsi_status=PH_BUS_FREE;/*.. initial phase*/
2225                                 trm_reg_write16(DO_DATALATCH,TRMREG_SCSI_CONTROL);/* it's important for atn stop*/
2226                     /*
2227                      * SCSI command
2228                      */
2229                                 trm_reg_write8(SCMD_MSGACCEPT,TRMREG_SCSI_COMMAND);
2230                                 return;
2231                         }
2232                 }
2233         *pscsi_status = PH_BUS_FREE;
2234         /* .. initial phase */
2235         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
2236         /* it's important for atn stop */
2237         /*
2238          * SCSI cammand
2239          */
2240         trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
2241         }
2242 }
2243
2244 static void
2245 trm_MsgInPhase1(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
2246 {
2247
2248         trm_reg_write16(DO_CLRFIFO, TRMREG_SCSI_CONTROL);
2249         trm_reg_write32(1,TRMREG_SCSI_COUNTER);
2250         if (!(pSRB->SRBState & SRB_MSGIN)) {
2251                 pSRB->SRBState &= SRB_DISCONNECT;
2252                 pSRB->SRBState |= SRB_MSGIN;
2253         }
2254         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
2255         /* it's important for atn stop*/
2256         /*
2257          * SCSI cammand
2258          */
2259         trm_reg_write8(SCMD_FIFO_IN, TRMREG_SCSI_COMMAND);
2260 }
2261
2262 static void
2263 trm_Nop0(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
2264 {
2265
2266 }
2267
2268 static void
2269 trm_Nop1(PACB pACB, PSRB pSRB, u_int16_t *pscsi_status)
2270 {
2271
2272 }
2273
2274 static void
2275 trm_SetXferRate(PACB pACB,PSRB pSRB, PDCB pDCB)
2276 {
2277         union ccb       *pccb;
2278         struct ccb_trans_settings neg;
2279         u_int16_t       cnt, i;
2280         u_int8_t        bval;
2281         PDCB            pDCBTemp;
2282
2283         /*
2284          * set all lun device's  period , offset
2285          */
2286         TRM_DPRINTF("trm_SetXferRate\n");
2287         pccb = pSRB->pccb;
2288         memset(&neg, 0, sizeof (neg));
2289         neg.xport_specific.spi.sync_period = pDCB->tinfo.goal.period;
2290         neg.xport_specific.spi.sync_offset = pDCB->tinfo.goal.offset;
2291         neg.xport_specific.spi.valid =
2292             CTS_SPI_VALID_SYNC_RATE | CTS_SPI_VALID_SYNC_OFFSET;
2293         xpt_setup_ccb(&neg.ccb_h, pccb->ccb_h.path, /* priority */1);
2294         xpt_async(AC_TRANSFER_NEG, pccb->ccb_h.path, &neg);
2295         if (!(pDCB->IdentifyMsg & 0x07)) {
2296                 pDCBTemp = pACB->pLinkDCB;
2297                 cnt = pACB->DeviceCnt;
2298                 bval = pDCB->TargetID;
2299                 for (i = 0; i < cnt; i++) {
2300                         if (pDCBTemp->TargetID == bval) {
2301                                 pDCBTemp->SyncPeriod = pDCB->SyncPeriod;
2302                                 pDCBTemp->SyncOffset = pDCB->SyncOffset;
2303                                 pDCBTemp->SyncMode = pDCB->SyncMode;
2304                         }
2305                         pDCBTemp = pDCBTemp->pNextDCB;
2306                 }
2307         }
2308         return;
2309 }
2310
2311 /*
2312  * scsiiom
2313  *            trm_Interrupt
2314  *
2315  *
2316  *    ---SCSI bus phase
2317  *
2318  *      PH_DATA_OUT             0x00     Data out phase
2319  *      PH_DATA_IN              0x01     Data in phase
2320  *      PH_COMMAND              0x02     Command phase
2321  *      PH_STATUS               0x03     Status phase
2322  *      PH_BUS_FREE             0x04     Invalid phase used as bus free
2323  *      PH_BUS_FREE             0x05     Invalid phase used as bus free
2324  *      PH_MSG_OUT              0x06     Message out phase
2325  *      PH_MSG_IN               0x07     Message in phase
2326  *
2327  */
2328 static void
2329 trm_Disconnect(PACB pACB)
2330 {
2331         PDCB            pDCB;
2332         PSRB            pSRB, psrb;
2333         u_int16_t       i,j, cnt;
2334         u_int           target_id,target_lun;
2335
2336         TRM_DPRINTF("trm_Disconnect...............\n ");
2337
2338         pDCB = pACB->pActiveDCB;
2339         if (!pDCB) {
2340                 TRM_DPRINTF(" Exception Disconnect DCB=NULL..............\n ");
2341                 j = 400;
2342                 while (--j)
2343                         DELAY(1);
2344                 /* 1 msec */
2345                 trm_reg_write16((DO_CLRFIFO | DO_HWRESELECT),
2346                     TRMREG_SCSI_CONTROL);
2347                 crit_exit();
2348                 return;
2349         }
2350         pSRB = pDCB->pActiveSRB;
2351         /* bug pSRB=0 */
2352         target_id  = pSRB->pccb->ccb_h.target_id;
2353         target_lun = pSRB->pccb->ccb_h.target_lun;
2354         TRM_DPRINTF(":pDCB->pActiveSRB= %8x \n ",(u_int) pDCB->pActiveSRB);
2355         pACB->pActiveDCB = 0;
2356         pSRB->ScsiPhase = PH_BUS_FREE;
2357         /* SCSI bus free Phase */
2358         trm_reg_write16((DO_CLRFIFO | DO_HWRESELECT), TRMREG_SCSI_CONTROL);
2359         if (pSRB->SRBState & SRB_UNEXPECT_RESEL) {
2360                 pSRB->SRBState = 0;
2361                 trm_DoWaitingSRB(pACB);
2362         } else if (pSRB->SRBState & SRB_ABORT_SENT) {
2363                 pDCB->DCBFlag = 0;
2364                 cnt = pDCB->GoingSRBCnt;
2365                 pDCB->GoingSRBCnt = 0;
2366                 pSRB = pDCB->pGoingSRB;
2367                 for (i = 0; i < cnt; i++) {
2368                         psrb = pSRB->pNextSRB;
2369                         pSRB->pNextSRB = pACB->pFreeSRB;
2370                         pACB->pFreeSRB = pSRB;
2371                         pSRB = psrb;
2372                 }
2373                 pDCB->pGoingSRB = 0;
2374                 trm_DoWaitingSRB(pACB);
2375         } else {
2376                 if ((pSRB->SRBState & (SRB_START_+SRB_MSGOUT)) ||
2377                     !(pSRB->SRBState & (SRB_DISCONNECT+SRB_COMPLETED))) {
2378                   /* Selection time out */
2379                         if (!(pACB->scan_devices[target_id][target_lun]) &&
2380                             pSRB->CmdBlock[0] != 0x00 && /* TEST UNIT READY */
2381                             pSRB->CmdBlock[0] != INQUIRY) {
2382                                 pSRB->SRBState = SRB_READY;
2383                                 trm_RewaitSRB(pDCB, pSRB);
2384                         } else {
2385                                 pSRB->TargetStatus = SCSI_STAT_SEL_TIMEOUT;
2386                                 goto  disc1;
2387                         }
2388                 } else if (pSRB->SRBState & SRB_DISCONNECT) {
2389                         /*
2390                          * SRB_DISCONNECT
2391                          */
2392                         trm_DoWaitingSRB(pACB);
2393                 } else if (pSRB->SRBState & SRB_COMPLETED) {
2394 disc1:
2395                   /*
2396                    * SRB_COMPLETED
2397                    */
2398                         pDCB->pActiveSRB = 0;
2399                         pSRB->SRBState = SRB_FREE;
2400                         trm_SRBdone(pACB, pDCB, pSRB);
2401                 }
2402         }
2403         return;
2404 }
2405
2406 static void
2407 trm_Reselect(PACB pACB)
2408 {
2409         PDCB            pDCB;
2410         PSRB            pSRB;
2411         u_int16_t       RselTarLunId;
2412
2413         TRM_DPRINTF("trm_Reselect................. \n");
2414         pDCB = pACB->pActiveDCB;
2415         if (pDCB) {
2416           /* Arbitration lost but Reselection win */
2417                 pSRB = pDCB->pActiveSRB;
2418                 pSRB->SRBState = SRB_READY;
2419                 trm_RewaitSRB(pDCB, pSRB);
2420         }
2421         /* Read Reselected Target Id and LUN */
2422         RselTarLunId = trm_reg_read16(TRMREG_SCSI_TARGETID) & 0x1FFF;
2423         pDCB = pACB->pLinkDCB;
2424         while (RselTarLunId != *((u_int16_t *) &pDCB->TargetID)) {
2425           /* get pDCB of the reselect id */
2426                 pDCB = pDCB->pNextDCB;
2427         }
2428
2429         pACB->pActiveDCB = pDCB;
2430         if (pDCB->SyncMode & EN_TAG_QUEUING) {
2431                 pSRB = &pACB->TmpSRB;
2432                 pDCB->pActiveSRB = pSRB;
2433         } else {
2434                 pSRB = pDCB->pActiveSRB;
2435                 if (!pSRB || !(pSRB->SRBState & SRB_DISCONNECT)) {
2436                   /*
2437                    * abort command
2438                    */
2439                         pSRB = &pACB->TmpSRB;
2440                         pSRB->SRBState = SRB_UNEXPECT_RESEL;
2441                         pDCB->pActiveSRB = pSRB;
2442                         trm_EnableMsgOutAbort1(pACB, pSRB);
2443                 } else {
2444                         if (pDCB->DCBFlag & ABORT_DEV_) {
2445                                 pSRB->SRBState = SRB_ABORT_SENT;
2446                                 trm_EnableMsgOutAbort1(pACB, pSRB);
2447                         } else
2448                                 pSRB->SRBState = SRB_DATA_XFER;
2449                 }
2450         }
2451         pSRB->ScsiPhase = PH_BUS_FREE;
2452         /* SCSI bus free Phase */
2453         /*
2454          * Program HA ID, target ID, period and offset
2455          */
2456         trm_reg_write8((u_int8_t) RselTarLunId,TRMREG_SCSI_TARGETID);
2457         /* target ID */
2458         trm_reg_write8(pACB->AdaptSCSIID,TRMREG_SCSI_HOSTID);
2459         /* host   ID */
2460         trm_reg_write8(pDCB->SyncPeriod,TRMREG_SCSI_SYNC);
2461         /* period    */
2462         trm_reg_write8(pDCB->SyncOffset,TRMREG_SCSI_OFFSET);
2463         /* offset    */
2464         trm_reg_write16(DO_DATALATCH, TRMREG_SCSI_CONTROL);
2465         /* it's important for atn stop*/
2466         /*
2467          * SCSI cammand
2468          */
2469         trm_reg_write8(SCMD_MSGACCEPT, TRMREG_SCSI_COMMAND);
2470         /* to rls the /ACK signal */
2471 }
2472
2473 static void
2474 trm_SRBdone(PACB pACB, PDCB pDCB, PSRB pSRB)
2475 {
2476         PSRB                    psrb;
2477         u_int8_t                bval, bval1,status;
2478         union ccb               *pccb;
2479         struct ccb_scsiio       *pcsio;
2480         PSCSI_INQDATA           ptr;
2481         u_int                   target_id,target_lun;
2482         PDCB                    pTempDCB;
2483
2484         pccb  = pSRB->pccb;
2485         if (pccb == NULL)
2486                 return;
2487         pcsio = &pccb->csio;
2488         target_id  = pSRB->pccb->ccb_h.target_id;
2489         target_lun = pSRB->pccb->ccb_h.target_lun;
2490         if ((pccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
2491                 bus_dmasync_op_t op;
2492                 if ((pccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
2493                         op = BUS_DMASYNC_POSTREAD;
2494                 else
2495                         op = BUS_DMASYNC_POSTWRITE;
2496                 bus_dmamap_sync(pACB->buffer_dmat, pSRB->dmamap, op);
2497                 bus_dmamap_unload(pACB->buffer_dmat, pSRB->dmamap);
2498         }
2499         /*
2500          *
2501          * target status
2502          *
2503          */
2504         status = pSRB->TargetStatus;
2505         pcsio->scsi_status=SCSI_STAT_GOOD;
2506         pccb->ccb_h.status = CAM_REQ_CMP;
2507         if (pSRB->SRBFlag & AUTO_REQSENSE) {
2508           /*
2509            * status of auto request sense
2510            */
2511                 pSRB->SRBFlag &= ~AUTO_REQSENSE;
2512                 pSRB->AdaptStatus = 0;
2513                 pSRB->TargetStatus = SCSI_STATUS_CHECK_COND;
2514
2515                 if (status == SCSI_STATUS_CHECK_COND) {
2516                         pccb->ccb_h.status = CAM_SEL_TIMEOUT;
2517                         goto ckc_e;
2518                 }
2519                 *((u_long *) &(pSRB->CmdBlock[0])) = pSRB->Segment0[0];
2520                 *((u_long *) &(pSRB->CmdBlock[4])) = pSRB->Segment0[1];
2521                 pSRB->SRBTotalXferLength = pSRB->Segment1[1];
2522                 pSRB->pSRBSGL->address = pSRB->SgSenseTemp.address;
2523                 pSRB->pSRBSGL->length = pSRB->SgSenseTemp.length;
2524                 pcsio->scsi_status = SCSI_STATUS_CHECK_COND;
2525                 bcopy(trm_get_sense_buf(pACB, pSRB), &pcsio->sense_data,
2526                     pcsio->sense_len);
2527                 pcsio->ccb_h.status = CAM_SCSI_STATUS_ERROR
2528                     | CAM_AUTOSNS_VALID;
2529                 goto ckc_e;
2530         }
2531         /*
2532          * target status
2533          */
2534         if (status) {
2535                 if (status == SCSI_STATUS_CHECK_COND) {
2536                         if ((pcsio->ccb_h.flags & CAM_DIS_AUTOSENSE) == 0) {
2537                           TRM_DPRINTF("trm_RequestSense..................\n");
2538                           trm_RequestSense(pACB, pDCB, pSRB);
2539                           return;
2540                         }
2541                         pcsio->scsi_status = SCSI_STATUS_CHECK_COND;
2542                         pccb->ccb_h.status = CAM_SCSI_STATUS_ERROR;
2543                         goto ckc_e;
2544                 } else if (status == SCSI_STAT_QUEUEFULL) {
2545                         bval = (u_int8_t) pDCB->GoingSRBCnt;
2546                         bval--;
2547                         pDCB->MaxActiveCommandCnt = bval;
2548                         trm_RewaitSRB(pDCB, pSRB);
2549                         pSRB->AdaptStatus = 0;
2550                         pSRB->TargetStatus = 0;
2551                         return;
2552                 } else if (status == SCSI_STAT_SEL_TIMEOUT) {
2553                         pSRB->AdaptStatus  = H_SEL_TIMEOUT;
2554                         pSRB->TargetStatus = 0;
2555                         pcsio->scsi_status = SCSI_STAT_SEL_TIMEOUT;
2556                         pccb->ccb_h.status = CAM_SEL_TIMEOUT;
2557                 } else if (status == SCSI_STAT_BUSY) {
2558                         TRM_DPRINTF("trm: target busy at %s %d\n",
2559                                 __FILE__, __LINE__);
2560                         pcsio->scsi_status = SCSI_STAT_BUSY;
2561                         pccb->ccb_h.status = CAM_SCSI_BUSY;
2562                         return;
2563                   /* The device busy, try again later?    */
2564                 } else if (status == SCSI_STAT_RESCONFLICT) {
2565                         TRM_DPRINTF("trm: target reserved at %s %d\n",
2566                                 __FILE__, __LINE__);
2567                         pcsio->scsi_status = SCSI_STAT_RESCONFLICT;
2568                         pccb->ccb_h.status = CAM_SCSI_STATUS_ERROR;     /*XXX*/
2569                         return;
2570                 } else {
2571                         pSRB->AdaptStatus = 0;
2572                         if (pSRB->RetryCnt) {
2573                                 pSRB->RetryCnt--;
2574                                 pSRB->TargetStatus = 0;
2575                                 pSRB->SRBSGIndex = 0;
2576                                 if (trm_StartSCSI(pACB, pDCB, pSRB)) {
2577                                   /*
2578                                    * If trm_StartSCSI return 1 :
2579                                    * current interrupt status is interrupt
2580                                    * disreenable
2581                                    * It's said that SCSI processor has more
2582                                    * one SRB need to do
2583                                    */
2584                                         trm_RewaitSRB(pDCB, pSRB);
2585                                 }
2586                                 return;
2587                         } else {
2588                                 TRM_DPRINTF("trm: driver stuffup at %s %d\n",
2589                                         __FILE__, __LINE__);
2590                                 pccb->ccb_h.status = CAM_SCSI_STATUS_ERROR;
2591                         }
2592                 }
2593         } else {
2594         /*
2595          * process initiator status..........................
2596          * Adapter (initiator) status
2597          */
2598                 status = pSRB->AdaptStatus;
2599                 if (status & H_OVER_UNDER_RUN) {
2600                         pSRB->TargetStatus = 0;
2601                         pccb->ccb_h.status = CAM_DATA_RUN_ERR;
2602                         /* Illegal length (over/under run) */
2603                 } else if (pSRB->SRBStatus & PARITY_ERROR) {
2604                         TRM_DPRINTF("trm: driver stuffup %s %d\n",
2605                                 __FILE__, __LINE__);
2606                         pDCB->tinfo.goal.period = 0;
2607                         pDCB->tinfo.goal.offset = 0;
2608                         /* Driver failed to perform operation */
2609                         pccb->ccb_h.status = CAM_UNCOR_PARITY;
2610                 } else {
2611                   /* no error */
2612                         pSRB->AdaptStatus = 0;
2613                         pSRB->TargetStatus = 0;
2614                         pccb->ccb_h.status = CAM_REQ_CMP;
2615                         /* there is no error, (sense is invalid) */
2616                 }
2617         }
2618 ckc_e:
2619         if (pACB->scan_devices[target_id][target_lun]) {
2620           /*
2621            *   if SCSI command in "scan devices" duty
2622            */
2623                 if (pSRB->CmdBlock[0] == TEST_UNIT_READY)
2624                         pACB->scan_devices[target_id][target_lun] = 0;
2625                 /* SCSI command phase :test unit ready */
2626                 else if (pSRB->CmdBlock[0] == INQUIRY) {
2627                   /*
2628                    * SCSI command phase :inquiry scsi device data
2629                    * (type,capacity,manufacture....
2630                    */
2631                         if (pccb->ccb_h.status == CAM_SEL_TIMEOUT)
2632                                 goto NO_DEV;
2633                         ptr = (PSCSI_INQDATA) pcsio->data_ptr;
2634                         /* page fault */
2635                         TRM_DPRINTF("trm_SRBdone..PSCSI_INQDATA:%2x \n",
2636                             ptr->DevType);
2637                         bval1 = ptr->DevType & SCSI_DEVTYPE;
2638                         if (bval1 == SCSI_NODEV) {
2639 NO_DEV:
2640                                 TRM_DPRINTF("trm_SRBdone NO Device:target_id= %d ,target_lun= %d \n",
2641                                     target_id,
2642                                     target_lun);
2643                                 crit_enter();
2644                                 pACB->scan_devices[target_id][target_lun] = 0;
2645                                 /* no device set scan device flag =0*/
2646                                 /* pDCB Q link */
2647                                 /* move the head of DCB to tempDCB*/
2648                                 pTempDCB=pACB->pLinkDCB;
2649                                 /* search current DCB for pass link */
2650                                 while (pTempDCB->pNextDCB != pDCB) {
2651                                         pTempDCB = pTempDCB->pNextDCB;
2652                                 }
2653                                 /*
2654                                  * when the current DCB found than connect
2655                                  * current DCB tail
2656                                  */
2657                                 /* to the DCB tail that before current DCB */
2658                                 pTempDCB->pNextDCB = pDCB->pNextDCB;
2659                                 /*
2660                                  * if there was only one DCB ,connect his tail
2661                                  * to his head
2662                                  */
2663                                 if (pACB->pLinkDCB == pDCB)
2664                                         pACB->pLinkDCB = pTempDCB->pNextDCB;
2665                                 if (pACB->pDCBRunRobin == pDCB)
2666                                         pACB->pDCBRunRobin = pTempDCB->pNextDCB;
2667                                 pDCB->DCBstatus &= ~DS_IN_QUEUE;
2668                                 pACB->DeviceCnt--;
2669                                 if (pACB->DeviceCnt == 0) {
2670                                         pACB->pLinkDCB = NULL;
2671                                         pACB->pDCBRunRobin = NULL;
2672                                 }
2673                                 crit_exit();
2674                         } else {
2675 #ifdef trm_DEBUG1
2676                                 int j;
2677                                 for (j = 0; j < 28; j++) {
2678                                         TRM_DPRINTF("ptr=%2x ",
2679                                                 ((u_int8_t *)ptr)[j]);
2680                                 }
2681 #endif
2682                                 pDCB->DevType = bval1;
2683                                 if (bval1 == SCSI_DASD ||
2684                                     bval1 == SCSI_OPTICAL) {
2685                                         if ((((ptr->Vers & 0x07) >= 2) ||
2686                                               ((ptr->RDF & 0x0F) == 2)) &&
2687                                             (ptr->Flags & SCSI_INQ_CMDQUEUE) &&
2688                                             (pDCB->DevMode & TAG_QUEUING_) &&
2689                                             (pDCB->DevMode & EN_DISCONNECT_)) {
2690                                                 if (pDCB->DevMode &
2691                                                     TAG_QUEUING_) {
2692                                                         pDCB->
2693                                                             MaxActiveCommandCnt =
2694                                                           pACB->TagMaxNum;
2695                                                         pDCB->SyncMode |=
2696                                                           EN_TAG_QUEUING;
2697                                                         pDCB->tinfo.disc_tag |=
2698                                                           TRM_CUR_TAGENB;
2699                                                 } else {
2700                                                         pDCB->SyncMode |=
2701                                                           EN_ATN_STOP;
2702                                                         pDCB->tinfo.disc_tag &=
2703                                                           ~TRM_CUR_TAGENB;
2704                                                 }
2705                                         }
2706                                 }
2707                         }
2708                         /* pSRB->CmdBlock[0] == INQUIRY */
2709                 }
2710                 /* pACB->scan_devices[target_id][target_lun] */
2711         }
2712         crit_enter();
2713         /*  ReleaseSRB(pDCB, pSRB); */
2714         if (pSRB == pDCB->pGoingSRB)
2715                 pDCB->pGoingSRB = pSRB->pNextSRB;
2716         else {
2717                 psrb = pDCB->pGoingSRB;
2718                 while (psrb->pNextSRB != pSRB) {
2719                         psrb = psrb->pNextSRB;
2720                 }
2721                 psrb->pNextSRB = pSRB->pNextSRB;
2722                 if (pSRB == pDCB->pGoingLastSRB) {
2723                         pDCB->pGoingLastSRB = psrb;
2724                 }
2725         }
2726         pSRB->pNextSRB = pACB->pFreeSRB;
2727         pACB->pFreeSRB = pSRB;
2728         pDCB->GoingSRBCnt--;
2729         trm_DoWaitingSRB(pACB);
2730
2731         crit_exit();
2732         /*  Notify cmd done */
2733         xpt_done (pccb);
2734 }
2735
2736 static void
2737 trm_DoingSRB_Done(PACB pACB)
2738 {
2739         PDCB            pDCB, pdcb;
2740         PSRB            psrb, psrb2;
2741         u_int16_t       cnt, i;
2742         union ccb       *pccb;
2743
2744         pDCB = pACB->pLinkDCB;
2745         if (pDCB == NULL)
2746                 return;
2747         pdcb = pDCB;
2748         do {
2749                 cnt = pdcb->GoingSRBCnt;
2750                 psrb = pdcb->pGoingSRB;
2751                 for (i = 0; i < cnt; i++) {
2752                         psrb2 = psrb->pNextSRB;
2753                         pccb = psrb->pccb;
2754                         pccb->ccb_h.status = CAM_SEL_TIMEOUT;
2755                         /*  ReleaseSRB(pDCB, pSRB); */
2756                         psrb->pNextSRB = pACB->pFreeSRB;
2757                         pACB->pFreeSRB = psrb;
2758                         xpt_done(pccb);
2759                         psrb  = psrb2;
2760                 }
2761                 pdcb->GoingSRBCnt = 0;
2762                 pdcb->pGoingSRB = NULL;
2763                 pdcb = pdcb->pNextDCB;
2764         }
2765         while (pdcb != pDCB);
2766 }
2767
2768 static void
2769 trm_ResetSCSIBus(PACB pACB)
2770 {
2771         crit_enter();
2772         pACB->ACBFlag |= RESET_DEV;
2773
2774         trm_reg_write16(DO_RSTSCSI,TRMREG_SCSI_CONTROL);
2775         while (!(trm_reg_read16(TRMREG_SCSI_INTSTATUS) & INT_SCSIRESET));
2776         crit_exit();
2777         return;
2778 }
2779
2780 static void
2781 trm_ScsiRstDetect(PACB pACB)
2782 {
2783         u_long  wlval;
2784
2785         TRM_DPRINTF("trm_ScsiRstDetect \n");
2786         wlval = 1000;
2787         while (--wlval)
2788                 DELAY(1000);
2789         crit_enter();
2790         trm_reg_write8(STOPDMAXFER,TRMREG_DMA_CONTROL);
2791
2792         trm_reg_write16(DO_CLRFIFO,TRMREG_SCSI_CONTROL);
2793
2794         if (pACB->ACBFlag & RESET_DEV)
2795                 pACB->ACBFlag |= RESET_DONE;
2796         else {
2797                 pACB->ACBFlag |= RESET_DETECT;
2798                 trm_ResetDevParam(pACB);
2799                 /*      trm_DoingSRB_Done(pACB); ???? */
2800                 trm_RecoverSRB(pACB);
2801                 pACB->pActiveDCB = NULL;
2802                 pACB->ACBFlag = 0;
2803                 trm_DoWaitingSRB(pACB);
2804         }
2805         crit_exit();
2806         return;
2807 }
2808
2809 static void
2810 trm_RequestSense(PACB pACB, PDCB pDCB, PSRB pSRB)
2811 {
2812         union ccb               *pccb;
2813         struct ccb_scsiio       *pcsio;
2814
2815         pccb  = pSRB->pccb;
2816         pcsio = &pccb->csio;
2817
2818         pSRB->SRBFlag |= AUTO_REQSENSE;
2819         pSRB->Segment0[0] = *((u_long *) &(pSRB->CmdBlock[0]));
2820         pSRB->Segment0[1] = *((u_long *) &(pSRB->CmdBlock[4]));
2821         pSRB->Segment1[0] = (u_long) ((pSRB->ScsiCmdLen << 8) +
2822             pSRB->SRBSGCount);
2823         pSRB->Segment1[1] = pSRB->SRBTotalXferLength; /* ?????????? */
2824
2825         /* $$$$$$ Status of initiator/target $$$$$$$$ */
2826         pSRB->AdaptStatus = 0;
2827         pSRB->TargetStatus = 0;
2828         /* $$$$$$ Status of initiator/target $$$$$$$$ */
2829
2830         pSRB->SRBTotalXferLength = sizeof(pcsio->sense_data);
2831         pSRB->SgSenseTemp.address = pSRB->pSRBSGL->address;
2832         pSRB->SgSenseTemp.length  = pSRB->pSRBSGL->length;
2833         pSRB->pSRBSGL->address = trm_get_sense_bufaddr(pACB, pSRB);
2834         pSRB->pSRBSGL->length = (u_long) sizeof(struct scsi_sense_data);
2835         pSRB->SRBSGCount = 1;
2836         pSRB->SRBSGIndex = 0;
2837
2838         *((u_long *) &(pSRB->CmdBlock[0])) = 0x00000003;
2839         pSRB->CmdBlock[1] = pDCB->IdentifyMsg << 5;
2840         *((u_int16_t *) &(pSRB->CmdBlock[4])) = pcsio->sense_len;
2841         pSRB->ScsiCmdLen = 6;
2842
2843         if (trm_StartSCSI(pACB, pDCB, pSRB))
2844            /*
2845             * If trm_StartSCSI return 1 :
2846             * current interrupt status is interrupt disreenable
2847             * It's said that SCSI processor has more one SRB need to do
2848             */
2849                 trm_RewaitSRB(pDCB, pSRB);
2850 }
2851
2852 static void
2853 trm_EnableMsgOutAbort2(PACB pACB, PSRB pSRB)
2854 {
2855
2856         pSRB->MsgCnt = 1;
2857         trm_reg_write16(DO_SETATN, TRMREG_SCSI_CONTROL);
2858 }
2859
2860 static void
2861 trm_EnableMsgOutAbort1(PACB pACB, PSRB pSRB)
2862 {
2863
2864         pSRB->MsgOutBuf[0] = MSG_ABORT;
2865         trm_EnableMsgOutAbort2(pACB, pSRB);
2866 }
2867
2868 static void
2869 trm_initDCB(PACB pACB, PDCB pDCB, u_int16_t unit,u_int32_t i,u_int32_t j)
2870 {
2871         PNVRAMTYPE      pEEpromBuf;
2872         u_int8_t        bval,PeriodIndex;
2873         u_int           target_id,target_lun;
2874         PDCB            pTempDCB;
2875
2876         target_id  = i;
2877         target_lun = j;
2878
2879         /*
2880          *  Using the lun 0 device to init other DCB first, if the device
2881          *  has been initialized.
2882          *  I don't want init sync arguments one by one, it is the same.
2883          */
2884         if (target_lun != 0 &&
2885             (pACB->DCBarray[target_id][0].DCBstatus & DS_IN_QUEUE))
2886                 bcopy(&pACB->DCBarray[target_id][0], pDCB,
2887                     sizeof(TRM_DCB));
2888         crit_enter();
2889         if (pACB->pLinkDCB == 0) {
2890                 pACB->pLinkDCB = pDCB;
2891                 /*
2892                  * RunRobin impersonate the role
2893                  * that let each device had good proportion
2894                  * about SCSI command proceeding
2895                  */
2896                 pACB->pDCBRunRobin = pDCB;
2897                 pDCB->pNextDCB = pDCB;
2898         } else {
2899                 pTempDCB=pACB->pLinkDCB;
2900                 /* search the last nod of DCB link */
2901                 while (pTempDCB->pNextDCB != pACB->pLinkDCB)
2902                         pTempDCB = pTempDCB->pNextDCB;
2903                 /* connect current DCB with last DCB tail */
2904                 pTempDCB->pNextDCB = pDCB;
2905                 /* connect current DCB tail to this DCB Q head */
2906                 pDCB->pNextDCB=pACB->pLinkDCB;
2907         }
2908         crit_exit();
2909
2910         pACB->DeviceCnt++;
2911         pDCB->TargetID = target_id;
2912         pDCB->TargetLUN =  target_lun;
2913         pDCB->pWaitingSRB = NULL;
2914         pDCB->pGoingSRB = NULL;
2915         pDCB->GoingSRBCnt = 0;
2916         pDCB->pActiveSRB = NULL;
2917         pDCB->MaxActiveCommandCnt = 1;
2918         pDCB->DCBFlag = 0;
2919         pDCB->DCBstatus |= DS_IN_QUEUE;
2920         /* $$$$$$$ */
2921         pEEpromBuf = &trm_eepromBuf[unit];
2922         pDCB->DevMode = pEEpromBuf->NvramTarget[target_id].NvmTarCfg0;
2923         pDCB->AdpMode = pEEpromBuf->NvramChannelCfg;
2924         /* $$$$$$$ */
2925         /*
2926          * disconnect enable ?
2927          */
2928         if (pDCB->DevMode & NTC_DO_DISCONNECT) {
2929                 bval = 0xC0;
2930                 pDCB->tinfo.disc_tag |= TRM_USR_DISCENB ;
2931         } else {
2932                 bval = 0x80;
2933                 pDCB->tinfo.disc_tag &= ~(TRM_USR_DISCENB);
2934         }
2935         bval |= target_lun;
2936         pDCB->IdentifyMsg = bval;
2937         if (target_lun != 0 &&
2938             (pACB->DCBarray[target_id][0].DCBstatus & DS_IN_QUEUE))
2939                 return;
2940         /* $$$$$$$ */
2941         /*
2942          * tag Qing enable ?
2943          */
2944         if (pDCB->DevMode & TAG_QUEUING_) {
2945                 pDCB->tinfo.disc_tag |= TRM_USR_TAGENB ;
2946         } else
2947                 pDCB->tinfo.disc_tag &= ~(TRM_USR_TAGENB);
2948         /* $$$$$$$ */
2949         /*
2950          * wide nego ,sync nego enable ?
2951          */
2952         pDCB->SyncPeriod = 0;
2953         pDCB->SyncOffset = 0;
2954         PeriodIndex = pEEpromBuf->NvramTarget[target_id].NvmTarPeriod & 0x07;
2955         if (pACB->AdaptType==1) {/* is U2? */
2956             pDCB->MaxNegoPeriod=dc395u2x_clock_period[ PeriodIndex ];
2957             pDCB->tinfo.user.period=pDCB->MaxNegoPeriod;
2958             pDCB->tinfo.user.offset=(pDCB->SyncMode & SYNC_NEGO_ENABLE) ? 31 : 0;
2959         } else {
2960         pDCB->MaxNegoPeriod=dc395x_clock_period[ PeriodIndex ];
2961             pDCB->tinfo.user.period=pDCB->MaxNegoPeriod;
2962             pDCB->tinfo.user.offset=(pDCB->SyncMode & SYNC_NEGO_ENABLE) ? 15 : 0;
2963         }
2964         pDCB->SyncMode = 0;
2965         if ((pDCB->DevMode & NTC_DO_WIDE_NEGO) &&
2966             (pACB->Config & HCC_WIDE_CARD))
2967                 pDCB->SyncMode |= WIDE_NEGO_ENABLE;
2968         /* enable wide nego */
2969         if (pDCB->DevMode & NTC_DO_SYNC_NEGO)
2970                 pDCB->SyncMode |= SYNC_NEGO_ENABLE;
2971         /* enable sync nego */
2972         /* $$$$$$$ */
2973         /*
2974          *      Fill in tinfo structure.
2975          */
2976         pDCB->tinfo.user.width  = (pDCB->SyncMode & WIDE_NEGO_ENABLE) ?
2977           MSG_EXT_WDTR_BUS_16_BIT : MSG_EXT_WDTR_BUS_8_BIT;
2978
2979         pDCB->tinfo.current.period = 0;
2980         pDCB->tinfo.current.offset = 0;
2981         pDCB->tinfo.current.width = MSG_EXT_WDTR_BUS_8_BIT;
2982 }
2983
2984 static void
2985 trm_srbmapSG(void *arg, bus_dma_segment_t *segs, int nseg, int error)
2986 {
2987         PSRB pSRB;
2988
2989         pSRB=(PSRB) arg;
2990         pSRB->SRBSGPhyAddr=segs->ds_addr;
2991         return;
2992 }
2993
2994 static void
2995 trm_destroySRB(PACB pACB)
2996 {
2997         PSRB pSRB;
2998
2999         pSRB = pACB->pFreeSRB;
3000         while (pSRB) {
3001                 if (pSRB->sg_dmamap) {
3002                         bus_dmamap_unload(pACB->sg_dmat, pSRB->sg_dmamap);
3003                         bus_dmamem_free(pACB->sg_dmat, pSRB->pSRBSGL,
3004                             pSRB->sg_dmamap);
3005                         bus_dmamap_destroy(pACB->sg_dmat, pSRB->sg_dmamap);
3006                 }
3007                 if (pSRB->dmamap)
3008                         bus_dmamap_destroy(pACB->buffer_dmat, pSRB->dmamap);
3009                 pSRB = pSRB->pNextSRB;
3010         }
3011 }
3012
3013 static int
3014 trm_initSRB(PACB pACB)
3015 {
3016         u_int16_t    i;
3017         PSRB    pSRB;
3018         int error;
3019
3020         for (i = 0; i < TRM_MAX_SRB_CNT; i++) {
3021                 pSRB = (PSRB)&pACB->pFreeSRB[i];
3022
3023                 if (bus_dmamem_alloc(pACB->sg_dmat, (void **)&pSRB->pSRBSGL,
3024                     BUS_DMA_NOWAIT, &pSRB->sg_dmamap) !=0 ) {
3025                         return ENXIO;
3026                 }
3027                 bus_dmamap_load(pACB->sg_dmat, pSRB->sg_dmamap, pSRB->pSRBSGL,
3028                     TRM_MAX_SG_LISTENTRY * sizeof(SGentry),
3029                     trm_srbmapSG, pSRB, /*flags*/0);
3030                 if (i != TRM_MAX_SRB_CNT - 1) {
3031                         /*
3032                          * link all SRB
3033                          */
3034                         pSRB->pNextSRB = &pACB->pFreeSRB[i+1];
3035                 } else {
3036                         /*
3037                          * load NULL to NextSRB of the last SRB
3038                          */
3039                         pSRB->pNextSRB = NULL;
3040                 }
3041                 pSRB->TagNumber = i;
3042
3043                 /*
3044                  * Create the dmamap.  This is no longer optional!
3045                  */
3046                 if ((error = bus_dmamap_create(pACB->buffer_dmat, 0,
3047                                                &pSRB->dmamap)) != 0)
3048                         return (error);
3049
3050         }
3051         return (0);
3052 }
3053
3054
3055
3056
3057 static void
3058 trm_initACB(PACB pACB, u_int8_t adaptType, u_int16_t unit)
3059 {
3060         PNVRAMTYPE      pEEpromBuf;
3061
3062         pEEpromBuf = &trm_eepromBuf[unit];
3063         pACB->max_id = 15;
3064
3065         if (pEEpromBuf->NvramChannelCfg & NAC_SCANLUN)
3066                 pACB->max_lun = 7;
3067         else
3068                 pACB->max_lun = 0;
3069
3070         TRM_DPRINTF("trm: pACB->max_id= %d pACB->max_lun= %d \n",
3071             pACB->max_id, pACB->max_lun);
3072         pACB->pLinkDCB = NULL;
3073         pACB->pDCBRunRobin = NULL;
3074         pACB->pActiveDCB = NULL;
3075         pACB->AdapterUnit = (u_int8_t)unit;
3076         pACB->AdaptSCSIID = pEEpromBuf->NvramScsiId;
3077         pACB->AdaptSCSILUN = 0;
3078         pACB->DeviceCnt = 0;
3079         pACB->AdaptType = adaptType;
3080         pACB->TagMaxNum = 2 << pEEpromBuf->NvramMaxTag;
3081         pACB->ACBFlag = 0;
3082         return;
3083 }
3084
3085 static void
3086 NVRAM_trm_write_all(PNVRAMTYPE pEEpromBuf,PACB pACB)
3087 {
3088         u_int8_t        *bpEeprom = (u_int8_t *) pEEpromBuf;
3089         u_int8_t        bAddr;
3090
3091         /* Enable SEEPROM */
3092         trm_reg_write8((trm_reg_read8(TRMREG_GEN_CONTROL) | EN_EEPROM),
3093             TRMREG_GEN_CONTROL);
3094         /*
3095          * Write enable
3096          */
3097         NVRAM_trm_write_cmd(pACB, 0x04, 0xFF);
3098         trm_reg_write8(0, TRMREG_GEN_NVRAM);
3099         NVRAM_trm_wait_30us(pACB);
3100         for (bAddr = 0; bAddr < 128; bAddr++, bpEeprom++) {
3101                 NVRAM_trm_set_data(pACB, bAddr, *bpEeprom);
3102         }
3103         /*
3104          * Write disable
3105          */
3106         NVRAM_trm_write_cmd(pACB, 0x04, 0x00);
3107         trm_reg_write8(0 , TRMREG_GEN_NVRAM);
3108         NVRAM_trm_wait_30us(pACB);
3109         /* Disable SEEPROM */
3110         trm_reg_write8((trm_reg_read8(TRMREG_GEN_CONTROL) & ~EN_EEPROM),
3111             TRMREG_GEN_CONTROL);
3112         return;
3113 }
3114
3115 static void
3116 NVRAM_trm_set_data(PACB pACB, u_int8_t bAddr, u_int8_t bData)
3117 {
3118         int             i;
3119         u_int8_t        bSendData;
3120         /*
3121          * Send write command & address
3122          */
3123
3124         NVRAM_trm_write_cmd(pACB, 0x05, bAddr);
3125         /*
3126          * Write data
3127          */
3128         for (i = 0; i < 8; i++, bData <<= 1) {
3129                 bSendData = NVR_SELECT;
3130                 if (bData & 0x80)
3131                   /* Start from bit 7   */
3132                         bSendData |= NVR_BITOUT;
3133                 trm_reg_write8(bSendData , TRMREG_GEN_NVRAM);
3134                 NVRAM_trm_wait_30us(pACB);
3135                 trm_reg_write8((bSendData | NVR_CLOCK), TRMREG_GEN_NVRAM);
3136                 NVRAM_trm_wait_30us(pACB);
3137         }
3138         trm_reg_write8(NVR_SELECT , TRMREG_GEN_NVRAM);
3139         NVRAM_trm_wait_30us(pACB);
3140         /*
3141          * Disable chip select
3142          */
3143         trm_reg_write8(0 , TRMREG_GEN_NVRAM);
3144         NVRAM_trm_wait_30us(pACB);
3145         trm_reg_write8(NVR_SELECT ,TRMREG_GEN_NVRAM);
3146         NVRAM_trm_wait_30us(pACB);
3147         /*
3148          * Wait for write ready
3149          */
3150         while (1) {
3151                 trm_reg_write8((NVR_SELECT | NVR_CLOCK), TRMREG_GEN_NVRAM);
3152                 NVRAM_trm_wait_30us(pACB);
3153                 trm_reg_write8(NVR_SELECT, TRMREG_GEN_NVRAM);
3154                 NVRAM_trm_wait_30us(pACB);
3155                 if (trm_reg_read8(TRMREG_GEN_NVRAM) & NVR_BITIN) {
3156                         break;
3157                 }
3158         }
3159         /*
3160          * Disable chip select
3161          */
3162         trm_reg_write8(0, TRMREG_GEN_NVRAM);
3163         return;
3164 }
3165
3166 static void
3167 NVRAM_trm_read_all(PNVRAMTYPE pEEpromBuf, PACB pACB)
3168 {
3169         u_int8_t        *bpEeprom = (u_int8_t*) pEEpromBuf;
3170         u_int8_t        bAddr;
3171
3172         /*
3173          * Enable SEEPROM
3174          */
3175         trm_reg_write8((trm_reg_read8(TRMREG_GEN_CONTROL) | EN_EEPROM),
3176             TRMREG_GEN_CONTROL);
3177         for (bAddr = 0; bAddr < 128; bAddr++, bpEeprom++)
3178                 *bpEeprom = NVRAM_trm_get_data(pACB, bAddr);
3179         /*
3180          * Disable SEEPROM
3181          */
3182         trm_reg_write8((trm_reg_read8(TRMREG_GEN_CONTROL) & ~EN_EEPROM),
3183             TRMREG_GEN_CONTROL);
3184         return;
3185 }
3186
3187 static u_int8_t
3188 NVRAM_trm_get_data(PACB pACB, u_int8_t bAddr)
3189 {
3190         int             i;
3191         u_int8_t        bReadData, bData = 0;
3192         /*
3193         * Send read command & address
3194         */
3195
3196         NVRAM_trm_write_cmd(pACB, 0x06, bAddr);
3197
3198         for (i = 0; i < 8; i++) {
3199           /*
3200            * Read data
3201            */
3202                 trm_reg_write8((NVR_SELECT | NVR_CLOCK) , TRMREG_GEN_NVRAM);
3203                 NVRAM_trm_wait_30us(pACB);
3204                 trm_reg_write8(NVR_SELECT , TRMREG_GEN_NVRAM);
3205                 /*
3206                  * Get data bit while falling edge
3207                  */
3208                 bReadData = trm_reg_read8(TRMREG_GEN_NVRAM);
3209                 bData <<= 1;
3210                 if (bReadData & NVR_BITIN) {
3211                         bData |= 1;
3212                 }
3213                 NVRAM_trm_wait_30us(pACB);
3214         }
3215         /*
3216          * Disable chip select
3217          */
3218         trm_reg_write8(0, TRMREG_GEN_NVRAM);
3219         return (bData);
3220 }
3221
3222 static void
3223 NVRAM_trm_wait_30us(PACB pACB)
3224 {
3225
3226         /*    ScsiPortStallExecution(30);        wait 30 us     */
3227         trm_reg_write8(5, TRMREG_GEN_TIMER);
3228         while (!(trm_reg_read8(TRMREG_GEN_STATUS) & GTIMEOUT));
3229         return;
3230 }
3231
3232 static void
3233 NVRAM_trm_write_cmd(PACB pACB, u_int8_t bCmd, u_int8_t bAddr)
3234 {
3235         int             i;
3236         u_int8_t        bSendData;
3237
3238         for (i = 0; i < 3; i++, bCmd <<= 1) {
3239           /*
3240            * Program SB+OP code
3241            */
3242                 bSendData = NVR_SELECT;
3243                 if (bCmd & 0x04)
3244                         bSendData |= NVR_BITOUT;
3245                 /* start from bit 2 */
3246                 trm_reg_write8(bSendData, TRMREG_GEN_NVRAM);
3247                 NVRAM_trm_wait_30us(pACB);
3248                 trm_reg_write8((bSendData | NVR_CLOCK), TRMREG_GEN_NVRAM);
3249                 NVRAM_trm_wait_30us(pACB);
3250         }
3251         for (i = 0; i < 7; i++, bAddr <<= 1) {
3252           /*
3253            * Program address
3254            */
3255                 bSendData = NVR_SELECT;
3256                 if (bAddr & 0x40)
3257                   /* Start from bit 6   */
3258                         bSendData |= NVR_BITOUT;
3259                 trm_reg_write8(bSendData , TRMREG_GEN_NVRAM);
3260                 NVRAM_trm_wait_30us(pACB);
3261                 trm_reg_write8((bSendData | NVR_CLOCK), TRMREG_GEN_NVRAM);
3262                 NVRAM_trm_wait_30us(pACB);
3263         }
3264         trm_reg_write8(NVR_SELECT, TRMREG_GEN_NVRAM);
3265         NVRAM_trm_wait_30us(pACB);
3266 }
3267
3268 static void
3269 trm_check_eeprom(PNVRAMTYPE pEEpromBuf, PACB pACB)
3270 {
3271         u_int16_t       *wpEeprom = (u_int16_t *) pEEpromBuf;
3272         u_int16_t       wAddr, wCheckSum;
3273         u_long  dAddr, *dpEeprom;
3274
3275         NVRAM_trm_read_all(pEEpromBuf,pACB);
3276         wCheckSum = 0;
3277         for (wAddr = 0, wpEeprom = (u_int16_t *) pEEpromBuf;
3278             wAddr < 64; wAddr++, wpEeprom++) {
3279                 wCheckSum += *wpEeprom;
3280         }
3281         if (wCheckSum != 0x1234) {
3282           /*
3283            * Checksum error, load default
3284            */
3285                 pEEpromBuf->NvramSubVendorID[0] = (u_int8_t) PCI_Vendor_ID_TEKRAM;
3286                 pEEpromBuf->NvramSubVendorID[1] =
3287                   (u_int8_t) (PCI_Vendor_ID_TEKRAM >> 8);
3288                 pEEpromBuf->NvramSubSysID[0] = (u_int8_t) PCI_Device_ID_TRM_S1040;
3289                 pEEpromBuf->NvramSubSysID[1] =
3290                   (u_int8_t) (PCI_Device_ID_TRM_S1040 >> 8);
3291                 pEEpromBuf->NvramSubClass = 0x00;
3292                 pEEpromBuf->NvramVendorID[0] = (u_int8_t) PCI_Vendor_ID_TEKRAM;
3293                 pEEpromBuf->NvramVendorID[1] =
3294                   (u_int8_t) (PCI_Vendor_ID_TEKRAM >> 8);
3295                 pEEpromBuf->NvramDeviceID[0] = (u_int8_t) PCI_Device_ID_TRM_S1040;
3296                 pEEpromBuf->NvramDeviceID[1] =
3297                   (u_int8_t) (PCI_Device_ID_TRM_S1040 >> 8);
3298                 pEEpromBuf->NvramReserved = 0x00;
3299
3300                 for (dAddr = 0, dpEeprom = (u_long *) pEEpromBuf->NvramTarget;
3301                     dAddr < 16; dAddr++, dpEeprom++) {
3302                         *dpEeprom = 0x00000077;
3303                         /* NvmTarCfg3,NvmTarCfg2,NvmTarPeriod,NvmTarCfg0 */
3304                 }
3305
3306                 *dpEeprom++ = 0x04000F07;
3307                 /* NvramMaxTag,NvramDelayTime,NvramChannelCfg,NvramScsiId */
3308                 *dpEeprom++ = 0x00000015;
3309                 /* NvramReserved1,NvramBootLun,NvramBootTarget,NvramReserved0 */
3310                 for (dAddr = 0; dAddr < 12; dAddr++, dpEeprom++)
3311                         *dpEeprom = 0x00;
3312                 pEEpromBuf->NvramCheckSum = 0x00;
3313                 for (wAddr = 0, wCheckSum = 0, wpEeprom = (u_int16_t *) pEEpromBuf;
3314                     wAddr < 63; wAddr++, wpEeprom++)
3315                         wCheckSum += *wpEeprom;
3316                 *wpEeprom = 0x1234 - wCheckSum;
3317                 NVRAM_trm_write_all(pEEpromBuf,pACB);
3318         }
3319         return;
3320 }
3321 static int
3322 trm_initAdapter(PACB pACB, u_int16_t unit)
3323 {
3324         PNVRAMTYPE      pEEpromBuf;
3325         u_int16_t       wval;
3326         u_int8_t        bval;
3327
3328         pEEpromBuf = &trm_eepromBuf[unit];
3329
3330         /* 250ms selection timeout */
3331         trm_reg_write8(SEL_TIMEOUT, TRMREG_SCSI_TIMEOUT);
3332         /* Mask all the interrupt */
3333         trm_reg_write8(0x00, TRMREG_DMA_INTEN);
3334         trm_reg_write8(0x00, TRMREG_SCSI_INTEN);
3335         /* Reset SCSI module */
3336         trm_reg_write16(DO_RSTMODULE, TRMREG_SCSI_CONTROL);
3337         /* program configuration 0 */
3338         pACB->Config = HCC_AUTOTERM | HCC_PARITY;
3339         if (trm_reg_read8(TRMREG_GEN_STATUS) & WIDESCSI)
3340                 pACB->Config |= HCC_WIDE_CARD;
3341         if (pEEpromBuf->NvramChannelCfg & NAC_POWERON_SCSI_RESET)
3342                 pACB->Config |= HCC_SCSI_RESET;
3343         if (pACB->Config & HCC_PARITY)
3344                 bval = PHASELATCH | INITIATOR | BLOCKRST | PARITYCHECK;
3345         else
3346                 bval = PHASELATCH | INITIATOR | BLOCKRST ;
3347         trm_reg_write8(bval,TRMREG_SCSI_CONFIG0);
3348         /* program configuration 1 */
3349         trm_reg_write8(0x13, TRMREG_SCSI_CONFIG1);
3350         /* program Host ID */
3351         bval = pEEpromBuf->NvramScsiId;
3352         trm_reg_write8(bval, TRMREG_SCSI_HOSTID);
3353         /* set ansynchronous transfer */
3354         trm_reg_write8(0x00, TRMREG_SCSI_OFFSET);
3355         /* Trun LED control off*/
3356         wval = trm_reg_read16(TRMREG_GEN_CONTROL) & 0x7F;
3357         trm_reg_write16(wval, TRMREG_GEN_CONTROL);
3358         /* DMA config */
3359         wval = trm_reg_read16(TRMREG_DMA_CONFIG) | DMA_ENHANCE;
3360         trm_reg_write16(wval, TRMREG_DMA_CONFIG);
3361         /* Clear pending interrupt status */
3362         trm_reg_read8(TRMREG_SCSI_INTSTATUS);
3363         /* Enable SCSI interrupt */
3364         trm_reg_write8(0x7F, TRMREG_SCSI_INTEN);
3365         trm_reg_write8(EN_SCSIINTR, TRMREG_DMA_INTEN);
3366         return (0);
3367 }
3368
3369 static void
3370 trm_mapSRB(void *arg, bus_dma_segment_t *segs, int nseg, int error)
3371 {
3372         PACB pACB;
3373
3374         pACB = (PACB)arg;
3375         pACB->srb_physbase = segs->ds_addr;
3376 }
3377
3378 static void
3379 trm_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
3380 {
3381         bus_addr_t *baddr;
3382
3383         baddr = (bus_addr_t *)arg;
3384         *baddr = segs->ds_addr;
3385 }
3386
3387 static PACB
3388 trm_init(u_int16_t unit, device_t dev)
3389 {
3390         PACB            pACB;
3391         int             rid = PCIR_BAR(0), i = 0, j = 0;
3392         u_int16_t       adaptType = 0;
3393
3394         pACB = (PACB) device_get_softc(dev);
3395         if (!pACB) {
3396                 kprintf("trm%d: cannot allocate ACB !\n", unit);
3397                 return (NULL);
3398         }
3399         pACB->iores = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
3400             &rid, RF_ACTIVE);
3401         if (pACB->iores == NULL) {
3402                 kprintf("trm_init: bus_alloc_resource failed!\n");
3403                 return (NULL);
3404         }
3405         switch (pci_get_devid(dev)) {
3406         case PCI_DEVICEID_TRMS1040:
3407                 adaptType = 0;
3408                 break;
3409         case PCI_DEVICEID_TRMS2080:
3410                 adaptType = 1;
3411                 break;
3412         default:
3413                 kprintf("trm_init %d: unknown adapter type!\n", unit);
3414                 goto bad;
3415         }
3416         pACB->dev = dev;
3417         pACB->tag = rman_get_bustag(pACB->iores);
3418         pACB->bsh = rman_get_bushandle(pACB->iores);
3419         if (bus_dma_tag_create(/*parent_dmat*/ pACB->parent_dmat,
3420               /*alignment*/                      1,
3421               /*boundary*/                       0,
3422               /*lowaddr*/  BUS_SPACE_MAXADDR,
3423               /*highaddr*/       BUS_SPACE_MAXADDR,
3424               /*filter*/                      NULL,
3425               /*filterarg*/                   NULL,
3426               /*maxsize*/                 MAXBSIZE,
3427               /*nsegments*/               TRM_NSEG,
3428               /*maxsegsz*/    TRM_MAXTRANSFER_SIZE,
3429               /*flags*/           BUS_DMA_ALLOCNOW,
3430               &pACB->buffer_dmat) != 0)
3431                 goto bad;
3432         /* DMA tag for our ccb structures */
3433         if (bus_dma_tag_create(
3434         /*parent_dmat*/pACB->parent_dmat,
3435         /*alignment*/  1,
3436         /*boundary*/   0,
3437         /*lowaddr*/    BUS_SPACE_MAXADDR,
3438         /*highaddr*/   BUS_SPACE_MAXADDR,
3439         /*filter*/     NULL,
3440         /*filterarg*/  NULL,
3441         /*maxsize*/    TRM_MAX_SRB_CNT * sizeof(TRM_SRB),
3442         /*nsegments*/  1,
3443         /*maxsegsz*/   TRM_MAXTRANSFER_SIZE,
3444         /*flags*/      0,
3445         /*dmat*/       &pACB->srb_dmat) != 0) {
3446                 kprintf("trm_init %d: bus_dma_tag_create SRB failure\n", unit);
3447                 goto bad;
3448         }
3449         if (bus_dmamem_alloc(pACB->srb_dmat, (void **)&pACB->pFreeSRB,
3450             BUS_DMA_NOWAIT, &pACB->srb_dmamap) != 0) {
3451                 kprintf("trm_init %d: bus_dmamem_alloc SRB failure\n", unit);
3452                 goto bad;
3453         }
3454         bus_dmamap_load(pACB->srb_dmat, pACB->srb_dmamap, pACB->pFreeSRB,
3455             TRM_MAX_SRB_CNT * sizeof(TRM_SRB), trm_mapSRB, pACB,
3456             /* flags */0);
3457         /* Create, allocate, and map DMA buffers for autosense data */
3458         if (bus_dma_tag_create(/*parent_dmat*/NULL, /*alignment*/1,
3459             /*boundary*/0,
3460             /*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
3461             /*highaddr*/BUS_SPACE_MAXADDR,
3462             /*filter*/NULL, /*filterarg*/NULL,
3463             sizeof(struct scsi_sense_data) * TRM_MAX_SRB_CNT,
3464             /*nsegments*/1,
3465             /*maxsegsz*/TRM_MAXTRANSFER_SIZE,
3466             /*flags*/0, &pACB->sense_dmat) != 0) {
3467           if (bootverbose)
3468             device_printf(dev, "cannot create sense buffer dmat\n");
3469           goto bad;
3470         }
3471
3472         if (bus_dmamem_alloc(pACB->sense_dmat, (void **)&pACB->sense_buffers,
3473                              BUS_DMA_NOWAIT, &pACB->sense_dmamap) != 0)
3474                 goto bad;
3475
3476         bus_dmamap_load(pACB->sense_dmat, pACB->sense_dmamap,
3477                        pACB->sense_buffers,
3478                        sizeof(struct scsi_sense_data) * TRM_MAX_SRB_CNT,
3479                        trm_dmamap_cb, &pACB->sense_busaddr, /*flags*/0);
3480
3481         trm_check_eeprom(&trm_eepromBuf[unit],pACB);
3482         trm_initACB(pACB, adaptType, unit);
3483         for (i = 0; i < (pACB->max_id + 1); i++) {
3484                 if (pACB->AdaptSCSIID == i)
3485                         continue;
3486                 for(j = 0; j < (pACB->max_lun + 1); j++) {
3487                         pACB->scan_devices[i][j] = 1;
3488                         /* we assume we need to scan all devices */
3489                         trm_initDCB(pACB, &pACB->DCBarray[i][j], unit, i, j);
3490                 }
3491         }
3492         bzero(pACB->pFreeSRB, TRM_MAX_SRB_CNT * sizeof(TRM_SRB));
3493         if (bus_dma_tag_create(
3494                     /*parent_dmat*/NULL,
3495                     /*alignment*/  1,
3496                     /*boundary*/   0,
3497                     /*lowaddr*/    BUS_SPACE_MAXADDR,
3498                     /*highaddr*/   BUS_SPACE_MAXADDR,
3499                     /*filter*/     NULL,
3500                     /*filterarg*/  NULL,
3501                     /*maxsize*/    TRM_MAX_SG_LISTENTRY * sizeof(SGentry),
3502                     /*nsegments*/  1,
3503                     /*maxsegsz*/   TRM_MAXTRANSFER_SIZE,
3504                     /*flags*/      0,
3505                     /*dmat*/       &pACB->sg_dmat) != 0)
3506                 goto bad;
3507
3508         if (trm_initSRB(pACB)) {
3509                 kprintf("trm_initSRB: error\n");
3510                 goto bad;
3511         }
3512         if (trm_initAdapter(pACB, unit)) {
3513                 kprintf("trm_initAdapter: initial ERROR\n");
3514                 goto bad;
3515         }
3516         return (pACB);
3517 bad:
3518         if (pACB->iores)
3519                 bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0),
3520                     pACB->iores);
3521         if (pACB->sense_dmamap) {
3522                 bus_dmamap_unload(pACB->sense_dmat, pACB->sense_dmamap);
3523                 bus_dmamem_free(pACB->sense_dmat, pACB->sense_buffers,
3524                     pACB->sense_dmamap);
3525                 bus_dmamap_destroy(pACB->sense_dmat, pACB->sense_dmamap);
3526         }
3527         if (pACB->sense_dmat)
3528                 bus_dma_tag_destroy(pACB->sense_dmat);
3529         if (pACB->sg_dmat) {
3530                 trm_destroySRB(pACB);
3531                 bus_dma_tag_destroy(pACB->sg_dmat);
3532         }
3533         if (pACB->srb_dmamap) {
3534                 bus_dmamap_unload(pACB->srb_dmat, pACB->srb_dmamap);
3535                 bus_dmamem_free(pACB->srb_dmat, pACB->pFreeSRB,
3536                     pACB->srb_dmamap);
3537                 bus_dmamap_destroy(pACB->srb_dmat, pACB->srb_dmamap);
3538         }
3539         if (pACB->srb_dmat)
3540                 bus_dma_tag_destroy(pACB->srb_dmat);
3541         if (pACB->buffer_dmat)
3542                 bus_dma_tag_destroy(pACB->buffer_dmat);
3543         return (NULL);
3544 }
3545
3546 static int
3547 trm_attach(device_t dev)
3548 {
3549         struct  cam_devq *device_Q;
3550         u_long  device_id;
3551         PACB    pACB = 0;
3552         int     rid = 0;
3553         int unit = device_get_unit(dev);
3554
3555         device_id = pci_get_devid(dev);
3556         /*
3557          * These cards do not allow memory mapped accesses
3558          */
3559         if ((pACB = trm_init((u_int16_t) unit,
3560             dev)) == NULL) {
3561                 kprintf("trm%d: trm_init error!\n",unit);
3562                 return (ENXIO);
3563         }
3564         /* After setting up the adapter, map our interrupt */
3565         /*
3566          * Now let the CAM generic SCSI layer find the SCSI devices on the bus
3567          * start queue to reset to the idle loop.
3568          * Create device queue of SIM(s)
3569          * (MAX_START_JOB - 1) : max_sim_transactions
3570          */
3571         pACB->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
3572             RF_SHAREABLE | RF_ACTIVE);
3573         if (pACB->irq == NULL ||
3574             bus_setup_intr(dev, pACB->irq,
3575                            0, trm_Interrupt, pACB,
3576                            &pACB->ih, NULL)) {
3577                 kprintf("trm%d: register Interrupt handler error!\n", unit);
3578                 goto bad;
3579         }
3580         device_Q = cam_simq_alloc(TRM_MAX_START_JOB);
3581         if (device_Q == NULL){
3582                 kprintf("trm%d: device_Q == NULL !\n",unit);
3583                 goto bad;
3584         }
3585         /*
3586          * Now tell the generic SCSI layer
3587          * about our bus.
3588          * If this is the xpt layer creating a sim, then it's OK
3589          * to wait for an allocation.
3590          * XXX Should we pass in a flag to indicate that wait is OK?
3591          *
3592          *                    SIM allocation
3593          *
3594          *                 SCSI Interface Modules
3595          * The sim driver creates a sim for each controller.  The sim device
3596          * queue is separately created in order to allow resource sharing betwee
3597          * sims.  For instance, a driver may create one sim for each channel of
3598          * a multi-channel controller and use the same queue for each channel.
3599          * In this way, the queue resources are shared across all the channels
3600          * of the multi-channel controller.
3601          * trm_action     : sim_action_func
3602          * trm_poll       : sim_poll_func
3603          * "trm"        : sim_name ,if sim_name =  "xpt" ..M_DEVBUF,M_WAITOK
3604          * pACB         : *softc    if sim_name <> "xpt" ..M_DEVBUF,M_NOWAIT
3605          * pACB->unit   : unit
3606          * 1            : max_dev_transactions
3607          * MAX_TAGS     : max_tagged_dev_transactions
3608          *
3609          *  *******Construct our first channel SIM entry
3610          */
3611         pACB->psim = cam_sim_alloc(trm_action,
3612             trm_poll,
3613             "trm",
3614             pACB,
3615             unit,
3616             &sim_mplock,
3617             1,
3618             TRM_MAX_TAGS_CMD_QUEUE,
3619             device_Q);
3620         cam_simq_release(device_Q);  /* SIM allocate fault*/
3621         if (pACB->psim == NULL) {
3622                 kprintf("trm%d: SIM allocate fault !\n",unit);
3623                 goto bad;
3624         }
3625         if (xpt_bus_register(pACB->psim, 0) != CAM_SUCCESS)  {
3626                 kprintf("trm%d: xpt_bus_register fault !\n",unit);
3627                 goto bad;
3628         }
3629         if (xpt_create_path(&pACB->ppath,
3630               NULL,
3631               cam_sim_path(pACB->psim),
3632               CAM_TARGET_WILDCARD,
3633               CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
3634                 kprintf("trm%d: xpt_create_path fault !\n",unit);
3635                 xpt_bus_deregister(cam_sim_path(pACB->psim));
3636                 goto bad;
3637         }
3638         return (0);
3639 bad:
3640         if (pACB->iores)
3641                 bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0),
3642                     pACB->iores);
3643         if (pACB->sg_dmat) {
3644                 trm_destroySRB(pACB);
3645                 bus_dma_tag_destroy(pACB->sg_dmat);
3646         }
3647
3648         if (pACB->srb_dmamap) {
3649                 bus_dmamap_unload(pACB->srb_dmat, pACB->srb_dmamap);
3650                 bus_dmamem_free(pACB->srb_dmat, pACB->pFreeSRB,
3651                     pACB->srb_dmamap);
3652                 bus_dmamap_destroy(pACB->srb_dmat, pACB->srb_dmamap);
3653         }
3654         if (pACB->srb_dmat)
3655                 bus_dma_tag_destroy(pACB->srb_dmat);
3656         if (pACB->sense_dmamap) {
3657                   bus_dmamap_unload(pACB->sense_dmat, pACB->sense_dmamap);
3658                   bus_dmamem_free(pACB->sense_dmat, pACB->sense_buffers,
3659                       pACB->sense_dmamap);
3660                   bus_dmamap_destroy(pACB->sense_dmat, pACB->sense_dmamap);
3661         }
3662         if (pACB->sense_dmat)
3663                 bus_dma_tag_destroy(pACB->sense_dmat);
3664         if (pACB->buffer_dmat)
3665                 bus_dma_tag_destroy(pACB->buffer_dmat);
3666         if (pACB->ih)
3667                 bus_teardown_intr(dev, pACB->irq, pACB->ih);
3668         if (pACB->irq)
3669                 bus_release_resource(dev, SYS_RES_IRQ, 0, pACB->irq);
3670         if (pACB->psim)
3671                 cam_sim_free(pACB->psim);
3672
3673         return (ENXIO);
3674
3675 }
3676
3677 /*
3678 *                  pci_device
3679 *         trm_probe (device_t tag, pcidi_t type)
3680 *
3681 */
3682 static int
3683 trm_probe(device_t dev)
3684 {
3685         switch (pci_get_devid(dev)) {
3686         case PCI_DEVICEID_TRMS1040:
3687                 device_set_desc(dev,
3688                     "Tekram DC395U/UW/F DC315/U Fast20 Wide SCSI Adapter");
3689                 return (BUS_PROBE_DEFAULT);
3690         case PCI_DEVICEID_TRMS2080:
3691                 device_set_desc(dev,
3692                     "Tekram DC395U2D/U2W Fast40 Wide SCSI Adapter");
3693                 return (BUS_PROBE_DEFAULT);
3694         default:
3695                 return (ENXIO);
3696         }
3697 }
3698
3699 static int
3700 trm_detach(device_t dev)
3701 {
3702         PACB pACB = device_get_softc(dev);
3703
3704         bus_release_resource(dev, SYS_RES_IOPORT, PCIR_BAR(0), pACB->iores);
3705         trm_destroySRB(pACB);
3706         bus_dma_tag_destroy(pACB->sg_dmat);
3707         bus_dmamap_unload(pACB->srb_dmat, pACB->srb_dmamap);
3708         bus_dmamem_free(pACB->srb_dmat, pACB->pFreeSRB,
3709             pACB->srb_dmamap);
3710         bus_dmamap_destroy(pACB->srb_dmat, pACB->srb_dmamap);
3711         bus_dma_tag_destroy(pACB->srb_dmat);
3712         bus_dmamap_unload(pACB->sense_dmat, pACB->sense_dmamap);
3713         bus_dmamem_free(pACB->sense_dmat, pACB->sense_buffers,
3714             pACB->sense_dmamap);
3715         bus_dmamap_destroy(pACB->sense_dmat, pACB->sense_dmamap);
3716         bus_dma_tag_destroy(pACB->sense_dmat);
3717         bus_dma_tag_destroy(pACB->buffer_dmat);
3718         bus_teardown_intr(dev, pACB->irq, pACB->ih);
3719         bus_release_resource(dev, SYS_RES_IRQ, 0, pACB->irq);
3720         xpt_async(AC_LOST_DEVICE, pACB->ppath, NULL);
3721         xpt_free_path(pACB->ppath);
3722         xpt_bus_deregister(cam_sim_path(pACB->psim));
3723         cam_sim_free(pACB->psim);
3724         return (0);
3725 }
3726 static device_method_t trm_methods[] = {
3727         /* Device interface */
3728         DEVMETHOD(device_probe,         trm_probe),
3729         DEVMETHOD(device_attach,        trm_attach),
3730         DEVMETHOD(device_detach,        trm_detach),
3731         { 0, 0 }
3732 };
3733
3734 static driver_t trm_driver = {
3735         "trm", trm_methods, sizeof(struct _ACB)
3736 };
3737
3738 static devclass_t trm_devclass;
3739 DRIVER_MODULE(trm, pci, trm_driver, trm_devclass, 0, 0);
3740 MODULE_DEPEND(trm, cam, 1, 1, 1);