1 /* $NetBSD: _setjmp.S,v 1.2 1996/10/17 03:08:03 cgd Exp $ */
4 * Copyright (c) 1994, 1995 Carnegie-Mellon University.
7 * Author: Chris G. Demetriou
9 * Permission to use, copy, modify and distribute this software and
10 * its documentation is hereby granted, provided that both the copyright
11 * notice and this permission notice appear in all copies of the
12 * software, derivative works or modified versions, and any portions
13 * thereof, and that both notices appear in supporting documentation.
15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
19 * Carnegie Mellon requests users of this software to return to
21 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
22 * School of Computer Science
23 * Carnegie Mellon University
24 * Pittsburgh PA 15213-3890
26 * any improvements or extensions that they make and grant Carnegie the
27 * rights to redistribute these changes.
29 * $FreeBSD: src/lib/libc/alpha/gen/_setjmp.S,v 1.4.2.3 2001/12/30 19:52:20 deischen Exp $
30 * $DragonFly: src/lib/libc/alpha/gen/Attic/_setjmp.S,v 1.2 2003/06/17 04:26:41 dillon Exp $
33 #include <machine/asm.h>
36 * C library -- _setjmp, _longjmp
39 * will generate a "return(v)" from
42 * by restoring registers from the stack,
43 * The previous signal state is NOT restored.
50 stq ra, (2 * 8)(a0) /* sc_pc = return address */
51 stq s0, (( 9 + 4) * 8)(a0) /* saved bits of sc_regs */
52 stq s1, ((10 + 4) * 8)(a0)
53 stq s2, ((11 + 4) * 8)(a0)
54 stq s3, ((12 + 4) * 8)(a0)
55 stq s4, ((13 + 4) * 8)(a0)
56 stq s5, ((14 + 4) * 8)(a0)
57 stq s6, ((15 + 4) * 8)(a0)
58 stq ra, ((26 + 4) * 8)(a0)
59 stq t12,((27 + 4) * 8)(a0)
60 stq sp, ((30 + 4) * 8)(a0)
61 ldiq t0, 0xacedbadd /* sigcontext magic number */
62 stq t0, ((31 + 4) * 8)(a0) /* magic in sc_regs[31] */
63 /* Too bad we can't check if we actually used FP */
65 stq t0, (36 * 8)(a0) /* say we've used FP. */
66 stt fs0, ((2 + 37) * 8)(a0) /* saved bits of sc_fpregs */
67 stt fs1, ((3 + 37) * 8)(a0)
68 stt fs2, ((4 + 37) * 8)(a0)
69 stt fs3, ((5 + 37) * 8)(a0)
70 stt fs4, ((6 + 37) * 8)(a0)
71 stt fs5, ((7 + 37) * 8)(a0)
72 stt fs6, ((8 + 37) * 8)(a0)
73 stt fs7, ((9 + 37) * 8)(a0)
74 mf_fpcr ft0 /* get FP control reg */
75 stt ft0, (69 * 8)(a0) /* and store it in sc_fpcr */
76 stq zero, (70 * 8)(a0) /* FP software control XXX */
77 stq zero, (71 * 8)(a0) /* sc_reserved[0] */
78 stq zero, (72 * 8)(a0) /* sc_reserved[1] */
79 stq zero, (73 * 8)(a0) /* sc_xxx[0] */
80 stq zero, (74 * 8)(a0) /* sc_xxx[1] */
81 stq zero, (75 * 8)(a0) /* sc_xxx[2] */
82 stq zero, (76 * 8)(a0) /* sc_xxx[3] */
83 stq zero, (77 * 8)(a0) /* sc_xxx[4] */
84 stq zero, (78 * 8)(a0) /* sc_xxx[5] */
85 stq zero, (79 * 8)(a0) /* sc_xxx[6] */
86 stq zero, (80 * 8)(a0) /* sc_xxx[7] */
88 mov zero, v0 /* return zero */
99 ldq t0, ((31 + 4) * 8)(a0) /* magic in sc_regs[31] */
102 beq t0, botch /* If the magic was bad, punt */
104 ldq ra, (2 * 8)(a0) /* sc_pc = return address */
105 ldq s0, (( 9 + 4) * 8)(a0) /* saved bits of sc_regs */
106 ldq s1, ((10 + 4) * 8)(a0)
107 ldq s2, ((11 + 4) * 8)(a0)
108 ldq s3, ((12 + 4) * 8)(a0)
109 ldq s4, ((13 + 4) * 8)(a0)
110 ldq s5, ((14 + 4) * 8)(a0)
111 ldq s6, ((15 + 4) * 8)(a0)
112 /* ldq ra, ((26 + 4) * 8)(a0) set above */
113 ldq t12,((27 + 4) * 8)(a0)
114 ldq sp, ((30 + 4) * 8)(a0)
115 ldt fs0, ((2 + 37) * 8)(a0) /* saved bits of sc_fpregs */
116 ldt fs1, ((3 + 37) * 8)(a0)
117 ldt fs2, ((4 + 37) * 8)(a0)
118 ldt fs3, ((5 + 37) * 8)(a0)
119 ldt fs4, ((6 + 37) * 8)(a0)
120 ldt fs5, ((7 + 37) * 8)(a0)
121 ldt fs6, ((8 + 37) * 8)(a0)
122 ldt fs7, ((9 + 37) * 8)(a0)
123 ldt ft0, (69 * 8)(a0) /* get sc_fpcr */
124 mt_fpcr ft0 /* and restore it. */
126 mov a1, v0 /* return second arg */
132 RET /* "can't" get here... */