sys/dev/misc/xrpu/xrpu.c

   1 /*
   2  * ----------------------------------------------------------------------------
   3  * "THE BEER-WARE LICENSE" (Revision 42):
   4  * <phk@FreeBSD.org> wrote this file.  As long as you retain this notice you
   5  * can do whatever you want with this stuff. If we meet some day, and you think
   6  * this stuff is worth it, you can buy me a beer in return.   Poul-Henning Kamp
   7  * ----------------------------------------------------------------------------
   8  *
   9  * $FreeBSD: src/sys/pci/xrpu.c,v 1.19.2.1 2000/08/02 22:19:57 peter Exp $
  10  * $DragonFly: src/sys/dev/misc/xrpu/Attic/xrpu.c,v 1.2 2003/06/17 04:28:57 dillon Exp $
  11  *
  12  * A very simple device driver for PCI cards based on Xilinx 6200 series
  13  * FPGA/RPU devices.  Current Functionality is to allow you to open and
  14  * mmap the entire thing into your program.
  15  *
  16  * Hardware currently supported:
  17  *      www.vcc.com HotWorks 1 6216 based card.
  18  *
  19  */
  20
  21 #include <sys/param.h>
  22 #include <sys/systm.h>
  23 #include <sys/conf.h>
  24 #include <sys/kernel.h>
  25 #include <sys/malloc.h>
  26 #include <sys/timepps.h>
  27 #include <sys/xrpuio.h>
  28 #include <sys/bus.h>
  29 #include <machine/bus.h>
  30 #include <sys/rman.h>
  31 #include <machine/resource.h>
  32 #include <pci/pcireg.h>
  33 #include <pci/pcivar.h>
  34 #include "pci_if.h"
  35
  36 /*
  37  * Device driver initialization stuff
  38  */
  39
  40 static d_open_t xrpu_open;
  41 static d_close_t xrpu_close;
  42 static d_ioctl_t xrpu_ioctl;
  43 static d_mmap_t xrpu_mmap;
  44
  45 #define CDEV_MAJOR 100
  46 static struct cdevsw xrpu_cdevsw = {
  47         /* open */      xrpu_open,
  48         /* close */     xrpu_close,
  49         /* read */      noread,
  50         /* write */     nowrite,
  51         /* ioctl */     xrpu_ioctl,
  52         /* poll */      nopoll,
  53         /* mmap */      xrpu_mmap,
  54         /* strategy */  nostrategy,
  55         /* name */      "xrpu",
  56         /* maj */       CDEV_MAJOR,
  57         /* dump */      nodump,
  58         /* psize */     nopsize,
  59         /* flags */     0,
  60         /* bmaj */      -1
  61 };
  62
  63 static MALLOC_DEFINE(M_XRPU, "xrpu", "XRPU related");
  64
  65 static devclass_t xrpu_devclass;
  66
  67 #define dev2unit(devt) (minor(devt) & 0xff)
  68 #define dev2pps(devt) ((minor(devt) >> 16)-1)
  69
  70 struct softc {
  71         enum { NORMAL, TIMECOUNTER } mode;
  72         vm_offset_t virbase, physbase;
  73         u_int   *virbase62;
  74         struct timecounter tc;
  75         u_int *trigger, *latch, dummy;
  76         struct pps_state pps[XRPU_MAX_PPS];
  77         u_int *assert[XRPU_MAX_PPS], *clear[XRPU_MAX_PPS];
  78 };
  79
  80 static unsigned
  81 xrpu_get_timecount(struct timecounter *tc)
  82 {
  83         struct softc *sc = tc->tc_priv;
  84
  85         sc->dummy += *sc->trigger;
  86         return (*sc->latch & tc->tc_counter_mask);
  87 }
  88
  89 static void
  90 xrpu_poll_pps(struct timecounter *tc)
  91 {
  92         struct softc *sc = tc->tc_priv;
  93         int i, j;
  94         unsigned count1, ppscount;
  95
  96         for (i = 0; i < XRPU_MAX_PPS; i++) {
  97                 if (sc->assert[i]) {
  98                         ppscount = *(sc->assert[i]) & tc->tc_counter_mask;
  99                         j = 0;
 100                         do {
 101                                 count1 = ppscount;
 102                                 ppscount =  *(sc->assert[i]) & tc->tc_counter_mask;
 103                         } while (ppscount != count1 && ++j < 5);
 104                         pps_event(&sc->pps[i], tc, ppscount, PPS_CAPTUREASSERT);
 105                 }
 106                 if (sc->clear[i]) {
 107                         j = 0;
 108                         ppscount = *(sc->clear[i]) & tc->tc_counter_mask;
 109                         do {
 110                                 count1 = ppscount;
 111                                 ppscount =  *(sc->clear[i]) & tc->tc_counter_mask;
 112                         } while (ppscount != count1 && ++j < 5);
 113                         pps_event(&sc->pps[i], tc, ppscount, PPS_CAPTURECLEAR);
 114                 }
 115         }
 116 }
 117
 118 static int
 119 xrpu_open(dev_t dev, int flag, int mode, struct proc *p)
 120 {
 121         struct softc *sc = devclass_get_softc(xrpu_devclass, dev2unit(dev));
 122
 123         if (!sc)
 124                 return (ENXIO);
 125         dev->si_drv1 = sc;
 126         return (0);
 127 }
 128
 129 static int
 130 xrpu_close(dev_t dev, int flag, int mode, struct proc *p)
 131 {
 132         return (0);
 133 }
 134
 135 static int
 136 xrpu_mmap(dev_t dev, vm_offset_t offset, int nprot)
 137 {
 138         struct softc *sc = dev->si_drv1;
 139         if (offset >= 0x1000000)
 140                 return (-1);
 141         return (i386_btop(sc->physbase + offset));
 142 }
 143
 144 static int
 145 xrpu_ioctl(dev_t dev, u_long cmd, caddr_t arg, int flag, struct proc *pr)
 146 {
 147         struct softc *sc = dev->si_drv1;
 148         int i, error;
 149
 150         if (sc->mode == TIMECOUNTER) {
 151                 i = dev2pps(dev);
 152                 if (i < 0 || i >= XRPU_MAX_PPS)
 153                         return ENODEV;
 154                 error =  pps_ioctl(cmd, arg, &sc->pps[i]);
 155                 return (error);
 156         }
 157
 158         if (cmd == XRPU_IOC_TIMECOUNTING) {
 159                 struct xrpu_timecounting *xt = (struct xrpu_timecounting *)arg;
 160
 161                 /* Name SHALL be zero terminated */
 162                 xt->xt_name[sizeof xt->xt_name - 1] = '\0';
 163                 i = strlen(xt->xt_name);
 164                 sc->tc.tc_name = (char *)malloc(i + 1, M_XRPU, M_WAITOK);
 165                 strcpy(sc->tc.tc_name, xt->xt_name);
 166                 sc->tc.tc_frequency = xt->xt_frequency;
 167                 sc->tc.tc_get_timecount = xrpu_get_timecount;
 168                 sc->tc.tc_poll_pps = xrpu_poll_pps;
 169                 sc->tc.tc_priv = sc;
 170                 sc->tc.tc_counter_mask = xt->xt_mask;
 171                 sc->trigger = sc->virbase62 + xt->xt_addr_trigger;
 172                 sc->latch = sc->virbase62 + xt->xt_addr_latch;
 173
 174                 for (i = 0; i < XRPU_MAX_PPS; i++) {
 175                         if (xt->xt_pps[i].xt_addr_assert == 0
 176                             && xt->xt_pps[i].xt_addr_clear == 0)
 177                                 continue;
 178                         make_dev(&xrpu_cdevsw, (i+1)<<16,
 179                             UID_ROOT, GID_WHEEL, 0600, "xpps%d", i);
 180                         sc->pps[i].ppscap = 0;
 181                         if (xt->xt_pps[i].xt_addr_assert) {
 182                                 sc->assert[i] = sc->virbase62 + xt->xt_pps[i].xt_addr_assert;
 183                                 sc->pps[i].ppscap |= PPS_CAPTUREASSERT;
 184                         }
 185                         if (xt->xt_pps[i].xt_addr_clear) {
 186                                 sc->clear[i] = sc->virbase62 + xt->xt_pps[i].xt_addr_clear;
 187                                 sc->pps[i].ppscap |= PPS_CAPTURECLEAR;
 188                         }
 189                         pps_init(&sc->pps[i]);
 190                 }
 191                 sc->mode = TIMECOUNTER;
 192                 init_timecounter(&sc->tc);
 193                 return (0);
 194         }
 195         error = ENOTTY;
 196         return (error);
 197 }
 198
 199 /*
 200  * PCI initialization stuff
 201  */
 202
 203 static int
 204 xrpu_probe(device_t self)
 205 {
 206         char *desc;
 207
 208         desc = NULL;
 209         switch (pci_get_devid(self)) {
 210         case 0x6216133e:
 211                 desc = "VCC Hotworks-I xc6216";
 212                 break;
 213         }
 214         if (desc == NULL)
 215                 return ENXIO;
 216
 217         device_set_desc(self, desc);
 218         return 0;
 219 }
 220
 221 static int
 222 xrpu_attach(device_t self)
 223 {
 224         struct softc *sc;
 225         struct resource *res;
 226         int rid, unit;
 227
 228         unit = device_get_unit(self);
 229         sc = device_get_softc(self);
 230         sc->mode = NORMAL;
 231         rid = PCIR_MAPS;
 232         res = bus_alloc_resource(self, SYS_RES_MEMORY, &rid,
 233                                  0, ~0, 1, RF_ACTIVE);
 234         if (res == NULL) {
 235                 device_printf(self, "Could not map memory\n");
 236                 return ENXIO;
 237         }
 238         sc->virbase = (vm_offset_t)rman_get_virtual(res);
 239         sc->physbase = rman_get_start(res);
 240         sc->virbase62 = (u_int *)(sc->virbase + 0x800000);
 241
 242         if (bootverbose)
 243                 printf("Mapped physbase %#lx to virbase %#lx\n",
 244                     (u_long)sc->physbase, (u_long)sc->virbase);
 245
 246         make_dev(&xrpu_cdevsw, 0, UID_ROOT, GID_WHEEL, 0600, "xrpu%d", unit);
 247         return 0;
 248 }
 249
 250 static device_method_t xrpu_methods[] = {
 251         /* Device interface */
 252         DEVMETHOD(device_probe,         xrpu_probe),
 253         DEVMETHOD(device_attach,        xrpu_attach),
 254         DEVMETHOD(device_suspend,       bus_generic_suspend),
 255         DEVMETHOD(device_resume,        bus_generic_resume),
 256         DEVMETHOD(device_shutdown,      bus_generic_shutdown),
 257
 258         {0, 0}
 259 };
 260
 261 static driver_t xrpu_driver = {
 262         "xrpu",
 263         xrpu_methods,
 264         sizeof(struct softc)
 265 };
 266
 267
 268 DRIVER_MODULE(xrpu, pci, xrpu_driver, xrpu_devclass, 0, 0);