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37 * Author: Archie Cobbs <archie@freebsd.org>
39 * $FreeBSD: src/sys/dev/ichsmb/ichsmb_pci.c,v 1.1.2.3 2002/10/20 14:57:19 nyan Exp $
40 * $DragonFly: src/sys/dev/powermng/ichsmb/ichsmb_pci.c,v 1.3 2003/08/07 21:17:07 dillon Exp $
44 * Support for the SMBus controller logical device which is part of the
45 * Intel 81801AA (ICH) and 81801AB (ICH0) I/O controller hub chips.
48 #include <sys/param.h>
49 #include <sys/systm.h>
50 #include <sys/kernel.h>
51 #include <sys/errno.h>
52 #include <sys/syslog.h>
55 #include <machine/bus.h>
57 #include <machine/resource.h>
59 #include <bus/pci/pcivar.h>
60 #include <bus/pci/pcireg.h>
62 #include <bus/smbus/smbconf.h>
64 #include "ichsmb_var.h"
65 #include "ichsmb_reg.h"
67 /* PCI unique identifiers */
68 #define ID_82801AA 0x24138086
69 #define ID_82801AB 0x24238086
70 #define ID_82801BA 0x24438086
71 #define ID_82801CA 0x24838086
73 #define PCIS_SERIALBUS_SMBUS_PROGIF 0x00
75 /* Internal functions */
76 static int ichsmb_pci_probe(device_t dev);
77 static int ichsmb_pci_attach(device_t dev);
80 static device_method_t ichsmb_pci_methods[] = {
81 /* Device interface */
82 DEVMETHOD(device_probe, ichsmb_pci_probe),
83 DEVMETHOD(device_attach, ichsmb_pci_attach),
86 DEVMETHOD(bus_print_child, bus_generic_print_child),
89 DEVMETHOD(smbus_callback, ichsmb_callback),
90 DEVMETHOD(smbus_quick, ichsmb_quick),
91 DEVMETHOD(smbus_sendb, ichsmb_sendb),
92 DEVMETHOD(smbus_recvb, ichsmb_recvb),
93 DEVMETHOD(smbus_writeb, ichsmb_writeb),
94 DEVMETHOD(smbus_writew, ichsmb_writew),
95 DEVMETHOD(smbus_readb, ichsmb_readb),
96 DEVMETHOD(smbus_readw, ichsmb_readw),
97 DEVMETHOD(smbus_pcall, ichsmb_pcall),
98 DEVMETHOD(smbus_bwrite, ichsmb_bwrite),
99 DEVMETHOD(smbus_bread, ichsmb_bread),
103 static driver_t ichsmb_pci_driver = {
106 sizeof(struct ichsmb_softc)
109 static devclass_t ichsmb_pci_devclass;
111 DRIVER_MODULE(ichsmb, pci, ichsmb_pci_driver, ichsmb_pci_devclass, 0, 0);
114 ichsmb_pci_probe(device_t dev)
116 /* Check PCI identifier */
117 switch (pci_get_devid(dev)) {
119 device_set_desc(dev, "Intel 82801AA (ICH) SMBus controller");
122 device_set_desc(dev, "Intel 82801AB (ICH0) SMBus controller");
125 device_set_desc(dev, "Intel 82801BA (ICH2) SMBus controller");
128 device_set_desc(dev, "Intel 82801CA (ICH3) SMBus controller");
131 if (pci_get_class(dev) == PCIC_SERIALBUS
132 && pci_get_subclass(dev) == PCIS_SERIALBUS_SMBUS
133 && pci_get_progif(dev) == PCIS_SERIALBUS_SMBUS_PROGIF) {
134 device_set_desc(dev, "SMBus controller");
135 return (-2); /* XXX */
141 return (ichsmb_probe(dev));
145 ichsmb_pci_attach(device_t dev)
147 const sc_p sc = device_get_softc(dev);
151 /* Initialize private state */
152 bzero(sc, sizeof(*sc));
156 /* Allocate an I/O range */
157 sc->io_rid = ICH_SMB_BASE;
158 sc->io_res = bus_alloc_resource(dev, SYS_RES_IOPORT,
159 &sc->io_rid, 0, ~0, 16, RF_ACTIVE);
160 if (sc->io_res == NULL) {
161 log(LOG_ERR, "%s: can't map I/O\n", device_get_nameunit(dev));
165 sc->io_bst = rman_get_bustag(sc->io_res);
166 sc->io_bsh = rman_get_bushandle(sc->io_res);
168 /* Allocate interrupt */
170 sc->irq_res = bus_alloc_resource(dev, SYS_RES_IRQ,
171 &sc->irq_rid, 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE);
172 if (sc->irq_res == NULL) {
173 log(LOG_ERR, "%s: can't get IRQ\n", device_get_nameunit(dev));
178 /* Set up interrupt handler */
179 error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC,
180 ichsmb_device_intr, sc, &sc->irq_handle);
182 log(LOG_ERR, "%s: can't setup irq\n", device_get_nameunit(dev));
186 /* Enable I/O mapping */
187 cmd = pci_read_config(dev, PCIR_COMMAND, 4);
188 cmd |= PCIM_CMD_PORTEN;
189 pci_write_config(dev, PCIR_COMMAND, cmd, 4);
190 cmd = pci_read_config(dev, PCIR_COMMAND, 4);
191 if ((cmd & PCIM_CMD_PORTEN) == 0) {
192 log(LOG_ERR, "%s: can't enable memory map\n",
193 device_get_nameunit(dev));
199 pci_write_config(dev, ICH_HOSTC, ICH_HOSTC_HST_EN, 1);
202 return (ichsmb_attach(dev));
205 /* Attach failed, release resources */
206 ichsmb_release_resources(sc);