2 * opl3.h - Definitions of the OPL-3 registers
4 * Copyright by Hannu Savolainen 1993
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30 * The OPL-3 mode is switched on by writing 0x01, to the offset 5
33 * Another special register at the right side is at offset 4. It contains
34 * a bit mask defining which voices are used as 4 OP voices.
36 * The percussive mode is implemented in the left side only.
38 * With the above exeptions the both sides can be operated independently.
40 * A 4 OP voice can be created by setting the corresponding
41 * bit at offset 4 of the right side.
43 * For example setting the rightmost bit (0x01) changes the
44 * first voice on the right side to the 4 OP mode. The fourth
45 * voice is made inaccessible.
47 * If a voice is set to the 2 OP mode, it works like 2 OP modes
48 * of the original YM3812 (AdLib). In addition the voice can
49 * be connected the left, right or both stereo channels. It can
50 * even be left unconnected. This works with 4 OP voices also.
52 * The stereo connection bits are located in the FEEDBACK_CONNECTION
53 * register of the voice (0xC0-0xC8). In 4 OP voices these bits are
54 * in the second half of the voice.
58 * Register numbers for the global registers
61 #define TEST_REGISTER 0x01
62 #define ENABLE_WAVE_SELECT 0x20
64 #define TIMER1_REGISTER 0x02
65 #define TIMER2_REGISTER 0x03
66 #define TIMER_CONTROL_REGISTER 0x04 /* Left side */
67 #define IRQ_RESET 0x80
68 #define TIMER1_MASK 0x40
69 #define TIMER2_MASK 0x20
70 #define TIMER1_START 0x01
71 #define TIMER2_START 0x02
73 #define CONNECTION_SELECT_REGISTER 0x04 /* Right side */
74 #define RIGHT_4OP_0 0x01
75 #define RIGHT_4OP_1 0x02
76 #define RIGHT_4OP_2 0x04
77 #define LEFT_4OP_0 0x08
78 #define LEFT_4OP_1 0x10
79 #define LEFT_4OP_2 0x20
81 #define OPL3_MODE_REGISTER 0x05 /* Right side */
82 #define OPL3_ENABLE 0x01
83 #define OPL4_ENABLE 0x02
85 #define KBD_SPLIT_REGISTER 0x08 /* Left side */
86 #define COMPOSITE_SINE_WAVE_MODE 0x80 /* Don't use with OPL-3? */
87 #define KEYBOARD_SPLIT 0x40
89 #define PERCUSSION_REGISTER 0xbd /* Left side only */
90 #define TREMOLO_DEPTH 0x80
91 #define VIBRATO_DEPTH 0x40
92 #define PERCUSSION_ENABLE 0x20
93 #define BASSDRUM_ON 0x10
94 #define SNAREDRUM_ON 0x08
95 #define TOMTOM_ON 0x04
96 #define CYMBAL_ON 0x02
100 * Offsets to the register banks for operators. To get the
101 * register number just add the operator offset to the bank offset
103 * AM/VIB/EG/KSR/Multiple (0x20 to 0x35)
106 #define TREMOLO_ON 0x80
107 #define VIBRATO_ON 0x40
108 #define SUSTAIN_ON 0x20
109 #define KSR 0x10 /* Key scaling rate */
110 #define MULTIPLE_MASK 0x0f /* Frequency multiplier */
113 * KSL/Total level (0x40 to 0x55)
115 #define KSL_LEVEL 0x40
116 #define KSL_MASK 0xc0 /* Envelope scaling bits */
117 #define TOTAL_LEVEL_MASK 0x3f /* Strength (volume) of OP */
120 * Attack / Decay rate (0x60 to 0x75)
122 #define ATTACK_DECAY 0x60
123 #define ATTACK_MASK 0xf0
124 #define DECAY_MASK 0x0f
127 * Sustain level / Release rate (0x80 to 0x95)
129 #define SUSTAIN_RELEASE 0x80
130 #define SUSTAIN_MASK 0xf0
131 #define RELEASE_MASK 0x0f
134 * Wave select (0xE0 to 0xF5)
136 #define WAVE_SELECT 0xe0
139 * Offsets to the register banks for voices. Just add to the
140 * voice number to get the register number.
142 * F-Number low bits (0xA0 to 0xA8).
144 #define FNUM_LOW 0xa0
147 * F-number high bits / Key on / Block (octave) (0xB0 to 0xB8)
149 #define KEYON_BLOCK 0xb0
150 #define KEYON_BIT 0x20
151 #define BLOCKNUM_MASK 0x1c
152 #define FNUM_HIGH_MASK 0x03
155 * Feedback / Connection (0xc0 to 0xc8)
157 * These registers have two new bits when the OPL-3 mode
158 * is selected. These bits controls connecting the voice
159 * to the stereo channels. For 4 OP voices this bit is
160 * defined in the second half of the voice (add 3 to the
163 * For 4 OP voices the connection bit is used in the
164 * both halfs (gives 4 ways to connect the operators).
166 #define FEEDBACK_CONNECTION 0xc0
167 #define FEEDBACK_MASK 0x0e /* Valid just for 1st OP of a voice */
168 #define CONNECTION_BIT 0x01
170 * In the 4 OP mode there is four possible configurations how the
171 * operators can be connected together (in 2 OP modes there is just
172 * AM or FM). The 4 OP connection mode is defined by the rightmost
173 * bit of the FEEDBACK_CONNECTION (0xC0-0xC8) on the both halfs.
175 * First half Second half Mode
179 * 0 0 >+-1-+--2--3--4-->
203 #define STEREO_BITS 0x30 /* OPL-3 only */
204 #define VOICE_TO_LEFT 0x10
205 #define VOICE_TO_RIGHT 0x20
208 * Definition table for the physical voices
211 struct physical_voice_info {
212 unsigned char voice_num;
213 unsigned char voice_mode; /* 0=unavailable, 2=2 OP, 4=4 OP */
214 unsigned short ioaddr; /* I/O port (left or right side) */
215 unsigned char op[4]; /* Operator offsets */
219 * There is 18 possible 2 OP voices
220 * (9 in the left and 9 in the right).
221 * The first OP is the modulator and 2nd is the carrier.
223 * The first three voices in the both sides may be connected
224 * with another voice to a 4 OP voice. For example voice 0
225 * can be connected with voice 3. The operators of voice 3 are
226 * used as operators 3 and 4 of the new 4 OP voice.
227 * In this case the 2 OP voice number 0 is the 'first half' and
228 * voice 3 is the second.
234 static struct physical_voice_info pv_map[18] =
236 /* No Mode Side OP1 OP2 OP3 OP4 */
237 /* --------------------------------------------------- */
238 { 0, 2, USE_LEFT, {0x00, 0x03, 0x08, 0x0b}},
239 { 1, 2, USE_LEFT, {0x01, 0x04, 0x09, 0x0c}},
240 { 2, 2, USE_LEFT, {0x02, 0x05, 0x0a, 0x0d}},
242 { 3, 2, USE_LEFT, {0x08, 0x0b, 0x00, 0x00}},
243 { 4, 2, USE_LEFT, {0x09, 0x0c, 0x00, 0x00}},
244 { 5, 2, USE_LEFT, {0x0a, 0x0d, 0x00, 0x00}},
246 { 6, 2, USE_LEFT, {0x10, 0x13, 0x00, 0x00}}, /* Used by percussive voices */
247 { 7, 2, USE_LEFT, {0x11, 0x14, 0x00, 0x00}}, /* if the percussive mode */
248 { 8, 2, USE_LEFT, {0x12, 0x15, 0x00, 0x00}}, /* is selected */
250 { 0, 2, USE_RIGHT, {0x00, 0x03, 0x08, 0x0b}},
251 { 1, 2, USE_RIGHT, {0x01, 0x04, 0x09, 0x0c}},
252 { 2, 2, USE_RIGHT, {0x02, 0x05, 0x0a, 0x0d}},
254 { 3, 2, USE_RIGHT, {0x08, 0x0b, 0x00, 0x00}},
255 { 4, 2, USE_RIGHT, {0x09, 0x0c, 0x00, 0x00}},
256 { 5, 2, USE_RIGHT, {0x0a, 0x0d, 0x00, 0x00}},
258 { 6, 2, USE_RIGHT, {0x10, 0x13, 0x00, 0x00}},
259 { 7, 2, USE_RIGHT, {0x11, 0x14, 0x00, 0x00}},
260 { 8, 2, USE_RIGHT, {0x12, 0x15, 0x00, 0x00}}