Sync USB support (host controller part) with FreeBSD6.
[dragonfly.git] / sys / bus / usb / ohci_pci.c
1 /*
2  * Copyright (c) 1998 The NetBSD Foundation, Inc.
3  * All rights reserved.
4  *
5  * This code is derived from software contributed to The NetBSD Foundation
6  * by Lennart Augustsson (augustss@carlstedt.se) at
7  * Carlstedt Research & Technology.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *        This product includes software developed by the NetBSD
20  *        Foundation, Inc. and its contributors.
21  * 4. Neither the name of The NetBSD Foundation nor the names of its
22  *    contributors may be used to endorse or promote products derived
23  *    from this software without specific prior written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
26  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  *
37  * $FreeBSD: src/sys/dev/usb/ohci_pci.c,v 1.44.2.1 2006/01/29 01:26:46 iedowse Exp $
38  * $DragonFly: src/sys/bus/usb/ohci_pci.c,v 1.6 2006/12/10 02:03:56 sephe Exp $
39  */
40
41 /*
42  * USB Open Host Controller driver.
43  *
44  * OHCI spec: http://www.intel.com/design/usb/ohci11d.pdf
45  */
46
47 /* The low level controller code for OHCI has been split into
48  * PCI probes and OHCI specific code. This was done to facilitate the
49  * sharing of code between *BSD's
50  */
51
52 #include "opt_bus.h"
53
54 #include <sys/param.h>
55 #include <sys/systm.h>
56 #include <sys/kernel.h>
57 #include <sys/module.h>
58 #include <sys/bus.h>
59 #include <sys/queue.h>
60 #include <sys/rman.h>
61
62 #include <bus/pci/pcivar.h>
63 #include <bus/pci/pcireg.h>
64
65 #include <bus/usb/usb.h>
66 #include <bus/usb/usbdi.h>
67 #include <bus/usb/usbdivar.h>
68 #include <bus/usb/usb_mem.h>
69
70 #include <bus/usb/ohcireg.h>
71 #include <bus/usb/ohcivar.h>
72
73 #define PCI_OHCI_VENDORID_ACERLABS      0x10b9
74 #define PCI_OHCI_VENDORID_AMD           0x1022
75 #define PCI_OHCI_VENDORID_APPLE         0x106b
76 #define PCI_OHCI_VENDORID_ATI           0x1002
77 #define PCI_OHCI_VENDORID_CMDTECH       0x1095
78 #define PCI_OHCI_VENDORID_NEC           0x1033
79 #define PCI_OHCI_VENDORID_NVIDIA        0x12D2
80 #define PCI_OHCI_VENDORID_NVIDIA2       0x10DE
81 #define PCI_OHCI_VENDORID_OPTI          0x1045
82 #define PCI_OHCI_VENDORID_SIS           0x1039
83 #define PCI_OHCI_VENDORID_SUN           0x108e
84
85 #define PCI_OHCI_DEVICEID_ALADDIN_V     0x523710b9
86 static const char *ohci_device_aladdin_v = "AcerLabs M5237 (Aladdin-V) USB controller";
87
88 #define PCI_OHCI_DEVICEID_AMD756        0x740c1022
89 static const char *ohci_device_amd756 = "AMD-756 USB Controller";
90
91 #define PCI_OHCI_DEVICEID_AMD766        0x74141022
92 static const char *ohci_device_amd766 = "AMD-766 USB Controller";
93
94 #define PCI_OHCI_DEVICEID_SB400_1       0x43741002
95 #define PCI_OHCI_DEVICEID_SB400_2       0x43751002
96 static const char *ohci_device_sb400 = "ATI SB400 USB Controller";
97
98 #define PCI_OHCI_DEVICEID_FIRELINK      0xc8611045
99 static const char *ohci_device_firelink = "OPTi 82C861 (FireLink) USB controller";
100
101 #define PCI_OHCI_DEVICEID_NEC           0x00351033
102 static const char *ohci_device_nec = "NEC uPD 9210 USB controller";
103
104 #define PCI_OHCI_DEVICEID_NFORCE3       0x00d710de
105 static const char *ohci_device_nforce3 = "nVidia nForce3 USB Controller";
106
107 #define PCI_OHCI_DEVICEID_USB0670       0x06701095
108 static const char *ohci_device_usb0670 = "CMD Tech 670 (USB0670) USB controller";
109
110 #define PCI_OHCI_DEVICEID_USB0673       0x06731095
111 static const char *ohci_device_usb0673 = "CMD Tech 673 (USB0673) USB controller";
112
113 #define PCI_OHCI_DEVICEID_SIS5571       0x70011039
114 static const char *ohci_device_sis5571 = "SiS 5571 USB controller";
115
116 #define PCI_OHCI_DEVICEID_KEYLARGO      0x0019106b
117 static const char *ohci_device_keylargo = "Apple KeyLargo USB controller";
118
119 #define PCI_OHCI_DEVICEID_PCIO2USB      0x1103108e
120 static const char *ohci_device_pcio2usb = "Sun PCIO-2 USB controller";
121
122 static const char *ohci_device_generic = "OHCI (generic) USB controller";
123
124 #define PCI_OHCI_BASE_REG       0x10
125
126
127 static int ohci_pci_attach(device_t self);
128 static int ohci_pci_detach(device_t self);
129 static int ohci_pci_suspend(device_t self);
130 static int ohci_pci_resume(device_t self);
131
132 static int
133 ohci_pci_suspend(device_t self)
134 {
135         ohci_softc_t *sc = device_get_softc(self);
136         int err;
137
138         err = bus_generic_suspend(self);
139         if (err)
140                 return err;
141         ohci_power(PWR_SUSPEND, sc);
142
143         return 0;
144 }
145
146 static int
147 ohci_pci_resume(device_t self)
148 {
149         ohci_softc_t *sc = device_get_softc(self);
150
151 #ifndef BURN_BRIDGES
152         uint32_t reg, int_line;
153
154         if (pci_get_powerstate(self) != PCI_POWERSTATE_D0) {
155                 device_printf(self, "chip is in D%d mode "
156                         "-- setting to D0\n", pci_get_powerstate(self));
157                 reg = pci_read_config(self, PCI_CBMEM, 4);
158                 int_line = pci_read_config(self, PCIR_INTLINE, 4);
159                 pci_set_powerstate(self, PCI_POWERSTATE_D0);
160                 pci_write_config(self, PCI_CBMEM, reg, 4);
161                 pci_write_config(self, PCIR_INTLINE, int_line, 4);
162         }
163 #endif  /* !BURN_BRIDGES */
164
165         ohci_power(PWR_RESUME, sc);
166         bus_generic_resume(self);
167
168         return 0;
169 }
170
171 static const char *
172 ohci_pci_match(device_t self)
173 {
174         u_int32_t device_id = pci_get_devid(self);
175
176         switch (device_id) {
177         case PCI_OHCI_DEVICEID_ALADDIN_V:
178                 return (ohci_device_aladdin_v);
179         case PCI_OHCI_DEVICEID_AMD756:
180                 return (ohci_device_amd756);
181         case PCI_OHCI_DEVICEID_AMD766:
182                 return (ohci_device_amd766);
183         case PCI_OHCI_DEVICEID_SB400_1:
184         case PCI_OHCI_DEVICEID_SB400_2:
185                 return (ohci_device_sb400);
186         case PCI_OHCI_DEVICEID_USB0670:
187                 return (ohci_device_usb0670);
188         case PCI_OHCI_DEVICEID_USB0673:
189                 return (ohci_device_usb0673);
190         case PCI_OHCI_DEVICEID_FIRELINK:
191                 return (ohci_device_firelink);
192         case PCI_OHCI_DEVICEID_NEC:
193                 return (ohci_device_nec);
194         case PCI_OHCI_DEVICEID_NFORCE3:
195                 return (ohci_device_nforce3);
196         case PCI_OHCI_DEVICEID_SIS5571:
197                 return (ohci_device_sis5571);
198         case PCI_OHCI_DEVICEID_KEYLARGO:
199                 return (ohci_device_keylargo);
200         case PCI_OHCI_DEVICEID_PCIO2USB:
201                 return (ohci_device_pcio2usb);
202         default:
203                 if (pci_get_class(self) == PCIC_SERIALBUS
204                     && pci_get_subclass(self) == PCIS_SERIALBUS_USB
205                     && pci_get_progif(self) == PCI_INTERFACE_OHCI) {
206                         return (ohci_device_generic);
207                 }
208         }
209
210         return NULL;            /* dunno */
211 }
212
213 static int
214 ohci_pci_probe(device_t self)
215 {
216         const char *desc = ohci_pci_match(self);
217
218         if (desc) {
219                 device_set_desc(self, desc);
220                 return 0;
221         } else {
222                 return ENXIO;
223         }
224 }
225
226 static int
227 ohci_pci_attach(device_t self)
228 {
229         ohci_softc_t *sc = device_get_softc(self);
230         int err;
231         int rid;
232
233         /* XXX where does it say so in the spec? */
234         sc->sc_bus.usbrev = USBREV_1_0;
235
236         pci_enable_busmaster(self);
237
238         /*
239          * Some Sun PCIO-2 USB controllers have their intpin register
240          * bogusly set to 0, although it should be 4. Correct that.
241          */
242         if (pci_get_devid(self) == PCI_OHCI_DEVICEID_PCIO2USB &&
243             pci_get_intpin(self) == 0)
244                 pci_set_intpin(self, 4);
245
246         rid = PCI_CBMEM;
247         sc->io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid,
248             RF_ACTIVE);
249         if (!sc->io_res) {
250                 device_printf(self, "Could not map memory\n");
251                 return ENXIO;
252         }
253         sc->iot = rman_get_bustag(sc->io_res);
254         sc->ioh = rman_get_bushandle(sc->io_res);
255
256         rid = 0;
257         sc->irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
258             RF_SHAREABLE | RF_ACTIVE);
259         if (sc->irq_res == NULL) {
260                 device_printf(self, "Could not allocate irq\n");
261                 ohci_pci_detach(self);
262                 return ENXIO;
263         }
264         sc->sc_bus.bdev = device_add_child(self, "usb", -1);
265         if (!sc->sc_bus.bdev) {
266                 device_printf(self, "Could not add USB device\n");
267                 ohci_pci_detach(self);
268                 return ENOMEM;
269         }
270         device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
271
272         /* ohci_pci_match will never return NULL if ohci_pci_probe succeeded */
273         device_set_desc(sc->sc_bus.bdev, ohci_pci_match(self));
274         switch (pci_get_vendor(self)) {
275         case PCI_OHCI_VENDORID_ACERLABS:
276                 sprintf(sc->sc_vendor, "AcerLabs");
277                 break;
278         case PCI_OHCI_VENDORID_AMD:
279                 sprintf(sc->sc_vendor, "AMD");
280                 break;
281         case PCI_OHCI_VENDORID_APPLE:
282                 sprintf(sc->sc_vendor, "Apple");
283                 break;
284         case PCI_OHCI_VENDORID_ATI:
285                 sprintf(sc->sc_vendor, "ATI");
286                 break;
287         case PCI_OHCI_VENDORID_CMDTECH:
288                 sprintf(sc->sc_vendor, "CMDTECH");
289                 break;
290         case PCI_OHCI_VENDORID_NEC:
291                 sprintf(sc->sc_vendor, "NEC");
292                 break;
293         case PCI_OHCI_VENDORID_NVIDIA:
294         case PCI_OHCI_VENDORID_NVIDIA2:
295                 sprintf(sc->sc_vendor, "nVidia");
296                 break;
297         case PCI_OHCI_VENDORID_OPTI:
298                 sprintf(sc->sc_vendor, "OPTi");
299                 break;
300         case PCI_OHCI_VENDORID_SIS:
301                 sprintf(sc->sc_vendor, "SiS");
302                 break;
303         default:
304                 if (bootverbose)
305                         device_printf(self, "(New OHCI DeviceId=0x%08x)\n",
306                             pci_get_devid(self));
307                 sprintf(sc->sc_vendor, "(0x%04x)", pci_get_vendor(self));
308         }
309
310         err = bus_setup_intr(self, sc->irq_res, 0,
311             (driver_intr_t *) ohci_intr, sc, &sc->ih, NULL);
312         if (err) {
313                 device_printf(self, "Could not setup irq, %d\n", err);
314                 sc->ih = NULL;
315                 ohci_pci_detach(self);
316                 return ENXIO;
317         }
318         err = ohci_init(sc);
319         if (!err) {
320                 sc->sc_flags |= OHCI_SCFLG_DONEINIT;
321                 err = device_probe_and_attach(sc->sc_bus.bdev);
322         }
323
324         if (err) {
325                 device_printf(self, "USB init failed\n");
326                 ohci_pci_detach(self);
327                 return EIO;
328         }
329         return 0;
330 }
331
332 static int
333 ohci_pci_detach(device_t self)
334 {
335         ohci_softc_t *sc = device_get_softc(self);
336
337         if (sc->sc_flags & OHCI_SCFLG_DONEINIT) {
338                 ohci_detach(sc, 0);
339                 sc->sc_flags &= ~OHCI_SCFLG_DONEINIT;
340         }
341
342         if (sc->irq_res && sc->ih) {
343                 int err = bus_teardown_intr(self, sc->irq_res, sc->ih);
344
345                 if (err)
346                         /* XXX or should we panic? */
347                         device_printf(self, "Could not tear down irq, %d\n",
348                             err);
349                 sc->ih = NULL;
350         }
351         if (sc->sc_bus.bdev) {
352                 device_delete_child(self, sc->sc_bus.bdev);
353                 sc->sc_bus.bdev = NULL;
354         }
355         if (sc->irq_res) {
356                 bus_release_resource(self, SYS_RES_IRQ, 0, sc->irq_res);
357                 sc->irq_res = NULL;
358         }
359         if (sc->io_res) {
360                 bus_release_resource(self, SYS_RES_MEMORY, PCI_CBMEM, sc->io_res);
361                 sc->io_res = NULL;
362                 sc->iot = 0;
363                 sc->ioh = 0;
364         }
365         return 0;
366 }
367
368 static device_method_t ohci_methods[] = {
369         /* Device interface */
370         DEVMETHOD(device_probe, ohci_pci_probe),
371         DEVMETHOD(device_attach, ohci_pci_attach),
372         DEVMETHOD(device_detach, ohci_pci_detach),
373         DEVMETHOD(device_suspend, ohci_pci_suspend),
374         DEVMETHOD(device_resume, ohci_pci_resume),
375         DEVMETHOD(device_shutdown, bus_generic_shutdown),
376
377         /* Bus interface */
378         DEVMETHOD(bus_print_child, bus_generic_print_child),
379
380         {0, 0}
381 };
382
383 static driver_t ohci_driver = {
384         "ohci",
385         ohci_methods,
386         sizeof(ohci_softc_t),
387 };
388
389 static devclass_t ohci_devclass;
390
391 DRIVER_MODULE(ohci, pci, ohci_driver, ohci_devclass, 0, 0);
392 DRIVER_MODULE(ohci, cardbus, ohci_driver, ohci_devclass, 0, 0);